Name of the Student: ____________________ Register No: 3122 13 419 _____

Expt. No: 04 Date:

Modelling and Simulation of NMOS circuits using Spice

Aim: To model and simulate a NMOS NOR and NMOS NAND using Tanner EDA tools. Software Required: Tanner EDA. Theory:
(1) 2-Input NOR Gate with NMOS Logic

Schematic:

2-Input NOR Gate with NMOS Logic

Test Bench

T-SPICE Netlist:

Simulation Output Waveforms:

Measurement Results Summary:
(2) 2-Input NAND Gate with NMOS Logic

Schematic:

2-Input NAND Gate with NMOS Logic

Test Bench

T-SPICE Netlist:

Simulation Output Waveforms:

Result:

Expt: Modelling and Simulation of NMOS circuits using Spice

~1~