Zadanie 1)

INCLUDE ”2x8mus”;
INCLUDE ”LPM_MULT”;

SUBDESIGN Caly (
zegar, selBank, Bank1A[7..0], Bank2A[7..0], Bank1B[7..0], Bank2B[7..0] :input;
out[15..0] :output;
)

VARIABLE
a :2x8mux;
b :2x8mux;
c :LPM_MULT (LPM_PIPELINE=3, LPM_WIDTHA=8, LPM_WIDTHB=8);

BEGIN
a.SEL = selBank;
a.A[] = Bank1A[] ;
a.B[] = Bank2A[];

b.SEL = !selBank;
b.A[] = Bank1B[];
b.B[] = Bank2B[];

c.clock = zegar;
c.dataa[] = a.Y[];
c.datab[] = b.Y[];

out[] = c.result[];

END;
Zadanie 2)
CONSTANT STOP=B”00”;
CONSTANT RESET=B”01”;
CONSTANT LOAD=B”11”;
CONSTANT SHIFT=B”10”;

SUBDESIGN rejestr(
clock, mode[1..0], bus[7..0], in_x :input;
wynik[7..0] :output;
)

VARIABLE
reg[7..0] :DFF;

BEGIN
reg[].clk = clock;
CASE mode[] IS
WHEN STOP =>
reg[] = reg[];
WHEN RESET =>
reg[] = GND;

WHEN LOAD =>

reg[] = bus[];

WHEN SHIFT =>

reg0 = in_x;
reg[7..1] = reg[6..0];
END CASE;
wynik[] = reg[];
END;
Zadanie 3)
SUBDESIGN Automat (
clock, reset, xx[1..0] :input;
z, y :output;
)
VARIABLE
Aut: MACHINE WITH STATES (S3, S4, S1, S2);

BEGIN
Aut.clk = clock;
Aut.reset = reset;
CASE Aut IS
WHEN S3 =>
Aut = S4;
y = GND;
WHEN S4 =>
IF xx0 == GND THEN Aut = S4;
ELSE Aut = S1;
y = VCC;
END IF;
WHEN S1 =>
IF xx1== GND THEN Aut = S1;
y = GND;
ELSE Aut = S2;
y = VCC;
END IF;
WHEN S2 =>
IF xx0 == GND THEN Aut = S4;
y = GND;
ELSE Aut = S3;
y = VCC;
END IF;
END CASE;
IF Aut == S4 THEN z = VCC;
ELSE z = GND;
END IF;
END;