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AM26LS32AC, AM26LS32AI, AM26LS33AC, AM26LS32AM, AM26LS33AM QUADRUPLE DIFFERENTIAL LINE RECEIVERS

SLLS115D OCTOBER 1980 REVISED MARCH 2002

D D D D D D D D D D

AM26LS32A Devices Meet or Exceed the Requirements of ANSI TIA/EIA-422-B, TIA/EIA-423-B, and ITU Recommendations V.10 and V.11 AM26LS32A Devices Have 7-V Common-Mode Range With 200-mV Sensitivity AM26LS33A Devices Have 15-V Common-Mode Range With 500-mV Sensitivity Input Hysteresis . . . 50 mV Typical Operate From a Single 5-V Supply Low-Power Schottky Circuitry 3-State Outputs Complementary Output-Enable Inputs Input Impedance . . . 12 k Min Designed to Be Interchangeable With Advanced Micro Devices AM26LS32 and AM26LS33

AM26LS32AC . . . D, N, OR NS PACKAGE AM26LS32AI, AM26LS33AC . . . D OR N PACKAGE AM26LS32AM, AM26LS33AM . . . J PACKAGE (TOP VIEW)

1B 1A 1Y G 2Y 2A 2B GND

1 2 3 4 5 6 7 8

16 15 14 13 12 11 10 9

VCC 4B 4A 4Y G 3Y 3A 3B

AM26LS32AM, AM26LS33AM . . . FK PACKAGE (TOP VIEW)

1A 1B NC VCC 4B 1Y G NC 2Y 2A
3 4 5 6 7 8 2 1 20 19 18 17 16 15 14 9 10 11 12 13

description
The AM26LS32A and AM26LS33A devices are quadruple differential line receivers for balanced and unbalanced digital data transmission. The enable function is common to all four receivers and offers a choice of active-high or active-low input. The 3-state outputs permit connection directly to a bus-organized system. Fail-safe design ensures that, if the inputs are open, the outputs always are high.

4A 4Y NC G 3Y

NC No internal connection

Compared to the AM26LS32 and the AM26LS33, the AM26LS32A and AM26LS33A incorporate an additional stage of amplification to improve sensitivity. The input impedance has been increased, resulting in less loading of the bus line. The additional stage has increased propagation delay; however, this does not affect interchangeability in most applications. The AM26LS32AC and AM26LS33AC are characterized for operation from 0C to 70C. The AM26LS32AI is characterized for operation from 40C to 85C. The AM26LS32AM and AM26LS33AM are characterized for operation over the full military temperature range of 55C to 125C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. AM26LS32 and AM26LS33 are trademarks of Advanced Micro Devices, Inc.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 2002, Texas Instruments Incorporated

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2B GND NC 3B 3A

AM26LS32AC, AM26LS32AI, AM26LS33AC, AM26LS32AM, AM26LS33AM QUADRUPLE DIFFERENTIAL LINE RECEIVERS


SLLS115D OCTOBER 1980 REVISED MARCH 2002

FUNCTION TABLE (each receiver) DIFFERENTIAL AB VID VIT IT+ VIT VID VIT+ IT IT VID VIT IT X Open ENABLES G H X H X H X L H X G X L X L X L H X L OUTPUT Y H H ? ? L L Z H H

H = high level, L = low level, ? = indeterminate, X = irrelevant, Z = high impedance (off)

logic diagram (positive logic)


G G 1A 1B 2A 2B 3A 3B 4A 4B 4 12 2 1 6 7 10 9 14 15 3

1Y

2Y

11

3Y

13

4Y

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AM26LS32AC, AM26LS32AI, AM26LS33AC, AM26LS32AM, AM26LS33AM QUADRUPLE DIFFERENTIAL LINE RECEIVERS


SLLS115D OCTOBER 1980 REVISED MARCH 2002

schematics of inputs and outputs


EQUIVALENT OF EACH DIFFERENTIAL INPUT VCC

EQUIVALENT OF EACH ENABLE INPUT VCC 8.3 k NOM

TYPICAL OF ALL OUTPUTS VCC 85 NOM

100 k A Input Only 20 k NOM Input 100 k B Input Only 960 NOM 960 NOM Enable

Output

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI: Any differential input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V Other inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Package thermal impedance, JA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64C/W Case temperature for 60 seconds, TC: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package . . . . . . . . . . . . . . . . 260C Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package . . . . . . . . . . . . . . . . . . . . . 300C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the network ground terminal. 2. Differential voltage values are at the noninverting (A) input terminals with respect to the inverting (B) input terminals. 3. The package thermal impedance is calculated in accordance with JESD 51-7. DISSIPATION RATING TABLE PACKAGE FK J TA 25C POWER RATING 1375 mW 1375 mW DERATING FACTOR ABOVE TA = 25C 11.0 mW/C 11.0 mW/C TA = 70C POWER RATING 880 mW 880 mW TA = 125C POWER RATING 275 mW 275 mW

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AM26LS32AC, AM26LS32AI, AM26LS33AC, AM26LS32AM, AM26LS33AM QUADRUPLE DIFFERENTIAL LINE RECEIVERS


SLLS115D OCTOBER 1980 REVISED MARCH 2002

recommended operating conditions


MIN VCC VIH VIL VIC IOH IOL TA Supply voltage High-level input voltage Low-level input voltage Common-mode Common mode input voltage High-level output current Low-level output current AM26LS32AC, AM26LS33AC Operating free-air temperature AM26LS32AI AM26LS32AM, AM26LS33AM 0 40 55 AM26LS32A AM26LS33A AM26LS32AC, AM26LS32AI, AM26LS33AC AM26LS32AM, AM26LS33AM 4.75 4.5 2 0.8 7 15 440 8 70 85 125 C NOM 5 5 MAX 5.25 5.5 UNIT V V V V A mA

electrical characteristics over recommended ranges of VCC, VIC, and operating free-air temperature (unless otherwise noted)
PARAMETER VIT IT+ VIT IT Vhys VIK Positive-going g g input threshhold voltage Negative-going g g g input threshhold voltage Hysteresis voltage (VIT+ VIT) Enable-input clamp voltage TEST CONDITIONS VO = VOHmin IOH = 440 A min, 440 VO = 0 45 V IOL = 8 mA 0.45 V, AM26LS32A AM26LS33A AM26LS32A AM26LS33A 0.2 0.5 50 VCC = MIN, VCC =MIN, VID = 1 V, , , VI(G) = 0.8 V, IOH = 440 A VCC = MIN, VID = 1 V, , , VI(G) = 0.8 V VCC = MAX VI = 15 V, VI = 15 V, VI = 5.5 V VI = 2.7 V VI = 0.4 V VIC = 15 V to 15 V, VCC = MAX One input to ac ground 12 15 15 85 II = 18 mA AM26LS32AC AM26LS33AC AM26LS32AM, AM26LS32AI, AM26LS33AM IOL = 4 mA IOL = 8 mA VO = 2.4 V VO = 0.4 V Other input at 10 V to 15 V Other input at 15 V to 10 V 1.5 2.7 V 2.5 0.4 0.45 20 20 1.2 1.7 100 20 0.36 mA A A mA k mA V MIN TYP MAX 0.2 0.5 UNIT V V mV V

VOH

High level output voltage High-level

VOL

Low level output voltage Low-level Off-state (high-impedance (high impedance state) output current Line input current Enable input current High-level enable current Low-level enable current Input resistance Short-circuit output current

IOZ

II II(EN) IIH IIL rI IOS

ICC Supply current VCC = MAX, All outputs disabled 52 70 mA All typical values are at VCC = 5 V, TA = 25C, and VIC = 0. The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for threshold levels only. Not more than one output should be shorted to ground at a time, and duration of the short circuit should not exceed one second.

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AM26LS32AC, AM26LS32AI, AM26LS33AC, AM26LS32AM, AM26LS33AM QUADRUPLE DIFFERENTIAL LINE RECEIVERS


SLLS115D OCTOBER 1980 REVISED MARCH 2002

switching characteristics, VCC = 5 V, TA = 25C


PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation delay time, low-to-high-level output Propagation delay time, high-to-low-level output Output enable time to high level Output enable time to low level Output disable time from high level Output disable time from low level TEST CONDITIONS CL = 15 pF pF, CL = 15 pF pF, CL = 5 pF pF, See Figure 1 See Figure 1 See Figure 1 MIN TYP 20 22 17 20 21 30 MAX 35 35 22 25 30 40 UNIT ns ns ns

PARAMETER MEASUREMENT INFORMATION


VCC Test Point From Output Under Test CL (see Note A) RL = 2 k S1 2.5 V Input 0 tPLH Output tPHL VOH 1.3 V S1 and S2 Closed TEST CIRCUIT VOLTAGE WAVEFORMS FOR tPLH, tPHL 1.3 V VOL 0 2.5 V 5 k See Note B S2

5 ns 90% Enable G 10% See Note C 90% 1.3 V Enable G tPZH Output S1 Open S2 Closed 1.3 V tPHZ VOLTAGE WAVEFORMS FOR tPHZ, tPZH 10% 10% 1.3 V 90% 1.3 V

5 ns 3V Enable G 10% 0 3V 10%

5 ns 90% 1.3 V 90% 1.3 V

5 ns 3V

10% See Note C

0 3V

90% 1.3 V

90% Enable G 1.3 V 10% tPZL 10%

90% 1.3 V

0 0.5 V VOH Output

S1 Closed S2 Closed tPLZ 0.5 V

0 1.4 V VOL

1.3 V

1.4 V S1 Closed S2 Closed

S1 Closed S2 Open

VOLTAGE WAVEFORMS FOR tPLZ, tPZL

NOTES: A. CL includes probe and jig capacitance. B. All diodes are 1N3064 or equivalent. C. Enable G is tested with G high; G is tested with G low.

Figure 1

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AM26LS32AC, AM26LS32AI, AM26LS33AC, AM26LS32AM, AM26LS33AM QUADRUPLE DIFFERENTIAL LINE RECEIVERS


SLLS115D OCTOBER 1980 REVISED MARCH 2002

TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT
5 VID = 0.2 V TA = 25C VOH High-Level Output Voltage V VOH High-Level Output Voltage V 4 5 VCC = 5 V VID = 0.2 mV IOH = 440 A

HIGH-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE

VCC = 5.25 V VCC = 5 V

2 VCC = 5.5 V 1 VCC = 4.75 V

VCC = 4.5 V 0 0 10 20 30 40 50

IOH High-Level Output Current mA VCC = 5.5 V and VCC = 4.5 V applies to M-suffix devices only.

10

20 30 40 50 60 TA Free-Air Temperature C

70

80

Figure 2

Figure 3

LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT


0.6 VCC = 5 V TA = 25C VID = 0.2 mV 0.5

LOW-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE


VCC = 5 V VID = 0.2 V IOL = 8 mA

VOL Low-Level Output Voltage V

0.5

VOL Low-Level Output Voltage V 30

0.4

0.4

0.3

0.3

0.2

0.2

0.1

0.1

0 0 15 20 25 10 IOL Low-Level Output Current mA 5

0 0 10 20 30 40 50 60 TA Free-Air Temperature C 70 80

Figure 4

Figure 5

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AM26LS32AC, AM26LS32AI, AM26LS33AC, AM26LS32AM, AM26LS33AM QUADRUPLE DIFFERENTIAL LINE RECEIVERS


SLLS115D OCTOBER 1980 REVISED MARCH 2002

TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE vs ENABLE G VOLTAGE
5 4.5 4 VO Output Voltage V 3.5 3 2.5 2 1.5 1 0.5 0 0 0.5 1 1.5 2 2.5 3 Enable G Voltage V 5 VID = 0.2 V TA = 25C Load = 8 k to GND 4.5 VCC = 5.5 V VO Output Voltage V VCC = 5 V VCC = 4.5 V 4 3.5 3 2.5 2 1.5 1 0.5 0 0 0.5 1 1.5 2 2.5 3 Enable G Voltage V TA = 70C TA = 25C TA = 0C VCC = 5 V VID = 0.2 V Load = 8 k to GND

OUTPUT VOLTAGE vs ENABLE G VOLTAGE

Figure 6

Figure 7

OUTPUT VOLTAGE vs ENABLE G VOLTAGE


6 VCC = 5.5 V 5 VO Output Voltage V VCC = 5 V VCC = 4.5 V VO Output Voltage V 4 5 6

OUTPUT VOLTAGE vs ENABLE G VOLTAGE

TA = 0C TA = 25C TA = 70C

0 0

VID = 0.2 V Load = 1 k to VCC TA = 25C 0.5 1 1.5 2 2.5 3

0 0

VCC = 5 V VID = 0.2 V Load = 1 k to VCC 0.5 1 1.5 2 2.5 3

Enable G Voltage V

Enable G Voltage V

Figure 8

Figure 9

POST OFFICE BOX 655303

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AM26LS32AC, AM26LS32AI, AM26LS33AC, AM26LS32AM, AM26LS33AM QUADRUPLE DIFFERENTIAL LINE RECEIVERS


SLLS115D OCTOBER 1980 REVISED MARCH 2002

TYPICAL CHARACTERISTICS
AM26LS32A AM26LS33A

OUTPUT VOLTAGE vs DIFFERENTIAL INPUT VOLTAGE


5 4.5 4 VO Output Voltage V 3.5 3 2.5 2 1.5 1 0.5 0 200 150 100 50 0 50 100 150 200
VIT VIT+ VIT VIT+ VIT VIT+

OUTPUT VOLTAGE vs DIFFERENTIAL INPUT VOLTAGE


5 VCC = 5 V, IO = 0, TA = 25C 4.5 4 VO Output Voltage V

VCC = 5 V IO = 0 TA = 25C
VIC = 7 V VIC = 0 VIC = 7V

3.5 3 2.5 2 1.5 1 0.5


VIT

VIC = 15 V

VIC = 0

VIC = 15 V

VIT VIT+ VIT+

VIT VIT+

0 200 150 100 50

50

100

150 200

VID Differential Input Voltage mV

VID Differential Input Voltage mV

Figure 10
INPUT CURRENT vs INPUT VOLTAGE
4 3 2 I I Input Current mA 1 0 VCC = 0 1 2 3 4 25 20 15 10 5 VCC = 5 V

Figure 11

The Unshaded Area Shows Requirements of Paragraph 4.2.1 of ANSI Standards EIA/TIA-422-B and EIA/TIA-423-B. 0 5 10 15 20 25

VI Input Voltage V

Figure 12

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AM26LS32AC, AM26LS32AI, AM26LS33AC, AM26LS32AM, AM26LS33AM QUADRUPLE DIFFERENTIAL LINE RECEIVERS


SLLS115D OCTOBER 1980 REVISED MARCH 2002

APPLICATION INFORMATION
1/4 AM26LS31AC Data In RT 1/4 AM26LS32AC Data Out

1/4 AM26LS32AC Data Out

1/4 AM26LS33AC Data Out

RT equals the characteristic impedance of the line.

Figure 13. Circuit With Multiple Receivers

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