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Experiment #2 Function Generator

Farzin Akbar
810188407

Isaac Kargar
810188254

farzinakbar@ut.ac.ir

kargarisaac@ut.ac.ir

Abstract The importance of function generators in digital electronics is out of question. This experiment focuses on the implementation of a function generator that is able to produce different waveforms such as square, sawtooth, triangle, and sine waveforms. Also, it has the ability to generate an arbitrary signal which is a digitalized voice. The function generator is implemented in QUARTUS and consists of a PWM, a digital to analogue converter, a digital function generator, and amplitude and frequency selectors. Finally the codes were uploaded on an Altera Board and the board itself functioned as a function generator.

Keywords PWM, Function generator, DAC, Altera, QUARTUSS

I. INTRODUCTION As function generators play an important role in the world of digital electronics, it is of great importance to get to know the fundamental blocks that make the function generator and the way to implement them via Verilog programming language which is a hardware description language through QUARTUS programme. Perhaps the most important part of the Function Generator is the PWM that makes the generation of different pulses possible. Another aim of this experiment was to familiarize us with the register transfer level design and implementation, hardware realization of mathematical equations and the use of passive low pass filter for producing analogue outputs. Each will be described in detail in the following sections. II. METHODOLOGY To initiate the project, we first needed to implement a PWM which is more of a method than a building block. Its a method of varying the duty cycle to regulate motor speed and is known as pulse width modulation (PWM). Period of PWM has to be small enough so that it has little effect of on/off switching on load. Pulse Width (PW) determines the amount of power which is fed to the load. In this experiment, period of PWM is fixed at 256 clocks and its pulse width is the value on 8-bit input of module. Figure 1 shows sample PWM waves and figure 2 illustrates the Verilog code that was written to implement a PWM in QUARTUS hardware description program.

Figure 1. Sample PWM waveforms.

Figure 2. Verilog code to implement the PWM module. DAC is the next important building block of the function generator that converts the digital signal to the analogue signal. Its presence is a matter of importance because it makes the signal sensible for humans and other analogue systems. DACs can be implemented with different methods. The easiest one is the PWM method. A stable voltage is switched into a low-pass analogue filter with a duration determined by the digital input code. Figure 3 shows a schematic of this lowpass filter.

Figure 3. Low pass filter. In this experiment this low pass filter was loaded on the bread board and in the final step the output of the altera board was applied to it. In this implementation resolution of DAC is equal to resolution of the PWM and its maximum sampling rate is switching frequency (1/period) of PWM. Output value of this DAC can be approximated by Duty Cycle of PWM signal multiplied by Vcc value. The third important part of this project is the digital function generator itself. The function generator produces desired functions over time and waves generated by this module have the fixed period of 256 clocks. It is worth noting that the output of the function generator is an 8-bit digital signal representing the amplitude of the signal. One must bear in mind that due to characteristics of implemented DAC, valid range of the output is between Vcc and Gnd. The waveforms that the function generator could produce, are described next. Next the code of different waveforms that the function generator must have been able to produce was written and each ones waveform was checked for verification. Figure 3 shows the code that was written for the sawtooth waveform.

Figure 5. Code written for square waveform

Figure 6. Code written for triangle waveform

Figure 4. Code written to implement the sawtooth waveform. Figure 4, 5, and 6 illustrate the codes for the square wave, triangle wave, and sine wave outputs, respectively. Figure 7. Code written for the sine waveform. Writing codes for different waveforms was a matter of simply except for the sine wave in which some points must have been kept in mind. In order to increase the accuracy of the mathematical operations they were all done in 16-bit fixed point. We considered a period of about 256 clocks equation

turn to (assuming value between -32768 to 32767 for Sin and Cos): Cos(n)=Cos (n-1) - 1/64 Sin (n-1) Sin(n)=Sin (n-1) + 1/64 Cos (n-1) output of these calculations will be signed. But as PWM cant handle negative values, it should be biased in unsigned range and its 8 most significant bits can be used as output. The most important point was that the sine and cosine must have been sign extended. Another code that was written was the ampsel code that was used to change the amplitude of the digital output waveform by shifting its bits. Figure 8 shows the code of this module.

Next, the code of all waveforms and modules were merged and we wrote a code named funcsel which could be seen in Appendix1. It included all the waveforms and was controlled by some control signals so that the user could choose the output waveform type and its amplitude and frequency. Another waveform that was later added was the arbitrary waveform was a voice file sampled at 8 KHz and it could be heard via two speakers. Finally the codes were uploaded on the Altera board and its output was applied to a low pass filter which acted as an ADC. The output of the ADC was visualized via the oscilloscope available in the FPGA lab. Figures 9 to 12 show the visualized waveforms on the screen of the oscilloscope.

Just like ampsel, a module was written for changing the frequency of the output waveform and its name was freqs. It gives us the ability to choose between 4 frequencies for the output wave form. Figure 8 shows its code.

Figure 9. Square waveform

Figure 10. Sawtooth waveform

Figure 8. Code written for frequency selector function.


All of our modules were verified to work correctly by the Lab Assistant.

REFERENCES
[1] Experiment#2, Digital Logic Design Lab, Semester Spring 1392, University of Tehran.

APPENDIX Appendix1 module funcsel(input [2:0]func, input clk, input rst, output reg [7:0] out); reg [7:0] cnt = 0; reg [14:0] cnt2 = 0; wire [15:0]sin1,cos1; reg [15:0] sin,cos; reg a=0; wire[7:0]q; isaac s1(cnt2,clk,q); assign sin1 = sin + {cos[15],cos[15],cos[15],cos[15],cos[15],cos[15],cos[15:6]}; assign cos1 = cos {sin1[15],sin1[15],sin1[15],sin1[15],sin1[15],sin1[15],sin1[15 :6]}; always @(posedge clk) begin if(rst == 1) begin out <= 8'b0; cnt <= 0; sin <= 16'b0; cos <= 30000; Figure 12. Sine waveform. end else if(func == 0) begin sin<=sin1; cos<=cos1; out<=sin1[15:8]+127; end else if(func == 1) begin if(cnt<=127) begin out<=255; end else begin out<=0; end end else if(func == 2) begin if(cnt<=127) begin out<=cnt*2; end else begin out<=(255-cnt)*2;

Figure 11. Triangle waveform

III. CONCLUSIONS The function generator implementation was done in this experiment. It was found that PWM plays an important role in the implementation of a function generator. We also found that we could upload the code of the function generator on the Altera board so that it could be used as a function generator. The necessity of a DAC was also surveyed as it changes the digital signal to analogue signals that could be detected by human senses and other analog systems.

Figure 13. Overview of the function generator.

end end else if(func == 3) begin out<= cnt ; end else if(func==4) begin cnt2<=cnt2+1; out<=q;

if(cnt2==19000) begin cnt2<=0; end end cnt<=cnt+1; end endmodule

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