Professional Documents
Culture Documents
FEATURES
Meets EIA RS-485 standard 5 Mbps data rate Single 5 V supply 7 V to +12 V bus common-mode range High speed, low power BiCMOS Thermal shutdown protection Short-circuit protection Driver propagation delay: 10 ns typical Receiver propagation delay: 15 ns typical High-Z outputs with power off Superior upgrade for LTC485
VCC B A GND
00078-001
Figure 1.
APPLICATIONS
Low power RS-485 systems DTE/DCE interface Packet switching Local area networks (LNAs) Data concentration Data multiplexers Integrated services digital network (ISDN)
GENERAL DESCRIPTION
The ADM485 is a differential line transceiver suitable for high speed bidirectional data communication on multipoint bus transmission lines. It is designed for balanced data transmission and complies with EIA standards RS-485 and RS-422. The part contains a differential line driver and a differential line receiver. Both the driver and the receiver can be enabled independently. When disabled, the outputs are three-stated. The ADM485 operates from a single 5 V power supply. Excessive power dissipation caused by bus contention or by output shorting is prevented by a thermal shutdown circuit. If during fault conditions, a significant temperature increase is detected in the internal driver circuitry, this feature forces the driver output into a high impedance state. Up to 32 transceivers can be connected simultaneously on a bus, but only one driver should be enabled at any time. It is important, therefore, that the remaining disabled drivers do not load the bus. To ensure this, the ADM485 driver features high output impedance when disabled and when powered down, which minimizes the loading effect when the transceiver is not being used. The high impedance driver output is maintained over the common-mode voltage range of 7 V to +12 V.
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
The receiver contains a fail-safe feature that results in a logic high output state if the inputs are unconnected (floating). The ADM485 is fabricated on BiCMOS, an advanced mixed technology process combining low power CMOS with fast switching bipolar technology. All inputs and outputs contain protection against ESD; all driver outputs feature high source and sink current capability. An epitaxial layer is used to guard against latch-up. The ADM485 features extremely fast switching speeds. Minimal driver propagation delays permit transmission at data rates up to 5 Mbps while low skew minimizes EMI interference. The part is fully specified over the commercial and industrial temperature range and is available in 8-lead PDIP, 8-lead SOIC, and small footprint, 8-lead MSOP packages.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 19932008 Analog Devices, Inc. All rights reserved.
REVISION HISTORY
04/08Rev. E to Rev. F Updated Format..................................................................Universal Changes to Table 2............................................................................ 4 Updated Outline Dimension......................................................... 13 Changes to Ordering Guide .......................................................... 14 10/03Rev. D to Rev. E Changes to Timing Specifications .................................................. 2 Updated Ordering Guide................................................................. 3 7/03Rev. C to Rev. D Changes to Absolute Maximum Ratings ....................................... 3 Changes to Ordering Guide ............................................................ 3 Update to Outline Dimensions....................................................... 9 1/03Rev. B to Rev. C. Change to Specifications ..................................................................2 Change to Ordering Guide...............................................................3 12/02Rev. A to Rev. B. Deleted Q-8 Package ..........................................................Universal Edits to Features.................................................................................1 Edits to General Description ...........................................................1 Edits, additions to Specifications.....................................................2 Edits, additions to Absolute Maximum Ratings............................3 Additions to Ordering Guide...........................................................3 TPCs Updated and Reformatted .....................................................5 Addition of 8-Lead MSOP Package ................................................9 Update to Outline Dimensions........................................................9
Rev. F | Page 2 of 16
ADM485 SPECIFICATIONS
VCC = 5 V 5%, all specifications TMIN to TMAX, unless otherwise noted. Table 1.
Parameter DRIVER Differential Output Voltage, VOD Min Typ Max 5.0 5.0 5.0 5.0 0.2 3 0.2 250 250 0.8 1.0 0.2 70 12 1 0.8 0.8 2.0 1 0.4 4.0 7 85 1.0 1.0 0.6 2.2 1 +0.2 Unit V V V V V V V mA mA V V A V mV k mA mA V V A V V mA A mA mA Test Conditions/Comments R = , see Figure 20 VCC = 5 V, R = 50 (RS-422), see Figure 20 R = 27 (RS-485), see Figure 20 VTST = 7 V to +12 V, see Figure 21 R = 27 or 50 , see Figure 20 R = 27 or 50 , see Figure 20 R = 27 or 50 7 V VO +12 V 7 V VO +12 V
VOD3 |VOD| for Complementary Output States Common-Mode Output Voltage, VOC |VOD| for Complementary Output States Output Short-Circuit Current, VOUT = High Output Short-Circuit Current, VOUT = Low CMOS Input Logic Threshold Low, VINL CMOS Input Logic Threshold High, VINH Logic Input Current (DE, DI) RECEIVER Differential Input Threshold Voltage, VTH Input Voltage Hysteresis, VTH Input Resistance Input Current (A, B) CMOS Input Logic Threshold Low, VINL CMOS Input Logic Threshold High, VINH Logic Enable Input Current (RE) CMOS Output Voltage Low, VOL CMOS Output Voltage High, VOH Short-Circuit Output Current Three-State Output Leakage Current POWER SUPPLY CURRENT ICC, Outputs Enabled ICC, Outputs Disabled
35 35 2.0
IOUT = 4.0 mA IOUT = 4.0 mA VOUT = GND or VCC 0.4 V VOUT 2.4 V Digital inputs = GND or VCC Digital inputs = GND or VCC
Rev. F | Page 3 of 16
ADM485
TIMING SPECIFICATIONS
VCC = 5 V 5%, all specifications TMIN to TMAX, unless otherwise noted. Table 2.
Parameter DRIVER Propagation Delay Input to Output, tPLH, tPHL Driver Output to OUTPUT, tSKEW Driver Rise/Fall Time, tR, tF Driver Enable to Output Valid Driver Disable Timing Matched Enable Switching |tZH tZL| Matched Disable Switching |tHZ tLZ| RECEIVER Propagation Delay Input to Output, tPLH, tPHL Skew |tPLH tPHL| Receiver Enable, tZH, tZL Receiver Disable, tHZ, tLZ Tx Pulse Width Distortion Rx Pulse Width Distortion
1
Min 2
Typ 10 1 8 10 10 0 0 15 5 5 1 1
Max 15 5 15 25 25 2 2 30 5 20 20
Unit ns ns ns ns ns ns ns ns ns ns ns ns ns
Test Conditions/Comments RLDIFF = 54 , CL1 = CL2 = 100 pF, see Figure 22 RLDIFF = 54 , CL1 = CL2 = 100 pF, see Figure 22 RLDIFF = 54 , CL1 = CL2 = 100 pF, see Figure 22 RL = 110 , CL = 50 pF, see Figure 23 RL = 110 , CL = 50 pF, see Figure 23 RL = 110 , CL = 50 pF, see Figure 23 1 RL = 110 , CL = 50 pF, see Figure 231 CL = 15 pF, see Figure 24 CL = 15 pF, see Figure 24 CL = 15 pF, RL = 1 k, see Figure 25 CL = 15 pF, RL = 1 k, see Figure 25
Guaranteed by characterization.
Rev. F | Page 4 of 16
Table 4. Transmitting
DE 1 1 0
1 2
Inputs DI 1 0 X1
Outputs B 0 1 Z2 A 1 0 Z2
Table 5. Receiving
RE 0 0 0 1
1 2
Output RO 1 0 1 Z2
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Rev. F | Page 5 of 16
VCC B
00078-002
ADM485
GND
Rev. F | Page 6 of 16
0.40 I = 8mA
RECEIVER OUTPUT LOW VOLTAGE (V)
45 40
0.35
35 30 25 20 15 10 5 0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 RECEIVER OUTPUT LOW VOLTAGE (V) 2.00
00078-003
0.30
0.25
0.20
25
25 50 TEMPERATURE (C)
75
100
125
6 8 10 12 14 16
00078-004
60 50 40 30 20 10
00078-007
18 3.50
0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 DRIVER DIFFERENTIAL OUTPUT VOLTAGE (V) 4.5
3.75
4.00
4.25
4.50
4.75
5.00
2.05
2.00
1.95
25
25 50 75 TEMPERATURE (C)
100
125
Rev. F | Page 7 of 16
00078-008
4.15 50
25
25 50 TEMPERATURE (C)
75
100
125
1.90 50
00078-006
0.15 50
ADM485
100 90 80
70 60 50 40 30 20 10 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 DRIVER OUTPUT LOW VOLTAGE (V) 4.0 4.5
25
25 50 75 TEMPERATURE (C)
100
125
30
DRIVER SKEW (ns)
40 50 60 70 80 90 100 110
00078-010
3 | tPHLA tPHLB | 2
| tPLHA tPLHB |
00078-013
00078-014
120
0.5
1.0 1.5 2.0 2.5 3.0 3.5 4.0 DRIVER OUTPUT HIGH VOLTAGE (V)
4.5
5.0
0 50
25
25 50 TEMPERATURE (C)
75
100
125
1.0
PWD
| tPLH tPHL |
25
25 50 TEMPERATURE (C)
75
100
125
00078-011
0.5 50
0 50
25
25 50 75 TEMPERATURE (C)
100
125
150
Rev. F | Page 8 of 16
00078-012
0 50
ADM485
T
DI A
B
1,2
1,2 3
00078-015
CH1 1.00VBW
CH2 1.00V BW
M5.00ns
CH3
2.64V
CH4
2.76V
00078-016
1,2
CH1 1.00VBW
CH2 500mV BW
M5.00ns
CH3
2.74V
CH1 500mV
CH2 500mV
M10.00ns
CH4
2.76V
DI
T
1,2 3
RO
CH4
400mV
00078-017
Rev. F | Page 9 of 16
00078-019
1,2
00078-018
RO
VCC A DE B DE IN S1 CL VOUT RL S2
00078-023
VOC
VOD3
60
VTST
00078-021
A
00078-024
RE CL
VOUT
375
+1.5V
A RLDIFF B
CL1
RL RE CL VOUT
S2
00078-025
CL2
REIN
Rev. F | Page 10 of 16
tPLH
1/2VO
tPHL
A, B
0V
0V
tPLH
tPHL
VOH 1.5V
10% POINT
tR
tF
VOL
3V DE 1.5V 1.5V
RE
1.5V
1.5V 0V
tZL
2.3V
tLZ
0V
tZL
1.5V OUTPUT LOW
tLZ
A, B
RO
VOL + 0.5V VOL
tZH
A, B 2.3V
tHZ
VOH 0.5V
tZH
OUTPUT HIGH
00078-027
tHZ
VOH
00078-029
VOH
RO 0V
1.5V
VOH 0.5V
0V
Rev. F | Page 11 of 16
00078-028
1.5V
R D D
R
00078-030
As with any transmission line, it is important that reflections be minimized. This can be achieved by terminating the extreme ends of the line using resistors equal to the characteristic impedance of the line. Stub lengths of the main line should also be kept as short as possible. A properly terminated transmission line appears purely resistive to the driver.
THERMAL SHUTDOWN
The ADM485 contains thermal shutdown circuitry that protects the part from excessive power dissipation during fault conditions. Shorting the driver outputs to a low impedance source can result in high driver currents. The thermal sensing circuitry detects the increase in die temperature and disables the driver outputs. The thermal sensing circuitry is designed to disable the driver outputs when a die temperature of 150C is reached. As the device cools, the drivers are re-enabled at 140C.
PROPAGATION DELAY
The ADM485 features very low propagation delay, ensuring maximum baud rate operation. The driver is well balanced, ensuring distortion free transmission. Another important specification is a measure of the skew between the complementary outputs. Excessive skew impairs the noise immunity of the system and increases the amount of electromagnetic interference (EMI).
Rev. F | Page 12 of 16
8 1
5 4
1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE
0.50 (0.0196) 0.25 (0.0099) 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157)
45
COMPLIANT TO JEDEC STANDARDS MS-012-A A CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 31. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches)
0.65 BSC 0.95 0.85 0.75 0.15 0.00 0.38 0.22 SEATING PLANE 1.10 MAX 8 0 0.80 0.60 0.40
0.23 0.08
COPLANARITY 0.10
Figure 32. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters
Rev. F | Page 13 of 16
012407-A
ADM485
0.400 (10.16) 0.365 (9.27) 0.355 (9.02)
8 1 5
0.100 (2.54) BSC 0.210 (5.33) MAX 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14)
0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.060 (1.52) MAX 0.195 (4.95) 0.130 (3.30) 0.115 (2.92)
COMPLIANT TO JEDEC STANDARDS MS-001 CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 33. 8-Lead Plastic Dual In-Line Package [PDIP] Narrow Body (N-8) Dimensions shown in inches and (millimeters)
ORDERING GUIDE
Model ADM485AN ADM485ANZ 1 ADM485AR ADM485AR-REEL ADM485ARZ1 ADM485ARZ-REEL1 ADM485ARM ADM485ARM-REEL ADM485ARM-REEL7 ADM485ARMZ1 ADM485ARMZ-REEL1 ADM485ARMZ-REEL71 ADM485JN ADM485JNZ1 ADM485JR ADM485JR-REEL ADM485JR-REEL7 ADM485JRZ1 ADM485JRZ-REEL1 ADM485JRZ-REEL71
1
Temperature Range 40C to +85C 40C to +85C 40C to +85C 40C to +85C 40C to +85C 40C to +85C 40C to +85C 40C to +85C 40C to +85C 40C to +85C 40C to +85C 40C to +85C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C
Package Description 8-Lead PDIP 8-Lead PDIP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead PDIP 8-Lead PDIP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N
Package Option N-8 N-8 R-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 N-8 N-8 R-8 R-8 R-8 R-8 R-8 R-8
070606-A
Branding
Z = RoHS Compliant Part, # denotes RoHS compliant product may be top or bottom marked.
Rev. F | Page 14 of 16
ADM485 NOTES
Rev. F | Page 15 of 16
ADM485 NOTES
19932008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00078-0-4/08(F)
Rev. F | Page 16 of 16