CASE STUDY: Design Of Next-Generation SoC For Low Power Applications

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The Problem Statement

Customer wanted a derivative SoC of their existing design that meets the power and area targets for the product, such that the product can be targeted to several low power applications in addition to the one that it was currently being used into. This involved changes to the architecture and micro-architecture, partitioning the design to appropriate power domains to meet the low power requirements of the device, clock generation logic using frequency scaling to minimize power consumption, removal of features not being used, modification to the register configurations and the analog to digital interface. The challenge was to setup a complete SoC development team with the required signal processing domain experience (the design contained a proprietary DSP) that can take over the SoC design, validation, physical design implementation, post-silicon bring-up and ATE testing with as minimal support from the customer.

How C2SiS Helped

C2SiS team took complete ownership of the SoC development by working with the customer product marketing team and the design architecture team and thoroughly understanding the product requirements. C2SiS team quickly ramped up the knowledge on the existing design environment and derived the changes required for meeting the power and area targets for the derivative SoC. C2SiS team worked on the following aspects as part of the design, verification and physical design of the derivative SoC: Reviews of the design document, register specification and existing micro-architecture document Modifications to the micro-architecture and register specification based on the changes planned for meeting the low power requirements and area targets for the device Detailed plan for the RTL changes, verification environment changes, strategy for the verification of modified features and Physical Design of the SoC were developed and signed-off with the customer RTL changes to implement the design specification Extensive lint checks and thorough code reviews Changes to the verification environment and the test cases o Addition of monitors, checkers and score-board o HVL Interface changes and integration Development of directed test cases for feature additions and removals o Synchronization logic across power domains o Low power verification for appropriate placement of level shifters and isolation cells o Power mode verification tests to verify transition between different power modes DFT implementation for different testability modes o Core based DFT strategy implemented taking into account the low power requirements for the device o ATPG for different configurations and validation Achieved 99% coverage Synthesis for the design adhering to different power modes and power domains

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Physical Design Implementation o Floorplan Partitioning for different power domains and placement of cells relative to these power domains o Low power Clock-Tree-Synthesis o Timing closure for different modes including DFT and voltage corners o Physical Verification and tape-out Post-silicon validation and ATE testing / characterization

Business Impact
Meeting the Performance Specification: C2SiSs team completed the SoC design successfully meeting the low power specifications and the area requirements thereby enabling the customer to target this product into the highly competitive smart phone market with the required product differentiation. First Silicon Success: C2SiSs team thoroughly understood the specification of the SoC, diligently created the micro-architecture and implemented the same along with all the RTL signoff checks. The verification experts from C2SiS quickly ramped up on the understanding of the existing verification environment, created a thorough verification plan for the derivative SoC and completed the validation with 100% functional coverage. This thorough verification across multiple modes ensured that the design had zero functional bugs in first silicon enabling the customer to ship this product in very high volumes. TAT Reduction: C2SiS teams product development, low power and signal processing domain expertise helped to effectively complete the design on time meeting the market requirements. Aggressive delivery schedules and high standards of quality and technical expertise are some of the challenges that give us an opportunity to demonstrate our commitment to customer success.

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