`7.

SUBJECT DETAILS 7.4 OPERATING SYSTEMS 7.4.1 7.4.2 7.4.3 7.4.4 Objective and Relevance Scope Prerequisites Syllabus i. ii. iii. 7.4.5 7.4.6 7.4.7 7.4.8 7.4.9 JNTU GATE IES

Suggested Books Websites Experts Details Journals Findings and Developments Session Plan Tutorial

7.5.10 i. ii.

7.4.11 Student Seminar Topics 7.4.12 Question Bank i. ii. iii. JNTU GATE IES

7.4.1

OBJECTIVES AND RELEV ANCE Understanding how an operating system works involves an understanding of hard ware structures (devices, networks, memory organisation) and software structures (scheduling,concurrency, security). This course deals with the structure and mechanisms of operating systems from an engineering point of view, and its purpose is to provide an understanding of the fundamentals of the operating systems design, relating them with current direction in their development.

At the completion of the course, students should be able to describe the components of a modern operating systems, explain how they interact with the computer hardware, and apply the concepts of operating system design to practical problems

7.4.2

SCOPE At the completion of the course, students should be able to describe the components of amodern operating systems, explain how they interact with the computer hard ware, and apply the concepts of operating system design to practical problem s

7.4.3 i. ii.

PREREQUISITES Introduction to computer engineering Proficiency in C programming language.

7.4.4.1 JNTU SYLLABUS UNIT I OBJECTIVE To explain what operating systems are, what they do, how they are designed and constructed. How the concept of operating systems was developed, what the common features of operating system are and what are operating system does for an user. To cover windows 2000 overview. SYLLABUS Computer system and operating system overview, overview of computer system hard ware, instruction execution, I/O function, interrupts, memory hierarchy, I/O communication techniques. Operating systems objectives and function, evaluation of operating systems, examples systems. UNIT II OBJECTIVE The process concept and concurrency are at the heart of modern operating systems. To cover various methods for process scheduling, inter process communication, and also to cover traditional UNIX systems. SYLLABUS Process description and control, process state, process description, process control, processes and threads, examples of process description and control.

UNIT III OBJECTIVE Principles of concurrency, mutual exclusion, deadlocks and case studies of unix and windows 2000 concurrency mechanisms.

SYLLABUS Concurrency, principles of concurrency, mutual exclusion, software and hardware approaches, semaphores, monitors, message passing, readers/writers problerm. UNIT IV OBJECTIVE To cover the process and threads symmetric multiprocessing, case studies of windows 2000, Solaris, Linux thread and SMP management. SYLLABUS Principles of deadlock, deadlock prevention, detection and avoidance, dining philosophers problem, example sy stems. UNIT V OBJECTIVE Deal with classic internal algorithms and structures of storage management. To provide firm practical understanding of the algorithms used. The properties, advantages and disadvantages. Also about file system structures, organization case studies of windows 2000, linux, solaris memory management. Also windows 2000, unix file management. SYLLABUS Memory management, memory management requirements, loading programs into main memory, vitual memory, hard ware and control structures, OS softwar, examples of memory management. UNIT VI OBJECTIVE To deal system I/O, including I/O system design, interfaces, internal system structures and functions also case studies of Unix SUR4 I/O and w indows 2000 I/O. SYLLABUS Uniprocessor scheduling, types of scheduling, scheduling algorithm, I/O management and disk scheduling, I/O devices, organiazation of I/O function, OS desingn issues, I/O buffering, disk I/O, disk scheduling polices, exampl es system. UNIT VII OBJECTIVE To deal security threats and various issue along with windows 200 security. Also designing of assemblers. SYLLABUS File management and security, overview of file management, file organization and access, file directories, file sharing, record blocking, secondary storage management, example system. UNIT VIII OBJECTIVE To deal security threats and various issue a long with windows 200 security. Also designing of assemblers. SYLLABUS Security, security threats, protection, intruders, viruses, trusted systems.

7.4.4.2 GATE SYLLABUS UNIT I Not applicable UNIT II

Processes, synchronization, threads, inter process, communication UNIT III Concurrency UNIT IV Deadlock UNIT V Memory management and virtual UNIT VI CPU scheduling UNIT VII File systesm, I/O systems UNIT VIII Protection and secuirty.

7.4.4.3 IES SYLLABUS Not Applicable.

7.4.5

SUGGESTED BOOKS

TEXT BOOKS T1 Operating systems, Internal and design principles stallings, 5 t h En, Pearson Education/PHI T2 Operating system principles, Abraham Silberchatz, Peter B. Galvin, Greg Gange 7 t h En. John Wiley REFERENCE BOOKS R1 Operating System, A Design Approach, Crowley, TMH R2 Modern Operating Systems, Andrew S. Tanenbaum, 2 n d En, Pearson/PHI. 7.4.6 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. WEBSITES www.eecs.mit.edu//MassachusettsInstituteofTechnolgoies www.cs.stanford.edu/degrees/undergrid/thinking.shtm/ www.cs.stanford.edu (Standford University Califorina) www.eecs.berkely.edu (University of Californiana - Berkeley) www.cs.emu.edu/educaton/undergraduate/ (carnegic melton university) www.cs.unac.edu/ (university of Illinois - urbana) www.eecs.umi.ch.edu/ (university of michigan) www.ece.utexas.edu/undergrad/ (university of Texas) www.iitg.ernet.in (IIT Gawahati) www.awl.com/cseng/books/osc5e www.bellabs.com/history/un ix www.nondto.org/saber/os www.ho wstuffworks.com www.frees.com www.redhatlinux.com EXPERTS DETAILS INTERNATIONAL

7.4.7

1.

Mr. Hal Abelson Email: hal@mit.edu Mr. Arvind Email: arvind@mit.edu NATIONAL Mr. R. D. Kumar Email: rdk@cse.iitb.ac.in Mr. Amitabha Bagchi Email: bagchi@cse.iitd.ac.in Mr. Deepak Gupta Email: deepak@cse.iitk.ac.in REGIONAL Mr. T. V. Gopal Email: gopal@annauniv.edu Mr. Deepak Gupta Email: deepak@cse.iitk.ac.in

2.

1.

2.

3.

1.

2.

7.4.8 1. 2. 3. 4. 5.

JOURNALS IEEE transaction on computers Spectram Digit Linux for you IEEE Computer magzine

7.4.9 1. 2. 3. 4. 5.

FINDINGS AND DEVELO PMENTS Practical, Transparent support for super System Implementation, Juan Navarro, OSDI02 5 t h symposium on OS Design and Operating 2002, Light weight shared objects in a 64 -bit architectures, J. Chase, Object oriented programming systems, Languages and Applications (OOPSLA), 2001. Working with Digital informatio n using on Linux, A R D Prasad, CALIBER 2001 University of Pune, 2001. A Case for Artificial Intelligence in Library Information Science, A R D Prasad 8 t h LATLIS conference held at Bangalore, 17 -19 Jan 1990 A brief introduction of Hyderabad, A R D Prasad, NACLIN -2001 University of Z39.50, 6 t h 9 t h Nov 2001

7.4.10 SESSION PLAN

Sl. No. Topics in JNTU Syllabus Modules and Sub modules Lecture No. Suggested Books Remarks

UNIT I Computer and operating systems overview Introduction to operating systems identification and applications. T1-Ch2 L1

1.

2. 3. 4.

Overview of system hardware Interrupts I/O communication techniques Operating systems, objective and functions

Computer hardware instruction execution Interrupts lifecycle I/O communication techniques Introduction to operating systems Serial systems Multiprogramming Timesharing

L2 L3 L4, L5

T2-Ch3,T1-Ch2 T1Ch2 T1-Ch2 R2-Ch2

T1-Ch2 L6

5.

T1-Ch3 L7, L8

6.

Evaluation of operating systems

7.

Example systems

Example systems UNIT II Process status

L9

T1-Ch2

8.

Process description and control

Model creation termination of process Five states model PCB Process control Process threads Examples

L10

T2-Ch4, R2-Ch5 T1Ch3

GATE

9. 10. 11. 12. 13. 14. Sl. No.

Process states Process description Process control Threads Examples Revision Topics in JNTU Syllabus

L11 L12 L13, L14 L15 L16 L17 Lecture No.

T2-Ch4, R2-Ch5 T2-Ch4, R2-Ch5 T2-Ch4, R2-Ch5

GATE GATE GATE GATE

T2-Ch4, R2-Ch6 T1-Ch3

Modules and Sub modules UNIT III

Suggested Books

Remarks

30.

Principles of concurrency Mutual exclusion Software and hardware approaches Semaphores

Def of concurrency principles of concurrency Mutual Exclusion Software and hardware approaches Semaphores

L18

T2-Ch6, T1-Ch4 T1-Ch4, T2-Ch6 R2Ch6 T2-Ch6 T1-Ch4, T2-Ch6

GATE

31.

L19

32. 33.

L20 L21

34. 35.

Monitors Message passing

Monitors Readers/Writers problems UNIT IV

L22 L23

T1-Ch4, T2-Ch6 T2-Ch6, R2-Ch8 T1Ch4

Principles of deadlock 36. Deadlock preventions Deadlock detection and avoidance Dinning philosophers problem Examples systems UNIT V 15. Introduction to memory systems Main memory L28 Physical memory Loading 16. Loading programs into main memory Linking dynamics and static loading Paging, Segmentation 17. Virtual memory Virtual memory 18. 19. OS. Software Hardware and Control structures OS software examples of memory management Revision Page replacement algorithms Hardware and control structures OS software Examples of memory management Revision UNIT VI 22. Uniprocessor scheduling Scheduling algorithms Types of scheduling L39 L40,L4 1 L42 L29 L25 Dead lock prevention L24

T2-Ch7, T1-Ch5 GATE

T2-Ch7, T1-Ch5 T2-Ch6 GATE

Deadlock detection 37. Dining philosophers problem

L26 L27 T1-Ch5

38.

Example systems

T2-Ch8, R2-Ch10

T2-Ch8, R2-Ch10

L30, 31,32 L33,34 L35

T2-Ch9, R2-Ch11 GATE

T2-Ch9, R2-Ch11 T2-Ch9

GATE

L36 L37 L38

T2-Ch9 GATE

20.

21.

T1-Ch8, T2-Ch5 R2Ch8 T1-Ch8, T2-Ch5 R2Ch8 T2-Ch13, T1-Ch10

GATE

23.

Types of algorithms I/O management and disk scheduling

GATE

24.

I/O management

25. 26.

I/O devices Design issues I/O buffering

I/O devices OS design issues

L43 L44

T2-Ch12 T2-Ch12, R2-Ch15 T1-Ch10 T2-Ch13, R2-Ch15

I/O buffering Disk I/O Disk scheduling policies Examples Revision

Modules and Sub modules

27.

Disk I/O Disk scheduling polices

L45

GATE

28. 29.
Sl. No.

Examples Revision
Topics in JNTU Syllabus

L46 L47
Lecture No.

T1-Ch3

Suggested Books

Remarks

UNIT VII 39. File organization Security and file organization access File directory structures File sharing Record blocking L48 T2-Ch10, R2-Ch17 T1-Ch11 T2-Ch11, R2-Ch16 T1-Ch11 T2-Ch11, R2-Ch16 T2-Ch11, T1-Ch11 R2-Ch16 T2-Ch13, T1-Ch11 R2-Ch13 GATE

40. 41. 42.

File directories File sharing Record blocking Secondary storage management example systems

L49 L50 L51

43.

Secondary storage management UNIT VIII Security threats Protection from introduction Viruses trusted systems

L52

GATE

44. 45. 46.

Security Protection Viruses

L53 L54 L55

T2-Ch20, T1-Ch14 T2-Ch19, T1-Ch14 T2-Ch19, T1-Ch14

GATE GATE

ii.

TUTORIAL Remarks

Tutorial Unit No No

Title

Salient topics to be discussed

Problems (Q Nos.) covered from question bank

T1

Evaluation of operating

Significance of operating

system T2 I Input output communication techniques Process control Process and threads

system Concept

T3 T4

II II

Examples and description Concepts and applications Importance of concurrency Effect of concurrency Explain the techniques Problem

T5

III

Principles of concurrence

T6 T7 T8

III IV IV

Monitors and semaphores Deadlock prevention Dining philopshers problem OS software Memory management requirements Types of scheduling Disk scheduling policies File management Secondary storage management Security threats Trusted system

T9 T10

V V

Concept with examples Concept and applications

T11 T12 T13 T14

VI VI VII VII

Concepts and application Examples Concept Examples

T15 T16

VIII VIII

Concept Examples

ii. THEORY 7.4.11 STUDENT SEMINAR TOPICS 1. 2. 3. 4. 5. 6. 7. 8. Importance of operating system Process and threads in operating system Software and hard ware approaches for concurrency Deadlock and its prevettion with various techniques Memory management with examples Scheduling olgorithms and disk scheduling polies File sharing and record blocking Protection and security.

7.4.12 QUESTION BANK UNIT I 1. 2. 3. 4. i. ii. 5. i. ii. 6. Di erentiate Distributed systems from Multiprocessor systems. Explain about the various memories hierarchy. Draw and explain program flow of control without and with interrupts. (Feb 08) (Feb 08) (Nov 07)

DMA access to main memory is given higher priority than processor access to main memory. Why? Explain with an example. Explain the characteristics of Two level memories. (Apr 07) Describe the basic instruction cycle with example. What is an Interrupt? Describe the Different types of interrupts. (Apr 07, Nov 06)

Describe the Objectives and functions of Operating system. Also explain the different services provided by the operating system. (Apr 07, Feb 07) What is Multiprogramming? Explain the memory hierarchy with reference to the uses, characteristics, applications and functions. (Feb 07) Explain the Operating system as Resource Manager. A major operating system will evolve over time for a number of reasons. What are they? (Feb 07) (Feb 07)

7.

8. 9. 10. 11 12. 13. 14. 15. . 16.

Explain the dierence between the Cache and Main Memory with the help of its structure and operation. (Nov, Sep 06) What is OS? Describe the Different types of Operating systems with the examples. (Nov 06) With the help of neat block diagram, describe the computer components with an example (Nov 06)

Discuss the operating system design hierarchy with an example. (Sep 06, May 05, Nov 04) Explain the applications of windows NT Operating System. (Sep 06, May 05, Nov 04) Explain the Operating system as Resource Manager . (Sep 06) Mention the various registers and their functions udnder the follo wing wo categories i. User visible registers ii. Control and status registers (Sep 06) Describe the basic instruction cycle with example What is an Itnerrupt ? Describe the different types of interrupts (Sep 06) (Sep 06)

17. 18

19.

What are the important properites of I/O organization? Explain the I/O communication techniques with an example. With the help of neat block diagram, describe the computer components with an example. A major operating system will evolve over time for a number of reasons. What are they? (May 05) Explain the Multiprogrammed batched system with an example Describe the features of timesharing systems with an example. (May 04) (May 04)

20. 21.

22. 23

24. What is Multiprogramming? Explain the memory hierarchy with reference to the uses, characteristics, applications and functions. (Nov, May 04) 25. With the help of simple interrupt processing block diagram, explain the interrupt processing with an example. Explain 2 - level memory hierarchy and 3 - level hierarchy Differentaiate between multiuser and multi -processing system. Explain the features of UNIX/LINUX operating system Which combination of the following features will suffice to characterize an OS as a multiprogrammed OS? (i) More than one program may be laoded into main memory at the same time for execution. (ii) If a program waits for certain events such as I/O, another program is immediatley scheduled for execution. (iii) If the execution of a program terminates, another program is immediatley scheduled for e xecution. i. a ii. a and b iii. a and c iv. a, b and c (GATE 02) A processor needs software interrupt to test the interrupt system of the processor implement co -routines obtain system services which need execution of pr ivileged instructions return from subroutine (GATE 01) (May 03)

26. 27. 28. 29.

30. i. ii. iii. iv. 31.

A multi-user, multi-processing operating system cannot be implemented on hardware that does not support i. Address translation ii. DMA for disk transfer iii. At least two modes of CPU execution (privileged and non -privileged) iv. Demand paging In a resident - OS computer, which of the following systems must reside in the main memory under all situation? i. Assember ii. Linker iii. Loader iv. Compiler Which of the following is an example of a spooled device? (GATE 98) The terminal used to enter the input data for the C program being executed An output device used to print the output of a number of jobs The secondary memory device i n a virtual storage system. The swapping area on a disk used by the swapper. When an interrupt occurs, an operating system ignores the interrupt always changes state of interrupted process after processing the interrupt (GATE 97)

32.

33. i. ii. iii. iv. 34. i. ii.

iii. always resumes execution of interrupted process after processing the interrupt iv. may change state of interrupted process to blocked and schedule another process 35. A part of the system software, which under all circumstances must reside in the mai n memory, is i. text editor ii. assembler iii. linker iv. Loader v. none of the above (GATE 93) Which of the following is an example of spooled device i. the terminal used to the input data for a program being executed ii. the secondary memory device in a virtual memory system. iii. a line printer used to print the output of a number of jobs.

36.

(GATE 92)

UNIT II 1. i. ii. 2. 3. 4. 5. i. ii. 6. Describe various operations on threads. Discuss about threads synchronization. Discuss the Operating System design hierarchy with an example. What is meant by process pre-emption? Explain with examples. What is a process? Explain di erent process states. Describe various operations on threads. Discuss about threads synchronization. (Feb 08)

(Feb 08) (Feb 08) (Feb 08) (Nov 07)

Explain the various mechanisms provided by UNIX for inter process communication and synchronization in detail. (Nov 07) What is a process? Explain di erent process states. (Nov 07)

7. 8.

What the design characteristics of Message Systems are of inter process communication and synchronization? Explain about single threaded and multi threaded process models with suitablediagrams. Explain the following transitions: i. Blocked ! Blocked/Suspended. ii. Blocked/Suspended ! Ready/Suspended. iii. Ready/Suspended ! Ready. Explain the role of process control block in OS. Differentiate the following i. Process Switching vs Context Switching ii. Clock interrupt Vs I/O interrupt. (Nov 07) (Nov 07)

9. 10.

11. i. ii.

(Apr 07, Feb 07, Nov, Sept 06, May 03)

12. i. ii.

Explain the reasons for process terminations. Describe the single blocked queue and multiple blocked queues with an example. (Apr 07, Feb 07, Nov 06, May 05, 04) 13. Discuss about the following: i. user-level threads ii. Kernel-level threads iii. Multi-threadings. (Feb 07) 14. 15. i. Discuss the attributes of the process. Describe the typical elements of process control Block. Define the following Process

ii. Program iii. Process control block iv. Process Scheduling. 16. 17. 18. 19. i. ii. 20. 21. 22. 23. 24. 25. 26. 27. 28. 29 30. 31. 32. 33. 34.

(Sep 06, M ay 05, May, Nov 04,03) (May 04) (May 04) (May 03) (Nov 03)

What are preemptive and non -preemptive scheduling. Explain busy waiting and blocking wait. Describe the relationship between threads and Processes with an example. Write short notes on the following: Shortest process next. Shortest remaining time. What is meant by process preemption. Discuss briefly about user level threads Discuss briefly about Kernel level trheads Explain the multi-threadings and its importance What is swapping and what is its purpose. What is the difference between process switching and context switching What is the difference between an interrupt and a trap.

(Nov 03)

Describe the single blocked queue and multiple blocked queues with an example. Explain the reasons for process terminations. Difference between Clock interrupt Vs I/O interrupt. Explain the process State Transmission diagram with examples Discuss about pree mptive scheduling policies Explain the Highest response ratio next Write short notes on Single - Server queues with two priorities. Consider two cache organiozation : the first one is 32 kb 2 -way set associative with 32 byte block size. The second one is of the same size but direct mapped. the size of an address is 32 bits in both cases. A 2 -to-1 multiplexer has a latency of 0.6 ns while a k bit comparator has a laten cy of k/10 ns. The hit latency of the set associative organization is h 1 while that of the direct mapped one is h 2 . The value of h 1 is: i.2.4 ns ii.2.3 ns iii.1.8 ns iv.1.7 ns The value of h 2 is: i.2.4 ns ii. 2.3 ns iii.1.8 ns iv.1.7 ns

i.

ii.

(GATE 06)

35. i. ii. 36.

Which of the following actions is/are typically not performed by the operating system when switching context from process A to process B? Faster access to memory on an average Processes can be given protected address s paces (GATE 05)

if (fork()==0) { a=a+5;printf(%d,%d \ n,a,&i.;} else {a- 5;printf(%d,%d \ n,a,&i.;} Let u,v be the values printed by the parent process,and x,y be the values printed by the child process.which one of the follo wing is TRUE? i. u=x+10 ii. u=x+10 and v!=y iii. u+10=x and v=y iv. u+10=x and v!=y Consider the follo wing statements with respect to user -level threads and kernel supported threads i. context switch is faster with kernel supported threads (GATE 04) ii. for user level threads , a system call can block the entire process iii. kernel supported threads can be scheduled independently iv. user-level threads are transparent to the kernel Which of the above statements are true? a. ii,iii and iv only b. ii and iii only c. i and iii only d. i and ii only When the result of a computation depends on the speed of the processes involved there is said to be i. cycle steating ii. rare condition iii. a time lock iv. a deadlock (GATE 98) Each process Pi, i = 1 ..... 9 is coded as follo ws (GATE 97) repeat P (mutex) {critical section} v (mutex) forever The code for P10 is identical except that it uses v (mutex) in place of P (mutex ). What is the largest number of processes that can be inside the critical section at any moment. i. 1 ii. 2 iii. 3 iv. none of above

(GATE 05)

37.

38.

39.

UNIT III 1. What is a monitor? Compare it with Semaphore. Explain in detail a monitor with notify and broadcast using an example. (Feb 08) Define monitor. What are its characteristics? Write the short notes on the following Race Condition Process Interaction Explain the solution for the critical section problem for multiple processes. Explain the following LINUX Kernel concurrency mechanisms Atomic Integer Operations Atomic Bitmap Operations. (Feb 08) (Feb 08)

2. 3. i. ii. 4. 5. i. ii.

(Nov 07) (Nov 07)

6. i. ii. 7. i.

What is a semaphore? What are the various operations defined on it? What is the di erence between weak semaphore and strong semaphore? Explain.

(Nov 07)

ii.

Explain the uses of the following: (Nov 07) a. Event Object b. Mutex Object c. Semaphore Object d. Waitable timer Object. Describe about mechanism used by Windows to implement Synchronization of Critical Section objects. Bounded Waiting. What is a monitor? Compare it with semaphore. Explain in detail a monitor with signal using an example. (Nov 07) (Apr 04, May 04)

8. 9. i. ii. 10. i. ii. 11. i. ii. 12. i. ii 13.

Write the Peterson?s algorithm for the mutual exclusion problem and explain the same What is meant by semaphore? Explain with an example. (Apr 07) Explain busy waiting and blocking wait. (Apr 07, Sep 06, May 05) Is busy waiting always less efficient (in terms of using process or time) than a blocking wait? Explain Show that monitors and semaphores have equivalent functionality by Implementing a monitor using semaphores Implementing a semaphore using monitors (Feb 07, Nov 06) What is message passing? Explain the design characteristics of message systems for inter process communication and synchronization. (Feb 07) Explain in detail all the steps involved in getting a Dekkers algorithm. (Feb 07)

14. 15.

Explain the state of the process Queue for the Readers / Writers problem and get the solution to the same by using message -passing (Feb 07, Nov, Sep 06, May 05) Demonstrate that the following software approaches to mutual exclusion do not depend on elementary mutual exclusion at the memory access level: The bakery algorithm Petersons algorithm. (Nov 06) Explain in detail the message addressing and message format with an example. (Nov 06)

16. i. ii. 17. 18. 19.

What are the requirements for mutual exclusion? Explain them in detail. (Sep 06, May 05) Explain different conditons of process interation with respoect to the degree of awareness, relationship between processes, influence of processes, control problems (Sep 06) Explain the various mechanisms provided by UNIX for inter process communication and synchronization in detail. (Sep 06) What are the principles of concurrency and explain the execution of the concurrent process with a simple example. What is a monitor? Compare it with semaphore. Explain in detail a monitor with signal using an example. Three processes share 4 resources units that can be reserved and reused only one at a time. Each process needs a maximum of 2 units. Show that a deadlock can not occur. (May 04)

20.

21.

22.

23.

24.

N processes share M resource uits that can be reserved and released only one at a time. The maximum need of each process does not exceed M and the sum of all maximum needs is less than M + N. Show that a dead lock can not occur. Demonstrate that the following software approaches to mutual exclusion do not depend an elementary mutual exclusion at the memory access level. (May 04) i. The backery algorithm ii. Petersons algorithm. What design and management issues are raised by the existence of concurrency? Point out how the issues of speed independence can be addressed. (Nov 04) How mutual exclusion, hold & wait and circular wait are different from each other? Explain with the help of examples. Explain how the concurrent processe s cooperate by sharing and by communication. (May 04) What is Semaphore? Define the Binary Semaphore primitives and explain mechanism with an example How hold & wait and circular wait the different from each other? Explain wi th the help of examples. Write an algorithm to detect the occurrence of deadlocks. (May 03) What is queuing discipline? Explain with an example the way in which the message passing can be used to enforce mutual exclusion. (May 2003) Explain in detail how concurrent process come into conflict with each other when they are the competing for the use of the same resource. What are the necessary requirements for mutual exclusion? Write an algorithm to detect the occurrence of deadl ocks. Write a concurrent program using parbegin -parend and semaphores to represent the prece dence constraints of the statements S1 to S6 as shown in the fig. below Let m [0] ... m [4] be mutexes (binary semaphores) and P [0] ... P[4] be processes. Suppose each process P[i] executes the follo wing: (GATE 2000) wait (m [i ]); wait (m [(i + 1) mode 4]); ......... release (m [ i ]); release (m[(i+1) mode 4 }); This could cause i. Thrashing ii. Deadlock iii. Starvation, but not d eadlock iv. None of the above A counting semaphore was initialized to 10. The 6 P (wait) operations and 4 V (signal) operations were complete ed on this semaphore. The resulting value of the semaphore is i. 0 ii. 8 iii. 10 iv. 12 (GATE 98) A critical section is a program segment which should run in a certain specified amount of time which avoids deadlocks where shared resources are accessed which must be enclosed by a pair of semaphore op erations, P and V (GATE 96)

25.

26.

27.

28. 29.

30. i. ii. 31.

32.

33. i. ii. 34.

35.

36.

37. i. ii. iii. iv.

38.

Draw a precedence graph for the follo wing sequential code. The statements are numbered from S1 to S6 S1 read n S2 i: = 1 S3 if i > n goto next S4 a (i) : = i + 1 S5 i : = i + 1 S6 bext : Write a (i)

39.

Consider the follo wing program segment for concurrent processing using semaphore operator P and V for synchronisation. Draw the precedence graph for the statements S1 to S9 var (GATE 93) a,b,c,d,e,f,g,h,i,j,k : semaphore; being cobegin begin S1; V(i.; V(ii. end; begin P(i.; S2 V(iii.; V(d) end; gin P(iii.; S4 V(e); end; gin P(d); S5 V(f); end; gin P(e); P(f); S7; V(k) end; gin P(ii.; S3 V(g); V(h) end; gin P(g); S6 V(i); end; gin P(j); P(j); P(k); S9 end; coend end; Consider the follo wing scheme for implementing a critical section in a situation with three processes pj and pk (GATE 91) pi; repeat flag[i]:= true; while flag[j]or flag[k] do case turn of j: if flag[j] then begin flag[i]:=false; while turn!= I do skip; flag [i] : true end; k: if flag [k] then begin flag [i]:=false, while turn !=I do skip; flag[i]:= true end end critical section if turn=I then turn:=j; flag[i]:= false non-critical section until false; does the scheme ensure mutual exclusion in the critical section? briefly explain. Is there a situation in which a waiting process can never enter the critical section? If so ,explain and suggest modifications to the code to solve this problem. (GATE 90) p. Hoares monitor q. Mutual exclusion r. Principle of Locality

40.

i. ii.

41.

Match the following. i. critical region ii. Wait/signal iii. working set

iv. Deadlock 42.

s. circular wait

A computer has six tape drives, with n processes competing for them. Each process may need two drives. What is the maximum value of n for the system to be deadlock free? i. 6 ii. 5 iii. 4 iv. 3

UNIT IV 1. 2. Explain about protection technique of critical section in LINUX. (Nov 07)

What is deadlock avoidance? Explain process initiation denial and resource allocation denial in detail with example (Apr 07, Feb 07, Nov 06) Explain all the strategies involved in deadlock detection and how it is recovered. (Apr 07, Nov 06, Nov 04) Three processes share 4 resource units that can be reserved and reused only one at a time. Each process needs a maximum of 2 units. Show that a dealock cannot occu r. N processes share M units that can be reserved and released only one at a time. The maximum need of each process does not exceed M and the sum of all maximum needs is less than M+N. Show that a dead lock cannot occur. (Apr 07, Sep 06) What is dining philosophers problem? Device an algorithm to solve the problem using Semaphore. (Feb 07, May 04,03) (Feb 07, May 04,03)

3 4. i. ii.

5. 6. 7.

How mutual exclusion, hold and wait and circular wait are Different from each other? Explain with the help of examples. (Apr 07, Feb 07) Write an algorithm to detect the occurrence of deadlocks (Feb 07)

8. 9. 10. 11. 12. 13. 14. 15. 16.

How the deadlocks can be avoided? Explain with the help of necessary algorithms. (Feb 07, Nov 06, May 03) How the problem among dining philosophers can be resolved? Suggest a suitable algorithm. (Nov 06) Explain the Bankers alogorithm in detail (Sep 06)

What are the conditions that must satisfy for deadlock occurrence and explain them. (Sep 06,May 05, Nov 04) Is the deadlocks problem preventable? Justify your answer with example and diagram. (Sep 06,May 05, Nov 04) Give the conditions for deadlock and explain the methods of preventing deadlock. (Sep 06,May 05, May 04) What are the principle of deadlock? And explain in detail the two categories of resources. Consider the follo wing snaphot of a system. There are no current outstanding queued unsatisfied requests available i. Compute what each proc ess still might request and display in the coloumns labeled still needs ii. Is this system currently in a safe or unsafe moe ? Why? iii. Is this system currenly deadlocked? Why or why not? iv. which process, if any, are may become deadlocked? v. If a request from p3 arrives for (0,1,0,0), can that request be safety granted immediately? In what state would immediately grantign that whole request leave the system? Which process, if any, are may bcome deadlocked if this whole request is granted immediately? (Sep 06)

17.

What is Deadlock? Prove that an unsafe state is not deadlock state.

(May 04, 03)

18 19 20

Explain the necessary conditions for the deadlock. Explain busy waiting and blocking wait.

(May 04, 03) (May 03)

Is busy waiting always less efficient (in terms of using process or time) than a blocking wait? Explain. Express process initiatition denial and resource allocation denial in detail with example Is the deadlock problem preventable? Justify you answer with example and diagram? An operating system contains 3 user process each requiring 2 units of resource R. The mini- mum number of units of R such that no deadlocks will ever arise is (GATE 05) i. 3 ii. 5 iii. 4 iv. 6 Suppose n processes p1 pn share m identical resource units ,which can be reserved and released one at a time. The maximum resource requirement of process Pi is sp where si>0. Which one of the follo wing is a sufficient condition for ensuring that deadlock does not occur? (GATE 05) i. for all i ,si<m ii. for all i ,si<n iii. sigma i=1 to n, si<(m+n) iv. sigmai 1 to n si(m*n) Which of the following is NOT a valid deadlock prevention scheme? (GATE 2000) Release all resources before requesting a new resource Number the resources uniquely and never request a lower numbered resource than the last one requested iii. Never request a resource after releasing any resource iv. Request and all required resources be allocated before execution i. ii. A critical section is a program segment which should run in a certain specified amount of time which avoids deadlocks where shared resources are accessed which must be enclosed by a pair of semaphore operations, P and V (GATE 96)

21.

22. 23.

24.

25.

26. i. ii. iii. iv. 27.

A solution to the Dining Philosophers Problem which avoids deadlock is i. ensure that all philosophers pick up the left fork before the right fork ii. ensure that all philosophers pick up the right fork before the left fork iii. ensure that one particular philosopher picks up the left fork before the right fork, and that all other philosophers pick up the right fork before the left fork iv. none of the above (GATE 96) Consider a system having m resources of the same type. These resources are shared by 3 processes A, B and C, which have peak demands of 3,4 and 6 respectively. for what value of m deadlock will not occur? i. 7 ii. 9 iii. 10 iv. 13 v. 15 (GATE 1993)

28.

UNIT V 1. Explain about address binding for a user program and discuss multi step processing of a user program. (Feb 08) Cleary explain how, in general a virtual address generated by the CPU is translated into a physical main address.

2. i.

ii.

A process contains eight Virtual Pages in disk and is assigned a fixed allocation of four page frames in main memory. The following page trace occurs: 1, 0, 2, 2, 2, 7, 6, 7, 0, 1, 2, 0, 3, 0, 4, 5 . a. how the successive pages residing in the four frames using the LRU re- placement b. policy. Compute the hit ratio in main memory. Assume the frames are initially empty. b. for FIFO replacement policy.

(NOv 07)

3. 4. i. ii. 5.

Explain segmentation scheme for memory management. Give the segmentation hardware. Explain Paging hardware with translation look-aside bu er. How memory protection can be accomplished in a paged environment? Explain.

(Nov 07)

(Nov 07)

Explain various techniques implemented for free space management, discuss with suitable examples. (Nov 07) 6. Explain any two techniques for structuring the page table. Discuss with suitable examples. (Nov 07) 7. Explain paging scheme for memory management, discuss the paging hardware and paging model. (Nov 07) 8. Consider a memory management system with demand paging. There are there processes P1, P2, P3 which have one page of private memory each. Moreover P1and P2 are sharing an array A which fits entirely into one memory page. Similarly, P2 and P3 are sharing an array B, which fits into a memory page. i. Let all the data for the processes be located into physical memory. Draw a possible memory allocation diagram, give the page tables for the three processes. ii. Assume that process P1 gets swapped out of memory entirely. How are the page tables changing. iii. Assume that process P1 gets swapped back into memory. Give the page tables in this situation. (Apr 07, Feb 07, May 04) 9. i. Di erentiate between demand cleaning and pre-cleaning. ii. What is the di erence between a resident set and a working set? iii. A process references five pages A, B, C, D, and E, in the following order: A; C; B; E; A; B; E; A; B; C; D; E; Assume the replacement algorithm is first-in- first- out. Find the number of page transfers during this sequence of references starting with an empty main memory with three page frames. Repeat for four page frames. (Apr 07) 10. i. Discuss how thrashing can be detected by an Operating System? What can be done to alleviate this problem? (Apr 07, May 04) ii. What is the difference between simple paging and virtual memory paging? iii. Why is the principle of locality crucial to the use of virtual memory? iv. What is accomplished by page buffering?

11. i.

Discuss the dierences between a pure paging and pure segmentation virtual memory systems. What are the pros and cons of each scheme? ii. What are the three main issues of implementing a virtual memory system? iii. Comment on the relative merits of using a local versus a global page replacement policy. (Feb 07, Sep 06, May 05, 03) 12. i. Explain the process of loading programs into main memory. ii. Write in brief on the following memory management techniques comparing their relative strengths and weaknesses. a. Fixed Partitioning b. Simple Segmentation c. Virtual Memory Paging d. Dynamic Partitioning iii. Describe the Placement Algorithm. (Feb 07) 13. i. A process has 4 page frame allocated to it. Calculate the number of page faults using following page replacement algorithms for the reference string4,0,0,0,2,4,2,1,0,3,2. (Feb 07) a. MIN (OPT)

ii. 14. i.

b. FIFO c. LRU d. Clock Explain thrashing in detail.

Enumerate the reasons for allowing two or more processes to, all have access to particular region of memory. ii. In a fixed partitioning scheme, what are the advantages of using unequal size partitions? iii. What is the dierence between internal and external fragmentation? iv. What are the distinctions among logical, relative and physical addresses? (Nov 06, May 04) Write short notes on the following: Page Table structure Page Table structure Translation look-aside buffer. Segmentation. Paging.

15 i. ii. iii. iv. 16. i.

(Sep 06, May 05)

Consider a buddy system in which a particular block under the current alloacation has an address of 011011110000 a. If the block is of size 4 what is the binary address of its buddy b. If the block is of size 16, what is the binary address of its buddy ii. A virtual address in a paging system is equivalent to a pair (p, w), in which p is a page number and w is a byte number within the page. Let z be the numbr of bytes in a page. Find algebraic equation that sho ws p as function of z and w. iii. Why is the capability to relocate a process desirable? iv. Why is it not possible to enforce memory protection at compile time (Sep 06) Discuss the process of Linking using illustrations Write about Linkage Editor. Write the steps involved in Load Time Dynamic Linking. Write in brief about run time dynamic linking.

17. i. ii. iii. iv.

(Sep 06, May 05)

18. i. Explain the operation of paging and translation look -aside buffer using a neat sketc h. ii. Explain the address translation in a paging system using a neat sketch. iii. Explain using illustration typical memory management formats. (May 05) 19. i. ii. 20. i. ii. 21. i. What is Swapping? Explain the need for swapping. Explain the general structure of oper ating system control tables with an example. (May 05, 04) Define memory management. Explain in detail the requirements that memory management needs to satisfy. (May 05)

Consider a dynamic partitioning scheme. Prove that on an average t he memory contain half as many holes as segments. (May 05) ii. What are the steps involved in loading a program in memory iii. Compare and Contrast the different approaches to loading. Explain in detail about disk cache performance using frequenc y based replacement. The following equation was suggested both for cache memory and disk cache memory Ts = Tc + M * TD Generalize this equation to a memory hierarachy with N levels instead of just two levels. (May05)

22. i. ii.

23. i. Explain the operation of paging and translation look -aside buffer using a neat sketch. ii. Explain the address translation in a paging system using a neat sketch. iii. Explain using illustration typical memory management formats. (May 05) 24. i. Assume we have a 36 bit virtu al address. Each page frame in this pure paging system is 4K in size. Each page table entry is 4 bytes long. (May 04) a. What is the total size in bytes of the page table?

ii.

Assume we implement a two level paging scheme with equal number of bits representing a page directory and a page number within each page directory. Each entry i the page directory also occupies 4 bytes. a. What is the minimum amount of table space in bytes for supporting a physical addressable range of 4 MB Consider a paged logical address space (composed of 32 pages of 2 Kbytes each) mapped into a 1 Mbytes physical memory space. a. What is the format of the processors logical address. b. What is the length and width of the page table (disregarding the access rights bit). c. What is the effect on the page table if the physical memory space is reduced by half. Discuss the hardware support requirement for the inverted page table structure. How does this approach affect sharing. (May 04)

25. i.

(May 04)

ii.

26.

Describe the following: i. Virtual Memory ii. Cache Memory iii. Auxiliary Memory.

27. i. ii. 28. 29. 30 i. ii. 31 32. 33. 34.

What elements are typically found in a page table entry? Briefly define each element. What is the purpose of translation look aside buffer? (Nov 04) What is the difference between resident set management and page replacement policy? (Nov 04) Discuss in detail the alternative page fetch policies. What is the relationship between FIFO and Clock page replacement algorithm. Define pre-cleaning. (Nov 03)

(Nov 03)

Explain the operation of paging and translation look -aside buffer using a neat sketch. (May 03) Explain the address translation in a paging system using a neat sketch. Explain using illustrations t ypical memory management formats. (May 03) (May 03)

A Computer system supports 32 -bit virtual addresses as well as 32 -bit physical addresses. Since the virtual address space is of the same size as the physical address space, the operating system designers dec ide to get rid of the virtual memory entirely. which one of the following is true? i. Efficient implementation of multi -user support is no longer possible ii. The processor cache organization can be made efficient no w iii. Hardwar w support for memory ma nagement is no longer needed iv. CPU scheduling can be made efficient no w (GATE 06) 35. A CPU has a cache with block size 64 bytes. The main memory has k banks, each bank being c bytes wide. Consecutive c - bytes chunks are mapped on consecutive banks with wrap-around. All the k banks can be accessed in parallel, but two accesses to the same bank must be seralized. A cache block access may invlove multiple iterators of parallel bank accesses depending on th e amount of data obtained by accessing all the k banks in parallel. Each iteration requiresdecoding the bank numbers to be accessed in parallel and this takes k/2 ns. The latency of one bank access is 80 ns. If c = 2 and k = 24, the latency of retrieving a cache block starting at address zero from main memory is: a) 92 ns b) 104 ns c) 172 ns d) 184 ns (GATE 06) 36. A CPU generates 32 -bit virtual addresses. The is 4 kb. The processor has a translation look-aside buffer (TLB) which can hold a total of 128 page table entries and is 4 -way set associative. The minimum size of the TLB tag is: i. 11 bits ii. 13 bits iii. 15 bits iv. 20 bits (GATE 06) What is the swap space in the d isk used for (GATE 05)

37.

i. ii. iii. iv. 38. i. ii. iii. iv. 39.

saving temporary html pages saving process data storing the super block storing device drivers Increasing the RAM of a computer typically improves performance because (GATE 05) virtual memory increases Larger RAMs are faster Fewer page faults occur Fewer segmentation faults occur Consider an operating system capable of loading and executing a single sequential user process at a time. The disk head scheduling algorithm used is First c ome First Serve(FCFS) if FCFS is replaced by Shorest Seek Time First (SSTF) claimed by the vendor to give 50% better benchmark results ,what is the expected improvement in the I/o performance of user programs? (GATE 04) i. 50% ii. 40% iii. 25% iv. 0%

40

The maximum no of page frames that must be allocated to a running process in a virtual memory environment is determined by i. the instruction set architecture ii. page size iii. physical memory size iv. number of processes in memory In a system with 32 bit virtual addresses and 1 KB page size, use of one -level page t able for virtual to physical address translation is not practical because of (GATE 03) i. the large amount of internal fragmentation ii. the large amount o f external fragmentation iii. the large memory overhead in maintaining page tables iv. the large computation overhead in the translation process Suppose a process has only the following pages in its virtual address space: two contiguous code pages starting at virtual address 0x00000000, tow contiguous data pages starting at virtual address 0x00400000, and a stack page starting at virtual address 0xFFFFF000. The amount of memory required for storing the page tables of this process is (GATE 03) i. 1.5 ns ii. 2 ns iii. 16 KB iv. 20 KB

(GATE 04)

41.

42.

43. i. ii. iii. iv. 44.

The optimal page replacement algorithm will select the page that Has not been used for the longest time in the past. Will not be used for the longest time in the future. Has been used least number of times. Has been used most number of times.

(GATE 02)

Consider a virtual memory system with FIFO page replacement policy. For an arbitrary page access pattern, increasing the number of page frames in main memory will (GATE 01) i. always decrease the number of page faults ii. always increase the number of page faults iii. sometimes increase the number of page faults iv. never affect the number of page faults. Which of the following requires a device driver? i. Register ii. Cache iii. Main memory iv. Disk (GATE 01)

45.

46. i.

Consider a machine with 64 MB physical memory and a 32 - bit virtual address space. If the page size is 4 KB, what is the approximate size of the page table? (GATE 01) 16 MB ii. 8 MB iii. 2 MB iv. 24 MB

47.

Suppose the time to service a page fault is on the average 10 milliseconds, while a memory access takes 1 microsecond. Then a 99.99% hit ratio results in average memory access time of i. 1.9999 milliseconds ii. 1 millisecond (GATE 2000) iii. 9.999 microseconds iv. 1.9999 microseconds Thrashing reduces page I/O decreases the degree of multiprogramming implies excessive page I/O improves the system performance Dirty bit for a page in a page table helps avoid unnecessary writes on a paging device helps maintain LRU in format ion allows only read on a page none of the above. (GATE 97)

48. i. ii. iii. iv. 49. i. ii. iii. iv. 50.

(GATE 97)

A 1000 Kbyte memory is managed using variable pa rtitions but to compaction. It currently has two partitions of sizes 200 Kbytes and 260 Kbytes respectively. The smallest allocation request in Kbytes that could be denied is for (GATE 96) i. 151 ii. 181 iii. 231 d. 541 In a paged segmented scheme o f memory management, the segment table itself must have a page table because i. the segment table is often too large to fit in one page ii. each segment is spread over a number of pages iii. segment tables point to page table and not to t he physical locations of the segment iv. the processors description base register points to a page table. In a virtual memory system the address space specified by the address lines of the CUP must be .... than the physical memory size and ..... th an the secondary storage size. (GATE 95) i. smaller, smaller ii. smaller, larger iii. larger, smaller iv. larger, larger The address sequence generated by tracing a particular program executing in a pure demand paging system with 100 records per page with 1 free main memory frame is recorded as follo ws. What is the number of page faults? (GATE 95) 0100, 0200, 0430, 0499, 0510, 0530, 0560, 0120, 0220, 0240, 0260, 0320, 0370 i. 13 ii. 8 iii. 7 iv. 10 A computer installation has 1000 k of main memory. The jobs arrive and finish in the following sequence (GATE 95) Job 1 requiring 200 k arrives Job 2 requiring 350 k arrives Job 3 requiring 300 k arrives Job 1 Finishes Job 4 requiring 120 k arrives Job 5 requiring 150 k arrives Job 6 requiring 80 k arrives Draw the memory allocation table using Best Fit and First fit algorithms. Which algorithm performs better for this sequence?

51.

52.

53.

54.

i. ii. 55.

A memory page containing a heavily used variable that was initialized v ery early and is in constant use is removed when i. LRU page replacement algorithm is used ii. FIFO page replacement algorithm is used iii. LFU page replacement algorithm is used iv. None of the above.

56.

In the three-level memory hierarchy shown in the following table, pi denotes the probability that an access request will refer to Mi (GATE 93) Hierarchy Access Probability of Page Transfer Level (Mi) Time (ti) access (pi) time (Ti) M1 10 - 6 0.99000 0.001 sec M2 10 - 5 0.00998 0.1 sec M3 10 - 4 0.00002 The following page addresses, in the given sequence, were generated by a program: 1 2 3 41 3 5 2 1 5 4 3 2 3 (GATE 93) This program is run on a demand paged virtual memory system, with main memory size equal to 4 pages. Indicate the page references for which page faults occur for the following page replacement algorithms: i. LRU ii. FIFO Assume that the main memory is empty initially Match the followi ng. Buddy system p. Run-time type specification Interpretation q. segmentation Pointer type r. Memory allocation virtual memory s. Garbage collection Under paged memory management scheme ,simple l ock and key memory protection arrangement may still be required if the processors donot have address mapping hard ware. (GATE 90)

50.

51 i. ii. iii. iv. 52.

(GATE 91

UNIT VI 1. i. Discuss about N- step- SCAN policy for disk scheduling. ii. Explain how double bu ering improves the performance than a single bu er for I/O. iii. Di erentiate between logical I/O and device I/O. 2. i. ii. 3. i. ii. 4. i. ii. 5. 6. Explain about the key scheduling criteria. Give a detail note on short-term scheduling. (Nov 07)

(Nov 07)

What are preemptive and non -preemptive scheduling policies? Describe non-preemptive scheduling policies (Apr 07, Feb 07, Nov 06, Nov, May 04) Discuss about various criteria used for short-term scheduling Discuss about fair share scheduling method Describe about various disk performance parameters? (Apr 07, Feb 07, Nov 06

(Nov 06)

We noted that successive requests are likely to be from the same cylinder. what does this imply about the expected performance of the FCFS and SSTF disk scheduling algorithms. (Nov 06) Explain in detail about disk cache performance using frequency based replacement. The following equation was suggested both for cache memory and disk cache memory Ts = Tc + M * TD Generalize this equation to a memory hierarachy with N levels instead of just two levels

7. i. ii.

(Nov 06)

8. 9. 10.

What are the criteria based on which scheduling policies are evaluated. (Sep 06, May 03) Describe round robbin and feedback scheduling policies. (Sep 06, May 03)

Which type of process is generally favoured by a multi -level feed back queuing scheduler, a processor bound process or an I/O bound process? Briefly explain why?

11.

Consider a variation of round robin that we will call priority round -robin. In priority round-robin each process has a priority in the range of 1 to 10. When a process is given a time slice the length of quantum is basic constant (say 50ms) times the priority of the job. Compare this system with an ordinary priority system. (Sep 06, May 05) Write short notes on Random disk scheduling Write short notes on the following Priority disk scheduling Disk Cache. Discuss about direct memory access. With neat diagram exp lain I/O organization model. Describe various short term scheduling policies. (Nov 04, May 03)

12. 13. i. ii. 14. 15. 16. 17.

(Nov 04, May 03) (Nov 04) (Nov 04) (Nov 04)

What are the important properties of I/O organization? Explain the I/O communication techniques with an example Differentiate be tween DMA Vs Interrupt driven I/O Differentiate between programmed I/O Vs Memory Mapped I/O. What are preemtive and non -preemptive scheduling. Discuss about preemptive scheduling policies. Explain the applications of Windo ws NT Operating System. (Nov 03) (Nov 03) (May 03) (May 03) (May 03)

18. 19. 20. 21. 22. 23.

Consider three CPU -intensive processes, which require 10, 20 and 30 time units and arrive at times 0, 2 and 6, respectively. Ho w many context switches are needed if the operating syste m implements a shortest remaining time first scheduling algorithm? Do not count the context switches at time zero and at the end. i. 1 ii. 2 iii. 3 iv. 4 Consider three processes (process id 0, 1, 2 respectively) w ith compute time burts 2, 4 and 8 time units. All processes arrive at time zero. Consider the longest remaining time first (LRTF) scheduling algorithm. In LRTF ties are broken by giving priorty to the process to the lowest process id. The average turnaroun d time is i. 13 units ii. 14 units iii. 15 units iv. 16 units (GATE 06) Consider three processes, all ariving at time zero, with total execution time of 10, 20 and 30 units respectively. Each process spends the first 20% of exe cution time doing I/O, the mnext 70% of the time doing computation, and the last 10% of time doing I/O again. The opeerating system uses a shortest remaining compute time first scheduling alogarithm and schedules a new process either when the running proce ss gets blocked on I/O or when the running process finishes its compute burts assume that all I/O operations can be overlapped as much as possible for what % of time does the CPU remain idle? i. 0% ii. 10.6% iii. 30.0% iv. 89.4% (GATE 06) Normally user programs are prevented from handling I/o directly by I/O instructions in them .For CPU s having explicit I/O instructions ,such I/O protection is ensured by having the I/O instructions privileged. In a CPU with memory mapped I/O there is no explicit I/O instruction.which one of the following is true for a CPU with memory mapped I/O? (GATE 05) i. I/O protection is ensured by operating system routines ii. I/O protection is ensured by a hard ware trap iii. I/O protection is ensured during system configuration

(GATE 06)

24.

25.

26.

iv. I/O protection is not possible 27. Consider the follo wing set of processes, with the arrival times and the CPU burst times given in milliseconds. Process Arrival time Burst time P1 0 5 P2 1 3 P3 2 3 P4 4 1 A uni-processor computer system only has two processes, both of which alternate 10ms CPU bursts ith 90 ms I/O bursts. Both the processes were created at nearly the same time. The I/ O of both processes can proceed in parallel. Which of the following scheduling strategies will result in the least CPU utilization (over a long period of time) for this system. (GATE 03) i. First come first served scheduling ii. Shortest remaining time first scheduling iii. Static priority scheduling with different priorities for the two processes iv. Round robin scheduling with a time quantum of 5 ms. Which of the following scheduling algorithms is non -preemptive? (GATE 02) i. Round Robin ii. First -in First - Out iii. Multilevel Queue Scheduling iv. Multilevel Queue Scheduling with Feedback To evaluate an expression without any embedded function calls One stack is enough Two stacks are needed As many stacks as the h eight of the expression tree are needed A Turing machine is needed in the general case. (GATE 02)

28.

29.

30. i. ii. iii. iv. 31.

Consider a set of n tasks with known runtimes r1, r2... rn to be run on a uniprocessor machine. Which of the following processor scheduling algorithms will r esult in the maximum throughput? i. Round-Robin ii. Shortest-Job-First (GATE 01) iii. Highest-Response-Ratio-Next iv. First -come-first-served Listed belo w are some operating system abstractions (in the left column) and the hard ware compo nents (in the right column)? (GATE 99) i. Thread 1. Interrupt ii. Virtual address space 2. Memory iii. File system 3. CPU iv. Signal 4. Disk 1. (A)-2, (B) -4, (C)-3, (D)-1 2. (A) - 1, (B)-2, (C)-3, (D)-4 3. (A)-3, (B)-2, (C)-4, (D)-1 4. (A)-4, (B)-1, (C)-2, (D)-3. Which of the following disk scheduling strategies is likely to give the best through put? i. Farthest cylinder next ii. Nearest cylinder next iii. First come first served iv. Elevator algorithm. Raid configurations of disks are used to provide i. Fault - tolerance ii. High speed iii. High data density iv. None of the above (GATE 99)

32.

33.

34.

35.

Calculate the total time required to read 35 sectors on a 2 sided floppy disk. Assume that each track has 8 sectors and t he track to track step time is 8 milliseconds. The first sector to be read is sector 3 on track 10. Assume that the disketter is soft sectored and the controller has a 1 sector buffer. The diskette spins at 300 RPM and initially, the head is on trac k 10. (GATE 98)

36. i. ii. iii. iv.

The correct matching for the follo wing pairs is DMA I/O 1. High speed RAM Cache 2. Disk Interrupt I/O 3. Printer Condition Code Register 4. ALU a. A- 4, B - 3, C-1, D-2 b. c. A-4, B-3, C-2, D-1 d. I/O redirection implies changing the name of a file can be employed to use an existing file as input file for a program implies connection2 programs through a pipe none of the above.

(GATE 97)

A-2, B-1, C-3, D-4. A-2, B-3, C-4, D-1 (GATE 97)

37. i. ii. iii. iv. 38.

The sequence .. is an optimal non preemptive scheduling sequence for the following jobs which leaves the CPU idle for .... unit (s) of time. (GATE 96) Job Arrival Time Burst Time 1 0.0 9 2 0.6 5 3 1.0 1 i. {3,2,1},1 ii. {2, 13}, 0 iii. {3,2,1}, 0 d. {1,2,3}, 5 Four jobs to be executed on a single processor system arrive at time 0+ in the order A,B,C,D. Their burst CPU time requirements are 4,1,8 1 time units respectively. The completion time of a A under round robin scheduling with time slice of one time unmit is (GATE 96) i. 10 ii. 4 iii. 8 iv. 9 Which scheduling policy is most suitable for a time -shared operating system? (GATE 95) i. Shortest Job First ii. Round Robin iii. First Come First Serve iv. Elevator Assume that the following jobs are the be executed on a single processor system (GATE 93) Job Id CPU Burst time p 4 q 1 r 8 s 1 t 2 The jobs are assumed to have arrived at time 0+ and in the order p,q,r,s,t. Calculate the departure time (completion time) for job p if scheduling is round robin with time slice 1. i. 4 ii. 10 iii. 11 iv. 12 v. None of the above The hi ghest response ratio next scheduling policy favours jobs,but it also limits the waiting time of jobs.

39.

40.

41.

42.

UNIT VII 1. i. ii. 2. i. ii. Explain file system software architecture. What are the important criteria in choosing a file organization. (Apr 07, Sep 06, May 05,03) Write about Free space management Reliability of a file allocation

(Apr 07, Sep 06, May 04)

3. i. What do you understand by a file directory? ii. Explain briefly the information elements of a file directory iii. Explain what is tree-structured directory?

(Apr 07, Feb 07, Nov 06, 04)

4. i. ii.

What are the various types of operations that may be performed on the directory. What are the various access rights that can be assigned to a particular user for a particular file? iii. Explain different methods of record blocking. (Sep 06, May 05, Nov 03) Explain in detail the four terms field, record file and database with respect to files List the objectives and the requirements for a file managemetn system (Sep 06) What are preallocation, dynamic allocation, portion size w.r.t secondary storage management? Describe various file allocation methods. (Sep 06, May 05, 04) Explain the file and sequential file organization. Write short notes on: Sequential file Indexed file Indexed sequential file Direct file. Explain user -oriented access control. Explain file system software architecture Explain the functions of a file management system with a diagram How resources of a computer system protected? Explain data-oriented access control. (May 05, Nov 03) (Mar 05, 03)

5. i. ii. 6. i. ii. 7. 8. i. ii. iii. iv. 9. 10. 11. 12. 13. 14. 15. 16. 17.

(May 05, Nov 03) (May 05, 04, Nov 03) (May 05, 04) (May 05, 04) (May 05, Nov 03)

Explain in detail the four terms field, record, file and database with respect to files. (Nov 04) List the objectives and the requirements for a file management system. (Nov 04)

What are the various types of operations that may be performed on the directory. (May 04) What are the various access rights that can be assigned to a particular user for a particular file? (May 04) Explain different methods of record blocking. (May 04) Explain briefly the file organization in UNIX system V. What are the important criteria in choosing a file organization Using a larger block size in a fixed block size file system leads to better disk throughput but poorer disk space utilization better disk throughpu t and better disk space utilization poorer disk throughput but better disk space utilization poorer disk throughput and poorer disk space utilization (Nov 03) (Nov 03) (GATE 03)

18. 19. 20. 21. i. ii. iii. iv. 22.

In the index allocation scheme of blocks to a file, the maximum possible size of the file depends on i. the size of the blocks, and the size of the address of the blocks. (GATE 02) ii. the number of blocks used for the index, and the size of the blocks. iii. the size of the blocks, the number of blocks used for the index, and the size of t he address of the blocks. iv. None of the above.

23. i. ii. iii. iv. 24.

Which of the following is an example of spooled device? A line printer used to print the output of a number of jobs A terminal used to enter input data to a running program. A secondary storage device in a virtual memory system A graphic display device.

(GATE 96)

The correct matching of the follo wing pairs is A. Activation record 1. Linking loader B. Location counter 2. Garbage collection C. Reference counts 3. Subroutine call D. Address relocation 4. Assembler i. A-3, B-4, C-1, D-2 ii. A-4, B-3, C-1, D-2 iii. A-4, B-3, C-2, D-1 d. A-3, B-4, C-2, D-1

(GATE 96)

25.

For the daisy chain scheme of connecting I/I devices, which of the following statements is true? i. It gives non-uniform priority to various devices. (GATE 96) ii. It gives uniform priority to all devices. iii. It is only useful for connecting slo w devices to a processor device. iv. It requires a separate interrupt pin on the processor for each device. If the overhead for formatting a disk is 96 bytes for 4000 byte sectormz (GATE 95) Computer the unformatted capacity of the disk for the follo wing parameters: Number diameter of the disk : 8 Outer diameter of the disk : 12 cm Inner diameter of the disk : 4 cm Inter track space : 0.1 mm Number of sectors per track : 20 If the disk in (i) is rotating at 3600 rpm, determine the effective data transfer rate which is defined as the number of bytes transferred per second between disk and memory. The head of a moving head disk with 100 tracks numbered 0 to 99 is currently serving a request at rack 55. If the queue of requests kept in FIFO order is (GATE 95) 10, 70, 75, 26, 65 which of the two disk scheduling algorithms FCFS (F irst Come first Served) and SSTF (Shortest Seek time First) will require less head movement? Find the total head movement for each of the algorithms. The root directory of a disk should be placed at a fixed address in main memory at a fixed location on the disk anywhere on the disk at a fix location on the system disk anywhere on the system disk. (GATE 93)

26. i.

ii.

27.

28. i. ii. iii. iv. v. 29.

An ISAM (index sequential) file consists of records of size 64 bytes each, including key field of size 14 bytes. An address of a disk block takes 2 bytes. If the disk block size is 512 bytes and there are 16 K records, compute the size of the data and index areas in terms of number of blocks. How many levels of tree do you have for the index? (GATE 93) Write short answers to the following: (GATE 92) Which of the following macros can put a macro assembler into an infinite loop? .MACRI M1, X . MACRO M2,X ..IF EQ, X .IF EQ, X M1 X +1M2 X .ENDC .ENDC .IF NE, X .IF NE,X WORD X .WORD X + 1

30.

.END C .ENDC .ENDM .ENDM Give an example of a call that does so. 31. A certain moving arm disk storage, with one head, has the follo wing specifications. Number of tracks / recording surface = 200 (GATE 92) Disk rotation speed = 2400 rpm Track storage capacity = 62 ,500 bits The average latency of this device is P msec and the data transfer rate is Q bits / sec. Write the value of P and Q

UNIT VIII 1. i. Discuss the three options available in Windows 2000 for requesting access. ii. Describe the generic access of Windows 2000. iii. How is the AES expected to be an improvement over triple DES? 2. i. ii. 3. 4. i. ii. 5. i. ii. iii. iv. 6. i. ii. 7. 8. 9. 10. What are the various classes of intruders? Discuss about intrusion techniques.

(Feb 08)

(Apr 07)

What do you understand by Trusted systems? Draw a figure of reference monitor concept and explain. Write notes on intrusion detection password protection (Apr 07, Feb 07, Sep 06) Write short notes on : Viruses Worms Logic bomb Trap door Write short notes on: Trojan Horse defense Trojan horses (Sep 06, May 05) How resources of a computer system protected? Explain user -oriented access control Explain data oriented access control (Sep 06) (Sep 06) (Sep 06)

(Sep 06, May 05,May, Nov 03)

What do you understand by Trusted systems? Draw a figure of reference monitor concept and explain. Discuss about security implementati on by pass-word protection. Who are the various classes of intruders. Discuss about intrusion techniques. Explain the nature of viruses. Discuss about various types of viruses. Describe the anti -virus approaches. What are the security requirements of a computer and network. Explain different types of the threats (May 03) (Nov, May 04) (Nov, May 04) (May 04) (May 04) (May 04) (May 03) (May 03)

11. 12. 13. 14. 15. 16. 17. 18.

19. 20. 21. 22. 23. 24.

Explain the computer system assets. Draw a figure of reference monitor concept and explain What is security? Ho w it is achieved in todays OS What is protection? Explain in terms of OS Explain the UNIX operating security Define different techniques to overcome from security proble ms

(May 03)