Amber Open Source Project Amber Project User Guide May 2013

Amber

Amber Project User Guide

May 2013

Table of Contents
1 2 Amber Project ............................................................................................................................................................
1.1 1.2 2.1 2.2 2.3 2.4 2.) 2.$ 2.' Project Directory Structure ........................................................................................................... Amber FPGA System .......................................................................................................................... Insta in! t"e Amber #roject ......................................................................................................... Insta in! t"e %om#i er ........................................................................................................................ &unnin! Simu ations ............................................................................................................................. Simu ation out#ut (i es ........................................................................................................................ *ard+are ,ests ........................................................................................................................................... % Pro!rams ...................................................................................................................................................... -inu. ..........................................................................................................................................................................

3
3 4

Verilog simulations ..........................................................................................................................................

6
$ $ ' 10 12 14 1$

3 # *

FPGA S nt!esis ..................................................................................................................................................... $sing %oot&'oa(er ...........................................................................................................................................

4.1 4.2 Insta and con(i!ure Minicom ................................................................................................... %on(i!ure t"e FPGA ..............................................................................................................................

1" 2)
20 21

'icense ....................................................................................................................................................................................

22

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Amber Project User Guide

May 2013

Amber Project
The Amber project is a complete processor system implemented on the Xilinx Spartan-6 SP605 FPGA development board The project is hosted on opencores or! The project provides a complete hard"are and so#t"are development system abo$nt the Amber processor core A n$mber o# applications% "ith & so$rce code% are provided as examples o# "hat the systme can be $sed #or The recommended system #or the project is the Xilinx SP605 development board% a P& r$nnin! &ent'S 6 x% the Xilinx (S) *+ 5 tool chain ,#ree -ebpac. version/% and the &ode Sorcery G01 toolchain #or A23 processors All o# these elements are #ree except #or the act$al development board "hich costs aro$nd 4500

1+1

Project ,irector Structure

The #ollo"in! table describes the directories and s$b-directories located $nder 4A35)265AS)

Table 1

Project directory structure

,irector doc "+ "+1(#!a "+1(#!a1bin "+1(#!a1bit(i es "+1(#!a1 o! "+1(#!a1+or2 ,escription %ontains a #roject documentation. %ontains a /eri o! source (i es0 simu ations and synt"esis scri#ts0 and "ard+are test source (i es. Fi es re atin! to FPGA synt"esis. %ontains t"e FPGA synt"esis ma2e(i e and su##ortin! scri#ts. ,"is directory is created durin! t"e FPGA synt"sis #rocess. It is used to store t"e (ina bit(i e !enerated at t"e end o( t"e FPGA synt"eis #rocess. ,"is directory is created durin! t"e FPGA synt"sis #rocess. It is used to store o! (i es (or eac" ste# o( t"e FPGA synt"esis #rocess. ,"is directory is created durin! t"e FPGA synt"sis #rocess. It is used to store tem#orary (i es created durin! t"e FPGA synt"sis #rocess. ,"ese (i es !et erased +"en a ne+ synt"ess run is started. 3"ere tests are run (rom. ,"e 4i in. iSim /eri o! simu ator +or2 directory0 +a5e dum# and any ot"er simu ation out#ut (i es !o in "ere. *o ds a set o( "ard+are tests +ritten in assemb y. ,"ese tests (ocus on 5eri(yin! t"e correct o#eration o( t"e instruction set. I( any modi(ications are made to t"e Amber core it is im#ortant t"at t"ese tests sti #ass. *o ds scri#ts used to run /eri o! simu ations. /eri o! source (i es. Amber 23 core /eri o! source (i es. Amber 2) core /eri o! source (i es. ,"e 6t"ernet MA% /eri o! source (i es. ,"ese (i es come (rom t"e 7#encores 6t"mac #roject and are re#roduced "ere (or con5enience. *ard+are ibary /eri o! (i es inc udin! memory mode s. ,"e Amber #roject #ro5ides a sim# e !eneric ibrary t"at is norma y used (or simu ations. It a so #ro5ides some +ra##ers (or 4i in. ibrary e ements. FPGA system /eri o! source (i es. ,estbenc" /eri o! (i es. 4i in. S#artan9$ DD&3 contro er /eri o! (i es !o in "ere. ,"ese are not #ro5ided +it" t"e #roject (or co#yri!"t reasons. ,"ey are needed to im# ement t"e Amber system on a S#artan9$ de5e o#ment board and must be !enerated in 4i in. %ore!en. 4i in. /irte.9$ DD&3 contro er /eri o! (i es !o in "ere. ,"ese are not #ro5ided +it" t"e

"+1isim "+1tests

"+1too s "+15 o! "+15 o!1amber23 "+15 o!1amber2) "+15 o!1et"mac "+15 o!1 ib

"+15 o!1system "+15 o!1tb "+15 o!1.s$8ddr3

"+15 o!1.5$8ddr3

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Amber
,irector

Amber Project User Guide

,escription

May 2013

#roject (or co#yri!"t reasons. ,"ey are needed to im# ement t"e Amber system on a /irte.9$ de5e o#ment board and must be !enerated in 4i in. %ore!en. s+ s+1boot9 oader9seria s+1boot9 oader9et"mac %ontains % source (i es (or a## ications t"at run on t"e Amber system0 as +e as some uti ities t"at aid in debu!!in! t"e system. %0 assemb y sources and a ma2e(i e (or t"e seria 9#ort boot9 oader a## ication. %0 assemb y sources and a ma2e(i e (or t"e et"ernet9#ort boot9 oader a## ication. ,"is a## ication su##orts te net (or contro and status0 and t(t# (or u# oadin! e ( e.ecutab e (i es. %0 assemb y source and a ma2e(i e (or a sim# e stand9a one a## ication e.am# e. %ommon %0 assemb y and ma2e(i e inc ude (i es. %0 assemb y sources and a ma2e(i e to bui d t"e object t"at com#rise a 5ery sma and imited stand9a one re# acement (or t"e ibc ibrary. S"e scri#ts and % source (i es (or com#i e and debu! uti ities. %ontains t"e .mem and .dis (i es (or t"e 5m inu. simu ation.

s+1"e o9+or d s+1inc ude s+1mini9 ibc s+1too s s+15m inu.

1+2

Amber FPGA S stem

The FPGA system incl$ded "ith the Amber project is a complete embedded processor system "hich incl$ded all peripherals needed to r$n 7in$x% incl$din! 1A2T% timers and an )thernet ,3((/ port The #ollo"in! dia!ram sho"s the entire system

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Amber Project User Guide

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Figure 1 - mber !PG "#stem

s#stem.v ir: (ir: interru%t&controller.v Primary interru#t contro er

a2'&core.v Amber 2. #rocessor core

-.. 1thernet ./!

eth&to%.v ;101100 6t"ernet MA%

timer&module.v %on(i!urab e timers

+is"bone8arbiter.5

boot&mem.v <2; embedded S&AM = contains boot oader code uart.v UA&, 0 Statica y con(i!urab e sim# e UA&, uart.v UA&, 1 Statica y con(i!urab e sim# e UA&,

test&module.v ,est and debu! re!isters

U R0 ./!

(b&'s)&ddr3&brid*e.v

U R0 ./!

3is"bone to 4i in. S#artan9$ DD&3 contro er brid!e

Instantiates P-- and reset !eneration o!ic

cloc+s&resets.v

mcb&ddr3.v

4i in. S#artan9$ DD&3 contro er

,,R3 ",R ./!

All the 8erilo! so$rce code "as speci#ially developed #or this project "ith the exception o# the #ollo"in! mod$les9 ddr3.v The Xilinx Spartan-6 ::2; controller "as !enerated by the Xilinx &ore!en tool The #iles are not incl$ded "ith the project #or copyri!ht reasons (t is $p to the $ser to optain the (S) so#t"are #rom Xilinx and !enerate the correct memory controller 0ote that -ishbone brid!e mod$les are incl$ded that s$pport both the Xilinx Spartan-6 ::2; controller and the 8irtex-6 controller eth_top.v This mod$le is #rom the 'pencores )thernet 3A& *0<*00 3bps project The 8erilo! code is incl$ded #or convenience (t has not been modi#ied% except to provide a memory mod$le #or the Spartan-6 FPGA

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Amber Project User Guide

May 2013

2
2+1

Verilog simulations
-nstalling t!e Amber project
(# yo$ have not already done so% yo$ need to do"nload the Amber project #rom 'pencores or! The Amber project incl$des all the 8erilo! so$rce #iles% tests "ritten in assembly% a boot loader application "ritten in & and scripts to compile% sim$late and synthesi=e the code >o$ can either do"nload a tar != #ile #rom the 'pencores "ebsite or better still% connect to the 'pencores S$bversion server to do"nload the project This can be done on a 7in$x P& as #ollo"s9
$ mkdir /<your amber install path>/ $ cd /<your amber install path>/ $ svn --username <your opencores account name> --password <your opencores password> \ co http://opencores.org/ocsvn/amber/amber/trunk

2+2

-nstalling t!e Compiler

Tests need to be compiled be#ore yo$ can r$n sim$lations >o$ need to install a G01 cross-compiler to do this The easiest "ay to install the G01 tool chain is to do"nload a ready made pac.a!e &ode So$rcery provides a #ree one To do"nload the &ode So$rcery pac.a!e% !o to this pa!e "tt#>11+++.codesourcery.com1s!##1 ite1arm >o$ need to re!ister and "ill be sent an email to access the do"nload area Select the GNU/Linux version and then the IA32 GNU/Linux (nstaller 'nce the pac.a!e is installed% add the #ollo"in! to yo$r bashrc #ile% "here the PAT? is set to "here yo$ install the &ode So$rcery G01 pac.a!e
# hange /pro!/amber to where you saved the amber package on your system e"port #$%&'(%#)&*/<your amber install path>/trunk # hange /opt/)ourcery to where the package is installed on your system +#,-*/<your code sourcery install path>/bin:$.+#,-/ # #$%&'( '0)),001 is the name added to the start o2 each 345 tool in # the ode )ourcery bin directory. ,his variable is used in various make2iles to set # the correct tool to compile code 2or the #mber core e"port #$%&'( '0)),001*arm-none-linu"-gnueabi # 6ilin" 7)& installation directory # ,his should be con2igured 2or you when you install 7)&. # %ut check that is has the correct value # 7t is used in the run script to locate the 6ilin" library elements. e"port 671746*/opt/6ilin"/89.:/7)&

2+2+1 G.$ Tools $sage

(t@s important to remember to $se the correct s"itches "ith the G01 tools to restrict the (SA to the set o# instr$ctions s$pported by the Amber A core The s"itches are already set in the ma.e#iles incl$ded "ith the Amber A core ?ere are the s"itches to $se "ith !cc ,arm-none-lin$x-!n$eabi-!cc/9
-march*armv;a -mno-thumb-interwork

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These s"itches speci#y the correct version o# the (SA% and tell the compiler not to create bx instr$ctions ?ere is the s"itch to $se "ith the G01 lin.er% arm-nonelin$x-!n$eabi-ld9
--2i"-v9b"

This s"itch converts any bx instr$ctions ,"hich are not s$pported/ to @mov pc% lr@ ?ere is an example $sa!e #rom the boot-loader ma.e process9
arm-none-linu"-gnueabi-gcc -c -0s -march*armv;a -mno-thumb-interwork -22reestanding -7../include -c -o boot-loader.o boot-loader.c arm-none-linu"-gnueabi-gcc -7../include -c -o start.o start.) arm-none-linu"-gnueabi-gcc -c -0s -march*armv;a -mno-thumb-interwork -22reestanding -7../include -c -o crc8<.o crc8<.c arm-none-linu"-gnueabi-gcc -c -0s -march*armv;a -mno-thumb-interwork -22reestanding -7../include -c -o "modem.o "modem.c arm-none-linu"-gnueabi-gcc -c -0s -march*armv;a -mno-thumb-interwork -22reestanding -7../include -c -o el2splitter.o el2splitter.c arm-none-linu"-gnueabi-ld -%static -$ap boot-loader.map --strip-debug --2i"-v9b" -o bootloader.el2 -, sections.lds boot-loader.o start.o crc8<.o "modem.o el2splitter.o ../mini-libc/print2.o ../mini-libc/libc(asm.o ../mini-libc/memcpy.o arm-none-linu"-gnueabi-ob!copy -' .comment -' .note boot-loader.el2 ../tools/amber-el2splitter boot-loader.el2 > boot-loader.mem ../tools/amber-memparams.sh boot-loader.mem boot-loader(memparams.v arm-none-linu"-gnueabi-ob!dump - -) -&1 boot-loader.el2 > boot-loader.dis

A #$ll list o# compile s"itches #or !cc can be #o$nd here9 "tt#>11!cc.!nu.or!1on inedocs1!cc94.).21!cc1A&M97#tions."tm ?A&M97#tions And #or ld here9 "tt#>11source+are.or!1binuti s1docs92.211 d1A&M."tm ?A&M

2+3

/unning Simulations
>o$ sho$ld be able to $se any 8erilo!-A00* compatible sim$lator to r$n sim$lations The project comes "ith r$n scripts and project #iles #or the #ree Xilinx -ebpac. (Sim *+ 5 sim$lator )xample $sa!eB

$ cd $#$%&'(%#)&/hw/isim $ ./run.sh hello-world ,est hello-world= type 9 make -s - ../mini-libc $74()7>&*8 arm-none-linu"-gnueabi-gcc -c -0s -march*armv;a -mno-thumb-interwork -22reestanding -7../include -c -o boot-loader-serial.o boot-loader-serial.c arm-none-linu"-gnueabi-ld -%static -$ap boot-loader-serial.map --strip-debug --2i"v9b" -o boot-loader-serial.el2 -, sections.lds boot-loader-serial.o start.o crc8<.o "modem.o el2splitter.o ../mini-libc/print2.o ../mini-libc/libc(asm.o ../minilibc/memcpy.o arm-none-linu"-gnueabi-ob!copy -' .comment -' .note boot-loader-serial.el2 ../tools/amber-el2splitter boot-loader-serial.el2 > boot-loader-serial.mem ../tools/amber-memparams?;.sh boot-loader-serial.mem boot-loader-serial(memparams?;.v ../tools/amber-memparams8;@.sh boot-loader-serial.mem boot-loaderserial(memparams8;@.v arm-none-linu"-gnueabi-ob!dump - -) -&1 boot-loader-serial.el2 > boot-loaderserial.dis ../tools/check(mem(siAe.sh boot-loader-serial.mem BCDDDD;DB make -s - ../mini-libc $74()7>&*8 'unning: /tools/6ilin"/89.:/7)&(E)/7)&/bin/lin/unwrapped/2use tb -o amber-test.e"e -pr! amber-isim.pr! -d %00,($&$(F71&*B../../sw/boot-loader-serial/boot-loaderserial.memB -d %00,($&$(+#'#$)(F71&*B../../sw/boot-loader-serial/boot-loaderserial(memparams?;.vB -d $#74($&$(F71&*B../../sw/hello-world/hello-world.memB -d #$%&'(103(F71&*Btests.logB -d #$%&'(,&),(4#$&*Bhello-worldB -d #$%&'()7$( ,'1*9 -d #$%&'(,7$&05,*D -d #$%&'(10#E($#74($&$ -incremental -i ../vlog/lib -i ../vlog/system

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-i ../vlog/amber;? -i ../vlog/amber;: -i ../vlog/tb 7)im +.:@2 Gsignature D"2bcDDdaaH 4umber o2 +5s detected in this system: 9 ,urning on mult-threading= number o2 parallel sub-compilation !obs: @ Eetermining compilation order o2 -E1 2iles #nalyAing Ierilog 2ile B../vlog/system/boot(mem?;.vB into library work #nalyAing Ierilog 2ile B../vlog/system/boot(mem8;@.vB into library work #nalyAing Ierilog 2ile B../vlog/system/clocks(resets.vB into library work #nalyAing Ierilog 2ile B../vlog/system/interrupt(controller.vB into library work #nalyAing Ierilog 2ile B../vlog/system/system.vB into library work #nalyAing Ierilog 2ile B../vlog/system/test(module.vB into library work #nalyAing Ierilog 2ile B../vlog/system/timer(module.vB into library work #nalyAing Ierilog 2ile B../vlog/system/uart.vB into library work #nalyAing Ierilog 2ile B../vlog/system/wb("s<(ddr?(bridge.vB into library work #nalyAing Ierilog 2ile B../vlog/system/wishbone(arbiter.vB into library work #nalyAing Ierilog 2ile B../vlog/system/a2i2o.vB into library work #nalyAing Ierilog 2ile B../vlog/system/ddr?(a2i2o.vB into library work #nalyAing Ierilog 2ile B../vlog/system/ethmac(wb.vB into library work #nalyAing Ierilog 2ile B../vlog/system/main(mem.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(clockgen.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(crc.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(2i2o.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(maccontrol.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(macstatus.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(miim.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(outputcontrol.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(random.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(receivecontrol.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(registers.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(register.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(r"addrcheck.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(r"counters.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(r"ethmac.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(r"statem.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(shi2treg.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(spram(;:<"?;.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(top.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(transmitcontrol.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(t"counters.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(t"ethmac.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(t"statem.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/eth(wishbone.vB into library work #nalyAing Ierilog 2ile B../vlog/ethmac/"ilin"(dist(ram(8<"?;.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;?/a;?(alu.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;?/a;?(barrel(shi2t.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;?/a;?(cache.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;?/a;?(coprocessor.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;?/a;?(core.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;?/a;?(decode.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;?/a;?(decompile.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;?/a;?(e"ecute.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;?/a;?(2etch.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;?/a;?(multiply.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;?/a;?(register(bank.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;?/a;?(wishbone.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;:/a;:(alu.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;:/a;:(barrel(shi2t.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;:/a;:(shi2ter.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;:/a;:(coprocessor.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;:/a;:(core.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;:/a;:(dcache.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;:/a;:(decode.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;:/a;:(decompile.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;:/a;:(e"ecute.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;:/a;:(2etch.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;:/a;:(icache.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;:/a;:(mem.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;:/a;:(multiply.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;:/a;:(register(bank.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;:/a;:(wishbone.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;:/a;:(wishbone(bu2.vB into library work #nalyAing Ierilog 2ile B../vlog/amber;:/a;:(write(back.vB into library work #nalyAing Ierilog 2ile B../vlog/lib/generic(iobu2.vB into library work #nalyAing Ierilog 2ile B../vlog/lib/generic(sram(byte(en.vB into library work #nalyAing Ierilog 2ile B../vlog/lib/generic(sram(line(en.vB into library work #nalyAing Ierilog 2ile B../vlog/tb/tb(uart.vB into library work #nalyAing Ierilog 2ile B../vlog/tb/eth(test.vB into library work #nalyAing Ierilog 2ile B../vlog/tb/dumpvcd.vB into library work #nalyAing Ierilog 2ile B../vlog/tb/tb.vB into library work )tarting static elaboration ompleted static elaboration Fuse $emory 5sage: 98<J; K% Fuse +5 5sage: 8;;D ms ompiling module clocks(resets ompiling module generic(sram(line(enGE#,#(L7E,-*...

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Amber Project User Guide

May 2013

ompiling module generic(sram(byte(enGE#,#(L7E,-*... ompiling module a;?(cache(de2ault ompiling module a;?(wishbone ompiling module a;?(2etch ompiling module a;?(decompile(; ompiling module a;?(decode ompiling module a;?(barrel(shi2t ompiling module a;?(alu ompiling module a;?(multiply ompiling module a;?(register(bank ompiling module a;?(e"ecute ompiling module a;?(coprocessor ompiling module a;?(core ompiling module eth(clockgen ompiling module eth(shi2treg ompiling module eth(outputcontrol ompiling module eth(miim ompiling module eth(registerG'&)&,(I#15&*@MbDH ompiling module eth(registerG'&)&,(I#15&*@Mb8D8D... ompiling module eth(registerGL7E,-*8='&)&,(I#15&... ompiling module eth(registerGL7E,-*N='&)&,(I#15&... ompiling module eth(registerGL7E,-*N='&)&,(I#15&... ompiling module eth(registerGL7E,-*N='&)&,(I#15&... ompiling module eth(registerG'&)&,(I#15&*@MbD88D... ompiling module eth(registerG'&)&,(I#15&*@MbD8DD... ompiling module eth(registerGL7E,-*<='&)&,(I#15&... ompiling module eth(registerGL7E,-*9='&)&,(I#15&... ompiling module eth(registerGL7E,-*?='&)&,(I#15&... ompiling module eth(registerG'&)&,(I#15&*@MbD88D... ompiling module eth(registerGL7E,-*8H ompiling module eth(registerGL7E,-*:='&)&,(I#15&... ompiling module eth(registerGL7E,-*8<='&)&,(I#15... ompiling module eth(registers ompiling module eth(receivecontrol ompiling module eth(transmitcontrol ompiling module eth(maccontrol ompiling module eth(t"counters ompiling module eth(t"statem ompiling module eth(crc ompiling module eth(random ompiling module eth(t"ethmac ompiling module eth(r"statem ompiling module eth(r"counters ompiling module eth(r"addrcheck ompiling module eth(r"ethmac ompiling module generic(sram(byte(enGE#,#(L7E,-*... ompiling module eth(spram(;:<"?; ompiling module eth(2i2oGE&+,-*8<= 4,(L7E,-*:H ompiling module eth(wishbone ompiling module eth(macstatus ompiling module eth(top ompiling module generic(iobu2 ompiling module generic(sram(byte(enGE#,#(L7E,-*... ompiling module boot(mem?; ompiling module uartGL%(EL7E,-*?;=L%()L7E,-*9H ompiling module test(moduleGL%(EL7E,-*?;=L%()L7E... ompiling module timer(moduleGL%(EL7E,-*?;=L%()L7... ompiling module interrupt(controllerGL%(EL7E,-*?... ompiling module main(memGL%(EL7E,-*?;=L%()L7E,-*... ompiling module wishbone(arbiterGL%(EL7E,-*?;=L%... ompiling module ethmac(wbGL%(EL7E,-*?;=L%()L7E,-... ompiling module system ompiling module eth(test ompiling module tb(uart(de2ault ompiling module dumpvcd ompiling module tb ,ime 'esolution 2or simulation is 8ps. Laiting 2or 8 sub-compilationGsH to 2inish... ompiled <@ Ierilog 5nits %uilt simulation e"ecutable amber-test.e"e Fuse $emory 5sage: @J:@D K% Fuse +5 5sage: ;8;D ms 3 +5 5sage: 8;DD ms 7)im +.:@2 Gsignature D"2bcDDdaaH L#'4743: # L&%+# K license was 2ound. L#'4743: +lease use 6ilin" 1icense on2iguration $anager to check out a 2ull 7)im license. L#'4743: 7)im will run in 1ite mode. +lease re2er to the 7)im documentation 2or more in2ormation on the di22erences between the 1ite and the Full version. ,his is a 1ite version o2 7)im. ,ime resolution is 8 ps )imulator is doing circuit initialiAation process. 1oad boot memory 2rom ../../sw/boot-loader-serial/boot-loader-serial.mem 'ead in ;D:? lines

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Amber

Amber Project User Guide

log 2ile tests.log= timeout D= test name hello-world 1oad main memory 2rom ../../sw/hello-world/hello-world.mem 'ead in J88< lines Finished circuit initialiAation process. #mber %oot 1oader v;D8?D9;@89?8;D ! D"DDDD@DDD -ello= LorldO ---------------------------------------------------------------------------#mber ore > 5ser F7'P 7'P )I rD D"DDDDDD8D r8 D"DDDD@d2c r; D"DDDDDDDD r? D"DDDDDDDD r9 D"DcDD@DD? r: D"deadbee2 r< D"deadbee2 rN D"deadbee2 r@ D"deadbee2 D"deadbee2 rJ D"deadbee2 D"deadbee2 r8D D"DDDDDD88 D"deadbee2 r88 D"2DDDDDDD D"deadbee2 r8; D"DDDD8ecc D"deadbee2 r8? D"D@DDDDDD D"deadbee2 D"deadbee2 D"D82222bD r89 GlrH D"DDDD@D;D D"deadbee2 D"deadbee2 D"<DDDD?2b r8: GpcH D"DDDD@9JD )tatus %its: 4*D= >*8= *8= I*D= 7'P $ask D= F7'P $ask D= $ode * 5ser ----------------------------------------------------------------------------

May 2013

QQQQQQQQQQQQQQQQQQQQ +assed hello-world 9N<?9 ticks QQQQQQQQQQQQQQQQQQQQ )topped at time : 88J8?;N:DD ps : File B/pro!/amber(trunk(working/hw/vlog/tb/tb.vB 1ine :D?

2+#

Simulation output files

2+#+1 ,isassembl Output File

The disassembly #ile% amber dis% is !enerated by de#a$lt d$rin! a sim$lation (t is located in the 4A35)265AS)<h"<sim directory This #ile is very $se#$l #or deb$!!in! so#t"are as it sho"s every instr$ction exec$ted by the core and the res$lt o# all load and store operations This #ile is !enerated by de#a$lt To t$rn o## !eneration% comment the line "here A35)26:)&'3P(7) is de#ined in 4A35)265AS)<h"<vlo!<amber<amber6con#i!6de#ines v 5elo" is an example o# the dissassembly o$tp$t #ile The #irst col$mn !ives the time that the instr$ction "as exec$ted The time is speci#ied in sys6cl. tic.s The second col$mn !ives the address o# the instr$ction bein! exec$ted and the next col$mn !ives the instr$ction (# an instr$ction is not exec$ted beca$se o# a conditional exec$tion code% this is mar.ed "ith a @C@ character in #ront o# the instr$ction For load and store instr$ctions% the act$al memory access is !iven belo" the instr$ction This is the complete listin! #or the add test
;<9 ;<N ;ND ;N? ;N< ;NJ D: 9: @: c: 8D: 89: mov mov add cmp -movne -bne r8= r;= r?= r?= r8D= b9 #? #8 r8= #9 #8D

r;

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Amber
;@; ;@: ;@@ ;J8 ;J9 ;JN ?DD ?D? ?D< ?DJ ?8; ?8: ?8@ ?;8 ?;9 ?;N ??D ??? ??< ??J ?9; ?9: ?9@ ?:8 ?:9 ?:N ?<D ?<? ?<< ?<J ?N; ?NN ?@8 ?@9 ?@N ?JD ?J: ?JJ 9D; 9D: 9D@ 98D 98N 9;; 9;< 9;J 9?;

Amber Project User Guide

8@: 8c: ;D: ;9: ;@: ;c: ?D: ?9: ?@: ?c: 9D: 99: 9@: 9c: :D: :9: :@: :c: <D: <9: <@: <c: ND: N9: N@: Nc: @D: @9: @@: @c: JD: J9: J@: Jc: aD: a9: a@: ac: bD: cD: c9: c@: mov mov add cmp -movne -bne mov mvn add cmn -movne -bne mvn mov add cmn -movne -bne mvn mvn add cmn -movne -bne mvn mvn add cmn -movne -bne ldr read mov adds -bvc ldr read cmp -movne -bne b !ump ldr read mov str write r9= #D r:= #D r<= r:= r9 r<= #D r8D= #;D b9 rN= #D r@= #D rJ= rN= r@ rJ= #8 r8D= #?D b9 r8= #D r;= #D r?= r8= r; r?= #8 r8D= #9D b9 r9= #D r:= #D r<= r9= r: r<= #; r8D= #:D b9 rN= #D r@= #;:9 rJ= rN= r@ rJ= #;:< r8D= #<D b9 r8= Rpc= #<DS addr d9= data N2222222 r;= #8 r?= r8= r; b9 rD= Rpc= #9@S addr d@= data @DDDDDDD rD= r? r8D= #ND b9 cD 2rom bD to cD= rD @DDDDDDD= r8 N2222222 r88= Rpc= #@S addr dD= data 2DDDDDDD r8D= #8N r8D= Rr88S addr 2DDDDDDD= data DDDDDD88= be 2

May 2013

2+#+2
Figure 2 - G067ave (aveform vie(er

2+#+3 Program Trace $tilit

A $tility is provided that traces all #$nction calls made d$rin! a 8erilo! sim$lation ?ere is an example $sa!e9
$ $ $ $ cd $#$%&'(%#)&/hw/sim run ethmac-test ln -s ../../sw/tools/amber-!umps.sh !umps !umps ethmac-test

This prod$ces the #ollo"in! o$tp$t The le#t col$mn !ives the time o# the event The next col$m !ives the name o# the callin! #$nction The next col$mn !ives the val$e o# the r0 re!ister This re!ister holds the #irst parameter passed in #$nction calls The next col$mn !ives the name o# the #$nction called
;N<D?8 u main -> ;N<8D9 u print2 -> ;N<?88 u print -> G DDDD@dec= H print2 u G DN2222@c= H print u G DDDDDD:?= H (outbyte u

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Amber
;N<988 etc.

Amber Project User Guide

print <G DDDDDD:?= H

May 2013

2+*

0ar(1are Tests
The Amber pac.a!e contains a set o# tests "hich are $sed to veri#y the correct operation o# all the instr$ctions% interr$pts% the cache and peripherals The tests are "ritten in assembly Several o# the tests "ere added "hen a speci#ic b$! "as #o$nd "hile deb$!!in! the core To r$n one o# the tests% $se r$n Dtest-nameE% e !
$ cd $#$%&'(%#)&/hw/sim $ run barrel(shi2t

)ach test !enerates pass or #ail "hen it completes% e !

# QQQQQQQQQQQQQQQQQQQQ # +assed barrel(shi2t # QQQQQQQQQQQQQQQQQQQQ

To r$n the complete test s$ite9

$ cd $#$%&'(%#)&/hw/sim $ run -a

'nce the r$n is complete loo. at the o$tp$t #ile h"-tests lo! in the 4A35)265AS)<h"<sim< directory to chec. the res$lts All tests sho$ld pass The #ollo"in! table describes each test The so$rce #iles #or these tests are in the directory 4A35)265AS)<h"<tests
Table 2
.ame adc addr8e. add

Amber %ore *ard+are /eri(ication ,ests

,escription ,ests t"e adc instruction. Adds 3 329bit numbers usin! adc and c"ec2s t"e resu t. ,ests an address e.ce#tion interru#t. Sets t"e #c to 0.3(((((c and e.ecutes a no#. ,"e #c t"en increments to 0.4000000 tri!!erin! an address e.ce#tion. ,ests t"e add instruction. &uns t"rou!" a set o( additions o( #ositi5e and ne!ati5e numbers0 c"ec2in! t"at t"e resu ts are correct. A so tests t"at t"e @s@ ( a! on t"e instruction correct y sets t"e condition ( a!s. ,ests t"e barre s"i(t o#eration +it" a mo5 instruction0 +"en t"e s"i(t amount is a re!ister 5a ue. ,est t"at s"i(t o( 0 ea5es &m unc"an!ed. ,ests t"at a s"i(t o( A 32 sets &m and carry out to 0. ,ests t"e barre s"i(t o#eration +it" a mo5 instruction +"en t"e s"i(t amount is an immediate 5a ue.,ests s 0 sr and ror. ,ests branc" on carry c ear. ,est added to catc" s#eci(ic bu! +it" t"e bic instruction. ,"e (o o+in! instruction stored t"e resu t in r30 instead o( r2 tst r20 r00 s r3 bicne r20 r20 r00 s r3 ,est ;ranc" and -in2 instruction. %"ec2s t"at t"e correct return address is stored in t"e in2 re!ister Br14C. %ontains a on! but sim# e code se:uence. ,"e entire se:uence can (it in t"e cac"e. ,"is se:uence is e.ecutes 4 times0 so t"ree times it +i e.ecute (rom t"e cac"e. ,est #asses i( se:uence e.ecutes correct y. ,ests sim# e interactin bet+een cac"ed data and uncac"ed instruction accesses.

barre 8s"i(t8rs barre 8s"i(t bcc bic8bu!

b cac"e1

cac"e2

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Amber
.ame cac"e3 cac"eab e8area cac"e8( us" cac"e8s+a#8bu!

Amber Project User Guide

,escription

May 2013

,ests t"at t"e cac"e can +rite to and read bac2 mu ti# e times (rom 22 +ords in se:uence in memory 9 t"e siDe o( t"e cac"e. ,ests t"e cac"eab e area co9#rocessor (unction. ,ests t"e cac"e ( us" (unction. Does a ( us" in t"e midd e o( a se:uence o( data reads. %"ec2s t"at a t"e data reads are correct. ,ests t"e interaction bet+een a s+a# instruction and t"e cac"e. &uns t"rou!" a main oo# mu ti# e times +it" di((erent numbers o( no# instructions be(ore t"e s+# instruction to test a ran!e o( timin! interactions bet+een t"e cac"e state mac"ine and t"e s+a# instruction. Fi s u# t"e cac"e and t"en does a s+a# access to data in t"e cac"e. ,"at data s"ou d be in5a idated. %"ec2 by readin! it a!ain. ,ests te:0 tst0 cm# and cmn +it" t"e # ( a! set. Starts in su#er5isor mode0 c"an!es to Interru#t mode t"en Fast Interru#t mode0 t"en su#er5isor mode a!ain and (ina y User mode. %"an!e status bits. ,ests mo5s +"ere t"e destination re!ister is r1)0 t"e #c. De#endin! on t"e #rocessor mode and +"et"er t"e s bit is set or not0 some or none o( t"e status bits +i c"an!e. 3ord accesses to random addresses in DD&3 memory. ,"e test creates a ist o( addresses in an area o( boot8mem. It t"en +rites to a addresses +it" data 5a ue e:ua to address. Fina y it reads bac2 a ocations c"ec2in! t"at t"e read 5a ue is correct. ,ests byte read and +rite accesses to DD&3 memory. ,est bac2 to bac2 +rite9read accesses to DD&3 memory. ,ests +is"bone access to t"e interna memory in t"e 6t"ernet MA% modu e. ,ests +is"bone access to re!isters in t"e 6t"ernet MA% modu e. ,ests et"ernet MA% (rame transmit and recei5e (unctions and 6t"mac DMA access to "iboot mem. 6t"mac is #ut in oo#bac2 mode and a #ac2et is transmitted and recei5ed. 6.ecutes 20 FI&Es at random times +"i e e.ecutin! a sma oo# o( code. ,"e interru#ts are tri!!ered usin! a ransom timer. ,est c"ec2s t"e (u set o( FI&E re!isters Br< to r14C and +i on y #ass i( a interru#ts are "and ed correct y. ,"e core +as i e!a y s2i##in! an instruction a(ter a se:uence o( 3 conditiona not9e.ecute instructions and 1 conditiona e.ecute instruction. ,ests instruction and data ( o+. S#eci(ica y tests t"at a stm +ritin! to cac"ed memory a so +rites a data t"rou!" to main memory. ,ests t"at a stream o( str instrutions +ritin! to cac"ed memory +or2s correct y. ,ests dm +"ere t"e #c is oaded +"ic" causes a jum#. At t"e same time t"e mode is c"an!ed. ,"is is re#eated +it" t"e cac"e enab ed. ,ests +is"bone read and +rite access to "i Bnon9cac"ab eC boot S&AM. A oad store se:uence +as (ound to not e.ecute correct y. ,ests runnin! a sim# e a !orit"m to add a bunc" o( numbers and c"ec2 t"at t"e resu t is correct. ,"is a !orit"m runs <0 times. Durin! t"is0 a +"o e bunc" o( I&E interru#ts are tri!!ered usin! t"e random timer. ,ests dm and stm o( sin! e re!isters +it" cac"e enab ed. ,ests dm and stm o( 2 re!isters +it" cac"e enab ed. ,ests t"e standard (orm o( dm. ,ests dm +"ere t"e user mode re!isters are oaded +"i st in a #ri5i e!ed mode. ,ests dm +"ere t"e status bits are a so oaded. ,ests t"e usa!e o( dm in User Mode +"ere t"e status bits are oaded. ,"e s bit s"ou d be i!nored in User Mode. ,ests dr and drb +it" a t"e di((erent addressin! modes. ,ests rd and str o( r1). ,ests t"e m a Bmu ti# y and accumu ateC instruction. ;u! +it" Mu ti# y Accumu ate. ,"e ( a!s +ere !etttin! set 1 cyc e ear y. ,ests a mo5s (o o+ed by a se:uence o( dr and str instructions +it" di((erent condition (ie ds. ,ests t"e mu Bmu ti# yC instruction. ,ests t"e @subtract +it" carry@ instruction by doin! 3 $49bit subtractions. Generates as dense a stream o( +rites as #ossib e to c"ec2 t"at t"e memory subsystem can co#e

cac"e8s+a# c"an!e8mode c"an!e8sbits ddr31

ddr32 ddr33 et"mac8mem et"mac8re! et"mac8t. (ir:

( o+8bu! ( o+1 ( o+2 ( o+3 "iboot8mem in( ate8bu! ir:

dm8stm8onet+o dm1 dm2 dm3 dm4 dr dr8atr8#c ma m as8bu! mo5s8bu! mu sbc stm8stream

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Amber
.ame

Amber Project User Guide

,escription +it" t"is +orst case.

May 2013

stm1 stm2 strb sub s+i s+#8 oc28bu! s+# uart8re! uart8r.int uart8r. uart8t. unde(ined8ins

,ests t"e norma o#eration o( t"e stm instruction. ,est jum#s into user mode0 oads some 5a ues into re!isters r< 9 r140 t"en jum#s to FI&E and sa5es t"e user mode re!isters to memory. ,ests str and strb +it" di((erent inde.in! modes. ,ests sub and subs. ,ests t"e so(t+are interru#t = s+i. ;u! bro2e an instruction read immediate y a(ter a s+# instruction. ,ests s+# and s+#b. ,ests +is"bone read and +rite access to t"e Amber UA&, re!isters. ,ests t"e UA&, recei5e interru#t (unction. Some te.t is sent (rom t"e test8uart to t"e uart and an interru#t !enerated. ,ests t"e UA&, recei5e (unction. Uses t"e tb8uart in oo#bac2 mode to 5eri(y t"e transmitted data. ,ests Unde(ined Instruction Interru#t. Fires a (e+ unsu##orted ( oatin! #oint unit BFPUC instructions into t"e core. ,"ese cause unde(ined instruction interru#ts +"en e.ecuted.

2+6

C Programs
(n addition to the short assembly lan!$a!e tests% some lon!er pro!rams "ritten in & are incl$ded "ith the Amber system These can be $sed to #$rther test and veri#y the system% or as a basis to develop yo$r o"n applications The so$rce code #or these pro!rams is in 4A35)265AS)<s"

2+6+1 Serial %oot 'oa(er

This is located in 4A35)265AS)<s"<boot-loader-serial (t can be r$n in sim$lation as #ollo"s9
$ cd $#$%&'(%#)&/hw/isim $ ./run.sh boot-loader-serial

The sim$lation o$tp$t loo.s li.e the #ollo"in!9

# # # # # # # # # # # # # # # # # # # # # # # ,est boot-loader= log 2ile boot-loader.log 1oad boot memory 2rom ../../sw/boot-loader/boot-loader.mem 'ead in 8J;@ lines #mber %oot 1oader v;D88D;D;8?DD9N ommands l : 1oad el2 2ile b <address> : 1oad binary 2ile to <address> d <start address> <num bytes> : Eump mem h : +rint help message ! : &"ecute loaded el2= !umping to D"DDD@DDDD p <address> : +rint ascii mem until 2irst D r <address> : 'ead mem s : ore status w <address> <value> : Lrite mem r D DDDDDDDc r 8 DDDD8bN< r ; DDDDDDDD r ? DDDDDDDD r 9 deadbee2 r : deadbee2 r < deadbee2 r N deadbee2 r @ deadbee2

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Amber
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # r J r8D r88 r8; r8? sp pc

Amber Project User Guide

deadbee2 deadbee2 deadbee2 DDDDDD9@ <DDDD;2N D82222@D <DDDD;2?

May 2013

---------------------------------------------------------------------------#mber ore 5ser F7'P 7'P > )I rD D"DDDDDDD8 r8 D"DDDD8c?: r; D"DDDDDDDD r? D"DDDDDDDD r9 D"deadbee2 r: D"deadbee2 r< D"deadbee2 rN D"deadbee2 r@ D"deadbee2 D"deadbee2 rJ D"deadbee2 D"deadbee2 r8D D"DDDDDD88 D"deadbee2 r88 D"2DDDDDDD D"deadbee2 r8; D"DDDDDD9@ D"deadbee2 r8? D"deadbee2 D"deadbee2 D"deadbee2 D"D82222cD r89 GlrH D"deadbee2 D"deadbee2 D"deadbee2 D";DDDDN<? r8: GpcH D"DDDD8;:D )tatus %its: 4*D= >*8= *8= I*D= 7'P $ask D= F7'P $ask D= $ode * )upervisor ---------------------------------------------------------------------------QQQQQQQQQQQQQQQQQQQQ +assed boot-loader QQQQQQQQQQQQQQQQQQQQ

The boot loader is $sed to do"nload lon!er applications onto the FPGA development board via the 1A2T port and $sin! ?yper Terminal on a host -indo"s P&

2+6+2 0ello 2orl(

This is located in 4A35)265AS)<s"<hello-"orld (t can be r$n in sim$lation as #ollo"s9
$ cd $#$%&'(%#)&/hw/isim $ ./run.sh hello-world

This is a very simple example o# a stand alone & pro!ram The print# #$nction it $ses is contained in 4A35)265AS)<s"<mini-libc% so that it can r$n on an FPGA "itho$t access to a real libc library #ile

2+6+3 3t!mac %oot 'oa(er

This is located in 4A35)265AS)<s"<boot-loader-ethmac This is an @over the net"or.@ boot loader (t s$pports telnet #or command and stat$s% and t#tp #or $ploadin! exec$table pro!rams ,as el# #iles/ to r$n on the FPGA The (P address is hard-coded in 4A35)265AS)<s"<boot-loader-ethmac<pac.et c% line 56 To chan!e it% edit that #ile and reb$ild the FPGA% creatin! a ne" bit#ile ?ere@s an example $sa!e o# the boot-loader9
$ telnet 8J;.8<@.D.8N ,rying 8J;.8<@.D.8N... onnected to 8J;.8<@.D.8N. &scape character is MTSM. #mber +rocessor %oot 1oader

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1$ of 22

Amber

Amber Project User Guide

> s )ocket 7E D +ackets received 8D +ackets transmitted J +ackets resent D , + checksum errors D ounterparty 7+ 8J;.8<@.D.:; ounterparty +ort ::?8@ $alloc pointer D"D8;;?<DD $alloc count :?8 5ptime ;8 seconds >

May 2013

2+4

'inu5
A memory #ile is provided to r$n a sim$lation o# 7in$x bootin! The main reason #or providin! this #ile is to have a lon! test to #$rther validate the correct operation o# the core This #ile "as created #rom a modi#ied version o# the A + AF .ernel "ith the patch-A + AF-vrs* b=A patch #ile applied and then some modi#ications made to so$rce #iles to s$pport the speci#ic hard"are in the Amber A FPGA The vmlin$x mem memory #ile contains an embedded extA #ormat ramdis. ima!e "hich contains the hello-"orld pro!ram% b$t renamed as <sbin<init The .ernel mo$nts the ramdis. as <dev<root and r$ns init This pro!ram prints G?ello% -orldG and "rites the test pass val$e to the sim$lation control re!ister To r$n this sim$lation9
$ cd $#$%&'(%#)&/hw/isim $ ./run.sh vmlinu"

This sim$lation ta.es abo$t 6 million tic.s to r$n to completion% or bet"een 5 min$tes and an ho$r o# "all time dependin! on yo$r sim$lator and P& The #ollo"in! is the o$tp$t #rom this sim$lation9
# #mber %oot 1oader v;D88D88N;88:8@ # ! D";D@DDDD # # 1inu" version ;.9.;N-vrs8 GconorCserverH Ggcc version 9.:.8 G)ourcery 3QQ 1ite ;D8D.DJ:DH H #?:9 ,ue Feb 8 8N::<:DD 3$, ;D88 # +5: #mber ; revision D # $achine: #mber-F+3#-)ystem # 0n node D totalpages: 8D;9 # AoneGDH: 8D;9 pages. # AoneG8H: D pages. # AoneG;H: D pages. # Kernel command line: console*tty#$D mem*?;$ root*/dev/ram # alibrating delay loop... 8J.J8 %ogo$7+) # $emory: ?;$% * ?;$% total # $emory: ?88?<K% available G9J?K code= 8J:K data= ?;K initH # Eentry cache hash table entries: 9DJ< Gorder: D= ?;N<@ bytesH # 7node cache hash table entries: 9DJ< Gorder: D= ?;N<@ bytesH # $ount cache hash table entries: 9DJ< Gorder: D= ?;N<@ bytesH # %u22er cache hash table entries: @8J; Gorder: D= ?;N<@ bytesH # +age-cache hash table entries: @8J; Gorder: D= ?;N<@ bytesH # +0)76 con2ormance testing by 547F76 # 1inu" 4&,9.D 2or 1inu" ;.9 # %ased upon )wansea 5niversity omputer )ociety 4&,?.D?J # )tarting kswapd # tty#$D at $$70 D"8<DDDDDD GirU * 8H is a L)%4 # pty: ;:< 5ni"J@ ptys con2igured # '#$E7)K driver initialiAed: 8< '#$ disks o2 ;D@K siAe 8D;9 blocksiAe # 4etLinder Floating +oint &mulator ID.JN Gdouble precisionH # '#$E7)K: e"t; 2ilesystem 2ound at block @?@@<D@ # '#$E7)K: 1oading ;DD blocks R8 diskS into ram disk... done. # Freeing initrd memory: ;DDK

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Amber
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # #

Amber Project User Guide

IF): $ounted root Ge"t; 2ilesystemH readonly. Freeing init memory: ?;K -ello= LorldO ---------------------------------------------------------------------------#mber ore > 5ser F7'P 7'P )I rD D"DDDDDD8D r8 D"DD@DeeDD r; D"DDDDDDDD r? D"DDDDDDDD r9 D"DDDDDDDD r: D"DDDDDDDD r< D"DDDDDDDD rN D"DDDDDDDD r@ D"DDDDDDDD D"deadbee2 rJ D"DDDDDDDD D"deadbee2 r8D D"DDDDDD88 D"deadbee2 r88 D"2DDDDDDD D"deadbee2 r8; D"DDDDDDDD D"deadbee2 r8? D"D8J2229D D"deadbee2 D"D;8Dbca9 D"D;8<82e@ r89 GlrH D"DDDDDDDD D"deadbee2 D";;Da9?N2 D"DD@De9;@ r8: GpcH D"DD@De@DD )tatus %its: 4*D= >*8= *8= I*D= 7'P $ask D= F7'P $ask D= $ode * 5ser ---------------------------------------------------------------------------QQQQQQQQQQQQQQQQQQQQ +assed vmlinu" QQQQQQQQQQQQQQQQQQQQ

May 2013

The pro!ram trace $tility can be $sed to trace the 7in$x exec$tion% as #ollo"s9
$ cd $#$%&'(%#)&/hw/sim $ ln -s ../../sw/tools/amber-!umps.sh !umps $ !umps vmlinu"

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Amber Project User Guide

May 2013

FPGA S nt!esis
A ma.e#ile is provided that per#orms synthesis o# the system to a Xilinx Spartan-6 FPGA To $se this ma.e#ile yo$ m$st have Xilinx (S) installed ( have tested it "ith (S) v*+ 5 The ma.e#ile is H$ite #lexible To see all its options% type9
$ cd $#$%&'(%#)&/hw/2pga/bin $ make help

To $se the script to per#orm a complete synthesis r$n #rom start to #inish and !enerate a bit#ile9
$ cd $#$%&'(%#)&/hw/2pga/bin $ chmod Q" V.sh $ make new

The script per#orms the #ollo"in! steps * &ompiles the boot loader pro!ram in 4A35)265AS)<s"<boot-loader% to ens$re the latest version !oes into the boot6mem ram bloc.s 2$ns xst to synthesi=e the top-level 8erilo! #ile 4A35)265AS)<h"<vlo!<system<system v and everythin! inside it 2$ns n!bb$ild to create the initial FPGA netlist 2$ns map to do placement 2$ns par to do ro$tin! 2$ns bit!en to create an FPGA bit#ile in the bit#ile directory 2$ns trce to do timin! analysis on the #inished FPGA

; + 5 6 F

The Spartan-6 FPGA tar!et device is the de#a$lt To compile #or the 8irtex-6 FPGA% set 8(2T)X6I* on the command line% e !
$ cd $#$%&'(%#)&/hw/2pga/bin $ make new I7',&6<*8

The Amber A; core is the de#a$lt To synthesi=e the Amber A5 core instead% set AA5I* on the command line% e !
$ cd $#$%&'(%#)&/hw/2pga/bin $ make new #;:*8

(# the par step #ails ,timin! or area constrains not met/% yo$ can rer$n map and par "ith a di##erent seed Simply call the ma.e#ile a!ain "itho$t the ne" s"itch The ma.e#ile "ill a$tomatically increment the seed% e !
$ cd $#$%&'(%#)&/hw/2pga/bin

Released under the GNU Lesser General Public License (v2.1) terms

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Amber
$ make

Amber Project User Guide

May 2013

The system cloc. speed is con#i!$red "ithin the FPGA ma.e#ile% 4A35)265AS)<h"<#p!a<bin<3a.e#ile To chan!e it% chan!e the val$e o# A35)26&7J6:(8(:)2 in that #ile The system cloc. #reH$ency is eH$al to the P77@s 8&' cloc. #reH$ency divided by A35)26&7J6:(8(:)2 5y de#a$lt it is set to +03?= #or Spartan-6 and K03?= #or 8irtex-6

Released under the GNU Lesser General Public License (v2.1) terms

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Amber

Amber Project User Guide

May 2013

$sing %oot&'oa(er
(# yo$ have a development board "ith a 1A2T connection to a P& yo$ can $se bootloader to do"nload and r$n applications on the board ( have tested this "ith the Xilinx SP605 development board (t provides a 1A2T connection via a 1S5 port on the board

#+1

-nstall an( configure 6inicom

The #ollo"in! commands installs the ls$sb and minocom $tilities9
$ sudo yum install usbutils $ sudo yum install minicom

&onnect the SP605 serial port 1S5 to the P& and chec. that the port is visible9

ls -l /dev/tty5)%D crw-rw---- 8 root dialout 8@@= D $ay $ lsusb %us DD8 Eevice DD8: %us DD; Eevice DD8: %us DD? Eevice DD8: %us DD9 Eevice DD8: %us DD: Eevice DD8: %us DD< Eevice DD8: %us DDN Eevice DD8: %us DD@ Eevice DD8: %us DD8 Eevice DD;: %us DD: Eevice DD;: %us DD: Eevice DD?: %us DD; Eevice D8?: Bus 008 Device 006: %y!&" %y'%art 'B 7E 8d<b:DDD; 7E 8d<b:DDD; 7E 8d<b:DDD8 7E 8d<b:DDD8 7E 8d<b:DDD8 7E 8d<b:DDD8 7E 8d<b:DDD8 7E 8d<b:DDD8 7E D:e?:D<D@ 7E D9<e:::a: 7E D92?:D;8; 7E D?2d:DDD@ ID 10c4:ea60 lig(t

9 88:D; /dev/tty5)%D

1inu" Foundation ;.D root hub 1inu" Foundation ;.D root hub 1inu" Foundation 8.8 root hub 1inu" Foundation 8.8 root hub 1inu" Foundation 8.8 root hub 1inu" Foundation 8.8 root hub 1inu" Foundation 8.8 root hub 1inu" Foundation 8.8 root hub 3enesys 1ogic= 7nc. 5)%-;.D 9-+ort -5% %ehavior ,ech. omputer orp. &lan $icroelectronics orp. 1aser $ouse 6ilin"= 7nc. Cygnal Integrated Products, Inc. CP210x

!"# Bridge $

&on#i!$re minicom

sudo minicom -s Q-----------------------------------------------------------------------Q W # )erial Eevice : /dev/tty5)%D W W % - 1ock2ile 1ocation : /var/lock W W allin +rogram : W W E allout +rogram : W W & %ps/+ar/%its : J;8<DD @48 W W F - -ardware Flow ontrol : Xes W W 3 - )o2tware Flow ontrol : 4o W W W W hange which settingY W Q-----------------------------------------------------------------------Q

Save set$p as d#l Then to r$n minicom%

> sudo minicom

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Amber

Amber Project User Guide

May 2013

#+2

Configure t!e FPGA

7oad the bit#ile into the FPGA on the development board This can be done $sin! Xilinx i3PA&T 'nce the FPGA is con#i!$red the boot loader "ill print some messa!es via the 1A2T inter#ace onto the minicom screen% as #ollo"s9

Released under the GNU Lesser General Public License (v2.1) terms

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Amber

Amber Project User Guide

May 2013

'icense
All so$rce code provided in the Amber pac.a!e is release $nder the #ollo"in! license terms9
opyright G H ;D8D #uthors and 0+&4 0'&).0'3 ,his source 2ile may be used and distributed without restriction provided that this copyright statement is not removed 2rom the 2ile and that any derivative work contains the original copyright notice and the associated disclaimer. ,his source 2ile is 2ree so2twareZ you can redistribute it and/or modi2y it under the terms o2 the 345 1esser 3eneral +ublic 1icense as published by the Free )o2tware FoundationZ either version ;.8 o2 the 1icense= or Gat your optionH any later version. ,his source is distributed in the hope that it will be use2ul= but L7,-05, #4X L#''#4,XZ without even the implied warranty o2 $&' -#4,#%717,X or F7,4&)) F0' # +#',7 51#' +5'+0)&. )ee the 345 1esser 3eneral +ublic 1icense 2or more details. Xou should have received a copy o2 the 345 1esser 3eneral +ublic 1icense along with this sourceZ i2 not= download it 2rom http://www.opencores.org/lgpl.shtml #uthorGsH: - onor )anti2ort= csanti2ort.amberCgmail.com

Released under the GNU Lesser General Public License (v2.1) terms

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