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AXIEM White Paper

OVERVIEW
Electromagnetic (EM) simulation technology software has come a long way since it rst became popular for microwave and RF circuit design back in the 1980s. With the sophistication of todays EM tools, it is sometimes difcult to remember how limited those early simulators were. The author is old enough to remember when a challenging problem for a 3D planar simulator consisted of a coupled-line lter with 1000 unknowns and 3D nite element simulators were stressed by a simple multi-layer via transition in a package. As with all software, the increased capacity of todays simulators, and the features they support, has been accompanied by an increased sophistication in their use. This paper will examine, in particular, how the use of ports in these simulators has evolved and matured over the years to make real-world design simulations practical. The goal here is to provide a foundational understanding of ports leading to an intuitive skill in their proper selection and use in conjunction with circuit simulation. Port types and their selection criterion, as a topic, is an important one for a designer using a circuit simulator, because the correct use of ports is the most important determining factor, other than drawing the structure itself, in obtaining successful, meaningful simulation results. The choice of the correct port type is not trivial, especially with the bewildering array of port choices available. This article presents useful information that will help designers make the correct decision regarding their selection of port types so that they can obtain valuable results. The article will focus in particular on ports common to planar EM simulators, sometimes called 2D, 2D, or 3D planar EM simulators. This type of simulator is the most commonly used simulator for microwave and RF problems at the board, package, and chip level. Although popular for problems that do not t well into planar process technologies (for example waveguides and non-planar antennas), the full 3D simulator is therefore not specically covered in this paper although generally speaking, strong similarities hold true across all of these simulation technology domains.

A Plethora of Ports: Making Sense of the Different Port Types within EM Simulators

abstRaCt
Electromagnetic (EM) simulation technology software has come a long way since it rst became popular for microwave and RF circuit design back in the 1980s. As with all software, the increased capacity of todays simulators, and the features they support, has been accompanied by an increased sophistication in their use. This paper will examine, in particular, how the use of ports in these simulators has evolved and matured over the years to make real-world design simulations practical. The goal here is provide a foundational understanding of ports leading to an intuitive skill in their proper selection and use in conjunction with circuit simulation.

A SHORt HIstORY Of PORts

EM planar simulators rst came into being in the microwave community back in the 1980s. Their origin can be traced back to the 1960s, where electromagnetics theorists began developing antenna and scattering codes for military applications. In these codes, a structure, for example a horn antenna, was modeled as a wire mesh. The currents were solved on the wire mesh using the method-of-moments (MoM) technique. By the 1980s however, researchers were extending these ideas to include meshing of the metal in a circuit using simple approximations for the current (usually a linear approximation) on a number of patches. The patches (usually called the mesh) could be rectangular, or in some cases triangular, depending on the details of the method. Once the metal was meshed, the designer placed a port onto the structure that would excite the circuit. The resulting currents on the metal were determined, and then the S-parameter(s) at the port(s) could be calculated.

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The original ports used in these early simulators followed the same train of thought as obtaining microwave S-parameters in the laboratory using a network analyzer. A network analyzer launches a wave down a cable toward one of the ports. The resulting reected wave gives the reection coefcient of the port, and the transmitted waves to the other ports give the transmission coefcients. A wave port is created that can be conceptually thought of as an innite waveguide attached to the circuit at that point. (This same procedure is carried out numerically for the full 3D simulators, the most commonly used method being the nite element method [FEM].) Software developers were now faced with two problems. 1. 3D planar codes work with currents on conductors, but not with waves and modes. 2. The network analyzer had to be calibrated to get the best possible results. Calibration is a procedure wherein the imperfections of the measurement system are removed. For example, cables have losses, and the isolation between the two ports isnt perfect. The excitation problem was solved by using a delta gap voltage source. The idea was that a one-cell-wide gap in the metal was placed where the port was located. Across this gap an excitation current was placed. The underlying equations of the MoM viewed this as a voltage being placed across the gap. Ideally the gap was innitely thin, thus the term delta gap. In practice, the gap was one cell wide after the metal was divided into a mesh. Calibration was necessary in the code as well, because the gap had parasitics, most notably a parasitic capacitance across the gap. Researchers came up with a variety of schemes to calibrate, with all of the methods relying on simulating a number of ancillary deembedding structures consisting of lines by themselves, as well as simulating the actual problem at hand. The philosophy of the method was the same as the popular reect-line (TRL) method used in the laboratory for network analyzers. In this technique, various calibration structures were placed on the chip (it was most popular in chip technology) consisting of a line (the thru), an open line (the reect), and a longer line. The resulting deembedding algorithm removed the discontinuities of the ports. (The concept of calibration will be addressed in more detail in the next section of this paper.) It is necessary at this point to note a terminology difference between the numerical and laboratory measurement worlds. In the laboratory, the process of removing the parasitics in the measurement system is called calibration. As a by-product of this process, the reference plane for the ports is dened. A reference plane is the plane at which the phase of the incident and reected waves are measured, with the phase of the incident wave being zero degrees. For example, in a TRL calibration, the reference plane is set to the middle of the calibration lines. In numerical simulation, typically the process of calibrating the port and setting the reference plane is simply called deembedding. But, it is important to note, if a line has been deembedded, it has also been calibrated. The deembedded wave port was widely successful, and is still the most common type of port being used in simulators today. It goes by a variety of names: edge port, wave port, or calibrated port, but in all cases it amounts to a deembedded, calibrated port that can trace its lineage back to the network analyzer and calibration structures. However, this type of port has its limitations. The rst is that the network analyzer only has two ports, possibly four ports in the deluxe models. The bigger problem is that it is difcult to get

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into the middle of the circuit with a network analyzer. The cables are bulky and cant easily attach. Furthermore, in the case of a TRL calibration method with calibrated probe tips, the probe pads would have to be placed in the middle of the circuit. In numerical simulation there is an underlying assumption with a deembedded port: there is no metal nearby inuencing the port except, of course, the line it is on itself. This assumption is violated in the middle of many realistic circuits. The next step in the evolution of ports took care of this problem in a fairly obvious way. To measure a current or voltage in the lab, all probes are used. They are easy to use they are simply placed in the circuit. Of course there is a drawback: they arent calibrated. When these probe type ports were rst used in the late 80s and early 90s, there were many discussions amongst electromagnetic theorists as to whether the answers they gave were valid. The software vendors meanwhile quickly received the practical answer from the designers using their software: they are useful if properly used, and they certainly are convenient. They dont account for the parasitics around the port, but neither does the probe in the laboratory. The secret is that the parasitic voltages or currents have to be smaller than the voltage or current being measured. Typically these ports are used to place a circuit element in the middle of an EM simulation. For example, if the designer wants to include a transistor, diode, or chip capacitor in the line, the S-parameters from the EM simulation could now be placed into a schematic and the model for the device could be placed across the port. As long as the parasitics from the port were small, the answer was good enough to be useful. The community quickly adopted these probe type ports, enabling them to be used in a variety of ways. They had many different names: via ports, internal ports, series ports, parallel ports, and circuit ports, etc. At the same time, both software developers and designers were beginning to appreciate that the ports could be grouped together. To understand this, it is necessary to go back to the laboratory. When probes are used, there must be a concept of ground reference. For low frequency probes, this could be back at the probes shielding ground, or it could be the black probe tip for the red and black probe tip pair. In more sophisticated RF and microwave probes the ground might be another probe tip placed as close as possible to the signal tip. The simulation community began to appreciate that probe type ports could be grouped together, just like the red and black probe tips in the laboratory. The result was a wide variety of port combinations, the most popular of which were the differential ports, wherein one port was + and one port was -. Designers were essentially creating a port and its local ground return in a way completely analogous to the red probe tip and its local voltage ground, the black probe tip. This is shown in Figure 1, where we see the network analyzer and probe in the laboratory and the edge and internal port in EM simulation. This brings the discussion to the subject of ground return in a port. The concept is simple: the current coming out of the port onto the line has to come from somewhere. Wherever that current is coming from is that ports ground. Software developers now allow the designer to specify the ground return in a exible manner depending on the port. For example, perhaps the port is being used for a microstrip line on a one layer board,
Figure 1. N  etwork analyzer and probe in the laboratory and the edge and internal port in EM simulation.

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where the proper ground denition is clearly the bottom ground plane. On the other hand, the microstrip line might be in a multi-layer package where an internal ground plane is below the line. This internal plane is then attached to the ground plane at the bottom of the board only after being connected to it by several layers of vias and bond wires. So, what exactly is the ground in this case? The designer now has the choice to either choose the internal ground plane or the universal board ground or both. Details follow.
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AXIEM White Paper
INTRODUCTION
Misunderstanding how ground is implemented in circuit simulation is one of the most common misuses of electromagnetic (EM) simulators and their results. This white paper discusses the denition of ground in EM simulators and how to correctly choose among various grounding options, a topic of special importance to designers using the results in a circuit simulator. Many modern simulators now support the notion of local grounding, where different ports can use different ground denitions. New features in AWRs AXIEM 2009 3D planar EM simulator offer extensive sources/ports and de-embedding options, including internal edge, nite difference/gap and extraction ports, and per-port, coupled line and mutual group de-embedding. Before it can be understood how ground is used in EM simulators, it is rst necessary to understand how it works in circuit simulation. The major portion of the discussion involves examining where ground is dened in EM simulators and how this is a function of the solver and port types. The paper demonstrates how this exibility in selecting ground can help the engineer characterize board, package, and interconnect performance. Several specic examples at the board, package, and chip level are discussed. The paper concludes with circuit tricks that can be used to aid in ground studies. So, ground is a concept that, while perhaps a bit elusive, forms an important basis for how transmission lines are modeled and simulated. Just as the notion of what is ground and where is it changes as the underlying physics are probed, so too when real circuits are being analyzed. AXIEM is a superb tool in this instance as it has been engineered with this sort of exibility in mind. AXIEM enables the designer to specify where the ground reference is in the design. When adding a port, its just a single mouse-click on any port to reference that port to the particular layer in the geometry that the designer wishes to treat as ground. In more complex situations, for instance, with coplanar waveguide, designers can even set up a system of ports to accurately represent how the wave propagates and how the current returns in the structure through the use of port groups. In addition, AXIEM has tremendous exibility in how ports are de-embedded so that designers have the highest level of assurance that they are measuring their structure with the ground where they intend it to be, and not artifacts of the ports or the geometry setup required by the EM solver. AXIEM is an excellent choice for EM wherever ground may be.

The latest development in port concepts is deembedding of circuit-like ports. From the previous discussion, it is fair to ask why someone would want to calibrate a circuit port, when the point was that the parasitics were small enough that they didnt matter. The answer is that designs are now operating at higher frequencies, and in more compact geometries. So, circuit ports can see each other. For example, two of these ports are placed at the ends of a gap in a line for later use by a chip capacitor. The ports inuence each other. The parasitics of the port are signicant enough that it must be accounted for and properly deembedded; yet both ports must be included in the deembedding scheme for it to be accurate. An example of this group deembedding approach is given below. With a high-level appreciation for port type and its evolution thereof leveraged from lab measurement techniques laid as the foundation thus far, the balance of this article will be devoted to detailing these concepts with examples and at the same time providing tips and issues for the designer to be aware of. If there is only one lesson to be learned here, it is to remember that there is no one best port for all situations. The secret is to understand the fundamental physical assumptions underlying the port, and thereby appreciate its strengths and weaknesses, and make the best possible, informed choice as to port type.

Understanding Grounding Concepts in EM Simulators

Dr. John M. Dunn AWR Corporation

jdunn@awrcorp.com BIO:
John Dunn is a senior engineering consultant at AWR, where he is in charge of training and university program development. His areas of expertise include electromagnetic modeling and simulation for high speed circuit applications. Dr. Dunn past experience includes both the worlds of industry and academia. Prior to joining AWR, he was head of the interconnect modeling group at Tektronix, Beaverton, Oregon, for four years. Before entering industry, Dr. Dunn was a professor of electrical engineering at the University of Colorado, Boulder, for fteen years, from 1986 to 2001, where he lead a research group in the areas of electromagnetic simulation and modeling. Dr. Dunn received his Ph.D. and M.S. degrees in Applied Physics from Harvard University, Cambridge, MA, and his B.A. in Physics from Carleton College, Northeld, MN. He is a senior member of IEEE.

Related White Paper: Understanding Grounding Concepts in EM Simulators >>

THE GROUNd Of a PORt

Every port in a planar EM simulator (or full 3D for that matter) has the notion of a ground. The reason is that the port is used to obtain S-parameters by injecting current into the circuit. To inject the current, a voltage must be placed between the port and its ground. It follows that, to nd the ground of the port, the designer must gure out where the current that is being injected into the port is coming from. It is important to understand where the ground of the port is, because the S-parameters for that port are determined with respect to that ground reference. In the previous section of this paper an example of a transmission line embedded in a multi-layer package with many local ground planes was discussed. The answer can be very different depending on which local ground plane is selected. Modern planar solvers allow the designer to choose the ground return of the port. AXIEM, a 3D EM planar simulator from AWR Corporation, was specically developed to address next-generation EM simulation issues and is an excellent tool to use as an illustration of the concept of choosing ground return. Figure 1 shows two edge ports (as network analyzer ports are called in AXIEM). Both ports are at the end of a microstrip line, which is on top of a single layer board with a ground plane on its other side. Both ports are using the bottom plane as the ground of the ports. The difference is that the left port has a grounding strap from the port to the ground plane. This grounding strap is a real piece of metal (in both the actual design and in the software), on which the current will ow up through the ground, through the port, and onto the line. AWR.TV Videos:
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In Figure 3, the corresponding currents for both types of edge ports have been plotted. (The colors illustrate the density of the current, and the arrows reveal the current direction.) The right port in Figure 2 uses the ground plane as the ground reference, but there is no grounding strap. This is called an implicit grounding scheme. From where does the current come if not the ground plane through a grounding strap? The answer is that it actually comes from innity! On rst reading this, most designers get an uneasy feeling, as well they should. Designers know that life in general, and their design in particular, goes much more smoothly if there is a nice ground plane nearby. The ground plane keeps distinct parts of the circuit decoupled from one another, provides a good path for current return, carries a lot of current if necessary, and transfers DC power if so designed. To understand this, it is necessary to look more deeply into the EM simulator itself. EM planar simulators use something called a Greens Function, which is the function that predicts the mutual coupling among all the current cells. To get the minimum amount of coupling between a port and its current source, we desire a minimal value for the Greens Function. Since the Greens Function is zero at innity, innity is the ultimate ground reference. Those who have worked with wire antennas already know this. A wire antenna in space has its ground at innity. Also, there is a nice, innite ground plane in this problem extending out to innity. Normally, circuits have more than one port. If, for example, one thinks of S21 in a two port circuit, the current is being drawn out of one port (port 1) and pushed into the other (port 2). Whatever is being drawn out from innity is being given back by the other port. Therefore, when one looks at the currents on the ground plane, they are localized under the line as expected, even though there are no grounding straps. See Figure 3 (right hand side) for the current ow. Is it better to use explicit or implicit grounding for a port? It depends. Figure 4 shows an example of a line in a multilayer package. The ground for the port is the local ground plane below it. In this situation, it is important to use an explicit ground with the grounding strap. Otherwise, the current is coming in from innity, and it is far from clear how it gets back to the port. A similar, but signicantly different, situation arises for a coplanar line (Figure 5). Port 1 is the signal line, and port 2 is the ground return. Notice that there are two lines that are port 2. This is a common feature in modern EM simulators. More than one port can be named with the same number and they are connected. Conceptually, think of it in terms of starting with two different ports and numbers, and then connecting them together in parallel in the schematic to make the same net. In this example, there are no ground planes above or below the coplanar structure. It makes no sense to use an explicit grounding scheme, and the implicit scheme is essential. Another advantage of implicitly grounded ports is that they have can have lower parasitics as they dont have a grounding strap.
Figure 5.  Coplanar line with edge ports. Figure 4.  Port in a multi-layer package. Figure 3. C  urrents for explicit and implicit grounding schemes. Figure 2.  Two edge ports above a ground plane.

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For example, in Figure 6 the port is used in a gap in a line. A chip capacitor is going to be placed across the line by attaching its model to the two ports when the S-parameter block is used in the schematic. Explicit grounding will give more coupling between the ports as the two grounding straps talk to each other. Therefore, implicitly grounding the ports will lead to lower parasitics, and a more accurate answer. Please note that when the discussion reaches the calibration stage, how to calculate out the mutual parasitics of the ports even with the grounding straps will be shown. Circuit-type ports obtain their ground return in a different way. Conceptually, they can be thought of as using two probes, a red probe tip for the signal, and a black probe tip for the ground reference and current return. Figure 6 shows an example of an internal circuit port, which is also commonly referred to as a series port. Notice the + symbol on one side of the port. A gap has been placed in the line, with the plus side connected to the red probe tip. The other side of the gap is attached to the black probe tip. In this manner, a model of a chip capacitor can be placed across the port when used in the schematic. The details of how this is accomplished depend on the simulator being used. Most modern simulators also support a generalization of this concept called differential ports. In Figure 7, the coplanar line has the signal port named 1 with the ground called -1. The minus sign indicates it is the ground for port 1, with the associated current return. Differential ports allow the designer to place a ports ground reference anywhere in a circuit, simply by making two ports in the normal way, and then indicating that they are a differential pair. This is entirely equivalent to hooking the two ports together with a transformer in the schematic, as shown in Figure 7. There are three important points to note when doing this. 1. As already mentioned, the S-parameters can be difcult to interpret, as they are referenced to the local ground return, not a universal ground. 2. There is an assumption that any current going into the positive port is being drawn from the negative port. What happens if an element is put across the ports that also has an explicit ground connection? For example, if a transmission line model is put across the ports, a wrong answer will be obtained because the model has capacitance going to ground. The assumption is violated that all the current going into the positive port is coming out of the negative port, as current can also come from ground through the capacitance in the model. So, it is necessary to make sure that any element connected to this type of port doesnt have a so-called sneak path to ground in it. 3. The port is being forced to be excited into a differential mode. There is no concept of a common mode; it is being blocked out by the transformer. Therefore, it is not possible to look at common mode noise with coupled lines using this scheme. If common mode studies are desired, it is necessary to separately look at the two ports, and use a center tapped transformer, or alternatively a common/differential mode converter as shown in Figure 8. This converter takes common and differential modes in on the left, and sends them out as signals on the right.
Figure 8. E  xciting both common and differential modes. Figure 7.  Differential ports for a coplanar line. Figure 6.  A series port and its local ground.

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DEEmbEddEd PORts
Deembedding is a procedure in which the port parasitics are removed. It is extremely important to note: not all ports can be deembedded. Typically, the circuit-type ports mentioned above are not deembedded by default. Deembedding works by simulating deembedding structures behind the scenes in a manner similar to a TRL scheme in network analyzers. Figure 9 shows a port with the reference plane (deembedding length) set by the arrow extending from the port. It also shows the underlying deembedding structure, which is a line twice the length of the original deembedding length, with one port at each end. An internal port is also placed in the middle of the two lines. This gives enough information to take out the parasitics of the original port and set the deembedding length. There is an important assumption that is made when a port is deembedded. The assumption is that there is no metal near the port or the deembedding line to inuence the deembedding procedure. This concept is exactly the same as when using any model in a circuit simulation. When a designer places a transmission line down in a circuit, he or she knows that the model is only valid if nothing else is too close to it. A good rule of thumb is that there should be no other metal within two substrate heights or two line widths, whichever is bigger. This is one of the most common errors in deembedding ports. Circuit layouts can be dense, and deembedding is not always possible. Figure 10 shows a microstrip line ending in a ground via. The reference plane has been placed right at the edge of the via. This violates the assumption that nothing is close to the port or reference line. Figure 10 also shows S11 on the Smith chart. Clearly a serious problem as occurred. The simulation is not even passive, as the magnitude of S11 is greater than 1 (outside the Smith chart). One problem that commonly occurs is when two parallel lines are being used as a differential pair. Two ports are placed at the end of the lines. Obviously, the assumption of port isolation mentioned above is being violated. Most modern simulators now support this issue by making a special calibration where the calibration structures include all the coupled lines. A new issue designers are now facing is in high frequency-situations where ports need to be calibrated in the middle of a line for use with various components like chip capacitors or eld effect transistors (FETs).The trouble is that there is more than one port, and the calibration should include all the ports. Fortunately, ports can now be calibrated in groups. The ports are aware of each other as the calibration is being made. One popular method for doing this is as follows. Calibration lines are added to each of the ports. The lines are oriented so that new ports placed at the end of them are not coupled to the other new ports. Figure 11 illustrates this procedure. The FET model will be inserted at ports 2, 4, 7, and 8 after the EM simulator determines the S-parameters of the lines. Unfortunately, the ports are so close to one another, that it is not possible to calibrate them individually. In group deembedding, the calibration structure extends lines out from the ports, with the ports placed at the end of the lines. The reference planes are placed back at the original port locations. Since the ports are now reasonably far away from one another, an accurate calibration can be performed.
Figure 11. A  n example of where/when grouped ports and deembedding are needed. Figure 10.  Deembedding a port incorrectly. Figure 9.  The deembedding structure of a port.

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WHICH PORt SHOUld I UsE?

As has been shown, modern EM simulators offer designers a wide variety of port choices. However, the question of which port to use has not yet been answered. The answer is that there is no one right answer. Following are some guidelines that can help designers make the best decision for each situation.

Understand Currents and Ground Return

 Planar EM simulators work by solving for the currents. The key to successful port selection is to understand the current at the port. Designers should develop an intuitive sense for these currents by asking important questions. When that port is placed on a line in a multi-layer package, where is the current coming from? When current goes through the ground symbol in the schematic, where is it going in the EM simulation?

Deembed if Possible
 The point of deembedding is to give a more accurate answer and eliminate the parasitic associated with the port. Designers should deembed if its available. A beautiful ground plane on a board or chip is just begging to be the reference plane for a port. Designers should try to use an explicit ground to make sure they know from where the current is coming. After all, the parasitics are being removed by deembedding anyway, and they will have the satisfaction of knowing from where the current comes.

Understand the Parasitics of the Ports

 This may at rst sound intimidating, but it is not that difcult to do. For example, the grounding strap is an inductance and some capacitance to ground. How big is it? The calibrated and uncalibrated responses can be compared to nd out. Now the designer has a very good idea how important calibration and the parasitics are. Sometimes designers cant calibrate easily, for example, if the simulator cant run a calibration of an internal ground plane in a package. At least the designer knows roughly how much error he or she is encountering. Often, deembedding doesnt matter. Remember, people have been making measurements in the laboratory for a long time with uncalibrated probes. The point to keep in mind is that good designers have an idea when they can use them, and how much they inuence the measurements with parasitics.

Start with a Simple, Generic Problem

 Many designers try to immediately throw their 128-port monster circuit at the EM simulator. Why not start with something simple that has just a few ports and see if it makes sense? Does calibration matter? Is coupled line or grouped port deembedding needed? It only takes a few hours to develop an intuition for the problem at hand, and ultimately the designer will have some condence in the results of the nal circuit.

Fancy Port Types Have Assumptions

 This paper has discussed that there are a large variety of port types in modern simulators. Remember, they were put there to solve a problem. That means they have limitations in some situations: differential port pairs cant look at common mode issues, coupled line ports assume that the lines are parallel and group deembedded ports assume that the deembedding lines used in the calibration dont cross one another. As

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a check for some of these common mistakes, AXIEM can look at the deembedding structures to make sure they are reasonable. Implicit ports have the current return from innity, which is good for coplanar lines, and bad for an internal ground plane with no way for the current to get to innity.  The most common error made when using sophisticated ports is not understanding their underlying assumptions. The best way to understand the ports is try them out on simple problems. Users should ask themselves a few questions: Do I understand where the ground is? Do I understand where the current return is? Do I understand the underlying deembedding structure?

abOUt aUtHOR

Try Different Port Types

 Dont be afraid to experiment with different ports. An EM simulation doesnt take that long, especially if the designer starts simple. Is there any change when the port is calibrated? Is that change signicant for the real circuit? Many designers worry about the fourth digit in an answer. What are they forgetting? Their process tolerance on their board is 2 mils; it completely swamps any of the issues about which they are worried.

Dr. John M. Dunn AWR Corporation

jdunn@awrcorp.com

BIO:
John Dunn is a senior engineering consultant at AWR, where he is in charge of training and university program development. His areas of expertise include electromagnetic modeling and simulation for high speed circuit applications. Dr. Dunns past experience includes

CONClUsIONs
Planar EM simulations have certainly come a long way in 30 years. They are more powerful, exible, and accurate. Ports are an excellent example of the choices the designer now has in maximizing productivity and delivering quality designs. Properly used, the correct port can provide excellent results in a quick and efcient manner, something that could only be dreamed about several years ago.

PORt tYpEs QUICK REfERENCE tablE

Port Type
Edge port

both the worlds of industry and aca-

Deembedded
Yes

Advantages
Very accurate Flexible ground

Disadvantages
Must be at end of line No other metal nearby Parasitics should be small Must be at end of line Lines must share same reference plane Neglects common mode

demia. Prior to joining AWR, he was head of the interconnect modeling group at Tektronix, Beaverton, Oregon, for four years. Before entering industry, Dr. Dunn was a professor of electrical engineering at the University of Colorado, Boulder, for fteen years, from 1986 to 2001, where he lead a research group in the areas of electromagnetic simulation and modeling. Dr. Dunn received his Ph.D. and M.S. degrees in Applied Physics from Harvard University, Cambridge, MA, and his B.A. in Physics from Carleton College, Northeld, MN. He is a senior member of IEEE.

Internal Coupled line

No Yes

Put in middle of line and circuit Very accurate Coupling between parallel lines Differential and common modes

Differential

Not usually

Good way to force current return through the minus port Calibration includes effect of nearby line and port Typically used for gaps in lines for circuit elements

Grouped

Yes

Must have ports close together with no other ports nearby

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