Dr. Yuri Panarin's Notes on Log and AntiLog Amplifiers

Dr.
Yuri Panarin, DT021/4, Electronics

http://www.electronics.dit.ie/staff/ypanarin/DT021-notes.htm
5.1
FT221/4 Electronics 6 Log and AntiLog Amplifiers 1
6. Log and AntiLog
Amplifiers
Introduction
Log and Antilog Amplifiers are non-linear circuits in which the
output voltage is proportional to the logarithm (or exponent) of the
input.
It is well known that some processes such as multiplication and
division, can be performed by addition and subtraction of logs.
They have numerous applications in electronics, such as:
Multiplication and division, powers and roots
Compression and Decompression
True RMS detection
Process control
Two basic circuits
There are two basic circuits for logarithmic amplifiers
(a) transdiodeand (b) diode connected transistor
Most logarithmic amplifiers are based on the inherent logarithmic
relationship between the collector current, Ic, and the base-emitter
voltage, v
be
, in silicon bipolar transistors.
R
i
Q
v
i
v
o
R
i
Q
v
i
v
o
Notes
Dr. Yuri Panarin, DT021/4, Electronics
5.2
Transdiode Log Amplifier
The input voltage is converted by R1 into a current, which then flows through the
transistor's collector modulating thebase-emitter voltage according to the input
voltage.
The opampforces the collector voltage to that at the noninvertinginput, 0 V
From Ebers-Moll model the collector current is
where I
s
is saturation current, q is the charge of the electron 1.6x10
-9
Coulombs,
k is the Boltsmans constant 1.38x10
-23
J oules, T is absolute temperature, V
T
is
thermal voltage.
For room temperature 300
o
K
The output voltage is therefore
T T
V Vbe
s
V Vbe
s
kT qVbe
s c
e I e I e I I
/ / /
) 1 ( ) 1 ( = =
Vbe
s
Vbe
s c
e I e I I
6 . 38 6 . 38
) 1 ( =
= =
Is R
Vin
I R
v V
I
i
V Vbe Vout
i S i
i T
S
C
T
ln 0259 . 0 lg
3 . 2
ln
Notes
Dynamic range of Log Amp.
Test: Discuss the factors limiting the dynamic range of transdiode
log amplifier. Suggest the methods to increase dynamic range
(a) The output is a perfect log function when I
C
>>I
S
. For the small
input Voltage (i.e. current) this limits the lower end of the dynamic
range.
To extend the lower end of the dynamic range use transistor with
small I
S
., e.g. for LM394 I
S
=0.25pA
T T
V Vbe
s
V Vbe
s
kT qVbe
s c
e I e I e I I
/ / /
) 1 ( ) 1 ( = =
+
= =
S
C
T
S
S C
T be out
I
I
V
I
I I
V V V ln ln
Notes
5.3
(b) At upper end of the dynamic range the limitations is due to the
bulk resistance of base and emitter regions r
BE
. Therefore V
be
must be corrected to
output error is: actual output ideal output
Typically r
BE
is in range from 0.25 to 10
To extend the upper end of the dynamic range use transistor with
small r
BE
.
e.g. for LM394 r
BE
=0.5
C BE
S
S C
T be
I r
I
I I
V V +
+
= ln
( ) 100 / 1 ln ln
) 100 / 1 (
ln p K
I
I
K
I
p I
K r OutputErro
S
i
S
i
+ =
+
=
Notes
(c) The second factor is non-idealities of opamp, i.e. input bias
current I
OS
and offset voltage V
OS
.
this limits the lower end of the dynamic range
To extend the lower end of the dynamic range use ultra-low offset
opampsor special offset nullingtechniques.
+
=
S
OS C
T out
I
I I
V V ln
+
=
+
=
S
OS OS i
T
S
OS OS C
T out
RI
V RI V
V
RI
V RI RI
V V ln ln
Notes
5.4
For LM394 r
BE
=0.5 , and I
S
=0.25pA (at room temperature).
Estimate the log conformity error at I
C
=1mA, 100 A and 10 A.
For I
S
=1 mA the output error is 0.5 x 1mA=0.5 mV.
Therefore
this gives
Estimate the max dynamic range with-in log conformity 1%
The upper limit is I

C
=0.26mV x /0.5 =0.52 mA
The lower limit is 0.25pA / 1% =25pA.
The dynamic range is 0.52mA/25pA=0.02 x 10
9
=2 x 10
7
( ) 100 / 1 ln 26 5 . 0 p mV mV + =
% 94 . 1 % 100 ) 1 ) 26 / 5 . 0 (exp( = mV mV p
( ) mV mV r outputerro 26 . 0 % 100 / % 1 1 ln 26 + =
Notes
Thermal and Frequency stability
This equation yields the desired logarithmic relationship over a
wide range of currents, but is temperature-sensitive because of V
T
and I
S
resulting in scale-factor and offset temperature-dependent
errors.
The system bandwidth is narrower for small signals because
emitter resistance increases for small currents.
The source impedance of voltage signals applied to the circuit must
be small compared to R
i
. Omitting R
i
yields a current-input log
amp.
Using a p-n-p transistor changes the polarity of input signals
acceptable but limits the logarithmic range because of the degraded
performance of p-n-p transistors compared to n-p-n transistors
Notes
5.5
IC Log Amps.
These basic circuits needs additional components to improve the
overall performance, i.e:
to provide base-emitter junction protection,
to reduce temperature effects,
bulk resistance error and op amp offset errors,
to accept bipolar input voltages or currents,
and to ensure frequency stability.
Such circuit techniques are used in integrated log amps: AD640,
AD641, ICL8048, LOG100, 4127.
IC log amps may cost about ten times the components needed to
build a discrete-component log amp.
Nevertheless, achieving a 1% logarithmic conformity over almost
six decades for input currents requires careful design.
Notes
Temperature Compensation
=
S
i
T o
I R
v
V v
1
ln
The equation for output voltage shows that the scale factor of
the basic transdiodelog amp depends on temperature because of
V
T
and
that there is also a temperature-dependent offset because of I
S
.
Temperature compensation must correct both error sources.
Figure (next slide) shows the use of a second, matched,
transistor for offset compensation and a temperature-dependent
gain for gain compensation.
Notes
5.6
Temperature compensation in a transdiodelog amp:
a second transistor (Q2) compensates the offset current (I
S
) and
a temperature-sensitive resistor (R4) compensates the scale factor
V
T
=
1 1
ln
S
i
T o
I R
v
V v
R
1
Q
1
D
1
v
i
I
r
Q
2
R
2
R
4
R
3
v
o
+t
o
V
1
Notes
For transistors Q1 & Q2 we have
where Ir is a reference, temperature-independent, current.
The output voltage will be
Matched transistors (I
S1
=I
S2
) will cancel offset.
In order to compensate the gain dependence on temperature, R4 must be much
smaller than R3 and such that d(V
T
/R4)/dT =0.
This requires dR4/R4 =dV
T
/V
T
(=l/T).
At T =298 K, the temperature coefficient of R4 must be 3390 x 10
-6
K.
D1 protects the base-emitter junction from excessive reverse voltages.
=
1 1
1
ln
S
i
T BE
I R
v
V v
=
2
2
ln
S
r
T BE
I
I
V v
( )

+ =
+ =
+ =
i
S
S
r
T BE BE o
v
R I
I
I
R
R
V
R
R
v v
R
R
v v
1 1
2 4
3
4
3
1 2
4
3
1
ln 1 1 1
Notes
5.7
Stability Considerations
Transdiodecircuits have a notorious tendency to oscillate due to the presence of
an active element in the feedback that can provide gain rather than loss.
Consider the voltage-input transdiode. Ignoring op amp input errors, we have
and
The feedback factor for a given value of V
i
,
is determined as
Differentiating I
C
and using the fact that
Ic =V
i
/R, we obtain
indicating that can be greater than unity.

For instance, with V
i
=10 V we have = 10/0.026 =400 = 52 dB, indicating
that in the Bode diagram the |1/| curve lies 52 dB below the 0 dB axis.
Thus, the |1/| curve intersects the |a| curve at f
c
>> f
t
, where the phase shift
due to higher-order poles is likely to render the circuit unstable; an additional
source of instability is the input stray capacitanceC
n
c i n
I R V V =
BE o
V V =
BE c o n
dV dI R dV dV / / = =
T i T c
V V V I R / / = =
R
Q
v
i
v
o
Notes
Range Considerations
The transdiode circuit is compensated by means of an emitter
resistor R
E
to decrease the value of and a feedback capacitor C
F
to combat C
n
, as shown.
To investigate its stability, refer to the incremental model, where
the BJ T has been replaced by its common-base small-signal model.
Notes
5.8
Transistor parameters r
e
and r
o
depend on the operating current Ic,
where V
A
is called the Early voltage (typically ~ 100 V). C
is the base-
collector junction capacitance. Both C
and C
n
are typically ~10 pF range.
C T C T e
I V I V r / / =
C A o
I V r / =
E e d o
R r R R r r R R + = + = 2 and ) ( || || 1
KCL at the summing junction yields
Eliminating i
e
and rearranging yields
wherei
e
=-v
o
/R2 and C1=C
n
+C

+C
F
( ) ) ( ) ( 1 / 1
o n F e n n
v v C j i C C j R v + + + + +

2
2 1
1
1 1 1
R
C R j
v
R
C R j
v
F
o n
+
=
+
1 1 1
2 1
1
2 1
C R j
C R j
R
R
v
v
F
n
o
+
+
=
Notes
The | 1/b| curve has a low-frequency asymptote at R2/R1, a high-frequency
asymptote at C1/C
F
, and two breakpoints at f=fz and f= fp.
While C1/C
F
and fz are constant, R2/R1 and fp depend on the operating current
I
C
. As such, they can vary over a wide range of values.
F
p z
p
z
n
o
C R
f
C R
f
f f j
f f j
R
R
v
v
2 2
1
and
1 1 2
1
where
) / ( 1
) / ( 1
1
2 1

= =
+
+
= =
The hardest condition is when Ic =
Ic(max), since this minimizes the value
of R2/R1 while maximizing that of fp,.
As a rule of thumb, R
E
is chosen to make
R2(min)/R1 ~0.5 for a reasonably low
value of ||max,
C
F
is chosen to make fp(max) ~0.5 fc for
reasonable phase margin.
Notes
5.9
Speed of Response
As the input level is decreased, we witness an increasing dominance of fp ,
which slows down the dynamics of the circuit.
Since at sufficiently low current levels r
e
>>R
E
, we have fp=1/(2r
e
C
F
)
The corresponding time constant is = r
e
C
F
=(V
T
/I
C
)C
F
=(V
T
/ V
i
)RC
F
indicating that is inversely proportional to the input level, as expected.
For instance, with Ic = 1 nA and Cp =100 pF, we have =(26 x 10
-3
/10
-9
) x
100 x 10
-12
=2.6 ms.
It takes 4.6 for an exponential
transition to come within 1 percent of its
final value, therefore our circuit will
take about 12 ms to stabilize to within 1
percent.
This limitation must be kept in mind
when operating near the low end of the
dynamic range.
Notes
Diode-connected Log Amp
In the second circuit a BJ T connected as a diode to achieve the logarithmic
characteristic.
The analysis is the same as above for the transdiode connection, but the
logarithmic range is limited to four or five decades because thebase current adds
to the collector current.
On the pro side,
the circuit polarity can be easily changed by reversing the transistor,
the stability improves, and
the response is faster.
Notes
5.10
Input Current Inversion
The basic log amp in only accepts positive input voltages or currents.
Negative voltages or currents can be first rectified and then applied to the log
amp, but this adds the errors from the rectifier.
Alternatively, the log amp can be preceded by a precision current inverter.
The current inverter in Figure below uses two matched n-p-n transistors and a
precision op amp to achieve accurate current inversion.
The collector-base voltage in both Q1 and Q2 is 0 V, so that the Ebers-Moll
model for BJ T transistors leads to
=
=
) 1 (
) 1 (
/
2 2
/
1 1
2
1
T BE
T BE
V v
ES e
V v
ES e
e I i
e I i
where I
ES1
and I
ES2
are the respective
emitter saturation currents of Q1 andQ2.
Notes
Input Current Inversion
From circuit inspection, assuming an op amp with infinite open-loop gain but
finite input currents and offset voltage,
Solving for the output current in terms
of the input current yields

+ =
+ =
+ =
io BE BE
b o e
b i e
V v v
I i i
I i i
1 2
2 2
1 1
2 2
/
1
1
2
/
1
2
1
b ES
V V
ES
b
ES
V V
ES
ES
i o
I I e
I
I
I e
I
I
i i
T io T io

+ + =
which shows that, in order to have
small gain and offset errors, the
offset voltage must be small
compared to V
T
,
the op amp offset current must be
small compared to the input current,
and Q1 and Q2 must be matched.
Notes
5.11
Exponential Amplifiers
An exponential or antilogarithmic amplifier (antilog amp), performs the
function inverse to that of log amps:
its output voltage is proportional to a base (10, e) elevated to the ratio
between two voltages.
Antilog amps are used together with log amps to perform analog
computation.
Similar to Log Apms there are two basic circuits for logarithmic
amplifiers
(a) transdiodeand
(b) diode connected transistor
Notes
Antilog Amplifier
Interchanging the position of resistor and transistor in a log amp yields a basic
antilog amp.
The base-collector voltage is kept at 0 V, so that collector current is given by
and for negative input voltages we have:

There is again a double temperature dependence because of I
S
and V
T
.
Temperature compensation can be achieved by the same technique shown for
log amps.
( )
T BE s c
V v I i / exp
) / exp(
1 1 T i S C o
V v R I R i v = =
Notes
5.12
The input voltage is applied to a voltage divider that includes a temperature sensor. If R3
R4, v
BC1
~0V and applying to Q1
yields
where Vr is a reference voltage and we have assumed V
BE1
>>V
T
(25 mV).
In Q2 V
BC2
=0V and hence: Also:
Substituting v
BE1
and v
BE2
, and solving for v
o
,
if Ql and Q2 are matched yields
) 1 ) / (exp( =
T BE s c
V v I I
5 / ) / exp(
1 1
R V V v I i
r T BE s c
=
5 / ) / exp(
2 2 2
R V V v I i
o T BE s c
=
2 1
3 4
4
BE BE i
v v
R R
R
v =
+
)
4 3
4
exp(
5
1
R R
R
V
v
R
R
V v
T
i
r o
+

Therefore, if the temperature
coefficient of R4 is such that
dR4/R4 = dV
T
/V
T
= l/T the
voltage divider will compensate
for the temperature dependence
of V
T
. At T = 298 K, the
temperature coefficient of R4
must be 3390 x 10
-6
K.
Notes
Log-Antilog
Log and antilog amp circuits include the same elements but
arranged in different feedback configurations.
Some integrated log amps have uncommitted elements allowing us
to implement antilog amps.
Some IC (like ICL8049) are a committedonly antilog amp.
Some so-called multifunction converters (AD538, LH0094, 4302)
include op amps and transistors to simultaneously implement log
and antilog functions, or functions derived thereof, such as
multiplication,
division,
raising to a power,
or taking a root
Notes
5.13
Basic Multiplier
Multipliers are based on the fundamental logarithmic relationship
that states that the product of two terms equals the sum of the
logarithms of each term.
This relationship is shown in the following formula:
ln(a x b) =lna + lnb
This formula shows that two signal voltages are effectively
multiplied if the logarithms of the signal voltages are added.
Notes
Multiplication Stages
The multiplication procedure take three steps:
1. 1. To get the logarithm of a signal voltage use a Log amplifier.
2. 2. By summing the outputs of two log amplifiers, you get the
logarithm of the product of the two original input voltages.
3. 3. Then, by taking the antilogarithm, you get the product of the
two input voltages as indicated in the following equations:
[ ]
2 1 2 1
*
) ln( exp ) exp( V V V V V V
O O
= = =
) ln( and ) ln(
2
*
2 1
*
1
V V V V = =
) ln( ) ln( ) ln(
2 1 2 1
*
2
*
2
*
V V V V V V V
O
= + = + =
Notes
5.14
block diagram of an analog
multiplier
The block diagram shows how the functions are connected to multiply two input
voltages.
Constant terms are omitted for simplicity.
Notes
Basic Multiplier Circuitry
The outputs of the log amplifier are
stated as follows:
where K
1
=0.025 V, K
2
=RI
ebo
and R =
R1 = R2= R6.
The two output voltages from the log
amplifiers are added and inverted by the
unity-gain summing amplifier to produce
the following result:
=
2
1
1 ) 1 (log
ln
K
V
K V
in
out
=
2
2
1 ) 2 (log
ln
K
V
K V
in
out
1
1
\
|
=
=
1
]
1
1
1
\
|
+
1
1
\
|
=
2
2
2 1
1
2
2
2
1
1 ) (
ln
ln ln
K
V V
K
K
V
K
V
K V
in in
in in
sum out
Notes
5.15
This expression is then applied to the antilog amplifier; the expression for the
multiplier output voltage is as follows:
The output of the antilog (exp) amplifier is a constant (1/K2) times the product
of the input voltages.
The final output is developed by an inverting amplifier with a voltage gain of
K2.
2
2 1
2
2
2 1
2
2
2
2 1
1
1
2
1
) (
2 (exp)
ln
1
exp exp
K
V V
K
V V
K
K
V V
K
K
K
K
V
K V
in in in in
in in
sum out
out
.
!
\
|
=
=
.
!
\
|
=
.
!
\
|
=
2 1
2
2 1
2 in in
in in
V V
K
V V
K Vout =

=
Notes
Four-Quadrant Multipliers
Four-Quadrant Multiplier is a device with two inputs and one
output.
Typically k =0.1 to reduce the possibility of output overload.
It is called four-quadrant since inputs and output can be positive or
negative.
An example device is Motorola MC1494, powered by 15 V
power supply
V
out
V
2
V
1
2 1
V V k V
out
=
Notes
5.16
Multiplier Applications
Alongside the multiplication Multipliers have many uses
such as:
Squaring
Dividing
Modulation / demodulation
Frequency and amplitude modulation
Automatic gain control
Notes
AM & Squaring
Amplitude Modulation
Squaring circuit
V
RF
V
out
V
LF
V
out
V
in
Notes
5.17
Di vider by feedback
Divider
Vout Vx K Vm =
2
2
R
Vm
i =
1
1
R
Vin
i =
Vout Vx K Vm Vin = =
Vx K
Vin
Vx K
Vm
Vout
=
Square root: If Vout Vx =
Vout K
Vin
Vout
=
K
Vin
Vout

=
Notes
Test problems
1. Sketch the diagram for transdiodelog amplifier and define its gain.
2. Describe the stability problem of this circuit.
3. Suggest the model to improve stability range. Use the BJ T common base
small-signal model shown on the Figure.
4. In this circuit let R=10 k, 1 mV <Vi < 10 V, C +Cn =20pF, V
A
=100 V,
r
d
= 2 M, and f
1
=1 MHz. Find suitable values for C
f
and R
E
.
5. For this circuit, find the time needed for output voltage to come within 1 % of
its final value (in worst case).
6. Discuss the factors limiting the dynamic range of transdiode log amplifier.
Suggest the methods to increase dynamic range
7. For LM394 r
s
==0.5 , and I
S
=0.25pA (at room temperature). Estimate the
log conformity error at IC=1mA, 100 A and 10 A.
8. Estimate the max dynamic range with-in log conformity 1%
Notes
5.18
Transistor parameters r
e
and r
o
depend on the operating current Ic,
where V
A
is called the Early voltage (typically ~ 100 V). C
is the base-
collector junction capacitance. Both C
and C
n
are typically ~10 pF range.
C T C T e
I V I V r / / =
C A o
I V r / =
E e d o
R r R R r r R R + = + = 2 and ) ( || || 1
KCL at the summing junction yields
Eliminating i
e
and rearranging yields
wherei
e
=-v
o
/R2 and C1=C
n
+C

+C
F
( ) ) ( ) ( 1 / 1
o n F e n n
v v C j i C C j R v + + + + +

2
2 1
1
1 1 1
R
C R j
v
R
C R j
v
F
o n
+
=
+
1 1 1
2 1
1
2 1
C R j
C R j
R
R
v
v
F
n
o
+
+
=
Notes
Analogue Multipliers
In analog-signal processing the need often arises for a circuit that
takes two analog inputs and produces an output proportional to
their product.
Such circuits are termed analog multipliers.
There are two different approaches to analog multipliers
One of them is based on log/antilog amplifiers
Another utilizes the exponential transfer function of bipolar
transistors (Gilbert cell) .
In following sections we consider applications of IC multipliers
based on log/antilog amplifiers
Notes
5.19
Log/Antilog Converter
The log and antilog functions can be combined in slide rule fashion to
perform such operations as
multiplication,
division,
exponentiation, and
root computation.
With the help of simple op amp circuitry it can be configured for
additional operations, such as
multifunction conversion and
non-integer exponent approximations,
coordinate conversion, and
true rms-to-dc conversion.
Although now the tendency is to implement these functions digitally,
considerations of cost and speed often require their implementation in
analog hardware.
Notes
Multifunction Converters
A multifunction converter (4302) is a circuit that accepts three inputs, Vx, Vy, and Vz
and yields an output Vo of the type: m
x
z
y o
V
V
KV V

=
where K is a suitable scale factor (typically K = 1),
and m is a user-programmable exponent, in the
range 0.2 <m <5
where K is a suitable scale
factor (typically K = 1),
and m is a user-
programmable exponent, in
the range 0.2 <m <5
By proper selection of
input configuration and
exponent, the circuit can be
programmed for a variety
of operations:
etc. / 1 , , , / ,
x
n
z
m
z z x y x o
V V V V V V V V =
Notes
5.20
4302 block diagram
The circuit diagram of 4302 is shown with frequency compensationand reverse-
polarity protection omitted for simplicity.
By op amp action, we have
x
x
x
R
V
I =
y
y
y
R
V
I =
z
z
z
R
V
I =
o
o
o
R
V
I =
The voltages at pins 6
and 12 are proportional
to the log ratios of the
corresponding currents:
=
x
z
T
I
I
V V ln
6
=
y
o
T
I
I
V V ln
12
Notes
m=1
1. V
6
and V
12
are derived directly from V
11
so that V
6
=V
12
=V
11
.
By this implies I
z
/I
x
= I
o
/I
y
that is,
V
z
/V
x
= V
o
/V
y
.
Thus,
( ) ( )
y o T x z T
I I V V I I V V / ln / ln
12 6
= = =
=
x
z
y o
V
V
V V
Notes
5.21
m<1 and m>1
2. m < 1: V
6
is derived directly from V
11
while V
12
is derived from V
11
via a voltage
divider, V
12
=mV
11
, where m=R2/(R1+R2).
Letting V
12
=mV
6
yields ,
that is,
This, in turn, yields ,
that is,
3. m > 1: V
12
is derived directly from V
11
while V
6
is derived from V
11
via a voltage
divider, V
6
=(1/m)V
11
, where (1/m)=R2/(R1+R2).
Letting V
6
=V
12
/m yields
m
x z x z y o
I I I I m I I ) / ln( ) / ln( ) / ln( = =
m
x z y o
I I I I ) / ( ) / ( =
m
x z y o
V V V V ) / ( ) / ( =
1
2 1
2
where , <
+
=
=
R R
R
m
V
V
V V
m
x
z
y o
1
2
2 1
where , >
+
=
=
R
R R
m
V
V
V V
m
x
z
y o
Notes
Multiplication and Division
Notes
5.22
Exponentiator - Root Extractor
Notes
4302 Adjustment
In each configuration the scale factor is calibrated by setting the input(s) to 10 V
and adjusting Ry for Vo = 10 V.
To maintain the accuracy of division at low signal levels, the input offset errors
of the X and Z op amps must be nulledas follows
1. With Vz =Vx =10.0 V, adjust R1 for Vo = 10.0 V.
2. With Vz = Vx =100 mV, adjust R2 for Vo = 10.0 V.
3. With Vx =100 mV and Vz = 10.0 mV, adjust R3 for Vo 1.00 V.
Repeat the procedure, if necessary.
The 4302 provides the following accuracies:
multiply, 0.25 percent;
divide, 0.25 percent;
square, 0.03 percent;
square root, 0.07 percent.
Notes
5.23
Test (2004 Suppl.)
The circuit diagram of 4302 is shown in Fig.2 with frequency compensation and reverse-
polarity protection omitted for simplicity. Assume that R
X
= R
Y
= R
Z
= R
O
. The pins 6,
11, 12 are connected as follows where R
1
=R
2
=15 k. Find the expression for Output
Voltage V
O
. [13 marks]
(c) Make appropriate changes/connections to produce expression for Output Voltage
[5 marks]
3
2 1
/ 5 V V V
o
=
A
Y
A
O
13
Q
O
Q
Y
i
O
i
Y
2
A
Y
A
O
7
Q
X
Q
Z
i
X
i
Z
12
1
6 11
V
Y
V
Z
V
X
R
Z
R
X
R
Y
R
O
V
O
Notes
4302 Test
1. m=1/3, pins 6 and 11 are short circuit, pin 12 volt. divider
2. m=R2/(R1+R2)=1/3, 3 R2=R1+R2, R1=2 R2
3
2 1
/ 5 V V V
o
=
13
7
14
1
10
12
3
2
6 11
V
Y
V
Z
V
x
V
o
15V -15V
4302
m
x
z
y o
V
V
V V
=
R1 R2
3. V
1
is connected to pin V
Z
4. V
2
is connected to pin V
X
5. pin V
Y
is connected to +5 V
6. R3=2R4 is voltage divider for +5V
R3
R4
+15V
+5V
Notes
5.24
4302 Test
13
7
14
1
10
12
3
2
6 11
V
Y
V
Z
V
x
V
o
15V -15V
4302
m
x
z
y o
V
V
V V
=
4
1
2
/ 16 V V V
o
=
4302 Test
13
7
14
1
10
12
3
2
6 11
V
Y
V
Z
V
x
V
o
15V -15V
4302
m
x
z
y o
V
V
V V
=
2 1
/ 2 V V V
o
=
4302 Test
13
7
14
1
10
12
3
2
6 11
V
Y
V
Z
V
x
V
o
15V -15V
4302
m
x
z
y o
V
V
V V
=
2 1
2 V V V
o
=
4302 Test
13
7
14
1
10
12
3
2
6 11
V
Y
V
Z
V
x
V
o
15V -15V
4302
m
x
z
y o
V
V
V V
=
2
2
3
1
/V V V
o
=

Dr. Yuri Panarin's Notes on Log and AntiLog Amplifiers

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Dr. Yuri Panarin's Notes on Log and AntiLog Amplifiers

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Dr.

Yuri Panarin, DT021/4, Electronics

The upper limit is I

indicating that can be greater than unity.

and for negative input voltages we have:

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