You are on page 1of 20

Controller Design Based on

Transient Response Criteria


C
h
a
p
t
e
r

1
2
C
h
a
p
t
e
r

1
2
Lecturer: Dr. Abrar Muslim, ST. M.Eng.
Reference: Edgar et al. 2004
Desirable Controller Features
1. Quick responding
2. Adequate disturbance rejection
3. Insensitive to model, measurement errors
C
h
a
p
t
e
r

1
2
4. Avoids excessive controller action
5. Suitable over a wide range of operating conditions
Impossible to satisfy all 5 unless self-tuning. Use
optimum sloppiness"
C
h
a
p
t
e
r

1
2
Chapter 12 Chapter 12
Chapter 12 Chapter 12
Chapter 12 Chapter 12
Alternatives for Controller Design
1.Tuning correlations - limited to 1st order plus dead
time
2.Closed-loop transfer function - analysis of stability
("root locus" - does not include quality of control)
3.Repetitive simulation (requires computer software
C
h
a
p
t
e
r

1
2
3.Repetitive simulation (requires computer software
like MATLAB and Simulink)
4.Frequency response - stability and performance
(requires computer simulation and graphics)
5.On-line controller cycling (field tuning)
C
h
a
p
t
e
r

1
2
Controller Synthesis - Time Domain
Frequency domain techniques will be discussed in a later
lecture. Time-domain techniques can be classified into
two groups:
(a) Criteria based on a few points in the response
(b) Criteria based on the entire response, or integral
criteria
C
h
a
p
t
e
r

1
2
criteria
Approach (a): settling time, % overshoot, rise time, decay
ratio (Fig. 5.10 can be viewed as closed-loop response)
Several methods based on 1/4 decay ratio have been
proposed: Cohen-Coon, Ziegler-Nichols
Process model
( ) (1st order)
1
s
Ke
G s
s

=
+
C
h
a
p
t
e
r

1
2
Chapter 12 Chapter 12
Chapter 12 Chapter 12
Approach (b)
1. Integral of square error (ISE)
2. Integral of absolute value of error (IAE)
3. Time-weighted IAE
[ ]

=
0
2
dt ) t ( e ISE

=
0
dt ) t ( e IAE

= dt ) t ( e t ITAE
C
h
a
p
t
e
r

1
2
Pick controller parameters to minimize integral.
IAE allows larger deviation than ISE (smaller overshoots)
ISE longer settling time
ITAE weights errors occurring later more heavily
Approximate optimum tuning parameters are correlated
with K, , (Table 12.3).

0
C
h
a
p
t
e
r

1
2
Tuning Method - Direct Synthesis
( G includes G
m
, G
v
)
1. Specify closed-loop response (transfer function)
G G
G G
Y
Y
C
C
sp
+
=
1
d
sp
Y
Y

C
h
a
p
t
e
r

1
2
2. Need process model, G (= G
P
G
M
G
V
)
3. Solve for G
c
,
d
sp
Y

=
d
sp
d
sp
C
Y
Y
Y
Y
G
G
1
1
C
h
a
p
t
e
r

1
2
Example: Second Order Process with PI Controller
PI: or
( )( ) 1 1
) (
2 1
+ +
=
s s
K
s G

( )
s
1 s K
) s ( G
I
I C
C

+
=

+ =
s
1
1 K ) s ( G
I
C C
C
h
a
p
t
e
r

1
2
Let

=
1
, where
1
>
2
Canceling terms,

s
I
( )
1 2
1
C
sp C
KK Y
Y s s KK
=
+ +
C
h
a
p
t
e
r

1
2
Check gain (s = 0)
2
nd
order response with...
Select K
c
to give
1 2
C
K K

= and
1
2
1
2
C
K K

=
5 . 0 4 . 0 =
C
h
a
p
t
e
r

1
2
(overshoot)
Specify Closed Loop Transfer Function
C
h
a
p
t
e
r

1
2
Specify Closed Loop Transfer Function
(12 6)
1
s
sp c
d
Y e
Y s


=


+

(first order response, no offset)
( )
c
speed of response =
let
(12-3b)
1
2
1
sp c
d
s
Y
Y s


=


+

( )
s
Y
Y
Y
Y
G
G
d
sp
d
sp
C

=
1
1
1
C
h
a
p
t
e
r

1
2
PID Controller for FOPTD Process:
1
1
(1 )
2
( )
1
( 1)(1 )
2
s
K s
Ke
G s
s
s s


=
+
+ +
( )( )
( )
( )( )
( )s K
s s
s
s
s
s
s K
s s
c
c
c

+
+ +
=
+

+ +
=
2
2
1 1
1
2
1
1
1
2
1
2
1
2
1 1
1
1
C
h
a
p
t
e
r

1
2
First-Order-plus-Time-Delay (FOPTD) Model
Consider the standard first-order-plus-time-delay model,
( )

(12-10)
1
s
Ke
G s
s

=
+
%
Substituting Eq. 12-10 into Eq. 12-9 and rearranging gives a PI
controller, with the following controller
settings:
( )
1 1/ ,
c c I
G K s = +
1
, (12-11)

c I
c
K
K
= =
+
C
h
a
p
t
e
r

1
2
1
2 1


+

Second-Order-plus-Time-Delay (SOPTD) Model
Consider a second-order-plus-time-delay model,
( )
( )( )

1 2
(12-12)
1 1
s
Ke
G s
s s

=
+ +
%
C
h
a
p
t
e
r

1
2
1
1
1
1
2 1
1
(12 29)
2
2( ) 1
2 1
c I D
c
K
K


+


= = + =

+
+


Substitution into Eq. 12-9 and rearrangement gives a PID
controller in parallel form,
1
1 (12-13)

c c D
I
G K s
s

= + +


where
1 2 1 2
1 2
1 2
1
, , (12-14)

c I D
c
K
K
+
= = + =
+ +
C
h
a
p
t
e
r

1
2
Example 12.1
Use the DS design method to calculate PID controller settings for
the process:
( )( )
2
10 1 5 1
s
e
G
s s

=
+ +
C
h
a
p
t
e
r

1
2
Consider three values of the desired closed-loop time constant:
. Evaluate the controllers for unit step changes in
both the set point and the disturbance, assuming that G
d
= G.
Repeat the evaluation for two cases:
1, 3, and10
c
=
a. The process model is perfect ( = G).
b. The model gain is = 0.9, instead of the actual value, K = 2.
Thus,
G
%
K
%
( )( )
0.9
10 1 5 1
s
e
G
s s

=
+ +
%
C
h
a
p
t
e
r

1
2
( )( )
10 1 5 1 s s + +
The controller settings for this example are:
3.75 1.88 0.682
8.33 4.17 1.51
15 15 15
3.33 3.33 3.33
1
c
= 3
c
= 10
c
=
( )
2
c
K K =
%
( )
0.9
c
K K =
%

D
C
h
a
p
t
e
r

1
2
The values of K
c
decrease as increases, but the values of
and do not change, as indicated by Eq. 12-14.

c

I

D
C
h
a
p
t
e
r

1
2
Figure 12.3 Simulation results for Example 12.1 (a): correct
model gain.
C
h
a
p
t
e
r

1
2
Chapter 12 Chapter 12
Chapter 11 Chapter 11

You might also like