Anshul Bansal

620 Peachtree Street, Apt 412, Atlanta GA 30308

(404) 667-3654 anshulbansal@gatech.edu
Objective
Seeking a new-grad full time position in VLSI design or computer architecture utilizing my skills and knowledge in
the eld
Education
Georgia Institute of Technology Atlanta, GA, U.S.A. Masters in Electrical and Computer Engineering,
December 2014 GPA: 4.0 Coursework: Advanced VLSI Systems Advanced Computer Architecture Digital
Systems Test Advanced Digital Systems Testing Advanced Micro-architecture Advanced Topics in Memory
Systems Parallel and Distributed Computer Architecture Advanced Operating System
PEC University of Technology Chandigarh, India Bachelors in Electronics and Electrical Communication
Engineering, 2013 GPA: 9.67/10.00 Department Rank: 2/74
Skills
Programming Languages: C, C++, Verilog, Python, Tcl
Simulation Tools: PrimeTime, Virtuoso, LabView, MultiSim
Others: GNU/Linux, macsim, USIM, PinTool, L
A
T
E
X, Robot Operating System(ROS)
Internships
Qualcomm CDMA Technologies (QCT), San Diego (May-Aug 2014)
Digital Hardware Intern
Worked with the SoC implementation team in performing timing constraint checks at chip level
Validated CMS constraints for some hard macros for top at STA runs
Created Tcl scripts for timing checks for various blocks in PrimeTime
Debugged issues related to unconstrained or no-paths by co-relating DC netlist and timing libs
One of the top 10 nalists in the company wide intern IdeaQuest event
University of Bremen, Germany (June-July 2012)
Research Assistant
Assisted in the development of an autonomous sailing boat
Interfaced inertial measurement sensors and performed on-chip data ltering using Kalman lter
Multiplexed the GPS receiver with the other sensors to get GPS data and track co-ordinates
Indian Institute of Technology (IIT) Madras, India (Jan-May 2012)
Research Assistant
Worked on Pioneer P3-DX and iRobot Create robot development platforms
Developed robot control through human gestures using Microsoft XBOX Kinect
Indian Institute of Technology (IIT) Bombay, India (June-July 2011)
Summer Intern
Developed a robot aided industrial warehousing solution
Established co-ordination among robots using the Zigbee protocol
Projects
Staged memory scheduling for heterogeneous architectures
Thread-aware prediction based memory scheduling
Deductive fault simulator to simulate stuck-at-faults in a circuit
Multi-level cache simulator with stride prefetch
Dynamic scheduler based on Tomasulos Algorithm with Reorder Buer
SRAM system design in Virtuoso while focusing on power-performance optimization
Undergraduate Thesis
TeRo: Telepresence Robot
Developed a telepresence solution based on Intel Atom Kit SYS9400-ECX. The system used a ROS
environment to communicate and transfer data
Implemented remote control of the robot using gestures by employing Microsoft XBOX Kinect as the sensor
Scholarships
DAAD WISE Scholarship 2012, for Summer Internship at University of Bremen, Germany
Merit Scholarship, in under-graduation for excellent academic performance
Leadership Roles
Vice President, Vyom (Colleges Annual Technical Fest), 2013
General Secretary, Colleges Robotics Society, 2013
Keywords: VLSI, electrical, ECE, masters, gradutate, new grad, design, architecture, implementation, PrimeTime,
ASIC, STA, timing analysis, verication, validation