Professional Documents
Culture Documents
DOI 10.1007/s10836-011-5245-4
Received: 2 September 2010 / Accepted: 17 August 2011 / Published online: 10 September 2011
# Springer Science+Business Media, LLC 2011
1 Introduction
Field Programmable Gate Arrays (FPGAs) are much
appreciated by designers because they offer low cost, high
performance, fast time to market and great flexibility for the
design. Among the available technol7ogies, SRAM-based
FPGAs are well suited for space and avionics applications,
this due to their on-site reconfiguration, feature which is not
available in Application Specific Integrated Circuits
(ASICs). Although ASICs offer better performances and
require less energy to operate, they are not the most suitable
candidates for small production markets such as space
and avionics fields, this because of their initial production
cost and their lack of reconfiguration.
Despite the previously mentioned attractive characteristics, designers are reluctant to use SRAM-based FPGAs
Responsible Editor: F. Vargas
G. Foucard (*) : P. Peronnard : R. Velazco
Laboratoire TIMA,
Grenoble, France
e-mail: gilles.foucard@imag.fr
628
Ethernet
LEON2 IP
Latchup Mgt
SRAM
Chipset FPGA
DUT
User Design
The specificity of SRAM-based FPGAs is the configuration memory used to configure all the DUT resources. In
the case of the DUT chosen for this work, the memory size
is 4,082,592 bits. Each resource has its configuration bit
located next to it, therefore these bits are spread all over the
core area.
A bit-flip in the configuration memory may have a
serious impact on the design itself, for instance, changing
the behavior of the application. Moreover faults in the
configuration memory will be permanent remaining until
the next reconfiguration. As significant examples can be
mentioned:
&
&
SRAM
629
Resources
Single
Slice FF
LUTs
Slices
798
2176
1434
Duplex
7%
21%
28%
1064
4397
2607
TMR
10%
42%
50%
1330
6831
3868
X-TMR
12%
66%
75%
2199
8189
4543
21%
79%
88%
3 THESIC+ Tester
4 Tested Applications
&
&
&
&
&
&
Run TEST
Close shutter
data
loade
DUT bitstream to
THESIC+
Configure DUT
Open shutter
Run application
DES3
DES
Single
no
DES3
DES3
data
Output
error?
comparator
loader
yes
DES3
DES3
Close shutter
Duplex
data
loader
DES3
DES3
DES3
DES3
DES3
DES3
TMR
Store application
outputs
comparator
Store DUT
Readback
Results to
computer
630
Run TEST
&
DUT bitstream to
THESIC+
&
Injection vectors
to THESIC+
Configure DUT
Start application
Halt application
Readback FPGA
Fault
injection
Inject fault in
readback
Configure FPGA
Resume
application
Store application
outputs
Results to
computer
encrypts the data and the second one does the reverse
process. Consequently the output data should be the same
as the input one.
The second application, named duplex, is composed of
two identical single applications. Thus, 2 chains of DES3
process the same data at the same time. A comparator tells
whether the two outputs are the same (output value 0) or
if they are different (output value 1).
The third application, named TMR, is composed of
three single chains doing the same calculation. A majority
voter compares the three outputs and provides the status of
the result through five significant values:
&
&
&
5 Test Methodologies
This section presents the methodologies used for radiation
ground testing and for fault injection campaigns.
5.1 Heavy Ion Campaign
The radiation ground testing campaign was performed at
the Heavy Ion Facility (HIF) located in Louvain-la-Neuve
(Belgium) [1, 2]. This cyclotron has a shutter which allows
stopping the particles beam before it reaches the DUT. This
feature allows performing some mandatory operations on
the DUT which must be done off-beam. For instance,
1 way error
3 way error
Critical errors
Nb. of runs
Total fluency
Carbon
Argon
51
1,278
0
1
0
3
0
34
187,469,275
750,688,226
158,543
437,095
631
Particle
Non-critical error
TMR failure
Critical errors
Carbone
Argon
7.81
1.25
N/A
1,595
N/A
532
N/A
46
6 Experimental Results
6.1 Heavy Ion Campaigns Results
The radiation test campaign provided results on the
behavior of TMR application when exposed to the selected
particles beams: Carbon and Argon. Four types of errors
were considered and detected:
&
&
Particle
Non-critical error
TMR failure
Critical errors
Carbone
Argon
3,108
342
N/A
437,094
N/A
145,698
N/A
12,855
632
Table 5 Percentage for each type of error according to the number of SEUs in the configuration memory
Particle
1 way error
Carbon
Argon
51
1,278
&
&
10.83%
6.08%
3 way error
Critical errors
Number of RB SEUs
0
1
0
3
0
34
471
21030
0%
0.005%
0%
0.014%
0%
0.16%
Detected faults
Critical errors
Number of runs
Single
Duplex
TMR
X-TMR
N/A
4,853
14,564
N/A
N/A
N/A
237
N/A
1,339
141
319
191
0.50%
2.35%
3.55%
N/A
267,438
212,530
426,217
592,457
0%
2.28%
3.42%
0%
0%
0%
0.06%
0%
0.50%
0.07%
0.08%
0.03%
References
1. Berger G, Ryckewaert G, Harboe-Sorensen R, Adams L (1996)
The heavy ion irradiation facility at CYCLONE - a dedicated SEE
beam line. IEEE NSREC Workshop
2. Berger G, Ryckewaert G, Harboe-Sorensen R (1997) CYCLONE
A Multipurpose Heavy Ion, Proton and Neutron SEE Test Site,
RADECS Workshop, 5155
3. Caffrey M, Graham P, Johnson E, Wirthlin M (2002) Single-event
upsets in SRAM FPGAs. in Proc. of the military and aerospace
applications of programmable devices Intl conference (MAPLD)
4. Faure F, Peronnard P, Velazco R (2002) Thesic+: A flexible system
for see testing, in Proc. of RADECS
5. Kastensmidt FL, Sterpone L, Carro L, Reorda MS (2005) On the
optimal design of triple modular redundancy logic for SRAMbased FPGAs, Proc. Of Design, Automation and Test in Europe
(DATE) 2005. 2:12901295
6. Koga R, George J, Swift G, Yui C, Edmonds L, Carmichael C,
Langley T, Murray P, Lanes K, Napier M (2004) Comparison of
Xilinx Virtex-II FPGA SEE sensitivities to protons and heavy
ions. IEEE Trans Nucl Sci 51(5):28252833
7. Ma T, Dressendorfer P (1989) Ionizing radiation effects in MOS
devices and circuits. Wiley, New York
8. Manuzzato A, Gerardin S, Paccagnella A, Sterpone L, Violante
M (2008) Effectiveness of TMR-based techniques to mitigate
633
alpha-induced SEU accumulation in commercial SRAM-based
FPGAs. Nuclear Science, IEEE Transactions on 55(4):1968
1973
9. Mersenne twister: http://www.math.sci.hiroshima-u.ac.jp/~m-mat/
MT/emt.html
10. Morgan K, Caffrey M, Graham P, Johnson E, Pratt B, Wirthlin M
(2005) SEU-induced persistent error propagation in FPGAs. IEEE
Trans Nucl Sci 52(6):24382445
11. Normand E (1966) Single-event effects in avionics. IEEE Trans
Nucl Sci 43(2):461474
12. Opencores: http://www.opencores.org/project,des
13. Pouget V, Fouillat P, Lewis D (2006) Using the SEEM software for
SET testing and analysis, Radiation effects in embedded systems,
to be published by Springer
14. Pouget V, Wan D, Jaulent P, Douin A, Lewis D, Fouillat P (2006)
Recent developments for SEE testing at the ATLAS laser facility.
Proc. of 15th Single-Event Effects Symposium
15. Pouget V, Douin A, Lewis D, Fouillat P, Foucard G,
Peronnard P, Maingot V, Ferron JB, Anghel L, Leveugle R,
Velazco R (2007) Tools and Methodology Development for
Pulsed Laser Fault Injection in SRAM-Based FPGAs, 8th
Latin American Test Workshop (LATW 2007), [Cusco (Peru),
1114].
16. Xilinx (2005) Virtex-II platform FPGAs: complete data sheet,
http://www.xilinx.com, March
17. XTMR Tool User Guide (2004) Xilinx User guide UG156
Gilles Foucard received M.S.E. and Ph.D degrees in MicroElectronics and Computer Science from the University of Grenoble
(France) in 2005 and 2010 respectively. He is currently doing a PostDoc in TIMA Laboratory (Grenoble, France) where he has in charge
the writing of a handbook devoted to help designers choosing and
implementing mitigation techniques in their applications.
Paul Peronnard received a Ph.D degree in Micro-Electronics and
Computer Science from the University of Grenoble (France) in 2010.
He is currently doing a Post-Doc in TIMA Laboratory (Grenoble,
France) where he has in charge the HW/SW development of a
platform devoted to evaluate the sensitivity of commercial SRAM
memories to high-altitude natural radiation.
Raoul Velazco is with the CERN (French Research Agency) since
1984, where he is Director of Researches, Dr. Raoul Velazco is the
Co-Leader at TIMA Laboratory (Grenoble, France) of ARIS research
group: Architectures for complex and Robust Integrated Systems.
His main research topics are the study of the effects of radiation on
integrated circuits, the development of test methods and tools for
complex circuits (processors, FPGAs, ASICs, microcontrollers, etc.)
and the design and exploitation of experiments devoted to operate at
high altitude (balloons, airplanes, satellites) with the goal of putting in
evidence the faults induced by the energetic particles (present in the
Earths atmosphere and in space) and explore the efficiency of
hardware and/or software fault tolerance solutions. He has more than
180 publications, 36 of them in the prestigious IEEE Transactions on
Nuclear Science.