Professional Documents
Culture Documents
: 01
Aim: learning to use capture schematic and simulation command
Theory:
About capture:
Captures session log records generated reports and netr lists, as well as
warning and error messages.
Capture has easy to use commands available through standard pull down
menus and access keys.
Customize your working en vironment through commands available on the
option menu.
Get complete and detailed information through captures online help.
Design and schematics:
A design tores schematics folders,schematics pages and parts in a single file.
A schematics folder contains one or more schematics pages and the design
cache archiver all parts An symbol used in the design.
Hierarchial parts and pins establish hierarchial connectivity off pages
conectors establish connectivity with a schematic folder.
A complex hierarchy may map many hierarchial blocks to a single schematic
folder. A simple hierarchy maps only one hierarchial block to the schematic
folder.
Printing and plotting:
You can print out a schematic page or part from the schwmatic page
editor,part editor or project maneger.
Print multiple items at once by selecting them in the project manager before
printing.
Customize the look of your print output using the preferences command.
Set up printer options using the print setup command or the setup button
with print dialog box.
Processing your design:
Use annotate to assign new part reference or to update existing part
reference.
Use design rule checks for design rule violation.capture provides an ERC
matrix to configure test criteria.capture also places markers to help you find
the errors.
Create netlist using one of lower different formats.
Use back annoteate and a swap file to transfer packaging information to your
schematic design from another tool.
Use cross reference to bill of materials to create reports on your design.
Place bit maps such as your companys logo, directly on parts or schematic
pages.
You can edit the size ,colour of all graphic objects. You can also change the fill
pattern of enclosed objects like rectangle ellipse and polygons.
Navigation designs:
Use captures project manager to easily navigate your design.
Designs in the file view show instances of schematic pages and parts bur not
hierarchy.
Design in hierarchy view show occurrences of each instances of schematic
pages and parts. The design hierarchy is shown in this view.
Use the project manager to browse for and edit parts ,nets hierarchial parts
off-page connectors and DRC error markers.
Editing a schematic page:
Captures editing commands are easily accessible through standerd
menus,shortcut keys and popups menus.
Select multiple objects at once by pressing the left mouse button and
dragging the pointer across an area .Select multiple objects one at a time by
pressing the CTRL key as you select each point.
Drag objects using the mouse.copy objects using the copy and paste
commands or by dragging the objects with the CTRL key pressed.
Using component information system:
Orcad component information system provides an interface to your database
of approved parts and other data.
Use the part database explorer to display the databases parts that are
available.
You can place parts from a local or client server database,or from resources
on the internet.
EXOR GATE:this gate can have two or more input but only one output.7486 is the
two input Ex-or gate.its not a basic gate hence its operation can be performed
using other gates.
Y=AB+AB
EXPERIMENT NO.: 03
AIM:
To create the simulation profile for JK and SR flip flops.
THEORY:
In electronics, a flip flop or latch is a circuit that has two stable states andcan be
used to store state information. A flip flop is a bistable multivibrator.
A synchronous SR flipflop can be made by adding a secondlevel of nand gate to
the inverted SR latch or a second level of and gate to the direct SR latch. The
extra gates further invert the inputs so the simple SR latch becomes a gated SR
latch(and a simple SR latch would transform into a gated SR latch with inverted
inabled).
With clock pulse high the signals can pass through input gates to the
encapsulated latch; all signal combination exept for (0,0)=hold then immediately
reproduce on the (Q,Q) output i.e. the latch is transparent.
With clock pulse low the latch is closed(opaque) and remains in the state it was
left the last time clock pulse was high.
Truth table of SR flipflop:
S
Q2
Q1
Q1
no change
toggle
Q2
no change
EXPERIMENT NO.: 05
AIM:
To design and simulate a full adder and subtractor circuit.
THEORY:
FULL ADDER
A full adder is acombinational circuit that forms the arithematic sum of input;it
consists of three inputs
And two outputs. A full adder is useful to add three bits at a time but a half adder
cannot do so. In full adder the sum output will be taken from X-OR gate and carry
output will be taken from OR gate.
TRUTH TABLE:
A
sum
carry