Ajay Kumar Garg Engineering College, Ghaziabad

Department of EN
NOTES FOR SUBJECT: POWER ELECTRONICS
SUBJECT CODE: EEE 602
PREPARED BY: VANI BHARGAVA, NUPUR MITTAL
Evaluation Scheme
Subject
Code
EEE602

Name of
Subject
Power
Electronics

Periods
L T P
3
1
2

Evaluation Scheme
CT TA TOTAL ESC
30
20
50
100

Subject
Total
150

Credit
4

UNIT I: syllabus: Power semiconductor Devices:

Power semiconductor devices their symbols and static characteristics
Characteristics and specifications of switches, types of power electronic circuits
Operation, steady state and switch characteristics & switching limits of Power Transistor
Operation and steady state characteristics of Power MOSFET and IGBT
Thyristor Operation V- I characteristics, two transistor model, methods of turn-on
Operation of GTO, MCT and TRIAC

UNIT II: syllabus: Power Semiconductor Devices(Contd)

Protection of devices.
Series and parallel operation of thyristors
Commutation techniques of thyristor
DC-DC Converters:
Principles of step-down chopper, step down chopper with R-L load Principle of step-up chopper,
and operation with RL load, classification of choppers

UNIT III: syllabus: Phase Controlled Converters

Single phase half wave controlled rectifier with resistive and inductive loads, effect of
freewheeling diode.
Single phase fully controlled and half controlled bridge converters.
Performance Parameters
Three phase half wave converters
Three phase fully controlled and half controlled bridge converters, Effect of source impedance
Single phase and three phase dual converters

UNIT IV: syllabus : AC Voltage Controllers

Principle of On-Off and phase controls
Single phase ac voltage controller with resistive and inductive loads
Three phase ac voltage controllers (various configurations and comparison only)
Single phase transformer tap changer.

Cyclo Converters
Basic principle of operation, single phase to single phase, three phase to single phase and three
phase to three phase cyclo converters, output voltage equation

UNIT V: syllabus : Inverters

Single phase series resonant inverter
Single phase bridge inverters
Three phase bridge inverters
Voltage control of inverters
Harmonics reduction techniques
Single phase and three phase current source inverters

Contents
UNIT I: Semiconductor Devices
1.1 Power Diode
1.2 Bipolar Junction Transistor (BJTO)
1.3 Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
1.4 Silicon Controlled Rectifier (SCR)
1.5 Insulated Gate Bipolar Transistor (IGBT)
1.6 TRIAC
1.7 GTO
UNIT II: Unit II Power Semiconductor Devices (contd.) & DC-DC Converters
2.1 Thyristor Protection
2.2 Series and Parallel Operation of Thyristor
2.3 Commutation Techniques of Thyristor
2.4 DC-DC Converters: Step Down Chopper
2.5 Step Up Chopper
2.6 Classification of Choppers
UNIT III: Phase Controlled Converters
3.1 Single Phase Half Wave Controlled Converter
3.2 Single Phase Full Wave Controlled
3.3 Three Phase Half wave Controlled Rectifier
3.4 Three Phase Full Wave Controlled Rectifier
3.5 Performance Parameters of Converters
3.6 Dual Converters
3.7 Effect of Source Impedance

UNIT IV: AC Voltage Controllers

4.1 Principle of On-Off Control & Phase Control
4.2 Single Phase AC Voltage Controller
4.3 Three Phase AC Voltage Controller (Configurations & Comparison)
4.4 Single Phase Transformer Tap Changer
4.5 Single Phase to Single Phase Cycloconverter
4.6 Three Phase to Single Phase Cycloconverter
4.7 Output Voltage Equation of Cycloconverter
UNIT V:
5.1 Single Phase Bridge Inverter
5.2 Three Phase Bridge Inverter
5.3 Voltage Control of Inverters
5.4 Harmonic Reduction Techniques
5.5 Current Source Inverter
5.6 Series Resonant Inverter

UNIT I

1.1 Power Diode

A p-n junction diode is formed by placing p and n type semiconductor materials in intimate
contact on an atomic scale. This may be achieved by diffusing acceptor impurities in to an n type
silicon crystal or by the opposite sequence.
In an open circuit p-n junction diode, majority carriers from either side will defuse across the
junction to the opposite side where they are in minority. These diffusing carriers will leave
behind a region of ionized atoms at the immediate vicinity of the metallurgical junction. This
region of immobile ionized atoms is called the space charge region. This process continues till
the resultant electric field (created by the space charge density) and the potential barrier at the
junction builds up to sufficient level to prevent any further migration of carriers. At this point the
p-n junction is said to be in thermal equilibrium condition. Variation of the space charge density,
the electric field and the potential along the device is shown in Fig 1.1 (a).
When an external voltage is applied with p side move negative then the n side the junction is said
to be under reverse bias condition. This reverse bias adds to the height of the potential barrier.
The electric field strength at the junction and the width of the space change region (also called
the depletion region because of the absence of free carriers) also increases. On the other hand,
free minority carrier densities (n in the p side and p in the n side) will be zero at the edge of the
p

depletion region on either side (Fig 1.1 (b)). This gradient in minority carrier density causes a
small flux of minority carriers to defuse towards the deletion layer where they are swept
immediately by the large electric field into the electrical neutral region of the opposite side. This
will constitute a small leakage current across the junction from the n side to the p side. There will
also be a contribution to the leakage current by the electron hole pairs generated in the space
change layer by the thermal ionization process. These two components of current together is
called the reverse saturation current Is of the diode. Value of I is independent of the reverse
s

voltage magnitude (up to a certain level) but extremely sensitive to temperature variation.

Fig 1.1: Space change density the electric field and the electric potential in side a p-n
junction under (a) thermal equilibrium condition, (b) reverse biased condition, (c) forward
biased condition.
When the applied reverse voltage exceeds some threshold value (for a given diode) the reverse
current increases rapidly. The diode is said to have undergone reverse break down.
Reverse break down is caused by "impact ionization" as explained below. Electrons accelerated
by the large depletion layer electric field due to the applied reverse voltage may attain sufficient
knick energy to liberate another electron from the covalent bonds when it strikes a silicon atom.
The liberated electron in turn may repeat the process. This cascading effect (avalanche) may
produce a large number of free electrons very quickly resulting in a large reverse current. The
power dissipated in the device increases manifold and may cause its destruction. Therefore,
operation of a diode in the reverse breakdown region must be avoided.
When the diode is forward biased (i.e., p side more positive than n side) the potential barrier is
lowered and a very large number of minority carriers are injected to both sides of the junction.
The injected minority carriers eventually recombines with the majority carries as they defuse
further into the electrically neutral drift region. The excess free carrier density in both p and n
side follows exponential decay characteristics. The characteristic decay length is called the
"minority carrier diffusion length"
Carrier density gradients on either side of the junction are supported by a forward current I

(flowing from p side to n side) which can be expressed as

IF=IS(exp (qv/Kt))-1

(1.1)

Where I = Reverse saturation current (Amps)

s

v = Applied forward voltage across the device (volts)

q = Change of an electron
k = Boltzmans constant
T = Temperature in Kelvin
The i-v characteristics of a p-n junction diode can be drawn as shown in Fig 1.2. While drawing
this characteristics the ohmic drop in the bulk of the semiconductor body has been neglected.

Fig 1.2: Volt-Ampere ( i-v ) characteristics of a p-n junction diode

1.2 Bipolar Junction Transistor (BJT)
Power Bipolar Junction Transistor (BJT) is the first semiconductor device to allow full control
over its Turn on and Turn off operations. A junction transistor consists of a semiconductor
crystal in which a p type region is sandwiched between two n type regions. This is called an n-pn transistor. Alternatively an n type region may be placed in between two p type regions to give a
p-n-p transistor. Fig 1.3 shows the circuit symbols and schematic representations of an n-p-n and
a p-n-p transistor. The terminals of a transistor are called Emitter (E), Base (B) & Collector (C)
are also shown in the figure 1.3.

Fig. 1.3: Bipolar junction transistor (a) n p n transistor ; (b) p n p transistor.

Constructional Features of a Power BJT
Following Section summarizes some of the constructional features of a Power BJT. Since Power
Transistors are predominantly of the n-p-n type.
A power BJT has a vertically oriented alternating layers of n type and p type
semiconductor materials as shown in Fig 1.4(a). The vertical structure is preferred for
power transistors because it maximizes the cross sectional area through which the on
state current flows. Thus, on state resistance and power lass is minimized.
In order to maintain a large current gain (and hence reduce base drive current) the
emitter doping density is made several orders of magnitude higher than the base region.
The thickness of the base region is also made as small as possible.
In order to block large voltage during OFF state a lightly doped collector drift region
is introduced between the moderately doped base region and the heavily doped collector
region. The function of this drift region is similar to that in a Power Diode. However, the
doping density donation of the base region being moderate the depletion region does
penetrate considerably into the base. Therefore, the width of the base region in a power
transistor can not be made as small as that in a signal level transistor. This comparatively
larger base width has adverse effect on the current gain () of a Power transistor which
typically varies within 5-20. As will be discusses later the collector drift region has
significant effect on the out put characteristics of a Power BJT.
Practical Power transistors have their emitters and bases interleaved as narrow fingers.
This is necessary to prevent current crowding and consequent second break down. In
addition multiple emitter structure also reduces parasitic ohmic resistance in the base
current path.
These constructional features of a Power BJT are shown schematically in Fig 1.4a

Fig. 1.4: Constructional Features of a Power Bipolar Junction Transistor

(a) Schematic of Construction,
Output i-v characteristics of a Power Transistor
A typical output (i vs V ) characteristics of an n-p-n type power transistor is shown in Fig
C

CE

1.5. A power transistor exhibits Cut off, Active and Saturation regions of operation in
its output characteristics similar to a signal level transistor. In fact output characteristics of a
Power Transistor in the Cut off and Active regions are qualitatively identical to a signal
level transistor.

Fig. 1.5 Output ( ic vCE ) characteristics of an n p n type Power Transistor

In the cut off region (i
the collector current is almost zero. The maximum voltage between
B0)

collector and emitter under this condition is termed Maximum forward blocking voltage with

base terminal open (iB=0) and is denoted by VCEO . For all practical purpose this is the maximum
voltage that can be applied in the forward direction (C positive with respect to E) across a power
transistor since a power transistor is expected to see any significant forward voltage only with i

This blocking voltage can however be increased to a value VCBO by keeping the emitter
terminal open. In this case iB < o. Actually VCBO is the breakdown voltage of the collector base
junction. However, since the open base configuration is more common the value of VCEO is used
by the manufacturers as the maximum voltage rating of a power transistor. Power transistors
have poor reverse voltage withstanding capability due to low break down voltage of the baseemitter junction. Therefore, reverse voltage (C negative with respect to E) should not appear
across a power transistor.
In the active region the ratio of collector current to base current (DC current Gain ()) remains
fairly constant upto certain value of the collector current after which it falls off rapidly.
Manufacturers usually provide a graph showing the variation of as a function of the collector
current for different junction temperatures and collector emitter voltages. This graph is useful for
designing the base drive of a Power transistor. Typically, the value of the dc current gain of a
Power transistor is much smaller compared to their signal level counterpart.
The maximum collector-emitter voltage that a power transistor can withstand in active region is
determined by the Base collector avalanche break down voltage. This voltage, denoted by V

= 0.

SUS

in Fig, 1.5 is usually smaller than V

. The voltage V

CEO

SUS

can be attained only for relatively

lower values of collector current. At higher collector current the limit on the total power
dissipation defines the boundary of the allowable active region as shown in Fig 1.5.
At still higher levels of collector currents the allowable active region is further restricted by a
potential failure mode called the Second Break down. It appears on the output characteristics
of the BJT as a precipitous drop in the collector-emitter voltage at large collector currents. The
collector voltage drop is often accompanied by significant rise in the collector current and a
substantial increase in the power dissipation. Most importantly this dissipation is not uniformly
spread over the entire volume of the device but is concentrated in highly localized regions. This
localized heating is a combined effect of the intrinsic non uniformity of the collector current
density distribution across the cross section of the device and the negative temperature
coefficient of resistively of minority carrier devices which leads to the formation of current
filamements (localized areas of very high current density) by a positive feed-back mechanism.
Once current filaments are formed localized thermal runaway quickly takes the junction
temperature beyond the safe limit and the device is destroyed.
It is in the saturation region that the output characteristics of a Power transistor differs
significantly from its signal level counterpart. In fact the saturation region of a Power transistor
can be further subdivided into a quasi saturation region and a hard saturation region. Appearance
of the quasi saturation region in the output characteristics of a power transistor is a direct
consequence of introducing the drift region into the structure of a power transistor. In the quasi
saturation region the base-collector junction is forward biased but the lightly doped drift region is

not completely shorted out by excess minority carrier injection from the base. The resistivity of
this region depends to some extent on the base current. Therefore, in the quasi saturation region,
the base current still retains some control over the collector current although the value of
decreases significantly. Also, since the resistivity of the drift region is still significant the total
voltage drop across the device in this mode of operation is higher for a given collector current
compared to what it will be in the hard saturation region.
Switching characteristics of a Power Transistor
The switching wave forms shown in Fig 1.6 (b) are the expanded and to some extent
idealized version of the actual waveforms that will be observed in a clamped inductive
switching circuit as shown in Fig.1.6 (a). Some simplifying assumptions have been made to
draw these waveforms. These are

The load inductor has been assumed to be large enough so that the load current does
not change during Turn ON period.
Reverse recovery characteristics of D has been ignored.
All parasitic elements have been ignored.

Fig 1.6 Turn ON characteristics of a power transistor; (a) Switching circuit, (b) Switching
wave forms

Before t = 0, the transistor (Q) was in the OFF state. In order to utilize the increased break
down voltage (V ) the base-emitter junction of a Power Transistor is usually reverse biased
CBO

during OFF state. Under this condition only negligible leakage current flows through the
transistor. Power loss due to this leakage current is negligible compared to other components of
power loss in a transistor. Therefore, it is not shown in Fig 1.6 (b). The entire load current flows
through the diode and V is clamped to V (approximately).
CE

CC

To turn the transistor ON at t = 0, the base biasing voltage V

BB

changes to a suitable positive

value. This starts the process of charge redistribution at the base-emitter junction. The process is
akin to charging of a capacitor. Indeed, the reverse biased base emitter junction is often
represented by a voltage dependent capacitor, the value of which is given by the manufacturer as
a function of the base-emitter reverse bias voltage. The rising base current that flows during this
period can be thought of as this capacitor charging current. Finally at t = t the BE junction is
d

forward biased. The junction voltage and the base current settles down to their steady state
values. During this period, called the Turn ON delay time no appreciable collector current
flows. The values of i and V remains essentially at their OFF state levels.
O

CE

At the end of the delay time (t

) the minority carrier density at the base region quickly

d ON

approaches its steady state distribution and the collector current starts rising while the diode
current (i ) starts falling. At t = t + t the collector current becomes equal to the load current
d

dON

ri

(and i becomes zero) I . At this point D starts blocking reverse voltage and V
d

CE

becomes

unclamped. t is called the current rise time of the transistor.

ri

At the end of the current rise time the diode D regains reverse blocking capacity. The collector
voltage V which has so far been clamped to V because of the conducting diode D starts
CE

CC

falling towards its saturation voltage V

CE

(sat). The initial fall of V

CE

is rapid. During this period

the switching trajectory traverses through the active region of the output characteristics of the
transistor. At the end of this rapid fall (t ) the transistor enters quasi saturation region. The
fv1

fall of V

CE

in the quasi saturation region is considerably slower. At the end of this slow fall (t )
fv2

the transistor enters hard saturation region and the collector voltage settles down to the
saturation voltage level V (sat) corresponding to the load current I . Turn ON process ends
CE

here. The total turn on time is thus, T

SW

(ON) = t

d (ON)

+t +t
ri

fv1

+t .
fv2

Turn Off Characteristics of a Power Transistor

During Turn OFF a power transistor makes transition from saturation to cut off region of
operation. Just as in the case of Turn ON, substantial redistribution of minority charge carriers
are involved in the Turn OFF process. Idealized waveforms of several important variables in the

clamped inductive switching circuit of Fig. 1.6 (a) during the Turn OFF process of Q are shown
in Fig 1.7 (a)

Fig. 1.7: Turn off, characteristics of a BJT. (a) Switching wave forms
The Turn OFF process starts with the base drive voltage going negative to a value -V . The
BB

base-emitter voltage however does not change from its forward bias value of V (sat)
BE

immediately, due to the excess, minority carriers stored in the base region. A negative base
current starts removing this excess carrier at a rate determined by the negative base drive voltage
and the base drive resistance. After a time t called the storage time of the transistor, the
s

remaining stored charge in the base becomes insufficient to support the transistor in the hard
saturation region. At this point the transistor enters quasi saturation region and the collector
voltage starts rising with a small slope. After a further time interval t the transistor completes
rv1

traversing through the quasi saturation region and enters the active region. The stored charge in
the base region at this point is insufficient to support the full negative base current. V starts
BE

falling forward V

BB

and the negative base current starts reducing. In the active region, V

increases rapidly towards V

V

CE

CC

CE

and at the end of the time interval t exceeds it to turn on D.

rv2

remains clamped at V , thereafter by the conducting diode D. At the end of t

CC

rv2

the stored

base charge can no longer support the full load current through the collector and the collector
current starts falling. At the end of the current fall time t the collector current becomes zero and
fi

the load current freewheels through the diode D. Turn OFF process of the transistor ends at this
point. The total Turn OFF time is given by Ts
=t +t +t +t
(OFF)

rv1

rv2

fi

As in the case of Turn ON considerable power loss takes place during Turn OFF due to
simultaneous existence of i and V in the intervals t , t and t . The last trace of Fig 3.7 (a)
c

CE

rv1

rv2

fi

shows the instantaneous power loss profile during these intervals. The total energy last per turn
off operation is given by the area under this curve. For safe turn off the average power
dissipation during t + t + t should be less than the power dissipation limit set by the FBSOA
rv1

rv2

fi

corresponding to a pulse width greater than t

rv1

+t

rv2

+t .
fi

Turn OFF time intervals of a power transistor are strongly influenced by the operating conditions
and the base drive design. Manufacturers usually specify these values as functions of collector
current for given positive and negative base current and case temperatures. Variations of these
time intervals as function of the ratio of positive to negative base currents for different collector
currents are also specified.
In this section and the precious one inductive load switching have been considered. However, if
the load is resistive. The freewheeling diode D will not be used. In that case the collector voltage
(V ) and collector current (i ) will fall and rise respectively together during Turn ON and rise
CE

and fall respectively together during Turn OFF. Other characteristics of the switching process
will remain same. The switching Power loss in this case will also be substantially lower.
1.3 MOSFET
A MOSFET is a voltage controlled majority carrier device. As the name suggests, movement of
majority carriers in a MOSFET is controlled by the voltage applied on the control electrode

(called gate) which is insulated by a thin metal oxide layer from the bulk semiconductor body.
The electric field produced by the gate voltage modulate the conductivity of the semiconductor
material in the region between the main current carrying terminals called the Drain (D) and the
Source (S). Power MOSFETs, just like their integrated circuit counterpart, can be of two types (i)
depletion type and (ii) enhancement type. Both of these can be either n- channel type or pchannel type depending on the nature of the bulk semiconductor. Fig 1.8 (a) shows the circuit
symbol of these four types of MOSFETs along with their drain current vs gate-source voltage
characteristics (transfer characteristics).

Fig 1.8: Different types of power MOSFET. (a) Circuit symbols and transfer characteristics
Constructional Features of a Power MOSFET
A power MOSFET using VDMOS technology has vertically oriented three layer structure of
alternating p type and n type semiconductors as shown in Fig 1.9 which is the schematic
+

representation of a single MOSFET cell structure. The two n end layers labeled Source and
Drain are heavily doped to approximately the same level. The p type middle layer is termed
the body (or substrate) and has moderate doping level (2 to 3 orders of magnitude lower than n

regions on both sides). The n drain drift region has the lowest doping density. Thickness of this
-

region determines the breakdown voltage of the device. The gate terminal is placed over the n
and p type regions of the cell structure and is insulated from the semiconductor body be a thin
layer of silicon dioxide (also called the gate oxide). The source and the drain region of all cells
on a wafer are connected to the same metallic contacts to form the Source and the Drain
terminals of the complete device. Similarly all gate terminals are also connected together.

Fig. 1.9: Schematic construction of a power MOSFET

Operating principle of a MOSFET
Application of a positive voltage at the gate terminal with respect to the source will covert the
silicon surface beneath the gate oxide into an n type layer or channel, thus connecting the
Source to the Drain. The gate region of a MOSFET which is composed of the gate metallization,
the gate (silicon) oxide layer and the p-body silicon forms a high quality capacitor. When a small
voltage is application to this capacitor structure with gate terminal positive with respect to the
source (note that body and source are shorted) a depletion region forms at the interface between
the SiO and the silicon as shown in Fig 1.10 (a).
2

Fig. 1.10: Gate control of MOSFET conduction. (a) Depletion layer formation; (b) Free
electron accumulation; (c) Formation of inversion layer.
The positive charge induced on the gate metallization repels the majority hole carriers from the
interface region between the gate oxide and the p type body. This exposes the negatively charged
acceptors and a depletion region is created.
Further increase in V causes the depletion layer to grow in thickness. At the same time the
GS

electric field at the oxide-silicon interface gets larger and begins to attract free electrons as
shown in Fig 1.10 (b). The immediate source of electron is electron-hole generation by thermal
ionization. The holes are repelled into the semiconductor bulk ahead of the depletion region. The
extra holes are neutralized by electrons from the source.

As V

GS

increases further the density of free electrons at the interface becomes equal to the free

hole density in the bulk of the body region beyond the depletion layer. The layer of free electrons
at the interface is called the inversion layer and is shown in Fig 1.10 (c). The inversion layer has
all the properties of an n type semiconductor and is a conductive path or channel between the
drain and the source which permits flow of current between the drain and the source. Since
current conduction in this device takes place through an n- type channel created by the electric
field due to gate source voltage it is called Enhancement type n-channel MOSFET.
The value of V at which the inversion layer is considered to have formed is called the Gate
GS

Source threshold voltage V

GS

(th). As V

GS

is increased beyond V (th) the inversion layer gets

GS

some what thicker and more conductive, since the density of free electrons increases further with
increase in V . The inversion layer screens the depletion layer adjacent to it from increasing
GS

V . The depletion layer thickness now remains constant.

GS

Steady state output i-v characteristics of a MOSFET

The output characteristics of a MOSFET is then a plot of drain current (i ) as a function of the
D

Drain Source voltage (v ) with gate source voltage (v ) as a parameter. Fig 1.11 (a) shows
DS

GS

such a characteristics.

Fig. 1.11: Output i-v characteristics of a Power MOSFET

With gate-source voltage (V ) below the threshold voltage (v (th)) the MOSFET operates in
GS

GS

the cut-off mode. No drain current flows in this mode and the applied drainsource voltage (v )
DS

is supported by the body-collector p-n junction. Therefore, the maximum applied voltage should
be below the avalanche break down voltage of this junction (V ) to avoid destruction of the
DSS

device.When V
v

DS

(v

DS

< (v

GS

GS

is increased beyond v (th) drain current starts flowing. For small values of
GS

v (th)) i is almost proportional to v . Consequently this mode of operation is

GS

DS

called ohmic mode of operation. In power electronic applications a MOSFET is operated either
in the cut off or in the ohmic mode. The slope of the v i characteristics in this mode is called
DS

the ON state resistance of the MOSFET (r

DS

At still higher value of v

DS

(v

DS

> (v

GS

(ON)).

GS

(th)) the i v
D

DS

characteristics deviates from the

linear relationship of the ohmic region and for a given v , i tends to saturate with increase in
GS

v . The exact mechanism behind this is rather complex. It will suffice to state that, at higher
DS

drain current the voltage drop across the channel resistance tends to decrease the channel width
at the drain drift layer end. In addition, at large value of the electric field, produced by the large
Drain Source voltage, the drift velocity of free electrons in the channel tends to saturate. As a
result the drain current becomes independent of V and determined solely by the gate source
DS

voltage v . This is the active mode of operation of a MOSFET. Simple, first order theory
GS

predicts that in the active region the drain current is given approximately by
I D = K (VGS - VGS (th)) 2

1.2

Where K is a constant determined by the device geometry.

At the boundary between the ohmic and the active region
VDS = (VGS - VGS (th)
I D = KVDS 2

Therefore,

1.3
1.4

Equation (1.4) is shown by a dotted line in Fig 1.11 (a). The relationship of Equation (1.2)
applies reasonably well to logic level MOSFETs. However, for power MOSFETs the transfer
characteristics (i vs v ) is more linear.
D

1.4 Thyristor

GS

Thyristors are usually three-terminal devices with four layers of alternating p- and n-type
material (i.e. three p-n junctions) in their main power handling section. The control terminal of
the thyristor, called the gate (G) electrode, may be connected to an integrated and complex
structure as part of the device. The other two terminals, anode (A) and cathode (K), handle the
large applied potentials (often of both polarities) and conduct the major current through the
thyristor. The anode and cathode terminals are connected in series with the load to which power
is to be controlled. Thyristors are typically used at the highest energy levels in power
conditioning circuits because they are designed to handle the largest currents and voltages of any
device technology (systems with voltages approximately greater than 1 kV or currents higher
than 100 A).
Basic Structure and Operation
Figure 1.12 shows a conceptual view of a typical thyristor with the three p-n junctions and the
external electrodes labeled. Also shown in the figure is the thyristor circuit symbol used in
electrical schematics.

Fig.1.12 Simple cross section of a typical thyristor and the associated electrical schematic
symbols.
The operation of thyristors is as follows. When a positive voltage is applied to the anode (with
respect to a cathode), the thyristor is in its forward-blocking state. The center junction J2 is
reverse-biased. In this operating mode the gate current is held to zero (open-circuit). In practice,
the gate electrode is biased to a small negative voltage (with respect to the cathode) to reversebias the GK-junction J3 and prevent charge-carriers from being injected into the p-base. In this
condition only thermally generated leakage current flows through the device and can often be
approximated as zero in value (the actual value of the leakage current is typically many orders of
magnitude lower than the conducted current in the on-state). As long as the forward applied
voltage does not exceed the value necessary to cause excessive carrier multiplication in the

depletion region around J2 (avalanche breakdown), the thyristor remains in an off-state (forward
blocking).
When a positive gate current is injected into the device J3 becomes forward-biased and electrons
are injected from the nemitter into the p-base. Some of these electrons diffuse across the p-base
and are collected in the n-base. This collected charge causes a change in the bias condition of J1.
The change in bias of J1 causes holes to be injected from the pemitter into the n-base. These
holes diffuse across the n-base and are collected in the p-base. The addition of these collected
holes in the p-base acts the same as gate current. The entire process is regenerative and will
cause the increase in charge carriers until J2 also becomes forward biased and the thyristor is
latched in its on-state (forward-conduction). The regenerative action will take place as long as
the gate current is applied in sufficient amount and for a sufficient length of time.
Two transistor analogy
The underlying operating principle of a thyristor is best understood in terms of the two
transistor analogy as explained In figure 1.13.

Fig. 1.13: Two transistor analogy of a thyristor construction. (a) Schematic Construction,
(b) Schematic division in component transistor (c) Equivalent circuit in terms of two
transistors.
Let us consider the behavior of this p n p n device with forward voltage applied, i.e anode
positive with respect to the cathode and the gate terminal open. With this voltage polarity J & J
1

are forward biased while J reverse biased.

2

Under this condition.

ic1 = a1 I A + I co1
ic 2 = a 2 I k + I co 2

1.5
1.6

Where & are current gains of Q & Q respectively while I

1

co1

&I

co2

are reverse saturation

currents of the CB junctions of Q & Q respectively.

1

Now from Fig 1.13 (c).

ic1 + ic 2 = I A
& Ik = I A
Combining Eq 1.5 & 1.8
IA =

1.7
1.8
I CO1 + I CO 2
I CO
=
1 - (a1 + a 2 ) 1 - (a1 + a 2 )

1.9
Where ICO = ICO1 + ICO2 is the total reverse leakage current of J2.
Now as long as V

AK

is small I is very low and both & are much lower than unity.
co

Therefore, total anode current I is only slightly greater than I . However, as V

A

co

to the avalanche break down voltage of J I

2,

co

AK

is increased up

starts increasing rapidly due to avalanche

multiplication process. As I increases both & increase and + approaches unity.

co

Under this condition large anode current starts flowing, restricted only by the external load
resistance. However, voltage drop in the external resistance causes a collapse of voltage across
the thyristor. The CB junctions of both Q & Q become forward biased and the total voltage
1

drop across the device settles down to approximately equivalent to a diode drop. The thyristor is
said to be in ON state.
Just after turn ON if I is larger than a specified current called the Latching Current I , and
a

remain high enough to keep the thyristor in ON state. The only way the thyristor can be turned
OFF is by bringing I below a specified current called the holding current (I ) where upon &
A

starts reducing. The thyristor can regain forward blocking capacity once excess stored charge
2

at J is removed by application of a reverse voltage across A & K (ie, K positive with respect A).
2

It is possible to turn ON a thyristor by application of a positive gate current (flowing from gate to
cathode) without increasing the forward voltage across the device up to the forward break-over
level. With a positive gate current equation 1.8 can be written as
I K = I A + IG
Combining with Eqns. 1.5 to 1.7
a I +I
I A = 2 G CO
1 - (a1 + a 2 )
Obviously with sufficiently large I the thyristor can be turned on for any value of I (and hence
G

co

V ). This is called gate assisted turn on of a Thyristor. This is the usual method by which a
AK

thyristor is turned ON.

When a reverse voltage is applied across a thyristor (i.e, cathode positive with respect to anose.)
junctions J and J are reverse biased while J is forward biased. Of these, the junction J has a
1

very low reverse break down voltage since both the n and p regions on either side of this
junction are heavily doped. Therefore, the applied reverse voltage is almost entirely supported by
junction J . The maximum value of the reverse voltage is restricted by
1

a) The maximum field strength at junction J (avalanche break down)

-

b) Punch through of the lightly doped n layer.

-

Since the p layers on either side of the n region have almost equal doping levels the avalanche
break down voltage of J & J are almost same. Therefore, the forward and the reverse break
1

down voltage of a thyristor are almost equal.Up to the break down voltage of J the reverse
1

current of the thyristor remains practically constant and increases sharply after this voltage.
Thus, the reverse characteristics of a thyristor is similar to that of a single diode.
If a positive gate current is applied during reverse bias condition, the junction J becomes
3

forward biased. In fact, the transistors Q & Q now work in the reverse direction with the roles
1

of their respective emitters and collectors interchanged. However, the reverse & being
1

significantly smaller than their forward counterparts latching of the thyristor does not occur.
However, reverse leakage current of the thyristor increases considerably increasing the OFF state
power loss of the device.
If a forward voltage is suddenly applied across a reverse biased thyristor, there will be
considerable redistribution of charges across all three junctions. The resulting current can
become large enough to satisfy the condition + = 1 and consequently turn on the thyristor.
1

This is called dv/dt turn on of a thyristor and should be avoided.

Static output i-v characteristics of a thyristor

The circuit symbol in the left hand side inset defines the polarity conventions of the variables
used in this figure.
With ig = 0, V has to increase up to forward break over voltage V before significant anode
AK

BRF

current starts flowing. However, at V

BRF

forward break over takes place and the voltage across

the thyristor drops to V (holding voltage). Beyond this point voltage across the thyristor (V )
H

AK

remains almost constant at V (1-1.5v) while the anode current is determined by the external
H

load.
The magnitude of gate current has a very strong effect on the value of the break over voltage as
shown in the figure. The right hand side figure in the inset shows a typical plot of the forward

break over voltage (V

) as a function of the gate current (I ). After Turn ON the thyristor is

BRF

no more affected by the gate current. Hence, any current pulse (of required magnitude) which is
longer than the minimum needed for Turn ON is sufficient to effect control. The minimum
gate pulse width is decided by the external circuit and should be long enough to allow the anode
current to rise above the latching current (I ) level.
L

Fig. 1.14: Static output characteristics of a Thyristor

.
The left hand side of Fig 1.14 shows the reverse i-v characteristics of the thyristor. Once the
thyristor is ON the only way to turn it OFF is by bringing the thyristor current below holding
current (I ). The gate terminal has no control over the turn OFF process. In ac circuits with
H

resistive load this happens automatically during negative zero crossing of the supply voltage.
This is called natural commutation or line commutation. However, in dc circuits some
arrangement has to be made to ensure this condition. This process is called forced
commutation.
During reverse blocking if i = 0 then only reverse saturation current (I ) flows until the reverse
g

voltage reaches reverse break down voltage (V

BRR

). At this point current starts rising sharply.

Large reverse voltage and current generates excessive heat and destroys the device. If i > 0
g

during reverse bias condition the reverse saturation current rises. This can be avoided by
removing the gate current while the thyristor is reverse biased.
Thyristor Gate Characteristics
The gate circuit of a thyristor behaves like a poor quality diode with high on state voltage drop
and low reverse break down voltage. This characteristic usually is not unique even within the
same family of devices and shows considerable variation from device to device. Therefore,
manufacturers data sheet provides the upper and lower limit of this characteristic as shown in
Fig 1.15.

Fig. 1.15: Gate characteristics of a thyristor.

Each thyristor has maximum gate voltage limit (Vgmax), gate current limit (Igmax) and maximum
average gate power dissipation limit (Pgavmax)These limits should not be exceeded in order to
avoid permanent damage to the gate cathode junction. There are also minimum limits of Vg
(Vgmin ) and Ig (Igmin) for reliable turn on of the thyristor. A gate non triggering voltage (Vng ) is
also specified by the manufacturers of thyristors. All spurious noise signals should be less than
this voltage Vng in order to prevent unwanted turn on of the thyristor. The useful gate drive area
of a thyristor is then b c d e f g h. The actual operating point will be some where between S & S
1

depending on the particular device.

For optimum utilization of the gate ratings the load line should be shifted forwards the Pgav Max
curve without violating Vgmax or Igmax ratings. Therefore, for a dc source E c f represents the
optimum load line from which optimum values of E & Rg can be determined.
Switching Characteristics of a Thyristor

During Turn on and Turn off process a thyristor is subjected to different voltages across it and
different currents through it. The time variations of the voltage across a thyristor and the current
through it during Turn on and Turn off constitute the switching characteristics of a thyristor.
Turn on Switching Characteristics
A forward biased thyristor is turned on by applying a positive gate voltage between the gate and
cathode as shown in Fig 1.16

Fig. 1.16: Turn on characteristics of a thyristor

Fig 1.16 shows the waveforms of the gate current (ig), anode current (iA) and anode cathode
voltage (VAK) in an expanded time scale during Turn on. The reference circuit and the associated
waveforms are shown in the inset. The total switching period being much smaller compared to
the cycle time, IA and VAK before and after switching will appear flat.
As shown in Fig 1.16 there is a transition time tON from forward off state to forward on state.
This transition time is called the thyristor turn of time and can be divided into three separate
intervals namely, (i) delay time (td) (ii) rise time (tr) and (iii) spread time (tP). These times are
shown in Fig 1.16 for a resistive load.
Delay time (td): After switching on the gate current the thyristor will start to conduct over the
portion of the cathode which is closest to the gate. This conducting area starts spreading at a
finite speed until the entire cathode region becomes conductive. Time taken by this process
constitute the turn on delay time of a thyristor. It is measured from the instant of application of

the gate current to the instant when the anode current rises to 10% of its final value (or VAK falls
to 90% of its initial value). Typical value of td is a few micro seconds.
Rise time (tr): For a resistive load, rise time is the time taken by the anode current to rise from
10% of its final value to 90% of its final value. At the same time the voltage VAK falls from 90%
of its initial value to 10% of its initial value. However, current rise and voltage fall
characteristics are strongly influenced by the type of the load. For inductive load the voltage falls
faster than the current. While for a capacitive load VAK falls rapidly in the beginning. However,
as the current increases, rate of change of anode voltage substantially decreases.
If the anode current rises too fast it tends to remain confined in a small area. This can give rise to
local hot spots and damage the device. Therefore, it is necessary to limit the rate of rise of the
ON state current (diA/dt) by using an inductor in series with the device.
Spread time (tP): It is the time taken by the anode current to rise from 90% of its final value to
100%. During this time conduction spreads over the entire cross section of the cathode of the
thyristor. The spreading interval depends on the area of the cathode and on the gate structure of
the thyristor.
Turn off Switching Characteristics
Once the thyristor is on, and its anode current is above the latching current level the gate loses
control. It can be turned off only by reducing the anode current below holding current. The turn
off time tq of a thyristor is defined as the time between the instant anode current becomes zero
and the instant the thyristor regains forward blocking capability. If forward voltage is applied
across the device during this period the thyristor turns on again.
During turn off time, excess minority carriers from all the four layers of the thyristor must be
removed. Accordingly tq is divided in to two intervals, the reverse recovery time (trr) and the gate
recovery time (tgr). Fig 1.17 shows the variation of anode current and anode cathode voltage with
time during turn off operation on an expanded scale.
The anode current becomes zero at time t1 and starts growing in the negative direction with the
same diA /dt till time t2. This negative current removes excess carriers from junctions J1 & J3. At
time t2 excess carriers densities at these junctions are not sufficient to maintain the reverse
current and the anode current starts decreasing. The value of the anode current at time t2 is called
the reverse recovery current (Irr). The reverse anode current reduces to the level of reverse
saturation current by t3. Total charge removed from the junctions between t1 & t3 is called the
reverse recovery charge (Qrr).

Fig. 1.17: Turn off characteristics of a thyristor.

Fast decaying reverse current during the interval t2 t3 coupled with the di/dt limiting inductor may
cause a large reverse voltage spike (Vrr) to appear across the device. This voltage must be limited
below the VRRM rating of the device. Up to time t2 the voltage across the device (VAK) does not
change substantially from its on state value. However, after the reverse recovery time, the
thyristor regains reverse blocking capacity and VAK starts following supply voltage v . At the end
i

of the reverse recovery period (trr) trapped charges still exist at the junction J2 which prevents the
device from blocking forward voltage just after trr. These trapped charges are removed only by
the process of recombination. The time taken for this recombination process to complete
(between t3 & t4) is called the gate recovery time (tgr). The time interval tq= trr+ tgr is called
device turn off time of the thyristor.
No forward voltage should appear across the device before the time tq to avoid its inadvertent
turn on. A circuit designer must provide a time interval tC (tC > tq) during which a reverse voltage
is applied across the device. tC is called the circuit turn off time.
Thyristor Turn-ON methods:
Forward voltage triggering:
In this method when anode to cathode forward voltage is increased with gate circuit open, then
the reverse bias junction J2 will have a avalanche breakdown at a voltage called forward break
over voltage VBO. At this voltage thyristor or SCR changes from OFF state to ON state. The

forward voltage drop across the SCR during ON state is of the order of 1 to 1.5V and increases
slightly with increase in the load current.
Thermal Triggering (Temperature Triggering):
Width of the depletion layer of the thyristor decreases on increasing the junction temperature.
Thus in the SCR when the voltage applied is very near to the breakdown voltage, the device can
be triggered by increasing its junction temperature. By applying the temperature to certain
extent, a situation comes when the reverse biased junction collapse making the device to
conduct. This method of triggering the thyristor by heating is known as the Thermal Triggering
process.
Radiation Triggering (Light Triggering):
Thyristors are bombarded with energy particles such as neutrons and protons. Light energy is
focused on the depletion region results in the formation of charge carriers. This lead to
instantaneous flow of current with in the device and the triggering of the device.
.dv/dt Triggering:
In this method of triggering if the applied rate of change of voltage is large, then the device will
turn on even though the voltage appearing across the device is small. We know that when SCR is
applied with forward voltage across the anode and cathode, junctions j1 and j3 will be in forward
bias and junction j2 will be in reverse bias. This reverse biased junction j2 will have the
characteristics of the capacitor due to the charges exist across the junction. If the forward voltage
is suddenly applied a charging current will flow tending to turn on the SCR. This magnitude of
the charging current depends on the rate of change of applied voltage.
Gate Triggering:
This is the most commonly used method for triggering the SCR or thyristor. For gate triggering a
signal is applied across the gate and cathode of the device. By applying a positive signal at the
gate terminal of the SCR it will be triggered much before the specified break over voltage. Three
types of signals can be used for triggering the SCR. They are either dc signal,ac signal or pulse
signal.
1.5 IGBT
Vertical cross section of a n channel IGBT cell is shown in Fig 1.18. Although p channel IGBTs
are possible n channel devices are more common. The IGBT cell has a parasitic p-n-p-n thyristor
structure embedded into it. The top p-n-p transistor is formed by the p+ injecting layer as the
emitter, the n type drain layer as the base and the p type body layer as the collector. The lower np-n transistor has the n+ type source, the p type body and the n type drain as the emitter, base and
collector respectively. The base of the lower n-p-n transistor is shorted to the emitter by the
emitter metallization. However, due to imperfect shorting, the exact equivalent circuit of the
IGBT includes the body spreading resistance between the base and the emitter of the lower n-p-n
transistor.

Fig. 1.18: Vertical cross section of an IGBT cell.

If the output current is large enough, the voltage drop across this resistance may forward bias the
lower n-p-n transistor and initiate the latch up process of the p-n-p-n thyristor structure. Once
this structure latches up the gate control of IGBT is lost and the device is destroyed due to
excessive power loss.
A major effort in the development of IGBT has been towards prevention of latch up of the
parasitic thyristor. This has been achieved by modifying the doping level and physical geometry
of the body region. The modern IGBT is latch-up proof for all practical purpose. Fig 1.19(a) and
(b) shows the circuit symbol and photograph of an IGBT.

Fig. 1.19: Circuit symbol of an IGBT.(a) Circuit symbol. (b) Photograph.

Operating principle of an IGBT
Operating principle of an IGBT can be explained in terms of the schematic cell structure and
equivalent circuit of Fig 1.20 (a) and (c).

Fig. 1.20: a) Schematic structure of an IGBT cell. c) Approximate equivalent circuit

From the input side the IGBT behaves essentially as a MOSFET. Therefore, when the gate
emitter voltage is less then the threshold voltage no inversion layer is formed in the p type body
region and the device is in the off state. The forward voltage applied between the collector and
the emitter drops almost entirely across the junction J . Very small leakage current flows through
2

the device under this condition. In terms of the equivalent current of Fig 1.20(c), when the gate
emitter voltage is lower than the threshold voltage the driving MOSFET of the Darlington
configuration remains off and hence the output p-n-p transistor also remains off.
When the gate emitter voltage exceeds the threshold, an inversion layer forms in the p type body
region under the gate. This inversion layer (channel) shorts the emitter and the drain drift layer
and an electron current flows from the emitter through this channel to the drain drift region. This
in turn causes substantial hole injection from the p+ type collector to the drain drift region. A
portion of these holes recombine with the electrons arriving at the drain drift region through the
channel. The rest of the holes cross the drift region to reach the p type body where they are
collected by the source metallization.

From the above discussion it is clear that the n type drain drift region acts as the base of the
output p-n-p transistor. The doping level and the thickness of this layer determines the current
gain of the p-n-p transistor. This is intentionally kept low so that most of the device current
flows through the MOSFET and not the output p-n-p transistor collector. This helps to reduced
the voltage drop across the body spreading resistance and eliminate the possibility of static
latch up of the IGBT.
The total on state voltage drop across a conducting IGBT has three components. The voltage
drop across J1 follows the usual exponential law of a pn junction. The next component of the
voltage drop is due to the drain drift region resistance. This component in an IGBT is
considerably lower compared to a MOSFET due to strong conductivity modulation by the
injected minority carriers from the collector. This is the main reason for reduced voltage drop
across an IGBT compared to an equivalent MOSFET. The last component of the voltage drop
across an IGBT is due to the channel resistance and its magnitude is equal to that of a
comparable MOSFET.
Steady state characteristics of an IGBT
The i-v characteristics of an n channel IGBT is shown in Fig 1.21 (a). They appear qualitatively
similar to those of a logic level BJT except that the controlling parameter is not a base current
but the gate-emitter voltage.

Fig. 1.21: Static characteristics of an IGBT (a) Output characteristics; (b) Transfer
characteristics
When the gate emitter voltage is below the threshold voltage only a very small leakage current
flows though the device while the collector emitter voltage almost equals the supply voltage
(point C in Fig 1.21(a)). The device, under this condition is said to be operating in the cut off

region. The maximum forward voltage the device can withstand in this mode (marked VCES in
Fig 1.21 (a)) is determined by the avalanche break down voltage of the body drain p-n
junction. Unlike a BJT, however, this break down voltage is independent of the collector current
as shown in Fig 1.21(a). IGBTs of Non-punch through design can block a maximum reverse
voltage (VRM) equal to VCES in the cut off mode. However, for Punch Through IGBTs VRM is
negligible (only a few tens of volts) due the presence of the heavily doped n+ drain buffer layer.
As the gate emitter voltage increases beyond the threshold voltage the IGBT enters into the
active region of operation. In this mode, the collector current ic is determined by the transfer
characteristics of the device as shown in Fig 1.21(b). This characteristic is qualitatively similar to
that of a power MOSFET and is reasonably linear over most of the collector current range. The
ratio of ic to (Vge vge(th) ) is called the forward transconductance (g ) of the device and is an
fs

important parameter in the gate drive circuit design. The collector emitter voltage, on the other
hand, is determined by the external load line ABC as shown in Fig 1.21(a)
As the gate emitter voltage is increased further ic also increases and for a given load resistance
(R ) vCE decreases. At one point vCE becomes less than vge vge(th). Under this condition the
L

driving MOSFET part of the IGBT enters into the ohmic region and drives the output p-n-p
transistor to saturation. Under this condition the device is said to be in the saturation mode. In the
saturation mode the voltage drop across the IGBT remains almost constant reducing only slightly
with increasing vge.
In power electronic applications an IGBT is operated either in the cut off or in the saturation
region of the output characteristics. Since vCE decreases with increasing vge it is desirable to use
,

the maximum permissible value of vge in the ON state of the device. Vge(Max) is limited by the
maximum collector current that should be permitted to flow in the IGBT as dictated by the
latch-up condition discussed earlier. Limiting Vge also helps to limit the fault current through
the device. If a short circuit fault occurs in the load resistance RL (shown in the inset of Fig
1.21(a)) the fault load line is given by CF. Limiting vge to vge6 restricts the fault current
corresponding to the operating point F. Most IGBTs are designed to with stand this fault current
for a few microseconds within which the device must be turned off to prevent destruction of the
device.
1.6 The Triac
The Triac is a member of the thyristor family. But unlike a thyristor which conducts only in one
direction (from anode to cathode) a triac can conduct in both directions. Thus a triac is similar to
two back to back (anti parallel) connected thyristosr but with only three terminals. As in the case
of a thyristor, the conduction of a triac is initiated by injecting a current pulse into the gate
terminal. The gate looses control over conduction once the triac is turned on. The triac turns off
only when the current through the main terminals become zero. Therefore, a triac can be
categorized as a minority carrier, a bidirectional semi-controlled device.

Construction and operating principle

Fig. 1.22 (a) and (b) show the circuit symbol and schematic cross section of a triac respective. As
the Triac can conduct in both the directions the terms anode and cathode are not used for
Triacs. The three terminals are marked as MT (Main Terminal 1), MT (Main Terminal 2) and
1

the gate by G. As shown in Fig 1.22 (b) the gate terminal is near MT and is connected to both N
1

and P regions by metallic contact. Similarly MT is connected to N and P regions while MT is

2

connected to N and P regions.

4

Fig. 1.22: Circuit symbol and schematic construction of a Triac (a) Circuit symbol (b)
Schematic construction.
Since a Triac is a bidirectional device and can have its terminals at various combinations of
positive and negative voltages, there are four possible electrode potential combinations as given
below:
1. MT positive with respect to MT , G positive with respect to MT
2

2. MT positive with respect to MT , G negative with respect to MT

2

3. MT negative with respect to MT , G negative with respect to MT

2

4. MT negative with respect to MT , G positive with respect to MT

2

The triggering sensitivity is highest with the combinations 1 and 3 and are generally used.
However, for bidirectional control and uniforms gate trigger mode sometimes trigger modes 2

and 3 are used. Trigger mode 4 is usually averded. Fig 1.23 (a) and (b) explain the conduction
mechanism of a triac in trigger modes 1 & 3 respectively.

Fig. 1.23: Conduction mechanism of a triac in trigger modes 1 and 3 (a) Mode 1 , (b)
Mode 3 .
In trigger mode-1 the gate current flows mainly through the P N junction like an ordinary
2

thyristor. When the gate current has injected sufficient charge into P layer the triac starts
2

conducting through the P N P N layers like an ordinary thyristor.

1

In the trigger mode-3 the gate current I forward biases the P P junction and a large number of
g

electrons are introduced in the P region by N . Finally the structure P N P N turns on

2

completely.
Steady State Output Characteristics of a Triac
A triac is similar to two thyristors connected in anti parallel. Therefore, it is expected that the V-I
st

rd

characteristics of Triac in the 1 and 3 quadrant of the V-I plane will be similar to the forward
characteristics of a thyristors. As shown in Fig. 1.24, with no signal to the gate the triac will
block both half cycle of the applied ac voltage provided its peak value is lower than the break
over voltage (V ) of the device. However, the turning on of the triac can be controlled by
BO

applying the gate trigger pulse at the desired instance. Mode-1 triggering is used in the first
quadrant where as Mode-3 triggering is used in the third quadrant. As such, most of the thyristor
characteristics apply to the triac (ie, latching and holding current). However, in a triac the two

conducting paths (from MT to MT or from MT to MT ) interact with each other in the structure
1

of the triac. Therefore, the voltage, current and frequency ratings of triacs are considerably lower
than thyristors.

Fig. 1.24: Steady state V I characteristics of a Triac

1.7 GTO
Like a thyristor, the GTO is a current controlled minority carrier (i.e. bipolar) device. GTOs
differ from conventional thyristor in that, they are designed to turn off when a negative current is
sent through the gate, thereby causing a reversal of the gate current. A GTO is also a four layer
three junction p-n-p-n device. Fig.1.25 shows the circuit symbol and two different schematic
cross section of a GTO.

Fig. 1.25: Circuit symbol and schematic cross section of a GTO (a) Circuit Symbol, (b)
Anode shorted GTO structure, (c) Buffer layer GTO structure.
In the first method, heavily doped n+ layers are introduced into the p+ anode layer. They make
contact with the same anode metallic contact. Therefore, electrons traveling through the base can
directly reach the anode metal contact without causing hole injection from the p+ anode. This is
the classic anode shorted GTO structure as shown in Fig 1.25 (b). Due to presence of these
anode shorts the reverse voltage blocking capacity of GTO reduces to the reverse break down
voltage of junction J (20-40 volts maximum). In addition a large number of anode shorts
3

reduces the efficiency of the anode junction and degrades the turn on performance of the device.
Therefore, the density of the anode shorts are to be chosen by a careful compromise between
the turn on and turn off performance.
-

In the other method, a moderately doped n type buffer layer is juxtaposed between the n type
base and the anode. As in the case of a power diode and BJT this relatively high density buffer
-

layer changes the shape of the electric field pattern in the n base region from triangular to
trapezoidal and in the process, helps to reduce its width drastically. However, this buffer layer in
a conventional anode shorted GTO structure would have increased the efficiency of the anode
shorts. Therefore, in the new structure the anode shorts are altogether dispensed with and a thin
p+ type layer is introduce as the anode. The design of this layer is such that electrons have a high
probability of crossing this layer without stimulating hole injection. This is called the
Transparent emitter structure and is shown in Fig 1.25 (c).
Operating principle of a GTO
GTO being a monolithic p-n-p-n structure just like a thryistor its basic operating principle can be
explained in a manner similar to that of a thyristor. In particular, the p-n-p-n structure of a GTO
can be though of consisting of one p-n-p and one n-p-n transistor connected in the regenerative
configuration as shown in Fig 1.26

Fig 1.26: Current distribution in a GTO (a) During turn on; (b) During turn off.

From the two transistor analogy (Fig 1.26 (a)) of the GTO structure one can write
ic1 = a p I A + I CBO1

iB1 = iC 2 = a n I k + I CBO 2
I k = I A + I G and I A = iB1 + iC1
Combining
IA =

With applied forward voltage V

AK

a n I G + I CBO1 + I CBO 2
1 - (a n + a P )

less than the forward break over voltage both I

CBO1

are small. Further if I is zero I is only slightly higher than (I

G

CBO1

+I

CBO2

and I

CBO2

). Under this condition

both and are small and ( + ) <<1. The device is said to be in the forward blocking
n

mode.

To turn the device on either the anode voltage can be raised until I

CBO1

and I

CBO2

increases by

avalanche multiplication process or by injecting a gate current. The current gain of silicon
transistors rises rapidly as the emitter current increases. Therefore, any mechanism which causes
a momentary increase in the emitter current can be used to turn on the device. Normally, this is
done by injecting current into the p base region via the external gate contract. As +
n

approaches unity the anode current tends to infinity. Physically as + nears unity the device
n

starts to regenerate and each transistor drives its companion into saturation. Once in saturation,
all junctions assume a forward bias and total potential drop across the device becomes
approximately equal to that of a single p-n diode. The anode current is restricted only by the
external circuit. Once the device has been turned on in this manner, the external gate current is
no longer required to maintain conduction, since the regeneration process is self-sustaining.
Reversion to the blocking mode occurs only when the anode current is brought below the
holding current level.

To turn off a conducting GTO the gate terminal is biased negative with respect to the cathode.
The holes injected from the anode are, therefore, extracted from the p base through the gate
metallization into the gate terminal (Fig 1.26 (b)). The resultant voltage drop in the p base above
the n emitter starts reverse biasing the junction J and electron injection stops here. The process
3

originates at the periphery of the p base and the n emitter segments and the area still injecting
electron shrinks. The anode current is crowded into higher and higher density filaments in most
remote areas from the gate contact. This is the most critical phase in the GTO turn off process
since highly localized high temperature regions can cause device failure unless these current

filaments are quickly extinguished. When the last filament disappears, electron injection stops
completely and depletion layer starts to grow on both J and J . At this point the device once
2

again starts blocking forward voltage. However, although the cathode current has ceased the
anode to gate current continues to flow (Fig 1.26 (b)) as the n base excess carriers diffuse
towards J . This tail current then decays exponentially as the n base excess carriers reduce by
1

recombination. Once the tail current has completely disappeared does the device regain its steady
state blocking characteristics. Anode Shorts (or transparent emitter) helps reduce the tail
current faster by providing an alternate path to the n base electrons to reach the anode contact
without causing appreciable hole injection from anode.
Steady state output and gate characteristics

(b)

Fig. 1.27: Steady state characteristics of a GTO (a) Output characteristics; (b) Gate
characteristics.
This characteristic in the first quadrant is very similar to that of a thyristor as shown in Fig. 1.27
(a). However, the latching current of a GTO is considerably higher than a thyristor of similar
rating. The forward leakage current is also considerably higher. In fact, if the gate current is not
sufficient to turn on a GTO it operates as a high voltage low gain transistor with considerable
anode current. It should be noted that a GTO can block rated forward voltage only when the gate
is negatively biased with respect to the cathode during forward blocking state. At least, a low
value resistance must be connected across the gate cathode terminal. Increasing the value of this
resistance reduces the forward blocking voltage of the GTO. Asymmetric GTOs have small (2030 V) reverse break down voltage. This may lead the device to operate in reverse avalanche

under certain conditions. This condition is not dangerous for the GTO provided the avalanche
time and current are small. The gate voltage during this period must remain negative.Fig 1.27 (b)
shows the gate characteristics of a GTO. The zone between the min and max curves reflects
parameter variation between individual GTOs. These characteristics are valid for DC and low
frequency AC gate currents. They do not give correct voltage when the GTO is turned on with
high dia/dt and dIG/dt. V in this case is much higher.
G

UNIT-2
2.1 Thyristor Protection

For reliable operation of SCR, it should be operated within the specific ratings.

SCRs are very delicate devices and so they must be protected against abnormal
operating conditions. Various protection of SCR are
a.

di/dt Protection

b.

dv/dt Protection

c.

Over voltage Protection

d.

Over Current Protection.

di/dt Protection:

di/dt is the rate of change of current in a device.

When SCR is forward biased and is turned ON by the gate signal, the anode
current flows.

The anode current requires some time to spread inside the device. (Spreading of charge
carriers)

But if the rate of rise of anode current(di/dt) is greater than the spread velocity of charge
carriers then local hot spots is created near the gate due to increased current density. This
localised heating may damage the device.

Local spot heating is avoided by ensuring that the conduction spreads to the whole are
very rapidly. (OR) The di/dt value must be maintained below a threshold (limiting) value.

This is done by means of connecting an inductor in series with the thyristor as shown in
fig.2.1

Fig.2.1: An inductor in series with the thyristor

The inductance L opposes the high di/dt variations.

When the current variation is high, the inductor smooths it and protects the SCR from
damage. (Though di/dt variation is high, the inductor 'L' smooths it because it takes some
time to charge). L [Vs / (di/dt)]

dv/dt Protection:

dv/dt is the rate of charge of voltage in SCR.

We know that iC=C.dv/dt. ie, when dv/dt is high, iC is high.

This high current(iC) may turn ON SCR even when gate current is zero. This is called as
dv/dt turn ON or false turn ON of SCR.

To protect the thyristor against false turn ON or against high dv/dt a "Snubber Circuit" is
used shown in fig.2.2.

SNUBBER CIRCUIT:

fig.2.2: Snubber Circuit

The snubber Circuit is a series combination of resistor 'R' and capacitor 'C'.

They are connected across the thyristor to be protected.

The capacitor 'C' is used to limit the dv/dt across the SCR.

The resistor 'R' is used to limit high discharging current through the SCR.

When switch S is closed, the capacitor 'C' behaves as a short-circuit.

Therefore voltage across SCR is zero.

As time increases, voltage across 'C' increases at a slow rate.

Therefore dv/dt across 'C' and SCR is less than maximum dv/dt rating of the device.

The capacitor charges to full voltage Vs; after which the gate is triggered, and SCR is
turned ON and high current flows through SCR.

As di/dt is high, it may damage the SCR.To avoid this, the resistor R in series with 'C'
will limit the magnitude of di/dt.

The technique of 'snubbing' can apply to any switching circuit, not only to thyristor/triac
circuits.

The rate of rise of turn-off voltage is determined by the time constant

RLC. Where RL is the circuit minimum load resistance, for instance the cold resistance of a
heater or lamp, the winding resistance of a motor or the primary resistance of a transformer.

Overvoltage Protection:
Overvoltage may result in false turn ON of the device (or) damage the device.

SCR is subjected to internal and external over voltage.

Internal Overvoltage:

The reverse recovery current of the SCR decays at a very fast rate. ie, high di/dt.

So a voltage surge is produced whose magnitude is L(di/dt).

External Overvoltage:

These are caused by the interruption of current flow in the inductive circuit and also due
to lightning strokes on the lines feeding the SCR systems.

The effect of overvoltage is reduced by using Snubber circuits and Non-Linear Resistors
called Voltage Clamping Devices.

Voltage Clamping Device:

It is a non-linear resistor called as VARISTOR (VARIable resiSTOR)

across the SCR.

connected

The resistance of varistor will decrease with increase in voltage.

During normal operation, varistor has high Resistance and draws only small leakage
current.

When high voltage appears, it operates in low resistance region and the surge energy is
dissipated across the resistance by producing a virtual short-circuit across the SCR.

Over Current Protection:

In an SCR due to over-current, the junction temperature exceeds the rated value and the
device gets damaged.

Over-current is interrupted by conventional fuses and circuit breakers.

The fault current must be interrupted before the SCR gets damaged and only the faulty
branches of the network should be isolated.

Circuit breaker has long tripping time. So it is used for protecting SCR against
continuous over loads (or) against surge currents of long duration.

Fast acting current limiting fuse is used to protect SCR against large surge currents of
very short duration.

Electronic Crowbar Protection:

Fig2.3:Schematic diagram of Electronic Crowbar Protection

SCR has high surge current ability.

SCR is used in electronic crowbar circuit for overcurrent protection of power converter.

In this protection, an additional SCR is connected across the supply which is known as
'Crowbar SCR'.

Current sensing resistor detects the value of converter current.

If it exceeds preset value, then gate trigger circuits turn ON the crowbar SCR.

So the input terminals are short-circuit by SCR and thus it bypass the converter over
current.
After some time the main fuse interrupts the fault current.

2.2 Series & Parallel Connection of an SCR

Fig.2.4:Circuit diagram of series connection of SCR

When the required voltage rating exceeds the SCR voltage rating, a number of SCRs are required
to be connected in series to share the forward and reverse voltage. As it is not possible to have
SCRs of completely identical characteristics, deviation in characteristics lead to the following
two major problems during series connections of the SCRs:
(i) Unequal distribution of voltage across SCRs.
(ii) Difference in recovery characteristics.
Care must be taken to share the voltage equally. For steady-state conditions, voltage sharing is
achieved by using a resistance or a Zener diode in parallel with each SCR. For transient voltage
sharing a low non-inductive resistor and capacitor in series are placed across each SCR, as
shown in sufficient to over damp the circuit.
Since the capacitor C1 can discharge through the SCR during turn-on, there can be excessive
power dissipation, but the switching current from C1 is limited by the resistor R1 This resistance
also serves the purpose of damping out ringing which is oscillation of C1 with the circuit
inductance during commutation. All the SCRs connected in series should be turned-on at the
same time when signals are applied to their figure. Diodes D1 connected in parallel with resistor
Rl, helps in dynamic stabilisation. This circuit reduces differences between blocking voltages of
the two devices within permissible limits. Additionally the R-C circuit can also serve the
function ofsnubber circuit. Values of R1 and C1 can primarily be calculated for snubber circuit
and a check can be made for equalization. If Q is the difference in recovery charge of two
devices arising out of different recovery current for different time and V is the permissible
difference in blocking voltage

then C1 = Q/ V.
.
Parallel Connection of an SCR

Fig.2.5:Circuit diagram of parallel connection of SCR

When the load current exceeds the SCR current rating, SCRs are connected in parallel to share
the load current. But when SCRs are operated in parallel, the current sharing between them may
not be proper. The device having lower dynamic resistance will tend to share more current. This
will raise the temperature of that particular device in comparison to other, thereby reducing
further its dynamic resistance and increasing current through it. This process is cumulative and
continues till the device gets punctured.
Some other factors which directly or indirectly add to this problem are difference in turn-on time,
delay time, finger voltage* and loop inductance. Arrangement of SCRs in the cubicle also plays
vital role. When the SCRs are connected in parallel, it must be ensured that the latching current
level of the all the SCRs is such that when gate pulse is applied, all of them turn-on and remain
on when the gate pulse is removed. Further the holding currents of the devices should not be so
much different that at reduced load current one of the device gets turned-off because of fall of
current through it blow its holding current value. This is particularly important because on
increase in load current, the device which has stopped conducting cannot start in the absence of
gate pulse.
Another point to be considered is the on-state voltage across the device. For equal sharing of
currents by the devices voltage drop across the parallel paths must be equal. For operation of all
the SCRs connected in parallel at the same temperature, it becomes necessary to use a common
heat sink for their mounting, as illustrated in figure. Resistance compensation used for dc circuits
is shown in figure. In this circuit the resistors Rx and R2 are chosen so as to cause equal voltage
drop in both arms. Inductive compensation used for ac circuits is shown in figure The difference
in characteristics due to different turn-on time, delay time, finger voltage, latching current,
holding current can be minimized by using inductive compensation. Firing circuits giving high
rate of rise can be used to reduce mismatch of gate characteristics and delay time.
Current sharing circuits must be designed so as to distribute current equally at maximum
temperature and maximum anode current. This is done to ensure that the devices share current
equally under worst operating conditions. Mechanical arrangement of SCRs also plays an
important role in reducing mismatching. Cylindrical construction is perhaps the best from this
point of view.

Derating. Even with all the measures taken, it is preferable to derate the device for
series/parallel operation. Another reason for derating is poor cooling and heat dissipation as
number of devices operate in the same branch of the circuit.
Normal derating factors are 10 to 15% for parallel connection of SCRs depending upon the
number of devices connected in parallel. Higher voltage safety factor is taken when SCRs are
connected in series.
2.3 THYRISTOR COMMUTATION TECHNIQUES
In practice it becomes necessary to turn off a conducting thyristor. (Often thyristors are used as
switches to turn on and off power to the load). The process of turning off a conducting thyristor
is called commutation. The principle involved is that either the anode should be made negative
with respect to cathode (voltage commutation) or the anode current should be reduced below the
holding current value (current commutation).
The reverse voltage must be maintained for a time at least equal to the turn-off time of SCR
otherwise a reapplication of a positive voltage will cause the thyristor to conduct even without a
gate signal. On similar lines the anode current should be held at a value less than the holding
current at least for a time equal to turn-off time otherwise the SCR will start conducting if the
current in the circuit increases beyond the holding current level even without a gate signal.
Commutation circuits have been developed to hasten the turn-off process of Thyristors. The
study of commutation techniques helps in understanding the transient phenomena under
switching conditions.
The reverse voltage or the small anode current condition must be maintained for a time at least
equal to the TURN OFF time of SCR; Otherwise the SCR may again start conducting. The
techniques to turn off a SCR can be broadly classified as

Natural Commutation
Forced Commutation.

NATURAL COMMUTATION (CLASS F)

This type of commutation takes place when supply voltage is AC, because a negative
voltage will appear across the SCR in the negative half cycle of the supply voltage and the SCR
turns off by itself. Hence no special circuits are required to turn off the SCR. That is the reason
that this type of commutation is called Natural or Line Commutation. Figure 2.6 shows the
circuit where natural commutation takes place and figure 2.7 shows the related waveforms. tc is
the time offered by the circuit within which the SCR should turn off completely. Thus tc should
be greater than tq , the turn off time of the SCR. Otherwise, the SCR will become forward biased
before it has turned off completely and will start conducting even without a gate signal.

T
+

vs

- vo
-

Fig. 2.6: Circuit for Natural Commutation

Supply voltage vs

Sinusoidal

3p

2p

wt

wt

a
Load voltage vo
Turn off
occurs here

wt

2p

3p

wt

Voltage across SCR

tc

Fig. 2.7: Natural Commutation Waveforms of Supply and Load Voltages (Resistive
Load)
This type of commutation is applied in ac voltage controllers, phase controlled rectifiers and
cyclo converters.

FORCED COMMUTATION
When supply is DC, natural commutation is not possible because the polarity of the supply
remains unchanged. Hence special methods must be used to reduce the SCR current below the
holding value or to apply a negative voltage across the SCR for a time interval greater than the
turn off time of the SCR. This technique is called FORCED COMMUTATION and is applied in
all circuits where the supply voltage is DC - namely, Choppers (fixed DC to variable DC),
inverters (DC to AC). Forced commutation techniques are as follows:

Self Commutation
Resonant Pulse Commutation
Complementary Commutation
Impulse Commutation
External Pulse Commutation.
Load Side Commutation.
Line Side Commutation.

SELF COMMUTATION OR LOAD COMMUTATION OR CLASS A COMMUTATION:

(COMMUTATION BY RESONATING THE LOAD)
In this type of commutation the current through the SCR is reduced below the holding current
value by resonating the load. i.e., the load circuit is so designed that even though the supply
voltage is positive, an oscillating current tends to flow and when the current through the SCR
reaches zero, the device turns off. This is done by including an inductance and a capacitor in
series with the load and keeping the circuit under-damped. Figure 2.8 shows the circuit.This type
of commutation is used in Series Inverter Circuit.

Vc(0)
+ -

Load
V

Fig. 2.8: Circuit for Self Commutation

EXPRESSION FOR CURRENT

At t = 0 , when the SCR turns ON on the application of gate pulse assume the current in the
circuit is zero and the capacitor voltage is VC ( 0 ) .Writing the Laplace Transformation circuit of
figure 2.8 the following circuit is obtained when the SCR is conducting.

I(S)

sL

VC(0)
1
S
CS
+ - +
C

V
S

Fig.: 2.9:

I (S )

V - VC ( 0 )
S
=
1
R + sL +
CS
CS V - VC ( 0 )
S
=
RCs + s 2 LC + 1

C V - VC ( 0 )
R 1

LC s 2 + s +
L LC

V - VC ( 0 )
L
=
R
1
s2 + s +
L LC

(V - V ( 0 ) )
C

L
2
2
R 1 R R
2
s +s +
+ -
L LC 2 L 2 L

(V - V ( 0 ) )
C

L
2
R 1 R

-
s+
+
2 L LC 2 L

Where

(s +d )

+w2

(V - V ( 0 ) ) ,
A=

R
d=
,
2L

w=

1 R
-

LC 2 L

w is called the natural frequency

I (S ) =

A
w
w ( s + d )2 + w 2

Taking inverse Laplace transforms

i (t ) =

A -d t
e sin w t
w

Therefore expression for current

i (t ) =

V - VC ( 0 ) -2 RL t
e sin w t
wL

Peak value of current =

(V - V ( 0 ) )
C

wL

Expression for voltage across capacitor at the time of turn off

Applying KVL to figure 2.8
vc = V - vR - VL
vc = V - iR - L

di
dt

Substituting for i,
vc = V - R

A -d t
d A

e sin w t - L e -d t sin w t
w
dt w

vc = V - R

A -d t
A
e sin w t - L ( e -d tw cos w t - d e -d t sin w t )
w
w

vc = V -

A -d t
e [ R sin w t + w L cos w t - Ld sin w t ]
w

vc = V -

A -d t
R

e R sin w t + w L cos w t - L
sin w t
w
2L

vc = V -

A -d t R

e sin w t + w L cos w t
w
2

Substituting for A,
vc ( t ) = V -

(V - V ( 0 ) ) e
C

2 sin w t + w L cos w t

-d t

wL

vc ( t ) = V -

(V - V ( 0 ) ) e
C

-d t

2 L sin w t + w cos w t

SCR turns off when current goes to zero. i.e., at w t = p .

Therefore at turn off
vc = V -

(V - V ( 0 ) ) e
C

vc = V + V - VC ( 0 ) e

-dp
w

( 0 + w cos p )

-dp
w

- Rp

Therefore

vc = V + V - VC ( 0 ) e 2 Lw

Note: For effective commutation the circuit should be under damped.

2

1
R

<
LC
2L

That is

With R = 0, and the capacitor initially uncharged that is VC ( 0 ) = 0

V
t
sin
wL
LC
1
w=
LC
i=

But

Therefore

i=

V
t
C
t
LC sin
=V
sin
L
L
LC
LC

and capacitor voltage at turn off is equal to 2V.

Figure 2.10 shows the waveforms for the above conditions. Once the SCR turns off
voltage across it is negative voltage.
p
Conduction time of SCR = .
w

C
L

Current i

p/2

wt

2V
Capacitor voltage

wt

Gate pulse
wt

wt
-V
Voltage across SCR

Fig. 2.10: Self Commutation Wave forms of Current and Capacitors Voltage

RESONANT PULSE COMMUTATION (CLASS B COMMUTATION)

The circuit for resonant pulse commutation is shown in figure 2.11.

L
T
a
b

i
C

IL

Load
FWD

Fig. 2.11: Circuit for Resonant Pulse Commutation

This is a type of commutation in which a LC series circuit is connected across the SCR. Since
the commutation circuit has negligible resistance it is always under-damped i.e., the current in
LC circuit tends to oscillate whenever the SCR is on.
Initially the SCR is off and the capacitor is charged to V volts with plate a being positive.
Referring to figure 1.13 at t = t1 the SCR is turned ON by giving a gate pulse. A current I L
flows through the load and this is assumed to be constant. At the same time SCR short circuits
the LC combination which starts oscillating. A current i starts flowing in the direction shown in
figure. As i reaches its maximum value, the capacitor voltage reduces to zero and then the
polarity of the capacitor voltage reverses b becomes positive). When i falls to zero this
reverse voltage becomes maximum, and then direction of i reverses i.e., through SCR the load
current I L and i flow in opposite direction. When the instantaneous value of i becomes equal
to I L , the SCR current becomes zero and the SCR turns off. Now the capacitor starts charging
and its voltage reaches the supply voltage with plate a being positive. The related waveforms are
shown in figure 2.12.

Gate pulse
of SCR
t1
V

p
Capacitor voltage
vab

Ip

IL

p
w

tC

t
Dt

ISCR

t
Voltage across
SCR

Fig. 2.12: Resonant Pulse Commutation Various Waveforms

EXPRESSION FOR tc , THE CIRCUIT TURN OFF TIME

Assume that at the time of turn off of the SCR the capacitor voltage vab -V and load current
I L is constant. tc is the time taken for the capacitor voltage to reach 0 volts from V volts and is
derived as follows.
t

1 c
V = I L dt
C0
V=

I L tc
C

tc =

VC
seconds
IL

For proper commutation tc should be greater than tq , the turn off time of T. Also, the magnitude
of I p , the peak value of i should be greater than the load current I L and the expression for i is
derived as follows.
The LC circuit during the commutation period is shown in figure 2.13.

L
T

i
+
VC(0)
- =V

Fig. 2.13: LC circuit during the commutation period

The transformed circuit is shown in figure below.
I(S)
sL
T
+

1
Cs

V
- s

I (S) =

V
s
sL +

1
Cs

V
Cs
s
I ( S ) = 2
s LC + 1
I (S ) =

VC
1

LC s 2 +

LC

I (S ) =

V
1

L s2 + 1
LC

1
V LC
1

I (S ) =
L s2 + 1 1
LC LC
1
C LC
I (S ) = V

L s2 + 1
LC

Taking inverse LT
i (t ) = V

w=

Where

Or

Therefore

i (t ) =

C
sin w t
L

1
LC

V
sin w t = I p sin w t
wL

Ip =V

C
amps .
L

EXPRESSION FOR CONDUCTION TIME OF SCR

For figure 2.12 (waveform of i), the conduction time of SCR
p
= + Dt
w
I
sin -1 L
Ip
p

= +
w
w
RESONANT PULSE COMMUTATION WITH ACCELERATING DIODE

D2

iC(t)

T1
L

iC(t)

IL

T2

+
VC(0)
T3

FWD

L
O
A
D

Fig. 2.14(a)
A diode D2 is connected as shown in the figure 2.14(a) to accelerate the discharging of the
capacitor C. When thyristor T2 is fired a resonant current iC ( t ) flows through the capacitor
and thyristor T1 . At time t = t1 , the capacitor current iC ( t ) equals the load current I L and hence
current through T1 is reduced to zero resulting in turning off of T1 . Now the capacitor current

iC ( t ) continues to flow through the diode D2 until it reduces to load current level I L at time t2 .
Thus the presence of D2 has accelerated the discharge of capacitor C.

iC
IL
0

VC
0
V1
VC(O)

t1

t2
tC

Fig. 2.14(b)

Now the capacitor gets charged through the load and the charging current is constant. Once
capacitor is fully charged T2 turns off by itself. But once current of thyristor T1 reduces to zero
the reverse voltage appearing across T1 is the forward voltage drop of D2 which is very small.
This makes the thyristor recovery process very slow and it becomes necessary to provide longer
reverse bias time. From figure 2.14(b)

t2 = p LC - t1
VC ( t2 ) = -VC ( O ) cos w t2
tC = t2 - t1

Circuit turn-off time

COMPLEMENTARY COMMUTATION (CLASS C COMMUTATION, PARALLEL

CAPACITOR COMMUTATION)
In complementary commutation the current can be transferred between two loads. Two SCRs are
used and firing of one SCR turns off the other. The circuit is shown in figure 2.15.
The working of the circuit can be explained as follows.
Initially both T1 and T2 are off; Now, T1 is fired. Load current I L flows through R1 . At the same
time, the capacitor C gets charged to V volts through R2 and T1 (b becomes positive with
respect to a). When the capacitor gets fully charged, the capacitor current ic becomes zero. To
turn off T1 , T2 is fired; the voltage across C comes across T1 and reverse biases it, hence T1 turns
off. At the same time, the load current flows through R2 and T2 .

IL
R1

R2
ab

iC

C
T1

T2

Fig. 2.15: Complementary Commutation

.

The capacitor C charges towards V through R1 and T2 and is finally charged to V volts with a
plate positive. When the capacitor is fully charged, the capacitor current becomes zero. To turn
off T2 , T1 is triggered, the capacitor voltage (with a positive) comes across T2 and T2 turns off.
The related waveforms are shown in figure 2.16.
EXPRESSION FOR CIRCUIT TURN OFF TIME tc
From the waveforms of the voltages across T1 and capacitor, it is obvious that tc is the time
taken by the capacitor voltage to reach 0 volts from V volts, the time constant being RC and
the final voltage reached by the capacitor being V volts. The equation for capacitor voltage

vc ( t ) can be written as
vc ( t ) = V f + (Vi - V f ) e - t t

Where V f is the final voltage, Vi is the initial voltage and t is the time constant.
At

t = tc , vc ( t ) = 0 ,

t = R1C , V f = V , Vi = -V ,
Therefore

0 = V + ( -V - V ) e

- tc
R1C

0 = V - 2Ve
Therefore

V = 2Ve

- tc
R1C

- tc
R1C

0.5 = e

- tc
R1C

Taking natural logarithms on both sides

ln 0.5 =

-t c
R1C

tc = 0.693R1C
This time should be greater than the turn off time tq of T1 .
Similarly when T2 is commutated
tc = 0.693R2C
And this time should be greater than tq of T2 .

R1 = R2 = R

Usually

Gate pulse
of T2

Gate pulse
of T1
p

IL

Current through R1

V
R1

2V
R1

t
2V
R2

Current through T1
V
R1

t
Current through T2

2V
R1

V
R2

V
Voltage across
capacitor vab
t

-V

tC

tC
Voltage across T1

tC

Fig. 2.16: waveform of Complementary Commutation

IMPULSE COMMUTATION (CLASS D COMMUTATION)
The circuit for impulse commutation is as shown in figure 2.17.

IL

T1
T3
V

VC(O)
L

C
T2
FWD

L
O
A
D

Fig. 2.17: Circuit for Impulse Commutation

The working of the circuit can be explained as follows. It is assumed that initially the capacitor C
is charged to a voltage VC ( O ) with polarity as shown. Let the thyristor T1 be conducting and
carry a load current I L . If the thyristor T1 is to be turned off, T2 is fired. The capacitor voltage
comes across T1 , T1 is reverse biased and it turns off. Now the capacitor starts charging through
T2 and the load. The capacitor voltage reaches V with top plate being positive. By this time the
capacitor charging current (current through T2 ) would have reduced to zero and T2 automatically
turns off. Now T1 and T2 are both off. Before firing T1 again, the capacitor voltage should be
reversed. This is done by turning on T3 , C discharges through T3 and L and the capacitor voltage
reverses. The waveforms are shown in figure 2.18.

Gate pulse
of T3

Gate pulse
of T2

Gate pulse
of T1
t

VS
Capacitor
voltage
t

VC
tC

Voltage across T1
t

VC

Fig. 2.18: Impulse Commutation Waveforms of Capacitor Voltage, Voltage across T1 .

EXPRESSION FOR CIRCUIT TURN OFF TIME (AVAILABLE TURN OFF TIME) tc
tc depends on the load current I L and is given by the expression
t

1 c
VC = I L dt
C0
(assuming the load current to be constant)
VC =
tc =

I L tc
C

VC C
seconds
IL

For proper commutation tc should be > tq , turn off time of T1 .

Note:

T1 is turned off by applying a negative voltage across its terminals. Hence this is voltage
commutation.
tc depends on load current. For higher load currents tc is small. This is a disadvantage of
this circuit.
When T2 is fired, voltage across the load is V + VC ; hence the current through load
shoots up and then decays as the capacitor starts charging.

EXTERNAL PULSE COMMUTATION (CLASS E COMMUTATION)

T1

VS

T2

RL

2VAUX

+
-

T3

VAUX

Fig. 2.19: External Pulse Commutation

In this type of commutation an additional source is required to turn-off the conducting thyristor.
Figure 2.19 shows a circuit for external pulse commutation. VS is the main voltage source and
VAUX is the auxiliary supply. Assume thyristor T1 is conducting and load RL is connected across
supply VS . When thyristor T3 is turned ON at t = 0 , VAUX , T3 , L and C from an oscillatory circuit.
Assuming capacitor is initially uncharged, capacitor C is now charged to a voltage 2VAUX with
upper plate positive at t = p LC . When current through T3 falls to zero, T3 gets commutated.
To turn-off the main thyristor T1 , thyristor T2 is turned ON. Then T1 is subjected to a reverse
voltage equal to VS - 2VAUX . This results in thyristor T1 being turned-off. Once T1 is off capacitor
C discharges through the load RL
LOAD SIDE COMMUTATION
In load side commutation the discharging and recharging of capacitor takes place through the
load. Hence to test the commutation circuit the load has to be connected. Examples of load side
commutation are Resonant Pulse Commutation and Impulse Commutation.
LINE SIDE COMMUTATION
In this type of commutation the discharging and recharging of capacitor takes place through the
supply.

T1

IL
+

T3
VS

_C
Lr

FWD

L
O
A
D

T2

_
Fig.: 2.20 Line Side Commutation Circuit
Figure 2.20 shows line side commutation circuit. Thyristor T2 is fired to charge the capacitor
C. When C charges to a voltage of 2V, T2 is self commutated. To reverse the voltage of
capacitor to -2V, thyristor T3 is fired and T3 commutates by itself. Assuming that T1 is
conducting and carries a load current I L thyristor T2 is fired to turn off T1 . The turning ON of T2
will result in forward biasing the diode (FWD) and applying a reverse voltage of 2V across T1 .
This turns off T1 , thus the discharging and recharging of capacitor is done through the supply and
the commutation circuit can be tested without load.
2.4 DC-DC Converters:
A chopper is a static device which is used to obtain a variable dc voltage from a constant dc
voltage source. A chopper is also known as dc-to-dc converter. The thyristor converter offers
greater efficiency, faster response, lower maintenance, smaller size and smooth control.
Choppers are widely used in trolley cars, battery operated vehicles, traction motor control,
control of large number of dc motors, etc.. They are also used in regenerative braking of dc
motors to return energy back to supply and also as dc voltage regulators.
Choppers are of two types:

Step-down choppers

Step-up choppers.

In step-down choppers, the output voltage will be less than the input voltage whereas in step-up
choppers output voltage will be more than the input voltage.

PRINCIPLE OF STEP-DOWN CHOPPER

Chopper
i0

V0

Fig. 2.21: Step-down Chopper with Resistive Load

Figure 2.21 shows a step-down chopper with resistive load. The thyristor in the circuit acts as a
switch. When thyristor is ON, supply voltage appears across the load and when thyristor is OFF,
the voltage across the load will be zero. The output voltage and current waveforms are as shown
in figure 2.22.

v0
V
Vdc
tON

tOFF

i0
V/R
Idc
T

Fig. 2.22: Step-down choppers output voltage and current waveforms

Vdc

= average value of output or load voltage

I dc

= average value of output or load current

tON

= time interval for which SCR conducts

tOFF

= time interval for which SCR is OFF.

T = tON + tOFF = period of switching or chopping period

f =

1
= frequency of chopper switching or chopping frequency.
T

Average output voltage

tON

Vdc = V

tON + tOFF
t
Vdc = V ON
T
tON

but

= V .d

= d = duty cycle

Average output current,

V
Idc= dc
R
I dc =

V tON

R T

V
= d
R

RMS value of output voltage

1
VO =
T

tON

1
T

tON

v dt
2
o

But during tON , vo = V

Therefore RMS output voltage
VO =

VO =

V
0

t
V2
tON = ON .V
T
T

dt

VO = d .V
Output power

PO = VO I O

But

IO =

VO
R

Therefore output power

PO =

VO2
R

PO =

dV 2
R

Effective input resistance of chopper

Ri =

V
I dc

Ri =

R
d

The output voltage can be varied by varying the duty cycle.

STEP-DOWN CHOPPER WITH R-L LOAD
Figure 2.23 shows a step-down chopper with R-L load and free wheeling diode. When chopper is
ON, the supply is connected across the load. Current flows from the supply to the load. When
chopper is OFF, the load current iO continues to flow in the same direction through the freewheeling diode due to the energy stored in the inductor L. The load current can be continuous or
discontinuous depending on the values of L and duty cycle, d. For a continuous current operation
the load current is assumed to vary between two limits I min and I max .
Figure 2.24 shows the output current and output voltage waveforms for a continuous current and
discontinuous current operation.

Chopper

i0

+
R

FWD

V0

L
E

Fig. 2.23: Step Down Chopper with R-L Load

v0

Output
voltage

V
tON
i0

tOFF

Imax

Output
current

Imin

Continuous
current

i0

t
Output
current
Discontinuous
current
t

Fig. 2.24: Output Voltage and Load Current Waveforms (Continuous Current)

EXPRESSIONS

FOR

LOAD

CURRENT

iO

OPERATION WHEN CHOPPER IS ON ( 0 t tON )

FOR

CONTINUOUS

CURRENT

i0

+
R

V0

L
E
-

Fig. 2.25 (a)

Voltage equation for the circuit shown in figure 2.25(a) is
V = iO R + L

diO
+E
dt

Taking Laplace Transform

V
E
= RI O ( S ) + L S .I O ( S ) - iO ( 0- ) +
S
S

At t = 0 , initial current iO ( 0 - ) = I min

IO ( S ) =

V -E
I
+ min
R
R

LS S + S +
L
L

Taking Inverse Laplace Transform

R
R
- t
- t
V -E
L
L
iO ( t ) =
1 - e
+ I min e
R

This expression is valid for 0 t tON . i.e., during the period chopper is ON.
At the instant the chopper is turned off, load current is

iO ( tON ) = I max

When Chopper is OFF

( 0 t tOFF )
i0
R
L
E
Fig. 2.25 (b)

Voltage equation for the circuit shown in figure 2.25(b) is

0 = RiO + L

diO
+E
dt

Taking Laplace transform

0 = RI O ( S ) + L SI O ( S ) - iO ( 0- ) +

E
S

Redefining time origin we have at t = 0 , initial current iO ( 0 - ) = I max

Therefore

IO ( S ) =

I max
E
R
R

S+
LS S +
L
L

Taking Inverse Laplace Transform

iO ( t ) = I max e

R
- t
L

R
- t
E
- 1 - e L
R

The expression is valid for 0 t tOFF , i.e., during the period chopper is OFF. At the instant the
chopper is turned ON or at the end of the off period, the load current is

iO ( tOFF ) = I min

2.5 PRINCIPLE OF STEP-UP CHOPPER

L
+

D
+

V
Chopper

L
O
A
D

VO

Fig. 2.26: Step-up Chopper

Figure 2.26 shows a step-up chopper to obtain a load voltage VO higher than the input voltage V.
The values of L and C are chosen depending upon the requirement of output voltage and current.
When the chopper is ON, the inductor L is connected across the supply. The inductor current I
rises and the inductor stores energy during the ON time of the chopper, tON . When the chopper is
off, the inductor current I is forced to flow through the diode D and load for a period, tOFF . The
current tends to decrease resulting in reversing the polarity of induced EMF in L. Therefore
voltage across load is given by
VO = V + L

dI
i.e., VO > V
dt

If a large capacitor C is connected across the load then the capacitor will provide a continuous
output voltage VO . Diode D prevents any current flow from capacitor to the source. Step up
choppers are used for regenerative braking of dc motors.
EXPRESSION FOR OUTPUT VOLTAGE
Assume the average inductor current to be I during ON and OFF time of Chopper.
When Chopper is ON
Voltage across inductor L = V
Therefore energy stored in inductor = V .I .tON
where tON = ON period of chopper.

When Chopper is OFF (energy is supplied by inductor to load)

Voltage across L = VO - V
Energy supplied by inductor L = (VO - V ) ItOFF , where tOFF = OFF period of Chopper.
Neglecting losses, energy stored in inductor L = energy supplied by inductor L

VItON = (VO - V ) ItOFF

Therefore

VO =

V [tON + tOFF ]
tOFF

T
VO = V

T - tON
Where

T = Chopping period or period of switching.

T = tON + tOFF

1
VO = V
1 - tON

Therefore

1
VO = V

1- d

Where

d=

tON
= duty cyle
T

For variation of duty cycle d in the range of 0 < d < 1 the output voltage VO will vary in the
range V < VO < .
2.6 CLASSIFICATION OF CHOPPERS
Choppers are classified as follows:

Class A Chopper

Class B Chopper

Class C Chopper

Class D Chopper

Class E Chopper

CLASS A CHOPPER

i0
Chopper
V

FWD

+
L
O
A
D

v0

v0 V

i0

Fig. 2.27: Class A Chopper and vO - iO Characteristic

Figure 2.27 shows a Class A Chopper circuit with inductive load and free-wheeling diode. When
chopper is ON, supply voltage V is connected across the load i.e., vO = V and current i0 flows as
shown in figure. When chopper is OFF, v0 = 0 and the load current iO continues to flow in the
same direction through the free wheeling diode. Therefore the average values of output voltage
and current i.e., vO and iO are always positive. Hence, Class A Chopper is a first quadrant
chopper (or single quadrant chopper). Class A Chopper is a step-down chopper in which power
always flows from source to load. It is used to control the speed of dc motor. The output current
equations obtained in step down chopper with R-L load can be used to study the performance of
Class A Chopper.
Figure 2.28 shows output voltage and current waveforms for a continuous load current.

ig

Thyristor
gate pulse
t

i0

Output current
CH ON
t
FWD Conducts

v0

tON

Output voltage

t
T

Fig. 2.28: First quadrant Chopper - Output Voltage and Current Waveforms

CLASS B CHOPPER

i0

v0

+
R
L v0

V
Chopper

-i0

Fig. 2.29: Class B Chopper

Fig. 2.29 shows a Class B Chopper circuit. When chopper is ON, vO = 0 and E drives a current
iO through L and R in a direction opposite to that shown in figure 2.29. During the ON period of
the chopper, the inductance L stores energy. When Chopper is OFF, diode D conducts, vO = V
and part of the energy stored in inductor L is returned to the supply. Also the current iO
continues to flow from the load to source. Hence the average output voltage is positive and
average output current is negative. Therefore Class B Chopper operates in second quadrant. In
this chopper, power flows from load to source. Class B Chopper is used for regenerative braking
of dc motor. Figure 2.30 shows the output voltage and current waveforms of a Class B Chopper.

The output current equations can be obtained as follows. During the interval diode D conducts
(chopper is off) voltage equation is given by

i0

D
Conducting

V0

L
E
-

V=

LdiO
+ RiO + E
dt

iO ( t ) = I min at t = 0 .

For the initial condition i.e.,

The solution of the above equation is obtained along similar lines as in step-down chopper with
R-L load
Therefore

iO ( t ) =

R
R
- t
- t
V -E
L
L
1
e
+
I
e

min
R

0 < t < tOFF

i( O ) ( t ) = I max

At t = tOFF
I max =

R
- tOFF
V -E
L
1
e

R
- tOFF

L
+
I
e
min

During the interval chopper is ON voltage equation is given by

i0

+
R

Chopper
ON

V0

L
E
-

0=

Redefining the time origin, at t = 0

LdiO
+ RiO + E
dt

iO ( t ) = I max .

The solution for the stated initial condition is

iO ( t ) = I max e
At

R
- t
L

R
- t
E
L
1
e

0 < t < tON

iO ( t ) = I min

t = tON

I min = I max e

Therefore

ig

R
- tON
L

R
- tON
E
- 1 - e L
R

Thyristor
gate pulse
t

i0

tOFF

tON
T
Output current

Imax
Imin
v0

D
conducts Chopper
conducts

Output voltage

t
Fig. 2.30: Class B Chopper - Output Voltage and Current Waveforms

CLASS C CHOPPER
Class C Chopper is a combination of Class A and Class B Choppers. Figure 2.18 shows a Class
C two quadrant Chopper circuit. For first quadrant operation, CH1 is ON or D2 conducts and for
second quadrant operation, CH 2 is ON or D1 conducts. When CH1 is ON, the load current iO is
positive. i.e., iO flows in the direction as shown in figure 2.31.
The output voltage is equal to V ( vO = V ) and the load receives power from the source.

CH1

D1
i0

v0

V
CH2

D2

L v0

Chopper
E

i0
-

Fig. 2.31: Class C Chopper

When CH1 is turned OFF, energy stored in inductance L forces current to flow through the
diode D2 and the output voltage vO = 0 , but iO continues to flow in positive direction. When
CH 2 is triggered, the voltage E forces iO to flow in opposite direction through L and CH 2 . The
output voltage vO = 0 . On turning OFF CH 2 , the energy stored in the inductance drives current
through diode D1 and the supply; output voltage vO = V the input current becomes negative and
power flows from load to source.
Thus the average output voltage vO is positive but the average output current iO can take both
positive and negative values. Choppers CH1 and CH 2 should not be turned ON simultaneously
as it would result in short circuiting the supply. Class C Chopper can be used both for dc motor
control and regenerative braking of dc motor. Figure 2.32 shows the output voltage and current
waveforms.

ig1

Gate pulse
of CH1
t

ig2

Gate pulse
of CH2
t

i0
Output current
t
D1

V0

CH1
ON

D2

CH2
ON

D1

CH1
ON

D2

CH2
ON

Output voltage
t

Fig. 2.32: Class C Chopper - Output Voltage and Current Waveforms

CLASS D CHOPPER
v0
CH1

D2
R i0

+
D1

L
v0

E
-

i0

CH2

Fig. 2.33: Class D Chopper

Figure 2.33 shows a class D two quadrant chopper circuit. When both CH1 and CH 2 are
triggered simultaneously, the output voltage vO = V and output current iO flows through the load
in the direction shown in figure 2.20. When CH1 and CH 2 are turned OFF, the load current

iO continues to flow in the same direction through load, D1 and D2 , due to the energy stored in
the inductor L, but output voltage vO = -V . The average load voltage vO is positive if chopper
ON-time ( tON ) is more than their OFF-time ( tOFF ) and average output voltage becomes negative
if tON < tOFF . Hence the direction of load current is always positive but load voltage can be
positive or negative. Waveforms are shown in figures 2.34 and 2.35.

ig1

Gate pulse
of CH1
t

ig2

Gate pulse
of CH2
t

i0
Output current

v0

CH1,CH2
ON

D1,D2 Conducting
Output voltage

V
Average v0

Fig. 2.34: Output Voltage and Current Waveforms for tON > tOFF

ig1

Gate pulse
of CH1
t

ig2

Gate pulse
of CH2
t

i0
Output current
CH1
CH2

t
D1, D2

v0

Output voltage

V
t

Average v0
Fig. 2.35: Output Voltage and Current Waveforms for tON < tOFF
CLASS E CHOPPER

CH1

i0

+
CH2

CH3

D1

D2

D3

v0

Fig. 2.36: Class E Chopper

CH4

D4

v0
CH2 - D4 Conducts
D1 - D4 Conducts

CH1 - CH4 ON
CH4 - D2 Conducts
i0

CH3 - CH2 ON
CH2 - D4 Conducts

D2 - D3 Conducts
CH4 - D2 Conducts

Fig. 2.37(a): Four Quadrant Operation

Figure 2.36 shows a class E 4 quadrant chopper circuit. When CH1 and CH 4 are triggered,
output current iO flows in positive direction as shown in figure 2.23 through CH1 and CH 4 ,
with output voltage vO = V . This gives the first quadrant operation. When both CH1 and CH 4
are OFF, the energy stored in the inductor L drives iO through D3 and D2 in the same direction,
but output voltage vO = -V . Therefore the chopper operates in the fourth quadrant. For fourth
quadrant operation the direction of battery must be reversed. When CH 2 and CH 3 are triggered,
the load current iO flows in opposite direction and output voltage vO = -V .
Since both iO and vO are negative, the chopper operates in third quadrant. When both CH 2 and
CH 3 are OFF, the load current iO continues to flow in the same direction through D1 and D4
and the output voltage vO = V . Therefore the chopper operates in second quadrant as vO is
positive but iO is negative. Figure 2.37(a) shows the devices which are operative in different
quadrants.

UNIT III CONTROLLED RECTIFIERS

Controlled rectifiers are line commutated converters which convert fixed voltage fixed
frequency ac input to a variable dc output as indicated in the following figure.

+
AC
Input
Voltage

Line
Commutated
Converter

DC Output
V0(dc)
-

The input supply given to the controlled rectifier is ac supply at a fixed voltage and
frequency. The output obtained is variable dc. This variable dc output is obtained by employing
phase controlled thyristors, and by varying the firing angle of these thyristors. We output so
obtained is a uni-directional and pulsating load current waveform, with a specific average value.

CLASSIFICATION OF PHASE CONTROLLED RECTIFIERS

The phase controlled rectifiers can be classified based upon the input power supply as:

Single Phase Controlled Rectifiers - Input is single phase AC supply

Three Phase Controlled Rectifiers Input is three phase AC supply

Single Phase Controlled Rectifiers can further be subdivided as :

Half wave controlled rectifier

Full wave controlled rectifiers
o Full wave centre tapped controlled rectifier
o Full wave bridge controlled rectifiers - they are of following two types:
Single phase full wave half controlled or semi-converter
Single phase full converter Three Phase Controlled Rectifiers are of
different types
In a similar manner three phase controlled rectifiers are classified as :

Three phase half wave controlled rectifiers.

Three phase full wave controlled rectiriers.
o Semi converter (half controlled bridge converter).
o Full converter (fully controlled bridge converter).

3.1 Single Phase Half Wave Controlled Rectifier : The circuit diagram of a single phase half
wave controlled rectifier is shown below:

The input ac supply is obtained from main supply through transformer to provide the
desired ac supply voltage to the converter depending on the output dc voltage required. vP is the
primary input ac supply voltage and vS represents the secondary side voltage which is fed to the
thyristor converter.
During the positive half cycle of input supply when the upper end of secondary is
positive with respect to the lower end, the thyristor anode is forward biased as its anode is
positive with respect to the cathode. The thyristor is triggered or fired at an angle , by applying
a suitable gate trigger pulse to the gate terminal of the thyristor. Thyristor starts conducting at the
same instant and acts like a closed switch and the input supply voltage appears across the load.
For a purely resistive load, the output current iO that flows through T1 when it is on, is given by
the expression
iO =

vO
, for a w t p
RL

During thyristor conduction time from a to p the load voltage and load current waveforms are
in phase as the load is taken resistive. The load current increases as the input supply voltage
p
increases and load current is maximum at w t = .
2
Note that when the thyristor conducts ( T1 is on) during w t = a to p , the thyristor current iT 1 , the
load current iO through RL and the source current iS flowing through the transformer secondary
winding are all one and the same.
Hence we can write
iS = iT 1 = iO =

vO Vm sin w t
=
; for a w t p
R
R

I m is the maximum (peak) value of the load current that flows through the transformer secondary
winding, through T1 and through the load resistor RL at the instant w t =

p
, when the input
2

supply voltage reaches its maximum value.

When the input supply voltage decreases the load current decreases. When the supply voltage
falls to zero at w t = p , the thyristor and the load current also falls to zero at w t = p . Thus the
thyristor naturally turns off when the current flowing through it falls to zero at w t = p .
During the negative half cycle of input supply when the supply voltage reverses and becomes
negative during w t = p to 2p radians, the anode of thyristor is at a negative potential with
respect to its cathode and as a result the thyristor is reverse biased and hence it remains cut-off
(in the reverse blocking mode). The thyristor cannot conduct during its reverse biased state
between w t = p to 2p . An ideal thyristor under reverse biased condition behaves as an open
switch and hence the load current and load voltage are zero during w t = p to 2p . The maximum
or peak reverse voltage that appears across the thyristor anode and cathode terminals is Vm .
The firing angle a is measured from the beginning of each positive half cycle to the time instant
when the gate trigger pulse is applied. The thyristor conduction angle is from a to p .The
maximum conduction angle is p radians (1800) when the trigger angle a = 0 .

Fig: Quadrant Diagram

The waveforms shows the input ac supply voltage across the secondary winding of the
transformer which is represented as vS , the output voltage across the load, the output (load)
current, and the thyristor voltage waveform that appears across the anode and cathode terminals.

Fig: Waveforms of single phase half-wave controlled rectifier with resistive load

vs = Vm sin w t = transformer secondary voltage.

Vm = peak value of transformer secondary voltage.

VS =

Vm
2

= RMS value of transformer secondary volatge.

vO = vL = the output voltage or voltage across load ; iO = iL = output or load current.

When the thyristor is triggered at w t = a it behaves like a closed switch and hence the supply
voltage appears across load as load voltage .

So, vO = vL = Vm sin w t ;
iO = iL =

for w t = a to p , when the thyristor is conducting and

vO
= Load current during same period.
R

AVERAGE (DC) OUTPUT VOLTAGE

If Vm is the peak input supply voltage, the average output voltage Vdc can be found from
p

VO( dc ) = Vdc =

1
vO .d (w t )
2p a

VO( dc )

1
= Vdc =
Vm sin w t.d (w t )
2p a

VO( dc ) =

1
Vm sin w t.d (w t )
2p a

VO( dc ) =

Vm
sin w t.d (w t )
2p a

VO( dc )

V
= m - cos w t
2p

a
p

VO( dc ) =

Vm
[ - cos p + cos a ]
2p

VO( dc ) =

Vm
[1 + cos a ] ; Vm = 2VS
2p

; cos p = -1

The maximum average (dc) output voltage is obtained when a = 0 and the maximum dc output
V
voltage Vdc( max ) = Vdm = m .
p
The average dc output voltage can be varied by varying the trigger angle a from 0 to a
maximum of 1800 (p radians ) .
We can plot the control characteristic, which is a plot of dc output voltage versus the trigger
angle a by using the equation for VO( dc ) .

RMS OUTPUT VOLTAGE

The rms output voltage is given by

1
VO( RMS ) =
2p

2
v
.
d
w
t
(
)

O
0

2p

Output voltage vO = Vm sin w t ; for w t = a to p

VO( RMS )

1 p
2
= Vm2 sin 2 w t.d (w t )
2p a

Solving this the equation obtained is as follows:

1

VO( RMS )

V 1
sin 2a 2
= m (p - a ) +

2 p
2

VO( RMS )

V
sin 2a 2
= m (p - a ) +

2
2 p

SINGLE PHASE HALF WAVE CONTROLLED RECTIFIER WITH RL LOAD

A single phase half wave rectifier feeding an RL load is shown below. In actual practice most of
the loads are of RL type. For example a dc motor fed by an rectifier for speed control is an RL
type of load, where R is the motor winding resistance and L is the motor inductance.

The thyristor T1 is forward biased during the positive half cycle supply voltage. T1 is triggered at

w t = a , by applying a suitable gate pulse to T1 during the positive half cycle of input supply
voltage. The output voltage across the load follows the input supply voltage when T1 is ON. The
load current iO flows through the thyristor T1 and through the load as marked in the above figure.
This load current flowing through T1 can be considered as the positive direction current. Due to
the presence of inductance in the load, the load current iO flowing through T1 would not reduce
to zero at w t = p , when the input supply voltage becomes zero and after which it starts to
become negative. So due to the presence of inductance a phase difference appears between load
voltage and the load current.
The thyristor T1 will continue to conduct the load current until all the inductive energy stored in
the load inductor L is completely utilized and the load current through T1 falls to zero at w t = b ,
where b is defined as the Extinction angle, which is defined as the instant at which the load
current falls to zero. The extinction angle b is measured from t = 0 to the to the instant at
which load current falls to zero.
The thyristor T1 conducts from w t = a to b . The conduction angle of T1 is d = ( b - a ) , which
depends on the delay angle a and the load impedance angle f . The waveforms of supply
voltage, gate triggering pulse , thyristor current, load current and the load voltage waveforms
appear as shown in the figure below.

i1 = iO = iS

From b to 2p , the thyristor remains off as it is reverse biased by supply voltage and behaves
as an open switch. The thyristor current and the load current are zero and the output voltage are
also zero during this interval between b to 2p . In next positive half cycle the thyristor is
triggered again at an instant of ( 2p + a ) , and the same operation repeats.

OUTPUT VOLTAGE

The supply voltage can be written as

vS = Vm sin w t = instantaneous value of the input supply voltage.

Thyristor T1 is triggered by applying a triggering pulse at w t = a . The load current which flows
through the thyristor T1 during w t = a to b can be found from the equation

di
L O
dt

+ RiO = Vm sin w t ;

The solution of the above differential equation gives the general expression for the output load
current which is of the form

iO =

-t
Vm
sin (w t - f ) + A1e t ;
Z

Where Vm = 2VS = maximum or peak value of input supply voltage.

Z = R 2 + (w L ) = Load impedance.
2

wL
f = tan -1
= Load impedance angle (power factor angle of load).
R

t=

L
= Load circuit time constant.
R

Therefore the general expression for the output load current is given by the equation
iO =

-R
t
Vm
sin (w t - f ) + A1e L ;
Z

The value of the constant A1 can be determined from the initial condition. i.e. initial value of
load current iO = 0 , at w t = a . Hence from the equation for iO equating iO to zero and
substituting w t = a , we get

iO = 0 =

-R

Therefore

-R
t
Vm
sin (a - f ) + A1e L
Z

A1e L =

A1 =
e

-Vm
sin (a - f )
Z

1 -Vm

Z sin (a - f )

-R
t
L

+R
t -V

A1 = e L m sin (a - f )
Z

A1 = e

R (w t )
wL

-Vm

Z sin (a - f )

By substituting w t = a , we get the value of constant A1 as

( )
-V

A1 = e w L m sin (a - f )
Z

Ra

Substituting the value of constant A1 from the above equation into the expression for iO , we
obtain
( )
-R
t
Vm
-V

sin (w t - f ) + e L e w L m sin (a - f ) ;
Z
Z

Ra

iO =

V
iO = m sin (w t - f ) + e
Z

iO =

- R (w t )
wL

R(a )
wL

-Vm

Z sin (a - f )

-R
(w t -a ) -Vm
Vm

sin (w t - f ) + e w L
sin (a - f )

Z
Z

Therefore we obtain the final expression for the inductive load current of a single phase half
wave controlled rectifier with RL load as

-R
(w t -a )
Vm
wL
iO =
sin (w t - f ) - sin (a - f ) e
;
Z

Where a w t b .

The above expression also gives the thyristor current iT 1 , during the conduction time interval of
thyristor T1 from w t = a to b .
The extinction angle b , which is the value of w t at which the load current iO falls to
zero and T1 is turned off can be estimated by using the condition that iO = 0 , at w t = b
By using the above expression , we write

iO = 0 =

As

Vm
0,
Z

Vm
Z

-R
( b -a )

wL
sin
b
f
sin
a
f
e
(
)
(
)

-R
( b -a )

wL
sin
b
f
sin
a
f
e
(
)
(
)

=0

Therefore the following expression is obtained

-R

sin ( b - f ) = sin (a - f ) e w L

( b -a )

The extinction angle can be determined using this transcendental equation by iterative method of
solution (trial and error method). Knowing b , we can determine the thyristor conduction angle.

b is the extinction angle which depends upon the load inductance value. Conduction angle

d increases as a is decreased for a specific value of b .

LOAD VOLTAGE:

VO( dc ) = VL =

VO( dc )

1
2p

2p

v .d (w t )
O

b
a
2p

1
= VL =
vO .d (w t ) + vO .d (w t ) + vO .d (w t ) ;
2p 0
a
b

vO = 0 for w t = 0 to a & for w t = b to 2p ;

VO( dc ) = VL =

1
vO .d (w t ) ; vO = Vm sin w t for w t = a to b
2p a

VO( dc ) = VL =

1
Vm sin w t.d (w t )
2p a

VO( dc ) = VL =

Vm
2p

VO( dc ) = VL =

Vm
( cos a - cos b )
2p

- cos w t

Vm
( cos a - cos b )
=
2
p
a
b

Load Current :
I O( dc ) = I L( Avg ) =

VO( dc )
RL

Vm
( cos a - cos b )
2p RL

SINGLE PHASE HALF WAVE CONTROLLED RECTIFIER WITH RL LOAD AND

FREE WHEELING DIODE

i0
+

+
Vs
-

V0

R
FWD
L
-

Fig. : Single Phase Half Wave Controlled Rectifier with RL Load and Free Wheeling
Diode (FWD)
With an RL load the average output voltage reduces. This disadvantage can be overcome by
connecting a diode across the load this diode is called a Free Wheeling Diode (FWD) as the
function performed by this diode is the freewheeling action.

Vm

Vs

Supply voltage
0

iG

2p

wt

iO

Load current
a

wt=b
a

VO

wt

-V m

Gate pulses

3p

2p

wt
2p+a

Load voltage

2p

3p

wt

At w t = p , the source voltage vS falls to zero and as supply voltage becomes negative, the free
wheeling diode is forward biased and the stored energy in the inductance causes flow of current
through load , and the freewheeling diode. As soon as the FWD is forward biased, at w t = p , the
SCR becomes reverse biased, the current through it reduces to zero and the SCR gets turnd off.
During the period w t = p to b , the load current flows through FWD (free wheeling load current)
and decreases exponentially towards zero at w t = b .
Also during this free wheeling time period the load is shorted by the conducting FWD and the
load voltage is almost zero, if the forward voltage drop across the conducting FWD is neglected.
Thus there is no negative region in the load voltage wave form. This improves the average output
voltage.
Vm
[1 + cos a ] , which is the same as that of a purely resistive
2p
load. The output voltage across the load appears similar to the output voltage of a purely resistive
load.

The average output voltage Vdc =

If the value of the inductance is very large, the load current does not decrease to zero during the
free wheeling time interval and the load current waveform appears as shown in the figure.

i0

t1

t2

SCR

FWD

2p

t3

t4

SCR

FWD

3p

2p+a

wt

Following are the observations from above operation:

The load current becomes continuous and the load current does not fall to zero for
large value of load inductance.
The ripple in the load current waveform (the amount of variation in the output load
current) decreases.

SINGLE PHASE HALF WAVE CONTROLLED RECTIFIER WITH A GENERALIZED

R L E LOAD

The rectifier with the generalized RLE load is shown below:

iO

vS

L
+
-

vO

When supply voltage is less than the load circuit dc voltage E the thyristor remains reverse
biased and hence the thyristor cannot conduct for supply voltage less than the load circuit dc
voltage.
The value of w t at which the supply voltage increases and becomes equal to the load circuit dc
voltage can be calculated by using the equation Vm sin w t = E . If we assume the value of w t is
E
equal to g then we can write Vm sin g = E . Therefore g is calculated as g = sin -1 .
Vm
For trigger angle a < g , the thyristor conducts only from w t = g to b .

For trigger angle a > g , the thyristor conducts from w t = a to b .

The waveforms of output voltage and output current are shown below:

Vm

vO

Load voltage
E
0 g

iO

2p

wt

2p+a

Im
0

Load current
a

It can be seen that

vS = Vm sin w t = Input supply voltage .

2p+a

2p+b

wt

vO = Vm sin w t = Output load voltage for w t = a to b

vO = E for w t = 0 to a & for w t = b to 2p

The thyristor is triggered at a delay angle of a , the equation for the circuit can be written as
di
Vm sin w t = iO R + L O
dt

+E ; a w t b

Which gives the general expression for the output load current as :

-t
Vm
E
iO = sin (w t - f ) - + Ae t
Z
R

Where

Z = R 2 + (w L ) = Load Impedance
2

wL
f = tan -1
= Load impedance angle
R

t=

L
= Load circuit time constant
R

The general expression for the output load current can be written as

iO =

-R
t
Vm
E
sin (w t - f ) - + Ae L
Z
R

To find the value of the constant A applying the initial condition at w t = a , load current
iO = 0 . Equating the general expression for the load current to zero at w t = a , we get
-R a

Vm
E
iO = 0 =
sin (a - f ) - + Ae L w
Z
R

From this equation the constant A can be written as

E V
a
A = - m sin (a - f ) e w L
R Z

Substituting this value of the constant A in the expression for the load current, we get the
complete expression of load current as:

-R
Vm
E E Vm
w L (wt -a )
iO = sin (w t - f ) - + - sin (a - f ) e
Z
R R Z

The Extinction angle b can be calculated from the final condition that the output current iO = 0
at w t = b . By using the above expression we get,

iO = 0 =

-R
Vm
E E V
( b -a )
sin ( b - f ) - + - m sin (a - f ) e w L
Z
R R Z

LOAD VOLTAGE

VO( dc )

1
=
2p

2p

v .d (w t )
O

VO( dc )

1
=
2p

b
2p
a

vO .d (w t ) + vO .d (w t ) + vO .d (w t )
0

a
b

vO = Vm sin w t = Output load voltage for w t = a to b

vO = E for w t = 0 to a & for w t = b to 2p

VO( dc )

1
=
2p

b
2p
a

E.d (w t ) + Vm sin w t + E.d (w t )

0

a
b

VO( dc )

1
=
2p

E (w t )

+ Vm ( - cos w t )

+ E (w t )

2p

VO( dc ) =

1
E (a - 0 ) - Vm ( cos b - cos a ) + E ( 2p - b )
2p

VO( dc ) =

Vm
E
( cos a - cos b ) +
( 2p - b + a )
2p
2p

VO( dc ) =

2p - ( b - a )
Vm
( cos a - cos b ) +
E
2p
2p

RMS output voltage can be determined as:

VO( RMS )

2p

1 2
=
vO .d (w t )
2p 0

Single phase half wave controlled rectifiers are rarely used in practice as they provide low dc
output. They are only of theoretical interest.

Following are the disadvantages of the single phase controlled rectifier:

Low dc output voltage.

Low dc output power and lower efficiency.
Higher ripple voltage & ripple current.
Higher ripple factor.
The input supply current waveform has a dc component which can result in dc saturation
of the transformer core.

The above mentioned disadvantages of a single phase half wave controlled rectifier can be over
come by using a full wave controlled rectifier circuit. Most of the practical converter circuits use
full wave controlled rectifiers.
3.2 SINGLE PHASE FULL WAVE CONTROLLED RECTIFIERS
Single phase full wave controlled rectifiers are of two types

Single phase full wave controlled rectifier using a center tapped transformer.
Single phase full wave bridge controlled rectifier
Half controlled bridge converter or semi converter
Fully controlled bridge converter or full converter.

SINGLE PHASE FULL WAVE CONTROLLED RECTIFIER USING CENTER TAPPED

TRANSFORMER

iS T1

+
vO

vS
AC
Supply

iO

FWD

T2

vS = Supply Voltage across the upper half of the transformer secondary winding

vS = v AO = Vm sin w t

vBO = -v AO = -Vm sin w t = supply voltage across the lower half of the transformer
secondary winding.

This type of converter requires a center tapped transformer and two thyristors T1 and T2 . The
input supply is given with the help of a supply transformer, the primary side of which is
connected to the ac line voltage. The secondary side of the transformer has three lines and the
center point of the transformer is used as the reference point to measure the input and output
voltages.
The upper half of the secondary winding long with the thyristor T1 and load act as a half wave
controlled rectifier and the lower half of the secondary winding and thyristor T2 with the
common load act as the second half wave controlled rectifier so as to produce a full wave load
voltage waveform.
There are two types of operations are possible, they are:

Discontinuous load current operation, which occurs for a purely resistive load or
an RL load with low inductance value.
Continuous load current operation which occurs for an RL type of load with large
load inductance.

Discontinuous Load Current Operation (for low value of load inductance)

Load current is generally discontinuous when the load is purely resistive or when the RL load
has a low value of inductance.
During the positive half cycle of input supply, when the upper terminal of the secondary winding
is at a positive potential with respect to the center point O the thyristor T1 is forward biased and
it is triggered at an instant of t = a . The load current flows through the thyristor T1 , load and
upper portion of the secondary winding, during the period when the thyristor T1 is conducting.
During this period the supply voltage appears across load as the load voltage. At w t = b , the
load current through the thyristor T1 reduces and drops to zero.

vO

Vm
wt

0
iO

a
a

b
wt
a

pb
(p+a)

2p

3p

(p+b)

Fig.: Waveform for Discontinuous Load Current Operation without FWD

During the negative half cycle of the input the voltage at the upper terminal of secondary
winding becomes negative whereas the voltage at lower secondary terminal becomes positive
with respect to the center point O. The thyristor T2 is now forward biased and it is triggered at
a delay angle of (p + a ) . The current flows through thyristor T2 , load and the lower part of the
secondary winding, and the load is connected to the lower half of the secondary winding and
lower secondary voltage appears across the load.
For purely resistive loads when L = 0, the load current becomes zero at t = The load current
and the load voltage waveforms are in phase and there is no phase shift between the load voltage
and the load current waveform in the case of a purely resistive load.
For low values of load inductance the load current would be discontinuous and the extinction
angle b > p but b < (p + a ) .
For large values of load inductance the load current would be continuous and does not fall to
zero. The thyristor T1 conducts from a to (p + a ) , until the next thyristor T2 is triggered. When
T2 is triggered at w t = (p + a ) , the thyristor T1 will be reverse biased and hence T1 turns off.

OUTPUT VOLTAGE
The average or dc output voltage of a full-wave controlled rectifier can be calculated by finding
the average value of the output voltage waveform over one output cycle (i.e., p radians) and note
T
that the output pulse repetition time is
seconds where T represents the input supply time
2
1
period and T = ; where f = input supply frequency.
f
Assuming the load inductance to be small so that b > p , b < (p + a ) we obtain discontinuous
load current operation. The load current flows through T1 form w t = a to b , where a is the
trigger angle of thyristor T1 and b is the extinction angle where the load current through T1 falls
to zero at w t = b . Therefore the average or dc output voltage can be obtained by using the
expression

VO( dc )

2
= Vdc =
2p

w t =a

vO .d (w t )

VO( dc )

1
= Vdc =
vO .d (w t )
p w t=a

VO( dc )

1
= Vdc = Vm sin w t.d (w t )
p a

VO( dc )

V
= Vdc = m
p

VO( dc ) = Vdc =

- cos w t

a
b

Vm
( cos a - cos b )
p

When the load inductance is small and negligible that is L 0 , the extinction angle
b = p radians . Hence the average or dc output voltage for resistive load is obtained as

VO( dc ) =

Vm
( cos a - cos p ) ; cos p = -1
p

VO( dc ) =

Vm
( cos a - ( -1) )
p

VO( dc ) =

Vm
(1 + cos a ) ; for resistive load, when L 0
p

When the Free wheeling diode (FWD) is connected across the load

When T1 is triggered at w t = a , during the positive half cycle of the input supply the FWD is
reverse biased during the time period w t = a to p . FWD remains reverse biased and cut-off
from w t = a to p . The load current flows through the conducting thyristor T1 , through the RL
load and through upper half of the transformer secondary winding during the time period
a to p .
At w t = p , when the input supply voltage across the upper half of the secondary winding
reverses and becomes negative the FWD turns-on. The load current continues to flow through
the FWD from w t = p to b .

vO

Vm
wt

0
iO

a
a

b
wt
pb

(p+a)

2p

3p

(p+b)

Fig.: Waveform for Discontinuous Load Current Operation with FWD

EXPRESSION FOR THE DC OUTPUT VOLTAGE OF A SINGLE PHASE FULL WAVE

CONTROLLED RECTIFIER WITH RL LOAD AND FWD

VO( dc ) = Vdc =

1
vO .d (w t )
p w t= 0

Thyristor T1 is triggered at w t = a . T1 conducts from w t = a to p

Output voltage vO = Vm sin w t ; for w t = a to p

FWD conducts from w t = p to b and vO 0 during discontinuous load current

Therefore

Therefore

VO( dc ) = Vdc =

1
Vm sin w t.d (w t )
p a

- cos w t

a
p

VO( dc ) = Vdc =

Vm
p

VO( dc ) = Vdc =

Vm
[ - cos p + cos a ] ; cos p = -1
p

VO( dc ) = Vdc =

Vm
(1 + cos a )
p

The DC output voltage Vdc is same as the DC output voltage of a single phase full wave
controlled rectifier with resistive load. Note that the dc output voltage of a single phase full wave
controlled rectifier is two times the dc output voltage of a half wave controlled rectifier.

CONTINUOUS LOAD CURRENT OPERATION (WITHOUT FWD) For large values of

load inductance the load current flows continuously without decreasing and falling to zero and
there is always a load current flowing at any point of time. This type of operation is referred to as
continuous current operation.
Generally the load current is continuous for large load inductance and for low trigger angles.
The load current is discontinuous for low values of load inductance and for large values of
trigger angles.

The waveforms for continuous current operation are as shown.

vO

Vm
wt

0
iO
a

T1 ON

T2 ON

T1 ON

2p

3p

(p+a)

wt

(2p+a)

Fig.: Load voltage and load current waveform of a single phase full wave controlled
rectifier with RL load & without FWD for continuous load current operation

In the case of continuous current operation the thyristor T1 which is triggered at a delay angle of

a , conducts from w t = a to (p + a ) . Output voltage follows the input supply voltage across the
upper half of the transformer secondary winding vO = vAO = Vm sin w t .
The next thyristor T2 is triggered at w t = (p + a ) , during the negative half cycle input supply. As
soon as T2 is triggered at w t = (p + a ) , the thyristor T1 will be reverse biased and T1 turns off
due to natural commutation (ac line commutation). The load current flows through the thyristor
T2 from w t = (p + a ) to ( 2p + a ) . Output voltage across the load follows the input supply
voltage across the lower half of the transformer secondary winding vO = vBO = -Vm sin w t .
Each thyristor conducts for p radians (1800 ) in the case of continuous current operation.

OUTPUT VOLTAGE OF SINGLE PHASE FULL WAVE CONTROLLED RECTIFIER

WITH LARGE LOAD INDUCTANCE ASSUMING CONTINUOUS LOAD CURRENT
OPERATION.

VO( dc )

VO( dc )

(p +a )

1
= Vdc = Vm sin w t.d (w t )
p a

Vm
p

VO( dc ) = Vdc =

VO( dc ) = Vdc =

(p +a )

1
= Vdc =
p

vO .d (w t )

w t =a

- cos w t

(p +a )
a

Vm
cos a - cos (p + a ) ;
p

VO( dc ) = Vdc =

Vm
[cos a + cos a ]
p

VO( dc ) = Vdc =

2Vm
cos a
p

SINGLE PHASE SEMICONVERTERS

cos (p + a ) = - cos a

Consider diode D2 as D1 in the figure and diode D1 as D2

Single phase semi-converter circuit is a full wave half controlled bridge converter which uses
two thyristors and two diodes connected in the form of a full wave bridge configuration.
The two thyristors are controlled power switches which are turned on one after the other by
applying suitable gating signals (gate trigger pulses). The two diodes are uncontrolled power
switches which turn-on and conduct one after the other as and when they are forward biased.
The circuit diagram of a single phase semi-converter (half controlled bridge converter) is shown
in the above figure with highly inductive load and a dc source in the load circuit. When the load
inductance is large the load current flows continuously and we can consider the continuous load
current operation assuming constant load current, with negligible current ripple (i.e., constant
and ripple free load current operation).
The ac supply to the semiconverter is normally fed through a mains supply transformer having
suitable turns ratio. The transformer is suitably designed to supply the required ac supply voltage
(secondary output voltage) to the converter.
During the positive half cycle of input ac supply voltage, when the transformer secondary output
line A is positive with respect to the line B the thyristor T1 and the diode D1 are both forward
biased. The thyristor T1 is triggered at w t = a ; ( 0 a p ) by applying an appropriate gate
trigger signal to the gate of T1 . The current in the circuit flows through the secondary line A,
through T1 , through the load in the downward direction, through diode D1 back to the secondary
line B.

T1 and D1 conduct together from w t = a to p and the load is connected to the input ac supply.
The output load voltage follows the input supply voltage (the secondary output voltage of the
transformer) during the period w t = a to p .
At w t = p , the input supply voltage decreases to zero and becomes negative during the period

w t = p to (p + a ) . The free wheeling diode Dm across the load becomes forward biased and
conducts during the period w t = p to (p + a ) .

Fig:. Waveforms of single phase semi-converter for RLE load and constant load current for
a > 900

The load current is transferred from T1 and D1 to the FWD Dm . T1 and D1 are turned off. The
load current continues to flow through the FWD Dm . The load current free wheels (flows
continuously) through the FWD during the free wheeling time period p to (p + a ) .
During the negative half cycle of input supply voltage the secondary line A becomes negative
with respect to line B. The thyristor T2 and the diode D2 are both forward biased. T2 is
triggered at w t = (p + a ) , during the negative half cycle. The FWD is reverse biased and turnsoff as soon as T2 is triggered. The load current continues to flow through T2 and D2 during the
period w t = (p + a ) to 2p

AVERAGE OUTPUT VOLTAGE

The equation of average output voltage can be derived as:

2
Vdc =
Vm sin w t.d (w t )
2p a

Vdc =

2Vm
p
[ - cos w t ]a
2p

Vdc =

Vm
[ - cos p + cos a ] ; cos p = -1
p

Therefore

Vdc =

Vm
[1 + cos a ]
p

RMS OUTPUT VOLTAGE

The rms output voltage is found from

VO( RMS ) = Vm2 sin 2 w t.d (w t )

2p a

VO( RMS )

Vm2
=
2p

VO( RMS )

V
= m
2

1
2

2
1
cos
2
w
t
.
d
w
t
(
)
(
)

SINGLE PHASE
CONVERTER)

1
sin 2a 2
p
a
+

p
2

FULL

CONVERTER

The circuit diagram of the converter is shown below:

(FULLY

CONTROLLED

BRIDGE

Considering a highly inductive load and a dc source in the load circuit so that the load current is
continuous and ripple free (constant load current operation).
The fully controlled bridge converter consists of four thyristors T1 , T2 , T3 and T4 connected in
the form of full wave bridge configuration as shown in the figure. Each thyristor is controlled
and turned on by its gating signal and naturally turns off when a reverse voltage appears across
it. During the positive half cycle when the upper line of the transformer secondary winding is at a
positive potential with respect to the lower end the thyristors T1 and T2 are forward biased
during the time interval w t = 0 to p . The thyristors T1 and T2 are triggered simultaneously

wt = a ;

(0 a p ) ,

the load is connected to the input supply through the conducting

thyristors T1 and T2 . The output voltage across the load follows the input supply voltage and
hence output voltage vO = Vm sin w t . Due to the inductive load T1 and T2 will continue to
conduct beyond w t = p , even though the input voltage becomes negative. T1 and T2 conduct
together during the time period a to (p + a ) , for a time duration of p radians (conduction
angle of each thyristor = 180 0 )
During the negative half cycle of input supply voltage for w t = p to 2p the thyristors T3 and
T4 are forward biased. T3 and T4 are triggered at w t = (p + a ) . As soon as the thyristors T3 and
T4 are triggered a reverse voltage appears across the thyristors T1 and T2 and they naturally
turn-off and the load current is transferred from T1 and T2 to the thyristors T3 and T4 . The
output voltage across the load follows the supply voltage and vO = -Vm sin w t during the time
period w t = (p + a ) to ( 2p + a ) . In the next positive half cycle when T1 and T2 are triggered,
T3 and T4 are reverse biased and they turn-off. The figure shows the waveforms of the input
supply voltage, the output load voltage, the constant load current with negligible ripple and the
input supply current.

During the time period w t = a to p , the input supply voltage vS and the input supply current iS
are both positive and the power flows from the supply to the load. The converter operates in the
rectification mode during w t = a to p .

During the time period w t = p to (p + a ) , the input supply voltage vS is negative and the input
supply current iS is positive and there will be reverse power flow from the load circuit to the
input supply. The converter operates in the inversion mode during
w t = p to (p + a ) and the load energy is fed back to the input source.

the time period

The single phase full converter is extensively used in industrial applications up to about 15kW of
output power. Depending on the value of trigger angle a , the average output voltage may be
either positive or negative and two quadrant operation is possible.

AVERAGE OUTPUT VOLTAGE

The average (dc) output voltage can be determined by using the expression

VO( dc ) = Vdc =

2p

1
vO .d (w t ) ;
2p 0

The output voltage waveform consists of two output pulses during the input supply time period
between 0 & 2p radians . In the continuous load current operation of a single phase full
converter (assuming constant load current) each thyristor conduct for p radians (1800) after it is
triggered. When thyristors T1 and T2 are triggered at w t = a T1 and T2 conduct from

a to (p + a ) and the output voltage follows the input supply voltage. Therefore output voltage
vO = Vm sin w t ; for w t = a to (p + a )
Hence the average or dc output voltage can be calculated as

VO( dc )

p +a

2
= Vdc =
Vm sin w t.d (w t )
2p a

VO( dc )

p +a

1
= Vdc = Vm sin w t.d (w t )
pa

Therefore

VO( dc ) = Vdc =

p +a

Vm
sin w t.d (w t )
p a

VO( dc ) = Vdc =

Vm
p +a
[ - cos w t ]a
p

VO( dc ) = Vdc =

Vm
- cos (p + a ) + cos a ; cos (p + a ) = - cos a
p

VO( dc ) = Vdc =

2Vm
cos a
p

TWO QUADRANT OPERATION OF A SINGLE PHASE FULL CONVERTER

For trigger angle a > 900 ,cos a becomes negative and as a result the average dc output voltage
Vdc becomes negative, but the load current flows in the same positive direction i.e., I dc is
positive . Hence the output power becomes negative. This means that the power flows from the
load circuit to the input ac source. This is referred to as line commutated inverter operation.
During the inverter mode operation for a > 900 the load energy can be fed back from the load
circuit to the input ac source

The above figure shows the two regions of single phase full converter operation in the Vdc versus
I dc plane. In the first quadrant when the trigger angle a is less than 900, Vdc and I dc are both
positive and the converter operates as a controlled rectifier and converts the ac input power into
dc output power. The power flows from the input source to the load circuit. This is the normal
controlled rectifier operation where Pdc is positive.
When the trigger angle is increased above 900 , Vdc becomes negative but I dc is positive and the
average output power (dc output power) Pdc becomes negative and the power flows from the
load circuit to the input source. The operation occurs in the fourth quadrant where Vdc is negative
and I dc is positive. The converter operates as a line commutated inverter.

RMS OUTPUT VOLTAGE

The rms value of the output voltage is calculated as

VO( RMS )

2p

1 2
=
vO .d (w t )
2p 0

which can be solved as

VO( RMS ) =

Vm2
sin 2a - sin 2a
(p ) -

2p
2

VO( RMS ) =

Therefore

VO( RMS ) =

Vm2
V2 V
(p ) - 0 = m = m
2p
2
2

Vm
= VS
2

Hence the rms output voltage is same as the rms input supply voltage
THREE PHASE CONTROLLED CONVERTER
Single phase half controlled bridge converters & fully controlled bridge converters are used
extensively in industrial applications up to about 15kW of output power. The single phase
2V
controlled rectifiers provide a maximum dc output of Vdc( max ) = m .
p
The output ripple frequency is equal to the twice the ac supply frequency. The single phase full
wave controlled rectifiers provide two output pulses during every input supply cycle and hence
are referred to as two pulse converters.
Three phase converters are 3-phase controlled rectifiers which are used to convert ac input power
supply into dc output power across the load.
3.3 3-PHASE HALF WAVE CONVERTER
Three single phase half-wave converters are connected together to form a three phase half-wave
converter as shown in the figure.

THEE PHASE SUPPLY VOLTAGE EQUATIONS

We define three line neutral voltages (3 phase voltages) as follows

V CN
120
120

V AN

120

vRN = van = Vm sin w t ; Vm = Max. Phase Voltage

2p

vYN = vbn = Vm sin w t

3

V BN

Vector diagram of 3-phase supply voltages

vYN = vbn = Vm sin (w t - 1200 )

2p

vBN = vcn = Vm sin w t +

vBN = vcn = Vm sin (w t + 1200 )

vBN = vcn = Vm sin (w t - 2400 )

The 3-phase half wave converter combines three single phase half wave controlled rectifiers in
one single circuit feeding a common load. The thyristor T1 in series with one of the supply phase
windings ' a - n ' acts as one half wave controlled rectifier. The second thyristor T2 in series with
the supply phase winding ' b - n ' acts as the second half wave controlled rectifier. The third
thyristor T3 in series with the supply phase winding ' c - n ' acts as the third half wave controlled
rectifier.

The 3-phase input supply is applied through the star connected supply transformer as shown in
the figure. The common neutral point of the supply is connected to one end of the load while the
other end of the load connected to the common cathode point.
p

When the thyristor T1 is triggered at w t = + a = ( 300 + a ) , the phase voltage van appears
6

across the load when T1 conducts. The load current flows through the supply phase winding

' a - n ' and through thyristor T1 as long as T1 conducts.

5p

When thyristor T2 is triggered at w t =

+ a = (1500 + a ) , T1 becomes reverse biased and
6

turns-off. The load current flows through the thyristor T2 and through the supply phase winding

' b - n ' . When T2 conducts the phase voltage vbn appears across the load until the thyristor T3 is
triggered .

3p

When the thyristor T3 is triggered at w t =

+ a = ( 2700 + a ) , T2 is reversed biased and
2

hence T2 turns-off. The phase voltage vcn appears across the load when T3 conducts.

When T1 is triggered again at the beginning of the next input cycle the thyristor T3 turns off as it
is reverse biased naturally as soon as T1 is triggered. The figure shows the 3-phase input supply
voltages, the output voltage which appears across the load, and the load current assuming a
constant and ripple free load current for a highly inductive load and the current through the
thyristor T1 .

p
For a purely resistive load where the load inductance L = 0 and the trigger angle a > , the
6
load current appears as discontinuous load current and each thyristor is naturally commutated
when the polarity of the corresponding phase supply voltage reverses. The frequency of output
ripple frequency for a 3-phase half wave converter is 3 f S , where f S is the input supply

frequency.

The 3-phase half wave converter is not normally used in practical converter systems because of
the disadvantage that the supply current waveforms contain dc components (i.e., the supply
current waveforms have an average or dc value).

AVERAGE OUTPUT VOLTAGE

The reference phase voltage is vRN = van = Vm sin w t . The trigger angle a is measured from the
cross over points of the 3-phase supply voltage waveforms. When the phase supply voltage van
begins its positive half cycle at w t = 0 , the first cross over point appears at
p
w t = radians = 300 .
6

The trigger angle a for the thyristor T1 is measured from the cross over point at w t = 300 . The
thyristor T1 is forward biased during the period w t = 30 0 to 150 0 , when the phase supply voltage
van has a higher amplitude than the other phase supply voltages. Hence T1 can be triggered
between 300 to 1500 . When the thyristor T1 is triggered at a trigger angle a , the average or dc
output voltage for continuous load current is calculated using the equation

56p +a

Vdc =
vO .d (w t )
2p p
6 +a

Output voltage

vO = van = Vm sin w t for w t = ( 300 + a ) to (1500 + a )

56p +a

Vdc =
Vm sin w t.d (w t )

2p p
6 +a

As the output load voltage waveform has three output pulses during the input cycle of 2p
radians

56p +a

3Vm

sin w t.d (w t )
Vdc =

2p p
6 +a

3Vm
Vdc =
( - cos w t )
2p

Vdc =

3Vm
2p

5p
+a
6

p
+a
6

5p

- cos 6 + a + cos 6 + a

Note from the trigonometric relationship

cos ( A + B ) = ( cos A.cos B - sin A.sin B )

Vdc =

3Vm
2p

5p
- cos 6

5p
cos (a ) + sin

p
p
sin (a ) + cos .cos (a ) - sin sin (a )

6
6

Vdc =

3Vm
- cos (1500 ) cos (a ) + sin (1500 ) sin (a ) + cos ( 300 ) .cos (a ) - sin ( 300 ) sin (a )

2p

Vdc =

3Vm
- cos (1800 - 300 ) cos (a ) + sin (1800 - 300 ) sin (a ) + cos ( 300 ) .cos (a ) - sin ( 300 ) sin (a )

2p

Note: cos (1800 - 300 ) = - cos ( 300 )

sin (1800 - 300 ) = sin ( 300 )

Therefore
Vdc =

3Vm
+ cos ( 300 ) cos (a ) + sin ( 300 ) sin (a ) + cos ( 300 ) .cos (a ) - sin ( 300 ) sin (a )

2p

Vdc =

3Vm
2 cos ( 300 ) cos (a )

2p

Vdc =

3Vm
2p

3
cos (a )
2
2

Vdc =

3Vm
3 3Vm
3 cos (a ) =
cos (a )

2p
2p

Vdc =

3VLm
cos (a )
2p

RMS OUTPUT VOLTAGE

The rms value of output voltage is found by using the equation

VO( RMS )

3
=
2p

Vm2 sin 2 w t.d (w t )

p
+a

VO( RMS )

1
2
3
= 3Vm +
cos 2a
6 8p

5p
+a
6

and we obtain

Vbn

Van

Vcn

a=0
Vs
0

30

60

90

120 150

Vbn

Van

180 210 240 270 300 330 360

390 420

wt

Vcn

a=150
V0

30

60

90

120 150

Vbn

Van

180 210 240 270 300 330 360

390 420

wt

Vcn

a=300
V0

0
0

30

60

90

120 150

Vbn

Van

180 210 240 270 300 330 360

390 420

wt

Vcn

a=600
V0

30

60

90

120 150

180 210 240 270 300 330 360

390 420

wt

3.4 Three Phase Full Wave Converter

Semiconverters

3-phase semi-converters are three phase half controlled bridge controlled rectifiers which employ
three thyristors and three diodes connected in the form of a bridge configuration. Three thyristors
are controlled switches which are turned on at appropriate times by applying appropriate gating
signals. The three diodes conduct when they are forward biased by the corresponding phase
supply voltages.
3-phase semi-converters are used in industrial power applications up to about 120kW output
power level, where single quadrant operation is required. The power factor of 3-phase semiconverter decreases as the trigger angle a increases. The power factor of a 3-phase semiconverter is better than three phase half wave converter.
The figure shows a 3-phase semi-converter with a highly inductive load and the load current is
assumed to be a constant and continuous load current with negligible ripple.

Thyristor T1 is forward biased when the phase supply voltage van is positive and greater than the
other phase voltages vbn and vcn . The diode D1 is forward biased when the phase supply voltage
vcn is more negative than the other phase supply voltages.
Thyristor T2 is forward biased when the phase supply voltage vbn is positive and greater than the
other phase voltages. Diode D2 is forward biased when the phase supply voltage van is more
negative than the other phase supply voltages.

Thyristor T3 is forward biased when the phase supply voltage vcn is positive and greater than the
other phase voltages. Diode D3 is forward biased when the phase supply voltage vbn is more
negative than the other phase supply voltages.
The figure shows the waveforms for the three phase input supply voltages, the output voltage,
the thyristor and diode current waveforms, the current through the free wheeling diode Dm and
the supply current ia . The frequency of the output supply waveform is 3 f S , where f S is the
input ac supply frequency. The trigger angle a can be varied from 00 to 1800 .
p
7p
0
0
During the time period w t
i.e., for 30 w t 210 , thyristor T1 is forward
6
6

biased. If T1 is triggered at w t = + a , T1 and D1 conduct together and the line to line supply
6

7p
voltage vac appears across the load. At w t =
, vac starts to become negative and the free
6
wheeling diode Dm turns on and conducts. The load current continues to flow through the free

wheeling diode Dm and thyristor T1 and diode D1 are turned off.

If the free wheeling diode Dm is not connected across the load, then T1 would continue to
5p

conduct until the thyristor T2 is triggered at w t =

+ a and the free wheeling action is
6

accomplished through T1 and D2 , when D2 turns on as soon as van becomes more negative at
2p
7p
p
radians (120 0 ) and the
wt =
. If the trigger angle a each thyristor conducts for
3
6
3
free wheeling diode Dm does not conduct. The waveforms for a 3-phase semi-converter with
p
a is shown in figure
3

AVERAGE OUTPUT VOLTAGE

vYN = vbn = Vm sin (w t - 1200 )

2p

vBN = vcn = Vm sin w t +

vBN = vcn = Vm sin (w t + 1200 )

vBN = vcn = Vm sin (w t - 2400 )

The corresponding line-to-line voltages are

vRB = vac = ( van - vcn ) = 3Vm sin w t -

6

5p

vYR = vba = ( vbn - van ) = 3Vm sin w t

6

vBY = vcb = ( vcn - vbn ) = 3Vm sin w t +

2

vRY = vab = ( van - vbn ) = 3Vm sin w t +

6

For a

p
and discontinuous output voltage: the average output voltage is found from
3

3
Vdc =
2p
3
Vdc =
2p

7p

vac .d (w t )

6 +a

7p

6 +a

3 Vm sin w t - d (w t )
6

Vdc =

3 3Vm
(1 + cos a )
2p

Vdc =

3VmL
(1 + cos a )
2p

The maximum average output voltage that occurs at a delay angle of a = 0 is

Vdm =

3 3Vm
p

The normalized average output voltage is

Vn =

Vdc
= 0.5 (1 + cos a )
Vdm

The rms output voltage is found from

VO( RMS )

3
=
2p

2
p
2
2
3Vm sin w t - d (w t )

p
6 +a

VO( RMS )

3
1
2
= 3Vm p - a + sin 2a
2

4p

7p

For a

p
, and continuous output voltage
3

p
Output voltage vO = vab = 3Vm sin w t + ; for w t = + a to
6

p
5p

Output voltage vO = vac = 3Vm sin w t - ; for w t = to

+a
6

2
6

The average or dc output voltage is calculated by using the equation

5p
p

6 +a
3 2
Vdc =
v
.
d
w
t
+
v
.
d
w
t
( ) ac ( )
ab
2p p

p
2
6+a

Vdc =

Vn =

3 3Vm
(1 + cos a )
2p

Vdc
= 0.5 (1 + cos a )
Vdm

The RMS value of the output voltage is calculated by using the equation

VO( RMS )

3
=
2p

5p
2
vab
.d (w t ) +

6 +a

6 +a

2
2
vac .d (w t )

VO( RMS )

3 2p
2
= 3Vm
+ 3 cos 2 a

4p 3

Full Converter
Three phase full converter is a fully controlled bridge controlled rectifier using six thyristors
connected in the form of a full wave bridge configuration. All the six thyristors are controlled
switches which are turned on at a appropriate times by applying suitable gate trigger signals.
The three phase full converter is extensively used in industrial power applications upto about
120kW output power level, where two quadrant operation is required. The figure shows a three
phase full converter with highly inductive load. This circuit is also known as three phase full
wave bridge or as a six pulse converter.
p
The thyristors are triggered at an interval of radians (i.e. at an interval of 600 ). The
3
frequency of output ripple voltage is 6 f S and the filtering requirement is less than that of three

phase semi and half wave converters.

At w t = + a , thyristor T6 is already conducting when the thyristor T1 is turned on by

6

applying the gating signal to the gate of T1 . During the time period w t = + a to + a ,
6

thyristors T1 and T6 conduct together and the line to line supply voltage vab appears across the
load.
p

At w t = + a , the thyristor T2 is triggered and T6 is reverse biased immediately and T6 turns

2

5p

off due to natural commutation. During the time period w t = + a to

+ a , thyristor T1
2

and T2 conduct together and the line to line supply voltage vac appears across the load.

The thyristors are numbered in the circuit diagram corresponding to the order in which they are
triggered. The trigger sequence (firing sequence) of the thyristors is 12, 23, 34, 45, 56, 61, 12,
23, and so on. The figure shows the waveforms of three phase input supply voltages, output
voltage, the thyristor current through T1 and T4 , the supply current through the line a.

We define three line neutral voltages (3 phase voltages) as follows

vRN = van = Vm sin w t

Vm = Max. Phase Voltage

2p

vYN = vbn = Vm sin w t 3

0
= Vm sin (w t - 120 )

2p

vBN = vcn = Vm sin w t +

3

0
0
= Vm sin (w t + 120 ) == Vm sin (w t - 240 )

Where Vm is the peak phase voltage of a star (Y) connected source.

The corresponding line-to-line voltages are

vRY = vab = ( van - vbn ) = 3Vm sin w t +

6

vYB = vbc = ( vbn - vcn ) = 3Vm sin w t -

2

vBR = vca = ( vcn - van ) = 3Vm sin w t +

2

OUTPUT VOLTAGE
The output load voltage consists of 6 voltage pulses over a period of 2p radians, hence the
average output voltage is calculated as

VO( dc ) = Vdc =

6
2p

p
+a
2

p
+a
6

vO .dw t

vO = vab = 3Vm sin w t +

6

Vdc =

p
+a
2

3
p p
6

Vdc =

+a

3Vm sin w t + .dw t

6

3 3Vm
3V
cos a = mL cos a
p
p

Where VmL = 3Vm = Max. line-to-line supply voltage

The maximum average dc output voltage is obtained for a delay angle a = 0,

Vdc( max ) = Vdm =

3 3Vm 3VmL
=
p
p

The normalized average dc output voltage is

Vdcn = Vn =

Vdc
= cos a
Vdm

The rms value of the output voltage is found from

v .d (w t )

p
+a

1
2

VO( rms )

6
=
2p

p
+a
2

p
+a
2

VO( rms )

6
=
2p

p
+a
2

VO( rms )

3
=
2p

VO( rms )

1 3 3
2
= 3Vm +
cos 2a
2 4p

2
O

2
vab
.d (w t )

p
+a

2
p

3Vm2 sin 2 w t + .d (w t )

p
+a

3.5 Performance Parameters of Phase Controlled Converters

Output dc power (average or dc output power delivered to the load)

PO( dc ) = VO( dc ) I O ( dc ) ; i.e., Pdc = Vdc I dc

Where

VO( dc ) = Vdc = average or dc value of output (load) voltage.

I O( dc ) = I dc = average or dc value of output (load) current.

Output ac power

PO( ac ) = VO( RMS ) I O( RMS )

Efficiency of Rectification (Rectification Ratio)

Efficiency h =

PO( dc )
PO( ac )

% Efficiency h =

PO( dc )
PO( ac )

100

The output voltage can be considered as being composed of two components

The dc component VO( dc ) = DC or average value of output voltage.

The ac component or the ripple component Vac = Vr ( rms ) = RMS value of all the ac
ripple components.

The total RMS value of output voltage is given by

VO( RMS ) = VO2( dc ) + Vr2( rms )

Therefore

Vac = Vr ( rms ) = VO2( RMS ) - VO2( dc )

Form Factor (FF) which is a measure of the shape of the output voltage is given by

FF =

VO( RMS )
VO( dc )

RMS output ( load ) voltage

DC output ( load ) voltage

The Ripple Factor (RF)

which is a measure of the ac ripple content in the output voltage
waveform. The output voltage ripple factor defined for the output voltage waveform is given by

rv = RF =

rv =

Vr ( rms )
VO( dc )

Vac
Vdc

VO2( RMS ) - VO2( dc )

VO( dc )

VO( RMS )
=
-1
VO( dc )

Therefore
rv = FF 2 - 1

Current Ripple Factor defined for the output (load) current waveform is given by

ri =

Where

I r ( rms )
I O( dc )

I ac
I dc

I r ( rms ) = I ac = I O2 ( RMS ) - I O2 ( dc )

Some times the peak to peak output ripple voltage is also considered to express the peak
to peak output ripple voltage as

Vr ( pp ) = peak to peak ac ripple output voltage

The peak to peak ac ripple load current is the difference between the maximum and the
minimum values of the output load current.

I r ( pp ) = I O( max ) - I O( min )

Transformer Utilization Factor (TUF)

TUF =

PO ( dc )
VS I S

Where
VS =

RMS value of transformer secondary output voltage (RMS supply voltage

at the secondary)

IS =

RMS value of transformer secondary current (RMS line or supply

current).

vS = Supply voltage at the transformer secondary side .

iS = Input supply current (transformer secondary winding current) .
iS 1 = Fundamental component of the input supply current .
I P = Peak value of the input supply current .
f = Phase angle difference between (sine wave components) the fundamental
components of input supply current and the input supply voltage.
f = Displacement angle (phase angle)

For an RL load f = Displacement angle = Load impedance angle

wL
\ f = tan -1
for an RL load
R

Displacement Factor (DF) or Fundamental Power Factor

DF = Cosf

Harmonic Factor (HF) or Total Harmonic Distortion Factor (THD)

The harmonic factor is a measure of the distortion in the output waveform and is also
referred to as the total harmonic distortion (THD)

1
2

I 2 2
I - I
S
HF =
= - 1
2
I S1

I S1
2
S

2
S1

Where
I S = RMS value of input supply current.
I S 1 = RMS value of fundamental component of the input supply current.
Input Power Factor (PF)
PF =

VS I S1
I
cos f = S 1 cos f
VS I S
IS

The Crest Factor (CF)

CF =

I S ( peak )
IS

Peak input supply current

RMS input supply current

For an Ideal Controlled Rectifier

FF = 1 ; which means that VO( RMS ) = VO( dc ) .

Efficiency h = 100% ; which means that PO( dc ) = PO( ac ) .

Vac = Vr ( rms ) = 0 ; so that RF = rv = 0 ; Ripple factor = 0 (ripple free converter).

TUF = 1 ; which means that PO( dc ) = VS I S

HF = THD = 0 ; which means that I S = I S1

PF = DPF = 1 ; which means that f = 0

3.6. Dual Converters

Non Circulating Current Mode of Operation
In this mode of operation only one converter is switched on at a time while the second converter
is switched off. When the converter 1 is switched on and the gate trigger signals are released to
the gates of thyristors in converter 1, we get an average output voltage across the load, which can
be varied by adjusting the trigger angle a1 of the converter 1. If a1 is less than 900, the
converter 1 operates as a controlled rectifier and converts the input ac power into dc output
power to feed the load. Vdc and I dc are both positive and the operation occurs in the first
quadrant. The average output power Pdc = Vdc I dc is positive. The power flows from the input ac
supply to the load. When a1 is increased above 900 converter 1 operates as a line commutated
inverter and Vdc becomes negative while I dc is positive and the output power Pdc becomes
negative. The power is fed back from the load circuit to the input ac source through the converter
1. The load current falls to zero when the load energy is utilized completely.
The second converter 2 is switched on after a small delay of about 10 to 20 mill seconds to allow
all the thyristors of converter 1 to turn off completely. The gate signals are released to the
thyristor gates of converter 2 and the trigger angle a 2 is adjusted such that 0 a 2 900 so that
converter 2 operates as a controlled rectifier. The dc output voltage Vdc and I dc are both negative
and the load current flows in the reverse direction. The magnitude of Vdc and I dc are controlled
by the trigger angle a 2 . The operation occurs in the third quadrant where Vdc and I dc are both
negative and output power Pdc is positive and the converter 2 operates as a controlled rectifier
and converts the ac supply power into dc output power which is fed to the load.

When we want to reverse the load current flow so that I dc is positive we have to operate
converter 2 in the inverter mode by increasing the trigger angle a 2 above 900 . When a 2 is made
greater than 900 , the converter 2 operates as a line commutated inverter and the load power (load
energy) is fed back to ac mains. The current falls to zero when all the load energy is utilized and
the converter 1 can be switched on after a short delay of 10 to 20 milli seconds to ensure that the
converter 2 thyristors are completely turned off.
The advantage of non circulating current mode of operation is that there is no circulating current
flowing between the two converters as only one converter operates and conducts at a time while
the other converter is switched off. Hence there is no need of the series current limiting inductors
between the outputs of the two converters. The current rating of thyristors is low in this mode.
But the disadvantage is that the load current tends to become discontinuous and the transfer
characteristic becomes non linear. The control circuit becomes complex and the output response
is sluggish as the load current reversal takes some time due to the time delay between the
switching off of one converter and the switching on of the other converter. Hence the output
dynamic response is poor. Whenever a fast and frequent reversal of the load current is required,
the dual converter is operated in the circulating current mode.
Circulating Current Mode of Operation
In this mode of operation both the converters 1 and 2 are switched on and operated
simultaneously and both the converters are in a state of conduction. If converter 1 is operated as
a controlled rectifier by adjusting the trigger angle a1 between 0 to 900 the second converter 2 is
operated as a line commutated inverter by increasing its trigger angle a 2 above 900. The trigger
angles a1 and a 2 are adjusted such that they produce the same average dc output voltage across
the load terminals

SINGLE PHASE DUAL CONVERTER

We have seen in the case of a single phase full converter with inductive loads the converter can
operate in two different quadrants in the Vdc versus I dc operating diagram. If two single phase
full converters are connected in parallel and in opposite direction (connected in back to back)
across a common load four quadrant operation is possible. Such a converter is called as a dual
converter which is shown in the figure.
The dual converter system will provide four quadrant operation and is normally used in high
power industrial variable speed drives. The converter number 1 provides a positive dc output
voltage and a positive dc load current, when operated in the rectification mode.

The converter number 2 provides a negative dc output voltage and a negative dc load current
when operated in the rectification mode. We can thus have bi-directional load current and bidirectional dc output voltage. The magnitude of output dc load voltage and the dc load current
can be controlled by varying the trigger angles a1 & a 2 of the converters 1 and 2 respectively.

Fig.: Four quadrant operation of a dual converter

There are two modes of operations possible for a dual converter system.

Non circulating current mode of operation (circulating current free mode of

operation).
Circulating current mode of operation.

The average dc output voltage of converter 1 is

Vdc1 =

2Vm
cos a1
p

The average dc output voltage of converter 2 is

Vdc 2 =

2Vm
cos a 2
p

In the dual converter operation one converter is operated as a controlled rectifier with a1 < 90 0
and the second converter is operated as a line commutated inverter in the inversion mode with
a 2 > 900 .

Vdc1 = -Vdc 2

2Vm
-2Vm
2V
cos a1 =
cos a 2 = m ( - cos a 2 )
p
p
p

Therefore

cos a1 = - cos a 2 or cos a 2 = - cos a1 = cos (p - a1 )

Therefore

a 2 = (p - a 1 )

Which gives

a 2 = (p - a 1 )

or

(a1 + a 2 ) = p

radians

When the trigger angle a1 of converter 1 is set to some value the trigger angle a 2 of the second

converter is adjusted such that a 2 = (1800 - a1 ) . Hence for circulating current mode of operation
where both converters are conducting at the same time (a1 + a 2 ) = 1800 so that they produce the
same dc output voltage across the load.
When a1 < 90 0 (say a1 = 300 ) the converter 1 operates as a controlled rectifier and converts the
ac supply into dc output power and the average load current I dc is positive. At the same time the
converter 2 is switched on and operated as a line commutated inverter, by adjusting the trigger

angle a 2 such that a 2 = (1800 - a1 ) , which is equal to 1500 , when a1 = 300 . The converter 2
will operate in the inversion mode and feeds the load energy back to the ac supply. When we
want to reverse the load current flow we have to switch the roles of the two converters.
When converter 2 is operated as a controlled rectifier by adjusting the trigger angle a 2 such that
a 2 < 900 , the first converter1 is operated as a line commutated inverter, by adjusting the trigger

angle a1 such that a1 > 900 . The trigger angle a1 is adjusted such that a1 = (1800 - a 2 ) for a set
value of a 2 .
In the circulating current mode a current builds up between the two converters even when the
load current falls to zero. In order to limit the circulating current flowing between the two
converters, we have to include current limiting reactors in series between the output terminals of
the two converters.
The advantage of the circulating current mode of operation is that we can have faster reversal of
load current as the two converters are in a state of conduction simultaneously. This greatly
improves the dynamic response of the output giving a faster dynamic response. The output
voltage and the load current can be linearly varied by adjusting the trigger angles a1 & a 2 to
obtain a smooth and linear output control. The control circuit becomes relatively simple. The
transfer characteristic between the output voltage and the trigger angle is linear and hence the
output response is very fast. The load current is free to flow in either direction at any time. The
reversal of the load current can be done in a faster and smoother way.
The disadvantage of the circulating current mode of operation is that a current flows
continuously in the dual converter circuit even at times when the load current is zero. Hence we
should connect current limiting inductors (reactors) in order to limit the peak circulating current
within specified value. The circulating current flowing through the series inductors gives rise to
increased power losses, due to dc voltage drop across the series inductors which decreases the
efficiency. Also the power factor of operation is low. The current limiting series inductors are
heavier and bulkier which increases the cost and weight of the dual converter system.
The current flowing through the converter thyristors is much greater than the dc load current.
Hence the thyristors should be rated for a peak thyristor current of IT ( max ) = I dc( max ) + ir ( max ) , where

I dc( max ) is the maximum dc load current and ir ( max ) is the maximum value of the circulating
current.
Expression of Circulating Current :
As the instantaneous output voltages of the two converters are out of phase, there will be an
instantaneous voltage difference and this will result in circulating current between the two
converters. In order to limit the circulating current, current limiting reactors are connected in
series between the outputs of the two converters. This circulating current will not flow through
the load and is normally limited by the current reactor Lr .
If vO1 and vO2 are the instantaneous output voltages of the converters 1 and 2, respectively
the circulating current can be determined by integrating the instantaneous voltage difference
(which is the voltage drop across the circulating current reactor Lr), starting from wt = (2p - a1).

As the two average output voltages during the interval wt = (p+a1) to (2p - a1) are equal and
opposite their contribution to the instantaneous circulating current ir is zero.

1
ir =
w Lr

wt

vr .d (w t ) ;
( 2p -a1 )

vr = ( vO1 - vO 2 )

As the output voltage vO 2 is negative

vr = ( vO1 + vO 2 )

Therefore

1
ir =
w Lr

wt

( vO1 + vO 2 ) .d (w t ) ;
( 2p -a1 )

vO1 = -Vm sin w t for ( 2p - a1 ) to w t

ir =

Vm
w Lr

V
ir = m
w Lr

ir =

wt
wt

- sin w t.d (w t ) - sin w t.d (w t )

( 2p -a1 )

( 2p -a1 )

( cos w t )

wt

( 2p -a1 )

+ ( cos w t )

( 2p -a1 )

wt

Vm
( cos w t ) - cos ( 2p - a1 ) + ( cos w t ) - cos ( 2p - a1 )
w Lr

ir =

Vm
2 cos w t - 2 cos ( 2p - a1 )
w Lr

ir =

2Vm
( cos w t - cos a1 )
w Lr

The instantaneous value of the circulating current depends on the delay angle.

For trigger angle (delay angle) a1 = 0, its magnitude becomes minimum when
w t = np , n = 0, 2, 4,.... and magnitude becomes maximum when w t = np , n = 1,3,5,....

If the peak load current is I p , one of the converters that controls the power flow may
carry a peak current of

Where

Ip +

4Vm
,
w Lr

I p = I L( max ) =

Vm
4V
, & ir ( max ) = m
RL
w Lr

Three Phase Dual Converter :

In many variable speed drives, the four quadrant operation is generally required and three phase
dual converters are extensively used in applications up to the 2000 kW level. Figure shows three
phase dual converters where two three phase full converters are connected back to back across a
common load. We have seen that due to the instantaneous voltage differences between the output
voltages of converters, a circulating current flows through the converters. The circulating current
is normally limited by circulating reactor, Lr . The two converters are controlled in such a way
that if a1 is the delay angle of converter 1, the delay angle of converter 2 is a 2 = (p - a1 ) .
The operation of a three phase dual converter is similar that of a single phase dual converter
system. The main difference being that a three phase dual converter gives much higher dc output
voltage and higher dc output power than a single phase dual converter system. But the drawback

is that the three phase dual converter is more expensive and the design of control circuit is more
complex.

The figure below shows the waveforms for the input supply voltages, output voltages of
converter1 and conveter2 , and the voltage across current limiting reactor (inductor) Lr . The
operation of each converter is identical to that of a three phase full converter.
p

During the interval + a1 to + a1 , the line to line voltage vab appears across the output
6

of converter 1 and vbc appears across the output of converter 2

We define three line neutral voltages (3 phase voltages) as follows

vRN = van = Vm sin w t

; Vm = Max. Phase Voltage

2p

vYN = vbn = Vm sin w t 3

0
= Vm sin (w t - 120 )

2p

vBN = vcn = Vm sin w t +

3

0
0
= Vm sin (w t + 120 ) = Vm sin (w t - 240 )

The corresponding line-to-line supply voltages are

vRY = vab = ( van - vbn ) = 3Vm sin w t +

6

vYB = vbc = ( vbn - vcn ) = 3Vm sin w t -

2

vBR = vca = ( vcn - van ) = 3Vm sin w t +

2

Expression for Circulating Current :

If vO1 and vO 2 are the output voltages of converters 1 and 2 respectively, the instantaneous
p

voltage across the current limiting inductor during the interval + a1 w t + a1 is

6

vr = ( vO1 + vO 2 ) = ( vab - vbc )

p
p

vr = 3Vm sin w t + - sin w t -

6
2

vr = 3Vm cos w t -
6

The circulating current can be calculated by using the equation

ir ( t ) =

1
w Lr

1
ir ( t ) =
w Lr

ir ( t ) =

3Vm
w Lr

ir ( max ) =

wt

vr .d (w t )

wt

3Vm cos w t - .d (w t )
6

p
+a1
6

p
+a1
6

sin w t - 6 - sin a1

3Vm
= maximum value of the circulating current
w Lr

3.7 Effect of Source Impedance

Effect of Source Inductance: The source inductance causes the outgoing and incoming SCRs
conduct together.
The commutation
overlap is more
predominant
in
full
converters
than
in
semiconverters. In
the single-phase
full
converter
shown in Fig. , Ls
is
the
source
inductance.
For
analytical purpose
the
equivalent
circuit is also shown in fig.

When T1 and T2 are triggered at a firing angle , the commutation of already conducting SCRs
T3 and T4 begins. Because of presence of the source inductance Ls, the current through outgoing
devices T3 and T4 decreases gradually to zero from its initial value of Io; whereas in incoming
thyristors T1 and T2; the current builds up gradually from zero to full value of load current Io.
During the commutation of T1,T2 and T3, T4; i.e. during the overlap angle , KVL for loop
abcda gives:
Or
If
therefore ..
As load current is assumed constant , i1 + i2 = I0
0r

Now..
Adding above two equation

Load current io through T1,T2 builds up from zero to Io during the overlap pangle , i.e. at
i1=0 and at

i1= Io

Therefore from above equation:

=
Or

Io =

The out voltage is zero from

to

. Thus the average output voltage is given by:

Vo=
=
And also
Vo=

So the effect of source inductance is to reduce the output voltage of the converter. If with
inductance source is also having some resistance then this resistance will also cause a voltage
drop of 2I0*r in output voltage of a single phase full converter.

UNIT IV AC VOLTAGE CONTROLLER

AC voltage controllers are employed to vary the RMS value of the alternating voltage applied to
a load by introducing Thyristors between the load and a constant voltage ac source. The RMS
value of alternating voltage applied to a load circuit is controlled by controlling the triggering
angle of the Thyristors in the ac voltage controller circuits.
In brief, an ac voltage controller is a type of thyristor power converter which is used to
convert a fixed voltage, fixed frequency ac input supply to obtain a variable voltage ac output.
The RMS value of the ac output voltage and the ac power flow to the load is controlled by
varying (adjusting) the trigger angle a

V0(RMS)
AC
Input
Voltage
fs

Vs
fs

AC
Voltage
Controller

Variable AC
RMS O/P Voltage
fS

There are two different types of thyristor control used in practice to control the ac power flow

On-Off control
Phase control

In On-Off control technique Thyristors are used as switches to connect the load circuit to the ac
supply for a few cycles and then to disconnect it for few input cycles. The Thyristors thus act as
a high speed switch.

4.1 Principle of Phase Control & On-Off Control

Phase Control
In phase control the Thyristors are used as switches to connect the load circuit to the input ac
supply, for a part of every input cycle. That is the ac supply voltage is chopped using Thyristors
during a part of each input cycle.

The thyristor switch is turned on for some duration in every half cycle so that the supply voltage
appears across load and then turned off during the remaining part of input half cycle to
disconnect the ac supply from the load.

By controlling triggering (or firing or delay) angle a, the output RMS voltage across the load
can be controlled.

The trigger delay angle a is defined as the angle at which the thyristor turns on and the load
current begins to flow.

Thyristor ac voltage controllers use ac line commutation or natural commutation, thay are line
commutated as the input supply is ac. When the input ac voltage reverses and becomes negative
during the negative half cycle the current flowing through the conducting thyristor decreases and
falls to zero. Thus the ON thyristor naturally turns off, when the device current falls to zero.
Phase control Thyristors which are relatively inexpensive, converter grade Thyristors which are
slower than fast switching inverter grade Thyristors are normally used.
For applications upto 400Hz, if Triacs are available to meet the voltage and current ratings of a
particular application, Triacs are more commonly used.

Due to ac line commutation or natural commutation, there is no need of extra commutation

circuitry or components and the circuits for ac voltage controllers are very simple.

TYPE OF AC VOLTAGE CONTROLLERS

The ac voltage controllers are classified into two types based on the type of input ac supply
applied to the circuit.
Single Phase AC Controllers.
Three Phase AC Controllers.
Single phase ac controllers operate with single phase ac supply voltage of 230V RMS at 50Hz in
our country. Three phase ac controllers operate with 3 phase ac supply of 400V RMS at 50Hz
supply frequency.

Each type of controller may be sub divided into

Uni-directional or half wave ac voltage controller.
Bi-directional or full wave ac voltage controller.
In brief different types of ac voltage controllers are

Single phase half wave ac voltage controller or uni-directional controller.

Single phase full wave ac voltage controller or bi-directional controller.
Three phase half wave ac voltage controller or uni-directional controller.
Three phase full wave ac voltage controller or bi-directional controller.

On-Off Control
The basic principle of on-off control technique is explained with reference to a single
phase full wave ac voltage controller circuit shown below. The thyristor switches T1 and T2 are
turned on by applying appropriate gate trigger pulses to connect the input ac supply to the load
for n number of input cycles during the time interval tON . The thyristor switches T1 and T2 are
turned off by blocking the gate trigger pulses for m number of input cycles during the time
interval tOFF . The ac controller ON time tON usually consists of an integral number of input
cycles.

R = RL = Load Resistance
Fig.: Single phase full wave AC voltage controller circuit

Vs

wt

Vo
io
wt

ig1

Gate pulse of T1
wt

ig2

Gate pulse of T2
wt

Fig.: Waveforms

Referring to the waveforms of ON-OFF control technique in the above diagram,

n = Two input cycles. Thyristors are turned ON during tON for two input cycles.
m = One input cycle. Thyristors are turned OFF during tOFF for one input cycle
Thyristors are turned ON precisely at the zero voltage crossings of the input supply. The thyristor
T1 is turned on at the beginning of each positive half cycle by applying the gate trigger pulses to
T1 as shown, during the ON time tON . The load current flows in the positive direction, which is
the downward direction as shown in the circuit diagram when T1 conducts. The thyristor T2 is
turned on at the beginning of each negative half cycle, by applying gating signal to the gate of
T2 , during tON . The load current flows in the reverse direction, which is the upward direction

when T2 conducts. Thus we obtain a bi-directional load current flow (alternating load current
flow) in a ac voltage controller circuit, by triggering the thyristors alternately.
This type of control is used in applications which have high mechanical inertia and high
thermal time constant (Industrial heating and speed control of ac motors). Due to zero voltage
and zero current switching of Thyristors, the harmonics generated by switching actions are
reduced.
For a sine wave input supply voltage,

vs = Vm sin w t = 2VS sin w t

VS = RMS value of input ac supply =

Vm
= RMS phase supply voltage.
2

If the input ac supply is connected to load for n number of input cycles and
disconnected for m number of input cycles, then

tON = n T ,

Where T =

tOFF = m T

1
= input cycle time (time period) and
f

f = input supply frequency.

tON = controller on time = n T .

tOFF = controller off time = m T .
TO = Output time period = ( tON + tOFF ) = ( nT + mT ) .

We can show that,

Output RMS voltage VO( RMS ) = Vi ( RMS )

tON
t
= VS ON
TO
TO

Where Vi( RMS ) is the RMS input supply voltage = VS .

RMS VALUE OF OUTPUT VOLTAGE, FOR ON-OFF CONTROL METHOD.

w tON

Output RMS voltage VO( RMS )

1
=
wTO

w tON

VO( RMS )

Vm 2
=
wTO

Substituting for

VO( RMS )

Sin 2q =

Vm 2
=
wTO

VO( RMS ) =

Vm 2 Sin 2w t.d (w t )

wt =0

Sin 2w t.d (w t )

1 - Cos 2q
2

w tON

Vm 2
2wTO

1 - Cos 2w t

d (w t )
2

w tON
wtON

d
w
t
Cos 2w t.d (w t )
(
)

VO( RMS ) =

VO( RMS ) =

Now

Vm 2
( w t )
2wTO

w tON
0

Sin 2w t
2

w tON
0

sin 2w tON - sin 0

Vm 2
(w tON - 0 )

2wTO
2

tON = An integral number of input cycles; Hence

tON = T , 2T ,3T , 4T ,5T ,..... & w tON = 2p , 4p , 6p ,8p ,10p ,......

Where T is the input supply time period (T = input cycle time period). Thus we note that
sin 2w tON = 0
VO( RMS ) = Vi( RMS )

tON
t
= VS ON
TO
TO

Where Vi( RMS ) =

Vm
= VS = RMS value of input supply voltage;
2

tON
tON
nT
n
=
=
=
= k = duty cycle (d).
TO tON + tOFF nT + mT ( n + m )

VO( RMS ) = VS

n
=V k
(m + n) S

PERFORMANCE PARAMETERS OF AC VOLTAGE CONTROLLERS

RMS Output (Load) Voltage

VO( RMS )

2p

n
=
Vm 2 sin 2 w t.d (w t )

2p ( n + m ) 0

VO( RMS ) = Vi ( RMS ) k = VS k

Where VS = Vi( RMS ) = RMS value of input supply voltage.

Duty Cycle
t
tON
nT
=
k = ON =
TO ( tON + tOFF ) ( m + n ) T

Where, k =

n
= duty cycle (d).
(m + n)

RMS Load Current

I O( RMS ) =

VO( RMS )
Z

VO( RMS )

Output AC (Load) Power

PO = I O2 ( RMS ) RL

RL

for a resistive load Z = RL .

Input Power Factor

PF =

PF =

PO
P
output load power
=
= O
VA input supply volt amperes VS I S

I O2 ( RMS ) RL
Vi( RMS ) I in( RMS )

I S = I in( RMS ) = RMS input supply current.

The input supply current is same as the load current I in = I O = I L

Hence, RMS supply current = RMS load current; I in( RMS ) = I O ( RMS ) .

PF =

I O2 ( RMS ) RL
Vi ( RMS ) I in( RMS )

PF = k =

VO( RMS )
Vi ( RMS )

Vi ( RMS ) k
Vi ( RMS )

= k

n
m+n

The Average Current of Thyristor IT ( Avg )

Waveform of Thyristor Current

iT

Im

2p

3p

wt

I T ( Avg ) =

n
I m sin w t.d (w t )
2p ( m + n ) 0

I T ( Avg )

nI m
=
sin w t.d (w t )
2p ( m + n ) 0

IT ( Avg )

nI m
=
- cos w t
2p ( m + n )

Solving we get :
IT ( Avg ) =

Imn
k .I
= m
p ( m + n)
p

k = duty cycle =

IT ( Avg ) =

Where I m =

tON
n
=
( tON + tOFF ) ( n + m )

Imn
k .I
= m,
p ( m + n)
p

Vm
= maximum or peak thyristor current.
RL

RMS Current of Thyristor IT ( RMS )

IT ( RMS )

n
=
I m2 sin 2 w t.d (w t )

2p ( n + m ) 0

IT ( RMS )

nI m2
2
sin
t
.
d
t
=
w
w
(
)

2p ( n + m ) 0

IT ( RMS )

nI m2
(1 - cos 2w t ) d w t
=
( )

2
p
n
+
m
2
(
)
0

Solving the equation we get

IT ( RMS ) =

Im
2

I
n
= m k
(m + n) 2

I T ( RMS ) =

Im
2

PRINCIPLE OF AC PHASE CONTROL

The basic principle of ac phase control technique is explained with reference to a single phase
half wave unidirectional controller or ac voltage controller circuit shown in the below figure.

The half wave ac controller uses one thyristor and one diode connected in parallel across each
other in opposite direction that is anode of thyristor T1 is connected to the cathode of diode D1
and the cathode of T1 is connected to the anode of D1 . The output voltage across the load

resistor R and hence the ac power flow to the load is controlled by varying the trigger angle
a.

The trigger angle or the delay angle a refers to the value of w t or the instant at which the
thyristor T1 is triggered to turn it ON, by applying a suitable gate trigger pulse between the gate
and cathode lead.

The thyristor T1 is forward biased during the positive half cycle of input ac supply. It can be
triggered and made to conduct by applying a suitable gate trigger pulse only during the positive
half cycle of input supply. When T1 is triggered it conducts and the load current flows through
the thyristor T1 , the load and through the transformer secondary winding.
By assuming T1 as an ideal thyristor switch it can be considered as a closed switch when it is ON
during the period w t = a to p radians. The output voltage across the load follows the input
supply voltage when the thyristor T1 is turned-on and when it conducts from w t = a to

p radians. When the input supply voltage decreases to zero at w t = p , for a resistive load the
load current also falls to zero at w t = p and hence the thyristor T1 turns off at w t = p . Between
the time period w t = p to 2p , when the supply voltage reverses and becomes negative the diode
D1 becomes forward biased and hence turns ON and conducts. The load current flows in the
opposite direction during w t = p to 2p radians when D1 is ON and the output voltage follows
the negative half cycle of input supply.

Fig.: Halfwave AC phase controller (Unidirectional Controller)

Input AC Supply Voltage across the Transformer Secondary Winding.

vs = Vm sin w t
VS = Vin( RMS ) =

Vm
= RMS value of secondary supply voltage.
2

Output Load Voltage

vo = vL = 0 ; for w t = 0 to a

vo = vL = Vm sin w t ; for w t = a to 2p .

Output Load Current

io = iL =

vo Vm sin w t
; for w t = a to 2p .
=
RL
RL

io = iL = 0 ; for w t = 0 to a .

RMS OUTPUT VOLTAGE VO( RMS )

VO( RMS ) =

2p

1
2
2
Vm sin w t.d (w t )
2p a

VO( RMS ) =

Vm 2 2p 1 - cos 2w t

.d (w t )
2p a
2

Solving the equation

VO( RMS ) =

Vm
2

1
sin 2a
( 2p - a ) +

2p
2

or

VO( RMS ) = VS

Where, Vi( RMS ) = VS =

1
sin 2a
( 2p - a ) +

2p
2

Vm
= RMS value of input supply voltage (across the transformer
2

secondary winding).

Output RMS voltage across the load is controlled by changing 'a ' as indicated by the expression
for VO( RMS )

4.2 Single Phase AC Voltage Controller

Single phase full wave ac voltage controller circuit using two SCRs or a single triac is generally
used in most of the ac control applications. The ac power flow to the load can be controlled in
both the half cycles by varying the trigger angle 'a ' .
The RMS value of load voltage can be varied by varying the trigger angle 'a ' . The input supply
current is alternating in the case of a full wave ac voltage controller and due to the symmetrical

nature of the input supply current waveform there is no dc component of input supply current
i.e., the average value of the input supply current is zero.
A single phase full wave ac voltage controller with a resistive load is shown in the figure below.
It is possible to control the ac power flow to the load in both the half cycles by adjusting the
trigger angle 'a ' . Hence the full wave ac voltage controller is also referred to as to a bidirectional controller.

Fig.: Single phase full wave ac voltage controller (Bi-directional Controller) using SCRs

The thyristor T1 is forward biased during the positive half cycle of the input supply voltage. The
thyristor T1 is triggered at a delay angle of 'a '

(0 a p

radians ) . Considering the ON

thyristor T1 as an ideal closed switch the input supply voltage appears across the load resistor RL
and the output voltage vO = vS during w t = a to p radians. The load current flows through the
ON thyristor T1 and through the load resistor RL in the downward direction during the
conduction time of T1 from w t = a to p radians.
At w t = p , when the input voltage falls to zero the thyristor current (which is flowing through
the load resistor RL ) falls to zero and hence T1 naturally turns off . No current flows in the circuit
during w t = p to (p + a ) .
The thyristor T2 is forward biased during the negative cycle of input supply and when thyristor
T2 is triggered at a delay angle (p + a ) , the output voltage follows the negative halfcycle of

input from w t = (p + a ) to 2p . When T2 is ON, the load current flows in the reverse direction
(upward direction) through T2 during w t = (p + a ) to 2p radians. The time interval (spacing)
between the gate trigger pulses of T1 and T2 is kept at p radians or 1800. At w t = 2p the input
supply voltage falls to zero and hence the load current also falls to zero and thyristor T2 turn off
naturally.

Instead of using two SCRs in parallel, a Triac can be used for full wave ac voltage control.

Fig.: Single phase full wave ac voltage controller (Bi-directional Controller) using TRIAC

Fig: Waveforms of single phase full wave ac voltage controller

RMS OUTPUT VOLTAGE

Input supply voltage

vS = Vm sin w t = 2VS sin w t ;

Output voltage across the load resistor RL ;

vO = vL = Vm sin w t ;
for w t = a to p and w t = (p + a ) to 2p

Output load current

iO =

vO Vm sin w t
=
= I m sin w t ;
RL
RL

for w t = a to p and w t = (p + a ) to 2p

The RMS value of output voltage (load voltage) can be found using the expression

2
O ( RMS )

=V

L ( RMS )

1
=
2p

2p

v d (w t ) ;
2

For a full wave ac voltage controller, we can see that the two half cycles of output voltage
waveforms are symmetrical and the output pulse time period (or output pulse repetition time) is
p radians. Hence we can also calculate the RMS output voltage by using the expression given
below.

L ( RMS )

1
= Vm 2 sin 2 w t.dw t
p 0

V 2 L( RMS ) =

1
2p

2p

2
L

.d (w t ) ;

vL = vO = Vm sin w t ; For w t = a to p and w t = (p + a ) to 2p

Hence,
2
L ( RMS )

p
2p

1
2
2
=
(Vm sin w t ) d (w t ) + (Vm sin w t ) d (w t )
2p a
p +a

1
=
2p

2p
2p 2

2
2
Vm sin w t.d (w t ) + Vm sin w t.d (w t )
p +a
a

Solving and taking the square root we get

sin 2a
2 ( p - a ) + 2

VL( RMS ) =

Vm
2

VL( RMS ) =

Vm 1
sin 2a
(p - a ) +

2
2 p

1
2p

VL( RMS ) = Vi( RMS )

VL( RMS ) = VS

1
sin 2a
(p - a ) +

p
2

1
sin 2a
(p - a ) +

p
2

Maximum RMS voltage will be applied to the load when a = 0 , in that case the full sine
wave appears across the load. RMS load voltage will be the same as the RMS supply voltage
V
= m . When a is increased the RMS load voltage decreases.
2

VL( RMS )

=
a =0

Vm
= Vi( RMS ) = VS
2

Other possible configurations of single phase full wave ac voltage controller are shown below.
1. Using a single thyristor

D1

D3

+
T1
D4

AC
Supply

D2
RL

2. With common cathode

SINGLE PHASE FULL WAVE AC VOLTAGE CONTROLLER or BIDIRECTIONAL

CONTROLLER WITH RL LOAD
In practice most of the loads are of RL type. For example if we consider a single phase full wave
ac voltage controller controlling the speed of a single phase induction motor, the load which is
the induction motor winding is an RL type of load, where R represents the motor winding
resistance and L represents the motor winding inductance.
A single phase full wave ac voltage controller circuit with an RL load using two
thyristors T1 and T2 connected in anti-parallel is shown in the figure below. In place of two
thyristors a single Triac can be used to implement a full wave ac controller, if a suitable Traic is
available for the desired RMS load current and the RMS output voltage ratings.

Fig: Single phase full wave ac voltage controller with RL load

The thyristor T1 is forward biased during the positive half cycle of input supply. Let us
assume that T1 is triggered at w t = a , by applying a suitable gate trigger pulse to T1 during the
positive half cycle of input supply. The output voltage across the load follows the input supply
voltage when T1 is ON. The load current iO flows through the thyristor T1 and through the load in
the downward direction. This load current pulse flowing through T1 can be considered as the
positive current pulse. Due to the inductance in the load, the load current iO flowing through T1
would not fall to zero at w t = p , when the input supply voltage starts to become negative.
The thyristor T1 will continue to conduct the load current until all the inductive energy
stored in the load inductor L is completely utilized and the load current through T1 falls to zero at
w t = b , where b is referred to as the Extinction angle, (the value of w t ) at which the load

current falls to zero. The extinction angle b is measured from the point of the beginning of the
positive half cycle of input supply to the point where the load current falls to zero.
The thyristor T1 conducts from w t = a to b . The conduction angle of T1 is d = ( b - a ) ,
which depends on the delay angle a and the load impedance angle f . The waveforms of the

input supply voltage, the gate trigger pulses of T1 and T2 , the thyristor current, the load current
and the load voltage waveforms appear as shown in the figure below.

Fig.: Input supply voltage & Thyristor current waveforms

b is the extinction angle which depends upon the load inductance value.

Fig.: Gating Signals

Waveforms of single phase full wave ac voltage controller with RL load for a > f .
Discontinuous load current operation occurs for a > f and b < (p + a ) ;
i.e., ( b - a ) < p , conduction angle < p .

Fig.: Waveforms of Input supply voltage, Load Current, Load Voltage and Thyristor
Voltage across T1

`For very large load inductance L the SCR may fail to commutate, after it is triggered
and the load voltage will be a full sine wave (similar to the applied input supply voltage
and the output control will be lost) as long as the gating signals are applied to the
thyristors T1 and T2 . The load current waveform will appear as a full continuous sine
wave and the load current waveform lags behind the output sine wave by the load power
factor angle f.
OUTPUT (INDUCTIVE LOAD) CURRENT, DURING w t = a to b WHEN THYRISTOR
T1 CONDUCTS

Considering sinusoidal input supply voltage we can write the expression for the supply voltage
as

vS = Vm sin w t = instantaneous value of the input supply voltage.

Let us assume that the thyristor T1 is triggered by applying the gating signal to T1 at

w t = a . The load current which flows through the thyristor T1 during w t = a to b can be found
from the equation

di
L O
dt

+ RiO = Vm sin w t ;

The solution of the above differential equation gives the general expression for the output
load current which is of the form

iO =

-t
Vm
sin (w t - f ) + A1e t ;
Z

Where Vm = 2VS = maximum or peak value of input supply voltage.

Z = R 2 + (w L ) = Load impedance.
2

wL
f = tan -1
= Load impedance angle (power factor angle of load).
R

L
= Load circuit time constant.
R

t=

Therefore the general expression for the output load current is given by the equation
iO =

-R
t
Vm
sin (w t - f ) + A1e L ;
Z

The value of the constant A1 can be determined from the initial condition. i.e. initial value
of load current iO = 0 , at w t = a . Hence from the equation for iO equating iO to zero and
substituting w t = a , we get

-R
t
Vm
iO = 0 =
sin (a - f ) + A1e L
Z

-R

Therefore

A1e L =

A1 =
e

-Vm
sin (a - f )
Z

1 -Vm

Z sin (a - f )

-R
t
L

+R
t -V

A1 = e L m sin (a - f )
Z

A1 = e

R (w t )
wL

-Vm

Z sin (a - f )

By substituting w t = a , we get the value of constant A1 as

( )
-V

A1 = e w L m sin (a - f )
Z

Ra

Substituting the value of constant A1 from the above equation into the expression for iO , we
obtain
( )
-R
t
Vm
-V

sin (w t - f ) + e L e w L m sin (a - f ) ;
Z
Z

Ra

iO =

V
iO = m sin (w t - f ) + e
Z

iO =

- R (w t )
wL

R(a )
wL

-Vm

Z sin (a - f )

-R
(w t -a ) -Vm
Vm

sin (w t - f ) + e w L
sin (a - f )

Z
Z

Therefore we obtain the final expression for the inductive load current of a single phase full
wave ac voltage controller with RL load as

iO =

Vm
Z

-R
(w t -a )

wL
sin
w
f
sin
a
f
t
e
(
)
(
)

Where a w t b .

The above expression also represents the thyristor current iT 1 , during the conduction time
interval of thyristor T1 from w t = a to b .

To Calculate Extinction Angle b

The extinction angle b , which is the value of w t at which the load current iO falls
to zero and T1 is turned off can be estimated by using the condition that iO = 0 , at w t = b
By using the above expression for the output load current, we can write

iO = 0 =

As

Vm
Z

-R
( b -a )

wL
e
sin
b
f
sin
a
f
(
)
(
)

Vm
0 we can write
Z
-R
( b -a )

wL
sin
b
f
sin
a
f
e
)
(
)
(
=0

Therefore we obtain the expression

-R

sin ( b - f ) = sin (a - f ) e w L

( b -a )

The extinction angle b can be determined from this transcendental equation by using the
iterative method of solution (trial and error method). After b is calculated, we can determine the
thyristor conduction angle d = ( b - a ) .
For d < p radians, i.e., for

( b -a ) < p

radians, for (p + a ) > b the load current

waveform appears as a discontinuous current waveform as shown in the figure. The output load

current remains at zero during w t = b to (p + a ) . This is referred to as discontinuous load

current operation which occurs for b < (p + a ) .
When the trigger angle a is decreased and made equal to the load impedance angle f
i.e., when a = f we obtain from the expression for sin ( b - f ) ,

sin ( b - f ) = 0 ; Therefore

( b -f ) = p

radians.

Extinction angle

b = (p + f ) = (p + a ) ; for the case when a = f

Conduction angle

d = ( b - a ) = p radians = 1800 ; for the case when a = f

Each thyristor conducts for 1800 ( p radians ) . T1 conducts from w t = f to (p + f ) and

provides a positive load current. T2 conducts from (p + f ) to ( 2p + f ) and provides a negative
load current. Hence we obtain a continuous load current and the output voltage waveform
appears as a continuous sine wave identical to the input supply voltage waveform for trigger
angle a f and the control on the output is lost.

RMS OUTPUT VOLTAGE

When a > O , the load current and load voltage waveforms become discontinuous as
shown in the figure above.
1

VO( RMS ) = Vm 2 sin 2 w t.d (w t )

p a

1
2

Output vo = Vm sin w t , for w t = a to b , when T1 is ON.

(1 - cos 2w t ) d

VO( RMS )

VO( RMS )

b
V 2 b

= m d (w t ) - cos 2w t.d (w t )
2p a
a

VO( RMS )

Vm 2
=
(w t )
2p

VO( RMS )

Vm 2
sin 2 b sin 2a
=
+
( b - a )
2
2
2p

VO( RMS )

1
sin 2a sin 2 b
= Vm ( b - a ) +

2
2
2p

VO( RMS )

V 1
sin 2a sin 2 b
= m ( b - a ) +

2
2
2 p

b
a

(w t )

V 2
= m
p

sin 2w t
-

a
b

The RMS output voltage across the load can be varied by changing the trigger angle a .
For a purely resistive load L = 0 , therefore load power factor angle f = 0 .
wL
f = tan -1
=0 ;
R

Extinction angle

b = p radians = 1800

vO

vO=vS

Vm
p

3p

2p

f
f

wt
f

iO
Im
f

wt

Fig.: Output voltage and output current waveforms for a single phase full wave ac voltage
controller with RL load for a f

Thus we observe that for trigger angle a f , the load current tends to flow continuously and we
have continuous load current operation, without any break in the load current waveform and we
obtain output voltage waveform which is a continuous sinusoidal waveform identical to the input
supply voltage waveform. We loose the control on the output voltage for a f as the output
voltage becomes equal to the input supply voltage and thus we obtain
VO( RMS ) =

Vm
= VS ; for a f
2

Hence,
RMS output voltage = RMS input supply voltage for a f

PERFORMANCE PARAMETERS OF A SINGLE PHASE FULL WAVE AC VOLTAGE

CONTROLLER (WITH R- LOAD)

RMS Output Voltage VO( RMS ) =

Vm 1
sin 2a
(p - a ) +

2
2 p

supply voltage.
VO ( RMS )

I O( RMS ) =

I S = I O ( RMS ) = RMS value of input supply current.

Output load power

= RMS value of load current.

RL

PO = I O2 ( RMS ) RL

Input Power Factor

I O2 ( RMS ) RL I O ( RMS ) RL
PO
PF =
=
=
VS I S VS I O ( RMS )
VS

PF =

VO( RMS )
VS

1
sin 2a
(p - a ) +

p
2

Average Thyristor Current,

iT1
Im
p
a

3p

2p
(2p+a)
a

Fig.: Thyristor Current Waveform

wt

Vm
= VS = RMS input
2

I T ( Avg ) =

1
1
iT d (w t ) =

2p a
2p

IT ( Avg ) =

p
Im
I
sin w t.d (w t ) = m - cos w t

2p a
2p

I T ( Avg ) =

Im
I
[ - cos p + cos a ] = m [1 + cos a ]
2p
2p

Maximum Average Thyristor Current, for a = 0 ,

I
I T ( Avg ) = m
p

RMS Thyristor Current

IT ( RMS ) =

IT ( RMS ) =

sin w t.d (w t )

a
p

1 2 2
I m sin w t.d (w t )
2p a

Im
2

1
sin 2a
(p - a ) +

2p
2

Maximum RMS Thyristor Current, for a = 0 ,

I T ( RMS ) =

Im
2

In the case of a single phase full wave ac voltage controller circuit using a Triac with
resistive load, the average thyristor current IT ( Avg ) = 0 . Because the Triac conducts in both the
half cycles and the thyristor current is alternating and we obtain a symmetrical thyristor current
waveform which gives an average value of zero on integration.

4.3 Three Phase AC Voltage Controller

Various Congurations. Several possible circuit congurations for three-phase phase-controlled
ac regulators with staror delta-connected loads are shown in following Fig. The congurations in
first two Figures can be realized by three single-phase ac regulators operating independently of
each other and they are easy to analyze. In Fig.a, the SCRs are to be rated to carry line currents
and withstand phase voltages,
whereas in Fig. b they should be capable of carrying phase currents and withstand the line
voltages, in this configuration , currents are free from triplen harmonics while these are present
in the closed delta.
The circuits in Fig. c and d are three-phase three-wire circuits and are difficult to analyze. In
both these circuits, at least two SCRs one in each phase must be gated simultaneously to get the
controller started by establishing a current path between the supply lines. This necessitates two
triggering pulses spaced at 60 apart per cycle for triggering each SCR. The operation modes are
defined by the number of SCRs conducting in these modes. The triplen harmonics are absent in
both these configurations.
Another configuration is shown in Fig. e when the controllers are delta connected and the load
is connected between the supply and the converter. Here, current can
flow between two lines even if one SCR is conducting, so each SCR requires one ring pulse
per cycle. The voltage and current ratings of SCRs are nearly the same as those of the circuit in
Fig. b. It is also possible to reduce the number of devices to three SCRs in delta as shown in
Fig. f connecting one source terminal directly to one load circuit terminal. Each SCR is
provided with gate pulses in each cycle spaced 120
apart. In both Figs. e and f each end of each phase must be accessible. The number of devices
in Fig f is fewer but their current ratings must be higher.

As in the case of the single-phase phase-controlled voltage regulator, the total regulator cost can
be reduced by replacing six SCRs by three SCRs and three diodes, resulting in three phase halfwave controlled unidirectional ac regulators as shown in Fig. g and h for star- and deltaconnected loads. The main drawback of these circuits is the large harmonic content in the output
voltage, particularly the second harmonic because of the asymmetry. However, the dc
components are absent in the line.
4.4 Single Phase Transformer Tap Changer
Thyristors can be used as static switches for on load tap changing of transformer connections.
These static connection changers have the advantage of very fast switching action. The
changeover can be controlled to cope with the load conditions and is very smooth.
The circuit diagram and the waveforms are shown figure below.

The primary is connected to the supply. The two secondary voltages are v1 and v2 & they are
defined as
v1 = 2V1 Sin wt
v 2 = 2V2 Sin wt

The gating pulses of the thyristor can be controlled to vary the load voltage. The rms output
voltage can be varied within three possible ranges:
0 < Vo > V2

0 < Vo > V1 + V2

and

V1 < Vo > V1 + V2

For variation within first range T1 and T2 are kept off and T3 and T4 operate as a single phase
voltage controller

For variation within second range T3 and T4 are kept off and T1 and T2 operate as a single
phase voltage controller

For variation in third range T3 and T4 are turned on with a firing angle delay of 0 deg, and firing
angle of T1 and T2 is varied between t = and .
CYCLOCONVERTERS
In contrast to the ac voltage controllers operating at constant frequency discussed so far, a
cycloconverter operates as a direct ac/ac frequency changer with an inherent voltage control
feature. The basic principle of this converter to construct an alternating voltage wave of lower
frequency from successive
segments of voltage waves of higher frequency ac supply by a specific switching arrangement
which was conceived and patented in the 1920s. Grid-controlled mercury-arc rectifiers were used
in these converters installed in Germany in the 1930s to obtain 162/3 Hz single-phase supply for
ac series traction motors from a three-phase 50-Hz system while at the same time a
cycloconverter using 18 thyratrons supplying a 400-hp synchronous motor was in operation for
some years as a power station auxiliary drive in the United States. However, the practical and
commercial utilization of these schemes waited until the SCRs became available in the 1960s.
With the development of large power SCRs and microprocessor-based control, the
cycloconverter today is a matured practical converter for application in large-power low-speed
variable-voltage variable-frequency (VVVF) ac drives in cement and steel rolling mills as well
as in variable-speed constant-frequency (VSCF) systems in aircraft and naval ships.
A cycloconverter is a naturally commuted converter with the inherent capability of bidirectional
power flow and there is no real limitation on its size unlike an SCR inverter with commutation
elements. Here, the switching losses are considerably low, the regenerative operation at full
power over complete speed range is inherent, and it delivers a nearly sinusoidal waveform
resulting in minimum torque pulsation
and harmonic heating effects. It is capable of operating even with the blowing out of an
individual SCR fuse (unlike the inverter), and the requirements regarding turn-off time, current
rise time and dv=dt sensitivity of SCRs are low.
4.5 Single-Phase to Single-Phase Cycloconverter:
Following figure a shows the power circuit of a single-phase bridge-type cycloconverter, which
is the same arrangement as that of the dual converter The firing angles of the individual twopulse two-quadrant bridge converters are continuously modulated here so that each ideally
produces the same fundamental ac voltage at its output terminals as marked in the simplified

equivalent circuit in Fig. b. Because of the unidirectional current-carrying property of the

individual converters, it is
inherent that the positive half-cycle of the current is carried by the P-converter and the negative
half-cycle of the current by the N-converter regardless of the phase of the current with respect to
the voltage. This means that for a reactive load, each converter operates in both the rectifying
and inverting region during the period of the associated half-cycle of the low frequency output
current.

Operation with R-Load. Following figure shows the input and output voltage waveforms with
a pure R-load for a 50 to 162/3 Hz cycloconverter. The P- and N-converters operate for all
alternate To/2 periods. The output frequency 1/To can be

varied by varying To and the voltage magnitude by varying the firing angle a of the SCRs. As
shown in the figure, three cycles of the ac input wave are combined to produce one cycle of the
output frequency to reduce the supply frequency to one-third
across the load. If p is the firing angle of the P-converter, the firing angle of the N-converter n
= - p and the average voltage of the Pconverter is equal and opposite to that of the Nconverter. The inspection of the waveform with remaining fixed in each half-cycle generates
a square wave having a large low-order harmonic content. A near approximation to sine wave
can be synthesized by a phase modulation of the firing angles as shown in following Fig. for a 50
to 10-Hz cycloconverter. The
harmonics in the load-voltage waveform are fewer compared to the earlier waveform. The supply
current, however, contains a subharmonic at the output frequency for this case as shown.

Operation with RL Load. The cycloconverter is capable of supplying loads of any power
factor. Following Figure shows the idealized output voltage and current waveforms for a lagging
power factor load where both the converters are operating as
rectifier and inverter at the intervals marked. The load current lags the output voltage and the
load-current direction determines which converter is conducting. Each converter continues to
conduct after its output voltage changes polarity, and during this period the converter acts as an
inverter and the power is returned to the ac source. The inverter operation continues until the
other converter starts to conduct. By
controlling the frequency of oscillation and the depth of modulation of the firing angles of the
converters , it is possible to control the frequency and the amplitude of the output voltage. The
load current with RL load may be continuous or discontinuous depending on the load phase
angle.

4.6 Three-Phase Three-Pulse (Three Phase to Single Phase) Cycloconverter

Figure a shows a schematic diagram of a three-phase half-wave (three-pulse) cycloconverter
feeding a single-phase load, and Fig. b shows the configuration of a three-phase half-wave
(three-pulse) cycloconverter feeding a three-phase load. The basic process of a three-phase
cycloconversion is illustrated in Fig. c at 15 Hz, and lagging power factor load from a 50-Hz
supply. As the firing angle is cycled from
zero at a to 180 at j, half a cycle of output frequency is produced (the gating circuit is to be
suitably designed to introduce this oscillation of the firing angle). For this load it can be seen that
although the mean output voltage reverses at X, the mean output current (assumed sinusoidal)
remains positive until Y. During XY, the SCRs A, B, and C in the P converter are inverting. A
similar period exists at the end of
the negative half-cycle of the output voltage when D, E, and F SCRs in the N-converter are
inverting. Thus the operation of the converter follows in the order of rectification and
inversion in a cyclic manner, with the relative durations being dependent on the load power
factor. For obtaining the positive half-cycle of the voltage, firing angle a is varied from 900 to 00
and then to 900 to 00, and for the negative half-cycle, from 900 to 1800 and back to 900. Variation
of a within the limits of 180 automatically provides for natural line commutation of the SCRs.
It is shown that a complete cycle of low-frequency output voltage is fabricated from the
segments of the three-phase input voltage by using the phase-controlled converters.

Fig. (a) Three-phase half-wave (three-pulse) cycloconverter supplying a single-phase load; (b)
three-pulse cycloconverter supplying a three-phase load; (c) output voltage waveform for one
phase of a three-pulse cycloconverter operating at 15 Hz from a 50-Hz supply and lagging power
factor load.

The P or N-converter SCRs receive firing pulses that are timed such that each converter delivers
the same mean output voltage. This is achieved, as in the case of the single-phase cycloconverter
or the dual converter, by maintaining the firing
angle constraints of the two groups as p = 180 n. However, the instantaneous voltages of two
converters are not identical and a large circulating current may result unless limited by an
intergroup reactor as shown (circulating-current cycloconverter) or completely suppressed by
rmoving the gate pulses from the nonconducting converter.

Three-Phase Six-Pulse and Twelve-Pulse Cycloconverter:

A six-pulse cycloconverter circuit conguration is shown in Fig. Typical load-voltage

waveforms for 6-pulse (with 36 SCRs) and 12-pulse (with 72 SCRs) cycloconverters are shown
in Fig. below. The 12-pulse converter is obtained by connecting two 6-pulse configurations in
series and appropriate transformer connections for the required phase-shift. It may be seen that
the higher pulse numbers will generate waveforms closer to the desired sinusoidal form and thus
permit higher frequency output. The phase loads may be isolated from each other as shown or
interconnected with
suitable secondary winding connections.

Three-phase 6-pulse cycloconverter with isolated loads

Cycloconverter load-voltage waveforms with lagging power factor load: (a) 6-pulse connection;
and (b) 12-pulse connection.

4.7 Output Voltage Equation. A simple expression for the fundamental rms output voltage of
the cycloconverter and the required variation of the ring angle a can be derived with the
assumptions that: (i) the firing angle a in successive half cycles
is varied slowly resulting in a low-frequency output; (ii) the source impedance and the
commutation overlap are neglected; (iii) the SCRs are ideal switches; and (iv) the current is
continuous and ripple-free. The average dc output voltage of a p-pulse dual converter with fixed
is
..

eq.(1)

For the p-pulse dual converter operating as a cycloconverter, the average phase voltage output at
any point of the low frequency should vary according to the equation
..

eq.(2)

where Vo1;max is the desired maximum value of the fundamental output of the cycloconverter.
Comparing Eq. (1) with Eq. (2), the required variation of to obtain a
sinusoidal output is given by
..

eq.(3)

where r is the ratio of Vo1max /Vdomax , the voltage magnitude control ratio.
However, the firing angle p of the P-converter cannot be reduced to 00 as this corresponds to n
= 180- p for the N-converter, which, in practice, cannot be achieved because of allowance for
commutation overlap and finite turn-off time of the SCRs. Thus the firing angle p can be
reduced to a certain finite value min and the maximum output voltage is reduced by a factor cos
min.
The fundamental rms voltage per phase of either converter is

Although the rms value of the low-frequency output voltage of the P-converter and that of the Nconverter are equal, the actual waveforms differ and the output voltage at the midpoint of the
circulating current limiting reactor , which is the same as the load voltage, is obtained as the
mean of the instantaneous output voltages of the two converters.

UNIT V INVERTERS
Inversion is the conversion of dc power to ac power at a desired output voltage or current and
frequency. A static semiconductor inverter circuit performs this electrical energy inverting
transformation. The terms voltage-fed and current-fed are used in connection with the output
from inverter circuits.
A voltage-source inverter (VSI) is one in which the dc input voltage is essentially constant and
independent of the load current drawn. The inverter specifies the load voltage while the drawn
current shape is dictated by the load.
A current-source inverter (CSI) is one in which the source, hence the load current is
predetermined and the load impedance determines the output voltage. The supply current cannot
change quickly. This current is controlled by series dc supply inductance which prevents sudden
changes in current. The load current magnitude is controlled by varying the input dc voltage to
the large inductance, hence inverter
response to load changes is slow. Being a current source, the inverter can survive an output short
circuit thereby offering fault ride-through properties.
Voltage control may be required to maintain a fixed output voltage when the dc input voltage
regulation is poor, or to control power to a load. The inverter and its output can be single-phase,
three-phase or multi-phase. Variable output frequency may be required for ac motor speed
control where, in conjunction with voltage or current control, constant motor flux can be
maintained.
Inverter output waveforms (either voltage or current) are usually rectilinear in nature and as such
contain harmonics which may lead to reduced load efficiency and performance. Load harmonic
reduction can be achieved by either filtering, selected harmonic-reduction chopping or pulsewidth modulation.

5.1 Single-phase Bridge Inverter (VSIs) : are of two types , half-bridge and full-bridge
topologies. Although the power range they cover is the low one, they are widely used in power
supplies, single-phase UPSs.
Types of Inverters
a) Voltage Source Inverter (VSI)

Input voltage to the inverter is constant

The voltage cant reverse but the current can reverse. (i.e. it can supply or sink
current)
Anti parallel diodes are essential components of VSI
Dead time is required
Fast Devices are used

b) Current Source Inverter (CSI)

Input current to the inverter remains constant

Input voltage can reverse but the current cant reverse
Easier to protect the device against any shoot through fault
Circuit is rugged and reliable

Single Phase Half-Bridge Inverter

Transistors Q1 and Q2 are operated as switch.

If transistor Q1 is on , Q2 is off
Q1 and Q2 shouldnt be turned on at the same time
Diodes D1 and D2 which are connected parallel carry negative current for
inductive loads

The rms output voltage is given as,

2
Vo =
To

T0 / 2

V
( s ) 2 dt
2

1/ 2

Vs
2

The instantaneous voltage can be expressed as,

Due to quarter wave symmetry along the x-axis, a0 = an =0

Fourier series analysis, gives
Vo =

2Vs
Sinnwt
n =1,3, 5 np

Single Phase Bridge Inverter

For resistive load waveforms can be drawn as :

For inductive load the waveforms can be drawn as

Harmonic Analysis of Single Phase Bridge Inverters :

2
Vo =
To

2
V
dt
(
)
0 s

T0 / 2

1/ 2

= Vs

The instantaneous output voltage can be expressed in terms of Fourier series as,
Vo =

4Vs
Sinnwt
n =1,3, 5 np

Vo = 0 for n = 2,4,6

For n = 1 the rms value of the fundamental component is,

V01 =

2Vs
2p

= 0.9V s

5.2 Three Phase Bridge inverter

A 3-phase bridge type voltage source inverter using IGBT in shown below. The output from this
inverter is to be fed to a 3-phase balanced load. Figure shows the power circuit of the three-phase

inverter. This circuit may be identified as three single-phase half-bridge inverter circuits put
across the same dc bus. The individual pole voltages of the 3-phase bridge circuit are identical to
the square pole voltages output by single phase half bridge or full bridge circuits.

The three pole voltages of the 3-phase square wave inverter are shifted in time by one third of
the output time period. These pole voltages along with some other relevant waveforms have been
plotted in Fig. shown below. The horizontal axis of the waveforms in following Fig. has been
represented in terms of t, where is the angular frequency (in radians per second) of the
fundamental component of square pole voltage and t stands for time in second. In Fig. the
phase sequence of the pole voltages is taken as V and V. The numbering of the switches in above
fig. has some special significance with the output phase sequence.

Fig. Output Voltage Waveform

To appreciate the particular manner in which the switches have been numbered, the conductionpattern of the switches marked may be noted. It may be seen that with the chosen numbering the
switches turn on in the sequence:- Sw1, Sw2, Sw3, Sw4, Sw5, Sw6, Sw1, Sw2,.and so on.
Identifying the switching cycle time as 360 degrees (2p radians), it can be seen that each switch

conducts for 1800 and the turning on of the adjacent switch is staggered by 60 degrees. The upper
and lower switches of each pole (leg) of the inverter conduct in a complementary manner. To
reverse the output phase sequence, the switching sequence may simply be reversed.
Considering the symmetry in the switch conduction pattern, it may be found that at any time
three switches conduct. It could be two from the upper group of switches, which are connected to
positive dc bus, and one from lower group or vice-versa (i.e., one from upper group and two
from lower group). According to the conduction pattern indicated in Fig. there are six
combinations of conducting switches during an output cycle:- (Sw5, Sw6, Sw1), (Sw6,
Sw1,Sw2), (Sw1, Sw2, Sw3), (Sw2, Sw3, Sw4), (Sw3, Sw4, Sw5), (Sw4, Sw5, Sw6). Each of
these combinations of switches conducts for 600 in the sequence mentioned above to produce
output phase sequence of A, B, C. As will be shown later the fundamental component of the
three output line-voltages will be balanced.
5.3 Voltage Control in Single Phase Inverters
AC loads may require constant or adjustable voltage at their input terminals. When such loads
are fed by inverters, it is essential that the output voltage of the inverters is so controlled as to
fulfil the requirement of the load.
The various methods for control of output voltage of inverters are as follows:
1. External control of AC output voltage
2. External control of DC input voltage
3. Internal control of inverter
The first two methods require peripheral components whereas the third method requires no
peripheral components.
In external control of AC output voltage there are two methods, they are:
AC voltage control & Series inverter control
External control of DC input voltage may use a number of methods which involve use of
controlled converters and choppers.
The inverter output voltage may also be adjusted by exercising a control within the inverter. This
control is done by PWM control of the inverter. A number of PWM techniques are as under:
1. Single pulse width modulation
2. Multiple pulse width modulation
3. Sinusoidal pulse width modulation
In single pulse width modulation control, theres only one pulse per half cycle and the width of
the pulse is varied to control the inverter output. The gating signals are generated by comparing a
rectangular reference signal of the amplitude Ar with triangular carrier wave of amplitude Ac,
the frequency of the carrier wave determines the fundamental frequency of output voltage. By

varying Ar from 0 to Ac, the pulse width can be varied from 0 to 100 percent. The ratio of Ar to
Ac is the control variable and defined as the modulation index.
The harmonic content can be reduced by using several pulses in each half cycle of output
voltage. The generation of gating signals for turning ON and OFF transistors by comparing a
reference signal with a triangular carrier wave. The frequency Fc,
determines the number of pulses per half cycle. The modulation index controls the output
voltage. This type of modulation is also known as uniform pulse width modulation.
In sinusoidal pulse width modulation, instead of, maintaining the width of all pulses, same as in
case of multiple pulse width modulation, the width of each pulse is varied in proportion to the
amplitude of a sine wave evaluated at the centre of the same pulse. The distortion factor and
lower order harmonics are reduced significantly. The gating signals are generated by comparing
a sinusoidal reference signal with a triangular carrier wave of frequency Fc. The frequency of
reference signal Fr ,determines the inverter output frequency and its peak amplitude Ar, controls
the modulation index M,and Vrms output voltage VO. The number of pulses per half cycle
depends on carrier frequency.

5.4 Harmonic Reduction in Inverter

There are several industrial applications which may allow a harmonic content of 5% of its
fundamental component of input voltage when inverters are used. Actually the inverter output
voltage may have harmonic content much more than 5% of its fundamental component. In order
to limit this harmonic content to a reasonable limit of 5%, one method is to insert filters between
inverter output and the load and the other method is to reduce the harmonic content of the
inverter output voltage. Various methods of harmonic reduction in inverter output voltage are:

Harmonic reduction by PWM

Harmonic reduction by transformer connection
Harmonic reduction by stepped wave inverter
Harmonic reduction using multilevel inverters

5.5 Current Source Inverter

In previous sections the inverters were the voltage fed inverters or voltage source inverters(VSI).
In VSIs, to cope with the inductive loads, the power switches with freewheeling diodes are
required, whereas in a current source inverter, the input behaves as a current source and the
output current is maintained constant irrespective of the load. The circuit diagram to explain the
basic principle of current source inverter is shown below.

In Fig (a), when Tl, T2 are on, load current io is positive and equal to I, When T3, are on, load
current io is negative and equal to - I as shown in Fig. (b). The output frequency of io can be
varied by controlling the frequency of triggering the thyristor pairs Tl,T2 and T3, T4, It is seen
from Fig. (b) that output current io is a square wave of amplitude to the dc input current I.

Fig.a

fig.b

Assume that load consists of a capacitor C. It is known for a capacitor that

io = C(dvo/dt)
As io is constant, slope di must be constant over every half cycle. This slope is positive from zero
to T/2 and negative from T /2 to T. On this basis, waveform of load voltage Vo is in Fig,(b). The
input voltage to the CSI, i.e. vi = Vo when Tl, T2 conduct and -Vo when T3, T4 conduct. Note
that waveshape of Vi can be drawn by referring to the arm of vo. For f= 1/T as the frequency of
output voltage Vo or current, input voltage Vi has frequency of 2f.
The dc current I, input to CSI, is always unidirectional. If average value of ViII is positive, flows
from sourc to load. In case average value of Vin is negative, power flows from load e, i.e,
regeneration of power takes place. In a practical inverter, the load current waveform is not a
square wave.

5.6 Series Inverter

The circuit diagram of a basic series inverter is shown in figure. It consist of load resistance R in
series with commutating components L and C. The values ofg L and C are so chosen that the

series RLC circuit is underdamped in nature. The two thyristors are turned on appropriately so
that output voltage of desired frequency can be obtained.
When thyristors T1 is triggered, with T2 off, current i starts building up in RLC circuit. As the
circuit is underdamped; the load current, after reaching some peak value, decays to zero at some
point a. At point a, as the load current tends to reverse, SCR T1 is turned off. After instant a,
some minimum time (tq.min) must elapse for T1 to regain its forward blocking capability.
At point b, thyristors T2 is triggered such that ab = Toff>(tq.min). When T2 is triggered at instant
b, capacitor begins to discharge and load current is now reversed. This current becomes zero at
instant c, then after cd=Toff, T1 is triggered again.

From waveforms it is clear that current i is zero when rt =

oa =
Time period of oscillations,

Output frequency, f =

1
R 2
-[
]
LC
2L

1
2(oa + Toff )

f =
2(

p
1
R 2
-[
]
LC
2L

+ Toff )