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QUESTION BANK
III SEMESTER BTECH
is harmonic or not.
15. Define isolated singularity, pole, essential singularity and removable singularity.
16. Find the residue of
at
20. If
Show that
is a subspace of V.
21. Define vectorspace , basis and dimension of a vectorspace , also define subspace.
22. Write down the complex fourier transform pair.
then
and
PART B
3. Show that
4. If
is an analytic.
11. Evaluate
where C :
dz where C:
Inside C
Outside C
14. Find the nature and location of singularities of
16. Evaluate
17. Evaluate
where C:
19. Evaluate
,where C:
21. Evaluate
=1
where C:
in powers of (z-1).
where C:
25. Expand
at
generates
27. Show that the vectors (4,3,-1),(2,-1,5),(-1,1,2) are linearly independent.express (5,15,2) as a linear
combination of above vectors.
28. Verify whether
is an innerproduct in
or not for
in
are Orthogonal
PART C
36. Show that
is differentiable except at
if
given that
in to the points
Find
2)
in the region
1)
2)
47. Prove that
48. Evaluate
49. If
.
50. Evaluate the integral using Residue theorem
where C:
(3,1,1,-2,3)
55. Explain how will you find an orthonormal bsis from a given set of nonzero independent vectors
56. Show that the vectors (1,2,3),(0,1,2),(0,0,1) generates R3
57. For what value of k will the vector (1,-2,k) inR3 be a linear combination of the vectors
and(2,-1,5)
(3,0,-2)
58. Find the coordinate of the vectors (2,1,-6)of R3 relative to the basis (1,1,2),(3,-1,0)&(2,0,-1)
59. Apply Gram-schmidh Orthogonalisation process to obtain an orthonormal basis for R3 From the basis
given by (3,0,4),(-1,0,7),(2,9,1)
PART - B (5 Marks)
1.
2.
3.
4.
5.
6.
PART - A (2 Marks)
PART - B (5 Marks)
1. Prove that p
q ~ ( ~p
q)
q)(q
p)
q,q
r,s
b)(a
c),~(b
c),d
5.
relations on a set A represented by the matrix
MR = 0 1 0
Ms = 0 1 0
1 1 1
1 1 1
1 0 0
1 00
6. Show that I congruent mod S is an equivalence relation. Find the equivalence classes.
7. Draw the Hasse diagram for {2,4,8,3,6,110,12,25,32} with divides as order
8. Let S= {(1,2), (2,1) } be a relation on a set A= {1,2,3}. Find the minimum number of ordered
pairs to make it an equivalence relation.
9. Show that every cyclic group is abelian.
10. On Q + show that * defined by a*b = (a*b)/2 (a,b
Q+ is an abelian group.
11. Show that Z6 = {0,1,2,3,4,5} is a group under +6 and not a group under 6
12. Show that Z5 = {[1],[2],[3],[4]} is a group under 5
13. Show the recurrence relation an 2an-1 = 3n , a1=5
14. Solve : an+1 2an =5 a0=1
7.
B5 w.r.t
9. If f: a
S(x) )
y ( M(y)
~ W(Y) )
x ( F(x)
W(y) )
y ( M(y)
W(y) )
~ S(x) ) follows
H is a homomorphism and a
G show that
a) f(a-1) =(f(a))-1
b) f(e) =e-1
c) if K is a subgroup of G then f(k) is a subgroup of H
10. Find PDNF and PCNF of (pq)
(~pr)
(qr )
11. Prove that the minimum weight of nonzero code words in a group code is the minimum
distance.
PART B
1. Reduce the following expression using K-map and implement them in universal logic.
M(1,4,5,11,12,14).d(6,7,15)
2. Show how the function Y(A,B,C)=m(0,2,3,4,5,7) can be implemented using 3 to 8 binary decoder and an
OR gate.
3. Design a 3 bit positive edge triggered ripple down counter using JK flip flop.
4. Design a MOD 7 synchronous up counter using T Flip flop.
5. Generate the sequence 110010 using sequence generator.
6. Reduce AB + (AC)' + AB'C(AB + C)
7. Simplify the following expression Y = (A + B)(A + C' )(B' + C'
8. Prove that ABC + ABC' + AB'C + A'BC = AB + AC + BC
9. Define duality property.
10. Mention the important characteristics of digital ICs?
11. List basic types of programmable logic devices.
12. What is programmable logic array? How it differs from ROM?
13. Define shift registers and its types?.
14. Explain ring counter and Johnson counter.
15. Design a mod 6 asynchronous counter using JK flip flop.
16. Convert JK flip flop to SR flip flop and design the circuit.
17. Generate the sequence 111010 using sequence detector.
18. Define test generation.
19. Define the path sensitization method .
20. Explain the fault table method.
PART C
1.Obtain the minimal expression using tabular method
m(1,5,6,12,13,14)+d(2,4)
2.Obtain the minimal SOP expression for m(2,3,5,7,9,11,12,13,14,15) and implement it in
NAND logic.
Present state
Next state
W=0
Output
W=1
Y1
Y0
Y1
Y0
Y1
Y0
10. Explain the working of BCD Ripple Counter with the help of state diagram and logic
diagram.
11. Design a logic circuit to convert the BCD code to Excess 3 code.
12.Design a sequential detector which produces an output 1 every time the input sequence 1011
is detected.
13. Explain in detail about serial in serial out shift register.
14.Detect the sequence 0010 using sequence detector.overlapping is allowed.
15.Explain in detail about Finite state machines and its types.
16.Design a circuit that converts a BCD code to GRAY code.
17.Draw and explain 1 to 8 multiplexer.
18. Explain PLA folding in detail with example.
19. Explain the following with an example.
(i) Fault table method
(ii) Path sensitization method
(iii) Boolean difference method.
20.Explain in detail about the different types of faults.