Professional Documents
Culture Documents
SA-XR50E/EB/EG
( SA-XR70/XR55 )
CONTENTS
1. GENERAL DESCRIPTION
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9. TROUBLE SHOOTING
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1. GENERAL DESCRIPTION
1-1. Features
A) High sound quality reproduction for all DVD audios, DVD videos, music CD andcompressed source.
-1. Full-digital amplifire enabling High sound quality.
* Audio signal from digital input through Amplifier output stage is completely digitalized, and is output
to speaker output terminal.
Source of High sound quality can be faithfully reproduced because worked by sampling frequency
up to 192KHz.
* In addition, High sound quality created by DVD-Audio can also faithfully reproduced by design intended
for High sound quality which convert analogue signal to 192KHz and perform signal processing with
32bit by using 32bit DSP.
-2. High speed digital arithmetic processing.
* Wide-band reproduction without frequency dependence in enabled by means of digital arithmetic
processing which processes digital signal by high speed in 98MHz.
* S/N ratio at ordinary sound level is improved by VGDA (variable gain digital amplifier) technology.
By this clear and higher faithfule sound approaching original sound can be reproduced.
-3. High effeciency
* Digital amplifier can suppress extra heat loss (energy efficiency 90% or more), and effeciently convert
input signal to audio energy.
* By this, Amplifier with a little generation of heat/electricity consumption in which the result and the earth
environment are considered has been achieved.
-4. Wide pwer bandwidth with 88kHz reproduction.
* Wide power bandwidth equal to that of hight class analogue amplifier and excellent S/N ratio
in 103dB are realixed.
-5. "Re-Master" equipped can reproduce not only DVD but also the voice of the compression audio of
WMA/MPEG Audio Layer etc.
-6. Low extension facility called "Bass Synthesizer" to be equipped to realizes super-low reproduction.
B) High sound quality decoder "DTS 96/24" is equipped in addition to 6.1ch decoder of Dolby digital EX
and DTS-ES.
-1. "Dolby Digital - SURROUND EX".
* Dolby Digital - EX(Extra Surround) is an acoustic format developed by Dolby Research Institute
and Lucas Film company, and was adopted in movie.
"Star Wars: Episode 1 the Phantom Menace". After that, it was applied to domestic acoustic format
as Dolby Digital - SURRUND EX.
* This format possesses SURROUND BACK (SB)channel in addition to 5.1ch SURROUND SYSTEM.
By this, more rich detailed sound field has been realized with greatest presence and spread.
* The information of back SB added is encoded into 5.1ch SURROUND signal, and is exchangeable
with existing 5.1ch SYSTEM.
* AAC decoder is installed, and multi ch reproduction of multi ch voice and the digital versatile disc audio
delivered in the BS digital broadcasting with which the presence overflows is more possible.
-2. "DTS-ESNEO: 6".
* DTS-ES is new Multi Channel Digital Signal Format developed by DTS(Digital Theater System) company.
"ES" in DTS-ES is abbreviated of "Extended Surround"
This is new format which add extended surround signal to conventional Digital surround format(5.1ch) and
makes 6.1ch, which this 6.1ch enables more sound fidelity and extendibility in comparison to DTS(5.1ch).
* DTS-ES has two types, one is "DTS-ES Discrete 6.1ch" , other is DTS-ES Matrix 6.1ch.
And, both of two are interchangeable with conventional DTS(5.1ch) in playback.
* DTS-ES has a function possible to artificially make 6ch surround of 2ch source both digital and analogue.
This is called "DTS NEO:6 surround mode.
4
[ DTS-ES Discrete 6.1ch ]
This is format of which each channel of 6.1ch incl. added SB ch is independently recorded by method
of Digital Discrete.
[ DTS-ES Matrix 6.1ch ]
This format of which SB ch processed by matrix encode in advance is inserted to SL/SR ch, and
output to SL/SR/SB ch at playback after performing Matrix decoder.
[ DTS NEO: 6 CINEMA ]
Making highly of Separate characteristic this mode is decoded, which show good effect similar to that of
6.1ch when playback of 2ch source. Accordingly, this mode is suitable for playback of cinema sound.
[ DTS NEO: 6 MUSIC ]
Front channel (FL/FR) signal is stable in its tone quality because playing it back non-through Decoder.
In addition, it shows natural tone by an influence of surround signal output from Center channel and
Surround channels (SL/SR/SB). Accordingly, this mode is suitable for playback of music sound.
[ DTS-ES Discrete 6.1ch ]
(6.1ch Theater)
135W
1W
AC120V /60Hz
Power consumption
( In standBy condition )
Power supply
Dimensions ( W x H x D )
Weight
DIN Power : 1kHz, T.H.D. 1%
AMPLIFIER Power Output :
SECTION Each channel Driven
1kHz, T.H.D. 0.9%
5
SA-XR50P, PC
( '04 Receiver )
SA-XR45/25P, PC
( '03 Receiver )
SA-XR10PP
( '02 Receiver )
(6.1ch Theater)
130W
1W
AC120V /60Hz
(5.1ch Theater)
115W
1W
AC120V /60Hz
430 x 83 x 376mm
430 x 74 x 375mm
(16-15/16" x 3-9/32"
(16-15/16" x 2-29/32"
x 14-13/16")
x 14-3/4")
4.2kg (9.3 lb.)
4.2kg (9.2 lb.) :XR45
4kg (8.8 lb.) :XR25
2 x 100W (6 ohm)
2 x 100W (6 ohm)
Front L/R
Center
2 x 100W (6 ohm)
100W (6 ohm)
Surround L/R 2 x 100W (6 ohm)
Back
100W (6 ohm)
Load impedance
Front L/R 6 - 8 ohm
Center
6 - 8 ohm
Surround L/R 6 - 8 ohm
Back
6 - 8 ohm
Total harmonic distortion : T.H.D.
0.09% (6 ohm)
20Hz - 20kHz
Frequency response : CD /TV /DVD 4Hz - 88kHz, +/- 3dB
430 x 52 x 334mm
(16-15/16" x 2-1/16"
x 13-5/32")
3.5kg (7.7 lb.)
----
2 x 100W (6 ohm)
100W (6 ohm)
2 x 100W (6 ohm)
100W (6 ohm)
6 - 8 ohm
6 - 8 ohm
6 - 8 ohm
6 - 8 ohm
0.3% (6 ohm)
2 x 100W (6 ohm)
100W (6 ohm)
2 x 100W (6 ohm)
---6 - 8 ohm
6 - 8 ohm
6 - 8 ohm
---0.9% (6 ohm)
22k ohm
22k ohm
22k ohm
103dB (IHF'66)
98dB (IHF'66)
98dB (IHF'66)
Mono
Stereo
Mono
Stereo
0.2%
0.3%
73dB
67dB
0.2%
0.3%
73dB
67dB
0.2%
0.3%
73dB
67dB
Frequency response
20Hz - 15kHz : +1dB, -2dB 20Hz - 15kHz : +1dB, -2dB 20Hz - 15kHz : +1dB, -2dB
40dB
40dB
40dB
Stereo separation
1 kHz : 40dB
10kHz : 30db
75ohm (Unbalanced)
1 kHz : 40dB
10kHz : 30db
75ohm (Unbalanced)
1 kHz : 40dB
10kHz : 30db
75ohm (Unbalanced)
Antenna terminal
6
Specifications
SA-XR50P, PC
( '04 Receiver )
530kHz - 1710kHz
SA-XR10PP
( '02 Receiver )
530kHz - 1710kHz
530kHz - 1710kHz
IF rejection at 1000kHz
VIDEO
Output voltage at 1V input
SECTION
Maximum input voltage
Input /Output impedance
S - Video terminal
SA-XR45/25P, PC
( '03 Receiver )
Input
50dB
50dB
50dB
1V +/-0.1Vp-p
(Unbalanced)
1.5Vp-p
1V +/-0.1Vp-p
(Unbalanced)
1.5Vp-p
1V +/-0.1Vp-p
(Unbalanced)
1.5Vp-p
75 ohm
75 ohm
75 ohm
----
Component video
Output
Input
Output
TV Monitor
TV /DVD
TV Monitor
56 keys
TV Monitor
TV /DVD
TV Monitor
56 keys
---------67 keys
56 x 31.5 x 190mm
51 x 30 x 195mm
54 x 27 x 204mm
(2 x 1-3/16" x 7-21/32")
Weight
133g (4.7oz.)
146g (5.15oz.)
Power source
(UM-3) x 2
(UM-3) x 2
(UM-3) x 2
SDIN
DSP_RESET
DSP_FCS
DSP_CS
INTREQ
FINTREQ
A/D
CS5361
Analog
RDS_CK
RDS_ST
MCK_SEL
DSP_OSC
Video-Sel
NJM2296
NJM2586
OSC_PWR
AM Beat
Proof
uP
Rewriter
6
2
uP
Rewriter
5
2
REQS
REQM
M_CK
S2M_DT
M2S_DT
Main uP
M38039MC-xxxFP
( 5V )
H-Bridge
RS
Analog
--> D.Amp
--> D/A
SB
2
2
MUTE_SUB
Flash
Rewriter
D-AMP Gain
( 3V -- 0V )
2
AC_SYNC
POWER
_RELAY
REMOTE
Analog
INIT_IN
--> D.Amp
--> D/A
PWM
--> D.Amp
LS
A/D_ATT
(B_PROOF)
OSD_CK
OSD_DT
OSD_ST
V_A , B, C
SUBW OUT
ROM
Correction
R
E
L
A
Y
DC_DET
LC74781
KEY 1, 2
OSD
ROM
Correction
Sub uP
5V
(XR70 only)
M38039MC-xxxFP
( 5V )
TV OUT
PCM
DEC_GND
DEC_OUT
5V
LS/RS
PCM
--> D.Amp
--> D/A
ERR_RCVRY
AMP_CNT1
SEL/TN/DA_CK
SEL/TN/DA_DT
5V
2003. 6. 18
Remote
Control
Button
SA-XR30/50/70
5V
LED
Driver
FR
FC
SP_A, B
(XR50/70)
TAS5076
PWM
--> D.Amp
PCM
C/SB
THRM_DET
Analog
FL
Analog
H-Bridge
/SHORT_DET
CS5361
--> D.Amp
--> D/A
Modulator
SEL/TN/DA_CK
SEL/TN/DA_DT
DA_ST
MMD
(XR70)
LEVEL Adj
PCM VR/TONE
TRIM Con.
A/D
SMUTE
A/D
ATT
FL_CS
BUFF
/ LPF
(XR70 only)
AK4384
SUBW
CS494xx
AD_M0 / 1
AD_OVF / OVS
AD_RESET
--> D.Amp
--> D/A
R
E
L Analog
A
Y
D/A
DSP
H-Bridge
SDA / SCL
CS5361
PCM
5
Analog
2nd
Audio
--> D.Amp
--> D/A
AK4384
3.3V(5V input OK)
A/D
Input
Selector
SEL_ST
VCR_REC
MT_2ND
DVD, TV,
VCR
D/A
/AMP_RESET
L/R
/MUTE
3.3V
PWM
--> D.Amp
/MT_ALL
LC72723
5V
DVD
LS/RS
DIR_INT0 , 1
DIR_RESET
DIR_CS
CDTO
FL/LED_CK
FL/LED_DT
DVD
C/SUBW
RDS
SCDCLK
SDOUT
3.3V
PCM
Decode
Dolby.D-EX
DTS-ES
AAC, etc
LED1_CLK
Second
Audio Out
TUNER
AK4114
5V
PCM
DIR
SEL_ENC
_A, B
TUN_SD
TUN_DI/ST
TUN_CE
5V
CD, TV,
DVD, VCR,
TAPE
LED2_CLK
(XR70)
OPT 1/2 ,
COAX 1/2
VGDA
D-AMP Gain max
(40V -- 10.5V)
HP
FL Driver
5V
NJU3426
Selector
Encoder
Master
Volume
Switching
Regulator
FLD
DC-DC
converter
6 to 5, 3.3, 2.5
+/-14.5V, FL AC
Audio output signal is amplified by the voltage gain control of H-Bridge power supply circuit.
Back up
Power
XR50
XR70
----
DVD
DVD
TV
TV
TV
NJM731
S1
S2
DVR/VCR DVR/VCR1
DVR/VCR1
IN
VCR REC
VCR2
S3
S7
to OP AMP
VCR2
OUT
XR30
CD
CD
CD
TUNER
TUNER
TUNER
DVD
TAPE
TAPE
-------
TAPE
REC
TAPE REC
or
2nd AUDIO
S4
S5
S6
XR30/50
S8
LEVEL SHIFT
SEL_STB
LATCH CIRCUIT
Fig. - 1
SEL_CLK
SHIFT REGISTER
SEL_DATA
9
S4
S1 S2 S3
S5
XR30
XR50/70
DVD
O
X
X
O
X
X
TV
X
O
X
O
X
X
X
X
O
X
X
X
DVR/VCR ,DVR/VCR
VCR2
X
X
X
O
X
CD, AUX
X
X
X
O
X
O
TUNER
X
X
X
O
X
X
X
X
X
O
X
X
TAPE ( XR30: DVD )
TAPE MONITOR ON
----------MUTING ON
--------------- : Do not care in switching of MUTING ON/OFF, too.
S6
S7
S8
X
X
X
X
X
O
X
-----
O
O
O
O
O
O
X
X
X
X
X
X
X
X
X
O
O
O
Fig. - 2
* If S7 and S8 concurrently become ON condition, input circuit itself may get to oscillate because it turns to
closed circuit loop. It's the same with relation S3 and S4 in XR30 series.
In order to avoid the above problem, microcomputer controls the timing of switching so that the said SW would
not concurrently become ON condition.
The above switching timing : Refer to " Fig. - 6 the timing chart ".
* XR30 VCR REC switch must be OFF when DVR/VCR selector is selected.
* As for XR50/XR70, these have VCR_REC port for VCR REC MUTE and this port should be set
to "L" when VCR1 is selected.
* A TEPE REC output can be switched to the "SECOND AUDIO OUTPUT" terminal by XR70 setup.
* When a DIGITAL input is chosen ( at DIGITAL LOCK in AUTO INPUT MODE, and the time of
DIGITAL INPUT MODE selection), all the above mentioned analog input selectors are set as OPEN.
Vin1
Vin2
NJM259
SW2
SW1
a
TV
Vin3
DVD
Vin4
VCR2
Vin5
b
b
a
b
MUTE 1
SW4
b
Q2
No
Q3
VCR1 REC
VCR REC
b
a
MUTE 3
SW3
a
MONITOR
(SW5)
a
MUTE 2
Fig. - 3
Q1
10
Contorol
Fixing V_A
SW1
V_B
SW2 SW3
MUTE2 MUTE3
V_C
*1
SW4
SW5
---
---
MUTE1
Selected Output
MON.
NO
VCR1
OUT
USED
REC
Q1
Q2
Q3
POWER OFF
OFF
OFF
OFF
VCR 1 *2
VCR1
VCR1
OFF
TV
TV
TV
TV
DVD
VCR2
DVD
DVD
DVD
VCR2
VCR2
VCR2
Fig. - 4
1) Switch setting ; a : 'L' = ON , 'H' = OFF
b : 'H' = ON , 'L' = OFF
2) Selector switching is controlled by signal of microprocessor : "V_A / V_B / V_C"
3) *1 : It is controlled according to "OR" condition of signal "V_A / V_B / V_C".
*2 : DVR / VCR1 or DVR / VCR
4) The "MUTE 1" is controlled by the signal which was made by adding control "V_A" and "V_B".
5) The timing of POWER OFF is changed at the same time as the FL display OFF.
6) In the position except the above video selectors such as TUNER, it is set to "VCR1 (VCR)".
DVD
S1
TV
S2
DVR/VCR1
S3
VCR2
S4
CD
S5
TUNER
S6
S7
TAPE
S8
Fig. - 5
TAPE REC
or
2nd AUDIO
11
Selector OPEN
( RF_MUTE )
RF_MUTE
Data for
Selector
40ms
100ms
Fig. - 6
12
AVSS AVDD R
RX0
RX1
EX2
EX3
RX4
RX5
RX6
RX7
8 to 3
Input
Selector
No used
XT0
IC1007
X'tal
Oscillator
Clock
Recovery
Clock
Generator
MCKO1
MCKO2
DEM
DAIF
Decoder
Audio
I/F
LRCK
BICK
SDTO
DAUX
TX0
PDN
TX1
DIT
AC3/MPEG
Detect
VIN
B,C,U,V OUT
Error &
STATUS
Detect
INT0 INT1
Q - Subcode
Buffer
uP I/F
CSN(OCKS0)
CCLK(OCKS1)
CDTO(CM0)
CDTI(CM1)
P/SN="L" IIC
Fig. - 7
* The above circuit diagram shows circuit condition at "Serial control mode"in DIR IC.
* Mode of DIR IC is set to "Serial control mode" when input terminal "P/SN" is "L".
And, mode becomes "Parallel control mode" when "P/SN" is "H".
* "Serial control mode" has two control methods,one is "4-wire serial mode" and the other is "IIC"mode.
Control method becomes ""4-wire serial mode" when input terminal "IIC" is "L".
* "4-wire serial mode"composed of "CSN","CCLK","CDTI"and "CDTO" is controlling DIR IC,
when "4-wire serial mode", "Serial control mode".
Timing chart of each CLOCK and Audio serial interface and control signal of DIR IC are shown to next.
13
C) Timing chart of Clock signal
1/f ECLK
VIH
VIL
dECLK = tECLKH x fECLK x 100
= tECLKL x fECLK x 100
XTI
tECLKH
tECLKL
1/f MCK1
MCKO1
50%DVDD
tMCKH1
tMCKL1
1/f MCK2
50%DVDD
MCKO2
tMCKH2
tMCKL2
1/fs
VIH
VIL
LRCK
tLRH
tLRL
Fig. - 8
LRCK
tBLR
tBCK
tBCKL tBCKH
tLRB
VIH
VIL
BICK
tLRM
tBSD
50%DVDD
SDTO
tDXS
tDXH
VIH
VIL
DAUX
Fig. - 9
14
tCCKL
tCCKH
VIH
VIL
CSN
tCCS
tCCK
VIH
VIL
CCLK
tCDH
tCDS
C1
CDTI
C0
R/W
VIH
VIL
A4
Hi-Z
CDTO
Fig. - 10
IPS1
0
0
0
0
1
0
0
1
1
0
101 - 111
OPS02
0
IPS0
Input Data
RX0
RX1
RX2
RX3
RX4
RX5 - RX7
Recovery Data Selecting
Fig. - 11
0
1
0
1
0
OPS01
OPS00
XR30/50/70
COAX1 : DVD
OPT2 : DVR
OPT1 : TV
COAX2 : CD
HDMI
No Used
Output Data
RX0
0
0
100 - 111
RX1 - RX7
Through Output Data selecting (TX0)
Fig. - 12
<--- No used
<--- Fixed
<--- No used
15
DIT
OPS12
0
0
0
0
0
0
1
0
0
0
0
1
OPS11
OPS10
Output Data
RX0
0
0
RX1
0
1
RX2
1
0
RX3
1
1
RX4
0
0
101 - 111
RX5 - RX7
DAUX
x
x
x
Through Output Data selecting (TX1)
Fig. - 13
<--- COAX1
<--- OPT2
<--- OPT1
<--- COAX2
<--- HDMI
<--- No used
<--- No used
* In case of HDMI input, TX1 output data is output only on condition that fs is 48KHz or less.
G) MASTER CLOCK OUTPUT CONTROL
* The master clock is output from the terminal MCKO1.
* The output of master clock is selected by the sampling frequency of input signals.
No
OCKS1
OCKS0
MCKO1
MCKO2
X'tal
0
1
2
3
0
0
1
1
0
1
0
1
256fs
256fs
512fs
128fs
256fs
128fs
256fs
64fs
256fs
256fs
512fs
128fs
Fig. - 14
* Selection for clock output ; OCKS1 : '0' = Serial mode , '1' = Parallel mode
OCKS0 : '1' = Serial mode , '0' = Parallel mode
CM1
CM0
UNLOCK
PLL
X'tal
0
1
0
1
0
1
----0
1
---
ON
OFF
ON
ON
ON
ON
ON
ON
ON
ON
Clock
source
PLL
X'tal
PLL
X'tal
X'tal
SDTO
RX
DAUX
RX
DAUX
DAUX
Fig. - 15
* Selection for operation mode of master clock ; CM1 : '0' = Serial mode , '1' = Parallel mode
CM0 : '1' = Serial mode , '0' = Parallel mode
16
I) SAMPLING FREQUENCY AND PRE-ENPHASIS DETECTION
* The sampling frequency is detected in the comparison with the X'tal frequency.
* Then it is output to "FS3-0" bit of the control register.
XTL1
XTL0
0
0
1
1
0
1
0
1
11.2896MHz
12.288MHz
24.576MHz
( Channel status using )
FS3
FS2
FS1
FS0
fs
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
0
0
44.1kHz
Reserved
48kHz
32kHz
88.2kHz
96kHz
176.4kHz
192kHz
Default
Fixed
No Used
Fig. - 16
REF_GND
Voltage Reference
FILT+
/OVFL
VL
SCLK
LRCK
SDOUT MCLK
/RST
DIF
AINLAINL+
LP Filter
S/H
AINRAINR+
High
Pass
Filter
Digital
Decimation
Filter
High
Pass
Filter
DAC
LP Filter
S/H
Digital
Decimation
Filter
DAC
Fig. - 17
M/S
/HPF
MDIV
MODE0(M0)
MODE1(M1)
17
C) A/D_RESET --- /RST terminal : Reset (Input)
* When power is turned on, this terminal is settled to 'L' to reset A/D.
D) AD_M0, AD_M1 CONTROL --- M0, M1 terminal : Mode Selection (Input)
* This terminal is A/D sampling frequency selection.
DIV=0 --- Fixed
SAMPLE RATE
DIV = 1
DIV = 0
(kHz)
MCLK
MCLK (MHz)
8.192
32
16.384
44.1
11.2896
22.5792
48
12.288
24.576
16.384
64
8.192
22.5792
88.2
11.2896
24.576
96
12.288
11.2896
22.5792
176.4
192
12.288
24.576
Commom Master Clock Frequency
Fig. - 18
M1
M0
Mode
0
0
1
1
0
1
0
1
2kHz - 5kHz
50kHz - 100kHz
100kHz - 192kHz
Fig. - 19
E) A/D_OVF, A/D_OVS INPUT --- /OVFL terminal : Overflow Mode (Input)
A/D_OVF : Front L/R channel A/D overflow signal input.
A/D_OVS : C/LS/RS/SUBWOOFER channel A/D overflow signal input.
* This terminal is signal input.
This input terminal is 'H' normally.
When A/D input signal is excessive high, this terminal is output "Low".
While 'L' is detected, "OVFW" bit of connection data to the Main-microprocessor is set.
When DVD 6ch is selected, both "A/D_OVF"input and "A/D_OVS"input is checked.
However, in "DVDV 2ch", "A/D_OVS"input is ignored.
18
Fig. - 20
19
Fig. - 20
C/SB ch
SW ch
(CS494003)
LS/RS ch
L/R ch
Fig. - 21
20
C) DSP CODE for each SOUND MODE is as following.
Fig. - 22
D) DSP CLOCK setting is as following.
Fig. - 23
* Bass Manager /Tone is set as x1 fs at RE-MASTER.
* Bass Manager /Tone is set as x2 fs at DTS 96 / 24.
2 Dolby MARK
*3)
Fig. - 24
* SFC is effective only to 2CH source. PL2, NEO:6 and SFC can be chosen exclusively.
21
22
(1) Internal procedure of *1) part is DTS-ES matrix
(2) PL2 also can be selected like as ANALOG/PCM.
(3) Shaded area is an automatic selection.
(4) '' mark and shaded area are the default mode.
(5) PL2 or NEO:6 can be selected. Default mode is PL2.
(6) In decoding of DOLBY DIGITAL/AAC 2/0 Lt/Rt source, ANALOG/PCM and 2/0 encoded source, the selection of PL2
or NEO:6 is common. However, if STEREO or SFC is selected in ANALOG/PCM or 2/0 encoded source decoding,
2/0 source of DOLBY DIGITAL/AAC is replayed with PL2.
(7) PCM96/192 source can be replayed only STEREO mode.
(8) PCM 96/192, DTS 96/24 source can not be replayed when TONE is ON or RE-MASTER is ON.
(9) As for except 3/2 source, ENHANCED SURROUND can not be enabled.
(10) *2) part can not be replayed. Therefore, it is replayed as normal DTS and shows "DTS", not "DTS 96/24".
(11) In DVD 6CH INPUT mode, SOUND MODE switching is disabled and the mode is fixed as own mode, DVD 6CH.
(12) In *3) part, MAIN/SUB/DAUL mode can be selected. "STEREO" indicator does not light.
Fig. - 25
*1) OFFSET only +3 dB in Trim Volume.
*2) Lower 3dB of levels of L/C/R/LFE by turning ON AUTOMATIC_L/C/R/LFE_ATTENUATION,
and OFFSET all channels only +3dB in Trim Volume.
*3) Above * 2) is carried out. However, Trim Volume of all channels is Offseted only +6 dB.
-->(That is above mentioned *1 ) and * 2) is performed.)
23
*4) Lower 3dB of SUM_INPUT_X_LEVEL of Bass Manager of channels other than a SL/SR/SB channel.
--> (+3dB of levels of a SL/SR/SB channel is raised relatively.)
SILEV_L/SILEV_R/SILEV_C = 0x16C311 (-15dB) 0x101D3F (-18dB)
SILEV_LFE = 0x47FACD (-5dB) 0x32F52C (-8dB)
3dB (X=L, C, R, LFE) of BASS_MGR_INPUT_X_LEVEL of Bass Manager is lowered (0x7FFFF->0x5A9DF6).
The setting value of Trim Volume of all channels is OFFSETed only +3dB.
24
IC6901
IC1014
Fig. - 25
IC1014
(sub)
Fig. - 26
25
(To DSP IC)
Fig. - 27
C) TERMINAL FUNCTION of SUB MICRO-P is as following.
26
Fig. - 28
27
D) MASTER VOLUME CONTROL is as following.
MASTER VOLUME CONTROL controls sound volume by controlling MASTER VOLUME inside DSP and
Voltage variable switching power supply, and This MASTER VOLUME CONTROL is controlled by operation
of Encoder( Vol_ENCD_A/B input) for MASTER VOLUME.
Data is updated,and at the same time data for sound volume indication is transmitted to main microprocessor, when either MASTER ENCODER is operated, or recetion data (REMOTE VOL UP/GOWN flag)
is received from main micro-processor.
It's controlled with the output state of TEST operation continued under TEST NOISE operation.
At that time MUTE doesn't function even if MASTER VOLUME is minimum.
In case that recepttion data of [VOLUM UP/DOWN] code of remotecontrol continue over 0.5 sec,
switching time in a step is being set to the time specified by [chang of time] of setting value of Volume data,
and it gets Volume level continuously moving up and dow.
To Sub Micro-P
Fig. - 29
E) VOLUME ATTENATION CONTROL is as following.
Attenuation
Volume Curve
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
0
45
90
135
180
225
270
Turn Angle
315
Fig. - 30
28
Fig. - 32
( Note )
VOLUME ATTENUATION CONTROL controls sound volume by UP and
DOWN, and which is being set to initial level when UP and down of
VOLUME is alternately operated.
*1) Attenuation amount of VOLUME is normally specified at the interval
of 2 or 3 dB step.
However, it's set to control attenuation amount by 1 dB step
when each interval of reception data is over 40msec.
Fig. - 31
F) SPECIFICATION of VOLUME CONTROL is as following.
Volume is controlled by DSP volume in the master volume range from the maximum to -20dB.
It is controlled by power supply voltage of digital amplifier to -40dB.
Furthermore, when master volume is lowered, DSP volume is controlled again.
Power supply voltage of Digutal amplifire
* XR50/70/30 -20dB to -40dB
* XR55 series -28dB to -40dB
* XR57 series -32dB to -44dB
XR50/70/30
Fig. - 33
-40dB
-20dB
-40
-20
-41
-20
-42
-20
-59
-20
-20
Fig. - 34
29
G) MUTE CONTROL of SUB/ MAIN MICRO-P is composed as shown in the following circuit diagram.
TAS5076
/SREST
Fig. - 35
* Sub Micro-P is controlling MUTE mainly for the change in audio signal, etc.
* Main Micro-P is controlling MUTE mainly for the switching noise of person's operation,
and abnormality power supply, etc.
30
Fig. - 36
31
FL DRIVE CONTROL
Fig. - 37
32
Fig. - 38
* H/L : High or Low (The fixation output)
* I/O : input and output
* Nch : N-ch open drain
* PU-R : Pull-up Resister
* L/S : Level Shifter
33
D) ROTARY ENCODER INPUT CONTROL is as following.
ROTARY ENCODER generate 24 pulses and make matrix consisting of four combinations
as shown in Fig.-39.
And using this matrix, Up/Down of ROTORY ENCODER is discriminated.
Sampling period at each port(RA and RB) is less than 750sec.
RA
Fig. - 39
The condition transfer : 0 13201320
The way of detecting: The combination of the change is 013, 132, 320, 201.
DOWN The condition transfer : 023102310
The way of detecting: The combination of the change is 310, 102, 023, 231.
UP
01132013332320100
UP
UP
To Main Micro-P
Fig. - 40
34
E) Function setting of initial condition is as following.
Fig. - 41
Fig. - 42
35
Signal Control
Clocks
HIP2100
H-Bridge
L/R ch
HIP2100
H-Bridge
L/R ch
LS/RS ch
C/SB ch
LS/RS ch
C/SB ch
Fig. - 43
36
C) TERMINAL FUNCTION of AUDIO PWM PROCESSOR IC is as following.
Fig. - 44
37
Each PCM signal(16,20 ands 24bit) from Audio PWM IC go through Supplementary filter.
And its sampling frequency changes to 352.8KHZ or 384KHZ, increasing between 4 times and 8 times
from original sample. frequency.
Then, PCM signal is converted to PWM signal with its sampling frequency remaining.
AS to PCM signal, signal level of each sample is given to integer value.
On the other hand, maximum amplitude of sample signal of PWM is specified based on pulse width.
( 0, 1 signal --> Duty ratio signal )
fs=384kHz
PCM
Fig. - 45
E) Clock and Serial Data Interface is as following.
TAS5076PFC is composed of six functional elements:
* Clock, PLL, and serial data interface (I2S)
* Reset /power-down circuitry
* Serial control interface (I2C)
* Signal processing unit
* Pulse-width modulator (PWM)
* Power supply
This IC's clock and serial data interface contain an input serial data slave and the clock master
/slave interface.
The serial data slave interface receives information from a digital source such as a DSP, S/PDIF receiver,
analog-to-digital converter (ADC), digital audio processor (DAP), or other serial bus master.
The serial data interface has three serial data inputs that can accept up to six channels of data
at data sample rates of 32 kHz, 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, 176.4 kHz, or 192 kHz.
The serial data interfaces support left justified and right justified for 16, 20, and 24 bits.
In addition, the serial data interface supports the DSP protocol for 16 bits and the I 2 S protocol for 24 bits.
This IC can function as a receiver or a generator for the MCLK_IN (master clock), SCLK (shift clock),
and LRCLK (left/right clock) signals that control the flow of data on the three serial data interfaces.
This IC is a clock master when it generates these clocks and is a clock slave when it receives these clocks.
This IC is a synchronous design that relies upon the master clock to provide a reference clock for
all of the device operations and communication via the I2C.
When operating as a slave, this reference clock is MCLK_IN. When operating as a master, the reference
clock is either a TTL clock input to XTAL_IN or a crystal attached across XTAL_IN and XTAL_OUT.
The clock and serial data interface has two control parameters: data sample rate and clock master or slave.
F) Normal-Speed, Double-Speed, and Quad-Speed Selection is as following.
The data sample rate is selected through a terminal (DBSPD) or the serial control register 0 (0x02).
The data sample rate control sets the frequencies of the SCLK and LRCLK in clock slave mode and
the output frequencies of SCLK and LRCLK in clock master mode.
There are three data rates: normal speed, double speed, and quad speed.
Normal-speed mode supports data rates of 32 kHz, 44.1 kHz, and 48 kHz. Normal speed is supported in the
master and slave modes. Double-speed mode is used to support sampling rates of 88.2 kHz and 96 kHz.
Double speed is supported in master and slave modes.
38
Quad-speed mode is used to support sampling rates of 176.4 kHz and 192 kHz.
The PWM is placed in normal speed by setting the DBSPD terminal low or by setting the normal mode bits
in the system control register 0 (0x02) through the serial control interface.
The PWM is placed in double speed mode by setting the DBSPD terminal high or by setting the double
speed bits in the system control register.
Quad-speed mode is supported; in slave mode it is auto-detected, and in master mode it is invoked using
the I2C serial control interface. In slave mode, if this IC is not in double speed mode, quad-speed mode
is automatically detected when MCLK_IN is 128 Fs.
In master mode, the PWM is placed in quad-speed mode by setting the quad-speed bit in the system
control register through the serial control interface.
If the master clock is well behaved during the frequency transition (the high or low clock periods are
not less than 20 ns), then a simple speed selection is performed by setting the DBSPD terminal or
the serial control register.
When the sample rate is changed, this IC temporarily suspends processing, places the PWM outputs
in a hard mute (PWM P outputs low, PWM M outputs high, and all VALID signals low), resets all internal
processes, and suspends all I 2 C operations.
This IC then performs a partial re-initialization and noiselessly restarts the PWM output.
This IC preserves all control register settings throughout this sequence.
If desired, the sample rate change can be performed while mute is active to provide a completely
silent transition.
If the master clock input can encounter high clock or low clock period of less than 20 ns while the data rates
are changing, then /RESET must be applied during this time.
There are two recommended control procedures for this case, depending upon whether the DBSPD terminal
or the serial control interface is used.
Normal-Speed, Double-Speed, and Quad-Speed Operation
Fig. - 46
G) Clock Master/Slave Mode (M_S) is as following.
Clock master and slave mode can be invoked using the M_S (master slave) terminal.
This terminal specifies the default mode that is set immediately following a device RESET.
The serial data interface setting permits the clock generation mode to be changed during normal operation.
The transition to master mode occurs following a /RESET when M_S terminal has a logic high applied.
The transition to slave mode occurs following a /RESET when M_S terminal has a logic low applied.
H) Clock Master Mode is as following.
When M_S = 1 following a RESET, the TAS5076 provides the master clock, SCLK, and LRCLK to
the rest of the system.
In the master mode, the TAS5076 outputs the audio system clocks MCLK_OUT, SCLK, and LRCLK.
This IC's device generates these clocks plus its internal clocks from the internal phase-locked loop (PLL).
The reference clock for the PLL can be provided by either an external clock source (attached to XTAL_IN)
or a crystal (connected across terminals XTAL_IN and XTAL_OUT).
The external source attached to MCLK_IN is 256 times (128 in quad mode) the data sample rate (Fs).
The SCLK frequency is 64 times the data sample rate and the SCLK frequency of 48 times the data
sample rate is not supported in the master mode.
The LRCLK frequency is the data sample rate.
39
A) H-BRIDGE AMPLIFIER CIRCUIT consists of "H-Bridge DRIVER IC" for amplifying audio signal and
"DIGITAL AMP POWER STAGE CONTROL IC for amplifying audio signal in LS/LRch and C/SBch.
Each "+/-" phase signal of 6ch converted to PWM is separately inputted,and is amplified through
Bridge circuit composed of 4 MOSFET in the shape of H type, and then is outputted to next LC filter circuit.
In addtion to conversion into PWM, Audio signal is further amplified by expanding dynamic range by raising
power supply voltage for H-Bridge circuit.
And this control method is called VGDA (Variable Gain Digital AMP).
B) DIGITAL AMP POWER STAGE CONTROLER IC(HIP2100) is composed as shown in
the following circuit diagram. ( For each L /R ch )
IC6101/ IC6201, IC6102/ IC6202
Fig. - 47
40
D) TERMINAL FUNCTION of H-Bridge DRIVER IC is as following.
Fig. - 48
E) Digital /Analog Filter Circuit is as following. ( For each L /R ch )
D/A Filter = PWM signal -> Audio signal
Fs=384kHz -> 20kHz
Fig. - 50
* Should be measured by Differential method.
Fig. - 49
41
F) DIGITAL AMP POWER STAGE CONTROLLER IC(TAS5182) is composed as shown in
the following circuit diagram. ( For each LS /RS ch, C /SB ch )
Fig. - 51
42
G) TERMINAL FUNCTION of DIGITAL AMP POWER STAGE CONTROLER IC is as following.
Fig. - 52
43
H) Digital /Analog Filter Circuit is as following. ( For each LS /RS ch )
D/A Filter = PWM signal -> Audio signal
Fs=384kHz -> 20kHz
Fig. - 54
Fig. - 53
44
I) Digital /Analog Filter Circuit is as following. ( For each C /SB ch )
D/A Filter = PWM signal -> Audio signal
Fs=384kHz -> 20kHz
Fig. - 56
Fig. - 55
45
9. TROUBLE SHOOTING
9-1. TROUBLE SHOOTING
A) This "Trouble Shooting" can be used for Digital Amplifier SA-XR25/XR45/XR30/XR50/XR70 series.
<< Procedures for Trouble Check >>
* The solution is earliest when confirming trouble according to the following procedure.
A -1) Symptom : Can't Power ON. ( Can't operate the unit. )
Method of check in non connection
( All IN/Out )
Connect AC cord
No
Standby LED light ?
Yes
Yes
Yes
No
Yes
Yes
No
No
Yes
No
No
46
Check AC_SYNC of
main-microprocessor
IC6901:Pin20)
OK ?
No
Yes
No
Yes
Replace the X'tal of the clock
( X6901 )
Replace the main-microprocessor
( IC6901 )
Power switch ON
No
Yes
Check the operation switch ( Short )
or
Replace the Diode on VREF line
( D6902 )
47
Check the operation
of RELAY ( RLY721 )
OK ?
No
Yes
Check the RELAY
( RLY721:Pin3 0V )
OK ?
Yes
No
No
Yes
Check the power of
FL Driver IC901
( VDD: 48pin, +5V
Vfdp: 39pin, -30V )
OK ?
Yes
Check the serial
communication of
FL Driver IC901
( Csb: 42pin, CLK: 43pin
S1: 44pin) OK ?
No
Check the connection the mainmicroprocessor and FL driver IC
( CN951A/B )
Yes
No
Replace the FL driver IC
( IC901 )
Yes
+ 5V
GND
- VP(-30V)
FL Signal wave
No
48
A -2) Symptom : No indication on FL. ( AC relay cuts after a few seconds, become to Standby mode )
Power ON
Yes
The symptom change ?
No
A -3) Symptom : The "F76" indication on FL. ( AC relay cuts after a few seconds, become to Standby mode )
Standby LED light
No
Yes
The connection is
removed,
and check the operation,
No
Yes
Check the power supply voltage
in the I/O PCB
( +/-15V supply, D+5V, A+5V line, etc)
49
A -4) Symptom : Display doesn't change with the volume Up/Down. ( The power supply of the unit can be turned on. )
In the analog input, in the
setting of the stereo and
multichannel
Up the volume
No
Yes
50
A -6) Symptom : The sound of the speaker doesn't output. ( Check the digital amplifier operation by
all channel mode. )
No connection to IN/OUT
No
Defective of DSP IC
or check the selector IC.
Yes
Check the DC voltage between
the speaker's "+/-" polarity and
the "GND" chassis on set.
No
DC voltage in each speaker
terminal 20V -- 21V ?
Yes
51
U70-1
U70-2
HDMI in
SA-XR70
HDMI out
(S97)
HDMI in
DVD
HDMI out
TV
U70-1-1
U70-1-2
U70-3
52
B-2) Error message displayed on SA-XR70.
* U70-1-1 : Message when failing to authentication by HDCP with DVD player or TV with HDMI.
* U70-1-2 : Message when video format with DVD player is different.
* U70-3 : Message when it is not possible to communicate between TV with HDMI and SA-XR70.
Analysis : "U70-1-2"is due to the error of the communication "DDC_SCL" and "DDC_SDA"
on the HDMI input terminal (JK2001).
"U70-1-1"is due to the error of the communication "DDC_SCL" and "DDC_SDA"
on the HDMI input terminal (JK2001) or the HDMI output terminal (JK2003).
"U70-3"is due to the error of the communication "DDC_SCL" and "DDC_SDA"
on the HDMI output terminal (JK2003).
--> Usually, the most doubtful one is defective soldering.
C) The video or the sound isn't emitted by the HDMI connection.
C-1) The video signal doesn't appear on the screen.
Analysis : The video signal sent from the DVD player is send out to the TV by IC2002 : SiI9190.
When the video signal does not screen but the sound signal is normally,
checked the peripheral of HDMI output terminal (JK2003) and IC2002.
C-2) The sound doesn't appear from the speakers.
Analysis : The sound signal is output from SPDIF/SD0/SD1/SD2/WS/SCK/MCLKOUT of
IC2001 : SiI9031 and sent to the DSP block at pass through IC2009 : SN74LVC244.
When the sound of CD and DVD-VIDEO not come out, checked the line of SPDIF.
And if the sound of DVD-AUDIO not come out, checked each line of SD0/SD1/SD2
/WS/SCK/MCLKOUT.
53
10-3. HDMI SYSTEM for SA-XR70
TV
Analog Video
VCR
HDMI in
Analog Audio
Analog Video
Analog Video
T V (STB)
Digital Audio
Analog Video
SA-XR70
Digital Video
Audio 5.1ch
HDMI out
(S97)
Analog Audio
HDMI in
DVD
HDMI out
Digital Audio
Digital Amplifier
SP
SP
Digital Video
HDMI
Digital Video signal
RGB , YCbCr (480i 1080i)
Digital Audio signal
Dolby Digital , DTS , AAC
LPCM - 33kHz 96kHz/5.1ch
192kHz/2ch
54
10-4. HDMI Block Diagram for SA-XR70
IC2001 SiI9031
TMDS
C 1
TMDS
TMDS
DDC
TMDS
C 0
TMDS
HDMI
RX 1
HDCP
key ROM
---------HDCP &
Repeater
Decryption
HPD
5V
HDMI
RX 2
TO DSP
AUDIO
MCLK
LRCLK
BCLK
I2S0
I2S1
I2S2
SPDIF
HDMI
TRANSMITTE
R
IC2002 SiI9190
HDMI
TX
DIT
VIDEO
Q0 - Q23
Hsync
Vsync
DCLK
DE
IC2005
AK4114
AUDIO
-
TMDS
C 0
HDMI RECEIVER
TMDS
HDCP
key ROM
---------HDCP &
Encryption
TMDS
TMDS
DDC
HPD
I2C
SLAVE
I2C
SLAVE
TMDS
C 1
5V
BK_5V
EDID ROM
IC2011
BR24L04
MPU
IC2003 M30624FGP
ON : HDMI
S_CK
S_SI
H_SO
CS
REQ
BK_3.3V
BK_5V
TO
DSP
MPU
TO
POWER
SUPPLY
55
56
SA-XR55E, EB, EG SA-XR55P, PC
( '05 Receiver )
( '05 Receiver )
SA-XR50P, PC
( '04 Receiver )
Power consumption
( In standBy condition )
Power supply
(7.1ch Theater)
135W
0.3W
AC230 - 240V /50Hz
(7.1ch Theater)
135W
0.2W
AC120V /60Hz
Dimensions ( W x H x D )
Weight
4.6kg
2 x 100W (6 ohm)
2 x 100W (6 ohm)
2 x 100W (6 ohm)
2 x 100W (6 ohm)
100W (6 ohm)
2 x 100W (6 ohm)
2 x 100W (6 ohm)
6 - 16 ohm
6 - 16 ohm
6 - 16 ohm
6 - 16 ohm
0.09% (6 ohm)
2 x 100W (6 ohm)
100W (6 ohm)
2 x 100W (6 ohm)
2 x 100W (6 ohm)
6 - 8 ohm
6 - 8 ohm
6 - 8 ohm
6 - 8 ohm
0.09% (6 ohm)
2 x 100W (6 ohm)
100W (6 ohm)
2 x 100W (6 ohm)
100W (6 ohm)
6 - 8 ohm
6 - 8 ohm
6 - 8 ohm
6 - 8 ohm
0.09% (6 ohm)
Front L/R
Center
Surround L/R
Back (L/R)
Front L/R
Center
Surround L/R
Back (L/R)
Total harmonic distortion : T.H.D.
20Hz - 20kHz
4Hz - 88kHz, +/- 3dB
Frequency response : CD /TV /DVD
(6.1ch Theater)
135W
1W
AC120V /60Hz
200mV
22k ohm
22k ohm
22k ohm
103dB (IHF, A)
103dB (IHF'66)
103dB (IHF'66)
Mono
Stereo
Mono
Stereo
2port
2port
------87.9MHz - 107.9MHz
2port
2port
1port
---87.9MHz - 107.9MHz
1.5uV (IHF'58)
0.2%
0.3%
60dB
58dB
0.2%
0.3%
73dB
67dB
0.2%
0.3%
73dB
67dB
Frequency response
20Hz - 15kHz : +1dB, -2dB 20Hz - 15kHz : +1dB, -2dB 20Hz - 15kHz : +1dB, -2dB
40dB
40dB
40dB
Stereo separation
1 kHz : 40dB
10kHz : --75ohm (Unbalanced)
1 kHz : 40dB
10kHz : 30db
75ohm (Unbalanced)
1 kHz : 40dB
10kHz : 30db
75ohm (Unbalanced)
Antenna terminal
57
Specifications
VIDEO
SECTION
SA-XR50P, PC
( '04 Receiver )
530kHz - 1710kHz
50dB
50dB
50dB
1V +/-0.1Vp-p
(Unbalanced)
1.5Vp-p
1V +/-0.1Vp-p
(Unbalanced)
1.5Vp-p
1V +/-0.1Vp-p
(Unbalanced)
1.5Vp-p
75 ohm
75 ohm
75 ohm
IF rejection at 1000kHz
999kHz
Output voltage at 1V input
S - Video terminal
Input
Component video
Output
Input
Output
TV Monitor
TV Monitor
TV Monitor
TV /DVD/DVD RECORDERTV /DVD/DVD RECORDERTV /DVD
TV Monitor
TV Monitor
TV Monitor
56 keys
56 keys
56 keys
51 x 30 x 195mm
51 x 30 x 195mm
51 x 30 x 195mm
(2 x 1-3/16" x 7-21/32")
(2 x 1-3/16" x 7-21/32")
Weight
133g
133g (4.7oz.)
133g (4.7oz.)
Power source
(UM-3) x 2
(UM-3) x 2
(UM-3) x 2