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PhD, Electrical Engineering, Hanoi University of Sicence and Technology, Hanoi, Vietnam,
tudvhtd@gmail.com
2
PhD, Electrical Engineering, Chulalongkorn University, Bangkok, Thailand, surachai.c@chula.ac.th
Received Date: May 28, 2013
Abstract
The challenge of fault current calculation in a system with inverter-based distributed generation is
emphasized by the fault ride through requirement announced in recent grid codes. This paper
proposes an algorithm to calculate fault current in such a system. The algorithm adapts the
conventional fault calculation technique with the utilization of a power flow-based algorithm. The
accuracy of the proposed algorithm is tested by a Matlab/Simulink simulation on a simple system.
I. Introduction
There have been considerable efforts directed to the development of solution models and
algorithm for synchronous, induction, and doubly-fed induction generators with great
success and wide application [1]-[4]. However, comparatively fewer solutions have been
developed for inverter-based distributed generation (IBDG) which is a package of a
distributed generation (DG) and inverters or static power converters. In addition, most
publications concerning IBDGs have not received high unanimity. Some authors proposed a
model and an algorithm to capture the fault response of IBDG during the fault period but
they did not concern the control system of the IBDG [5]. Such algorithm is not convenient
to build a calculation tool for setting protective devices that needs the flexibility for many
fault cases. The fault response in the time-variant curve fashion of an IBDG has a similar
limitation [6]-[8]. Some authors derived IBDG models for fault calculation with deep insight
views on the transfer functions of the control system [9]. Unfortunately, those models are
suitable for an inverter-only microgrid instead of a grid with parallel operations of the IBDG
and the utility source.
In addition, despite being required, according to standard the [10], to physically fast
disconnect IBDGs from the grid in a fault event, fault current calculation in systems with
IBDG is reasonable to calculate the fault current to catch up with the fault ride-through (FRT)
requirements in some new grid codes [11]-[12]. These grid codes require an IBDG to have
a capability of passing through a fault signed by voltage at the point of common coupling
(PCC). As such, the IBDG continues to feed current during a fault instead of fast shutting
down and isolating itself. Therefore, the growing need of both DG owners and distribution
companies for more complete studies has motivated the development of solutions to
calculate the fault current in the system with IBDGs with consideration of fault ride through
requirement.
14
The objective of this paper is to propose an accurate fault current calculation method in a
system with IBDGs, serving for DG impact evaluation and protective device settings of both
utility and DG protection systems. The rest of this paper is organized as follows. Section II
briefly introduces the fault ride through requirement for a grid connected distributed
generation. Then, fault response of an IBDG is firstly analyzed in Section III in order to
model this generator for a fault calculation method. Based on this model, Section IV
proposes an adaptive algorithm to calculate the fault current in distribution networks with
IBDGs with consideration of the fault ride through requirement. This algorithm is validated
in Section V by using a time-variant simulation on a simple power system.
15
100
Voltage, %
80
60
40
20
0
100
200
300
400
500
600
700
800
900
1000
1100
1200
1300
1400
1500
1600
1700
1800
1900
2000
2100
2200
2300
2400
2500
2600
Time, ms
Irish type A
Irish type B, C, D, E
(1)
where VG is the angle of the generator terminal voltage. The maximization of reactive
current shall continue for at least 600 ms or until the distribution system voltage recovers
within the normal operational range of the distribution system.
terminal so that the power output is around the reference value Pref+jQref. After passing
through the current limiter, this reference current is used in the current controller to estimate
the reference signal for the PWM generator to control the firing angle of the thyristors inside
the inverter. There are two cases that may occur:
Case 1: The reference current after the power controller is under the limit of the
current limiter (Ithres)
Case 2: The reference current exceeds the limit Ithres.
+
PWM
abc
U PWM
, ref
Current
controller
abc
I inv
, ref
Current
abc
dqo
limiter
dq
I inv
, ref ,lim
Pref+jQref
LC filter
Iinv
Vdc
(IBDG current)
Bus p
Lf
Cf
Grid
Three-phase three-leg
inverter
dq
I inv
, ref
Iinv,dq
Ip,dq
Vp,dq
Power
controller
Pref
Qref
abc
dqo
Iinv,abc
Ip,abc
Vp,abc
PLL
Pref jQref
VG*
jC f VG
(2)
Providing that the dynamic network support requirement is considered, the IBDG is
controlled to inject a fully reactive current Iinv,sat into the utility system to satisfy the DSOs
17
requirement. Consequently, the IBDG is only modeled by the dependant current source in
parallel with the filter capacitor Cf as shown in Figure 3. The limited current is defined by
(3) where 0 0 /2. In case of fully reactive support, 0 = /2.
Iinv,sat=|Irated| Vp-0p)
Bus p
Fault
Vp
Iinv,sat
Cf
Grid
Bus k
(3)
Although the FRT requirement requires the reactive current injected to Bus p, the current
controlled before the capacitor Cf as shown in Figure 3 can be acceptable. This is because
the difference between current before and after the Cf is small. The inclusion of Cf in the
model is to reflect more accurately the operation of the IBDG.
Z eq
2
0
Z kk
Z kk
3Z f
2
0
Z kk
Z kk
3Z f
(4)
System representations such as lines and transformers are similar to those in the
conventional method. However, all loads of the system should be represented by constant
impedances based on the prefault voltages in order to reflect the effect of voltage on load
demand during fault. The IBDG is modeled as a PQ source in the first iteration and occupies
in only the positive-sequence network as modeled in Fig. 4. The model is switched to a
current source (3) if one of the two conditions (5) and (6) occurs.
18
Same as the
conventional
fault calculation
Initial solution
Differenene
Modified sequence
network connection
Power flow algorithm
Positive voltages
Line currents
Yes
Same as the
conventional
fault calculation
Yes
No
Power mismatch calculation
No
Jacobian matrix
calculation
Positive-sequence
voltages
End program.
Update solution
(a)
(b)
Figure 4. Adaptive fault calculation
Transmission
system
Synchronous
gen.
IBDG
Iinv,sat
N
L
Cf
V k1
Bus p
1
k
Negative-seq.+
network V
I k2
2
k
Zero-seq.
network
I k0
+
V k0
3Zf
(5)
(6)
where Iref is the reference current expected at the output of the IBDG and given by (2); Ithres
indicates the threshold current of the control system of the IBDG as detailed in [17], VPCC
indicates the positive-sequence voltage at the PCC of the IBDG, and Vlimit indicates the
voltage limit accepted for a normal condition.
The admittance matrix Ybus of the modified sequence network connection is performed
similarly to the Ybus formulation in a power flow algorithm. Newton-Raphson iteration
technique is employed to compute positive-sequence components of bus voltages. The
Jacobian matrix is computed based on the formulated Ybus. At IBDG bus, the diagonal
elements are adapted as follows. The Kirchhoff Current Law at Bus p can be expressed as
(7).
19
I p Y pqVq
(7)
q 1
Ip
Vp p
,sat
I inv
p
p
(8)
where p is the phase of the current source representing the IBDG; Vpp is the polar form
of the voltage at Bus p; Pp+jQp is the entering power estimated at Bus p (not including IBDG
power). Assuming that the phase of Iinv,sat lags Vp by an angle 0p, this relation can be
expressed as (9).
p p 0 p
(9)
Substituting (7) for Ip and (9) for p in (8), and separate the real and imaginary parts, the
estimated active and reactive power at Bus p are given by (10) and (11), respectively.
n
,sat
Pp V p Vq Ypq cos pq p q V p I inv
cos 0 p
p
q 1
(10)
,sat
Q p V p Vq Ypq sin pq p q V p I inv
sin 0 p
p
q 1
(11)
Obviously, the IBDG representation as a current source causes the diagonal elements of
submatrices J2 and J4 to be changed as shown in (12)-(13).
Diagonal elements of the submatrix J2:
Pp
Vp
2 V p Y p p c os
pp V Yq
q p
s
p qc o
p I i qn ,v s a pt
p q
c0 o s (12)p
2V p Ypp sin pp
Vq
q p
,sat
Ypq sin pq p q I inv
sin 0 p
p
(13)
After switching an IBDG to a current source, the algorithm restarts because the bus
admittance matrix needs updating with Cf and the Jacobian matrix needs changing in the
diagonal elements. The maximum number of restarting is equal to the number of IBDG in
the system. Direct results from the algorithm are positive-sequence voltages at all buses
including the faulted bus k.
The circuit comprising Z0kk, Z2kk, and Zf is firstly solved with the known V1k to obtain all
sequence components of the fault current I0k, I1k, and I2k at the fault bus k. From this stage,
calculation of negative and zero-sequence voltages at all buses is in a similar way to the
conventional fault calculation because the IBDG does not participate in these sequence
20
networks. Combining with the positive-sequence voltages that have been obtained from the
algorithm, bus sequence voltages are used to compute line sequence currents. Lastly, these
line sequence currents are superposed to generate line currents during fault.
V. Case Study
This section utilizes the proposed algorithm in Section III to test a simple system with an
IBDG. The accuracy of the result is validated by a simulation using Matlab/Simulink. The
simulation illustrates the fault ride through capability of the IBDG during fault.
5.1 Tested System
The simple system has one IBDG connected to Bus 4, which is a low voltage bus of a step
up transformer. The system is depicted by a single-line diagram in Figure 6. System
parameters are as follows.
Grid: V1 = 6 kV, Zsc,grid = 0 , Zline1= 0.72 + j2.7 , Zline2 = 0.5Zline1, Pload + jQload = 1 +
j0.5 MVA
Transformer: 0.80 MVA, 6kV/380V, Yn/D11, R = 0.002 p.u, X = 0.08 p.u (in transformer
rating).
IBDG: Snom=0.55 MVA, Pref = 0.5 MW, Qref = 0 MVAr, Ithres = 1.5 p.u., Iinv,sat = 1 p.u.,
(in IBDG rating), Cf = 900 F, Lf = 0.85 mH.
Pref+jQref
Iinv
2
(IBDG
Lf
=
4 380V/6kV
current)
IBDG
Cf
3
Line 1
6 kV
Line 2
1 Trans.
system
Pload+jQload
22
2000
1500
1,748 A
1,181.77 A
1000
500
0
-500
-1000
-1500
-2000
2.05
Current source
Phase A
2
Fault instant
-1,784 A
2.06
2.1
Time (s)
Phase B
2.2
2.15
Phase C
225 V
2.05
Fault instant
Phase A
2.1
Time (s)
Phase B
2.2
2.15
Phase C
1000
1,228.25 A
500
0
-500
-1000
-1500
2.05
Fault instant
Phase A
2.1
Time (s)
Phase B
2.2
2.15
Phase C
Power (MVA)
0.5
0.4
Reactive power
0.34 MVAr
0.3
0.2
0.1
Active power
0
-0.1
2
Fault instant
2.05
2.1
Time (s)
2.15
2.2
2.25
Figure 10. IBDG power output based on positive-sequence components during a DLGF
with Zf = 0.2
Table 1. Peak voltages and currents obtained from Simulink
Items
Pos.-seq. voltages
Phase A
Phase B
Pos.-seq. currents
Phase A
Phase B
Bus 2
2,638-3.880
4,266-3.880
1,672-131.60
IBDG current
1,777.6-64.240
1,777.6-64.240
1,777.6-64.240
Bus 3
Bus 4
0
1,414-9.4
18525.930
4,119.3-5.930
216.911.40
0
282.57108.1
125.19-91.50
Fault current
0
1,3081620
During the DLGF, the IBDG is switched to the current source mode with Iinv,sat = 835.64
A rms (or 1,181.77 A peak value) at the second iteration. The algorithm restarts and updates
Cf to the bus admittance matrix Ybus. The solution is reached after new 7 iterations. After the
algorithm converges, the phase of Iinv,sat automatically lags the positive-sequence voltage at
Bus 4 by 90 degrees. The power output during this fault case is no longer maintained at 0.5
MW. Currents at the faulted bus (Bus 3) are computed from the positive-sequence voltage at
Bus 3 in a similar way to the conventional fault calculation. Peak values of fault current IF
in Ampere are obtained by multiplying the corresponding per unit value by the base value of
96.2252 A.
The summary of results from fault calculation for the DLGF is in Table 2. Obviously, the
values of elements in Table 2 including fault currents, bus voltages, and currents contributed
from IBDG are in close proximity compared with the results in Table 1 that comes from the
simulation. For instance, the fault current at phase B at the faulted bus in Table 1 is
1,3081620 A peak. This value is a little lower than 1,310161.60 in Table 2.
4
2
Cf
Ztrans
Z2line2
line1
Ztrans
Cf
Z0line2
3
Zload
line1
3
Zload
Figure 11. Sequence networks of the simple system with the installation of an IBDG
Pref+jQref
|Iinv,ref | |Ithres|?
Iinv,sat
Cf
Ztrans
1:ej/6
Ye N
s
L
3
Zeq
Z1line1
2
Z1line2
Slack bus
Load bus
Zload
Figure 12. Modified sequence network connection for the test system
Table 2. Results from the program using the proposed algorithm
Voltages in peak value (V)
Bus 2
Bus 3
Bus 4
0
0
2,637.6-3.856
1,413.8-9.3965
184.858125.98940
4,264.3-3.70
4,117.9-5.90
216.616211.48310
1,673.7-131.40
282.6108.20
125.5671-91.4510
Currents in peak value (A)
Items
IBDG current
Fault current
Zero. component
0
471.0911108.18340
0
Pos. component
1,181.77-64.0106
844.2299-74.76220
Neg. component
0
2.75161.7735rad
Phase A
0
1,181.77-64.01060
0
Phase B
1,181.77-64.0106
1,310.3161.60
Items
Pos. voltage
Phase A
Phase B
25
VI. Conclusion
This paper has proposed an adaptive algorithm for fault calculation in system with IBDG.
The algorithm is then validated successfully by the comparison with the time-variant
simulation of a simple system. Results obtained from the proposed algorithm and those from
the simulation are close in proximity. The algorithm is convenient for calculating fault
currents with all fault types. The estimated fault currents can be used to set parameters of
protective devices and to check their protection capability.
VII. References
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
[15]
[16]
[17]
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