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One of the primary applications of reconfigurable hardware based on RIO TM Technology is the ability to create custom hardware
triggering conditions. Using the LabVIEW FPGA Module along with any RIO-enabled hardware, you can quickly and easily create
customized hardware. When building applications using these products, there are several considerations to keep in mind. This
document outlines the creation of a custom triggering application and discusses best practices for creating scalable, maintainable,
and robust FPGA code with LabVIEW. The example program Custom Triggering with the LabVIEW FPGA Module is included with
this application note.
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National Instruments is the driving force behind the concept of virtual instrumentation. Virtual instrumentation harnesses the power
of the PC and commercial-off-the-shelf hardware to create configurable, user-defined instrumentation systems based on intuitive,
graphical software. It gives engineers and scientists the capability to build measurement and automation systems that suit their
specific needs instead of being limited by traditional fixed-function, vendor-defined instruments. A simple example of this would be
using LabVIEW application software and a plug-in data acquisition device to create a custom system with similar functionality of a
traditional oscilloscope, DMM, and event counter all at once. With the LabVIEW FPGA Module and RIO-enabled hardware,
National Instruments has extended the concept of virtual instrumentation to provide engineers and scientists with the flexibility to
define the functionality of the data acquisition device itself. Scientists and engineers can now use LabVIEW graphical
programming to create user-defined custom hardware, providing cost and flexibility benefits over the vendor-defined hardware
typically used in a virtual instrumentation system.
An FPGA (field-programmable gate array) is a semiconductor which contains a large number of disconnected logic gates.
Programming an FPGA often requires low-level EDA software that defines logic functions by connecting the gates, thus creating a
customized processor and in turn customized hardware. The LabVIEW FPGA Module allows engineers and scientists to easily
create custom hardware graphically, without needing to learn low-level EDA tools. Furthermore, because an FPGA does not have
a fixed hardware structure, the connections can be reprogrammed. Every time you compile your LabVIEW code to the FPGA
target you create a new custom hardware, thus allowing for reconfigurable input and output (RIO) enabled hardware.
National Instruments offers a family of RIO enabled hardware targets, including PCI and PXI data acquisition devices, the
Compact Vision System, and CompactRIO. CompactRIO delivers the power and flexibility of RIO in a highly rugged enclosure.
This paper will discuss how to create a custom triggering application using CompactRIO, the LabVIEW FPGA Module, and the
LabVIEW Real-Time Module. Triggering is a common function of most plug-in data acquisition devices and is often used to start
and stop acquisitions. In this application, we will define the triggering logic on the RIO target ourselves and then integrate our
custom hardware with a host LabVIEW application. It is important to understand that creating custom RIO applications is a two-fold
process. The first step is to configure the RIO hardware using the LabVIEW FPGA Module. The next step is to create a driver API
for your hardware using LabVIEW for Windows or the LabVIEW Real-Time Module. Once a high-level API is created, a
programmer will have readable and usable code available to program a virtual instrument.
See Also:
Custom Triggering with FPGA - Example Programs
2. Defining the Customer Hardware with the LabVIEW FPGA Module
Typically, FPGAs are configured using low-level software development tools such as VHDL or Verilog. The LabVIEW FPGA
Module presents a high-level, graphical model for synthesizing FPGAs. Since the LabVIEW FPGA Module is an extension of
LabVIEW for Windows, you get the benefits of rapid development that is provided by an intuitive programming tool that is similar to
flowcharting. The palette shown when targeting a RIO device from LabVIEW is a subset of the LabVIEW for Windows functions
palette. This set of functions consists of only those functions that you can use to be synthesized in the fixed-point structure of an
FPGA.
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LV Palette
FPGA Palette
Figure 1. LabVIEW Function Palettes
Although all RIO enabled hardware supports custom triggering, we will discuss this specific application developed for
CompactRIO. We will create three triggers to trigger on an analog edge, digital edge, or analog window . We define these triggers
by directly monitoring the acquired analog and digital signals on the channels of our CompactRIO digital and analog modules.
These channels are accessed using the I/O functions found on the FPGA I/O palette shown in Figure 2.
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The Rising edge case is similar but is looking for a rising analog edge instead of a falling analog edge.
The second component of any LabVIEW FPGA application is to create an Application Programming Interface (API) for the FPGA
VI. In the LabVIEW Real-Time Module (or LabVIEW for Windows), there is a small set of functions that you use to access the
FPGA: Open FPGA Reference, Read/Write Control, Invoke Method, and Close FPGA Reference. These functions provide all of
the necessary control over the FPGA, such downloading, reading or writing data, and starting or stopping hardware execution.
Integrating an FPGA VI into an application using these functions alone, however, can make your application hard to read, hard to
scale, and hard to maintain. Using these low-level functions as building blocks, however, you can create a set of subVIs which can
function as an easier-to-use high-level API for use on your host.
There are several benefits to creating an API for your LabVIEW FPGA code. One major benefit that an API provides is abstraction,
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There are several benefits to creating an API for your LabVIEW FPGA code. One major benefit that an API provides is abstraction,
which involves grouping low-level code into logical functions or data stores. For example, one of the first things to do in an
application is initialize your software and hardware. The process of initialization may be several steps of low-level code, but can be
easily grouped into one subVI:
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Open FPGA Reference and the Invoke Method functions to obtain a reference to the VI and to ensure that the FPGA VI is
downloaded to the target. The Triggering VI (FPGATrig_PolymorphicTrigger VI) is a polymorphic VI which calls one of the three
individual triggering cases depending on the type of triggering desired (FPGATrig_DigitalTrigger VI,
FPGATrig_AnalogEdgeTrigger VI, and FPGATrig_AnalogWindowTrigger VI). Each of these triggering VIs on the host configures
the triggering application on the FPGA, by reading and writing to the FPGA registers using the Read/Write Control function as
shown in Figure 8. The remaining two triggering methods are identical to Figure 8, only the control values are different for each
triggering type.
The LabVIEW FPGA Module and CompactRIO hardware can be used to easily create custom hardware. This user-defined
hardware gives the developer full control to customize hardware necessary for their application. Once the custom hardware has
been created, it can be integrated with a LabVIEW Real-Time or LabVIEW for Windows application. For maximum maintainability,
readability, and scalability, creating custom hardware with LabVIEW FPGA should always be a two-part process. First, create the
code to define FPGA hardware, and second, create an Application Programming Interface to access the RIO device.
Related Links:
Custom Triggering with FPGA - Example Programs
LabVIEW FPGA Module - Products and Services
Reconfigurable I/O - Products and Services
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