1

An Average Model of Solid State Transformer

for Dynamic System Simulation
Tiefu Zhao, Student Member, IEEE, Jie Zeng, Subhashish Bhattacharya, Member, IEEE,
Mesut E. Baran, Member, IEEE, Alex Q. Huang, Fellow, IEEE

AbstractThe Solid State Transformer (SST) is one of the key

elements proposed in the National Science Foundation (NSF)
Generation-III Engineering Research Center (ERC) Future
Renewable Electric Energy Delivery and Management
(FREEDM) Systems Center established in 2008. The SST is used
to enable active management of distributed renewable energy
resources, energy storage devices and loads. In this paper, a
20kVA solid state transformer based on 6.5kV IGBT is proposed
for interface with 12kV distribution system voltage. The average
model and control scheme of SST including AC/DC rectifier,
Dual Active Bridge (DAB) converter and DC/AC inverter are
developed to enable dynamic system level simulation. The
developed average model is verified by comparing with the
detailed switching model simulation. The dynamic system level
SST simulation verifies the proposed controller and the
corresponding average model illustrates the functionalities and
advantages of the SST in FREEDM system.
Index Terms--Solid
FREEDM systems

state

transformer,

average

the system from faults on the user side. An Intelligent Fault

Management (IFM) subsystem will be used to isolate potential
faults in the 12 kV primary distribution grid. The IEMs and
IFMs will communicate with each other by a Reliable and
Secured Communication (RSC) network. The brain of the
FREEDM system will be provided by the Distributed Grid
Intelligence (DGI) software embedded in each IEM and IFM.
Most energy storage requirements are provided by DESDs
(which can be Plug-in Hybrid Vehicles - PHEVs), but an
additional energy storage device may be considered necessary
to satisfy the global need. The FREEDM system will be
connected to the traditional grid through a higher power IEM.
Industry users requiring 480V three-phase power will be
connected to the FREEDM system through a medium power
IEM.
Legacy grid

model,

I. INTRODUCTION

HE Future Renewable Electric Energy Delivery and

Management (FREEDM) Systems proposes a smart-grid
paradigm shift to prepare the U.S. to take advantage of
advances in renewable energy for a secure and sustainable
future. In the electric configuration of the FREEDM system
shown in Fig.1, low voltage (120V), residential class
Distributed Renewable Energy Resource (DRER), Distributed
Energy Storage Device (DESD), and loads are connected to
the distribution bus (12kV) through a revolutionary, highly
efficient power electronics based Intelligent Energy
Management (IEM) subsystem. Each IEM consists of a Solid
State Transformer (SST) and its intelligent controller. The
IEM will have bi-directional energy flow control capability
allowing it to provide key plug-and-play features and isolate

This work was supported by ERC Program of the National Science

Foundation under Award Number EEC-08212121.
Tiefu Zhao, Subhashish Bhattacharya, Mesut E. Baran and Alex Q. Huang
are with the Future Renewable Electric Energy Delivery and Management
(FREEDM) Systems Center, North Carolina State University, Raleigh, NC
27695, USA. (email: tzhao@ncsu.edu, sbhatta4@ncsu.edu, baran@ncsu.edu,
aqhuang@ncsu.edu).
Jie Zeng is a visiting student in FREEDM Systems Center, North Carolina
State University, Raleigh, NC 27695, USA. He is sponsored by the Ministry of
Education, China under Key Project 107128 and Chinese scholarship council.
He is with Hubei Electric Power Security and High Efficiency Lab, College of
Electrical & Electronic Engineering, Huazhong University of Science and
Technology, Wuhan, Hubei, 430074, China. (e-mail: jzeng@smail.hust.edu.cn).

978-1-4244-4241-6/09/$25.00 2009 IEEE

Fig.1. FREEDM Systems Diagram (IEM: Intelligent Energy Management, IFM:

Intelligent Fault Management, DRER: Distributed Renewable Energy Resource,
DESD: Distributed Energy Storage Device)

The solid state transformer in the IEM is used to enable

active management of DRER, DESD and loads, rather than a
60 Hz traditional transformer. The four-quadrant power flow
control provided by the SST allows the plug-and-play of
distributed generation and also allows for the addition of
storages and loads to the grid with no adverse effects on
nearby users. The SST will provide power quality
improvement to residential users and industry customers. The
FREEDM system understands the value of different types of
energy and maximizes green energy utilization, which
improves the energy efficiency of the total system.
The idea of the solid-state transformer has been

discussed since 1970 [1]. However, the earlier research on

solid state transformers is limited by the high voltage power
device technologies of the time. Therefore, none of the SST
designs finally comes into practice; especially very little
progress was made on the distribution level (above 10kV)
transformer.
With advanced wide-band gap semiconductor device such
as 15kV SiC IGBT, a much higher frequency (10 kHz instead
of 60Hz) can be used to reduce the transformer size and
weight, making the SST a valid option to replace the
conventional transformers at the distribution voltage levels [27]. Moreover, with the increased cost in basic materials such
as copper and laminated steel, the SST, which uses much less
copper, is potentially attractive. This is even more important
to the higher power SST because todays 2.7 MVA
transformer weighs more than six tons and uses a large
amount of copper and steel. Our study indicates that a 3X size
and weight reduction is possible with 10kHz high voltage SiC
power devices. The FREEDM system center will use
revolutionary post-silicon (HV SiC) power devices, 15kV SiC
IGBT and 15kV SiC DMOSFET, to construct a compact,
highly efficient, and robust SST to demonstrate the FREEDM
system.
For a complex power electronic system simulation as SST,
the switching model requires very short time steps and results
in a long simulation time. Therefore, the average model of
SST is indispensable for the dynamic system level simulation,
because it allows much faster simulation and reduces memory
requirement when compared to the detailed switching models.
Furthermore, the large signal average model is the basis of
developing the small signal model and designing the
controller parameters.
In this paper, a 20 kVA SST is proposed by using
commercially available 6.5 kV silicon IGBT and silicon diode
to reach required voltage levels. The average model of the
SST, including AC/DC rectifier, Dual Active Bridge (DAB)
and the DC/AC inverter stage are developed, with the aim to
enable dynamic system level simulation studies of the
FREEDM distribution system. The developed average model
is verified by comparing the simulations with the detailed
switching model. The dynamic system level SST average
model simulation is also performed to verify the control
scheme and demonstrate the functionality of the SST.

II. SST AVERAGE MODELING AND CONTROL

The SST converts the voltage from AC to AC for step-up
or step-down with the function same as the conventional
transformer. However, the traditional 60 Hz transformer is
replaced by a high frequency transformer to provide isolation
and step up/down function plus the power electronics
converters, which is the key to achieve size and weight
reduction and the power qualify improvement.
The solid state transformer consists of three stages, an
AC/DC rectifier, a dual active bridge converter with a high
frequency transformer and a DC/AC inverter. The average
model is implemented by replacing switching variables by

continuous values averaged over a switching cycle. The

average model is developed for each stage individually and
then cascaded together for overall converter control.
The basic configuration of a proposed 20 kVA SST
interfaced to 12 kV distribution voltage with center-tapped
120V single-phase output is shown in Fig.2. The SST is rated
as single phase input voltage 7.2kV, 60 Hz, output voltage
240/120 V, 60 Hz, 1 phase/3 wires. The SST consists of a
cascaded high voltage high frequency AC/DC rectifier that
converts 60Hz, 7.2 kV AC to three 3.8 kV DC buses, three
high voltage high frequency DC-DC converters that convert
3.8 kV to 400V DC bus and a voltage source inverter (VSI)
that inverts 400V DC to 60 Hz, 240/120 V, 1 phase/3 wires.
The switching devices in high voltage H-bridge and low
voltage H-bridges in Fig. 2 are 6.5kV silicon IGBT and 600V
silicon IGBT respectively. The switching frequency of the
high voltage silicon IGBT devices is 1 kHz, and the low
voltage IGBT in the VSI switches at 10 kHz. The 20 kVA
SST unit is envisioned as a building block of IEM and also for
construction a larger rated SST.

Fig. 2 Topology of Solid State Transformer

A. Modeling of rectifier stage

The AC/DC rectifier converts the single phase 7.8kV AC
voltage to three DC output while maintaining unity power
factor at the input side. The rectifier consists of three
cascaded H-bridges with each reference 3.8kV DC bus
voltage. The differential equations of the rectifier are:

V pcca Rs
dia 3E
=
da
ia
dt
Ls
Ls
Ls
dE
E
di
=
aa
dt
RL C
C

(1)
(2)

Where, ia is the input side current, V pcca is the input voltage,

Rs is the input line resistance, Ls is the input inductor, E is

the DC bus voltage, C is the rectifier DC capacitor, d a is
the rectifier PWM duty cycle. Based on the circuit equations,
the average model equivalent circuit is derived in Fig.3.

dE
E
1 d d
=

dt
RL C 2C d q

Fig. 3 Average model of rectifier

The single phase d-q vector control is used in the rectifier

control. First an imaginary phase which is 90 degree lagging
the original phase A is hypothesized. The differential
equations for the imaginary phase are:

V pccm Rs
dim 3E
=
im
dm
dt
Ls
Ls
Ls
dEm
E
d i
= m mm
dt
RL C
C

id

iq

(9)

With the chosen PLL, the voltage vector is aligned with the
direction of the d-axis during steady state. The grid voltage
component in the d-direction is equal to its RMS-value and
the q-component of the grid voltage is equal to zero. Thus, the
d-component of the current vector (in steady state parallel to
the grid voltage vector) becomes the active current component
(d-current) and the q-component of the current vector
becomes the reactive current component (q-current) [9].The
decoupled d-q vector controller for each H-bridge is shown in
Fig.4.

(3)
(4)

Where, im is the input current of the imaginary phase,

V pccm is the input voltage of the imaginary phase, Em is the

DC bus voltage of the imaginary phase, d m is the rectifier
PWM duty cycle of the imaginary phase. Then combine the
equations for two phases, and rewrite the equations:
r
r
V pccam Rs r
diam 3E r
(5)
=
d am
iam

dt

Ls

Ls

Fig. 4 d-q decoupled controller of rectifier

B. Modeling of Dual Active Bridge (DAB)

Ls

dE
E
d i
=
am am
2C
dt
RL C

(6)

Where,
r
V pcca
i r
d r
iam = a , d am = a , V pccam =

im
d m
V pccm

The single phase d-q transformation is applied to the

equations (5) and (6) [8], and the differential equations in d-q
coordinates are derived.

[ x ]dq = [T ] [ x ]am

Where,

( )
cos ( )
sin

T =

(7)

cos ( )
, = 2 f L ,
sin ( )

f L is line

frequency.
Then the d-q axis equation of the single phase H-bridge
rectifier is given in equation (8) and (9).

d id 3E d d 1
=

dt iq Ls d q Ls

Rs
L
v pccd
s

v pccq

Rs
Ls

i
d

iq

(8)

Fig. 5 Dual active bridge

The dual active bridge consists of a high voltage H-Bridge,

a high frequency transformer and a low voltage H-bridge. The
rectifier controls the high voltage side DC link voltage and the
input AC current to be sinusoidal. The low voltage DC link is
regulated by the DAB converter.
The dual active bridge topology offers zero voltage
switching for all the switches, relatively low voltage stress for
the switches, low passive component ratings and complete
symmetry of configuration that allows seamless control for
bidirectional power flow. Real power flows from the bridge
with leading phase angle to the bridge with lagging phase
angle, the amount of power transferred being controlled by
the phase angle difference and the magnitudes of the dc
voltages at the two ends as given by equation (10) [10].

Po =

VdcVdc _ link
2 Lf H

d dc (1 d dc )

(10)

where, Vdc is input side high voltage DC voltage, f H is

switching frequency, L is leakage inductance, Vdc _ link is
output side low voltage DC link voltage referred to input side
and d dc is ratio of time delay between the two bridges to onehalf of switching period.
From the power flow equation, and using graphical
techniques on the inductor waveform over half a switching
period it can be shown that the average transformer current
over half a cycle is given by (11).

I d ( avg ) =

VdcTs
d dc (1 d dc )
2L

Fig. 9 Topology of DC/AC inverter

(11)

The average model of DAB is shown in Fig.6. For the DAB

converter, the phase shift control is used to regulate the low
voltage DC voltage to the reference 400V under different load
conditions. First the difference between the low voltage DC
voltage Vdc and the reference voltage is compared. Then the
phase shift angle is adjusted by the PI controller to regulate
Vdc according to this voltage error.

LSi
Cs

Dinv1E
E CL Dinv1ip Dinv2in

Is

RL1

Vn
Cs

Dinv2E

I d ( avg )

Vp

RL2

LSi
Fig. 10 Average model of DC/AC inverter

Vdc _ ref

Vdc

Ip

K
K p1 + i1
s

d dc

Vp

V p _ ref

K
K pv + iv
s

K pi +

K ii
s

Dinv1

Fig. 6 Average model and phase shift controller of DAB

C. Modeling of Inverter stage

The DC/AC inverter converts the 400V DC to 240/120V
AC, 1 phase/3 wires. The topology is shown in Fig.9 and the
average model of DC/AC inverter is shown in Fig.10. The
inverter consists of six switches with three phase legs. The
neutral point is connected to the third phase leg. The other
two phase legs in the four-switch inverter are controlled by
Sinusoidal Pulse Width Modulation (SPWM). (The average
model is not dependent on the modulation method.) The two
sinusoidal control references have a 180 phase difference and
the same amplitude. The third phase leg in the six-switch
inverter usually is controlled to produce a square waveform to
serve as the neutral phase and at same time achieve the
maximum utilization of the DC bus voltage.
In the inverter stage, the DC link voltage is regulated by the
DAB converter while the PWM AC inverter controls the
magnitude of the output side AC voltage. The inverter
controller has an inner current loop and an outer voltage loop.
The controller diagram is shown in Fig.11, and both voltage
and current regulators are PI regulators. The dinv1 and dinv 2
are the duty cycles of two output port voltages in the average
model shown in Fig. 10.

Vn

In

K
K pv + iv
s
Voltage regulator

K pi +

K ii Dinv 2
s

Current regulator

Fig. 11 Controller for DC/AC inverter

III. AVERAGE MODEL VERIFICATION

The developed SST average model is verified by comparing
the simulation results with the detailed switching model. In
the SST switching model, the IGBT devices are represented
by the switch model in Matlab/Simulink. The control scheme
and the controller parameters are identical with the average
model. The modulation scheme used for switching model is
SPWM. The three 1kHz SPWM carriers for the cascaded Hbridge are phase shifted so that the rectifier has seven voltage
levels to reduce the voltage stress and harmonics.
The comparisons of the average model with the switching
model are shown in Fig. 12, the voltages and currents on the
AC side of the seven-level rectifier are well matched. This
validates the developed average model to be used for dynamic

system level simulation study of the FREEDM system.

4

1.5

x 10

Switching model
Average model

0.5
Voltage(V)

Fig. 13 SST Simulation System

0

-0.5

-1

-1.5
0.96

0.965

0.97

0.975

0.98
Time(s)

0.985

0.99

0.995

Switching model
Average model

Current(A)

2
1
0
-1
-2
-3
-4
0.96

0.965

0.97

0.975

0.98
Time(s)

0.985

0.99

0.995

A. Load change
In this case, the step change load and unbalanced load
conditions are taken into account. Fig.14 shows SST input and
output power under load change. The active load power of
port 1 is changed from 6kW to 9kW at 1.0s, and is changed
back from 9kW to 6kW at 1.2s. The reactive load power of
port 1 is changed from 0kVar to 5kVar at 1.0s, and then
changed back from 5kVar to 0kVar at 1.2s. The power
transferred at port 2 remains 6kW under both these load
change conditions. It can be seen from the simulation that
only active power is being transferred by SST, while there is
no input reactive power.
Fig.15 shows the DC voltage under load change. From the
simulation it can be seen that the high DC bus voltage can be
regulated at 3800V and the low DC bus voltage can be
regulated at 400V under different load conditions.
Fig. 16 shows the voltage and current of SST. The input
current is in phase with the source voltage, which results in a
unity power factor. The RMS output voltage remains 120V
under different load conditions.

Fig. 12. Input AC voltage and current from switching model and average model.

<Input Power>

20000

IV. AVERAGE MODEL SIMULATION

In order to verify the SST controller and the developed
average model to ensure that the SST achieves active power
management, simulations in Matlab/Simulink are carried out
under conditions of load change, regeneration (with DRER or
DESD connected at the SST output), and input voltage sag.
The SST parameters are shown in Table.I.

Power /VA

15000
10000
5000
0
-5000
0.9

Active Power /VA

Reactive Power /VA
0.95

1.05

1.1

1.15

1.2

1.25

1.3

1.15

1.2

1.25

1.3

1.15

1.2

1.25

1.3

<Port 1 Power>
10000

1Ohm
0.4H
30uF
3.8kV
2mF
400V
64mH
1kHz

6000
4000
2000
0
-2000
0.9

Active Power /VA

Reactive Power /VA
0.95

1.05

1.1

<Port 2 Power>
10000
8000
Power /VA

Line resistance Rs
Line inductance Ls
High voltage DC Capacitor
High voltage DC reference
Low voltage DC Capacitor
Low voltage DC reference
Transformer leakage
inductance
DAB Switching frequency

Power /VA

8000

TABLE. I. SIMULATION PARAMETERS

6000
4000
2000
0
-2000
0.9

Active Power /VA

Reactive Power /VA
0.95

1.05

1.1
time/s

Fig.14 SST input and output power under load change

6
<High DC Voltage>
3900

1.5

3750
3700
0.9

x 10

<Input Power>
Active Power /VA
Reactive Power /VA

3800

Power /VA

Voltage /V

3850

0.95

1.05

1.1

1.15

1.2

1.25

1.3

0.5
0
-0.5
-1
1.9

<Low DC Voltage>
400.5

2.1

2.2

2.3

2.4

2.5

Active Power /VA

Reactive Power /VA

400

399.5
0.9

0.95

1.05

1.1
time/s

1.15

1.2

1.25

1.3

Power /VA

Voltage /V

<Port 1 Power>
10000

5000

Fig. 15 DC voltage response under load change

-5000
1.9

2.1

2.2

2.3

2.4

2.5

Input Voltage and Current

<Port 2 Power>

Voltage/1000V
Current/A

10

10000
Active Power /VA
Reactive Power /VA

5
0

Power /VA

Voltage/1000V, Current/A

15

-5
-10
-15
0.9

0.95

1.05

1.1

1.15

1.2

1.25

5000

1.3
-5000
1.9

2.1

Port 1 Voltage and Current

100

2.2
time/s

2.3

2.4

2.5

Fig.17 SST the response under regenerative

Voltage/V
Current/A

<High DC Voltage>
4100
4000

Voltage /V

Voltage/V, Current/A

200

-100

-200
0.9

0.95

1.05

1.1

1.15

1.2

1.25

3900
3800
3700
3600

1.3

3500
1.9

2.1

2.2

2.3

2.4

2.5

2.3

2.4

2.5

Port 2 Voltage and Current

<Low DC Voltage>

Voltage/V
Current/A

100

400.5

Voltage /V

Voltage/V, Current/A

200

-100

-200
0.9

0.95

1.05

1.1
time/s

1.15

1.2

1.25

1.3

Fig. 16 Voltage and current under load change

B. Regenerative mode
In regenerative mode simulation, a distributed energy
source (like DRER or DESD as shown in Fig.1) is connected
to SST, so the SST is sending power back to grid.
Fig. 17 and Fig. 18 show the response under regenerative
mode. As shown in Fig. 17, 10kW active power is injected to
both SST output ports at 2.0s and switched off at 2.2s. Thus,
load power of both output ports are changed from 6kW to 4kW at 2.0s, then changed back from -4kW to 6kW at 2.2s. It
can be seen from Fig.18 that DC Voltage can be regulated at
reference voltage in the regenerative mode and the
regenerative power is sent back to grid.

400

399.5
1.9

2.1

2.2
time/s

Fig.18 DC voltage response under regenerative mode

C. Voltage sag
Fig.19 and Fig. 20 demonstrate the SST response under
input AC voltage sag. In this simulation, as shown in Fig. 19,
the magnitude of input voltage changes from 100% to 80% at
3.0s, and then changes back from 80% to 100% at 3.2s.
During the voltage sag, the high voltage DC bus varies a little
around 3.8kV, but the low voltage DC bus can be stabilized at
400V, the output voltage is not affected by the input voltage
sag, and the input current still maintains a unity power factor.

7
Input Voltage and Current
Voltage/1000V, Current/A

15
Voltage/1000V
Current/A

10
5
0
-5
-10
-15
2.9

2.95

3.05

3.1

3.15

3.2

3.25

3.3

Port 1 Voltage and Current

Voltage/V, Current/A

200
Voltage/V
Current/A

100

-100

-200
2.9

2.95

3.05

3.1

3.15

3.2

3.25

3.3

Port 2 Voltage and Current

Voltage/V, Current/A

Voltage/V
Current/A

100

-100

-200
2.9

2.95

3.05

3.1
time/s

3.15

3.2

3.25

3.3

Fig.19 SST response under input AC voltage sag

<High DC Voltage>
4100

Voltage /V

4000
3900
3800
3700
3600
3500
2.9

2.95

3.05

3.1

3.15

3.2

3.25

3.3

3.2

3.25

3.3

<Low DC Voltage>
400.5

400

399.5
2.9

2.95

3.05

3.1
time/s

3.15

VI. REFERENCES
[1]

200

Voltage /V

DESD and loads in the Future Renewable Electric Energy

Delivery and Management (FREEDM) Systems. The average
model of SST, including AC/DC rectifier, dual active bridge
and DC/AC inverter are developed, for dynamic control and
system studies for the FREEDM system. The comparisons
between the average model and the detailed switching model
verify the developed average model to be used for dynamic
system level simulation study of the FREEDM system. Based
on the proposed average model and the control strategy, the
dynamic system level SST simulation under the conditions of
load change, regenerative mode, and voltage sag are analyzed.
The simulation results verify the control scheme and
demonstrate the functionalities and advantages the SST.

Fig.20 DC voltage response under input AC voltage sag

The above system simulation results illustrate that the SST

is not susceptible to both source and load side disturbances.
The voltage sag ride-through characteristic decouples the load
from input AC voltage sags and greatly enhances the load side
power quality.
V. CONCLUSIONS
SST has the advantages of smaller size, unity power factor,
voltage sag ride through capability, and current limiting
function. In this paper, a 20kW 6.5 kV IGBT based SST is
proposed to enable active power management of DRER,

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VII. BIOGRAPHIES
Tiefu Zhao(S06) received his B.S. and M.S. degrees in Electrical Engineering
from Tsinghua University, Beijing, China in 2003 and 2005, respectively. He is
currently working toward the Ph.D. degree in Electrical Engineering at North
Carolina State University. From 2006 to 2008, he has been a Research Assistant
at the Semiconductor Power Electronics Center (SPEC), North Carolina State
University. He is now a Research Assistant at NSF FREEDM Systems Center,
North Carolina State University. His research interests include solid state
transformer, FACTS and SiC power devices.
Jie Zeng received his B.S., M.S. degrees in Electrical Engineering from
Huazhong University of Science and Technology, Wuhan, Hubei, China in 2001
and 2004, respectively. He is currently working toward the Ph.D. degree in

8
Electrical Engineering at Huazhong University of Science and Technology.
Since 2008, he has been a Visiting Student at the Semiconductor Power
Electronics Center (SPEC), North Carolina State University. His research
interests include solid state transformer and power system analysis.
Subhashish Bhattacharya (M85) received his B.E. (Hons), M.E. and PhD
degrees in Electrical Engineering from University of Roorkee (IIT-Roorkee),
India in 1986, Indian Institute of Science (IISc), Bangalore, India in 1988, and
University of Wisconsin-Madison in Aug. 2003, respectively. He worked with
Siemens Power Transmission & Distribution from Dec. 1998 to August 2005, in
the FACTS and Power Quality Division. Since August 2005, he joined the
Department of Electrical and Computer Engineering at North Carolina State
University as an Assistant Professor, where he is also a faculty member of the
Semiconductor Power Electronics Center (SPEC), NSF FREEDM systems ERC
and ATEC (Advanced Transportation Energy Center). His research interests are
FACTS, Utility applications of power electronics such as custom power and
power quality issues; active filters, high power converters, and converter control
techniques.
Mesut E. Baran (S87M88) received the Ph.D. degree from the University of
California, Berkeley, in 1988. He is currently an Associate Professor with North
Carolina State University, Raleigh. His research interests include distribution
and transmission system analysis and control.

Alex Q. Huang (F06) received his B.Sc. degree from Zheijiang University,
China in 1983 and his M.Sc. degree from Chengdu Institute of Radio
Engineering, China in 1986, both in electrical engineering. He received his
Ph.D. from Cambridge University, UK in 1992. From 1994 to 2004, he was a
professor at Center for Power Electronics System at Virginia Tech. Since 2004,
he has been a professor of electrical engineering at North Carolina State
University and director of NCSUs Semiconductor Power Electronics Center
(SPEC). He is now the Progress Energy Distinguished Professor and the
director of the new NSF FREEDM Systems Center. Dr. Huangs research areas
are power management, emerging applications of power electronics and power
semiconductor devices.