Ec-Ii Lab Manual (2013-2014) - 1

Dr.
NNCE
ECE / IV SEM
EC II & S LAB - LM
EC 2257- ELECTRONIC CIRCUITS II AND SIMULATION LAB

LABORATORY MANUAL
FOR FOURTH SEMESTER B.E (ECE)
(PRIVATE CIRCULATION ONLY)
ACADEMIC YEAR 2013-2014
ANNA UNIVERSITY,CHENNAI-600025
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DR.NAVALAR NEDUNCHEZHIYAN COLLEGE OF ENGINEERING,
THOLUDUR 606 303, CUDDALORE DIST.
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
UNIVERSITY PRACTICAL EXAMINATION

Allotment of Marks
Internal assessment
Practical examination =
Total
20
marks
80
marks
--------------------100
=
marks
--------------------=
INTERNAL ASSESSMENT (20 MARKS)

Staff should maintain the assessment register and the Head of the Department should
monitor it.
Split up of internal marks
10
Record
=
marks
Model exam
=
5 marks
Attendance
=
5 marks
--------------------20
Total
=
marks
---------------------
UNIVERSITY EXAMINATION
The exam will be conducted for 100 marks. Then the marks will be calculated to 80
marks
Split up of practical examination marks
Aim and Procedure
Program
Execution
Result
Viva voce
25
marks
30
marks
30
marks
05
marks
10
marks
Total
--------------------100
=
marks
--------------------
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
GENERAL INSTRUCTIONS FOR LABORATORY CLASSES

o Enter the Lab with CLOSED FOOTWEAR.
o Boys should TUCK IN the shirts.
o Students should wear uniform only.
o LONG HAIR should be protected, let it not be loose especially near ROTATING
MACHINERY.
o Any other machines / equipments should not be operated other than the
prescribed one for that day.
o POWER SUPPLY to your test table should be obtained only through the LAB
TECHNICIAN.
o Do not LEAN and do not be CLOSE to the rotating components.
o TOOLS, APPARATUS and GUAGE sets are to be returned before leaving the
lab.
o HEADINGS and DETAILS should be neatly written
1. Aim of the experiment
2. Apparatus / Tools / Instruments required
3. Procedure / Theory / Algorithm / Program
4. Model Calculations
5. Neat Diagram / Flow charts
6. Specifications / Designs Details
7. Tabulations
8. Graph
9. Result / discussions .
o Before doing the experiment, the student should get the Circuit / Program
approval by the FACULTY - IN - CHARGE.
o Experiment date should be written in the appropriate place.
o After completing the experiment, the answer to the viva-voce questions should be
neatly written in the workbook.
o Be PATIENT, STEADY, SYSTEMATIC AND REGULAR.
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
LIST OF EXPERIMENTS
DESIGN OF THE FOLLOWING CIRCUITS

1. Series and shunt feedback amplifiers:
Frequency response, input and output impedance calculation
2. RC phase shift oscillator, Wien bridge oscillator
3. Hartley oscillator, Colpitts oscillator
4. Tuned class C amplifier
5. Integrators, Differentiators, Clippers and Clampers
6. Astable, Monostable and Bistable multivibrators
SIMULATION USING PSPICE
1.
2.
3.
4.
5.
6.
Differential amplifier
Active filters : Butterworth 2 nd order LPF, HPF (Magnitude and Phase response)
Astable, Monostable and Bistable multivibrator - Transistor bias
D/A and A/D converters (Successive approximation)
Analog multiplier
CMOS inverter, NAND and NOR
Total: 45
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
CONTENTS
S.NO
LIST OF EXPERIMENTS
01
6
RC PHASE SHIFT OSCILLATOR
02
WEIN BRIDGE OSCILLATOR
12
03
COLPITTS OSCILLATOR
15
04
HARTLEY OSCILLATOR
18
05
ASTABLE MULTIVIBRATOR
21
06
MONOSTABLE MULTIVIBRATOR
24
07
BISTABLEMULTIVIBRATOR
08
27
CLASS C SINGLE TUNED AMPLIFIER
30
09
CURRENT SERIES FEEDBACK AMPLIFIER
33
10
VOLTAGE SERIES FEEDBACK AMPLIFIER
11
SECOND ORDER LOW PASS

BUTTERWORTH
FILTER
36
39
12
DIFFERENTIATOR SINE WAVE INPUT
42
13
DIFFERENTIATOR SQUARE WAVE INPUT
14
15
SYMMETRICAL
ASYMMETRICAL
45
48
51
16
54
17
BISTABLE MULTIVIBRATOR
18
57
CMOS INVERTER
19
60
CMOS NOR
20
63
CMOS NAND
21
66
DIGITAL TO ANALOG CONVERTER
BEYOND THE SYLLABUS

67
22
Inverting, Non-Inverting , Differential Amplifiers
23
Differential Amplifier Using BJT
24
Class B Complementary Symmetry Power

Amplifier
Cascade Amplifier
25
5
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
Exercise Number : 1
Title of the Exercise :
Date of the Exercise :
RC PHASE SHIFT OSCILLATOR
OBJECTIVE (AIM) OF THE EXPERIMENT

To design a RC phase shift oscillator and to observe its output waveform.
FACILITIES REQUIRED AND PROCEDURE
1) FACILITIES REQUIRED TO DO THE EXPERIMENT:
S.NO
1.
2.
APPARATUS
OPAMP
Resistors
3.
4.
5
6.
Capacitors
RPS
CRO
Connecting wires
SPECIFICATION
IC74
1.2K,
13K,377,12.5K
0.1F
12V
1MHz
-
QUANTITY
1
3,Each1
3
1
1
Req.
b)
DESIGN PROCEDURE:
Frequency of oscillator F=1//2RC.
Assume C and find R to prevent loading of the amplifier by RC networkR110R.
c)
THEORY:
The amplifier stage is self biased with a capacitor by passed source resistor (Rs)
and drain bias resistor (Rd). the expression for voltage gain of the amplifier is given by Av
=gm. rl. The feedback network consists of three identical RC sections. Each section
produces a phase shift of 60. Therefore the net phase shift of the feedback network is
180 degree. Since the amplifier stage also introduces a phase shift of 180, therefore total
phase shift is 360 or 0. For the variable frequency oscillators, the three capacitors are
ganged and varied simultaneously. When the circuit is energized by switching on the
supply, the circuit starts oscillating. The oscillations may start due to the minor variation
in dc supply or inherent noise.
4) PROCEDURE:
1
Hook up the circuit as shown in the circuit diagram.
2
Switch on the power supply.
3
Observe the output waveform in CRO.
Dr.NNCE
ECE / IV SEM
5) CIRCUIT DIAGRAM:
EC II & S LAB - LM
6) MODEL GRAPH:
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
7) TABULATION:
Amplitude(Volts)
Time(ms)
Frequency (KHz)
RESULT:
Thus the RC phase shift oscillator was designed and its output waveform was verified.
VIVA QUESTIONS:
1. What is amplifier?
Amplifier is a device which is used to amplification purpose.
2. What is amplification?
A low strength signal is converted into strengthen signal ie) boost up process
3. List the disadvantages of Rc phase shift Oscillator. (or)
What are the merits of Rc phase shift Oscillator.
1. It is ideal for frequency adjustment over a wide range.
2. It requires a high transistor to overcome losses in the network.
4. What is the difference between amplifier and oscillator/
Amplifier is working in the negative feedback while oscillator working in the positive
feedback.
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
Exercise Number : 2
WEIN BRIDGE OSCILLATOR

To design a wein bridge oscillator and to observe its output waveform.
S.NO
1.
2.
APPARATUS
OPAMP
Resistors
3.
4.
5
6.
Capacitors
RPS
CRO
Connecting wires
SPECIFICATION
IC741
1.5K,
1K,500,1.5K
0.1F
12V
1MHz
-
QUANTITY
1
Each1
1
1
1
Req.
2) THEORY:
Wein Bridge Oscillator uses a non inverting amplifier and hence does not produce any phase
shift during amplifier stage as total phase shift req. is 0. In wein bridge oscillator type no
phase shift is necessary through Feedback. Thus the total phase shift around a loop is 0.
3) DESIGN PROCEDURE:
Select approximate transistor and note down its specification such as
Vce,Vcc(max),hoe(min) and hfe(max) and Vbe(sat).
Vcc=VCEQ+ICQ(RC+RE)
Assuming appropriate stability factor and hence I2 flowing through the biasing resistor and
differentiator. Determine R1 and R2.
Using the condition for sustained oscillation R3>2R4, compute C for designed frequency for
the frequency of oscillator.
F=1/2RC
4) PROCEDURE:
1
2
3
9
Dr.NNCE
ECE / IV SEM
5) CIRCUIT DIAGRAM:
6) MODEL GRAPH:
EC II & S LAB - LM
10
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
7) TABULATION:
Amplitude(Volts)
Time(ms)
Frequency (KHz)
8) RESULT:
Thus the Wein bridge oscillator was designed and its output waveform was verified.
VIVA QUESTIONS:
1. What is an Oscillator?
An Oscillator is a Circuit, which generates an alternating voltage of any desired
frequency. It can generate an a.c output signal without requiring any externally applied input
signal.
2. What is a beat frequency oscillator?
Beat frequency Oscillator (BFO) is an Oscillator in which a deserved signal frequency
such as the beat frequency produced by combining the different signal frequencies such as on
different radio frequencies.
3. What is sustained Oscillation?
The electrical oscillations in which amplitude does not change with time are called as
sustained oscillations. It is also called as Undamped Oscillation.
4. What is meant by resonant Circuit Oscillators?
LC Oscillators are known as resonant circuit oscillator because the frequency
of operation of LC Oscillator is nothing but a resonant frequency of tank circuit or LC tank
circuit produces sustained Oscillation at the resonant circuit oscillator.
11
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
Exercise Number : 3
Title of the
Exercise
Date of the
Exercise
COLPITTS OSCILLATOR

To design a Colpitts oscillator and to observe its output waveform.
S.NO
1.
2.
APPARATUS
Transistor
Resistors
3.
4.
5.
6.
7.
Capacitors
Inductor
RPS
CRO
Connecting wires
SPECIFICATION
BC 107
11.64 K,
552.2,10.02K1.67k
53.5nF,80F, 100mF
0.78mH
12V
1MHz
-
QUANTITY
1
Each 1
2,1,1
1
1
1
Req.
Select a appropriate transistor and note down its specification such as VCE,IC(MAX), hfe(min) and
Vbe(sat).
1
VCC= VCEQ
2
R2=S* RE
3
VCC[R2/( R1+ R2)= VBE+VBE(SAT)
4
VR1+VR2=VCC
5
hfe C1* C2/( C1+ C1)
6
XCE RE/10
PROCEDURE:
1
2
3

Slight modification in value of C1 and C2 can be made to get perfect sine wave
output.
12
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
3) CIRCUIT DIAGRAM: COLPITTS OSCILLATOR
4) MODEL GRAPH:
13
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
5) TABULATION:
Amplitude(Volts)
Time(ms)
Frequency (KHz)
6) RESULT:
Thus the Colpitts oscillator was designed and its output waveform was verified.
VIVA QUESTIONS:
1. What is piezo electric effect?
The piezo electric Crystals exhibit a property that if a mechanical stress is
applied across one face the electric potential is developed across opposite face. The inverse is
also live. This phenomenon is called piezo electric effect.
2. List the disadvantages of crystal Oscillator.
It is suitable for only low power circuits
Large amplitude of vibrations may crack the crystal.
It large in frequency is only possible replacing the crystal with another one by
different frequency.
3. What are parasitic Oscillators?
In a practical amplifier circuit due to stray capacitances and lead inductances,
oscillations result, since the circuit conditions satisfy the Barkhavsens criterion. These
Oscillators are called as unwanted or parasitic Oscillations
4. What is damped Oscillation?
The electrical Oscillations in which the amplitude decreases with time are called as
damped Oscillation.
14
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
Exercise Number : 4
HARTLEY OSCILLATOR

To design a Hartley oscillator and to observe its output waveform.
S.NO
1.
2.
APPARATUS
Transistor
Resistors
3.
4.
5.
6.
7.
Capacitors
Inductor
RPS
CRO
Connecting wires
SPECIFICATION
BC 107
2.74 K,
1.76K,10.58K
0.1F, 0.1F
0.1mH,0.33mH
12V
1MHz
-
QUANTITY
1
1,2,1
Each 2
Each 1
1
1
Req.
Select a appropriate transistor and note down its specification such as VCE,IC(MAX), hfe(max) and
Vbe(sat).
1
VCC= VCEQ+ ICQ(RC+RE)
2
R2=S* RE
3
VCC[R2/( R1+ R2)= VBE+VBE(SAT)
4
VR1+VR2=VCC
3) PROCEDURE:
1
2
3

Slight modification in value of L1 and L2 can be made to get perfect sinewave
output.
15
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
4) CIRCUIT DIAGRAM: HARTLEY OSCILLATOR
5) MODEL GRAPH:
16
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
6) TABULATION:
Amplitude(Volts)
Time(ms)
Frequency (KHz)
7) RESULT:
Thus the Hartley oscillator was designed and its output waveform was verified.
VIVA QUESTIONS:
1. What are the types of sinusoidal oscillator? Mention the different types of
sinusoidal oscillator?
RC phase shift Oscillator.
Wein bridge Oscillator.
Hartley Oscillator Colpitts
Oscillator Crystal
Oscillator
2. What is Barkhausan criterion?
The conditions for oscillator to produce oscillation is given by Barkhausan
criterion. They are :
o
o
(i). The total phase shift produced by the circuit should be 360 or 0
(ii).The Magnitude of loop gain must be greater than or equal to 1
i.e. . A1 .
3. Name two high frequency Oscillators.
1. Hartley Oscillator
ii. Colpitts Oscillator
iii.Crystal Oscillator
4. What are the essential parts of an Oscillator?
1. Tank circuit (or) Oscillatory circuit.
2. Amplifier (Transistor amplifier)
3. Feedback Circuit.
17
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
Exercise Number : 5

To test astable multivibrator and to observe the two quasi-stable states.
S. NO.
1
2
3
4
5
6
COMPONENTS
Breadboard
Resistors
Capacitors
Transistor
CRO
RPS
RANGE
100k, 2k
0.01F
BC107
0-30MHz
0-30V
QUANTITY
1
2each
2
1
1
1
2) THEORY:
Astable multivibrator consists of two common emitter amplifying stages.When the d.
c. power supply is switched ON (t=0) one of the transistor will start conducting more than the
other due to some imbalance in circuit. Then because of the other due to some positive
feedback, the transistor Q1 will be driven into saturation and Q2 to cut off. Thus at t>0 Q1 is
ON and Q2 is OFF. During t>0, capacitor C1 is charging and VB2 increases. As it increases
above cut-in-voltage, Q2 starts conducting at t>t1. As the transistor Q2 goes into saturation,
VC falls to VCE(sat). Thus at t>t1, Q1 is OFF and Q2 is ON. During t>t1, VB1 rises
exponentially with time constant. At T=t2, VB1 reaches cutin level and a reverse transition
take place. It is used to generate square waveform.
PROCEDURE:
The components are connected as per the circuit diagram.
The DC supply is switched ON.
The output voltage and the time period is measured across transistors T1 and T2 at
both the base and the collector.
4. The output wave is plotted in the graph.
3)
1.
2.
3.
18
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
4) CIRCUIT DIAGRAM: ASTABLE MULTIVIBRATOR
5) MODEL GRAPH:
1
9
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
6) TABULATION:
Amplitude(Volts)
Time(ms)
Frequency (KHz)
7) RESULT:
Thus the Astable multivibrator was designed and its output waveform was
verified.
VIVA QUESTIONS:
1. What is a linear waveform-shaping circuit?
The process by which the shape of a nonsinusoidal signal is changed by passing
the signal through the network consisting of linear elements is called Linear Wave
Shaping.
2. What is meant by multivibrator?
Multivibrators are two stage switching circuits in which the output of the first
stage is fed to the input of the second state and vice-versa. The outputs of two stages are
complementary.
3. Define Astable multivibrator.
Astable multivibrator is a multivibrator in which neither state is stable. There are
two temporary states. The circuit changes state continuously from one quasi stables state
to another at regular intervals without any triggering. This generates continuous square
waveform without any external signal.
20
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
Exercise Number : 6

To test a monostable multivibrator and to observe the two quasi-stable states.
S. NO.
1
2
COMPONENTS
Breadboard
Resistors
3
4
5
6
7
Capacitors
Transistor
Diode
CRO
RPS
RANGE
3k, 1k, 280k, 22k,
1.75k
1nF
BC107
1N4007
0-30MHz
0-30V
QUANTITY
1
1 each
2
1
1
1
1
2) THEORY:
Monostble multivibrator is also called as one shot or univibrator and can be used to
generate a gating pulse, whose width can be controlled. The monostable multivibrator
provides a single pulse of desired duration in response to an external trigger. The external
trigger causes the circuit to go to the quasi stable state. After a certain interval of time, the
circuit returns to its original state. It consists of two NPN transistors. In this case, when a
pulse is applied to the input circuit, the circuit state is changed abruptly to unstable state for a
determined time after which the circuit returned to its original state automatically. The two
outputs are the complement of each other i.e when one of the output is at VCC level, the other
is at VCE(sat) level. The monostable multivibrators are used for the generation of well
defined pulses, the logic design of pulse delay, variable pulse width, etc. The width or
duration of the pulse obtained at the collector or output of either transistor of the monostable
multivibrator is given by the expression t=0.69 RC.
3) PROCEDURE:
1.
2.
3.
4.

The output is measured at the collector terminals of the two transistors.
The required output voltages and the total time period is noted.
The output wave is plotted in the graph.
21
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
4) CIRCUIT DIAGRAM: MONOSTABLE MULTIVIBRATOR
5) TRIGGER GENERATION:
22
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
6) TABULATION:
Amplitude(Volts)
Time(ms)
Frequency (KHz)
7) RESULT:
Thus the Monostable multivibrator was designed and its output waveform was
verified.
VIVA QUESTIONS:
1. Define monostable multivibrator.
When a trigger pulse is applied to the input circuit, the circuit state is changed
abruptly to unstable state for a predetermined time after which the circuit returned to its
original stable state automatically.
2. Define integrator.
Integrator is a circuit that passes low frequencies of the input and attenuates high
frequencies. Integrator implies that the output voltage is an integral of the input voltage.
3. What is the use of commutating capacitors?
The Commutating capacitors can be used to reduce the transition time in a low to
high level and vice versa.
4. Define transition time.
The time interval during which the conduction transfer from one transistor to another
transistor is defined as transition time.
23
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
Exercise Number : 7

To test a Bistable multivibrator and to observe the two quasi-stable states.
S. NO.
COMPONENTS
1
2
Breadboard
Resistors
3
4
5
6
7
Capacitors
Transistor
Diode
CRO
RPS
RANGE
3k, 1k, 280k, 22k,

1.75k
1nF
BC107
1N4007
0-30MHz
0-30V
QUANTITY
1
1 each
2
1
1
1
1
2) THEORY:
Bistble multivibrator is also called as one shot or univibrator and can be used to
generate a gating pulse, whose width can be controlled. The bistable multivibrator provides a
single pulse of desired duration in response to an external trigger. The external trigger causes
the circuit to go to the quasi stable state. After a certain interval of time, the circuit returns to
its original state. It consists of two NPN transistors. In this case, when a pulse is applied to
the input circuit, the circuit state is changed abruptly to unstable state for a determined time
after which the circuit returned to its original state automatically. The two outputs are the
complement of each other i.e when one of the output is at VCC level, the other is at VCE(sat)
level. The bistable multivibrators are used for the generation of well defined pulses, the logic
design of pulse delay, variable pulse width, etc. The width or duration of the pulse obtained at
the collector or output of either transistor of the bistable multivibrator is given by the
expression t=0.69 RC.
3)
1.
2.
3.
4.
PROCEDURE:
The output is measured at the collector terminals of the two transistors.
The required output voltages and the total time period is noted.
The output wave is plotted in the graph.
24
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
4) CIRCUIT DIAGRAM: BISTABLEMULTIVIBRATOR
5) MODEL GRAPH:
V
Vce(sat) Output Vc2
Vce(sat) Output Vc1
Vbe(sat)
Output Vb2
Vbe(sat)
Output Vb1
Time (s)
25
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
6) RESULT:
Thus the Bistable multivibrator was designed and its output waveform was verified.
VIVA QUESTIONS:
1. Define the Bistable multivibrator.
Bistable multivibrator signifies a circuit which can exist indefinitely in either of two
stable states and which can be induced to make an abrupt transition from one state to other by
applying an external triggering signal.
2. Define resolving time.
It is the minimum time interval between two consecutive trigger pulses and equals to
transition time plus the settling time.
3. What is meant by linear wave shaping circuit?
The action of a linear network in producing a waveform at its outputs different from
its output is known as linear wave shaping circuit.
4. What are different types of triggering of bistable multivibrator?
Asymmetrical triggering.
Symmetrical triggering.
26
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
Exercise Number : 8
CLASS C SINGLE TUNED AMPLIFIER

To design and find the frequency response of class c single tuned amplifier.
S. NO.
1
2
3
4
5
6
COMPONENTS
Breadboard
Resistors
Capacitors
Transistor
CRO
RPS
RANGE
1k,4.7k,10k
1nF,0.01mF,0.1 mF
BC107
0-30MHz
0-30V
QUANTITY
1
1 each
2
1
1
1
2) THEORY:
In class C amplifier, the output current flows only for one half of the cycle of the
input signal. The transistor dissipates no power with zero input signal. The average current
drawn by the circuit in class C is smaller than that in class A. Complementary symmetry
amplifier requireds neither an input nor an output transformer. This arrangement uses
transistors having complementary symmetry in the emitter follower configuration. The term
complementary means that it uses two identical transistors one NPN and the other PNP. The
term symmetry means that biasing resistors are equal. This amplifier circuit has a unity gain
because of the emitter follower configuration. Moreover there is no phase inversion of the
output signal. The split supply used in the circuit gives us an advantage that the dc component
of the output voltage can be made zero. Thus the only ac component of the power is available
across the load resistor.
3) PROCEDURE:
1. The components are connected as shown in the circuit diagram.
2. The input voltage is given using function generator.
3. The load resistance is varied using the decade resistance box and output voltage is
measured and readings are tabulated
27
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
4) CIRCUIT DIAGRAM: CLASS C SINGLE TUNED AMPLIFIER
5) MODEL GRAPH:
28
Dr.NNCE
ECE / IV SEM
6) TABULATION:
Sl.
Input
Input
No.
frequency
(Hz)
Voltage
(mV)
Outpu
t
Voltag
e
(V)
EC II & S LAB - LM
Voltage gain
20log
gain
:
7) RESU
LT:
Thus
the Class C
single tuned
amplifier was
designed and
its frequency
response was
observed
VIVA
QUESTIONS
y tuned amplifiers?
Tuned amplifiers are
1. Wamplifiers that are designed
hto reject a certain range of
a frequencies below a lower
cut off frequency L and
t above a upper cut off
i frequency H and allows
s only a narrow band of
frequencies.
m
2. Classify
tuned
e
amplifiers.
a
1
n
.
t
S
b
i
i
ngl
e
tun
ed
am
plif
ier.
2.D
oub
le
tun
ed
am
plif
ier.
3.S
ync
hro
nou
sly
tun
ed
am
plif
ier.
4.S
tag
ger 4.
tun
ed
am
plif
ier.
3. W
h
a
t
a
r
e
t
h
e
a
d
v
a
n
t
a
g
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
5
6
7
E
x
e
r
c
i
s
e
N
u
m
b
e
r
:
9
CURRENT SERIES
FEEDBACK AMPLIFIER

OBJECTIVE (AIM) OF THE
EXPERIMENT
To design and find the
frequency response of
current series feedback
amplifier.
FACILITIES REQUIRED AND
PROCEDURE
1) FACILITIES REQUIRED
TO
DO
EXPERIMENT:
THE
S. NO.
1
COMPONENTS
Breadboard
Resistors
Capacitors
Transistor
2) THE
ORY:
In the
curren
t
series
amplif
ier,
the
output
curren
t
flows
only
for
one
half of
the
cycle
of the input
signal.
The
transistor
dissipates no
power with
zero
input
signal..
Complementa
ry symmetry
amplifier
requires
neither
an
input nor an
output
transformer.
This
arrangement
uses
transistors
having
complementa
ry symmetry
in the emitter
follower
configuration.
This
amplifier
circuit has a
unity
gain
because
of
the
emitter
follower
configuratio
n. Moreover
there is no
phase
inversion of
the output
signal. The
split supply
used in the
circuit gives
us
an
advantage
that the dc
component
of
the
output
voltage can
be
made
zero. Thus
the only ac
component
of the power
is available
across the
load
resistor.
3) PR
OC
ED
UR
E:
1. The
com
pone
nts
are
conn
ecte
d as
sho
wn
in
the
circu
it
diagr
am.
2. The
i
n
p
u
t
v
o
l
t
a
g
e
i
s
g
i
v
e
n
u
s
i
n
g
f
u
n
c
t
i
o
n
g
e
n
e
r
a
t
o
r
.
3. The load resistance is

varied using the decade
resistance box and
output
voltage
is
measured and readings
are tabulated.
30
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
4) CIRCUIT DIAGRAM: CURRENT SERIES FEEDBACK AMPLIFIER
5) MODEL GRAPH:
31
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
6) TABULATION:
Voltage gain
Sl. No.
Input
Input
frequency
(Hz)
Voltage (mV)
20log
db
gain
i
be
i
o
cancelled
7) RESULT:
by
Thus the Current
a
introducing
series
feedback
n
a current
amplifier
was
d
that is
designed and its
T
frequency response equal in magnitude
o
was
but 180 out of
.
phase with the
V
observed.
feedback signal at
the input of the
b
active device. The
r
two signals will
VIVA QUESTIONS:
o
cancel and the
a
effect of feedback
d
1. What is feedback will be eliminated.
c
This technique is
amplifier?
a
termed
as
s
The part of the output is
neutralization.
t
given to the input of the
i
circuit called as feedback
4. What
is
n
amplifier.
g
the
applicatio
a
2. Classify
the
n of tuned
s
feedback amplifiers.
amplifiers
1) Voltage series feedback
t
?
u
amplifier
The
application
of
n
2) Current series feedback tuned amplifiers to
n
amplifier
obtain a desired
i
n
3) Voltage shunt feedback frequwnct and
rejecting all other
g
amplifier
frequency in
4) Current shunt feedback
c
(
amplifier
i
i
r
)
c
.
3. What is meant by
u
neutralization?
i
R
t
It is the process by
a
.
d
which feedback can
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
(
i
i
)
.
W
i
r
e
l
e
s
s
c
o
m
m
u
n
i
c
a
t
i
o
n
s
y
s
t
e
m
.
Exercise Number : 10
VOLTAGE SERIES FEEDBACK AMPLIFIER

To design and find the frequency response of voltage series feedback amplifier.
32

S. NO.
1
COMPONENTS
Breadboard
Resistors
Capacitors
4
5
6
7
Transistor
CRO
RPS
Digital multimeter
b)
RANGE
10k, 11k,
200,
283
1F
10F
BC107
0-30MHz
0-10V
QUANTITY
1
1each
2
1
1
1
1
THEORY:
The feedback voltage is connected in series with the input circuit means called as
voltage series amplifier. If the feedback voltage is equal to the output voltage then it is
called as voltage series feedback amplifier.
3) PROCEDURE:
1. The components are connected as shown in the circuit diagram.
2. The input voltage is given using function generator.
3. The load resistance is varied using the decade resistance box and output
voltage is measured and readings are tabulated.
33
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
4) CIRCUIT DIAGRAM: VOLTAGE SERIES FEEDBACK AMPLIFIER
5) MODEL GRAPH:
34
Dr.NNCE
ECE / IV SEM
6) TABULATION:
Sl. No.
Input
Input
frequency
(Hz)
Voltage
(mV)
Output
Voltage
(V)
EC II & S LAB - LM
Voltage gain
20log
db
gain
7) RESULT:
Thus
the
Current
series
feedback
amplifier
was
designed
and
its
frequency
response
was
observed.
VIVA
QUESTIONS:
1.List out the
types of feedback
circuits.
V
i
f
e
e
d
b
a
c
k
2.Write the advantages of

negative feedback.
H
i
g
h
e
r
i
n
p
u
t
a
n
d
dk
l
noise
r
o
Increa
e
w
sed
d
e
bandw
u
r
idth
c
o
Reduc
e
u
ed
d
t
distorti
p
o
on
u
v
t
e
i
r
3.Writ
m
a
e
p
l
e
l
t
d
h
a
ec
n
i
c
dr
e. i c
I
su
m ai
p
dt
r
v
o
ag
v
na
e
ti
an
d
g
h
e
i
s
g
h
o
e
f
r
s
n
e
e
n
si ga
ti t
v
it iv
y
e
R
f
e
e
d
e
u
d
c
b
e
a
c
Dr.NNCE
ECE /
IV SEM
EC II
& S LAB - LM
redu
ced
dist
orti
on
35
11
Titl
e of
the
Exe
rcis
e:
SEC
ON Number :
Exercise
D ORDER LOW PASS BUTTERWORTH

FILTER

OBJECTIVE (AIM) OF THE
EXPERIMENT
To simulate and obtain the frequency
response of second order low pass
filter by using ORCAD capture.
FACILITIES REQUIRED AND
PROCEDURE
1) FACILITIES REQUIRED TO DO
input
and
output
mode.
10. Run the
circuit
diagram
and
print
the
output.
THE EXPERIMENT:
ORCAD capture
2) PROCEDURE:
1. Start the program
2. Select the ORCAD release 9
capture CIS
3. Go to new and select project
4. Create the title of the project
5. Drag the elements as per the
circuit diagram requirement.
6. Make connections as per the
circuit diagram using wire icon.
7. Create the new simulation
8. Set the output level setting.
9. Placed the voltage markers in
36
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
c)
CIRCUIT DIAGRAM: SECOND ORDER LOW PASS BUTTERWORTH
FILTER
4) MODEL GRAPH:
37
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
5) RESULT:
Thus the second order low pass filter circuit was simulated using ORCAD capture and
its frequency response was obtained.
VIVA QUESTIONS:
1.
Write the equation for finding the bandwidth.
Bandwidth= f2-f1
Where f1= lower cut off frequency and f2= higher cut off frequency
2.
What is blocking oscillator?

The circuit which uses a regerative feedback, producing a single pulse or pulse
train is called a blocking oscillator.
3. Which are the two important elements of a blocking oscillator?
1. Active element like transistor.
2. A pulse transformer.
4. What is pulse transformer?

A pulse transformer is basically a transformer which couples a source of pulses of
electrical energy to the load, keeping the shape and other properties of pulses unchanged. The
voltage level of the pulse can be raised or lowered by designing the proper turns ratio for the
pulse transformer.
38
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
DIFFERENTIATOR SINE WAVE INPUT

To simulate and obtain the output waveform of differentiator circuit by using ORCAD
capture.
ORCAD capture
2) PROCEDURE:
2. Select the ORCAD release 9 capture CIS
5. Drag the elements as per the circuit diagram requirement.
6. Make connections as per the circuit diagram using wire icon.
9. Placed the voltage markers in input and output mode.
10. Run the circuit diagram and print the output.
39
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
3) CIRCUIT DIAGRAM: DIFFERENTIATOR SINE WAVE INPUT
C2
0.0
1u
R2
15.
9k
0
12v
4
R1
C1
2
OS1
0.1u
AD741
1.59k
Frequency=100
AC=1
OS2
0
7
ECE / IV SEM
1.44k R3
INPUT
DC=0
Voff=0
Vamp=1V
4) MODEL GRAPH:
V+
OUTP
UT
O
UT
3
Dr.NNCE
V-
Run to Time =40ms
Maximum Step Size=

Ana 0.2us
lys
is
Typ
e :
1 Tim
e
2 Dom
ain
( T
v ran
sie
nt)
0
Ti
me
Amplitude
in
in
volts
ms
EC II & S LAB - LM
0
Time in ms
40
5) RESULT:
Thus the Differentiated Sine wave input circuit was simulated using ORCAD
capture
and its frequency response was obtained.
VIVA QUESTIONS:
1. Define differentiator.
Differentiator is a circuit that passes high frequencies of the input and attenuates
low frequencies. It implies that the output voltage is the differential of the input.
2. What is meant by clippers?
The circuit with which the waveform is shaped by removing a portion of the input
signal without distorting the removing part of the alternating waveform is called a clipper.
3. What is meant by clampers?
Clamping network shifts (clamp) a signal to a different d.c level, i.e., it introduces
a d.c level to an a.c signal.Hence,the clamping network is known as d.c restorer.
41
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
DIFFERENTIATOR SQUARE WAVE INPUT

To simulate and obtain the output waveform of differentiator circuit by using ORCAD
capture.
ORCAD capture
2) PROCEDURE:
42
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
CIRCUIT DIAGRAM: DIFFERENTIATOR - SQUARE WAVE INPUT
C2
0.0
1u
R2
15.
9k
0
12v
R
1
C1
2
V-
OS1
O
UT
1.59k 0.1u AD741

V1= -1V
V2= 1V
V+
OS2
OUTP
UT
AC=10
DC=0
7
TR=0ms
12v
TF=0ms
TD=0ms
1.44k R3
PW=5ms
PER=0.01s
INPUT
0
0
Analysis Type : Time Domain ( Transiant)

Run to Time =20ms
Maximum Step Size= 0.2us
3) MODEL GRAPH:
43
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
4) RESULT:
Thus the Differentiated Square wave input circuit was simulated using ORCAD
capture and its frequency response was obtained.
VIVA QUESTIONS:
1. What is delay time?
The time required for the current to rise to 10% of its maximum (saturation) value Ics
is called the delay time td.
2. What is the total turn on time?
The total turn on time is ton is the sum of the delay time and rise time,
ton = td + tr
Where,
td = Delay time.
tr = Rise time.
3. What is storage time?
The interval that elapses between the transition of the input waveform and the time
when the collector current has dropped to 90 % of total output is called the storage time ts.
4. Define transition time.
The time interval during which the conduction transfer from one transistor to another
transistor is defined as transition time.
44
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
ASTABLE MULTIVIBRATOR SYMMETRICAL

To simulate and obtain the output waveform of astable multivibrator(symmetrical) by using
ORCAD capture.
ORCAD capture
2) PROCEDURE:
45
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
3) CIRCUIT DIAGRAM: ASTABLE MULTIVIBRATOR SYMMETRICAL
V1
0
8V
Rc1
1k
R
c
2
R
2
R1
36
K
36K
C1
1
k
C2
Vc1
0.01U
V
c
2
0.01U
Q
2
2
Q23
Vb1
Vb2
SMBT2222A/SIE
SMBT2222A/
SIE
Analysis type: Time domain transient

Run to time: 5ms
Maximum step size: 0.2us
4) MODEL GRAPH:
V
Vce(sat)
Output Vc2
Vce(sat)
Output Vc1
Vbe(sat)
Output Vb2
Vbe(sat)
Output Vb1
Time(s)
46
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
5) RESULT:
Thus the astable multivibrator(symmetrical) circuit was simulated using ORCAD
capture and its output waveform was obtained.
VIVA QUESTIONS:
1. What is Leading edge response?
At start there is an overshoot and then the pulse settles down. The response till it settles
down after the overshoot is called leading edge response.
2. What is trailing edge response?
The response generally extends below the zero amplitude after the end of pulse width
is called back swing. The portion of response from backswing till it settes down is trailing
edge response.
3. What is flat top response?
The portion of the response between the trailing edge and the leading edge is called
flat top response.
4. Define rise time of a pulse.
The rise time is an important parameter related to this part of the response.It is defined by
the time required by the pulse to rise from 10 % of its amplitude to 90 % of its amplitude.
47
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
ASTABLE MULTIVIBRATOR ASYMMETRICAL

To simulate and obtain the output waveform of astable multivibrator(Asymmetrical) by using
ORCAD capture.
ORCAD capture
2) PROCEDURE:
48
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
3) CIRCUIT DIAGRAM: ASTABLE MULTIVIBRATOR- ASYMMETRICAL
V1
0
8V
Rc1
R
2
4
3
K
1k
R
c
2
R1
1
k
28K
C1
C2
0.01U
0.01U
Vc1
V
c
2
Q
2
2
Q23
Vb1
Vb2
SMBT2222A/SIE
SMBT2222A/
SIE
Analysis type: Time domain transient

Run to time: 5ms
Maximum step size: 0.2us
4) MODEL GRAPH:
Output Vc2
Output Vc1
V
Vce(sat)
Vce(sat)
O
V
b
e
(
s
a
t
)
Vbe(sat)
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
5) RESULT:
Thus the astable multivibrator(asymmetrical) circuit was simulated using ORCAD
capture and its output waveform was obtained.
VIVA QUESTIONS:
1. What is current time base generator?
The circuit which produces current which linearly increases with time is called
current time base generator.
2. What are the application of the blocking oscillator?
The blocking oscillator can be used as low impedance switch used to discharge a capacitor
very quickly. To produce large peak power pulses, both the types of oscillators cab be
used. The output of the blocking oscillator can be used to produce gating waveform with
very low mark space ratio. It may be used as frequency divider or counter in digital
circuits.
3. List varies sweep circuits
Exponential charging circuit
Constant-current charging
circuit. Miller circuit
poot strap
circuit
Inductor
circuit.
4. What do you mean by voltage time base generators?
Circuits used to generate a linear variation of voltage with time are called voltage
time base generators.
u
t
50
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM

To simulate and obtain the output waveform of Monostable multivibrator by using ORCAD
capture.
ORCAD capture
2) PROCEDURE:
51
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
3) CIRCUIT DIAGRAM: MONOSTABLE MULTIVIBRATOR
4) MODEL GRAPH:
Vce(sat)
Output Vc2
Vce(sat)
Output Vc1
Vbe(sat)
Output Vb1
Vbe(sat)
Output Vb2
Time (s)
52
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
5) RESULT:
Thus the monostable multivibrator circuit was simulated using ORCAD capture and
its output waveform was obtained.
VIVA QUESTIONS:
1. Define resonance.
The reactance of the capacitor equals that of the inductor reactance.
i.e C. = 1 / L.
2. What is Quality factor?
The ratio of inductive reactance of the coil at resonance to its resistance is known
as quality factor.
17 = XL / R
3. Define gain bandwidth product of a tuned amplifier.
The gain bandwidth(GBW) product is a figure of merit defined in terms of mid band
gain and upper 3-db frequency fh as GBW = | Aim fh | = gm / 2c
4. What is the other name for tuned amplifier?
Tuned amplifiers used for amplifying narrow band of frequencies hence it is also
known as narrow band amplifier or Band pass amplifier.
53
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM

To simulate and obtain the output waveform of bistable multivibrator by using ORCAD
capture.
ORCAD capture
2) PROCEDURE:
54
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
3) CIRCUIT DIAGRAM: BISTABLE MULTIVIBRATOR
4) MODEL GRAPH:
Vce(sat)
Output Vc2
Vce(sat)
Output Vc1
Vbe(sat)
Output Vb2
Vbe(sat)
Output Vb1
Time (s)
55
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
5) RESULT:
Thus the Bistable multivibrator circuit was simulated using ORCAD capture and its
output waveform was obtained.
VIVA QUESTIONS:
1. What is unilateralisation?
It is the phenomenon by which a signal can be transmitted from the input to the output
alone and not viceversa. In an unilateralised amplifier both resistive and reactive effects are
cancelled.
2. What is stagger tuned amplifier?
In this configuration one or more tuned amplifiers are cascaded each amplifier stage is
tuned to different frequencies. This results in decreased gain and increased bandwidth.
3. What is the effect of Q on stability?
Higher the value of Q,provides better selectivity, but smaller bandwidth and larger
gain. Hence it provides less stability.
4. What is meant by unloaded and loaded Q of tank circuit.[ APR 2003 ]
Unloaded Q is the ratio of stored energy to dissipated energy in a reactor or resonator.
The loaded Q (or) QL of a resonator is determined by how tightly the resonator is coupled to
its terminations.
56
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
Title of the
Exercise
Date of the
Exercise
CMOS INVERTER

To simulate and obtain the output waveform of cmos inverter by using ORCAD capture.
ORCAD capture
2) PROCEDURE:
57
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
3) CIRCUIT DIAGRAM: CMOS INVERTER

OUTPU
T
M2
5v
V1
MbreakN
Analysis
type:Time
Off
time=0.5us
DSTM1
CLK
On time=0.5us
IN
PU
T
domain
(transien
t) Run to
time=0.01
ms
M1
MbreakP
0
Input
Maximum
step
size=0.2m
s
e) RESULT:
d) MODEL
Thus the CMOS

Inverter circuit was simulated
1
using
ORCAD capture and its
output waveform was
1obtained.
Output
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
Time(s)
58
VIVA QUESTIONS:
1. Mention the applications of class c tuned amplifier.
One of the most common applications for mixer is in radio receivers. The mixer is
used to convert incoming signal to a lower frequency where it is easier to obtain the high
gain and selectivity required.
Mixer circuits are used to translate signal frequency to some lower frequency or to
some higher frequency. When it is used to translate signal to lower frequency it is called
down converter. When it is used to translate signal to higher frequency, it is called up
converter.
2. Mention the need for stagger-tuned amplifier.
The double tuned amplifier gives greater 3 db bandwidth having steeper sides and
flat
top. But alignment of double tuned amplifier is difficult. To overcome this problem two
single tuned amplifiers are cascaded.
3. What is principle of Hazel tine neutralization?
Hazel tine introduced a circuit in which the troublesome effect of the collector to
base
capacitance of the transistor was neutralized by introducing a signal which cancels the
signal coupled through the collector to base capacitance.
4. List the performance measure of a tuned amplifier.
Selection of a desired radio frequency signal.
Effective quality factor.
Gain
Bandwidth.
59
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
CMOS NOR

To simulate and obtain the output waveform of CMOS NOR by using ORCAD capture.
ORCAD capture
2) PROCEDURE:
60
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
3) CIRCUIT DIAGRAM: CMOS NOR
V
1
M1
5V
MbreakP
Off time=1us
DSTM1
On time=1us
CLK
Input A
M2
MbreakP
Off time=0.5us
DSTM2CLK
On time=0.5us
M
4
Input B
Output
M3
Mbre
akN
MbreakN
Analysis type:Time domain

(transient)
Run to time=0.01ms
Maximum step size=0.2us
4) MODEL GRAPH:
V
Input A
Input B
Output
Time(s)
61
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
5) RESULT:
Thus the CMOS NOR circuit was simulated using ORCAD capture and its output
waveform was obtained.
VIVA QUESTIONS:
1. What are the characteristics of an ideal tuned amplifier?
Selects a single radio frequency and amplifiers the same by rejecting all other
frequencies.
Bandwidth is zero.
Harmonic distortion is zero.
2. Write down the relationship between bandwidth and effective Q of a tuned
amplifier?
Bandwidth = o / Q effective.
3. What are the different methods of coupling? (or) Point out different methods of
coupling the load to a tuned amplifier.
The different methods of coupling the load to a tuned amplifier are:
Capacitive coupling.
Inductive coupling.
4. Why tuned amplifier cannot be used at low frequency?
For low frequencies the size L and C are large. So the circuit will be bulky and
expensive, hence the tuned amplifiers cannot be used at low frequency.
62
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
CMOS NAND

To simulate and obtain the output waveform of CMOS NAND by using ORCAD capture.
ORCAD capture
2) PROCEDURE:
63
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
3) CIRCUIT DIAGRAM: CMOS NAND
V2
M4
M5
5V
Mbreak
P
MbreakP
Off time=1us
DSTM3CLK
0
On time=1us
Input A
Output
M6
MbreakN
M7
Off time=0.5us
On time=0.5us
DSTM4
CLK
Input B
MbreakN
0
Analysis type:Time domain
(transient)
Run to time=0.01ms
Maximum step size=0.2us
4) MODEL GRAPH:
V
Input A
Input B
Output
0 0
0 1
0 0
0
Time(s)
Dr.NNCE
ECE / IV SEM
64
EC II & S LAB - LM
5) RESULT:
Thus the CMOS NAND circuit was simulated using ORCAD capture and its
output
waveform was obtained.
VIVA QUESTIONS:
1. What is the need for differential amplifiers?
Differential amplidiers are small signal direct coupled amplifiers used to amplify
the
difference between two signals. The need for differential amplifier arises in physical
measurements, instrumentation amplifiers and medical instrumentation.
2. What are the advantages of Differential Amplifiers?
1* High voltage gain.
2* High input impedence
3* High Bandwidth
4* Good bias stability.
3. Define CMRR.
Common Mode Rejection Ratio(CMRR) is the ability of the differential
amplifiers to
reject the common mode signals. It is defined as the ratio of difference mode gain Ad to
common mode gain Ac.
4. Why Differential amplifiers are widely used in Integrated Circuits?
It has good bias stability and good voltage gain without the use of large bypass
capacitors. Hence it is used in ICs.
65
Dr.NNCE
ECE / IV SEM
EC II & S LAB - LM
DIGITAL TO ANALOG CONVERTER

To simulate and obtain the output waveform of digital to analog converter by using ORCAD
capture.
ORCAD capture
2) PROCEDURE:
66
Dr.NNCE
ECE / IV SEM
3) CIRCUIT DIAGRAM:
EC II & S LAB - LM
4) MODEL GRAPH:
V
0 0
0 0 0 0 0 0 0 0
Input
1 1 1 1 1 1 1 1
B0
0 0 0 0
Input
1 1 1 1
B1
0 0
Input
0 0
1 1
B2
Input
0
1
B3
1 1 1 1
0 0
1 1
0
1
0 0
0 0 0 0
0
1
1 1
0
1
0
1
0 0
0 0
1 1
0
1
0
1
0
1
Output
Time(s)
Dr.NNCE
ECE / IV SEM
67
EC II & S LAB - LM
RESULT:
Thus the digital to analog converter circuit was simulated using ORCAD capture
and its output waveform was obtained.
VIVA QUESTIONS:
1. What are the basic elements of power supply ?
(i)
Transforme
r (ii)
Rectifier.
(iii) Filter.
2. What is ripple factor()?

Ripple factor () may be defined as the ratio of the root mean square (rms) value of the
ripple voltage to the absolute value of the dc component of the output voltage, usually
expressed as a percentage. However, ripple voltage is also commonly expressed as the
peak-to-peak value. This is largely because peak-to-peak is both easier to measure on an
oscilloscope and is simpler to calculate theoretically. Filter circuits intended for the
reduction of ripple are usually called smoothing

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Dr.

EC 2257- ELECTRONIC CIRCUITS II AND SIMULATION LAB

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

UNIVERSITY PRACTICAL EXAMINATION

INTERNAL ASSESSMENT (20 MARKS)

GENERAL INSTRUCTIONS FOR LABORATORY CLASSES

DESIGN OF THE FOLLOWING CIRCUITS

SECOND ORDER LOW PASS

BEYOND THE SYLLABUS

Inverting, Non-Inverting , Differential Amplifiers

Differential Amplifier Using BJT

Class B Complementary Symmetry Power

RC PHASE SHIFT OSCILLATOR

OBJECTIVE (AIM) OF THE EXPERIMENT

WEIN BRIDGE OSCILLATOR

OBJECTIVE (AIM) OF THE EXPERIMENT

OBJECTIVE (AIM) OF THE EXPERIMENT

Hook up the circuit as shown in the circuit diagram.

Observe the output waveform in CRO.

3) CIRCUIT DIAGRAM: COLPITTS OSCILLATOR

OBJECTIVE (AIM) OF THE EXPERIMENT

Hook up the circuit as shown in the circuit diagram.

Observe the output waveform in CRO.

4) CIRCUIT DIAGRAM: HARTLEY OSCILLATOR

OBJECTIVE (AIM) OF THE EXPERIMENT

4) CIRCUIT DIAGRAM: ASTABLE MULTIVIBRATOR

OBJECTIVE (AIM) OF THE EXPERIMENT

The components are connected as per the circuit diagram.

4) CIRCUIT DIAGRAM: MONOSTABLE MULTIVIBRATOR

OBJECTIVE (AIM) OF THE EXPERIMENT

3k, 1k, 280k, 22k,

4) CIRCUIT DIAGRAM: BISTABLEMULTIVIBRATOR

Vce(sat) Output Vc2

Vce(sat) Output Vc1

CLASS C SINGLE TUNED AMPLIFIER

OBJECTIVE (AIM) OF THE EXPERIMENT

4) CIRCUIT DIAGRAM: CLASS C SINGLE TUNED AMPLIFIER

Date of the Exercise :

3. The load resistance is

4) CIRCUIT DIAGRAM: CURRENT SERIES FEEDBACK AMPLIFIER

VOLTAGE SERIES FEEDBACK AMPLIFIER

OBJECTIVE (AIM) OF THE EXPERIMENT

FACILITIES REQUIRED AND PROCEDURE

4) CIRCUIT DIAGRAM: VOLTAGE SERIES FEEDBACK AMPLIFIER

2.Write the advantages of

D ORDER LOW PASS BUTTERWORTH

Date of the Exercise :

What is blocking oscillator?

4. What is pulse transformer?

DIFFERENTIATOR SINE WAVE INPUT

OBJECTIVE (AIM) OF THE EXPERIMENT

3) CIRCUIT DIAGRAM: DIFFERENTIATOR SINE WAVE INPUT

Run to Time =40ms

Maximum Step Size=

DIFFERENTIATOR SQUARE WAVE INPUT

OBJECTIVE (AIM) OF THE EXPERIMENT

CIRCUIT DIAGRAM: DIFFERENTIATOR - SQUARE WAVE INPUT

1.59k 0.1u AD741

Analysis Type : Time Domain ( Transiant)

ASTABLE MULTIVIBRATOR SYMMETRICAL

OBJECTIVE (AIM) OF THE EXPERIMENT

3) CIRCUIT DIAGRAM: ASTABLE MULTIVIBRATOR SYMMETRICAL

Analysis type: Time domain transient