2012

INTRODUCTION TO ELECTRICAL
ENGINEERING

FORMULA BOOK

INTRODUCTION TO ELECTRICAL
ENGINEERING

FINAL ASSIGNMENT EVEN SEMESTER: 2011 - 2012

YAMOHIADEEN.A.S. E-43
SABARI JAGANNATHAN.T D-14
VIGNESH.M.S. E-31
SUNDARA ABHIMANYU.K E-10
SUDESH CHANDER.U E-4
RAJA SIMHAN.Y C-47
SENTHIL MURUGESH.B.K. D-30
ARAVIND RAJ A-36
RAM ADHITHYA C-49
SAILESH KUMAR D-18

CONTENTS

1. BASICS OF ELECTRICAL ENGINEERING

2. NETWORK THEOREMS
3. 3 PHASE CIRCUIT
4. RESONANCE
5. TRANSIENT ANALYSIS
6. DIODES, TRANSISTORS
7. TRANSFORMERS

BASICS OF ELECTRICAL ENGINEERING

CONCEPTS:

1.
2.
3.
4.
5.
6.
7.
8.

Equivalent resistance of series and parallel networks

Kirchoffs voltage and current law
Voltage divider rule & current divider rule
Source conversion
Mesh analysis
Nodal analysis
Star Delta conversion
Power

EQIVALENT RESISTANCE OF A SERIES NETWORK:

The total resistance of a series circuit is the sum of the resistance levels.

KIRCHOFFS VOLTAGE LAW

The algebraic sum of the potential rises and drops around a closed loop (or path) is
zero.

PROBLEM 1:

VOLTAGE DIVIDER RULE

In a series circuit,
The voltage across the resistive elements will divide as the magnitude of the
resistance levels.

Circuit to illustrate dividing of voltage across resistive elements

EQUIVALENT RESISTANCE OF PARALLEL CONNECTION

KIRCHOFFS CURRENT LAW

Kirchhoffs current law (KCL) states that the algebraic sum of the currents
entering and leaving an area, system, or junction is zero.

PROBLEM TO ILLUSTRATE KCL

OPEN AND SHORT CIRCUIT

An open circuit can have a potential difference (voltage) across its terminals, but
the current is always zero amperes.
A short circuit can carry a current of a level determined by the external circuit, but
the potential difference (voltage) across its terminals is always zero volts.
SOURCE CONVERSION

Source conversions are equivalent only at their external terminals .

CURRENT SOURCES IN PARALLEL

If two or more current sources are in parallel, they may all be replaced by
one current source having the magnitude and direction of the resultant, which can
be found by summing the currents in one direction and subtracting the sum of the
currents in the opposite direction.
CURRENT SOURCES OF DIFFERENT CURRENT RATINGS ARE NEVER
CONNECTED IN SERIES.

MESH ANALYSIS:
Assign a distinct current in clockwise or anti-clockwise direction to
each independent closed loop of the network.
Indicate the polarities within each loop for each impedance as
determined by the direction of the loop current for that loop.

 Apply Kirchhoffs voltage law around each loop in clockwise

direction.
a. If an impedance has two or more assumed currents through it, the
total current through the impedance is the assumed current of the
loop in which Kirchhoffs voltage law is being applied, plus the
assumed currents of the other loops passing through in the same
direction, minus the assumed currents passing through in the
opposite direction.
b. The polarity of a voltage source is unaffected by the direction of the
assigned loop currents.
Solve the resulting simultaneous linear equations for the assumed loop
currents.
Example:

Using mesh analysis find the current I1 from the given circuit:

Solution:
Step 1:

The network is redrawn

Step 2:

Which is rewritten as

Step 4:

Using determinants,

For dependent voltage sources ,

1. Steps 1 and 2 are the same as those applied for independent voltage sources.
2. Step 3 is modified as follows: Treat each dependent source like an
independent source when Kirchhoffs voltage law is applied to
each independent loop. However, once the equation is written,
substitute the equation for the controlling quantity to ensure that
the unknowns are limited solely to the chosen mesh currents.
3. Step 4 is as before.

Example:

Write the mesh currents for the network having a dependent voltage
source.

Solution:

Step 1:

Step 2:

Substituting Vx = (I2 I1)R2

The result is two equations and two unknowns,

For independent current sources,

1. Steps 1 and 2 are the same as those applied for independent
sources.
2. Step 3 is modified as follows: Treat each current source as an
open circuit, and write the mesh equations for each remaining independent path.
Then relate the chosen mesh currents to the dependent sources to ensure that the
unknowns of the final equations are limited simply to the mesh currents.
3. Step 4 is as before.

Example:

Write the mesh currents for the network having independent current source.

Step 1:

Step 2:

For dependent current source,

1. Steps 1 and 2 are the same as those applied for independent
sources.
2. Step 3 is modified as follows: The procedure is essentially the
same as that applied for independent current sources, except now
the dependent sources have to be defined in terms of the chosen
mesh currents to ensure that the final equations have only mesh
currents as the unknown quantities.
3. Step 4 is as before.
Example:

Write the mesh currents for the network having dependent current
source.

Solution:
Step 1:

Step 2:

Now I = I1 so that kI1 = I1 I2 or I2 = I1(1-k)

Super Mesh Analysis:
1. Assign a loop current to each independent closed loop (as in the previous
section) in a clockwise direction.
2. The number of required equations is equal to the number of chosen
independent closed loops. Column 1 of each equation is formed by simply
summing the impedance values of those impedances through which the loop
current of interest passes and multiplying the result by that loop current.
3. We must now consider the mutual terms that are always subtracted from
the terms in the first column. It is possible to have more than one mutual
term if the loop current of interest has an element in common with more than
one other loop current. Each mutual term is the product of the mutual
impedance and the other loop current passing through the same element.
4. The column to the right of the equality sign is the algebraic sum of the
voltage sources through which the loop current of interest passes. Positive
signs are assigned to those sources of voltage having a polarity such that the

loop current passes from the negative to the positive terminal. Negative
signs are assigned to those potentials for which the reverse is true.
5. Solve the resulting simultaneous equations for the desired loop
currents.
Example:

Using super mesh analysis find the current I2 in the figure.

Solution:
Step 1:

The network is redrawn,

Step 2 to 4:

Which are rewritten as,

Step 5:

Using determinants, we have

Substituting numerical values,

NODAL ANALYSIS:
The fundamental steps are the following:
1. Determine the number of nodes within the network.
2. Pick a reference node and label each remaining node with a subscripted
value of voltage: V1, V2, and so on.
3. Apply Kirchhoffs current law at each node except the reference. Assume
that all unknown currents leave the node for each application of Kirchhoffs
current law.
4.Solve the resulting equations for the nodal voltages.

For dependent current source,

1. Steps 1 and 2 are the same as those applied for independent
sources.
2. Step 3 is modified as follows: Treat each dependent current source
like an independent source when Kirchhoffs current law is applied
to each defined node. However, once the equations are established,
substitute the equation for the controlling quantity to ensure that
the unknowns are limited solely to the chosen nodal voltages.
3. Step 4 is as before.
Example:

Write the nodal equation for the network having dependent current source.

Solution:
Step 1:

Step 2:

At node V1,

At node V2,

For independent voltage sources between assigned nodes,

1. Steps 1 and 2 are the same as those applied for independent sources.
2. Step 3 is modified as follows: Treat each source between defined
nodes as a short circuit, and write the nodal equations for each remaining
independent node. Then relate the chosen nodal voltages to the
independent voltage source to ensure that the unknowns of the

final equations are limited solely to the nodal voltages.

3. Step 4 is as before.
Example:

Write nodal equation for the network having independent voltage source between
two assigned nodes.

Solution:
Step 1:

Step 2:

Replacing the independent source E with a short-circuit equivalent

results in a supernode that will generate the following equation
when Kirchhoffs current law is applied to node V1:

For dependent voltage sources between defined nodes,

1. Steps 1 and 2 are the same as those applied for independent voltage
sources.
2. Step 3 is modified as follows: The procedure is essentially the
same as that applied for independent voltage sources, except now
the dependent sources have to be defined in terms of the chosen
nodal voltages to ensure that the final equations have only nodal
voltages as their unknown quantities.
3. Step 4 is as before.
Example:

Write the nodal equation for the network having dependent voltage sources
between two defined nodes.

Solution:
Step 1:

Step 2:

Replacing the dependent source mVx with a short-circuit equivalent

will result in the following equation when Kirchhoffs current law
is applied at node V1:

Super Nodal Analysis:

The sequence of steps required to apply super nodal analysis is the following:
1. Choose a reference node and assign a subscripted voltage label to
the (N _ 1) remaining independent nodes of the network.
2. The number of equations required for a complete solution is equal
to the number of subscripted voltages (N_1). Column 1 of each
equation is formed by summing the admittances tied to the node of
interest and multiplying the result by that subscripted nodal voltage.
3. The mutual terms are always subtracted from the terms of the first
column. It is possible to have more than one mutual term if the
nodal voltage of interest has an element in common with more
than one other nodal voltage. Each mutual term is the product of
the mutual admittance and the other nodal voltage tied to that
admittance.
4. The column to the right of the equality sign is the algebraic sum of
the current sources tied to the node of interest. A current source is
assigned a positive sign if it supplies current to a node, and a
negative sign if it draws current from the node.
5. Solve resulting simultaneous equations for the desired nodal
voltages. The comments offered for mesh analysis regarding
independent and dependent sources apply here also.

Example:

Using super nodal analysis find the voltage across 4 resistor.

Solution:
Choosing nodes and writing nodal equations, we have

Using determinants,

Substituting numerical values, we have

STAR-DELTA CONVERSION

Used when the resistors of a circuit do not appear to be in series or parallel.

STAR DELTA

The value of each resistor of delta is equal to

the sum of the possible product
combinations of the resistances of the Y
divided by the resistance of the Y farthest
from the resistor to be determined.

DELTA STAR

The value of each resistor of the Y is equal

to the product of the resistors in the two
closest branches of the delta divided by the
sum of the resistors in the delta.

EXAMPLE:
STAR DELTA:

DELTA STAR:

POWER
For any system power delivered to a load is given by the product of applied voltage
and the resulting current in the circuit.

P = VI
here V = Vm sin (t+)
I = Im sin t
Hence combining the above equations we get,
P= Vm Im sin t sin (t+)
Average Power,

UNIT-Watts

Apparent Power:
2

S = VI = I Z = V /Z
P = VI cos = S cos

UNIT-VA

Reactive Power:

UNIT-VAR

Q = VI sin
For inductive circuit,
QL = I2XL = V2/XL
For capacitive circuit,
QC = I2XC = V2/XC
Power Triangle:

Average Power , Apparent Power and Reactive Power can be related as

S = P+Q
For an inductive load,
S = P+jQL
Hence the power triangle is

For a capacitive load,

S = P-jQC

Hence the power triangle is

The impedance diagram for series RLC circuit is

TOTAL P, Q, AND S:

PT = Sum of average power delivered to each branch.

QT = QL - QC
ST = (PT 2 + QT 2)
Total power factor = P T /ST

NETWORK THEOREMS
CONCEPTS:
1.
2.
3.
4.
5.
6.
7.

Thevenin theorem
Norton theorem
Maximum power transfer theorem
Superposition theorem
Millman theorem
Mesh analysis
Nodal analysis

THEVENINS THEOREM:
Any circuit having a number of sources and resistances and open
output terminals can be replaced by a single circuit consisting of single voltage
source in series with a resistance.
TO FIND THEVENIN EQUIVALENT CIRCUIT:

Thevenin equivalent circuit

Open the terminals across which thevenins equivalent circuit has to be
found.
Calculate thevenins voltage at the open circuit terminal by any
Now calculate the thevenins equivalent resistance.

TO CALCULATE THEVENINS RESISTANCE:

Look from the open circuit terminals.

Short circuit if any voltage sources.
Open circuit if any current sources.
EXAMPLE:

Find the thevenins equivalent circuit for the network in shaded area.

SOLUTION:

Step 1:

Open circuit the given terminal

Step 2:

Step 3:

MAXIMUM POWER TRANSFER THEOREM

In a DC circuit maximum power transfer takes place when the load

resistance is equal to thevenins equivalent resistance.

Maximum power is delivered to the load when RL=RTH

The power to the load: PL=I2RL

Current: I=ETH/(RTH+RL)

Hence, PL=ETH2RL/(RTH+RL)
The maximum power delivered to load: PLmax=ETH2/4RTH

EXAMPLE:

For the given network calculate the value of R for maximum power to
R, and hence find the maximum power delivered under these conditions.

SOLUTION
Step 1:
To find RTH:

Step 2:
To find ETH:

Step 3:
To find maximum power dissipated P Lmax:

MILLMANS THEOREM
Any number of parallel circuits can be reduced to one through Millmans theorem.
For example

IT =I1+I2+I3+...............+IN

EXAMPLE:
Using Millmans theorem find the current through and the voltage
across the resistor R L.

Solution:
Equivalent voltage ETH,

Negative sign is used because E2/R2 has opposite polarity of the other two.

Equivalent resistance R eq,

Hence the resultant source will be as shown in the figure:

Current IL,

Hence VL is given by,

NORTONS THEOREM
Any circuit having a number of voltage sources, resistances and open
output terminals can be replaced by a simple equivalent circuit consisting of
single current source in parallel with a resistance (impedance).
PROCEDURE

Short circuit all voltage sources and open circuit all current sources to zero
and then find the resulting impedance (ZN) between the two marked
terminals.
Find the current (IN) by replacing all voltage and current sources and then
finding the short circuit current between the marked terminals.
Draw the Norton equivalent circuit.
EXAMPLE

Determine the Norton equivalent circuit for the network external to the 6
resistor.

STEP 1 :

Redraw the circuit as given below.

STEP 2 :

Determine the Norton impedance for the following network.

STEP 3 :

Determine the Norton current for the following network.

STEP 4 :

Draw the Norton equivalent circuit.

SUPERPOSITION THEOREM
If you have 2 or more sources, the response in any element is equal to the
algebraic sum of the responses caused by individual sources acting alone, while
other sources are non operative.
PROCEDURE

Short circuit the voltage source and open circuit the current source.
In case of superimposing currents: Add currents if the directions are the
same and subtract the currents if directions are not the same.
In case of superimposing voltages: Add voltage if the polarity is same and
subtract voltage if the polarity is not the same.
EXAMPLE

Using superposition , find the current I through the 6 resistor.

STEP 1 :

Redraw the circuit as given below.

The values of Z1 and Z2 are

STEP 2 :

Consider the effects of the current source. Applying the current divider rule, we
have

STEP 3 :

Consider the effects of the voltage source. Applying Ohms law gives us,

STEP 4 :

The total current through the 6 resistor is

THREE-PHASE CIRCUITS
CONCEPTS:
1. Phasor diagram of different components
2. Star connected configuration
3. Delta connected configuration
4. Power in 3 phase circuits
Three armature windings displaced by angle of 120 to each other
TERMINOLOGIES USED IN 3 PHASE CONNECTIONS:

Line voltage: Potential difference b/w any 2 live lines

Line current: current passing through any line
Phase voltage: voltage across any branch of 3 phase load
Phase current: current passing through any branch of 3 phase load
PHASE VOLTAGE - PHASOR DIAGRAM

( or )

Y-CONNECTED 3 PHASE GENERATOR:

IL=IPH
IN = IAN+IBN+ICN
PHASE VOLTAGE
EAN, EBN, ECN
LINE VOLTAGES
EAB, EBC, ECA
LINE CURRENT = PHASE CURRENT = IL1 = IL2 = IL3 = IPH
The magnitude of the line voltage of a Y-connected generator is 3 times the
phase voltage with the phase angle between any line voltage and the nearest phase
voltage at 30
i.e.
EL = 3 EPH

DELTA CONNECTED 3 PHASE GENERATOR

ELINE = EPH
PHASE CURRENTS
IBA, ICB, ICA
LINE CURRENTS
IAa, IBb, ICc
PHASE VOLTAGE = LINE VOLTAGE = EAB = EBC = ECA = EAN = EBN = ECN
The magnitude of the line current of a -connected generator is 3 times the phase
current with the phase angle between any line current and the nearest phase current
at 30
i.e.
IL = 3 IPH

PROBLEM SOLVING TYPES OF QUESTIONS:

1.
2.
3.
4.

Y-connected generator with Y-connected load

Y-connected generator with -connected load
-connected generator with Y-connected load
-connected generator with -connected load

Y-connected generator with Y-connected load (phase sequence ABC)

SOLUTION:

Y-connected generator with -connected load

SOLUTION:

-connected generator with Y-connected load

SOLUTION:

-connected generator with -connected load

SOLUTION:

POWER IN 3 PHASE CIRCUITS

AVERAGE POWER

UNIT Watts (W)

REACTIVE POWER

UNIT Volt Ampere

Reactive
(VAR)

Each phase

Total power

OR
Each phase

Total power
OR
Each phase

APPARENT POWER

Total power

UNIT Volt Ampere

( VA)

OR

POWER FACTOR
(NO UNIT)

EXAMPLE:

SOLUTION:

RESONANCE CIRCUITS
CONCEPTS:

1. SERIES RESONANCE CIRCUITS

2. PARALLEL RESONANCE CIRCUITS

SERIES RESONANT CIRCUIT:

RESONANCE CONDITION:
NET IMPEDANCE OF THE CIRCUIT:

Or

RESONANT FREQUENCY
VOLTAGE AND CURRENT

At resonance, the voltage across capacitor and

inductor are same in magnitude but 180 out of
phase

PHASOR DIAGRAM
POWER

power factor = 1
POWER TRIANGLE
Average power delivered to
resistor
Reactive power to capacitor
Reactive power to inductor
Average power = apparent power

Paver= I2R
Pc = I2XC
Pl =I2XL

QUALITY FACTOR
In terms of power

In terms of energy

2 (Max. energy stored)

______________________
Energy dissipated per cycle
Maximum energy stored = LI2
Energy dissipated per cycle = (I/2)2 RT

In inductor

Maximum energy stored = CV2

Energy dissipated per cycle = (I/2)2 RT

In capacitor
Higher the Q factor, lower the energy dissipated across R or higher the energy
stored in capacitor or inductor
RELATION BETWEEN E, Q, V L, VC
PHASE ANGLE ASSOCIATED WITH
TOTAL IMPEDANCE

FREQUENCY RELATIONSHIPS:

f = fr
f > fr
f < fr
(fr is the resonant frequency)

network is resistive V & I are in

phase
network is inductive V leads I
network is capacitive

leads V

BANDWIDTH:

UNIT: Hertz
Range of frequency
corresponding to 70.7% of
maximum current or voltage.
fs resonant frequency
f1 = fc lower cut off
frequency
f2 = fl upper cut off
frequency

LOWER CUT OFF FREQUENCY

UPPER CUT OFF FREQUENCY

FROM THE GRAPH

Also
f1 = fr R/4L
f2 = fr + R/4L
f2 f1 / fr = (R/2L) / fr
= R / 2 frL
= R / XL
RESONANT FREQUENCY, BANDWIDTH AND
Q- FACTOR
HALF POWER FREQUENCY

The frequencies at which power delivered is

one half that delivered at resonant frequency

PARALLEL RESONANT CIRCUIT

Practically there will be some internal resistance to the coil L. Hence considering
following circuit,

To find a parallel network equivalent for the series R-L branch,

Redrawing the network and a practical current source having an internal resistance
Rs will result in the following network:

Now the circuit results as

Where

Now at a point the resonance conditions for the practical parallel resonant
configuration can be determined.
ADMITTANCE OF THE CIRCUIT

For unity power factor, imaginary part becomes zero. Hence

Substituting for XLP

VOLTAGE

The voltage across all parallel components is same:

CURRENT:

RESONANT FREQUENCY
UNITY POWER FACTOR( fp )

MAXIMUM IMPEDANCE

RESONANT FREQUENCY FOR Q 10

UNITY POWER FACTOR: ( f p )

MAXIMUM IMPEDANCE (fm)

TOTAL IMPEDANCE Z Tp

TOTAL IMPEDANCE FOR Q 10

FOR NORMAL
SOURCE

FOR IDEAL SOURCE

( Rs = )

QUALITY FACTOR
FOR NORMAL CURRENT SOURCE

FOR IDEAL CURRENT SOURCE

(Rs = )

QUALITY FACTOR FOR Q 10

NORMAL CURRENT SOURCE

IDEAL CURRENT SOURCE

(Rs =)

RP
Normally,

For Q 10

BANDWIDTH

LOWER CUT OFF FREQUNCY

UPPER CUT OFF FRQUNCY
Q 10

TRANSIENT ANALYSIS
CONCEPTS:
1. Transient analysis of RC circuit
2. Transient analysis of RL circuit

TRANSIENT ANALYSIS OF RC CIRCUIT

CHARGING PHASE

DISCHARGING PHASE

Current through
the capacitor

Voltage across the

capacitor

Time constant ,=RC sec

If incase we have multiple resistors find the thevenin equivalent ciruit and
replace R with Rth and E with Eth.

Time taken for the capacitor to charge or discharge completely = 5 sec

TRANSIENT ANALYSIS OF RL CIRCUIT

CHARGING PHASE

DISCHARGING PHASE

Current through
the Inductor

Voltage across the

Inductor

If incase we have multiple resistors find the thevenin equivalent ciruit

and replace R with Rth and E with Eth.
Time constant, =L/R

Plotting iL Vs. t during charging phase

Plotting VL Vs. t during charging phase

PROCEDURE FOR SOLVING PROBLEMS

1. Determine the equivalent inductance/capacitance (Leq,Ceq).

2. Determine the Thevenin equivalent resistance, R eq, seen by
(Leq,Ceq).
3.The characteristic time is now known
Leq/Req.

Req Ceq or =

4. Calculate the initial value for the voltage/current flowing in

the circuit.
5. Estimate the value of Vc , IL as t= (final value).
6.The final solution is obtained from the following formulas:

BASIC ELECTRONIC DEVICES

CONCEPTS:
1. Diodes
2. Transistors
3. Operational amplifiers
4. Their applications
DIODES

Ideally, a diode will conduct current in the direction defined by the arrow in the
symbol and act like an open circuit to any attempt to establish current in the
opposite direction.
The ideal diode, therefore, is a short circuit for the region of conduction.
The ideal diode, therefore, is an open circuit in the region of non
conduction.
A diode can either be forward biased or reverse biased.
In case of forward bias, an ideal diode acts as a short circuit.
In case of reverse bias, an ideal diode acts as a open circuit.

DC OR STATIC RESISTANCE

AC OR STATIC RESISTANCE

APPLICATIONS OF DIODE

SERIES DIODE

HALF WAVE RECTIFIER

CIRCUIT AND THE INPUT WAVE FORM

THE CONDUCTION REGION (0 TO T/2)

THE NON CONDUCTION REGION

THE NET OUTPUT LOOKS WOULD BE

THE PIV (PEAK INVERSE VOLTAGE)

It is the voltage rating that must not be exceeded in the reverse-bias region or the
diode will enter the zener avalanche region.

THE FULL WAVE RECTIFIER

The bridge network

The circuit and the input wave

form.

CONDUCTION PATH FOR POSTIVE HALF OF VI

CONDUCTION PATH FOR NEGATIVE HALF OF VI

THE PEAK INVERSE VOLTAGE

CIRCUIT TO FIND PIV

THE CENTER TAPPED TRANSFORMER

A TYPICAL CENTER TAPPED

TRANSFORMER

DURING THE POSITIVE HALF CYCLE OF THE INPUT

DURING THE NEGATIVE HALF CYCLE OF THE INPUT

THE PEAK INVERSE VOLTAGE OF CENTER TAPPED TRANSFORMER

CIRCUIT TO FIND THE PIV

CLIPPERS

There are a variety of diode networks called clippers that have the ability to clip
off a portion of the input signal without distorting the remaining part of the
alternating waveform.
TWO TYPES OF CLIPPERS
SERIES CLIPPERS
PARALLEL CLIPPERS

SERIES CLIPPERS

CLIPPER CIRCUIT

INPUT AND OUTPUT

TIPS TO SOLVE A CLIPPER PROBLEM

Make a mental sketch of the response of the network based on the direction
of the diode and the applied voltage levels.
Determine the applied voltage (transition voltage) that will cause a change in
state for the diode.
Be continually aware of the defined terminals and polarity of Vo.
It can be helpful to sketch the input signal above the output and determine
the output at instantaneous values of the input.
PARALLEL CLIPPERS

RESPONSE TO A PARALLEL CLIPPER

CLAMPERS

The clamping network is one that will clamp a signal to a different dc level. The
network must have a capacitor, a diode, and a resistive element, but it can also
employ an independent dc supply to introduce an additional shift.

CLAMPING CIRCUIT
TIPS TO SOLVE A CLAMPER PROBLEM

1. Start the analysis of clamping networks by considering that part of the input
signal that will forward bias the diode.
2. During the period that the diode is in the on state, assume that the capacitor
will charge up instantaneously to a voltage level determined by the network.
3. Assume that during the period when the diode is in the off state the capacitor
will hold on to its established voltage level.
4. Throughout the analysis maintain a continual awareness of the location and
reference polarity for Vo to ensure that the proper levels for Vo are obtained.
5. Keep in mind the general rule that the total swing of the total output must match
the swing of the input signal

TRANSISTORS:

A semi-conductor device which can be used to amplify and switch electronic

devices.
TYPES:
BJT BI-POLAR JUNCTION TRANSISTOR
FET FIELD EFFECT TRANSISTORS (UNI POLAR)
BI-POLAR JUNCTION TRANSISTORS
BJT CAN BE DIVIDED INTO TWO TYPES
NPN BJT
PNP BJT

THE NPN BJT

THERE ARE THREE CONFIGURATIONS IN NPN BJT

COMMON BASE CONFIGURATION:
The common-base terminology is derived from the fact that the base is common to
both the input and output sides of the configuration.

THE ABOVE CIRCUIT IS THE COMMON BASE CONFIGURATION FOR A

NPN TRANSISTOR

THE INPUT AND OUTPUT CHARACTERISTICS OF CB CONFIGURATION

INPUT CHARACTERISTICS

OUTPUT CHARACTERISTICS

THE CUTOFF, SATURATION AND ACTIVE REGION

THE ACTIVE REGION
In the active region the collector-base junction is reverse-biased, while the
Base emitter junction is forward-biased.
The active region is the region normally employed for linear (undistorted)
amplifiers.

THE CUTOFF REGION

As inferred by its name, the cutoff region is defined as that region where the
collector current is 0 A.

In the cutoff region the collector-base and base-emitter junctions of a transistor

are both reverse-biased.

THE SATURATION REGION

The saturation region is defined as that region of the characteristics to the left of
VCB =0 V.
In the saturation region the collector-base and base-emitter junctions are
Forward biased.
THE ALPHA
In the dc mode the levels of IC and IE due to the majority carriers are related by a
quantity called alpha and defined by the following equation:

IN CASE OF AC MODE

THE COMMON EMITTER CONFIGURATION

It is called the common-emitter configuration since the emitter is common or

reference to both the input and output terminals.

THE INPUT CHARACTERISTICS OF CE

THE OUTPUT CHARACTERISTICS

THE ACTIVE REGION

The active region for the common-emitter configuration is that portion of the
Upper right quadrant that has the greatest linearity, that is, that region in which the
curves for IB are nearly straight and equally spaced.
In the active region of a common-emitter amplifier the collector-base junction
is reverse-biased, while the base-emitter junction is forward-biased.

THE CUT OFF REGION

The cutoff region for the common-emitter configuration is not as well defined as
for the common-base configuration.
For linear (least distortion) amplification purposes, cutoff for the common
emitter configuration will be defined by IC = ICEO.

THE SATURATION REGION

THE REGION TO THE LEFT OF THE VCESAT SHOWS THE SATURATION
STATE OF A COMMON EMITTER CONFIGURATION.

THE BETA
IN DC MODE THE LEVELS OF IC AND IB ARE RELATED BY BETA AND IS
GIVEN BY

IN AC MODE BETA IS GIVEN BY

AC IS KNOWN AS THE AMPLIFICATION FACTOR .

CURRENT AND VOLTAGE ANALYSIS

VBB FORWARD BIASES THE BASE EMITTER JUNCTION AND VCC

REVERSE BIASES THE BASE COLLECTOR JUNCTION.
THE FORWARD VOLTAGE DROP WILL BE
VBE=0.7 V
APPLYING KVL
VRB=VBB-VBE
IBRB=VBB-VBE
IB= (VBB-VBE) / RB
VCE=VCC-VRC
VCE=VCC-VRC
IC= * IB
HENCE
VCB=VCE-VBE

BIASING OF TRANSISTORS

THE Q POINT
The operating point of a device, also known as bias point, quiescent point, or Qpoint, is the steady-state operating condition of an active device (a transistor or
vacuum tube) with no input signal applied.

For the BJT to be biased in its linear or active operating region the following must
be true:
1. The baseemitter junction must be forward-biased (p-region voltage more
positive), with a resulting forward-bias voltage of about 0.6 to 0.7 V.
2. The basecollector junction must be reverse-biased (n-region more positive),
with the reverse-bias voltage being any value within the maximum limits of the
device

VOLTAGE DIVIDER BIAS

VOLTAGE DIVIDER BIAS CONFIGURATION

APPLYING KVL WE GET

THEN WE CAN GET THE OTHER QUANTITIES USING FORMULA

FIXED BIAS

Dc equivalent of the above circuit

Forward Bias of BaseEmitter

Applying KVL

We get

CollectorEmitter Loop

Applying kvl to the above loop, we get

EMITTER-STABILIZED BIAS CIRCUIT

Applying kvl to the base emitter loop

COLLECTOR EMITTER LOOP

Applying kvl to collector emitter loop

TRANSISTOR AS AN AMPLIFIER

THE AMPLIFYING ACTION

THE AC EMITTER CURRENT IS GIVEN BY

Ie=Ib=Vb/re
Where re is the internal resistance of emitter
Vc = ICRC
VC= IERC
AV=VC/VB
SUBSTITUTING THE OTHER TWO EQUATIONS IN THE THIRD ONE WE
GET
AV= RC/rE

TRANSISTOR AS AN SWITCH

In (a), the device is in the cutoff region because the base-emitter junction is not
forward biased.
In this condition there is, ideally, an open between collector and emitter.
In (b), the transistor is in the saturation region because the base-emitter junction
and the base-collector junction are forward-biased and the base current is made
large enough to reach its saturation point.
In this condition there is, ideally, a short between collector and emitter.

 Actually, a drop of up to a few tenths of a volt normally occurs.

i) Conditions in cutoff
A transistor is in cutoff region when the BE junction is NOT forward biased.
Neglecting leakage current, all currents are zero and VCE = VCC.
ii) Conditions in saturation
When the BE junction is forward biased and there is enough base current to
produce a maximum collector current, transistor is saturated.
IC(sat) = (VCC VCE(max))/RC
Minimum value of base current needed to produce saturation is
IB(min) = IC(sat)/bDC

OPERATIONAL AMPLIFIERS
Operational Amplifier is a very high gain differential amplifier with high
input impedance and low output impedance.

Common Mode Rejection Ratio:(CMRR)

where, Ad=differential amplifier gain

Ac=common mode amplifier gain.

Example:

Find the CMRR for the circuit as shown in the figure below.

Solution:

1.

Finding Ad from the figure (a):

2.

Finding Ac from figure (b):

3.

Finding CMRR:

Inverting Amplifier:

Amplifire gain for inverting amplifier is

Non-Inverting Amplifier:

Amplifier gain for non-inverting amplifier is

Summing Amplifier:

Output voltage for summing amplifier is

Difference Amplifier:

The output voltage for difference amplifier is

TRANSFORMERS
The electrical devices which works on the phenomenon of mutual
inductance.
Consist of two coils
The coil to which the source is applied is called the primary and the coil to
which the load is connected is the secondary.

Expression for the voltage induced across the primary, relating to the no. of turns
in the primary:

This can also be related to the self inductance in the primary as,

Similarly for the secondary voltage,

and

when

Coefficient of coupling: (k)

The closer the two coils, the grater is the flux linkage, and the higher is the value of
k. The coils with low coefficient of coupling are said to be loosely coupled. So the
expression for the secondary voltage is,

And,

volts(v).

The mutual inductance between the two coils is determined by,

In terms of inductance of each coil and the coefficient of coupling, the mutual
inductance is given by,

The secondary voltage can also be found in terms of mutual inductance as,

The IRON CORE Transformer

The iron core will serve to increase the coefficient of coupling between the coils by
increasing the mutual flux m .
When the current ip through the primary circuit of the iron-core transformer is a
maximum, the flux m linking both coils is also a maximum. In fact, the magnitude
of the flux is directly proportional to the current through the primary windings.
Therefore, the two are in phase, and for sinusoidal inputs, the magnitude of the flux
will vary as a sinusoid also. That is, if

The induced voltage across the primary due to a sinusoidal input can be determined
by Faradays law:

Substituting for m gives us,

and differentiating, we obtain

Indicating that the induced voltage ep leads the current through the primary coil by
90.
The effective value of ep is,

.. (i)

Similarly,

.. (ii)

Dividing (i) by (ii),

The ratio of the magnitudes of the induced voltages is the same as the ratio of
the corresponding turns.

Since Vg = E1 and Vl = E2 for the ideal situation,

The ratio Np /Ns , usually represented by the lowercase letter a, is referred to as the
transformation ratio:

If a < 1, the transformer is called a step-up transformer since the voltage Es > Ep
, that is,

If a > 1, the transformer is called a step-down transformer since Es < Ep , that is,

Since the instantaneous values of ip and is are related by the turns ratio, the phasor
quantities Ip and Is are also related by the same ratio:

So,
The primary and secondary currents of a transformer are therefore related
by the inverse ratios of the turns.
For the step-up transformer, a < 1, and the current in the secondary, Is = aIp, is less
in magnitude than that in the primary. For a step-down transformer, the reverse is
true.

Reflected Impedance and Power:

In the previous section, we found that,

Divide the first by the second, we get,

However, since,

Then,

If a transformer is used, therefore, impedance can be made to appear larger or

smaller at the primary by placing it in the secondary of a step-down (a > 1) or stepup (a < 1) transformer, respectively. Note that if the load is capacitive or inductive,
the reflected impedance will also be capacitive or inductive.
For the ideal iron-core transformer,

Or,

And,

Transformer on load
When the secondary is loaded, the secondary current I2 is setup. The magnitude and phase of I2
with respect to V2 is determined by the characteristics of the load. Current I2 is in phase with V2 if the load
is non-inductive; it lags if the load is inductive and leads if the load is capacitive .
The net flux passing through the core is approx, the same as at no-load. The core loss is also practically
the same under all load conditions.

Hence when transformer is on load, the primary windings have two currents in it; one is I0 and the other is
I0 which is anti-phase with I2 and K times in magnitude. The total primary current is the vector sum of
I0 and I2 .

Transformer with winding resistance but no magnetic leakage:

V2 = E2 I2 R2
And

E1 = V1 I1 R1

The phasor diagrams for (a) non-inductive, (b) inductive, and (c) capacitive loads

Equivalent resistance:
Effective resistance of the transformer as referred to the primary (R 01 ) and the secondary (R02 ) are,

R01 = R1 + R2 = R1 + R2 / K2
R02 = R2 + R1 = R2 + R1 K2
Where

K = N 1 / N2

Magnetic leakage:
The terms X1 and X2 are primary and secondary leakage reactances.

X1 = eL1 / I1

and

X 2 = eL2 / I2

Transformers with resistance and leakage reactance:

V1 = E1 + I1Z1

and

and

E 2 = V2 + I2Z2

Transformer Tests:
(i)
(ii)

Open Circuit Test

Short Circuit Test

Open Circuit Test:

W = V1I0 cos 0
I = I0 sin 0
X0 = V1 / Ip

and
and

Iw = I0 cos 0
R0 = V1 / Iw

Where Y0 is the exciting admittance and it is given by

Y0 = I0 / V1
Separation of core losses:
(a) Hysteresis loss (Wh)
(b) Eddy current loss (We)

The total loss is given by (Wi):

where f is the frequency, P and Q are constants,
B is the flux density.
Short Circuit Test:

W = I12 R01
X01 =

And
Efficiency:

Z012 R012

REFERENCE
Introductory Circuit Analysis (10th edition) Robert L.Boylestad
Textbook of Electrical Technology Volume II B.L.Theraja, A.K.Theraja
MIT Open course Lecture Notes.