Boolean Arithmetic Computing Systems

Elements of Computing Systems, Nisan & Schocken, MIT Press
www.idc.ac.il/tecs
Boolean Arithmetic
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Copyright 2005 Noam Nisan and Shimon Schocken
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Elements of Computing Systems, Nisan & Schocken, MIT Press, www.idc.ac.il/tecs , Chapter 2: Boolean Arithmetic
slide 1
Counting systems
quantity
decimal
binary
33-bit register
000
001
10
010
11
011
100
100
101
101
110
110
111
111
1000
overflow
1001
overflow
10
1010
overflow
slide 2
Rationale
(9038) ten = 9 103 + 0 10 2 + 3 101 + 8 10 0 = 9038
(10011) two = 1 2 4 + 0 2 3 + 0 2 2 + 1 21 + 1 2 0 = 19
( xn xn1 ...x0 ) b = xi b
i =0
slide 3
Binary addition
Assuming a 4-bit system:
0 0 0 1
1 0 0 1
0 1 0 1
1 1 1 1
1 0 1 1
0 1 1 1
0 1 1 1 0
1 0 0 1 0
no overflow
overflow
Algorithm: exactly the same as in decimal addition

Overflow (MSB carry) has to be dealt with.
slide 4
Representing negative numbers (4-bit system)

0
0000
0001
1111
-1
0010
1110
-2
0011
1101
-3
0100
1100
-4
0101
1011
-5
0110
1010
-6
0111
1001
-7
1000
-8
Example:
The codes of all positive numbers

begin with a 0
The codes of all negative numbers
begin with a 1
To convert a number:
leave all trailing 0s and first 1 intact,
and flip all the remaining bits
2 - 5 = 2 + (-5) =
0010
+1011
1101
= -3
slide 5
Building an Adder chip
16
a
16
1 6 -b it
ad d e r
16
o ut
Adder: a chip designed to add two integers

Proposed implementation:
Half adder: designed to add 2 bits
Full adder:
designed to add 3 bits
Adder:
designed to add two n-bit numbers.
slide 6
Half adder (designed to add 2 bits)
carry sum
a
b
h alf
ad d er
s um
c arry
Implementation: based on two gates that youve seen before.
slide 7
Full adder (designed to add 3 bits)

carry sum
a
s um
b
fu ll
ad d er
c arry
Implementation: can be based on half-adder gates.
slide 8
n-bit Adder
16
1 6 -b it
ad d e r
16
16
o ut
...
out
Implementation: array of full-adder gates.
slide 9
The ALU (of the Hack platform)
a
b
s um
h alf
ad d er
16
a
s um
fu ll
ad d e r
c arry
16
c arry
zx nx
zy
ny
no
16-bit
adder
16
out
out(x, y, control bits) =

x+y, x-y, yx,
0, 1, -1,
x
16 bits
ALU
out
x, y, -x, -y,
16 bits
x!, y!,
16 bits
x+1, y+1, x-1, y-1,

zr
ng
x&y, x|y
slide 10
ALU logic (Hack platform)
Implementation: build a logic gate architecture

that reads each control bit and does what
the table specifies: if zx=1 then set x to 0, etc.
slide 11
The ALU in the CPU context (Hack platform)
c1,c2, ,c6
D register
A register
A
Mux
RAM
ALU
A/M
(selected
register)
slide 12
out
Perspective
Combinational logic
Our adder design is very basic: no parallelism
It pays to optimize adders
Our ALU is also very basic: no multiplication / division
Where is the seat of advanced math operations?
a typical hardware/software tradeoff.
slide 13
Historical note: Leibnitz (1646-1716)

The binary system may be used in place of the decimal system;
express all numbers by unity and by nothing
1679: built a mechanical calculator (+, -, *, /)
CHALLENGE: All who are occupied with the

reading or writing of scientific literature have
assuredly very often felt the want of a common
scientific language, and regretted the great loss of
time and trouble caused by the multiplicity of
languages employed in scientific literature:
SOLUTION: Characteristica Universalis: a
universal, formal, language of reasoning
Leibnizs medallion
for the Duke of Brunswick
The dreams end: Turing and Goedl in 1930s.

slide 14

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Elements of Computing Systems, Nisan & Schocken, MIT Press

(9038) ten = 9 103 + 0 10 2 + 3 101 + 8 10 0 = 9038

Assuming a 4-bit system:

Algorithm: exactly the same as in decimal addition

Representing negative numbers (4-bit system)

The codes of all positive numbers

Building an Adder chip

Adder: a chip designed to add two integers

Half adder: designed to add 2 bits

designed to add 3 bits

designed to add two n-bit numbers.

Half adder (designed to add 2 bits)

Implementation: based on two gates that youve seen before.

Full adder (designed to add 3 bits)

Implementation: can be based on half-adder gates.

Implementation: array of full-adder gates.

The ALU (of the Hack platform)

out(x, y, control bits) =

x+1, y+1, x-1, y-1,

ALU logic (Hack platform)

Implementation: build a logic gate architecture

The ALU in the CPU context (Hack platform)

Historical note: Leibnitz (1646-1716)

CHALLENGE: All who are occupied with the

The dreams end: Turing and Goedl in 1930s.

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