You are on page 1of 88

USB Developer Days 2016

USB Power Delivery


Developer Days 2016
Hong Kong
October 19-20, 2016

October 19 - 20, 2016 USB Implementers Forum 2016 1


USB Developer Days 2016

Day 2 Power Delivery Agenda


8:30 Introduction and Architectural Overview
8:55 Physical Layer
9:15 Protocol Layer
9:45 Device Policy
10:00 Break
10:30 Power Supply
11:45 Q&A
12:00 Lunch Exhibit Area Open

October 19 - 20, 2016 USB Implementers Forum 2016 2


USB Developer Days 2016

How PD is used today


Introduction Key Characteristics
Target Requirements
Revision 3.0

October 19 - 20, 2016 USB Implementers Forum 2016 3


USB Developer Days 2016

How PD is used today


Dedicated Charging based on Standards (IEC)
Support different charging algorithms (high voltage, direct charge)
Power banks, UPSes
Charging plus data
Charging docks
Charge through adapters
Cable capabilities (current, speed, length, active/passive )
Alternate Mode Adapters
DP Alt mode
MHL Alt mode
Thunderbolt Alt mode

October 19 - 20, 2016 USB Implementers Forum 2016 4


USB Developer Days 2016

Key Characteristics
Voltage and current values negotiated
Higher voltage and current allows power up to ~100W
Limits to match cable capabilities (3A/5A)
Upper limit bound by international safety requirements
Coexists with USB Battery Charging 1.2
Swapping of power direction, data direction and source of VCONN
Communication with USB Type-C Electronically Marked Cables
Support for Alternate Modes of operation (DP, MHL)

October 19 - 20, 2016 USB Implementers Forum 2016 5


USB Developer Days 2016

Revision 3.0
Improved Collision avoidance scheme
Use Rp/Rd to indicate Source/Sink transmission
Deprecated BFSK
Revision 2.0 support will still be permitted
Extended messages
Up to 260 bytes
Chunking into existing packet sizes enabled for compatibility
Additional alerts, capabilities and status
Support for IEC 63002 power supply standards
Battery capabilities/status
Support for Direct Charge
Programmable Power Supplies

October 19 - 20, 2016 USB Implementers Forum 2016 6


USB Developer Days 2016

Revision 3.0 continued


Fast Role Swap for adapters
Solves issues when adapter changes from wall powered to bus powered
Occurs due to surprise removal of wall power
Keeps the hub and attached devices alive
Keep alive time needs to be short to minimize caps
PDUSB Hub definition moved to new USB-C Bridging Specification
Encapsulates UCSI and Security related requests over USB
Device USB operation and Battery status will be retained
Power Rules
Based about communicating Watts to the user
Adds voltages/currents incrementally
Bigger means better to the user
Multi-port charger

October 19 - 20, 2016 USB Implementers Forum 2016 7


USB Developer Days 2016

Terminology
Topology
Architectural Walk through the Layers
Overview PD and USB Device States
Battery Status

October 19 - 20, 2016 USB Implementers Forum 2016 8


USB Developer Days 2016

Terminology
DFP/UFP
Defines the Ports position in the USB topology
DFP is equivalent to A-Port/Host, UFP is equivalent to B-Port/Device
Does not require USB Communication Capability
Source/Sink
Defines the power role the port is currently operating in
Dual-role Power
Port can operate as either a Source or a Sink
Dual-role Data
Port can operate as either a DFP or a UFP
USB Communications Capable
Port can send/receive USB traffic may be asymmetric for DFP/UFP
SOP*
Start of packet (SOP/SOP/SOP)

October 19 - 20, 2016 USB Implementers Forum 2016 9


USB Developer Days 2016

Source Sink

Overview Device Policy Manager Device Policy Manager

Source Port Sink Port

Policy Engine Policy Engine

Protocol Power Power Protocol


Source(s) Sink

USB-C Control Physical Layer Physical Layer USB-C Control

BMC BMC

USB Port USB Port


CC VBUS VBUS CC

VBUS

CC

USB-C Port Control Power Source/Sink (Chapter 7)


USB Type-C state operation (attach/detach) Controls power transitions
Physical Layer (Chapter 5) Device Policy (Chapter 8)
Port to Port over CC wire Policy Engine
Collision Avoidance Drives the Atomic Message Sequences
Protocol Layer (Chapter 6) Device Policy Manager
Handles retries, message construction and Handles PD across multiple ports
chunking Makes decisions on how to allocate power
Talks to Power Source/Sink and Cable Detection

October 19 - 20, 2016 USB Implementers Forum 2016 10


USB Developer Days 2016

USB-C Control / Cable Discovery


Source/Sink USB-C Control
Device Policy Manager USB Type-C mechanisms indicate attach/detach
Cables support 3A by default
Source Port
Cable Discovery
Policy Engine
USB Type-C full featured cables are
electronically marked
Protocol Power
Source(s)/ USB PD uses SOP to read cable capabilities
USB-C Control
Sink
Identify
Physical Layer
Cables supporting more than 3A
Active cables
BMC
Alternate Modes
USB Port

CC VBUS

October 19 - 20, 2016 USB Implementers Forum 2016 11


USB Developer Days 2016

Physical Layer
Source/Sink Uses USB Type-C CC wire
Device Policy Manager no dependence on (D+/- or Tx/Rx)
Source Port Biphase Mark Coding (BMC) Signaling
Policy Engine >10e-6 BER
300kbps
Protocol Power

Half duplex with collision avoidance


Source(s)/
Sink
USB-C Control Physical Layer

Tx appends CRC-32 to message / Rx


USB Port
BMC
validates CRC-32
CC VBUS Built in self-test modes

October 19 - 20, 2016 USB Implementers Forum 2016 12


USB Developer Days 2016

Protocol Layer
Source/Sink Directed by policy engine
Device Policy Manager Constructs messages which it
passes to the PHY
Source Port

Policy Engine
Receives messages from the PHY
Deconstructs messages and passes
Protocol Power back to policy engine
Source(s)/

USB-C Control Physical Layer


Sink
Ensures reliable communications
Timeouts, retries and GoodCRC
BMC messages
USB Port

CC VBUS

October 19 - 20, 2016 USB Implementers Forum 2016 13


USB Developer Days 2016

USB Type-C Port Controller (TCPC)


Source/Sink Covers the following:
Device Policy Manager Physical Layer
Source Port
Protocol Layer state operation
GoodCRC generation
Policy Engine
Optionally USB-C Control
TCPC
Protocol Power
Source(s)/ I2C interface to upper
USB-C Control Physical Layer
Sink
Protocol Layer

BMC

USB Port

CC VBUS

October 19 - 20, 2016 USB Implementers Forum 2016 14


USB Developer Days 2016

Power Source/Sink
Source/Sink Behavioral aspects of sources
Device Policy Manager
and sinks
Source Port
Defines transitions
Policy Engine
Increasing/decreasing voltage
Increasing/decreasing current
Protocol Power
Source(s)/
Swapping roles
Detailed diagrams showing the
Sink
Cable Detection Physical Layer

relationship between the


BMC
messaging and transitions
USB Port

CC VBUS

October 19 - 20, 2016 USB Implementers Forum 2016 15


USB Developer Days 2016

Device Policy
Source/Sink
Device Policy Manager
Device Policy Manager
Manages shared resources
Source Port Notion of reserved power
Policy Engine Notion of reclaimed power
Interacts with the policy engine,
Protocol Power
Source(s)/
power supply, cable detect, and
Sink system policy manager
Cable Detection Physical Layer
Policy Engine
BMC
Enacts policy for a port
USB Port
Interacts with the protocol layer and
CC VBUS
device policy manager

October 19 - 20, 2016 USB Implementers Forum 2016 16


USB Developer Days 2016

System Policy
Provides OS visibility into Power Delivery
USB Host

System Policy
Manager

System can overlay a coordinated policy


USB hub tree
(optional) on device policy
PD USB
Device
Communication is done over USB
Devices report capabilities
USB Interface
(optional)

Device Policy
Manager
Hubs report and allow control of their
downstream ports
Policy Engine
Rev 3.0 moves this functionality to the
Protocol
bridging specification
Physical Layer

CC

October 19 - 20, 2016 USB Implementers Forum 2016 17


USB Developer Days 2016

PD and USB Device States


Device moves from USB Negotiate
enough
No Yes
Attached to USB Powered: Power?

Device is a Sink, sees VBUS No

and has enough power to


operate from PD USB
Attached
VBUS
Present
Yes Can
enumerate?
Yes USB
Powered

Device
Device is a Source seeing in Sink
Mode

that a Sink is attached (after No


Device in
Source
PR_Swap) Mode (5V)

Yes Yes
Source? Attached?

No No

October 19 - 20, 2016 USB Implementers Forum 2016 18


USB Developer Days 2016

PD and USB Device States Hard reset


Hard Reset Hard Reset
and and
Can Operate Can t Operate

Swapping
Any USB VBUS No Power
No USB
State Present Attached
Roles?

Yes Yes
Hard Reset
and
Bus Powered

Hard Reset refers to PD Hard Reset


It is recommended that implementers of USB Devices and Hosts to
stay in the same USB State on reception of PD Hard Reset

October 19 - 20, 2016 USB Implementers Forum 2016 19


USB Developer Days 2016

Battery Status
Battery status structure returns information about the battery
Battery Attributes: no battery, charging, discharging, neither
Battery SOC: State of charge in %
Battery Status: Various battery error conditions
Battery Remove Wake Events: present error, charging flow, error
Remaining Operating Time
Remaining Charging Time

October 19 - 20, 2016 USB Implementers Forum 2016 20


USB Developer Days 2016

Day 2 Power Delivery Agenda


8:30 Introduction and Architectural Overview
8:55 Physical Layer
9:15 Protocol Layer
9:45 Device Policy
10:00 Break
10:30 Power Supply
11:45 Q&A
12:00 Lunch Exhibit Area Open

October 19 - 20, 2016 USB Implementers Forum 2016 21


USB Developer Days 2016

Signaling
BMC Characteristics
Symbol Coding
Physical Layer Collision Avoidance
Packet Formats
Multi-Drop

October 19 - 20, 2016 USB Implementers Forum 2016 22


USB Developer Days 2016

Signaling
Half duplex system
Bit rate is 300kbps
Uses Bi-mark phase Coding (BMC)
A form of Manchester Coding
Signal is DC coupled on USB Type-C CC
Low impedance - nominally 0 - 1.125V
BER < 106 at SNR of 25dB
Typical operating SNR would be higher
CRC-32 used to detect data corruption
Same CRC-32 as USB 3.1

October 19 - 20, 2016 USB Implementers Forum 2016 23


USB Developer Days 2016

BMC Characteristics
2 transitions
for one and
1 transition
for zero

Defined by transmit and receive masks

October 19 - 20, 2016 USB Implementers Forum 2016 24


USB Developer Days 2016

Symbol Coding
4b5b coding scheme
Allows use of K-Codes
Use both single K-Codes and Ordered sets of 4 K-Codes
Start of Packet (SOP*)
Ordered set
Used to address Ports or Cable Plugs (multi-drop)
SOP Communications between the DFP and UFP
SOP Communications with the Cable Plug attached to the DFP
SOP Communications with the Cable Plug attached to the UFP
End of Packet (EOP)
Reset Ordered Sets
Hard Reset Resets both Ports and any Cable Plugs
Cable Reset Resets only Cable Plugs

October 19 - 20, 2016 USB Implementers Forum 2016 25


USB Developer Days 2016

Collision Avoidance
Rp used by the Source to control when Sink can initiate an Atomic Message Sequence (AMS)

Source Rp Sink operation Source operation


1.5A Sink cannot initiate an AMS, but Source can initiate an AMS after
may continue ongoing AMS. at least 16ms (tSinkTx) of setting
Rp to this value.

3A Sink can initiate an AMS. Source cannot initiate an AMS


while it has this value set.

October 19 - 20, 2016 USB Implementers Forum 2016 26


USB Developer Days 2016

Packet Format Control Messages


SOP* (Start Message Header EOP (End Of
Preamble CRC
Of Packet) (16 bit) Packet)

Legend:

PHY Layer Protocol Layer

1. Packet starts with a preamble for receiver training


2. One of the SOP* start of packet K-codes (SOP/SOP/SOP)
3. Header of the message being sent (start of payload)
4. 32-bit CRC
5. End of Packet K-code

Preamble is encoded with 4b/5b


Start of packet, CRC and End of Packet are 4b/5b encoded
Payload is not 4b/5b encoded but is just sent as data

October 19 - 20, 2016 USB Implementers Forum 2016 27


USB Developer Days 2016

Packet Format Data Messages


SOP* (Start Message Header EOP (End Of
Preamble 0..7 Data Object(s) CRC
Of Packet) (16 bit) Packet)

Legend:

PHY Layer Protocol Layer

1. Packet starts with a preamble for receiver training


2. One of the SOP* start of packet K-codes (SOP/SOP/SOP)
3. Header of the message being sent (start of payload)
4. 0..7 data objects (end of payload)
5. 32-bit CRC
6. End of Packet K-code

Preamble is encoded with 4b/5b


Start of packet, CRC and End of Packet are 4b/5b encoded
Payload is not 4b/5b encoded but is just sent as data

October 19 - 20, 2016 USB Implementers Forum 2016 28


USB Developer Days 2016

Packet Format Extended Message


SOP* (Start Message Header Extended Message Header EOP (End Of
Preamble Data (0..260 bytes) CRC
Of Packet) (16 bit) (16 bit) Packet)

Legend:

PHY Layer Protocol Layer

1. Packet starts with a preamble for receiver training


2. One of the SOP* start of packet K-codes (SOP/SOP/SOP)
3. Header of the message being sent (start of payload)
4. Extended Message Header
5. 0..260 bytes of data (end of payload)
6. 32-bit CRC
7. End of Packet K-code

Preamble is encoded with 4b/5b


Start of packet, CRC and End of Packet are 4b/5b encoded
Payload is not 4b/5b encoded but is just sent as data

October 19 - 20, 2016 USB Implementers Forum 2016 29


USB Developer Days 2016

Packet Format - Extended Message - Chunked


SOP* (Start Message Header Extended Message Header EOP (End Of
Chunk 0 Preamble Data (26 bytes) CRC
Of Packet) (16 bit) (16 bit) Packet)

SOP* (Start Message Header Extended Message Header EOP (End Of


Chunk 1 Preamble Data (26 bytes) CRC
Of Packet) (16 bit) (16 bit) Packet)

SOP* (Start Message Header Extended Message Header Data (remaining bytes + EOP (End Of
Chunk n Preamble CRC
Of Packet) (16 bit) (16 bit) padding) Packet)

Legend:

PHY Layer Protocol Layer

Header fields
Chunked bit = 1 -> chunking used since one or both Port Partners doesnt do 260 byte Messages
Chunk number field 0..9 -> Chunk number sent/requested
Request Chunk bit set for a Chunk request (no Data), reset for the returned Chunk
Number of Chunks = Data Size/26 i.e. 26 byte Chunks
Matches legacy Message data payload of 28 bytes
2 byte Extended Message Header + 26 bytes of Data for first chunks (NDO = 7)
Last Chunk remaining data padded to the next Data Object boundary with 0x00
October 19 - 20, 2016 USB Implementers Forum 2016 30
USB Developer Days 2016

Multi-drop
Cable Cable
DFP VCONN Plug Electronically Marked Cable Plug UFP
(SOP) (SOP)

SOP
signaling

SOP
signaling

SOP signaling

Multi-drop Single initiator of multi-drop message


Packet structure unchanged sequences
Start of packet is message address (SOP/SOP) Cable Plug not allowed to initiate messages
Limited access to the new addresses Source can initiate communication SOP prior
Electronically marked cables respond to SOP to an explicit contract
DFP can initiate communication SOP/SOP
Only the VCONN Source can reliably talk to the cable within an explicit contract
Source of VCONN swapped with VCONN_Swap

October 19 - 20, 2016 USB Implementers Forum 2016 31


USB Developer Days 2016

Day 2 Power Delivery Agenda


8:30 Introduction and Architectural Overview
8:55 Physical Layer
9:15 Protocol Layer
9:45 Device Policy
10:00 Break
10:30 Power Supply
11:45 Q&A
12:00 Lunch Exhibit Area Open

October 19 - 20, 2016 USB Implementers Forum 2016 32


USB Developer Days 2016

Messages
Data Objects
Errors
Protocol Attach/Detach Detection
Structured VDMs
Alternate Modes

October 19 - 20, 2016 USB Implementers Forum 2016 33


USB Developer Days 2016

Sending a Message

October 19 - 20, 2016 USB Implementers Forum 2016 34


USB Developer Days 2016

Sending a Message (Retry)

October 19 - 20, 2016 USB Implementers Forum 2016 35


USB Developer Days 2016
Host Power Brick

Extended Messages
Security_Request Chunk
Security
(Number o _Request
f Data Obje
Chunked = cts = 3,
1, Ch u n k N
Request C umber = 0
h u n k = 0, D ,
ata Size =
7)
Host Power Brick
GoodCRC
Security_R
(Data Size equest
= 7, Chunk
ed = 0)

GoodCRC
esponse
Security_R ked = 0)
Security_Response
= 3 Ch u n
0,
(Data Size
esponse
GoodCRC Security_R bjects = 7,
f Data O
(Number o umber = 0
,
1, Ch u n k N
Chunked = D ata Size = 30)
h u n k = 0,
Request C

Extended messages of up to 260 bytes can be GoodCRC

transmitted Security_R
esponse C
(Number o hunk requ
f Data Obje est
Chunked = cts = 1,
The example above is a Security_Request and Request C
1, Ch u n k N
h u n k = 1, D
umber = 1
ata Size =
,

Security_Response 0)

GoodCRC
To maintain compatibility with existing HW Extended esponse
Security_R bjects = 2,
Messages can also be Chunked (Number
d =
o
1
f
,
D
C
at
h
aO
unk Numb
er = 1,
= 30)
Chunke ata Size
u n k = 0, D
Example to the right is the same sequence, but chunked Req u est C h

GoodCRC

October 19 - 20, 2016 USB Implementers Forum 2016 36


USB Developer Days 2016

Messages
Source/Sink Capabilities (Source_Capabilities, Sink_Capabilities, Source_Capabilities_Extended)
Used to advertise a Sources outputs or Sinks required inputs
Type of source (charger, battery)
Voltage/current combinations available/required
Requests
Request capabilities (Get_Source_Cap, Get_Sink_Cap, Get Source_Cap_Extended)
Request status (Get_Status, Status)
Request voltage and/or current (Request)
Request power role change (PR_Swap, FR_Swap)
Request data role change (DR_Swap)
Request Vconn source change (VCONN_Swap)
Accept/Reject/Wait
Possible responses to a request
Alert
Notification after OVP/OCP/OTP
Miscellaneous
GoodCRC Ping
Soft Reset BIST
Power Supply (PS_RDY) VDMs
Not_Supported

October 19 - 20, 2016 USB Implementers Forum 2016 37


USB Developer Days 2016

Error Detection
Various conditions can lead to errors:
Protocol Layer
Missing GoodCRC Retry
MessageID mismatch Lost messages
Policy Engine
Wrong/not received messages during message sequence
Timeout on expected message
e.g. lack of PS_RDY
No response after Hard Reset
Rp or Rd not asserted during PR_Swap

October 19 - 20, 2016 USB Implementers Forum 2016 38


USB Developer Days 2016

Error Recovery
Soft Reset
Reset only the protocol layer
Specific to a particular SOP*
Hard Reset
Resets all SOP* and the power supply
Doesnt impact USB Type-C power role (Rp/Rd unchanged)
USB Type-C VCONN source returned to Source (Rp asserted)
Cable Reset
Resets the cable (SOP/SOP) but not the Port Partners (SOP)
USB Type-C Error Recovery
Performs disconnect and reconnect
Errors unresolved by PD Hard Reset

October 19 - 20, 2016 USB Implementers Forum 2016 39


USB Developer Days 2016

Attach/Detach Detection
Source (Rp asserted)
Presence of Rd indicates port to port attach
Immediately sends Source Capabilities
Absence of Rd indicates detached state
Sink (Rd asserted)
Presence of VBUS is attached to a Source
Responds with GoodCRC to Source Capabilities or
Times out and sends Hard Reset
When VBUS is removed
During PR_Swap connection is retained
During Hard Reset if self-powered and can operate connection is retained
At other times this means detached

October 19 - 20, 2016 USB Implementers Forum 2016 40


USB Developer Days 2016

Vendor Defined Messages


Identify the device or cable
Discover Identity of attached cable or Port Partner
Support of USB Type-C Alternate Modes
Discover SVIDS, Discover Modes
Enter, Exit and manage USB Type-C Alternate Modes of attached device or
cable
Attention for the device to get the hosts attention

October 19 - 20, 2016 USB Implementers Forum 2016 41


USB Developer Days 2016

DFP Electronically Marked Cable UFP

Electronically VBUS VBUS

Marked Cable CC

VCONN
Iso Iso
CC

VCONN
( ) ( )
(Sourced) (Not
sourced)

Ra SOP Ra

GND GND

Discover Identity used to get cable information


HW/FW Version RX/TX Directionality
Connectors VBUS current capability
Latency VBUS end-to-end
Passive/Active SOP controller
VCONN required USB Signalling (2.0, Gen1, Gen 2)

October 19 - 20, 2016 USB Implementers Forum 2016 42


USB Developer Days 2016

Alternate Modes
A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1
GND RX2+ RX2 VBUS SBU1 D D+ CC VBUS TX1 TX1+ GND

GND TX2+ TX2 VBUS VCONN SBU2 VBUS RX1 RX1+ GND
B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12

Alternate modes reconfigure the connector


Repurpose pins to support another bus
Change the mode of operation of a bus
Enable sideband signals
Note: Accessory Mode is not the same

October 19 - 20, 2016 USB Implementers Forum 2016 43


USB Developer Days 2016 Initiator (DFP) Responder (UFP or Cable Plug)
Establish PD Contract

Alternate Mode Process Discover SVID

List of SV
IDs
s

Discover SVIDS
For every DFP supported SVID
Discover Mod
es (SVID)
Device returns the SVIDS for which is
r SVID
has modes Modes fo

Discover Mode Stay in USB


N
Modes
mode
Device returns the modes is has for Supported?

each SVID Y

USB Safe
Host evaluates the intersection of State

the modes it and the device Enter Mode

supports ACK (Resp


onde r sw itched to
Mode)

USB Safe State Initiator and Responder operate using


Mode
Prevent any signaling that appears on N
data wires from damaging USB PHY
May be simple isolation (mux/switch) Exit Mode or PD Hard Reset or
cable unplugged or power
May be very robust PHY inputs removed?

Enter mode SVID + mode Y

Return to USB mode

October 19 - 20, 2016 USB Implementers Forum 2016 44


USB Developer Days 2016

Failure to find an Alternate Mode


Alternate mode device does not receive an Enter Alternate Mode
command
Host does not support PD so does not look for alternate mode devices
Host finds alternate mode devices, but does not support this particular device
Alternate mode device presents either an equivalent USB function
and/or USB Billboard Device interface to the USB stack
BB device provides the OS with information about the alternate mode device
that it can use to inform the user that the host does not support the alternate
mode

October 19 - 20, 2016 USB Implementers Forum 2016 45


USB Developer Days 2016

Day 2 Power Delivery Agenda


8:30 Introduction and Architectural Overview
8:55 Physical Layer
9:15 Protocol Layer
9:45 Device Policy
10:00 Break
10:30 Power Supply
11:45 Q&A
12:00 Lunch Exhibit Area Open

October 19 - 20, 2016 USB Implementers Forum 2016 46


USB Developer Days 2016

Device Policy Manager


Managing Power Needs
Power Reserve
Capability Mismatch
Device Policy Policy Engine
Power Negotiation
Power Role Swap
Fast Role Swap

October 19 - 20, 2016 USB Implementers Forum 2016 47


USB Developer Days 2016

Device Policy Manager


USB Host

System Policy
Manager
One instance per device
Acts across one or more ports
USB hub tree
(optional)
Manages bus traffic
Manages power resources in the
USB Interface
device
(optional)
Monitors and controls the power
PD USB Device supply
Device Policy Manager
Interacts with the cable detection
Source Port
module
Policy Engine
Causes Policy Engine to enact policy
for a given port
Protocol
Power
Source(s)/ Optional USB interface to System
Sink
Policy
USB-C Control Physical Layer

October 19 - 20, 2016 USB Implementers Forum 2016 48


USB Developer Days 2016

Managing Power Needs


Finite power resources on a Provider
Sinks responsible for requesting optimal power
Device Policy Manager balances power needs to ensure smooth
system operation
Also interacts with System Policy, which can use its system wide view
to allocate resources or inform the user of issues

October 19 - 20, 2016 USB Implementers Forum 2016 49


USB Developer Days 2016

Capability Mismatch
Sink may require more than a Source can supply in order to
enumerate on USB:
e.g. needs 2A@20V and can only get 2A@5V
Sink will indicate a Capability Mismatch to end user and also via PD
messaging
Indication can be handled on the Source and also in System Policy

October 19 - 20, 2016 USB Implementers Forum 2016 50


USB Developer Days 2016

Policy Engine
Source/Sink One instance per port, per SOP*
supported
Interacts with Device Policy
Device Policy Manager

Source Port
Manager to determine and
request:
Policy Engine
Power resources for the port
Power source or sink transitions
Protocol Power
Source(s)/
Attached cabling
USB-C Control
Sink
Handles power negotiation,
Physical Layer
swapping, etc.
BMC
Uses Protocol Layer to form
USB Port messages
CC VBUS Handles message timers, errors
and resets

October 19 - 20, 2016 USB Implementers Forum 2016 51


USB Developer Days 2016

Power Negotiation Sequence


Source Cable Plug Sink
Cable Capabilities
(Required for >3A)

Discover Identity (Request, SOP)


VDMResponseTimer

Discover Identity (ACK, SOP)

Source Capabilities
SenderResponseTimer

Request
SenderResponseTimer

Accept
PSTransitionTimer

PS_RDY

October 19 - 20, 2016 USB Implementers Forum 2016 52


USB Developer Days 2016

Initial Sink Initial Source


Fast Role Swap Rd asserted Rp asserted

Stop Sourcing -> Sink


Hub
Fast Swap Signal
(CC driven to GND)
Stop Sinking
HDD
FR_Swap
SenderResponseTimer

Initial Source (Hub) has power removed Accept

Maintains power to downstream peripherals PS SourceOffTimer


Vbus vSafe5V
Initial Source asserts Rd
Stops sourcing power upstream PS_RDY

Needs new power source urgently! New Source is applying vSafe5V


and asserts Rp
PSSourceOnTimer

Signals Fast Swap on CC line PS_RDY

Initial Sink (Laptop) has 5V Source ready to be New Source New Sink

applied quickly
Detects Fast Swap
Waits for VBUS to drop to vSafe5V
Starts Sourcing 5V
In parallel Port Partners start the role swap process
Ensures that Source and Sink roles are aligned

October 19 - 20, 2016 USB Implementers Forum 2016 53


USB Developer Days 2016

Day 2 Power Delivery Agenda


8:30 Introduction and Architectural Overview
8:55 Physical Layer
9:15 Protocol Layer
9:45 Device Policy
10:00 Break
10:30 Power Supply
11:45 Q&A
12:00 Lunch Exhibit Area Open

October 19 - 20, 2016 USB Implementers Forum 2016 54


USB Developer Days 2016

Day 2 Power Delivery Agenda


8:30 Introduction and Architectural Overview
8:55 Physical Layer
9:15 Protocol Layer
9:45 Device Policy
10:00 Break
10:30 Power Supply
11:45 Q&A
12:00 Lunch Exhibit Area Open

October 19 - 20, 2016 USB Implementers Forum 2016 55


USB Developer Days 2016

Architecture Overview
Source & Sink Behaviors
Transitioning Voltage and Current
Power Supply Robust Port Considerations
Swapping Power
PPS Preview

October 19 - 20, 2016 USB Implementers Forum 2016 56


USB Developer Days 2016

Example Source & Sink Configurations


Source
External Power
Sources Dual-Role Power
External Power

System Power System Power

Legacy Legacy
PD Battery Dual-Role Battery
Power Power
Source Port Power Port
Source Source

* must be self powered

VBUS VBUS VBUS VBUS VBUS VBUS VBUS VBUS

Sink
External Power
Sinks Dual-Role Power
External Power

System Power System Power

PD Battery Dual-Role Battery


Sink Port Power Port

* must be self powered


VBUS VBUS

October 19 - 20, 2016 USB Implementers Forum 2016 57


USB Developer Days 2016

VBUS System
SOURCE CABLE SINK

VBUS VBUS
cc cc
BMC BMC
Power Tx/Rx
Refer to
Tx/Rx Load

...

...
Supply USBType-C1.0
GND GND
SHIELD SHIELD

Dedicated communications path using CC conductor


Isolation impedance is not required
The transceiver CC conductor is DC coupled

October 19 - 20, 2016 USB Implementers Forum 2016 58


USB Developer Days 2016

Source Behavior
Backward compatible with legacy VBUS ports.
Supplies default USB 2.0, USB 3.1, USB Type-C Current or BC 1.2
voltage and current to VBUS
When USB cable attached prior to an Explicit Contract
When Hard Reset signaling is received
Returns to vSafe0V for some time then returns to vSafe5V
PD bounds VBUS voltage transitions by undershoot, overshoot and
transition time requirements

October 19 - 20, 2016 USB Implementers Forum 2016 59


USB Developer Days 2016

Source Positive Transitions


Upper bound of valid Source range
+ 0.5 V vSrcValid(max)

105 % vSrcNew(max)

vSrcNew(typ)

95 % vSrcNew(min)

-0.5 V vSrcValid(min)
Lower bound of valid Source range


vSrcSlewPos 30 mV/usec

Starting voltage


t0 tSrcSettle tSrcReady
275 msec 285 msec

The voltage limits to do not apply to vSafe0V and vSafe5V


October 19 - 20, 2016 USB Implementers Forum 2016 60
USB Developer Days 2016

Source Negative Transitions


Starting voltage

vSrcSlewNeg -30 mV/usec

Upper bound of valid Source range


+ 0.5 V vSrcValid(max)

105 % vSrcNew(max)

vSrcNew(typ)

95 % vSrcNew(min)

-0.5 V vSrcValid(min)
Lower bound of valid Source range

t0 tSrcSettle tSrcReady
275 msec 285 msec

The voltage limits to do not apply to vSafe0V and vSafe5V


October 19 - 20, 2016 USB Implementers Forum 2016 61
USB Developer Days 2016

Application of vSrcNew & vSrcValid after tSrcReady


5 msec
+ 0.5 V vSrcValid(max)
tSrcTransient windows
105 % vSrcNew(max)

vSrcNew(typ)

95 % vSrcNew(min)
tSrcTransient window
-0.5 V vSrcValid(min) 5 msec


Sink Load I2

iLoadReleaseRate
iLoadStepRate -150 mA/usec


150 mA/usec

Sink Load I1

tSrcReady
285 msec

USB Implementers Forum 2016 62


USB Developer Days 2016

Sink Behavior
Backwards compatible with legacy VBUS ports
Draws default USB 2.0, USB 3.1, USB Type-C Current or BC 1.2 VBUS
current at default voltage
When the USB cable is attached prior to an Explicit Contract
When responding to a Hard Reset
Returns to the default USB 2.0, USB 3.1, USB Type-C Current or BC 1.2 VBUS
current at default voltage
Controls VBUS in-rush current when increasing current consumption

October 19 - 20, 2016 USB Implementers Forum 2016 63


USB Developer Days 2016

Transition to Increase Voltage


1 5
tSrcTransition
Source Port Send Send
Policy Engine Accept PS_RDY
Port to Port
2 6
Evaluate
PSTransitionTimer (running)
Evaluate
Messaging
Sink Port
Policy Engine Accept PS_RDY

4
Source Port Source
Device Policy Mgr V
Source Port
Source Port Interaction
Source VOLD t2 Source VNEW
Power Supply

3 7 8
Sink to Sink Sink Standby
Sink Port
Standby ... to Sink
Device Policy Mgr
Sink Port
Sink Port Interaction
Sink IOLD t1 Sink pSnkStdby t3 Sink IOLD
Power Supply

Source Port
VNEW
Voltage
Source
VOLD VBUS Voltage

Sink Port I2
IOLD IOLD
Current
I1 Sink
VBUS Current


I1

I1 (pSnkStdby/VBUS) I2 (pSnkStdby/VBUS) + cSnkBulkPd(DVBUS/Dt)

October 19 - 20, 2016 USB Implementers Forum 2016 64


USB Developer Days 2016

Transition to Increase Current


1 4
tSrcTransition
Source Port Send Send
Policy Engine Accept PS_RDY
Port to Port
2 5
Evaluate
PSTransitionTimer (running)
Evaluate
Messaging
Sink Port
Policy Engine Accept PS_RDY

3
Source Port Source
Device Policy Mgr I
Source Port
Source Port Interaction
Source VOLD t1 Source VOLD
Power Supply

6 7
Sink
Sink Port ... I
Device Policy Mgr
Sink Port
Sink Port Interaction
Sink IOLD t2 Sink INEW
Power Supply

Source Port
VBUS doesnt change
Voltage
Source
VBUS Voltage

Sink Port
INEW
Current
IOLD Sink


VBUS Current

October 19 - 20, 2016 USB Implementers Forum 2016 65


USB Developer Days 2016

Transition to Increase Power


1 5
tSrcTransition
Source Port Send Send
Policy Engine Accept PS_RDY
Port to Port
2 6 Messaging
PSTransitionTimer (running)
Sink Port Evaluate Evaluate
Policy Engine Accept PS_RDY

4
Source Port Source
Device Policy Mgr VI
Source Port
Source Port
Interaction
Source VOLD t2 Source VNEW
Power Supply

3 7 8
Sink to Sink Sink Standby
Sink Port
Standby ... to Sink
Device Policy Mgr
Sink Port
Sink Port
Interaction
Sink IOLD t1 Sink pSnkStdby t3 Sink INEW
Power Supply

Source Port
VNEW
Voltage Source
VOLD
VBUS Voltage

Sink Port I2
INEW
Current Sink
IOLD
I1 VBUS Current


I1

I1 (pSnkStdby/VBUS) I2 (pSnkStdby/VBUS) + cSnkBulkPd(DVBUS/Dt)

October 19 - 20, 2016 USB Implementers Forum 2016 66


USB Developer Days 2016

Port Robustness Philosophy


Sources protect themselves
Sources shall not rely on Sinks for protection

Sinks protect themselves


Sinks shall not rely on Sources for protection

Robust Source and Sink design does not equate


to regulatory safety compliance
USB Implementers Forum 2016 67
USB Developer Days 2016

Robust Source Port Considerations


Output Over Current Protection

Over Temperature Protection

vSafe5V to vSafe5V Connection

VBUS Discharge at Detach

Note: Sources are required to protect themselves from


damage. Source protection mechanisms are not expected to
protect Sinks.

USB Implementers Forum 2016 68


USB Developer Days 2016

Robust Sink Port Considerations

Input Over Voltage Protection

Over Temperature Protection

VBUS Discharge at Detach

Note: Sinks are required to protect themselves from


damage. Sink protection mechanisms are not expected to
protect Sources.

USB Implementers Forum 2016 69


USB Developer Days 2016

VBUS & VCONN Relationship During Hard Reset


Old voltage


vSafe5V(max), VCONN(max)
5.5 V 5.5 V

0.8 V vSafe0V(max)

150 mV vVconnDischarge
0V
t0
-0.3 V
vSrcNeg(max)
250 msec tVconnDischarge tVconnOn 2 msec

1 sec
275 msec tSafe5V
tSrcRecover
275 msec
tSafe0V tSrcTurnOn
650 msec

USB Implementers Forum 2016 70


USB Developer Days 2016

Swapping Power on VBUS & VCONN


Power Role Swap
Method to swap Source and Sink VBUS power roles between two ports

Fast Role Swap


Method to swap VBUS power between two Sources powering a pass-thru device

VCONN Swap
Method used to source VCONN from different ends of the cable

The data roles are not affected by power swaps

USB Implementers Forum 2016 71


USB Developer Days 2016

Power Role Swap


Before the Power Role Swap After the Power Role Swap

SOURCE SINK Power Role Swap SINK SOURCE

DRP DRP DRP DRP

*** Data Roles do not change during Power Role swap ***

Applies to 1-to-1 power connections between DRPs


Initiated using PD messaging by either the Source or the Sink
PD messaging is used to manage the power change over
VBUS transitions to vSafe0V during the VBUS change over
Post power role Swap VBUS voltage is vSafe5V

USB Implementers Forum 2016 72


USB Developer Days 2016

Power Role Swap Transition Diagram


2 4 8
PSSourceOnTimer (running)
Initial Source Port Evaluate Send Evaluate
Policy Engine Accept PS_RDY PS_RDY
tSrcTransition Port to Port
1 5 7
Send
PSSourceOffTimer (running)
Evaluate Send
Messaging
Initial Sink Port
Policy Engine Accept PS_RDY PS_RDY

Initial Source 3 9 New Sink


Initial Source Port Source to Swap Standby
Device Policy Mgr Swap Standby to Sink
Rp to Rd
Source Port
Source Sink Interaction
Source VOLD t2 Swap Standby t4 Sink default current
Power Supply

Initial Sink 2a 6 New Source


Initial Sink Port Sink to Swap Swap Standby
Device Policy Mgr Standby to Source
Rd to Rp
Sink Port
Sink Source Interaction
Sink IOLD t1 Swap Standby t3 Source vSafe5V
Power Supply

Source Port
VOLD
Voltage vSafe5V
Source
VBUS Voltage
Initial Source New Source
not driven

Sink Port
IOLD
Current pSnkSusp
Sink
I2
I1 VBUS Current
Initial Sink I1 New Sink
not driven
I1 iSnkSwapStdby I2 I2 iSnkSwapStdby + cSnkBulkPd(DVBUS/Dt)

USB Implementers Forum 2016 73


USB Developer Days 2016

Fast Role Swap (FRS)


Before the Fast Role Swap After the Fast Role Swap

Sink Fast Role Swap GONE! Source

Charger
Charge-thru
Hub
DRP
X
Charger
Charge-thru
Hub
DRP

*** Data Roles do not change during Fast Role Swap ***
Power Power
USB USB
Device Device

PD negotiation discovers if the DRP supports FRS


The charge-thru hub monitors Charger VBUS to signal FRS to the DRP
VBUS can only droop below vSafe5V for 150 usec
Why? Needs to be fast for practical Charger hold up capacitance

USB Implementers Forum 2016 74


USB Developer Days 2016

Fast Role Swap Transition Diagram B 2 3 5 8


Signal Evaluate Send Send Evaluate
Source Port Fast Swap FR_Swap Accept PS_RDY PS_RDY
Policy Engine Port to Port
C 1 4 6 7 Signaling &
Detect tFRSwapInit Send Evaluate Evaluate Send
Sink Port Messaging
Fast Swap FR_Swap Accept PS_RDY PS_RDY
Policy Engine

A D1 F
Source Port Source VBUS < Change
Device Policy Mgr Stops vSafe5V Rp to Rd
Source Port
Source Port Interaction
Power Path Source Sink

D2 E G
VBUS < < tSrcFRSwap Source Change
Sink Port
vSafe5V VBUS Rd to Rp
Device Policy Mgr
Sink Port
Sink Port Interaction
Sink Ready & Able to Source vSafe5V Source vSafe5V
Power Path

Source Port
Old Source
Voltage discharging to
vSafe0 V New Source = vSafe5V Source
VBUS Voltage

Sink Port
s
Current ischarge
voltage d New Sink
Sink
t as VBUS
crease in curren
ts the in VBUS Current
Old Sink Represen

USB Implementers Forum 2016 75


USB Developer Days 2016

VCONN Swap
Supported by any port that can operate as VCONN source
Either port partner can send the VCONN_Swap Message
The recipient responds with either Accept, Reject or Wait Messages
An Accept Message response starts a make-before-break change over
A Reject Message response indicates a VCONN Swap will not occur
A Wait Message response indicates try a VCONN Swap sometime later

USB Implementers Forum 2016 76


USB Developer Days 2016

Some Words of Caution


Only design to official released versions of USB specifications
Developer presentations are intended to help familiarize you with the general
characteristics of these specifications and provide design guidance
These presentations are not technically complete and should not be used as the sole
basis for product designs

USB technology has evolved into highly complex and challenging designs
When possible, make use of certified product suppliers silicon, connectors, etc.
Proper materials and manufacturing processes are increasingly more critical to
making successful certified products
Submit your products for USB certification

October 19 - 20, 2016 USB Implementers Forum 2016 77


USB Developer Days 2016

Coming Soon Programmable Power Supply (PPS)


Provides a continuously adjustable output voltage power source
Exhibits a monotonic transfer characteristic across a voltage range
Allows for single step or multi-step voltage changes
Minimum transition time bound by 30 mV/usec slew rate
Maximum transition time in the range of 10s of msec
Current is determined by PD contract
Sinks do not transition to Sink Standby during PPS voltage changes

USB Implementers Forum 2016 78


USB Developer Days 2016

Why define a PPS ?


Granular VBUS control
10s of mV resolution, big and small voltage changes are supported

Power path optimization


It is possible to optimize the efficiency and thermal performance

Sink input VBUS control


It is possible for the Sink to set its optimal input operating voltage
It is possible to adjust for cable loss

Sinks do not transition to Sink Standby during PPS voltage changes

USB Implementers Forum 2016 79


USB Developer Days 2016

PPS Framework
V(4) > V(3) Nominal PPS Maximum Voltage V(4)

Programmable Power Supply Output Range


vPpsSlewPos


V(3) > V(2) vPpsValid
Nominal V(3)


vPpsNew

vPpsValid

PPS Maximum Voltage


vPpsSlewPos

V(3) = (301+n) absolute level



V(2) > V(1) vPpsValid
Nominal V(2)


vPpsNew

V(2) = 301 absolute level


vPpsSlewPos
vPpsValid
Nominal PPS Minimum Voltage (3.0V) V(1)

300 absolute level



0 Volts

USB Implementers Forum 2016 80


USB Developer Days 2016

PPS Charging Application

PPS VBUS Local voltage &


Adapter CC current regulation

Battery Monitoring
& Safety

Sink

PPS based charging must still support 5V charging


The PPS is not intended to replace charging control in the Sink
The PPS is not taking extra precautions to protect the battery

USB Implementers Forum 2016 81


USB Developer Days 2016

PPS Charging Application Safe & Pre-Charge


Likely Safe & Pre-Charge Scenario
(VBAT)
PPS adapter voltage may not vary
Sink regulation controls battery SOC
Battery Current

Battery Voltage
PPS VBUS Local voltage &
Adapter CC current regulation

Battery Monitoring
(IBAT) & Safety

Sink

safe pre constant current constant voltage eoc

USB Implementers Forum 2016 82


USB Developer Days 2016

PPS Charging Application Constant Current Charge


Likely Constant Current Scenario
(VBAT)
Sink actively controls PPS adapter voltage
Sink regulation controls battery SOC
Battery Current

Battery Voltage
PPS VBUS Local voltage &
Adapter CC current regulation

Battery Monitoring
(IBAT) & Safety

Sink

safe pre constant current constant voltage eoc

USB Implementers Forum 2016 83


USB Developer Days 2016

PPS Charging Application Constant Voltage Charge


Likely Constant Voltage Scenario
(VBAT)
PPS adapter voltage may not vary
Sink regulation controls battery SOC
Battery Current

Battery Voltage
PPS VBUS Local voltage &
Adapter CC current regulation

Battery Monitoring
(IBAT) & Safety

Sink

safe pre constant current constant voltage eoc

USB Implementers Forum 2016 84


USB Developer Days 2016

Power Delivery is Alive and Growing


Fast Role Swap for bus powered pass through applications
Other application uses cases may evolve over time

Programmable Power Supply for adjustable VBUS applications


Paves the way for optimized VBUS power transfer
Creates a standardized method to control VBUS voltage

Clearly defined Source and Sink robustness philosophy


Sources must protect themselves
Sinks must protect themselves
Neither shall rely on the other for protection

USB Implementers Forum 2016 85


USB Developer Days 2016

Day 2 Power Delivery Agenda


8:30 Introduction and Architectural Overview
8:55 Physical Layer
9:15 Protocol Layer
9:45 Device Policy
10:00 Break
10:30 Power Supply
11:45 Q&A
12:00 Lunch Exhibit Area Open

October 19 - 20, 2016 USB Implementers Forum 2016 86


USB Developer Days 2016

Q&A

October 19 - 20, 2016 USB Implementers Forum 2016 87


USB Developer Days 2016

Day 2 Power Delivery Agenda


8:30 Introduction and Architectural Overview
8:55 Physical Layer
9:15 Protocol Layer
9:45 Device Policy
10:00 Break
10:30 Power Supply
11:30 System Policy
11:40 Q&A
12:00 Lunch Exhibit Area Open

October 19 - 20, 2016 USB Implementers Forum 2016 88

You might also like