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SpyGlass-CDC
Industry’s Most Comprehensive, Practical, THINK
Among the many verification challenges confronting system-on-chip (SoC) designers today, clock domain
crossings (CDC) rank near the top in difficulty. Today's SoCs have dozens or sometimes even hundreds
of clock domains, many of them difficult to verify using conventional simulation or static timing analysis(STA).
For these bugs to be detected in simulation, it requires long simulation runs and a chance encounter and
STA does not check for asynchronous clock domains. As a consequence, CDCs have become a leading
cause of design errors. Such errors can add significant time and expense to the design-and-debug cycle,
and may even find their way into silicon, necessitating costly re-spins.
The Problem
The success of static CDC verification tools is synchronization mechanisms. Both can be difficult
determined by two critical measures--the time or impossible to accurately verify using simulation.
taken to signoff and the completeness of CDC Conventional static CDC analysis tools do too
verification. Conventional CDC analysis tools little and too much at the same time,
fall short in both areas. They generate large simultaneously overlooking real design errors
amounts of noise (false violations) extending the and over-reporting large numbers of false
verification cycle--and provide poor coverage of violations. As a result the user is forced into an
complex CDC synchronization schemes. endless bug-hunting process, which often
discourages the designer and leaves real bugs
Two particularly troublesome CDC-related issues undetected.
involve FIFO- and handshake-based
SpyGlass-CDC Methodology
Provides an easy-to-use and a comprehensive Walks users through a series of recommended
method for solving CDC problems at RTL to avoid steps to analyze CDC problems at block level
costly silicon re-spins as well as chip level - the steps include design
setup, setup checks, design-unit integration, chip
Provides methodology documentation and rule- level CDC verification, report review and CDC
sets as part of the product software installation verification sign-off
SpyGlass-CDC
Separating True From False Violations
In order to isolate real clock domain crossing Fig 2: Functional Checks for Handshake
issues, it is necessary to detect various
synchronization schemes--not just basic two-flop Handshake1 check
or multi-flop synchronizers, but more complex REQ
mechanisms, such as handshakes and FIFO based DATA
schemes. Once detected, these synchronizers Violation: Data changing while request is active
need to be verified as working correctly.
Handshake2 check
Both detection and verification have their own REQ
N cycle window
set of challenges, but when done properly, tools ACK
can confidently claim correctness of these clock Violation: ACK does not become active within N cycles
domain crossings. This knowledge can be used after REQ (default N=5 cycles)
clk_A clk_A
Other CDC tools DATA BUS DATA BUS
write _en read _en
clk_A report these as clk_B
CDC violations clk_A Write Read clk_B
write_ read_
Domain FSM addr FSM Domain
FIFO memory array addr
clk_A DATA BUS
clk_B
EN EN Empty
Domain Domain Full
REQ
compar- synchronize synchronize compar-
Sender Receiver ator read_addr write_addr ator
Handshake clk_B Handshake
clk_A FSM ACK FSM clk_B
Binary Gray to
clk_A to Gray Binary
However, the crossing cannot be considered safe SpyGlass-CDC not only automatically identifies
until its functionality is proven to be correct. the above FIFO scheme but also performs formal
Therefore, SpyGlass-CDC also formally verifies checking for data stability (on double-flop
to see if the following conditions can be violated synchronizers), and re-convergence signals (from
(Fig 2). the gray encoder).
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