Assignment

1) Write any two differences between i3, i5 and i7 processors. [1M]

Ans)

2) Write an Assembly language program to send the data 7AH and 1234H to the two output
ports whose addresses are 126EH and 34H respectively and load the same data into the
registers CL and BX from input ports whose addresses are 33H and 3456H respectively.
Initiates the AX register to 0000H.Write a loop to increment the value of AX up to 200
times and send the every increment value of AX to the output port whose address is of
4567H. [3M]

Ans) MOV AL,7AH

MOV DX,126EH
OUT DX,AL
MOV AX,1234H
OUT 24H,AX
IN AL,33H
MOV CL,AL
MOV DX,3456H
IN AX,DX
MOV BX,AX
MOV AX,0000H
NEXT: INC AX
MOV DX,4567H
OUT DX,AX
CMP AX,C8H (200 TIMES)
JNZ NEXT
HLT.
3) Analyze the below program and write the result of AX, BX, CX and Flags [2M]
assume cs:code,ds:data
data segment
org 2000h
series db 0f1h,16h,17h,14h,15h
sum db ?
car db ?
data ends
code segment
start: mov ax,data
mov ds,ax
mov ax,0000h
mov bx,0000h
mov cx,0005h
mov si,2000h
go: add al,[si]
adc bl,00h
inc si
dec cx
jnz go
mov sum,al
mov car,bl
mov ah,4ch
int 21h
code ends
end start

Ans) AL=47H, BL=01H, CX=0000H, and Flags – S=0, P=1, Z=1, C=0, A=0

4) What are the flags effected after performing addition on following data NUM1 =87h and
NUM2=F7H. Write the result and flags contents also. [1M]

Ans) AX=007EH and Flags C=1, Z=0, S=0, O=1, P=1, A=0

5) Write an assembly language program (Just Logic Only) for controlling the traffic lights
with the below mentioned conditions. Port 4 is used whose address is of 4h and it
contains 16 I/O Pins. [3M]

Note: Port 4 (16 bit – 16 I/O Pins) -- 0,3,6,9 are red lights,
2, 5, 8, B are green lights.
1, 4, 7, A are yellow lights.
i) Turnoff all the Lights in all ii) Red light must be turned on in all
direction as shown in the below. directions.

iii) Only one green light must be turned on and write some delay using LOOP. Till the
loop breaks, only green light must be turned on, remaining all red.

Green Light is glowing

Red Lights
Turned on

iv) Same (iii) condition is repeated for below mentioned diagrams.

v) Finally turned on all red lights in all directions.

Ans) MOV AX,0000000000000000B
OUT 4H,AX
LABEL: MOV AX,0000001001001001B
OUT 4H,AX
MOV AX,0000001100001001B
OUT 4H,AX
MOV CX,0005H
NEXT7: MOV AX,004CH
NEXT: DEC AX
JNZ NEXT
LOOP NEXT7
MOV AX,0000100001001001B
OUT 4H,AX
MOV CX,0005H
NEXT1: MOV AX,004CH
NEXT4: DEC AX
JNZ NEXT4
LOOP NEXT1
MOV AX,0000001001001100B
OUT 4H,AX
MOV CX,0005H
NEXT2: MOV AX,004CH
NEXT5: DEC AX
JNZ NEXT5
LOOP NEXT2
MOV AX,0000001001100001B
OUT 4H,AX
MOV CX,0005H
NEXT3: MOV AX,004CH
NEXT6: DEC AX
JNZ NEXT6
LOOP NEXT3
JMP LABEL
 MID EXAM KEY
1) Define the following registers from 8086 [3M]
1) DS 2) IP 3) SI

Ans) 1) DS: DS register hold the upper 16 bit of the starting address of the segment which is
used for data.
2) IP: The Instruction Pointer is a register that holds the address of the next instruction
to be fetched from memory. It contains the offset of the next word of instruction code
instead of its actual address. It is associated with the CS register only.
3) SI: SI can be used to hold the offset of a data word in the data segment. In this case,
20 bit physical data address is calculated from SI and DS.

2) Discuss the below mentioned instructions with examples

1) POP DX -- consider the data is F62BH from stack [2.5M]

pop from stack this instruction when executed, loads the specified register/memory location
with the contents of the memory location of which address is formed using the current stack
segment and stack pointer. The stack pointer is incremented by 2.The operation is as follows:

1) Contents of stack top memory location is stored in DL and SP is incremented by one.

2) Further contents of memory location pointed to by SP are copied to DH and SP is again
incremented by 1.
e.g. POP DX

2) IN – Discuss 16 bit and 8 bit input port with examples. [2.5M]

Input the Port this instruction is used for reading an input port. The address of the input port
may be specified in the instruction directly or indirectly. AL and AX are the allowed destination
for 16 bit and 8 bit input operation. DX is the only register which is allowed to carry the port
address.
E.g. 1) IN AL,03H; This instruction reads data from an 8 bit port whose address is 03H and
Stores in AL
2) IN AX,DX; This instruction reads data from a 16 bit port address whose address is in
DX and stores in AX.
3) MOV DX,0800H
IN AX,DX
 3) Discuss memory organization briefly [4M]

 Ans) 8086 supports 220=1,048,576 (1 Mbytes) of memory over the address range
00000H to FFFFFH.

 Two Consecutive bytes can be accessed as one word (16 bits). The lower-addressed byte is the
least significant byte of the word and the higher addressed-byte is the most significant byte of
the word.

 Address of the lower byte of word is called address of the full word.

 Memory space of 1MB is divided into two chips called banks of 512KB each having even and
odd addresses because commercially available memory chips are only byte size i.e. they can
store only one byte in a memory location but as 8086 is capable to read/write 16 bit (2 bytes) at
a time. So, we need to use two chips for 16 bit operation.

 Two banks have alternate addresses because 16 bit words are stored in consecutive
locations and at the same time 8086 must access both banks simultaneously for 16 bit
operation. Suppose if we use only one chip of 1MB, 8086 could read only 1 byte at a time.
Thus, would need two operations for every 16 bit operation. Then, finally process would have
been slower.
 4) i) Discuss Instruction Queue briefly [3M]

 It is a 6 byte instruction queue

 To speed up program execution, the BIU fetches six instruction bytes.
 These pre-fetched instruction bytes are held for the execution unit in a
group of registers called “queue”.
 It is possible to fetch next instruction when current instruction is in execution.
 The queue operates on the principle of First in First out (FIFO). So that, execution unit gets
the instruction for execution in the order they are fetched.
 Feature of fetching the next instruction while the current instruction is executing is called
“pipelining”.

ii) How many conditional flags are affected by adding 1B8DH and FC5AH. Write those
affected flags values also and neglect Sign Flag. [2.5M]

Ans) 3 flags are affected; those are Carry Flag, Parity Flag and Auxiliary Flag.

Opr1 (1B8DH) = 0001 1011 1000 1101

Opr2 (FC5AH) = 1111 1100 0101 1010

[1] 0001 0111 1110 0111

CF=1, PF=1, and AF=1 and result is 17E7H.

5) Discuss the generation of 20 bit physical address by using DS =E7B5H and SI =

1FDCH registers.
 To access a specific memory location from any segment, we need 20 bit physical address.
 The 8086 generates this address using the contents of segment registers and the offset register
associated with it.
 For example, DS register holds the base address of the data segment.
The 8086 provides a source index register SI which holds the 16 bit address of the memory
location within the data segment. The value contained in the SI is referred as “offset”
 This value must be added to the segment base address of DS to produce the required 20 bit
physical address.
 Before adding this, the contents of the DS register are multiplied by 16 or shifted by 4
positions to the left by inserting 4 zero bits.
 E.g.: DS = E7B5H and SI = 1FDCH then PA = E9B2CH.

DS = E7B5H= 1110 0111 1011 0101 (Segment Address left shifted with appended zeros)

DS = 0E7B5H = 1110 0111 1011 0101 0000

SI = 1FDCH = 0001 1111 1101 1100
1110 1001 1011 0010 1100
(E 9 B 2 C)