Excel Review Center
Channel current is reduced on application
of a more positive voltage to the GATE of
the depletion mode n – channel MOSFET.
False
MOSFET can be used as a
Voltage controlled capacitor
The effective channel length of a
MOSFET in saturation decreases with
increase in
Drain voltage
For an n – channel enhancement type
MOSFET, if the source is connected at a
higher potential than that of the bulk (i.e.
VSB > 0), the threshold voltage VT of the
MOSFET will
Increase
A MOS capacitor made using p – type
substrate is in accumulation mode. The
dominant charge in the channel is due to
the presence of
Holes
The drain current of a MOSFET in
saturation is given by ID = K (VGS -VT )2
where K is a constant. The magnitude of
the transconductance gm is
2K(VGS -VT )
(Ans.)
At room temperature, a possible value for
the mobility of electrons in the inversion
layer of a silicon n – channel MOSFET is
1350 cm2/V-s
In a MOSFET operating in the saturation
region, the channel length modulation
effect causes
A decrease in the output resistance
In IC technology, dry oxidation (using dry
oxygen) as compared to wet oxidation
(using steam or water vapour) produces
Superior quality oxide with a lower
growth rate
In following circuit employing pass
transistor logic, all NMOS transistor are
identical with a threshold voltage of 1V.
Ignoring the body – effect, the output out-
put voltage at P, Q and R are
4 V, 4 V, 4 V
If fixed positive charges are present in the
gate oxide of an n – channel enhancement
type MOSFET, it will lead to
A decrease in the threshold voltage
In CMOS technology, shallow P – well or
N – well regions can be formed using
ECE Refresher/Coaching
Low energy ion – implantation
In MOSFET fabrication, the channel
length is defined during the process of
Poly – silicon gate patterning
Which one of the following processes is
preferred to from the gate dielectric
(SiO2) of MOSFETs?
Dry oxidation
Consider the following statements for a
metal oxide semiconductor field effect
transistor (MOSFET):
P: As channel length reduces, OFF –
state current increases.
Q: As channel length reduces, output
resistance increases.
R: As channel length reduces, threshold
voltage remains constant.
S: As channel reduces, ON current
increases.
Which of the above statements are
INCORRECT?
A. P and Q
B. P and S
C. Q and R
D. R and S
A long – channel NMOS transistor is
biased in the liner region VDS=50mV and
is used as a resistance. Which one of the
following statements is NOT correct?
If VGS is increased, the resistance
increases.
The figure shows the band diagram of a
Metal Oxide Semiconductor (MOS). The
surface region of this MOS is in
Inversion
In MOSFET devices the N-channel type
is better than the P – Channel type in the
following respects.
It is faster
In MOSFET devices the N-channel type
is better than the P – Channel type in the
following respects.
It is faster
Which of the following effects can be
caused by a rise in the temperature?
Increase in BJT current (IC)
Decrease in MOSFET current (IDS)
The FET that has the best switching speed
performance is:
1
Elec TH 8
CMOS *
A CMOS inverter is biased with a +10
Volts VGS supply. The input to the
inverter varies between zero Volts and
+10 Volts. When the input to the inverter
is +10 Volts the output from the circuit
will be:
Zero Volts *
The primary difference between BJT and
FET types of transistors is:
BJTs are current controlled and FETs are
voltage controlled *
The Field Effect Transistor has:
A. N-channel type
B. A P-channel type
C. Unipolar structure
D. All of the above *
The measured transconductance gm of an
NMOS transistor operating in the linear
region is plotted against voltage VG at a
Constant drain voltage VD. Which of the
following figures represent the expected
dependence of gm on VG?
Ans. C
Consider the following two situations
about the internal conditions in an n –
channel MOSFET operating in the active
region.
S1: The inversion charge decreases
from source to drain
S2 : The channel potential increases
from source to drain
Which of the following is correct?
A. Only S2 is true
B. Both S1 and S2 are false
C. Both S1 and S2 are true but S2 is not
a reason for S1
D. Both S1 and S2 are true and S2 is
reason for S1
A BJT is a ____ controlled device while
the FET is a ____ controlled device.
Current ; voltage *
The three regions of operations for the
FET are ______; _______; and _______.
Ohmic ; saturation ; breakdown *
In the ohmic region the channel behaves
like a ______.
Voltage controlled resistor *
Excel Review Center
The maximum current in a JFET is
defined as IDSS and occurs when VGS is
equal to _____.
Zero Volts *
Shockley’s equation defines the ______
_______ of the FET and are unaffected by
the network in which the device in
employed.
Transfer characteristics *
The drain characteristics for a FET that
you see on a curve tracer are drawn for
equal step increases in the VGS values, yet
they are spaced further apart as VGS gets
closer to zero. Why?
Due to the square relation between ID and
VGS, as VGS gets closer to zero ID
increases faster so the curves are spaced
apart further. *
The depletion type of MOSFET can
operate in the:
In the depletion mode and the
enhancement mode*
For an N-channel depletion type of
MOSFET if VGS > 0 then IDSS will be
_____ ID.
Less than *
For VGS <VTH in enhancement MOSFET
the drain current will be:
Zero µA *
The enhancement type of MOSFET
operate in the:
Enhancement mode only *
Many MOSFET devices now contain
internal _____ that protect these devices
from static electricity.
Back to back zener diodes *
FETs usually:
A. Are smaller in construction than BJTs
B. Are less sensitive to temperature
change than BJTs
C. Have a higher input impedance than
BJTs
D. Are less sensitivity to applied signals
than BJTs
E. All of the above *
The level of drain to source voltage where
it appears that the two depletions regions
touch is known as:
Pinch-off *
The FET is a:
Voltage-controlled device *
The ______ terminal of the JFET is the
equivalent of the collector terminal of a
BJT.
Drain *
The ______ terminal of the JFET is the
equivalent of the base terminal of a BJT.
Gate *
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The ______ terminal of the JFET is the
equivalent of the emitter terminal of a
BJT.
Source *
The ______JFET uses a positive drain
supply voltage
N-channel *
The region of the characteristic curve
family for the junction FET that is
normally used linear amplification is:
A. The constant-current region
B. The saturation region
C. The linear amplification region
D. All of the above *
The collector current Ic of a BJT flows
through two junctions. The drain current
of an FET Id flow through
_____junctions.
0 *
As the channel width of a JFET decreases,
the source-to-drain resistance of the
device:
Increases *
Which of the following is usually used to
control the channel width of a given
JFET?
The gate-to source voltage *
The region of the JFET drain curve that
lies between pinch-off and breakdown is
called:
The saturation region *
The value of gate-to-source voltage that
causes the drain current to reach its
maximum value at a given of drain
voltage is called:
VDmax *
The FET transfer characteristic curve is
defined by Shockley’s equation and is:
Unaffected by the network it is used in *
What two parameters represent the FET
transfer characteristics?
Gate-to-source voltage and drain current
* B. Higher current capability
The value of drain current is always ____
the value of the short circuit drain current
IDSS for a given JFET.
Less than or equal to *
The enhancement –type and the depletion-
type FETs are subclasses of:
Metal-oxide-semiconductor FETs *
The depletion-type MOSFET has
specifications and many characteristics
that are similar to:
The JFET *
Which of the following FETs is the best
choice when the gate-to-source voltage
has both positive and negative swings?
CMOS *
2
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MOSFETs typically have an input
impedance value that is:
Higher than the JFET *
D-MOSFETs can operate in:
A. The depletion mode only
B. The enhancement mode only
C. The depletion mode and the
enhancement mode
D. All of the above *
MOSFETs are also referred to as:
IGFETs *
Which of the following is true for an N-
channel D-MOSFET that is being
operated in the depletion mode?
ID > IDSS and VGS is negative *
For levels of gate-to-source voltage
greater than the threshold voltage, the
drain current is directly related to the:
Square of the difference between the gate-
source voltage and the threshold voltage
*
For a gate-to-drain voltage less than the
threshold level the drain current of an
enhancement-type the drain current of an
enhancement-type MOSFET is:
0.0 mA *
The E-MOSFET can operate in:
The enhancement mode only *
A major disadvantage of MOSFETs is:
That it is sensitive to electrostatic
discharges *
Many MOSFET devices devices now
contain internal _____ that protect them
from static electricity.
Zener diodes *
The power-handling levels of a MOSFET
Is usually less than one watt *
When compared with commercially
available planar MOSFETs, VMOS FETs
have:
A. Reduced channel resistance
C. Higher power ratings
D. A positive temperature coefficient
E. All of the above *
The VMOS FET typically has switching
times that are:
½ times that of the typical BJT *
VMOS is a special-type purpose type of:
E-MOSFET *
A relatively high input impedance, fast
switching speeds, and low operating
power describe the characteristics of the
____ family.
CMOST FET *
The FET that typically has the best
switching speed performance speed is:
CMOS *
Excel Review Center
CMOS stands for:
Complementary MOS *
A CMOS inverter has +10V VSS supply
and an input that varies between 0 V and
+10 V. When the input to the circuit is
+10V, the output from the circuit is:
0V *
A JFET can be biased in several different
ways. The common method(s) of biasing
an N-Channel JFET is (are) ____.
A. Self-bias configuration
B. Voltage divider bias configuration
C. Fixed-bias configuration
D. All of above *
In a self-bias circuit for an N-channel
JFET transistor the bias voltage VGS is
developed across the resistor connected to
the _____.
source *
In a self-bias circuit for an N-channel
JFET transistor the self-bias line _____.
Is slanted and passes through origin *
In a voltage divider-bias circuit for an N-
channel JFET transistor the bias line
_____.
Is slanted and passing through the ID and
the VGS axis on the positive side *
There are many similarities between the
transfer curves of JFETs and the depletion
type MOSFETs so they permit similar
analysis of each in the dc domain. The
primary difference, for an N-channel
device, between the two is the fact that
depletion-type MOSFETs permit
operating points with _____ values of VGS
and levels of ID that _____ IDSS.
Positive ; exceed *
In the enhancement type of MOSFET the
channel is formed when the gate-to-source
voltage ____ the _____ voltage.
Exceeds ; threshold *
Generally, it is a good design practice
linear amplifiers to choose the operating
point that is approximately ______.
Near the cut-off region *
The analysis that we mostly work with is
that of the N-channel device. For P-
channel devices the transfer curve
employed is the _____ image and the
defined current directions are _____.
Mirror ; reversed *
It is important to remember that when the
JFET is used as a voltage variable
resistor, which is one of its practical
applications, the voltage VDS is _____
VDS(max) and IVGSI is _____ IVpI.
Very much less than ; very much less
than *
One of the most important factors that
affect the stability of a system is
temperature variation. As the system hets
ECE Refresher/Coaching Elec TH 8
up the usual tendency is for the gain of the Compared to a bipolar transistor, the
system to ______. JFET has a much higher
increase * Input resistance *
The simplest biasing arrangement for N- When the drain saturation current is less
channel JFET is: than IDSS, a JFET acts like a
Fixed-bias * Resistor *
The fixed-bias technique requires ______ The transconductance curve is
power supplies. Nonlinear *
2 *
The transconductance increases when the
The self-bias configuration develops the drain current
controlling gate-to-source voltage across a approaches
resistor introduced: IDSS *
In the source leg *
A CS amplifier has a voltage gain of
When using voltage divider-bias in FET gmrd *
amplifier, increasing the size of the source
resistor results in: A source follower has a voltage gain of
Lower quiescent values * gmrs / ( 1+ gmrs)
A characteristic of voltage divider-bias in When the input signal is large, a source
FET circuits is: follower has
A. The current in both R1and R2 is the A. A voltage gain of less than 1
same B. Some distortion
B. The voltage drop across R2 is VGS C. A high input resistance
C. The gate current is zero D. All of these *
D. All of the above *
The input signal used with a JFET analog
The primary difference between JFETs switch should be
and depletion-type MOSFETs is: Small *
Depletion-type MOSFETs can have
positive values of VGS and levels of ID that A cascode amplifier has the advantage of
exceed IDSS * Low input capacitance *
_____ biasing may be used with D- VHF covers frequencies from
MOSFETs but not with JFETs. 30 to 300 MHz *
Zero *
When the gate voltage becomes more
A popular arrangement for enhancement negative in an n-channel JFET, the
type MOSFET biasing is: channel between the depletion layers
Drain feedback biasing * Shrinks *
Which of the following biasing circuits Self-bias produces
can be used with E-MOSFETs? Negative feedback *
Drain feedback-bias *
To get a negative gate-source voltage in a
Generally, it is good design practice for self-biased JFET circuit, you must have a
linear amplifiers to have operating points Source resistor *
that:
Are close to midpoint of the load line * Transconductance indicates how
effectively the input voltage controls the
A JFET Output current *
Is a voltage-controlled device
Which of the following devices
A unipolar transistor uses revolutionized the computer industry?
Either one or the other, but not both * E-MOSFET *
The input impedance of a JFET The voltage that turns on an EMOS
Approaches infinity * device is the
Threshold voltage *
The gate controls
A. The width of the channel The VGS(On) of an n-channel E-MOSFET
B. The drain current is
C. The gate voltage Greater than VGS(th) *
D. All of the above *
VGS(on) is always
The gate-source diode of a JFET should Greater than VGS(th) *
be
Reversed- biased * Which of these may appear on the data
sheet of an enhancement-mode
3
Excel Review Center ECE Refresher/Coaching Elec TH 8
MOSFET?
A. VGS(th)
B. ID(ON)
C. VGS (on)
D. All of the above *

An E-MOSFET with its gate connected to

its drain is an example of
An active load *

With active-load switching, the upper E-

MOSFET is a
Two-terminal device *

CMOS devices use

Complementary E-MOSFETs *

The main advantage of CMOS is its

Low-power consumption *

Power FETs are

Used to switch large currents *

When the internal temperature increases

in a power FET, the
Drain current decreases *

Most small-signal E-MOSFETs are found

in
Integrated circuits *

Most power FETs are

Used in high-current applications *

An n-channel E-MOSFET conducts when

it has
An n-type inversion layer *

With CMOS, the upper MOSFET is

Complementary *

The RDS(on) of a power FET

Has a positive temperature coefficient

END