Dell Inspiron m5110 Dell Wistron Dqdn15 Queen Amd m12 Uma Muxless Dis Reva00

5 4 3 2 1
DQDN15 AMD QUEEN M12

D
Muxless /UMA Schematics Document D
AMD LIANO APU FS1

AMD GPU Seymour XT
C
FCH HUDSON M3 C
PCB 10246-1
2011-05-28
REV : A00
B B
DY :None Installed
UMA_PX:UMA and Muxless platform installed
DIS_PX:DIS and Muxless platform installed
PX:Muxless platform installed
FCH_UMA_PX:UMA_PX CRT FCH output
Whistler: For 8 X Vram
DN15: For DN15
DQ15 AMD DIS SAMSUNG TI
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Cover Page
Size Document Number Rev
Custom DQDN15 AMD QUEEN M12 X00
Date: Friday, May 27, 2011 Sheet 1 of 104
5 4 3 2 1
5 4 3 2 1
CHARGER
Project code : 91.4IE01.001 BQ24745 40
INPUTS OUTPUTS
Part Number : 48.4IE04.0SA DQDN15 QUEEN AMD M12 UMA/Muxless DIS 15' $'
28,29
VRAM '&%$7287
PCB P/N : 10246-SB 64Mx16bx4 (512MB)
%7
Revision : SB 90, 91 SYSTEM DC/DC

D
TPS51123 41 D
DDRIII DIMM1
DDRIII 1333 INPUTS OUTPUTS 30
800/1066/1333
14
AMD Muxless (Share PCIe x 8) AMD Graphic '9B$8;B6
DDRIII DIMM2
Liano APU PCIeX16 Seymour-XT
'&%$7287
9B$8;B6
DDRIII 1333 (FS1 socket) 83, 84, 85, 86, 87 9B6
800/1066/1333 UMA HDMI(Share PCIe x 4)
'9B6
15
27
722-Pin uFCPGA722
DP0 HDMI 51 APU Core/NB Power
LAN Controller TRAVIS Reserve for HDMI v1.4 ISL6267HRTZ-T 42, 43
PCIe 31
RJ45 Realtek RTL8105E ANX3110
CONN PCIeX1 4, 5, 6, 7, 8
INPUTS OUTPUTS
DP1 9 LCD 49
$38B9''
I/O Board Connector

'&%$7287
$38B9''1%
PCIe & USB2.0 UMI Link 4X4
WLAN
For FCH CRT Input DDRIII SUS
Reserve GPU CRT for VRAM verification TPS51116RGER 44
USB3.0 & 2.0 x2
USB3.0 x2 USB3.0 X 2 INPUTS OUTPUTS
'&%$7287 '9B6
C
FCH Integrated Display DAC
C
CRT DDRIII VTT
CRT Board
Connector
USB3.0
Redriver x2 USB2.0 X 3 HUDSON-M3 TPS51116RGER 44
INPUTS OUTPUTS
MIC IN USB2.0 X1
Integrated Display DAC '&%$7287 '9B6
Azalia USB 3.0 (4parts) USB2.0
APU VDDR/VDDP
HP1
CODEC & OP AMP AZALIA USB 2.0 (10 parts) RT8209 46
82
IDT 92HD87 USB 1.1 (2 parts) INPUTS OUTPUTS
82
29
SATA (6 parts) '&%$7287 '9B6
INT RTC CardReader AMD FCH CORE Power
INT CLK GEN SD/SDIO/MMC
USB2.0 X4 Realtek RT8209 46
2CH SPEAKER MS/MS Pro/xD
HW MONITOR RTS5138 32 INPUTS OUTPUTS 33
58
ACPI 1.1 '&%$7287 '9B6
75
LPC Bus
DN15 Vostro AMD GPU CORE
PCIe & USB2.0 Camera Conn
Express Card (LVDS & Camera Conn.)
RT8208B 26 92
49 INPUTS OUTPUTS
B
DN15 Vostro 64 B
USB2.0 X 1 17, 18, 19, 20, 21, 22 '&%$7287 9*$B&25(B3:5
Fingerprinter
PCB LAYER
Bluetooth L1: Top
63 L2: VCC
USB3.0/2.0
SATA
SATA
SATA
L3: Signal
L4: Signal
Touch Panel L5: GND
63 L6: Bottom
eSATA
USB3.0 HDD ODD SPI
KBC
Cbmbo NUVOTON
57 56 56 27
NPCE795P
A
Flash ROM
Touch Int. Thermal FAN DQ15 AMD DIS SAMSUNG TI
A
2MB 60 PAD KB ENE P2800 G991P11U

69 69 28 28
Wistron Corporation
25 28 Title
Block Diagram
25 Size Document Number Rev
Custom QUEEN AMD Muxless/UMA X00

Date: Thursday, May 26, 2011 Sheet 2 of 104
5 4 3 2 1
5 4 3 2 1
D D
Strapping No Fusion Config, Strap Not needed, but reserve
REQUIRED SYSTEM STRAPS

EC_PWM2 PCI_CLK1 RTC_CLK CLK_PCI_LPC PCI_CLK4 LPC_CLK0 LPC_CLK1
PCH GPO199
CLKGEN
PULL Allow S5_PLUS Mode USE non_Fusion ENABLE EC ENABLED
HIGH LPC ROM PCIE GEN2 DISABLE DEBUG STRAPS CLOCK mode
(Use Internal)
DEFAULT DEFAULT DEFAULT
PULL Force S5_PLUS Mode IGNORE Fusion DISABLE EC CLKGEN

LOW SPI ROM PCIE GEN1 ENABLE DEBUG STRAPS CLOCK mode DISABLED
C DEFAULT C
DEFAULT DEFAULT DEFAULT (Use External)
USB Table PCIe Routing

USB
Pair Device
APU
0 USB Debug Port / CRT USB 2.0 LANE0 LAN
1 Mini Card (WLAN)
LANE1 WWAN
2 Fingerprint
3 WWAN LANE2 WLAN
B 4 Bluetooth B
5 Touch Panel
LANE3 CardReader
6 eSATA/USB Charger
7 CCD Camera FCH
8 New Card
9 CardReader
LANE0
10 USB 3.0 port 1 LANE1 Express Card
11 USB 3.0 port 2
LANE2
12 USB 3.0 port 3
13 USB 3.0 port 4 LANE3
A DQ15 AMD DIS SAMSUNG TI A
Wistron Corporation
Title
Table of Content
A3
QUEEN AMD Muxless/UMA X00
5 4 3 2 1
5 4 3 2 1
APU1F 6 OF 6
PCI EXPRESS
AA8 AA2 APU_HDMI_DATA2 51
P_GFX_RXP0 P_GFX_TXP0
AA9 AA3 APU_HDMI_DATA2# 51
P_GFX_RXN0 P_GFX_TXN0
SAINE
D Y7 Y2 APU_HDMI_DATA1 51 D
Y8 Y1 APU_HDMI_DATA1# 51
W5 Y4 APU_HDMI_DATA0 51
W6 Y5 APU_HDMI_DATA0# 51
W8 W2 APU_HDMI_CLK 51
W9 W3 APU_HDMI_CLK# 51
V7 V2
V8 V1
U5 V4
U6 V5
U8 U2
U9 U3
GRAPHICS
T7 T2
T8 T1
PEG_RXP8 P_GFX_RXN7 P_GFX_TXN7 GTXP8 C417 SCD1U16V2KX-3GP PEG_TXP8
R5
T4 DIS_PX 1 2
PEG_RXN8 R6 T5 GTXN8 DIS_PX C418 1 2 SCD1U16V2KX-3GP PEG_TXN8
R8
R2 DIS_PX 1 2
PEG_RXN9 R9 R3 GTXN9 DIS_PX C420 1 2 SCD1U16V2KX-3GP PEG_TXN9 PEG_TXP[8..15]
PEG_RXP10 P_GFX_RXN9 P_GFX_TXN9 GTXP10 C421 SCD1U16V2KX-3GP PEG_TXP10 PEG_TXP[8..15] 83
P7
P2 DIS_PX 1 2
PEG_RXN10 P8 P1 GTXN10 DIS_PX C422 1 2 SCD1U16V2KX-3GP PEG_TXN10 PEG_TXN[8..15]
PEG_RXP11 P_GFX_RXN10 P_GFX_TXN10 GTXP11 C423 SCD1U16V2KX-3GP PEG_TXP11 PEG_TXN[8..15] 83
N5
P4 DIS_PX 1 2
PEG_RXN11 N6 P5 GTXN11 DIS_PX C424 1 2 SCD1U16V2KX-3GP PEG_TXN11
N8
N2 DIS_PX 1 2
PEG_RXN12 N9 N3 GTXN12 DIS_PX C426 1 2 SCD1U16V2KX-3GP PEG_TXN12 PEG_RXP[8..15]
PEG_RXP13 P_GFX_RXN12 P_GFX_TXN12 GTXP13 PEG_TXP13 PEG_RXP[8..15] 83
M7 M2 DIS_PX C427 1 2 SCD1U16V2KX-3GP
PEG_RXN13 P_GFX_RXP13 P_GFX_TXP13 GTXN13 C428 SCD1U16V2KX-3GP PEG_TXN13 PEG_RXN[8..15]
M8
M1 DIS_PX 1 2 PEG_RXN[8..15] 83
PEG_RXP14 L5 M4 GTXP14 DIS_PX C429 1 2 SCD1U16V2KX-3GP PEG_TXP14
PEG_RXN14 P_GFX_RXP14 P_GFX_TXP14 GTXN14 C430 SCD1U16V2KX-3GP PEG_TXN14
L6
M5 DIS_PX 1 2
PEG_RXP15 L8 L2 GTXP15 DIS_PX C431 1 2 SCD1U16V2KX-3GP PEG_TXP15
C PEG_RXN15 P_GFX_RXP15 P_GFX_TXP15 GTXN15 C432 SCD1U16V2KX-3GP PEG_TXN15 C
L9
L3 DIS_PX 1 2
AC5 AD4 PCIE_TXP0_C C441 1 2 SCD1U16V2KX-3GP

82 PCIE_RXP0 P_GPP_RXP0 P_GPP_TXP0 PCIE_TXP0 82
LAN 82 PCIE_RXN0 AC6
P_GPP_RXN0 P_GPP_TXN0
AD5 PCIE_TXN0_C C442 1 2 SCD1U16V2KX-3GP PCIE_TXN0 82 LAN
AC8 AC2
P_GPP_RXP1 P_GPP_TXP1
WWAN AC9
AC3 WWAN
82 PCIE_RXP2 AB7 AB2 PCIE_TXP2_C C457 1 2 SCD1U16V2KX-3GP
GPP
P_GPP_RXP2 P_GPP_TXP2 PCIE_TXP2 82
WLAN 82 PCIE_RXN2 AB8
AB1 PCIE_TXN2_C C460 1 2 SCD1U16V2KX-3GP PCIE_TXN2 82 WLAN
AA5 AB4
P_GPP_RXP3 P_GPP_TXP3
AA6 AB5
17 UMI_FCH_APU_RX0P AF8 AF1 UMI_TX0P_C C445 1 2 SCD1U16V2KX-3GP

P_UMI_RXP0 P_UMI_TXP0 UMI_TX0N_C UMI_APU_FCH_TX0P 17
17 UMI_FCH_APU_RX0N AF7 AF2 C446 1 2 SCD1U16V2KX-3GP
P_UMI_RXN0 P_UMI_TXN0 UMI_APU_FCH_TX0N 17
17 UMI_FCH_APU_RX1P AE6 AF5 UMI_TX1P_C C447 1 2 SCD1U16V2KX-3GP
17 UMI_FCH_APU_RX1N AE5 AF4 C448 1 2 SCD1U16V2KX-3GP
P_UMI_RXN1 P_UMI_TXN1 UMI_TX2P_C UMI_APU_FCH_TX1N 17
17 UMI_FCH_APU_RX2P AE9 AE3 C449 1 2 SCD1U16V2KX-3GP
C450 SCD1U16V2KX-3GP
UMI-LINK
17 UMI_FCH_APU_RX2N AE8 AE2 1 2 UMI_APU_FCH_TX2N 17
P_UMI_RXN2 P_UMI_TXN2 UMI_TX3P_C C451 SCD1U16V2KX-3GP
17 UMI_FCH_APU_RX3P AD8 AD1 1 2 UMI_APU_FCH_TX3P 17
P_UMI_RXP3 P_UMI_TXP3 UMI_TX3N_C C452 SCD1U16V2KX-3GP
17 UMI_FCH_APU_RX3N AD7 AD2 1 2 UMI_APU_FCH_TX3N 17
P_UMI_RXN3 P_UMI_TXN3
1D2V_S0 1 R402 2196R2F-GP P_ZVDDP K5 K4 P_ZVSS

P_ZVDDP P_ZVSS
1
SAINE R401
196R2F-GP
2
B B
Wistron Corporation
Title
APU_PCIE(1/5)
A3
QUEEN AMD Muxless/UMAX00
5 4 3 2 1
5 4 3 2 1
APU1A 1 OF 6
MEMORY CHANNEL APU1B 2 OF 6
A
14 M_A_A0 U20 E13 M_A_DQ0 14 MEMORY CHANNEL B
MA_ADD0 MA_DATA0
14 M_A_A1 R20 J13 M_A_DQ1 14 15 M_B_A0 T27 A14 M_B_DQ0 15
MA_ADD1 MA_DATA1 MB_ADD0 MB_DATA0
14 M_A_A2 R21 H15 M_A_DQ2 14 15 M_B_A1 P24 B14 M_B_DQ1 15
SAINE
D P22 J15 P25 D16 D
SAINE
14 M_A_A3 MA_ADD3 MA_DATA3 M_A_DQ3 14 15 M_B_A2 MB_ADD2 MB_DATA2 M_B_DQ2 15
14 M_A_A4 P21 H13 M_A_DQ4 14 15 M_B_A3 N27 E16 M_B_DQ3 15
14 M_A_A5 N24 F13 M_A_DQ5 14 15 M_B_A4 N26 B13 M_B_DQ4 15
14 M_A_A6 N23 F15 M_A_DQ6 14 15 M_B_A5 M28 C13 M_B_DQ5 15
14 M_A_A7 N20 E15 M_A_DQ7 14 15 M_B_A6 M27 B16 M_B_DQ6 15
14 M_A_A8 N21 15 M_B_A7 M24 A16 M_B_DQ7 15
MA_ADD8 MB_ADD7 MB_DATA7
14 M_A_A9 M21 H17 M_A_DQ8 14 15 M_B_A8 M25
MA_ADD9 MA_DATA8 MB_ADD8
14 M_A_A10 U23 F17 M_A_DQ9 14 15 M_B_A9 L26 C17 M_B_DQ8 15
14 M_A_A11 M22 E19 M_A_DQ10 14 15 M_B_A10 U26 B18 M_B_DQ9 15
14 M_A_A12 L24 J19 M_A_DQ11 14 15 M_B_A11 L27 B20 M_B_DQ10 15
14 M_A_A13 AA25 G16 M_A_DQ12 14 15 M_B_A12 K27 A20 M_B_DQ11 15
14 M_A_A14 L21 H16 M_A_DQ13 14 15 M_B_A13 W26 E17 M_B_DQ12 15
14 M_A_A15 L20 H19 M_A_DQ14 14 15 M_B_A14 K25 B17 M_B_DQ13 15
F19 M_A_DQ15 14 15 M_B_A15 K24 B19 M_B_DQ14 15
MA_DATA15 MB_ADD15 MB_DATA14
14 M_A_BS0 U24 C19 M_B_DQ15 15
MA_BANK0 MB_DATA15
14 M_A_BS1 U21 H20 M_A_DQ16 14 15 M_B_BS0 U27
MA_BANK1 MA_DATA16 MB_BANK0
14 M_A_BS2 L23 F21 M_A_DQ17 14 15 M_B_BS1 T28 C21 M_B_DQ16 15
MA_BANK2 MA_DATA17 MB_BANK1 MB_DATA16
J23 M_A_DQ18 14 15 M_B_BS2 K28 B22 M_B_DQ17 15
MA_DATA18 MB_BANK2 MB_DATA17
14 M_A_DM0 E14 H23 M_A_DQ19 14 C23 M_B_DQ18 15
MA_DM0 MA_DATA19 MB_DATA18
14 M_A_DM1 J17 G20 M_A_DQ20 14 15 M_B_DM0 D14 A24 M_B_DQ19 15
MA_DM1 MA_DATA20 MB_DM0 MB_DATA19
14 M_A_DM2 E21 E20 M_A_DQ21 14 15 M_B_DM1 A18 D20 M_B_DQ20 15
14 M_A_DM3 F25 G22 M_A_DQ22 14 15 M_B_DM2 A22 B21 M_B_DQ21 15
14 M_A_DM4 AD27 H22 M_A_DQ23 14 15 M_B_DM3 C25 E23 M_B_DQ22 15
14 M_A_DM5 AC23 15 M_B_DM4 AF25 B23 M_B_DQ23 15
MA_DM5 MB_DM4 MB_DATA23
14 M_A_DM6 AD19 G24 M_A_DQ24 14 15 M_B_DM5 AG22
MA_DM6 MA_DATA24 MB_DM5
14 M_A_DM7 AC15 E25 M_A_DQ25 14 15 M_B_DM6 AH18 E24 M_B_DQ24 15
G27 M_A_DQ26 14 15 M_B_DM7 AD14 B25 M_B_DQ25 15
MA_DATA26 MB_DM7 MB_DATA25
14 M_A_DQS0 G14 G26 M_A_DQ27 14 B27 M_B_DQ26 15
MA_DQS_H0 MA_DATA27 MB_DATA26
14 M_A_DQS#0 H14 F23 M_A_DQ28 14 15 M_B_DQS0 C15 D28 M_B_DQ27 15
C MA_DQS_L0 MA_DATA28 MB_DQS_H0 MB_DATA27 C
14 M_A_DQS1 G18 H24 M_A_DQ29 14 15 M_B_DQS#0 B15 B24 M_B_DQ28 15
MA_DQS_H1 MA_DATA29 MB_DQS_L0 MB_DATA28
14 M_A_DQS#1 H18 E28 M_A_DQ30 14 15 M_B_DQS1 E18 D24 M_B_DQ29 15
MA_DQS_L1 MA_DATA30 MB_DQS_H1 MB_DATA29
14 M_A_DQS2 J21 F27 M_A_DQ31 14 15 M_B_DQS#1 D18 D26 M_B_DQ30 15
14 M_A_DQS#2 H21 15 M_B_DQS2 E22 C27 M_B_DQ31 15
MA_DQS_L2 MB_DQS_H2 MB_DATA31
14 M_A_DQS3 E27 AB28 M_A_DQ32 14 15 M_B_DQS#2 D22
MA_DQS_H3 MA_DATA32 MB_DQS_L2
14 M_A_DQS#3 E26 AC27 M_A_DQ33 14 15 M_B_DQS3 B26 AG26 M_B_DQ32 15
14 M_A_DQS4 AE26 AD25 M_A_DQ34 14 15 M_B_DQS#3 A26 AH26 M_B_DQ33 15
14 M_A_DQS#4 AD26 AA24 M_A_DQ35 14 15 M_B_DQS4 AG24 AF23 M_B_DQ34 15
14 M_A_DQS5 AB22 AE28 M_A_DQ36 14 15 M_B_DQS#4 AG25 AG23 M_B_DQ35 15
14 M_A_DQS#5 AA22 AD28 M_A_DQ37 14 15 M_B_DQS5 AG21 AG27 M_B_DQ36 15
14 M_A_DQS6 AB18 AB26 M_A_DQ38 14 15 M_B_DQS#5 AF21 AF27 M_B_DQ37 15
14 M_A_DQS#6 AA18 AC25 M_A_DQ39 14 15 M_B_DQS6 AG17 AH24 M_B_DQ38 15
14 M_A_DQS7 AA14 15 M_B_DQS#6 AG18 AE24 M_B_DQ39 15
MA_DQS_H7 MB_DQS_L6 MB_DATA39
14 M_A_DQS#7 AA15 Y23 M_A_DQ40 14 15 M_B_DQS7 AH14
MA_DQS_L7 MA_DATA40 MB_DQS_H7
AA23 M_A_DQ41 14 15 M_B_DQS#7 AG14 AE22 M_B_DQ40 15
MA_DATA41 MB_DQS_L7 MB_DATA40
14 M_A_DIM0_CLK_DDR0 T21 Y21 M_A_DQ42 14 AH22 M_B_DQ41 15
MA_CLK_H0 MA_DATA42 MB_DATA41
14 M_A_DIM0_CLK_DDR#0 T22 AA20 M_A_DQ43 14 15 M_B_DIM0_CLK_DDR0 R26 AE20 M_B_DQ42 15
MA_CLK_L0 MA_DATA43 MB_CLK_H0 MB_DATA42
14 M_A_DIM0_CLK_DDR1 R23 AB24 M_A_DQ44 14 15 M_B_DIM0_CLK_DDR#0 R27 AH20 M_B_DQ43 15
MA_CLK_H1 MA_DATA44 MB_CLK_L0 MB_DATA43
14 M_A_DIM0_CLK_DDR#1 R24 AD24 M_A_DQ45 14 15 M_B_DIM0_CLK_DDR1 P27 AD23 M_B_DQ44 15
MA_CLK_L1 MA_DATA45 MB_CLK_H1 MB_DATA44
AA21 M_A_DQ46 14 15 M_B_DIM0_CLK_DDR#1 P28 AD22 M_B_DQ45 15
MA_DATA46 MB_CLK_L1 MB_DATA45
14 M_A_DIM0_CKE0 H28 AC21 M_A_DQ47 14 AD21 M_B_DQ46 15
MA_CKE0 MA_DATA47 MB_DATA46
14 M_A_DIM0_CKE1 H27 15 M_B_DIM0_CKE0 J26 AD20 M_B_DQ47 15
MA_CKE1 MB_CKE0 MB_DATA47
AA19 M_A_DQ48 14 15 M_B_DIM0_CKE1 J27
MA_DATA48 MB_CKE1
14 M_A_DIM0_ODT0 Y25 AC19 M_A_DQ49 14 AF19 M_B_DQ48 15
MA_ODT0 MA_DATA49 MB_DATA48
14 M_A_DIM0_ODT1 AA27 AC17 M_A_DQ50 14 15 M_B_DIM0_ODT0 W27 AE18 M_B_DQ49 15
MA_ODT1 MA_DATA50 MB_ODT0 MB_DATA49
AA17 M_A_DQ51 14 15 M_B_DIM0_ODT1 Y28 AE16 M_B_DQ50 15
MA_DATA51 MB_ODT1 MB_DATA50
14 M_A_DIM0_CS#0 V22 AB20 M_A_DQ52 14 AH16 M_B_DQ51 15
MA_CS#0 MA_DATA52 MB_DATA51
14 M_A_DIM0_CS#1 AA26 Y19 M_A_DQ53 14 15 M_B_DIM0_CS#0 V25 AG20 M_B_DQ52 15
MA_CS#1 MA_DATA53 MB_CS#0 MB_DATA52
AD18 M_A_DQ54 14 15 M_B_DIM0_CS#1 Y27 AG19 M_B_DQ53 15
B MA_DATA54 MB_CS#1 MB_DATA53 B
14 M_A_RAS# V21 AD17 M_A_DQ55 14 AF17 M_B_DQ54 15
MA_RAS# MA_DATA55 MB_DATA54
14 M_A_CAS# W24 15 M_B_RAS# V24 AD16 M_B_DQ55 15
MA_CAS# MB_RAS# MB_DATA55
14 M_A_WE# W23 AA16 M_A_DQ56 14 15 M_B_CAS# V27
MA_WE# MA_DATA56 MB_CAS#
Y15 M_A_DQ57 14 15 M_B_WE# V28 AG15 M_B_DQ56 15
MA_DATA57 MB_WE# MB_DATA56
14 M_A_RST# H25 AA13 M_A_DQ58 14 AD15 M_B_DQ57 15
M_A_EVENT# MA_RESET# MA_DATA58 MB_DATA57
T24 AC13 M_A_DQ59 14 15 M_B_RST# J25 AG13 M_B_DQ58 15
MA_EVENT# MA_DATA59 M_B_EVENT# MB_RESET# MB_DATA58
Y17 M_A_DQ60 14 T25 AD13 M_B_DQ59 15
M_VREF_DQ_APU MA_DATA60 MB_EVENT# MB_DATA59
W20 AB16 M_A_DQ61 14 AG16 M_B_DQ60 15
M_VREF MA_DATA61 MB_DATA60
AB14 M_A_DQ62 14 AF15 M_B_DQ61 15
M_ZVDDIO MA_DATA62 MB_DATA61
1D5V_S3 1 R501 2 W21 Y13 M_A_DQ63 14 AE14 M_B_DQ62 15
39R2F-GP M_ZVDDIO MA_DATA63 MB_DATA62
AF13 M_B_DQ63 15
MB_DATA63
SAINE
SAINE
APU_VREF_DQ
DDR_VREF_S3
1D5V_S3
1 R502 2 M_VREF_DQ_APU
Do Not Stuff RN501
1
C501 C502 4 1 M_A_EVENT#

SCD1U10V2KX-5GP SC1KP50V2KX-1GP 3 2 M_B_EVENT#
2
A SRN1KJ-7-GP A
LAYOUT: place them close to APU Wistron Corporation

1207: Change To 4 Pin Array Resistor Taipei Hsien 221, Taiwan, R.O.C.
AMD Confirm: PU Needed even if not used Title
APU_DDR(2/5)
A3
5 4 3 2 1
5 4 3 2 1
RN610
DP_AUX0N 4 1
SVC SVD Boot Voltage Boot Voltage DP_AUX0P
(VCC/GND) (open) 3 2
0112: Change To 2 Single 1.8K 0402 for
0 0 1.1 1.1 layout routing. SRN1K8J-GP
0 1 1.0 1.2 RN611

DP_AUX1N 4 1
1 0 0.9 1.1 DP_AUX1P 3 2
1 1 0.8 0.9 SRN1K8J-GP

APU1C 3 OF 6 1008: De-Pop R602, Follow Checklist
ANALOG/DISPLAY/MISC
9 LVDS_L0P_TRAVIS UMA_PX C602 1 2 SCD1U16V2KX-3GP DP0_TX0P F2

DP0_TXP0 DP0_AUXP
D4 DP_AUX0P UMA_PX C603 1 2 SCD1U16V2KX-3GP LVDS_CHP_TRAVIS 9
9 LVDS_L0N_TRAVIS UMA_PX C606 1 2 SCD1U16V2KX-3GP DP0_TX0N F1 D5 DP_AUX0N UMA_PX C601 1 2 SCD1U16V2KX-3GP LVDS_CHN_TRAVIS 9 LVDS APU_TEST25_H_BYPASSCLK_H 1 R611 2 510R2J-1-GP
SAINE
DP0_TXN0 DP0_AUXN
Travis LVDS Panel
9 LVDS_L1P_TRAVIS UMA_PX C607 1 2 SCD1U16V2KX-3GP DP0_TX1P E3
DP0_TXP1 DP1_AUXP
E5 DP_AUX1P SCD1U16V2KX-3GP 2 1 C626 FCH_UMA_PX DP1_AUXP_R 19 M_TEST 1 R608 2 39R2F-GP
9 LVDS_L1N_TRAVIS UMA_PX C604 1 2 SCD1U16V2KX-3GP DP0_TX1N E2
DP0_TXN1 DP1_AUXN
E6 DP_AUX1N SCD1U16V2KX-3GP 2 1 C627 FCH_UMA_PX DP1_AUXN_R 19 VGA R602
APU_TEST9_ANALOGIN 1DY 2 Do Not Stuff
D 1 DP0_TX2P D2 J5 D
Do Not Stuff TP602 DP0_TXP2 DP2_AUXP PCH_HDMI_CLK_R 51
Do Not Stuff TP603 1 DP0_TX2N D1
DP0_TXN2 DP2_AUXN
J6 PCH_HDMI_DATA_R 51 HDMI APU_TEST18_PLLTEST1 1 R605 2 1KR2J-1-GP
DP0_TX3P
DISPLAY PORT 0
Do Not Stuff TP604 1 C2 H4
DP0_TX3N DP0_TXP3 DP3_AUXP
Do Not Stuff TP605 1 C3 H5
DP0_TXN3 DP3_AUXN
FCH_UMA_PX C618 1 2 SCD1U16V2KX-3GP DP1_TX0P K2 G5 RN612
19 DP1_TX0P_R DP1_TXP0 DP4_AUXP
DISPLAY PORT MISC.

19 DP1_TX0N_R FCH_UMA_PX C619 1 2 SCD1U16V2KX-3GP DP1_TX0N K1
DP1_TXN0 DP4_AUXN
G6 APU_TEST24_SCANCLK1 4 1
APU_TEST21_SCANEN 3 2
19 DP1_TX1P_R FCH_UMA_PX C620 1 2 SCD1U16V2KX-3GP DP1_TX1P J3
DP1_TXP1 DP5_AUXP
F4
FCH_UMA_PX C621 1 2 SCD1U16V2KX-3GP DP1_TX1N J2 F5 SRN1KJ-7-GP
19 DP1_TX1N_R DP1_TXN1 DP5_AUXN
DP Input To FCH
19 DP1_TX2P_R FCH_UMA_PX C622 1 2 SCD1U16V2KX-3GP DP1_TX2P H2
DP1_TXP2 DP0_HPD
D7 DP0_HPD
FCH_UMA_PX C623 1 2 SCD1U16V2KX-3GP DP1_TX2N H1 E7 DP1_HPD
19 DP1_TX2N_R DP1_TXN2 DP1_HPD
J7 RN609
DISPLAY PORT 1
DP2_HPD DP2_HPD 51
FCH_UMA_PX C624 1 2 SCD1U16V2KX-3GP DP1_TX3P G2 H7 APU_TEST19_PLLTEST0 8 1
19 DP1_TX3P_R DP1_TX3N DP1_TXP3 DP3_HPD APU_TEST22_SCANSHIFTEN
0109: EMI Reserve, Place Near R631 19 DP1_TX3N_R FCH_UMA_PX C625 1 2 SCD1U16V2KX-3GP G3
DP1_TXN3 DP4_HPD
G7 7 2
F7 APU_TEST20_SCANCLK2 6 3
DP5_HPD APU_TEST12_SCANSHIFTEND
17 APU_CLKP AH7 5 4
CLKIN_H
17 APU_CLKN AH6 C6
APU_RST_L_BUF CLKIN_L DP_BLON
CLK
C5 FCH_UMA_PX SRN1KJ-4-GP
DP_DIGON APU_BLPWM_R APU_BLPWM 3D3V_S0
17 DISP_CLKP AH4 C7 1 R621 2 Do Not Stuff
DISP_CLKIN_H DP_VARY_BL
17 DISP_CLKN AH3 DY
2
DISP_CLKIN_L DP_AUX_ZVSS 1 R623

D8 2 150R2F-1-GP R671
EC601 DP_AUX_ZVSS LVDS_CHN_TRAVIS
42 APU_SVC_R B8 1 2
SVC Do Not Stuff 1D2V_S0
A8 AA10
DY 42 APU_SVD_R
1
SVD TEST6
Do Not Stuff
RN606 Do Not Stuff G10 APU_TEST9_ANALOGIN DY
SER.
APU_SIC TEST9 R672 APU_TEST25_L_BYPASSCLK_L
18 SCLK3 1 4 AH11 H10 1 R613 2 510R2J-1-GP
APU_SID SIC TEST10 APU_TEST12_SCANSHIFTEND LVDS_CHP_TRAVIS Do Not Stuff1
18 SDATA3 2 DY 3 AG11
SID TEST12
H12 2
1D5V_S0
71 APU_RST_L_BUF 1 R631
DY 2 Do Not Stuff D9 APU_TEST14_BP0 TP611 Do Not Stuff
APU_RST#_R TEST14 APU_TEST15_BP1
17 APU_RST# 1 R629 2 Do Not Stuff AF10 E9 TP610 Do Not Stuff
H_CPUPWRGD APU_PWRGD_R RESET# TEST15 APU_TEST16_BP2 ALLOW_STOP
17,36,71 H_CPUPWRGD 1 R630 2 Do Not Stuff AE10 G9 TP612 Do Not Stuff 1 R614 2 Do Not Stuff
DY
PWROK TEST16 APU_TEST17_BP3 1D5V_S3
H9
CTRL
TEST17 TP613 Do Not Stuff
1 R632DY2 Do Not Stuff AD10 H11 APU_TEST18_PLLTEST1
17 APU_PROCHOT#_VDDIO PROCHOT# TEST18 APU_TEST18_PLLTEST1 71
APU_THERMTRIP#_VDDIO AG12 G11 APU_TEST19_PLLTEST0 APU_TEST19_PLLTEST0 71 1 R643 2 1KR2J-1-GP
27,40 H_PROCHOT# THERMTRIP# TEST19
APU_ALERT# AH12 F12 APU_TEST20_SCANCLK2
ALERT# TEST20 APU_TEST21_SCANEN
E11
1D5V_S0 APU_TDI TEST21 APU_TEST22_SCANSHIFTEN
0111: Dummy APU-> FCH Prochot function C12 D11
TEST
SRN300J-3-GP 71 APU_TDI TDI TEST22 3D3V_AUX_S5
APU_TDO A12 F10
71 APU_TDO TDO TEST23
C 4 1 APU_RST# 71 APU_TCK APU_TCK A11 G12 APU_TEST24_SCANCLK1 C
JTAG
H_CPUPWRGD APU_TMS TCK TEST24 APU_TEST25_H_BYPASSCLK_H FS1R1
3 2 71 APU_TMS D12 AH10 1 R615 2 Do Not Stuff
DY
APU_TRST# TMS TEST25_H APU_TEST25_L_BYPASSCLK_L
71 APU_TRST# B12 AH9
RN603 APU_DBRDY TRST# TEST25_L
71 APU_DBRDY B11 K7
1D5V_S3 APU_DBREQ# DBRDY TEST28_H 1D5V_S3
71 APU_DBREQ# C11 K8
RN608 DBREQ# TEST28_L ANATSTIN_H
AA12 TP601 Do Not Stuff
TEST30_H ANATSTIN_L
4 1 E8 AB12 TP617 Do Not Stuff
1
RSVD#E8 TEST30_L M_TEST
3 DY 2 K21
RSVD#K21 TEST31
K22 [AMD FAE Frank]: This is electrical key.
AC11 AB11 ANATSTOUT_H R612
RSVD
Do Not Stuff RSVD#AC11 TEST32_H ANATSTOUT_L
TP618 Do Not Stuff Do not allow power to turn on if this pin is still "L."
42 APU_VDDNB_RUN_FB_L 1 R648 2 Do Not Stuff AA11 TP619 Do Not Stuff
300R2J-4-GP
TEST32_L TEST35 FS1 package is open pin, in the furtur, FS1r2 will have this pin tied to VSS.
D10
APU_RUN_FB_L TEST35
1 R649 2 Do Not Stuff B9 If the wrong processor is plugged the socket, this is more of a problem on desktop platforms
2
1D5V_S0 42 APU_VDD_RUN_FB_L VSS_SENSE
1 APU_VDDP_FB_H C8 Y11 FS1R1 TEST35
Do Not Stuff TP620 VDDP_SENSE FS1R1 FS1R1 36 (CPUs changing)
RN605
SENSE
42 APU_VDDNB_RUN_FB_H A9 AB10 ALLOW_STOP 17
1
APU_SVD_R APU_VDDIO_SUS_FB_H VDDNB_SENSE DMAACTIVE#
4 1 Do Not Stuff TP622 1 B10
APU_SVC_R VDDIO_SENSE
3 DY 2 42 APU_VDD_RUN_FB_H C9
VDD_SENSE THERMDA
AE12 DY R617
Do Not Stuff TP623 1 APU_VDDR_FB_H A10 AD12 PU for internal Do Not Stuff
VDDR_SENSE THERMDC
Do Not Stuff PD for customer
1D5V_S3 SAINE
2
RN607
4 1
3 2
SRN1K8J-GP 3D3V_S0
1D5V_S3 1 R637 2 Do Not Stuff DP_HPD1_C
19 DP_HPD1_R
FCH_UMA_PX
1
1
R653 1D5V_S3
3D3V_S5 R635 1D5V_S3 10KR2J-3-GP
10KR2J-3-GP 84.T3904.C11
C
2ND = 84.03904.P11
2
1
1 R651 210KR2J-3-GP PCH_TEMP_ALERT# DP_HPD1_C 1 R639 2150KR2J-L1-GP DP_HPD1_C_B B Q604 3rd = 84.03904.L06
2
R636 MMBT3904-4-GP
1
BAPU_PROCHOT#_VDDIO_Q
DY Do Not Stuff
BAPU_THERMTRIP#_VDDIO_Q
E
R644
S3 Power DY Do Not Stuff DP1_HPD
APU_ALERT#_Q 2
1
1D5V_S3
2
RN601 3D3V_S5 R640
B 8 1 APU_ALERT# 1008: FCH No Internal PU, POP R638 10KR2J-3-GP B
7 2 APU_THERMTRIP#_VDDIO
6 3 APU_SIC
2
1
5 4 APU_SID
R638
SRN1KJ-4-GP 10KR2J-3-GP
B
2
APU_ALERT# E DYC APU_PROCHOT#_VDDIO C E

1D5V_S3 PCH_TEMP_ALERT# 19,27 APU_PROCHOT#_VDDIO_R 42 1D5V_S3
APU_THERMTRIP#_VDDIO E C Q603 Q602
H_THERMTRIP# 18,36,85
RN604 Q601 Do Not Stuff MMBT3904-4-GP
8 1 APU_TRST# MMBT3904-4-GP Do Not Stuff 84.T3904.C11
7 2 APU_TCK 84.T3904.C11 2ND = 84.03904.P11 2ND = 84.03904.P11 1207 Modify: Add Level Shift, Page 84.T3904.C11
C
6 3 APU_TMS 2ND = 84.03904.P11 3rd = 84.03904.L06 3rd = 84.03904.L06 2ND = 84.03904.P11
APU_TDI
42 Regulator Has 3D3V_S0 Pull High
5 4 3rd = 84.03904.L06 1 R641 2150KR2J-L1-GP DP_HPD0_C_B B Q605 3rd = 84.03904.L06
к
9 DP_HPD0_C
MMBT3904-4-GP
1
SRN1KJ-4-GP CPU exceeds to 125
E
R646
100KR2J-1-GP DP0_HPD
APU_SID
1 R634 2300R2J-4-GP APU_DBREQ#
1
APU_SIC
2
R642
10KR2J-3-GP
1D5V_S3 1D5V_S0
2
1
0714: Move From Page 9

1 R616 2 1KR2J-1-GP APU_PROCHOT#_VDDIO C628 C629
Do Not Stuff Do Not Stuff
2
1D5V_S3
R667 3D3V_S0_TRAVIS
DY
DY DY Do Not Stuff
1008: Change R616 From 300 Ohm To 1K, AMD Checklist Update
2
2
1
R656
R657
H_CPUPWRGD_B
2K2R2J-2-GP
0105: APU SMBUS Timing Issue, Change From BJT To Mos 3D3V_S0 UMA_PX
4K7R2J-2-GP
APU_BLPWM_Q1
2
1
A 3D3V_S5 3D3V_S5 A
R668
Do Not Stuff
Do Not Stuff DY
1
2ND = 84.03904.P11
2
1D5V_S3 1D5V_S3 DQ15 AMD DIS SAMSUNG TI

Q606 R650 Q607 R652 DY
B
BSS138-8-GP 10KR2J-3-GP BSS138-8-GP 10KR2J-3-GP H_CPUPWRGD 2 3 H_CPUPWRGD_E 42
84.00138.H31 84.00138.H31 Q611
G G Do Not Stuff APU_BLPWM E C APU_BLPWM_TRAVIS 9
Wistron Corporation
2

Q608
D SML1_CLK 27,85 D SML1_DATA 27,85 Taipei Hsien 221, Taiwan, R.O.C.
1
1 R633 2 Do Not Stuff MMBT3904-4-GP
APU_SIC S APU_SID S R655 84.T3904.C11 Title
101227 1011: Reserve Level Shift. DY

Do Not Stuff 2ND = 84.03904.P11 APU_COntrol&Debug(3/5)
2 3rd = 84.03904.L06 Size Document Number Rev
Custom
5 4 3 2 1
5 4 3 2 1
APU_VDD APU1D 4 OF 6 APU_VDD VDD:

C1 T6
36A for VDD(35W CPU)
VDD VDD
D3 T10
VDD VDD 45A for VDD(45W CPU)
SAINE
D6 T18
C708 C707 C706 C705 C704 C703 C702 C701 VDD VDD C714 C713 C712 C711 C710 C709
1 E1
VDD VDD
U1 10uF X7
1
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SCD22U10V2KX-1GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
Do Not Stuff
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SCD22U10V2KX-1GP
SCD01U16V2KX-3GP
Do Not Stuff
F3 U11
SC10U6D3V5KX-1GP
VDD VDD
Do Not Stuff
DY F6 VDD VDD U19 0.22uF X2
F8 V3
DY DY
2
2
VDD VDD
D G1
VDD VDD
V6 10nF X3 D
H3 V10
VDD VDD
H6 VDD VDD V18 180pF Cap for EMI requirment
H8 W1
VDD VDD
J1 VDD VDD W11
K3 W13
VDD VDD
K6 VDD VDD W15
L1 VDD VDD W17
L11 W19
VDD VDD
L19 Y3
VDD VDD
M3 Y6
VDD VDD
M6 Y10
VDD VDD
M10 VDD VDD Y12
M18 Y14
VDD VDD
N1 VDD VDD Y16
N11 Y18
VDD VDD
N19 Y20
VDD VDD
P3 VDD VDD AA1
P6 VDD VDD AB3
P10 AB6
VDD VDD
P18
R1
VDD VDD AC1
AD3
VDDNB:
VDD VDD
R11 AD6 18A for VDDNB(35W CPU)
VDD VDD
R19 AE1
APU_VDDNB VDD VDD APU_VDDNB
T3 22A for VDDNB(45W CPU)
VDD
J9 VDDNB VDDNB K11 10UF X4
J10 VDDNB VDDNB K12
C
J11
VDDNB VDDNB
K13 0.22UF X2 C
C719 C718 C717 C716 C715 J12 K14 C723 C722 C721 C720
VDDNB VDDNB
1
1
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
Do Not Stuff
Do Not Stuff
Do Not Stuff
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SCD22U10V2KX-1GP
Do Not Stuff
J14 VDDNB VDDNB K16 10nF X4
J16
K9
VDDNB VDDNB K17
K18
DY 180pF Cap for EMI requirment
DY DY DY
2
2
VDDNB VDDNB
K10 L18
VDDNB VDDNB
G28
VDDIO VDDIO
R22
VDDIO: 0111: Change C744, C743 From 22uF to 0.22 uF
1D5V_S3 H26 R25 1D5V_S3
VDDIO VDDIO 1D5V_S3
J28 VDDIO VDDIO R28 4A for VDDIO(35W CPU)
K20 T20
VDDIO VDDIO
K23 T23
K26
VDDIO VDDIO
T26
4.6A for VDDIO(45W CPU)
C730 C729 C728 C727 C726 C725 C724 VDDIO VDDIO C737 C736 C735 C734 C733 C732 C731
L22 VDDIO VDDIO U22 10uF X2
1
1
Do Not Stuff
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
Do Not Stuff
SC4D7U6D3V3KX-GP
Do Not Stuff
Do Not Stuff
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
Do Not Stuff
Do Not Stuff
SC4D7U6D3V3KX-GP
L25 U25 C744 C743
VDDIO VDDIO
1
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
0.22uF X6 C742 C741
DY DY L28
M20
VDDIO VDDIO
U28
V20
DY Do Not Stuff Do Not Stuff
DY DY DY
2
2
VDDIO VDDIO
M23 V23 4.7uF X4 DY DY
2
VDDIO VDDIO
M26 V26
VDDIO VDDIO
N22 VDDIO VDDIO W22 180pF Cap for EMI requirment
N25 W25
VDDIO VDDIO
N28 VDDIO VDDIO W28
P20 Y24
VDDIO VDDIO
1D2V_S0
P23
P26
VDDIO VDDIO Y26
AA28 1D2V_S0 VDDP:
VDDIO VDDIO
3.5A for VDDP(35W/45W) Decoupling between processor and DIMMs
AG2 A3 across VDDIO and VSS Split
VDDP_A VDDP_B
AG3 VDDP_A VDDP_B A4 10uF X3
AG4 B3
1D2V_S0 VDDP_A VDDP_B C751 C750 C749 C748 C747 C746 C745
AG5
VDDP_A VDDP_B
B4 0.22uF X4
1
B B
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
Do Not Stuff
Do Not Stuff
AG6
VDDR VDDR
A5 180pF Cap for EMI requirment
AG7 A6
DY DY
2
VDDR VDDR
AG8 B5
2D5V_S0 VDDR VDDR
AG9 B6
0.75A for VDDA(35W/45W) VDDR VDDR
AE11
VDDA
AF11
VDDA 1D2V_S0
1
C740 C739 C738 SAINE

SC4D7U6D3V3KX-GP
SCD22U10V2KX-1GP
SC3300P50V2KX-1GP
2
C767 C766 C765 C764 C763 C762 C761 C760 C759 C758 C757 C756 C755 C754 C753 C752
1
1
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
DY DY DY DY
2
2
VDDR:
3A for VDDR(35W)
A 3.5A for VDDR(45W) DQ15 AMD DIS SAMSUNG TI A
4.7uF X4
0.22uF X4 Wistron Corporation
1nF X4 Taipei Hsien 221, Taiwan, R.O.C.
180pF Cap for EMI requirment Title
APU_Power(4/5)
Custom
5 4 3 2 1
5 4 3 2 1
D D
APU1E 5 OF 6
A7 T11
VSS VSS
A13 T19
VSS VSS
SAINE
A15 U4
VSS VSS
A17 U7
VSS VSS
A19 U10
VSS VSS
A21 U18
VSS VSS
A23 V9
VSS VSS
A25 V11
VSS VSS
B7 V19
VSS VSS
C4 W4
VSS VSS
C10 W7
VSS VSS
C14 W10
VSS VSS
C16 W12
VSS VSS
C18 W14
VSS VSS
C20 W16
VSS VSS
C22 W18
VSS VSS
C24 Y9
VSS VSS
C26 Y22
VSS VSS
C28 AA4
VSS VSS
D13 AA7
VSS VSS
D15 AB9
VSS VSS
D17 AB13
VSS VSS
D19 AB15
VSS VSS
D21 AB17
VSS VSS
D23 AB19
C VSS VSS C
D25 AB21
VSS VSS
D27 AB23
VSS VSS
E4 AB25
VSS VSS
E10 AB27
VSS VSS
E12 AC4
VSS VSS
F9 AC7
VSS VSS
F11 AC10
VSS VSS
F14 AC12
VSS VSS
F16 AC14
VSS VSS
F18 AC16
VSS VSS
F20 AC18
VSS VSS
F22 AC20
VSS VSS
F24 AC22
VSS VSS
F26 AC24
VSS VSS
F28 AC26
VSS VSS
G4 AC28
VSS VSS
G8 AD9
VSS VSS
G13 AD11
VSS VSS
G15 AE4
VSS VSS
G17 AE7
VSS VSS
G19 AE13
VSS VSS
G21 AE15
VSS VSS
G23 AE17
VSS VSS
G25 AE19
VSS VSS
J4 AE21
VSS VSS
J8 AE23
VSS VSS
J18 AE25
VSS VSS
J20 AE27
VSS VSS
J22 AF3
B VSS VSS B
J24 AF6
VSS VSS
K19 AF9
VSS VSS
L4 AF12
VSS VSS
L7 AF14
VSS VSS
L10 AF16
VSS VSS
M9 AF18
VSS VSS
M11 AF20
VSS VSS
M19 AF22
VSS VSS
N4 AF24
VSS VSS
N7 AF26
VSS VSS
N10 AF28
VSS VSS
N18 AG10
VSS VSS
P9 AH5
VSS VSS
P11 AH8
VSS VSS
P19 AH13
VSS VSS
R4 AH15
VSS VSS
R7 AH17
VSS VSS
R10 AH19
VSS VSS
R18 AH21
VSS VSS
T9 AH23
VSS VSS
AH25
VSS
SAINE
Wistron Corporation
Title
APU_VSS(5/5)
A3
5 4 3 2 1
5 4 3 2 1
1207: Use PLT_RST# to replace

3D3V_S0_TRAVIS for APU_PCIE_RST#_R.
1D2V_TRAVIS DVDD12
UMA_PX
17,71,82,83 PLT_RST# 1 R901 2 Do Not Stuff APU_PCIE_RST#_R
DVDD33 DVDD12 AVDD33 AVDD12
R923 UMA_PX 400mA

R922 1 2
1
3D3V_S0_TRAVIS 2 1 UMA_PX Do Not Stuff
DY C902
SCD1U10V2KX-5GP
2
Do Not Stuff 3D3V_S0_TRAVIS GND_TRVS
1
C911
0628: Change Tolerence to 5 % DY C906 C907 C908 C909 C903 C910 C904
Do Not Stuff
SCD01U16V2KX-3GP
TRAVIS Rev 1.01 sugget
13
53
32
46
59
25
33
39
63
62
Do Not Stuff
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC2D2U10V3KX-1GP
1
2
1
2
5
Do Not Stuff
Do Not Stuff
U902
to stuff 1M-ohm R902
DVDD33
DVDD33
DVDD12
DVDD12
DVDD12
DVDD12
AVDD33
AVDD33
AVDD33
AVDD33
AVDD33
AVDD12
AVSS
AVSS
AVSS
D D
UMA_PX 1MR2J-L2-GP
2
SCD1U10V2KX-5GP
1 2 C905 POR# 34 45
APU_PCIE_RST#_R POR# LVDS_U3_P
UMA_PX 12
RESET# LVDS_U3_N
44 UMA_PX UMA_PX UMA_PX UMA_PX
43 DY
1231: New Spec Changed Pin 30 To IN and Connect P, 17 TRAVIS_REFCLKN 31
OSC_IN
LVDS_CLKU_P
LVDS_CLKU_N
42 if use single channel, DY
30 41 DY
From Vendor Feedback. Mail Confirm 17 TRAVIS_REFCLKP OSC_OUT LVDS_U2_P
have to use L Group
40
Do Not Stuff TP902 DAC_TDO LVDS_U2_N
1 54 38
Do Not Stuff TP904 DAC_TDI TDO LVDS_U1_P
1 55 37
Do Not Stuff TP903 DAC_TMS TDI LVDS_U1_N 1D2V_TRAVIS AVDD12
1 57 36
Do Not Stuff TP901 DAC_TCK TMS LVDS_U0_P
1 56
TCK LVDS_U0_N
35 220 ohm 3A
0105: Vendor Suggestion To Add Pair of Cap In Near Travis Also 29 No Need L901 400mA
LVDS_L3_P
6 APU_BLPWM_TRAVIS 48 28 1 2UMA_PX
CPU_VARY_BL LVDS_L3_N HCB2012KF-221T30-GP
27 LVDSA_CLK 49
LVDS_CLKL_P
UMA_PX LVDS_CLKL_N
26 LVDSA_CLK# 49 68.00216.161
6 LVDS_CHN_TRAVIS C921 1 2SCD1U16V2KX-3GP LVDS_CHN_TRAVIS_C 60 24 LVDSA_DATA2 49 2ND = 68.00206.121
C932 1 AUX_CH_N LVDS_L2_P
6 LVDS_CHP_TRAVIS 2SCD1U16V2KX-3GP LVDS_CHP_TRAVIS_C 61 23 LVDSA_DATA2# 49 DY
AUX_CH_P LVDS_L2_N
1
UMA_PX 22 LVDSA_DATA1 49 C919
LVDS_l1_P C901 C915 C916 C917 C918
3 21
6 LVDS_L0P_TRAVIS DPRX_L0_P UMA_PX LVDS_l1_N LVDSA_DATA1# 49
Do Not Stuff
SCD01U16V2KX-3GP
4 20 Do Not Stuff
SC2D2U10V3KX-1GP
LVDSA_DATA0 49
2
6 LVDS_L0N_TRAVIS DPRX_L0_N LVDS_L0_P
Do Not Stuff
Do Not Stuff
6 LVDS_L1P_TRAVIS 6 19 LVDSA_DATA0# 49
DPRX_L1_P LVDS_L0_N
6 LVDS_L1N_TRAVIS 7
DPRX_L1_N UMA_PX
50 LVDS_DDC_DATA_X 1R907 2 Do Not Stuff LVDS_DDC_DATA_R 49
DDC_DATA
UMA_PX 1R905 2LVDS_HPD_TRAVIS 58 49 LVDS_DDC_CLK_X 1R908 2 Do Not Stuff
CFG_SDA
CFG_SCL
LVDS_DDC_CLK_R 49
TEST_EN
CLK_SEL
6 DP_HPD0_C DPRX_HPD DDC_CLK
Do Not Stuff 47 UMA_PX
GPIO_0
GPIO_1
GPIO_2
R_BIAS
VARY_BL L_BKLT_CTRL 49
0112: Vendor Suggestion To Add PU For AUXP, PL for AUXN 15
GND
BL_EN L_BKLT_EN 27
14 LVDS_VDD_EN 49
DIGON
DY
ANX3110-GP DY DY UMA_PX UMA_PX
65
16
17
18
52
51
10
11
64
ANX3100_CLK_SEL
3D3V_S0
DAC_TST_EN
C920
R_BIAS
UMA_PX 3D3V_S0_TRAVIS AVDD33
LVDS_CHP_TRAVIS
1 2 220 ohm 3A
1 R903 2 0512 David
2
DYDo Not Stuff SCD1U10V2KX-5GP
L903
UMA_PX 150mA
C R915 1 2 C
10KR2J-3-GP HCB2012KF-221T30-GP
UMA_PX UMA_PX 68.00216.161
1 2 2ND = 68.00206.121
1
R914 Do Not Stuff 1231: Change To 10K PU
1
C924 C928
LVDS_CHN_TRAVIS 1 R906 2 R917 C922 C923 C925 C926 C927
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
DYDo Not Stuff Do Not Stuff DY DY Do Not Stuff
SCD1U10V2KX-5GP
SC2D2U10V3KX-1GP
1
2
Do Not Stuff
Do Not Stuff
GND_TRVS 1231:Reserve 10K, Vendor Suggest
L_BKLT_EN
1
3D3V_S0_TRAVIS R926
100KR2J-1-GP
2
1 R927 2 ANX3100_CLK_SEL DY DY UMA_PX UMA_PX
UMA_PX 10KR2J-3-GP UMA_PX UMA_PX
R904
1
12KR2F-L-GP
C912
SC100P50V2JN-3GP
2
UMA_PX UMA_PX
2
3D3V_S0_TRAVIS DVDD33
Vendor Confirm: C912 100p

UMA_PX 150mA
R921 1 2
Do Not Stuff
2
C929 C930 C931
Do Not Stuff UMA_PX
SCD1U10V2KX-5GP
SC2D2U10V3KX-1GP
1
1
DY UMA_PX
B B
0504 -Sabine David

Annie and Rosa team soluton co-layout 0321 0321
MOS spec VGS:20V 1 2
Rosa:RUN_Enable 15V
R924 Do Not Stuff
R925
1
Do Not Stuff
2
For ANX3100 ALSO
Annie:RUN Enable 9V
U901
1D2V_TRAVIS Do Not Stuff 1D2V_S0 U905 3D3V_S0
3D3V_S0_TRAVIS Do Not Stuff
0714: Add to Avoid System Run Power Being Pull Low
S D
15V_S5 S D
DY
G
Do Not Stuff DY
G
1
Do Not Stuff
R919
Do Not Stuff TRAVIS_1D2V TRAVIS_3D3V
R916
DY DY MOS spec VGS:20V
Q903_D 2 1
2
Rosa:RUN_Enable 15V
Annie:RUN Enable 9V
1
Do Not Stuff
1
DY C936 1 R918 2
Do Not Stuff Do Not Stuff C933
DY DY
2
A Do Not Stuff A
2
1
DY C935
Q903
Do Not Stuff
2
18 TRAVIS_EN# G DY DQ15 AMD DIS SAMSUNG TI

D
Wistron Corporation
1
S
R920 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Do Not Stuff Reserved for tuning sequence of 3.3V and 1.2V Taipei Hsien 221, Taiwan, R.O.C.
Do Not Stuff
DY
Do Not Stuff Title
TRAVIS ANX3100
2
2ND = 84.2N702.031
A2
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Wistron Corporation
Title
Reserved
A2
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
5 4 3 2 1
SSID = MEMORY
0117: Brazo S3 Issue, Sabine Reserve Only
DM1
98 NP1 M_A_DIM0_CKE0
5 M_A_A0 A0 NP1
97 NP2 M_A_DIM0_CKE1
5 M_A_A1 A1 NP2
5 M_A_A2 96
A2
D 5 M_A_A3 95 110 M_A_RAS# 5 D
A3 RAS#
5 M_A_A4 92 113 M_A_WE# 5
A4 WE#
5 M_A_A5 91 115 M_A_CAS# 5
A5 CAS#
1
5 M_A_A6 90
A6 R1403 R1404
5 M_A_A7 86 114 M_A_DIM0_CS#0 5
A7 CS0# Do Not Stuff Do Not Stuff
5 M_A_A8 89 121 M_A_DIM0_CS#1 5
A8 CS1#
5 M_A_A9 85
A9 DY DY
107 73 M_A_DIM0_CKE0 5
2
5 M_A_A10 A10/AP CKE0
5 M_A_A11 84 74 M_A_DIM0_CKE1 5
A11 CKE1
5 M_A_A12 83
A12
5 M_A_A13 119 101 M_A_DIM0_CLK_DDR0 5
A13 CK0
5 M_A_A14 80 103 M_A_DIM0_CLK_DDR#0 5
A14 CK0#
5 M_A_A15 78
A15
5 M_A_BS2 79 102 M_A_DIM0_CLK_DDR1 5
A16/BA2 CK1
104 M_A_DIM0_CLK_DDR#1 5
CK1#
5 M_A_BS0 109
BA0
5 M_A_BS1 108 11 M_A_DM0 5
BA1 DM0
28 M_A_DM1 5
DM1
5 M_A_DQ0 5 46 M_A_DM2 5
DQ0 DM2
5 M_A_DQ1 7
DQ1 DM3
63 M_A_DM3 5 Intel HR DM tied to GND
5 M_A_DQ2 15 136 M_A_DM4 5 AMD still following previous design
DQ2 DM4
5 M_A_DQ3 17 153 M_A_DM5 5
DQ3 DM5
5 M_A_DQ4 4 170 M_A_DM6 5
DQ4 DM6
5 M_A_DQ5 6
DQ5 DM7
187 M_A_DM7 5 1213 Modify: Remove Dimm Thermal Function
5 M_A_DQ6 16
DQ6
5 M_A_DQ7 18 200 PCH_SMBDATA 15,79,82
DQ7 SDA
5 M_A_DQ8 21 202 PCH_SMBCLK 15,79,82
DQ8 SCL
5 M_A_DQ9 23
DQ9 3D3V_S0
5 M_A_DQ10 33 198
DQ10 EVENT#
5 M_A_DQ11 35
DQ11
5 M_A_DQ12 22 199
DQ12 VDDSPD
5 M_A_DQ13 24
DDR_VREF_S3 DQ13 SA0_DIM0
5 M_A_DQ14 34 197
DQ14 SA0
1
36 201 SA1_DIM0 C1401 C1402
5 M_A_DQ15 DQ15 SA1 SCD1U10V2KX-5GP
5 M_A_DQ16 39
41
DQ16
77
DYDo Not Stuff
2
5 M_A_DQ17 DQ17 NC#1
5 M_A_DQ18 51 122
DQ18 NC#2
1
C1411 C1412 C1413 53 125 1D5V_S3

5 M_A_DQ19 DQ19 NC#/TEST
SCD1U10V2KX-5GP Do Not Stuff SCD1U10V2KX-5GP 40
DY 5 M_A_DQ20
42
DQ20
75 RN1401
2
5 M_A_DQ21 DQ21 VDD1

50 76 SA0_DIM0 PCH_SMBDATA 2 3
5 M_A_DQ22 DQ22 VDD2 SMB_DATA 18,75
C 52 81 PCH_SMBCLK 1 4 C
5 M_A_DQ23 DQ23 VDD3 SMB_CLK 18,75
57 82 SA1_DIM0
59 87 SRN0J-6-GP
5 M_A_DQ26 67 88
DQ26 VDD6
1
0D75V_S0 69 93
5 M_A_DQ27
56
DQ27 VDD7
94 R1401 R1402 PCH_SMBDATA C1423 1 DY2 Do Not Stuff
58 99 Do Not Stuff Do Not Stuff PCH_SMBCLK C1424 1 2 Do Not Stuff
68 100
5 M_A_DQ30 DQ30 VDD10 DY
1
C1418 70 105
2
DYDo Not Stuff 5 M_A_DQ32 129
131
DQ32 VDD12
106
111
2

5 M_A_DQ34 141 112
DQ34 VDD14
5 M_A_DQ35 143 117
DQ35 VDD15
5 M_A_DQ36 130 118
DQ36 VDD16
5 M_A_DQ37 132 123
DQ37 VDD17
5 M_A_DQ38 140 124
DQ38 VDD18
5 M_A_DQ39 142
DQ39
5 M_A_DQ40 147 2
DQ40 VSS
5 M_A_DQ41 149 3
0D75V_S0 DQ41 VSS
5 M_A_DQ42 157 8
DQ42 VSS
5 M_A_DQ43 159 9
DQ43 VSS
5 M_A_DQ44 146 13
DQ44 VSS
5 M_A_DQ45 148 14
DQ45 VSS
5 M_A_DQ46 158 19
DQ46 VSS
5 M_A_DQ47 160 20
DQ47 VSS
5 M_A_DQ48 163 25
DQ48 VSS
1
C1419 C1420 C1421 C1422 165 26

5 M_A_DQ49 DQ49 VSS
SC1U6D3V2KX-GP
DYDo Not Stuff SC1U6D3V2KX-GP
DYDo Not Stuff 5 M_A_DQ50 175
177
DQ50 VSS
31
32
2
5 M_A_DQ51 DQ51 VSS

5 M_A_DQ52 164 37
DQ52 VSS
5 M_A_DQ53 166 38
DQ53 VSS
Place these caps close to VTT1 and VTT2. 5 M_A_DQ54 174
DQ54 VSS
43
5 M_A_DQ55 176 44
DQ55 VSS
5 M_A_DQ56 181 48
DQ56 VSS
5 M_A_DQ57 183 49
DQ57 VSS
5 M_A_DQ58 191 54
DQ58 VSS
5 M_A_DQ59 193 55
DQ59 VSS
5 M_A_DQ60 180 60
DQ60 VSS
5 M_A_DQ61 182 61
DQ61 VSS
5 M_A_DQ62 192 65
DQ62 VSS
5 M_A_DQ63 194 66
B DQ63 VSS B
71
VSS
5 M_A_DQS#0 10
DQS0# VSS
72 SODIMM A DECOUPLING Layout Note: Place these Caps near SO-DIMMA.
5 M_A_DQS#1 27 127
DQS1# VSS
5 M_A_DQS#2 45 128
DQS2# VSS 1D5V_S3
5 M_A_DQS#3 62 133
DQS3# VSS
5 M_A_DQS#4 135
DQS4# VSS
134 0112: Change TC1401 330uF 6mȍ To 220uF 15 mȍ"DY" same as DV14 Brazo
5 M_A_DQS#5 152 138
DQS5# VSS
5 M_A_DQS#6 169 139
DQS6# VSS
5 M_A_DQS#7 186 144
DQS7# VSS TC1401
145
VSS
5 M_A_DQS0 12 150
DQS0 VSS
1
Do Not Stuff
29 151 C1403 C1404 C1405 C1406 C1407 C1408 C1409 C1410
5 M_A_DQS1 DQS1 VSS
Do Not Stuff
SC10U6D3V5KX-1GP
Do Not Stuff
SC10U6D3V5KX-1GP
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
5 M_A_DQS2 47 155
DQS2 VSS
64 156
DY DY DY DY DY DY DY
2
5 M_A_DQS3 DQS3 VSS
5 M_A_DQS4 137 161
DQS4 VSS
5 M_A_DQS5 154 162
DQS5 VSS
5 M_A_DQS6 171 167
DQS6 VSS
5 M_A_DQS7 188 168
DQS7 VSS
172
VSS
5 M_A_DIM0_ODT0 116 173
ODT0 VSS
5 M_A_DIM0_ODT1 120 178
ODT1 VSS
179
VSS
DDR_VREF_S3 126 184
VREF_CA VSS
1
1 185 C1414 C1415 C1416 C1417
VREF_DQ VSS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
189
VSS
Intel HR channel A & B RST tied toghter 5 M_A_RST# 30 190
2
RESET# VSS
AMD have to separate channel A & B 195
VSS
196
VSS
0D75V_S0 203 205
VTT1 VSS
204 206
VTT2 VSS
M_A_RST#
1
C1425 DDR3-204P-43-GP
Do Not Stuff H =4mm
DY
2
0914: DIMM1 Change To 62.10017.N71
A 0628: Reserve Cap A
Wistron Corporation
Title
DDR3-SODIMM1

5 4 3 2 1
5 4 3 2 1
D
SSID = MEMORY D
SO-DIMMB is placed farther from 0117: Brazo S3 Issue, Sabine Reserve Only
the Processor than SO-DIMMA
M_B_DIM0_CKE0
M_B_DIM0_CKE1
DM2
5 M_B_A0 98 NP1
A0 NP1
5 M_B_A1 97 NP2
A1 NP2
1
5 M_B_A2 96
A2 R1503 R1504
5 M_B_A3 95 110 M_B_RAS# 5
A3 RAS# Do Not Stuff Do Not Stuff
5 M_B_A4 92 113 M_B_WE# 5
A4 WE#
5 M_B_A5 91
A5 CAS#
115 M_B_CAS# 5 DY DY
90
2
5 M_B_A6 A6
5 M_B_A7 86 114 M_B_DIM0_CS#0 5
A7 CS0#
5 M_B_A8 89 121 M_B_DIM0_CS#1 5
A8 CS1#
5 M_B_A9 85
A9
5 M_B_A10 107 73 M_B_DIM0_CKE0 5
A10/AP CKE0
5 M_B_A11 84 74 M_B_DIM0_CKE1 5
A11 CKE1
5 M_B_A12 83
A12
5 M_B_A13 119 101 M_B_DIM0_CLK_DDR0 5
A13 CK0
5 M_B_A14 80 103 M_B_DIM0_CLK_DDR#0 5
A14 CK0#
5 M_B_A15 78
A15
5 M_B_BS2 79 102 M_B_DIM0_CLK_DDR1 5
A16/BA2 CK1
104 M_B_DIM0_CLK_DDR#1 5
CK1#
5 M_B_BS0 109
BA0
5 M_B_BS1 108 11 M_B_DM0 5
BA1 DM0
28 M_B_DM1 5
DM1
5 M_B_DQ0 5 46 M_B_DM2 5
DQ0 DM2
5 M_B_DQ1 7 63 M_B_DM3 5
DQ1 DM3
5 M_B_DQ2 15
DQ2 DM4
136 M_B_DM4 5 Intel HR DM tied to GND
17 153 3D3V_S0
5 M_B_DQ3 DQ3 DM5 M_B_DM5 5 AMD still following previous design
5 M_B_DQ4 4 170 M_B_DM6 5
DQ4 DM6
5 M_B_DQ5 6 187 M_B_DM7 5
DQ5 DM7
1
5 M_B_DQ6 16
DQ6 R1501
5 M_B_DQ7 18 200 PCH_SMBDATA 14,79,82
DQ7 SDA 10KR2J-3-GP
5 M_B_DQ8 21 202 PCH_SMBCLK 14,79,82
DQ8 SCL
C
5 M_B_DQ9 23 C
DQ9 3D3V_S0
33 198
2
5 M_B_DQ10 DQ10 EVENT#
35 SA0_DIM1
5 M_B_DQ11 DQ11
5 M_B_DQ12 22 199
DQ12 VDDSPD SA1_DIM1
5 M_B_DQ13 24
DQ13
1
34 197 SA0_DIM1 C1501 C1502
5 M_B_DQ14 DQ14 SA0
1
36 201 SA1_DIM1 SCD1U10V2KX-5GP Do Not Stuff
5 M_B_DQ15
39
DQ15 SA1 DY R1502
2
5 M_B_DQ16 DQ16
5 M_B_DQ17 41 77 Do Not Stuff
DQ17 NC#1
5 M_B_DQ18 51 122
DQ18 NC#2 1D5V_S3
53 125
2
5 M_B_DQ19 DQ19 NC#/TEST
5 M_B_DQ20 40
DQ20
5 M_B_DQ21 42 75
DQ21 VDD1
5 M_B_DQ22 50 76
DQ22 VDD2
5 M_B_DQ23 52 81
DQ23 VDD3
5 M_B_DQ24 57 82
DQ24 VDD4
5 M_B_DQ25 59
DQ25 VDD5
87 Intel HR B channel address is 01
5 M_B_DQ26 67 88 AMD B channel address is 10
DQ26 VDD6
5 M_B_DQ27 69 93
DQ27 VDD7
5 M_B_DQ28 56 94
DQ28 VDD8
5 M_B_DQ29 58 99
DQ29 VDD9
5 M_B_DQ30 68 100
DQ30 VDD10
5 M_B_DQ31 70 105
DQ31 VDD11
5 M_B_DQ32 129 106
DQ32 VDD12
5 M_B_DQ33 131 111
DQ33 VDD13
5 M_B_DQ34 141 112
DQ34 VDD14
5 M_B_DQ35 143 117
DDR_VREF_S3 DQ35 VDD15
5 M_B_DQ36 130
DQ36 VDD16
118 SODIMM B DECOUPLING Layout Note: Place these Caps near SO-DIMMB.
5 M_B_DQ37 132 123
DQ37 VDD17
5 M_B_DQ38 140 124
DQ38 VDD18 1D5V_S3
5 M_B_DQ39 142
DQ39
1
C1516 C1517 147 2

5 M_B_DQ40 DQ40 VSS
C1515 Do Not Stuff SCD1U10V2KX-5GP 149 3
SCD1U10V2KX-5GP DY 5 M_B_DQ41
157
DQ41 VSS
8
2
5 M_B_DQ42 DQ42 VSS

5 M_B_DQ43 159 9
DQ43 VSS
5 M_B_DQ44 146 13
DQ44 VSS C1503 C1504 C1505 C1506 C1507 C1508 C1509 C1510
5 M_B_DQ45 148 14
DQ45 VSS
1
Do Not Stuff
Do Not Stuff
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
Do Not Stuff
SC10U6D3V5KX-1GP
Do Not Stuff
5 M_B_DQ46 158 19
DQ46 VSS
5 M_B_DQ47 160 20
DQ47 VSS
163 25
DY DY DY DY
2
5 M_B_DQ48 DQ48 VSS
5 M_B_DQ49 165 26
B DQ49 VSS B
5 M_B_DQ50 175 31
0D75V_S0 DQ50 VSS
5 M_B_DQ51 177 32
DQ51 VSS
5 M_B_DQ52 164 37
DQ52 VSS
5 M_B_DQ53 166 38
DQ53 VSS
5 M_B_DQ54 174 43
DQ54 VSS
5 M_B_DQ55 176 44
DQ55 VSS
1
C1518 C1519 C1520 C1521 181 48

5 M_B_DQ56 DQ56 VSS
5 M_B_DQ57 183
DQ57 VSS
49
1
191 54 C1511 C1512 C1513 C1514
2
5 M_B_DQ58 DQ58 VSS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
5 M_B_DQ59 193 55
DQ59 VSS
180 60
2
5 M_B_DQ60 DQ60 VSS
5 M_B_DQ61 182 61
DQ61 VSS
Place these caps close to VTT1 and VTT2. 5 M_B_DQ62 192
DQ62 VSS
65
5 M_B_DQ63 194 66
DQ63 VSS
71
VSS
5 M_B_DQS#0 10 72
DQS0# VSS
5 M_B_DQS#1 27 127
DQS1# VSS
5 M_B_DQS#2 45 128
DQS2# VSS
5 M_B_DQS#3 62 133
DQS3# VSS
5 M_B_DQS#4 135 134
DQS4# VSS
5 M_B_DQS#5 152 138
DQS5# VSS
5 M_B_DQS#6 169 139
DQS6# VSS
5 M_B_DQS#7 186 144
DQS7# VSS
145
VSS
5 M_B_DQS0 12 150
DQS0 VSS
5 M_B_DQS1 29 151
DQS1 VSS
5 M_B_DQS2 47 155
DQS2 VSS
5 M_B_DQS3 64 156
DQS3 VSS
5 M_B_DQS4 137 161
DQS4 VSS
5 M_B_DQS5 154 162
DQS5 VSS
5 M_B_DQS6 171 167
DQS6 VSS
5 M_B_DQS7 188 168
DQS7 VSS
172
VSS
5 M_B_DIM0_ODT0 116 173
ODT0 VSS
5 M_B_DIM0_ODT1 120 178
ODT1 VSS
179
VSS
DDR_VREF_S3 126 184
VREF_CA VSS
1 185
VREF_DQ VSS
189
M_B_RST# VSS
Intel HR channel A & B RST tied toghter 5 M_B_RST# 30
RESET# VSS
190
AMD have to separate channel A & B 195
VSS
1
A C1522 A
196
Do Not Stuff VSS
203 205
DY 0D75V_S0
204
VTT1 VSS
206
2
VTT2 VSS
DDR3-204P-44-GP DQ15 AMD DIS SAMSUNG TI

H = 8mm
0628: Reserve Cap
Wistron Corporation
0914: DIMM2 Change To 62.10017.N91 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
DDR3-SODIMM2

5 4 3 2 1
5 4 3 2 1
D D
C C
B B
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
5 4 3 2 1
FCH1E Part 5 of 5
1
C1716 0628: Change R1712 & R1715 Short Pad 3D3V_S0 3D3V_S0
SC150P50V2KX-GP
PCIE_RST#_C AE2 AF3 PCI_CLK0_R
TP59 Do Not Stuff
2
PCIE_RST# PCICLK0
1
27,36 A_RST# 1 R1717 2 33R2J-2-GP A_RST#_R AD5 AF1 PCI_CLK1_R 1 R1712 2 Do Not Stuff PCI_CLK1 21
A_RST# PCICLK1/GPO36 PCI_CLK2_R R1723 R1733
AF5 TP60 Do Not Stuff
C1707 SCD1U16V2KX-3GP PCICLK2/GPO37
4 UMI_FCH_APU_RX0P 1 2 A_RX0P_C AE30 UMI_TX0P PCICLK3/GPO38 AG2 PCI_CLK3_R 1 R1714 2 22R2J-2-GP CLK_PCI_LPC 21,71
C1708 1 2 SCD1U16V2KX-3GP A_RX0N_C AE32 AF6 PCI_CLK4_R 1 R1715 2 Do Not Stuff DIS_UMA DN15
4 UMI_FCH_APU_RX0N UMI_TX0N PCICLK4/14M_OSC/GPO39 PCI_CLK4 21
PCI CLKS
C1709 1 2 SCD1U16V2KX-3GP A_RX1P_C AD33
4 UMI_FCH_APU_RX1P
2
C1710 SCD1U16V2KX-3GP A_RX1N_C UMI_TX1P PCI_RST# dGPU_PRSNT# GSENSOR_DET
4 UMI_FCH_APU_RX1N 1 2 AD31 UMI_TX1N PCIRST# AB5 1 TP1702
C1711 1 2 SCD1U16V2KX-3GP A_RX2P_C AD28
4 UMI_FCH_APU_RX2P UMI_TX2P
1
C1712 1 2 SCD1U16V2KX-3GP A_RX2N_C AD29
4 UMI_FCH_APU_RX2N UMI_TX2N
C1713 1 2 SCD1U16V2KX-3GP A_RX3P_C AC30 AJ3 R1722 R1735
4 UMI_FCH_APU_RX3P UMI_TX3P AD0/GPIO0
C1714 1 2 SCD1U16V2KX-3GP A_RX3N_C AC32 AL5 0109: EMI Reserve, Place Near R1728 10KR2J-3-GP Do Not Stuff
D 4 UMI_FCH_APU_RX3N UMI_TX3N AD1/GPIO1 D
AD2/GPIO2
AG4 PX DY
4 UMI_APU_FCH_TX0P AB33 AL6
2
UMI_RX0P AD3/GPIO3
4 UMI_APU_FCH_TX0N AB31 AH3
UMI_RX0N AD4/GPIO4 DGPU_PWROK
4 UMI_APU_FCH_TX1P AB28 AJ5
UMI_RX1P AD5/GPIO5
4 UMI_APU_FCH_TX1N AB29 UMI_RX1N AD6/GPIO6 AL1
Y33 AN5 GSENSOR_DET For SW Jin define For SW Jin define
4 UMI_APU_FCH_TX2P UMI_RX2P AD7/GPIO7
2
Y31 AN6 dGPU_PRSNT#
4 UMI_APU_FCH_TX2N UMI_RX2N AD8/GPIO8
Y28 AJ1 EC1704
4 UMI_APU_FCH_TX3P UMI_RX3P AD9/GPIO9
Y29 AL8
4 UMI_APU_FCH_TX3N DY
1
UMI_RX3N AD10/GPIO10
Do Not Stuff
AD11/GPIO11 AL3
1 R1708 2 590R2F-GP APU_PCIE_CALRP AF29 PCIE_CALRP AD12/GPIO12 AM7
1D1V_PCIE_S0 1 R1709 2 2KR2F-3-GP APU_PCIE_CALRN AF31 AJ6 CLK_PCI_LPC
PCI EXPRESS INTERFACES

PCIE_CALRN AD13/GPIO13
AK7
AD14/GPIO14
V33 GPP_TX0P AD15/GPIO15 AN8
1
V31 AG9
C1719 1 GPP_TX0N AD16/GPIO16
75 PCIE_TXP5 2 Do Not Stuff
DN15 PCIE_TXP5_C W30 GPP_TX1P AD17/GPIO17 AM11 DY EC1702
C1720 1 2 Do Not Stuff
DN15 PCIE_TXN5_C W32 AJ10 Do Not Stuff
75 PCIE_TXN5
2
GPP_TX1N AD18/GPIO18
AB26 GPP_TX2P AD19/GPIO19 AL12
AB27 AK11
AA24
GPP_TX3P AD21/GPIO21
AN12 Debug Strap
AA23 AG12
AE12
1214: Add DN15 Express Card
AD23/GPIO23 PCI_AD23 21
0719: EMI Request KBC
PCI INTERFACE
AA27 AC12 PCI_AD24 21
GPP_RX0P AD24/GPIO24
AA26
GPP_RX0N AD25/GPIO25
AE13 PCI_AD25 21 Folloiwng Intel HR netname
75 PCIE_RXP5 W27 GPP_RX1P AD26/GPIO26 AF13 PCI_AD26 21
75 PCIE_RXN5 V27 AH13 PCI_AD27 21
GPP_RX1N AD27/GPIO27 Do Not Stuff
V26 GPP_RX2P AD28/GPIO28 AH14 PE_PWRGD 1 R1728 2 DGPU_PWROK 86,92,93
PCIE_RST#_C 1 R1716 2 33R2J-2-GP PLT_RST# 9,71,82,83
W26 GPP_RX2N AD29/GPIO29 AD15 BACO
W24 GPP_RX3P AD30/GPIO30 AC15
1
W23 AE16 C1715
GPP_RX3N AD31/GPIO31 SC150P50V2KX-GP
AN3
CBE0#
AJ8
2
C CBE1# C
CBE2#
AN10 0916: Add 1D5V_VGA_PWOK Connect To FCH,
1D1V_CKVDD_S0 1 R1710 2 2KR2F-3-GP CLK_CALRN F27 AD12 AMD BACO Document Update
CLK_CALRN CBE3#
AG10
FRAME#
DEVSEL#
AK9 1207: Change DGPU_PWROK To 1D5V_VGA_PWOK
G30 PCIE_RCLKP IRDY# AL10 LDT_STP# connection is just for chipset automation purpose.
Ext. Clock_Gen G28
PCIE_RCLKN TRDY#
AF10 It is an automatic test for AMD validation team only
AE10 3D3V_S0 3D3V_S0
Do Not Stuff PAR 69 KB_LED_BL_DET
6 DISP_CLKP 1 R1718 2 FCHDISP_CLKP_R R26 DISP_CLKP STOP# AH1
Do Not Stuff 1 R1719 2 FCHDISP_CLKN_R T26 AM9 APU_STOP# 1 R1702 2 Do Not Stuff
6 DISP_CLKN DISP_CLKN PERR# DY 1D5V_S0
1
SERR# AH8 0105: Follow DV GPIO
Do Not Stuff 1 R1720 2 FCHTRVS_CLKP_R H33 AG15 R1724 R1725
9 TRAVIS_REFCLKP DISP2_CLKP REQ0#
Do Not Stuff 1 R1721 2 FCHTRVS_CLKN_R H31 AG13 Do Not Stuff Do Not Stuff
9 TRAVIS_REFCLKN DISP2_CLKN REQ1#/GPIO40 RTC_SENSE 60
Do Not Stuff REQ2#/CLK_REQ8#/GPIO41
AF15 DY DY
6 APU_CLKP 1 R1736 2 FCHAPU_CLKP_R T24 AM17 KB_LED_BL_DET 69 Muxless support
2
Do Not Stuff APU_CLKP REQ3#/CLK_REQ5#/GPIO42
6 APU_CLKN 1 R1737 2 FCHAPU_CLKN_R T23 AD16
APU_CLKN GNT0#
GNT1#/GPO44
AD13 PE_GPIO0 83 PE_GPIO0: VGA_RESET
Do Not Stuff 1 R1738 2 FCHGFX_CLKP_R J30 AD21
83 CLK_PCIE_VGA
Do Not Stuff SLT_GFX_CLKP GNT2#/SD_LED/GPO45 PE_GPIO1 92,93 PE_GPIO1: VGA_PowerEnable
83 CLK_PCIE_VGA# 1 R1739 2 FCHGFX_CLKN_R K29 AK17 SATA_ODD_DA# 56
SLT_GFX_CLKN GNT3#/CLK_REQ7#/GPIO46
Do Not Stuff R1744 1
DN15 NEW_CLK_R CLKRUN# AD19 PM_CLKRUN# 27
75 CLK_PCIE_NEW DN15 2 H27 GPP_CLK0P LOCK# AH9
New Card 75 CLK_PCIE_NEW#
Do Not Stuff R1745 1 2 NEW_CLK#_R H28 GPP_CLK0N PM_CLKRUN#: No PU Res needed, integrated Resistor PU10K
INTE#/GPIO32
AF18 INTE# 1 R1727 2 HDD_FALL_INT1 79 0719: ADD, Confirm SW
Do Not Stuff 1 R1740 2 CLK_MINI1_R J27 AE18 Do Not Stuff
82 CLK_PCIE_WLAN GPP_CLK1P INTF#/GPIO33
WLAN 82 CLK_PCIE_WLAN#
Do Not Stuff 1 R1741 2 CLK_MINI1#_R K26
GPP_CLK1N INTG#/GPIO34
AC16 DN15
INTH#/GPIO35
AD18 1019: Add KB_LED_BL_DET FCH GPIO.
F33 GPP_CLK2P
WWAN F31
GPP_CLK2N C1701 1 Do Not Stuff
Do Not Stuff 1 R1742 2 LAN_CLK_R E33
DY2
82 CLK_PCIE_LAN GPP_CLK3P
LAN 82 CLK_PCIE_LAN#
Do Not Stuff 1 R1743 2 LAN_CLK#_R E31
GPP_CLK3N LPCCLK0
B25 LPCCLK0_R 1 R1726 222R2J-2-GP LPC_CLK0 21,27
D25
CLOCK GENERATOR
LPCCLK1 R1729 33R2J-2-GP LPC_CLK1 21

GPP CLK port Device CLKREQ# M23 D27 LPC_AD0_R 1 2 LPC_AD0 27,71
B GPP_CLK4P LAD0 LPC_AD1_R R1730 33R2J-2-GP B
M24 GPP_CLK4N LAD1 C28 1 2 LPC_AD1 27,71
LPC
0 New Card 0 A26 LPC_AD2_R 1 R1731 2 33R2J-2-GP LPC_AD2 27,71 There is integrated pull-up.
LAD2 LPC_AD3_R R1732 33R2J-2-GP
1 WLAN 1 M27 GPP_CLK5P LAD3 A29 1 2 LPC_AD3 27,71
2 WWAN 2 M26 A31 LPC_FRAME#_R 1 R1734 2 33R2J-2-GP
GPP_CLK5N LFRAME# LPC_FRAME# 27,71
3 LAN 3 B27 INT_SERIRQ 1 R1705 2 Do Not Stuff
4 X N25
LDRQ0#
AE27 0304: Reserve 0 Ohm For EA Fail DY 3D3V_S0
GPP_CLK6P LDRQ1#/CLK_REQ6#/GPIO49 INT_SERIRQ
5 X N26
GPP_CLK6N SERIRQ/GPIO48
AE19 INT_SERIRQ 27
6 X
7 X R23
GPP_CLK7P
8 X R24
GPP_CLK7N
If LAN support Wake on S5, DMA_ACTIVE# G25 ALLOW_STOP 6
N27 GPP_CLK8P PROCHOT# E28 APU_PROCHOT#_VDDIO 6 0906: Change X1702 From 82.3001.661 To 82.3001.A81
do not use clock from FCH, R27 E26 Base on Sourcer Suggestion
APU
GPP_CLK8N APU_PG APU_STOP# H_CPUPWRGD 6,36,71

Use 48Mhz CLK For 5138 have to use X'tal LDT_STP# G26
APU_RST# F26 APU_RST# 6
32 CLK_PCH_48M 1 R1711 222R2J-2-GP 48M_OSC J26 32K_X1 1 2
14M_25M_48M_OSC C1702
G2 32K_X1 SC18P50V2JN-1-GP
32K_X1
1
DY EC1701 25M_X1 C31

25M_X1 32K_X2
G4 32K_X2
1
Do Not Stuff R1706
2
3
H7 1 2 Do Not Stuff PCH_SUSCLK_KBC 27
R1703
S5_CORE_EN 20MR3-GP X1702
RTCCLK F1 RTC_CLK 21
S5 PLUS
25M_X2 C33 F3 INTRUDER_ALERT# 1 TP1701

25M_X2 INTRUDER_ALERT# X-32D768KHZ-67-GP
0719: EMI Request E6 RTC_AUX_S5
2
VDDBT_RTC_G
2
2
71.HUDM2.M01 C1706
C1704 SCD1U16V2KX-3GP
1
32K_X2 1 2
25M_X1 1 2 PCH_SUSCLK_KBC C1703
X1701 SC18P50V2JN-1-GP
A SC15P50V2JN-2-GP A
1
1 4
DY EC1703
2
Do Not Stuff
Wistron Corporation
2
R1701
1MR2J-1-GP 2 3 1122 Modify: 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Change X1701 to 82.30020.D41 from 82.30020.851
1
XTAL-25MHZ-155-GP C1705 from Sourcer Dick updated. Title

82.30020.D41 0719: EMI Request
25M_X2 1 2
Size Document Number
Reserved Rev
SC15P50V2JN-2-GP Custom
5 4 3 2 1
5 4 3 2 1
0909: Modify
Pop R1843 For UMA Config 0109: EMI Reserve, Place Near R1810
Pop R1844 For Muxless Config Remove PCIE2_RST, Did Not Use FCH GPP
3D3V_S5
FCH_PCIE_RST#
2 R1843
2
Do Not Stuff
EC1803
UMA CLKREQG# 1213 Modify: Remove Dimm Thermal Function
DY Do Not Stuff
21
1
1214 Add PCIE2_RST For EXPRESS CARD FCH GPP
R1844
10KR2J-3-GP
Part 1 of 5
D DN15 FCH1A D
DIS_PX R1810 1 Do Not Stuff
2 FCH_PCIE_RST#_R AB6 G8
75 FCH_PCIE_RST#
1
PCIE_RST2#/PCI_PME#/GEVENT4# USBCLK/14M_25M_48M_OSC
R2 RI#/GEVENT22# USB_RCOMP 1 R1819 2 11K8R2F-GP
USB MISC
W7 SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP B9
27,36,44,46,75 PM_SLP_S3# T3
SLP_S3#
27,44,75 PM_SLP_S5# W2 H1
SLP_S5# USB_FSD1P/GPIO186
27 PM_PWRBTN# 1 R1809 2 Do Not Stuff PM_PWRBTN#_R J4 H3
PWR_BTN# USB_FSD1N
Confirm with SW, RSMRST# from KBC is push-pull. 36 FCH_PWRGD N7
PWR_GOOD
It can be drived high by SW. USB_FSD0P/GPIO185 H6
FCH_TEST0 T9 H5
USB 1.1
FCH_TEST1 TEST0 USB_FSD0N
T10 TEST1/TMS
1 R1825 2 100KR2J-1-GP RSMRST#_KBC FCH_TEST2 V9 H10 USB20_DP3 82
TEST2 USB_HSD13P
27 H_A20GATE 1 R1814 2 Do Not Stuff EC_A20M#_R AE22 G10 USB20_DM3 82
ACPI / WAKE UP EVENTS

EC_KB_RST#_R GA20IN/GEVENT0# USB_HSD13N
27 H_RCIN# 1 R1813 2 Do Not Stuff AG19 KBRST#/GEVENT1#
27 EC_SCI# EC_SCI# R9 K10 USB20_DP2 82
EC_SMI#_R LPC_PME#/GEVENT3# USB_HSD12P
27 EC_SMI# 1 R1832 2 Do Not Stuff C26 J12 USB20_DM2 82
LPC_SMI#/GEVENT23# USB_HSD12N
T5 LPC_PD#/GEVENT5#
U4 SYS_RESET#/GEVENT19# USB_HSD11P G12 USB20_DP1 82
RSMRST#_R 0716: From KBC 27 PCH_WAKE# K1 F12 USB20_DM1 82
WAKE#/GEVENT8# USB_HSD11N
1
C1802 V7
IR_RX1/GEVENT20#
DY Do Not Stuff 6,36,85 H_THERMTRIP# R10
THRMTRIP#/SMBALERT#/GEVENT2# USB_HSD10P
K12
3D3V_S0 1 R1815 2 10KR2J-3-GP WD_PWRGD AF19 K13
2
WD_PWRGD USB_HSD10N
27 RSMRST#_KBC 1 R1821 2 Do Not Stuff RSMRST#_R U2 B11 USB_PP9 32

RSMRST# USB_HSD9P
0719: ADD USB_HSD9N
D11 USB_PN9 32
AG24
CLK_REQ4#/SATA_IS0#/GPIO64
* Travis_EN#: Base on AMD suggestion, use the GPIO66 same the CRB first. 82 PCIE_CLK_LAN_REQ# 1 R1829 2 Do Not Stuff PCIE_CLK_LAN_RQ1#_R AE24 CLK_REQ3#/SATA_IS1#/GPIO63 USB_HSD8P E10 USB_PP8 75
If it work normally, ask BIOS to re-program to GPIO55 to double verify. DN15 CLK_PCIE_NEW_REQ#_R
AE26 SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD8N F10 USB_PN8 75
75 CLK_PCIE_NEW_REQ# 1 R1846 2 Do Not Stuff AF22 1214: Add Express Card For DN15
CLK_REQ0#/SATA_IS3#/GPIO60
1 R1842 2 Do Not Stuff
DY FCH_GPIO55 AH17 C10 USB_PP7 49
9 TRAVIS_EN# SATA_IS4#/FANOUT3/GPIO55 USB_HSD7P
DY AG18 A10 USB_PN7 49
9 TRAVIS_EN# SATA_IS5#/FANIN3/GPIO59 USB_HSD7N
1 R1840 2 Do Not Stuff HDA_SPKR_R AF24
3D3V_S5 29 HDA_SPKR SPKR/GPIO66
0719: Change From 2.2K and POP 14,75 SMB_CLK
AD26
SCL0/GPIO43 USB_HSD6P
H9
14,75 SMB_DATA AD25 SDA0/GPIO47 USB_HSD6N G9
RN1802 SCLK1 T7
SCLK1 SDATA1 SCL1/GPIO227
USB 2.0
4 1 R7 SDA1/GPIO228 USB_HSD5P A8 USB_PP5 49
3 2 SDATA1 AG25 C8
CLK_REQ2#/FANIN4/GPIO62 USB_HSD5N USB_PN5 49
C 82 CLK_PCIE_WLAN_REQ# 1 R1834 2 Do Not Stuff CLK_PCIE_WLAN_REQ#_R AG22 C
GPIO
SRN10KJ-5-GP CLK_REQ1#/FANOUT4/GPIO61
J2 F8 USB_PP4 63
IR_LED#/LLB#/GPIO184 USB_HSD4P
AG26 E8 USB_PN4 63
SMARTVOLT2/SHUTDOWN#/GPIO51 USB_HSD4N
V8
20 VGA_PD DDR3_RST#/GEVENT7#/VGA_PD
RN1804 W8 C6
FCH_TEST2 GBE_LED0/GPIO183 USB_HSD3P
1 8 Y6 A6
FCH_TEST1 SPI_HOLD#/GBE_LED1/GEVENT9# USB_HSD3N
2 7 V10 GBE_LED2/GEVENT10#
3 DY 6 FCH_TEST0 0909: Un-Stuff (DY) For Leakage Issue, Follow DQ15 Intel AA8 C5
GBE_STAT0/GEVENT11# USB_HSD2P USB_PP2 64
4 5 85 PEG_CLKREQ# 1 R1822 2 Do Not Stuff CLKREQG# AF25 A5 1214: Add FP For DN15
CLK_REQG#/GPIO65/OSCIN/IDLEEXIT# USB_HSD2N USB_PN2 64
DY
Do Not Stuff C1
USB_HSD1P USB_PP1 82
DN151 R1847 2 Do Not Stuff FFS_INT2_X M7 C3
79 FFS_INT2_R BLINK/USB_OC7#/GEVENT18# USB_HSD1N USB_PN1 82
27 EC_SWI# EC_SWI# R8
VGA_PD USB_OC6#/IR_TX1/GEVENT6#
1 R1845 2 Do Not Stuff T1 E1 USB_PP0 57
82 USB_OC#5 ODD_DA_Q USB_OC5#/IR_TX0/GEVENT17# USB_HSD0P
DY 56 ODD_DA_Q P6 USB_OC4#/IR_RX0/GEVENT16# USB_HSD0N E3 USB_PN0 57
56 SATA_ODD_PRSNT# 1 R1830 2 Do Not Stuff SATA_ODD_PRSNT#_R F5
PCH_WAKE# USB_OC3#/AC_PRES/TDO/GEVENT15#
1 R1839 2 Do Not Stuff P5 C16 USBSS_CALRP 1 R1817 2 1KR2F-3-GP
USB3
82 USB_OC#2 USB_OC2#/TCK/GEVENT14# USBSS_CALRP
DY J7 A16 USBSS_CALRN 1 R1818 2 1KR2F-3-GP
USB3 1D1V_VDD_SSUSB_S5
57 USB_OC#1 USB_OC1#/TDI/GEVENT13# USBSS_CALRN
T8
USB OC
57 USB_OC#0 USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#
1 R1824 2 Do Not Stuff EC_SCI#
USB_SS_TX3P A14 USB30_TXDP3_C C1803 1USB32 SCD1U16V2KX-3GP
USB30_TXDP3 62
DY EC18021 DY2Do Not Stuff C14 USB30_TXDN3_C C1804 1USB32 SCD1U16V2KX-3GP
USB_SS_TX3N USB30_TXDN3 62
1 R1833 2 Do Not Stuff EC_SWI#
29 HDA_CODEC_BITCLK 1 R1803 2 33R2J-2-GP HDA_BITCLK AB3
AZ_BITCLK USB_SS_RX3P
C12 USB30_RXDP3 62
DY 1 R1804 2 33R2J-2-GP HDA_SDOUT AB1 A12
29 HDA_CODEC_SDOUT AZ_SDOUT USB_SS_RX3N USB30_RXDN3 62
29 HDA_SDIN0 HDA_SDIN0 AA2
AZ_SDIN0/GPIO167
1 R1835 2 Do Not Stuff PM_PWRBTN# Y5 D15 USB30_TXDP2_C C1805 1USB32 SCD1U16V2KX-3GP
AZ_SDIN1/GPIO168 USB_SS_TX2P USB30_TXDP2 62
DY Y3 AZ_SDIN2/GPIO169 USB_SS_TX2N B15 USB30_TXDN2_C C1806 1USB32 SCD1U16V2KX-3GP
USB30_TXDN2 62
3D3V_S0 0721: Reserve PM_PWRBTN# If KBC Change To OD Y1
HDA_SYNC AZ_SDIN3/GPIO170
1 R1805 2 33R2J-2-GP
HD AUDIO
AD6 E14 USB30_RXDP2 62
29 HDA_CODEC_SYNC AZ_SYNC USB_SS_RX2P
1 R1806 2 33R2J-2-GP HDA_RST# AE4 F14 USB30_RXDN2 62
29 HDA_CODEC_RST# AZ_RST# USB_SS_RX2N
1
EC1801 F15 USB30_TXDP1_C C1807 1USB32 SCD1U16V2KX-3GP

USB_SS_TX1P USB30_TXDP1 62
1 R1836 2 Do Not Stuff EC_SMI# DY Do Not Stuff K19 G15 USB30_TXDN1_C C1808 1USB32 SCD1U16V2KX-3GP
USB 3.0
PS2_DAT/SDA4/GPIO187 USB_SS_TX1N USB30_TXDN1 62
DY J19
2
PS2_CLK/CEC/SCL4/GPIO188
J21 SPI_CS2#/GBE_STAT2/GPIO166 USB_SS_RX1P H13 USB30_RXDP1 62
G13 USB30_RXDN1 62
H_A20GATE USB_SS_RX1N
B
DY D21
PS2KB_DAT/GPIO189 USB_SS_TX0P
J16 B
C20 H16
PS2KB_CLK/GPIO190 USB_SS_TX0N
D23 PS2M_DAT/GPIO191
1 R1838 2 Do Not Stuff H_RCIN# C22 J15
PS2M_CLK/GPIO192 USB_SS_RX0P
DY USB_SS_RX0N
K15
There are integrated pull-up.
RN1801 F21 KSO_0/GPIO209
E20 H19 SCL2
SMB_CLK KSO_1/GPIO210 SCL2/GPIO193
1 4 F20 KSO_2/GPIO211 SDA2/GPIO194 G19 SDAT2
2 3 SMB_DATA A22 G22 SCLK3
KSO_3/GPIO212 SCL3_LV/GPIO195 SCLK3 6
E18 KSO_4/GPIO213 SDA3_LV/GPIO196 G21 SDATA3 SDATA3 6
A20 E22
SRN2K2J-1-GP KSO_5/GPIO214 EC_PWM0/EC_TIMER0/GPIO197
J18 H22
KSO_6/GPIO215 EC_PWM1/EC_TIMER1/GPIO198
H18 J22
KSO_7/GPIO216 EC_PWM2/EC_TIMER2/WOL_EN/GPIO199 EC_PWM2 21
G18 KSO_8/GPIO217 EC_PWM3/EC_TIMER3/GPIO200 H21
Modify Zero Power ODD circuit by B21
KSO_9/GPIO218
Annie team suggestion. K18 K21
KSO_10/GPIO219 EMBEDDED CTRL KSI_0/GPIO201
D19 KSO_11/GPIO220 KSI_1/GPIO202 K22
A18 KSO_12/GPIO221 KSI_2/GPIO203 F22 KB_DET# 69
C18 KSO_13/GPIO222 KSI_3/GPIO204 F24
B19 E24
RN1803 KSO_14/XDB0/GPIO223 KSI_4/GPIO205
B17 KSO_15/XDB1/GPIO224 KSI_5/GPIO206 B23
8 1 HDA_CODEC_RST# A24 C24
KSO_16/XDB2/GPIO225 KSI_6/GPIO207
7 2 D17 KSO_17/XDB3/GPIO226 KSI_7/GPIO208 F18 0914: Remove DBC_EN & COLOR_ENGINE
6 DY 3 HDA_CODEC_BITCLK
5 4 HDA_SDIN0
Do Not Stuff 71.HUDM2.M01 0719: If not used SMBUS or GPIO, PD 10k.
Checklist suggestion: Don't stuff for default RN1807 SRN10KJ-5-GP

SCLK3 4 1 SCL2 3 2
SDATA3 3 2 SDAT2 4 1
0719: Modify SRN10KJ-5-GP RN1805
A A
3D3V_S5
RN1806 DQ15 AMD DIS SAMSUNG TI
1 8 USB_OC#1
2 7 USB_OC#2
3 6 USB_OC#5
4 5 USB_OC#0 Wistron Corporation
SRN100KJ-8-GP-U
Title
Integrated PU is not HUDSON-M2(2/6)
supported when the pin is Size Document Number Rev
configured for USB over
current function. QUEEN AMD Muxless/UMA X00
5 4 3 2 1
5 4 3 2 1
Part 2 of 5
FCH1B
0630: Place Cap Near Connecetor
56 SATA_TXP0 C1901 1 2SCD01U16V2KX-3GP SATA_TXP0_C AK19 AL14

SATA_TX0P SD_CLK/SCLK_2/GPIO73
56 SATA_TXN0 C1902 1 2SCD01U16V2KX-3GP SATA_TXN0_C AM19 AN14
SATA_TX0N SD_CMD/SLOAD_2/GPIO74
1st SATA HDD 56 SATA_RXN0_C AL20
SD_CD#/GPIO75
AJ12
AH12
SATA_RX0N SD_WP/GPIO76
56 SATA_RXP0_C AN20 AK13
SATA_RX0P SD_DATA0/SDATI_2/GPIO77
AM13
SD_DATA1/SDATO_2/GPIO78
SD CARD
56 SATA_TXP1 C1905 1 2SCD01U16V2KX-3GP SATA_TXP1_C AN22 AH15
D SATA_TX1P SD_DATA2/GPIO79 D
56 SATA_TXN1 C1906 1 2SCD01U16V2KX-3GP SATA_TXN1_C AL22 AJ14
SATA_TX1N SD_DATA3/GPIO80
SATA ODD 56 SATA_RXN1_C AH20 AC4 GBE_COL
SATA_RX1N GBE_COL GBE_CRS
56 SATA_RXP1_C AJ20 AD3
SATA_RX1P GBE_CRS
AD9
GBE_MDCK
57 SATA_TXP2 C1909 1 2SCD01U16V2KX-3GP SATA_TXP2_C AJ22 W10 GBE_MDIO 1 R1920 2 10KR2J-3-GP 3D3V_S5
SATA_TX2P GBE_MDIO
57 SATA_TXN2 C1910 1 2SCD01U16V2KX-3GP SATA_TXN2_C AH22 AB8
SATA_TX2N GBE_RXCLK
AH7
GBE_RXD3
AM23 AF7
eSATA 57 SATA_RXN2_C
57 SATA_RXP2_C AK23
SATA_RX2N GBE_RXD2
AE7 RN1903
SATA_RX2P GBE_RXD1
AD7 8 1
GBE_RXD0
AH24 AG8 7 2
SATA_TX3P GBE_RXCTL/RXDV GBE_RXCLT
AJ24 AD1 6 3
SATA_TX3N GBE_RXERR
AB7 5 4
GBE_TXCLK
AN24 AF9
GBE LAN
SATA_RX3N GBE_TXD3 SRN10KJ-6-GP
AL24 AG6
SATA_RX3P GBE_TXD2
AE8
GBE_TXD1
AL26 AD8
SATA_TX4P GBE_TXD0
AN26 AB9
SATA_TX4N GBE_TXCTL/TXEN
AC2
GBE_PHY_PD
AJ26 AA7
SATA_RX4N GBE_PHY_RST# GBE_PHY
AH26 W9
SATA_RX4P GBE_PHY_INTR
AN29
SATA_TX5P
AL28 V6
SATA_TX5N SPI_DI/GPIO164
V5
SPI_DO/GPIO163
AK27
SATA_RX5N SPI_CLK/GPIO162
V3 0916: Remove SPI Signal Connect To FCH
SERIAL ATA
AM27 T6
SATA_RX5P SPI_CS1#/GPIO165
SPI ROM
V1
ROM_RST#/SPI_WP#/GPIO161
AL29
NC#AL29
AN31
NC#AN31 FCH_UMA_PX 1 R1904 2150R2F-1-GP
L30 CRT_RED 94
C VGA_RED C
AL31
NC#AL31
FCH_UMA_PX 1 R1905 2150R2F-1-GP
AL33 L32 CRT_GREEN 94
NC#AL33 VGA_GREEN
FCH_UMA_PX 1 R1906 2150R2F-1-GP
AH33 M29 CRT_BLUE 94
NC#AH33 VGA_BLUE
AH31
NC#AH31
AJ33 M28 CRT_HSYNC 94
NC#AJ33 VGA_HSYNC/GPO68
AJ31 N30 CRT_VSYNC 94
NC#AJ31 VGA_VSYNC/GPO69
M33
VGA DAC
VGA_DDC_SDA/GPO70 CRT_DDC_DATA 94
N32 CRT_DDC_CLK 94
SATA_CALP VGA_DDC_SCL/GPO71
1 R1901 2 1KR2F-3-GP AF28
SATA_CALN SATA_CALRP
1D1V_SATA_S0 1 R1902 2 1KR2F-3-GP AF27 K31 HUDSON_DAC_RESET 1 R1907 2715R2F-GP
SATA_CALRN VGA_DAC_RSET
FCH_UMA_PX
V28 DP1_AUXP_R 6
AUX_VGA_CH_P
68 SATA_LED# AD22 V29 DP1_AUXN_R 6
SATA_ACT#/GPIO67 AUX_VGA_CH_N
U28 AUXCAL 1 R1913 2100R2F-L1-GP-U 1D1V_VDDAN_ML_S0
AUXCAL
AF21
SATA_X1
T31 DP1_TX0P_R 6
ML_VGA_L0P
[Checklist]: ML_VGA_L0N
T33 DP1_TX0N_R 6
T29 DP1_TX1P_R 6
Integrated Clock Mode, left unconnected ML_VGA_L1P
T28 DP1_TX1N_R 6
ML_VGA_L1N
R32 DP1_TX2P_R 6
ML_VGA_L2P
VGA MAINLINK
AG21 R30 DP1_TX2N_R 6
SATA_X2 ML_VGA_L2N
P29 DP1_TX3P_R 6
ML_VGA_L3P
P28 DP1_TX3N_R 6
ML_VGA_L3N
1 R1908 2Do Not Stuff 3D3V_VDDAN_DAC_S0_R
support ODD Zero power ML_VGA_HPD/GPIO229
C29 DY DP_HPD1_R 6
AH16 N2 PSW_CLR#
FANOUT0/GPIO52 VIN0/GPIO175 VRAM_SIZE1
56 SATA_ODD_PWRGT AM15 M3
B FCH_PROCHOT#_C FANOUT1/GPIO53 VIN1/GPIO176 VRAM_SIZE2 B
Do Not Stuff TP1910 1 AJ16 L2
FANOUT2/GPIO54 HW MONITOR VIN2/SDATI_1/GPIO177 MEM_1V5
VIN3/SDATO_1/GPIO178
N4
MEM_1V35
[VRAM_SIZE1:VRAM_SIZE2]
AK15 P1
FANIN0/GPIO56 VIN4/SLOAD_1/GPIO179 VIN_VDDIO LL=512M / HL=1G / LH=2G
AN16 P3
FANIN1/GPIO57 VIN5/SCLK_1/GPIO180 VIN_VDDR
AL16 M1
FANIN2/GPIO58 VIN6/GBE_STAT3/GPIO181 GPIO182 3D3V_S5
M5
GPIO171 VIN7/GBE_LED3/GPIO182
K6
FCH_USB3.0PORT_EN# TEMPIN0/GPIO171
K5 AG16
MB_THRMDA_FCH TEMPIN1/GPIO172 NC#AG16
K3 AH10 VDDIO MEM_1V5 MEM_1V35
1
APU_TALERT# TEMPIN2/GPIO173 NC#AH10
6,27 PCH_TEMP_ALERT# 1 R1912 2 Do Not Stuff
DY M6 A28
TEMPIN3/TALERT#/GPIO174 NC#A28
NC#G27
G27 1.5V H Don't Care
NC#L4
L4 2G R2214
Do Not Stuff
1G R2216
10KR2J-3-GP
1.35V L H
2
71.HUDM2.M01 VRAM_SIZE1
VRAM_SIZE2
1
If not used HWM or GPIO, PD 10k. R2215 R2217
RN1901 1G_512M 10KR2J-3-GP Do Not Stuff
GPIO171
8 1
FCH_USB3.0PORT_EN#
512M_2G
7 2
2
6 3 GPIO182
5 4 VIN_VDDR
SRN10KJ-6-GP
For PX use only.
RN1902
8 1 VIN_VDDIO
7 2 MEM_1V35
6 3 MEM_1V5
A PSW_CLR# A
5 4 DQ15 AMD DIS SAMSUNG TI
SRN10KJ-6-GP
Wistron Corporation
1 R1914 2 10KR2J-3-GP MB_THRMDA_FCH 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1 R1915 2 10KR2J-3-GP APU_TALERT#
Title
1213 Modify: Remove Dimm Thermal Function
Pop R1914 If function Not used.
Reserved
5 4 3 2 1
5 4 3 2 1
1027 Modify: Errata Add 0111: Change R2019 From 100K to 0 Ohm
5V_S0
2
1207 Modify: Change From 0402 0 Ohm To 0603
DY R2019
3D3V_S0 3D3V_FCH_VDDIO_S0 FCH1C Part 3 of 5 1D1V_VDDCR_S0 1D1V_S0 Do Not Stuff
R2002
1 2 Do Not Stuff 102mA AB17 T14 1007mA 1 2
1
VDDIO_33_PCIGP VDDCR_11 R2003 Do Not Stuff
AB18 T17
VDDIO_33_PCIGP VDDCR_11
AE9 T20
VDDAN_11_CLK_B
C2002 C2003 C2004 C2005 AD10 U16 C2006 C2007 C2008 C2009 C2010
SC10U6D3V5KX-1GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP VDDIO_33_PCIGP VDDCR_11 SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC10U6D3V5KX-1GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP
AG7 U18
CORE S0
AC13 V14
PCI/GPIO I/O
2
2
AB12 V17
AB13 V20
AB14
Y17
1D1V_CKVDD_S0 33 ohm 3A
1027 Modify: Change All 22uF To 10uF AB16
VDDIO_33_PCIGP
3D3V_VPPL_SYS_S0 50mA H24 H26 340mA 1 2 VDDAN_11_CLK
VDDPL_33_SYS VDDAN_11_CLK
D 3D3V_VDDPL_MLDAC_S0 1 R2004 2Do Not Stuff VDDPL_33_DAC 20mA V22 J25 R2023 Do Not Stuff D
G
VDDPL_33_DAC VDDAN_11_CLK 1D1V_S0
1 R2005 2Do Not Stuff VDDPL_33_ML 12mA U22 K24
VDDPL_33_ML VDDAN_11_CLK
1
220 ohm 300mA 3D3V_VDDAN_DAC_S0_R 30mA T22 L22 C2011 C2012 C2013 C2014 C2015 Do Not Stuff
3D3V_S0 VDDAN_33_DAC VDDAN_11_CLK SC1U6D3V2KX-GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SC1U6D3V2KX-GP SC10U6D3V5KX-1GP VDDAN_11_CLK
3D3V_VDDPL_SSUSB_S5 11mA L18 VDDPL_33_SSUSB_S VDDAN_11_CLK
M22 D DY S
L2003 3D3V_VDDPL_USB_S5 14mA D7 N21
2
VDDPL_3.3V_PCIE VDDPL_33_USB_S VDDAN_11_CLK
1 2 11mA AH29 VDDPL_33_PCIE VDDAN_11_CLK
N22
CLKGEN I/O
BLM15AG221SS1D-GP 12mAAG28 P22 33 ohm 3A Q2004
VDDPL_33_SATA VDDAN_11_CLK
1
1
C2016 C2017 1 R2006 Do Not Stuff LDO_CAP 1D1V_PCIE_S0 1D1V_S0 Do Not Stuff C2074
68.00084.E21 1D5V_S0 2
DY
SC2D2U6D3V3KX-GP SCD1U10V2KX-5GP C2018 1 2 Do Not Stuff DY Do Not Stuff
DY M31 AB24 1088mA 1 2
2
2
1D1V_VDDAN_MLDAC_S0 1D1V_VDDAN_ML_S0 1D1V_VDDPL_DAC_S0 LDO_CAP VDDAN_11_PCIE R2024 Do Not Stuff
Y21 1 2
L2005 VDDAN_11_PCIE R2029 Do Not Stuff
V21 AE25
VDDPL_11_DAC VDDAN_11_PCIE
1
220 ohm 300mA 1 2 1D1V_VDDAN_MLDAC 1 R2007 2 Do Not Stuff 7mA AD24 C2019 C2021 C2022 C2020 C2023
3D3V_S0 PBY160808T-330Y-N-GP VDDAN_11_PCIE
1 R2008 2 Do Not Stuff 226mA Y22 AB23 SC1U6D3V2KX-GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SC1U6D3V2KX-GP SC10U6D3V5KX-1GP
L2006 VDDAN_11_ML VDDAN_11_PCIE
V23 AA22 1207 Modify: Reserve R2029 DY Co-lay
2
VDDAN_11_ML VDDAN_11_PCIE
1
1 2 VDDPL_3.3V_SATA C2026 C2027 C2028 V24 AF26
PCI EXPRESS
SC4D7U6D3V3KX-GP
SCD1U10V2KX-5GP
BLM15AG221SS1D-GP SCD1U10V2KX-5GP V25
MAIN LINK
AG27 33 ohm 3A
1
C2024 C2025 1D1V_SATA_S0 1D1V_S0 1D2V_S5
2
SC2D2U6D3V3KX-GP SCD1U10V2KX-5GP
68.00084.E21
2mA AB10 AA21 1337mA 1 2
2
VDDIO_33_GBE_S VDDAN_11_SATA R2025 Do Not Stuff

Y20
VDDAN_11_SATA
AB21
VDDAN_11_SATA
1
AB22 C2029 C2030 C2031 C2032 C2033
VDDAN_11_SATA
1
63mA AB11 AC22 SC1U6D3V2KX-GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SC1U6D3V2KX-GP SC10U6D3V5KX-1GP
VDDCR_11_GBE_S VDDAN_11_SATA 3D3V_S5 R2027
AA11 AC21
2
VDDCR_11_GBE_S VDDAN_11_SATA
SERIAL ATA
AA20 U2001 DY
VDDAN_11_SATA
1
Do Not Stuff
AA18 C2077
VDDAN_11_SATA
GBE LAN
145mAAA9 AB20 1 5
2
VDDIO_GBE_S VDDAN_11_SATA IN OUT
Do Not Stuff
AA10 AC19 1027 Modify: Change All 22uF To 10uF 2
GND DY DY
2
VDDIO_GBE_S VDDAN_11_SATA
2
0120: Modify to 0402 0 Ohm C2075 3 4 1D2V_SET
SHDN# SET
DY
Do Not Stuff
1
1
220 ohm 3A Do Not Stuff
3D3V_S5 3D3V_USB_S5 3D3V_S5 R2028
Do Not Stuff
1 2 470mA G7 VDDAN_33_USB_S VDDIO_33_S
N18 60mA DY
L2008 Do Not Stuff H8 L19 Vout=1.0*(1+R1/R2)
2
VDDAN_33_USB_S VDDIO_33_S
1
J8 M18 C2034 C2035 C2036
1
C2037 C2038 C2039 C2040 C2041

SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP SCD1U10V2KX-5GP
K8
K9
V12
V13
DYDo Not Stuff SC2D2U6D3V3KX-GP SC2D2U6D3V3KX-GP
2
M9 Y12
2
3.3V_S5 I/O
M10 Y13
N9 W11
VDDAN_33_USB_S VDDIO_33_S 3D3V_S5
N10
USB
VDDAN_33_USB_S L2009
M12
VDDAN_33_USB_S VDDXL_3.3V
220 ohm 300mA 0120: Modify to 0402 0 Ohm N12
VDDAN_33_USB_S VDDXL_33_S
G24 5mA 1 2
1D1V_S5 M11 BLM15AG221SS1D-GP
VDDAN_33_USB_S
1
1D1V_S5 C2042 C2043 68.00084.E21
1 L2010 Do Not Stuff VDDAN_1.1V_USB
C
2
1D1V_S5
220 ohm 300mA
140mA U12
U13
VDDAN_11_USB_S VDDCR_11_S
N20
M20
190mA
VDDCR_1D1V 1 R2010 2 Do Not Stuff
DYDo Not Stuff SC2D2U6D3V3KX-GP
220 ohm 300mA C
2
VDDAN_11_USB_S VDDCR_11_S
1
C2044 C2045 C2001 C2049 If support USB 3.0 or LAN wake-up, pls tie to 3.3V_S5
1
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC2D2U6D3V3KX-GP SCD1U10V2KX-5GP 1 L2011 2 Do Not Stuff VDDCR_1.1V_USB 42mA T12 1D2V_S5
VDDCR_11_USB_S VDDPL_11_SYS_S
J24 70mA 1D1V_VPPL_SYS_S5 otherwise, tie to 3.3V_S0
C2046S C2047S C2048 T13 1 R2021 2 Do Not Stuff 1D2V_VPPL_SYS_S5
2
VDDCR_11_USB_S
1
1D2V_S5
SC10U6D3V5KX-1GP
DY
CD1U10V2KX-5GP
CD1U10V2KX-5GP
2
M8 12mA 3D3V_VDDAN_HWM_S5 1 R2018 2 Do Not Stuff Confrim
VDDAN_33_HWM_S
1 R2020 2 Do Not Stuff 282mA P16 DY
2
VDDAN_11_SSUSB_S
DY M14
VDDAN_11_SSUSB_S Codec power use3.3V,VDDIO_AZ have to tied to 3.3V
33 ohm 3A N14
VDDAN_11_SSUSB_S VDDIO_AZ_S
AA4 26mA VDDIO_AZ Codec power use1.5V,VDDIO_AZ have to tied to 1.5V
P13
1D1V_S5 1D1V_VDD_SSUSB_S5 VDDAN_11_SSUSB_S If use 1.5V_S5 power,have to add LDO for it extra
P14
VDDAN_11_SSUSB_S
220 ohm 300mA
1 R2001 2 Do Not Stuff VDDAN_1.1V_SSUSB_S 424mA N16 VDDCR_11_SSUSB_S 3D3V_USB_S5 3D3V_VDDPL_USB_S5 3D3V_S5 VDDIO_AZ
N17
USB SS
VDDCR_11_SSUSB_S
1 2 1 R2011 2 Do Not Stuff VDDCR_11_SSUSB_S P17 L2013
L2001 Do Not Stuff VDDCR_11_SSUSB_S
M17 1 2 1 R2012 2 Do Not Stuff
VDDCR_11_SSUSB_S BLM15AG221SS1D-GP
USB3
1
C2053 C2054 C2055 C2056

1
1
SC10U6D3V5KX-1GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R2017 C2050 C2051 C2052 C2060 C2061 C2059

Do Not Stuff SCD1U10V2KX-5GP SCD1U10V2KX-5GP SC1U6D3V2KX-GP 68.00084.E21 SC2D2U6D3V3KX-GP SCD1U10V2KX-5GP SC2D2U6D3V3KX-GP
Del reservaton 1D5V_S5
Non USB3 USB3 USB3 USB3 USB3 USB3 USB3 USB3 POWER
2
2
2
71.HUDM2.M01
0120: Modify to 0402 0 Ohm

If support USB 3.0 wake-up, tie to 1.1V_S5
If no, tie to 1.1V_S0,
If no USB 3.0, tied to GND 220 ohm 300mA 3D3V_VDDAN_HWM_S5
3D3V_S0 3D3V_VDDPL_MLDAC_S0 3D3V_S0 3D3V_VPPL_SYS_S0 3D3V_S5 1D1V_S5 1D1V_VPPL_SYS_S5 3D3V_S5 3D3V_VDDPL_SSUSB_S5
L2014 L2012 L2017 USB3
L2016
1 2 1 2 1 L2015 2 1 2 1 2
DY
Do Not Stuff BLM15AG221SS1D-GP Do Not Stuff BLM15AG221SS1D-GP BLM15AG221SS1D-GP
1
Do Not Stuff 220 ohm 300mA 220 ohm 300mA 220 ohm 300mA 220 ohm 300mA
1
1
3D3V_VDDAN_DAC_S0_R C2062 C2063 C2057 C2058 C2065 C2064 C2068 C2069 C2066 C2067 R2016
SC2D2U6D3V3KX-GP SCD1U10V2KX-5GP 68.00084.E21 SC2D2U6D3V3KX-GP SCD1U10V2KX-5GP SC2D2U6D3V3KX-GP SCD1U10V2KX-5GP SC2D2U6D3V3KX-GP SCD1U10V2KX-5GP SC2D2U6D3V3KX-GP SCD1U10V2KX-5GP Do Not Stuff
68.00084.E21 68.00084.E21
USB3 USB3 Non USB3
2
2
2
HW Montior Not implemented If support USB 3.0 or LAN wake-up, tie to 1.1V_S5 If USB 3.0 wake-up is supported, tie to 3.3V_S5
or HW Montior balls not used GPIO otherwise, tie to 1.1V_S0 If no, tie to 3.3V_S0,
=> Decoupled cap not used If no USB 3.0, tie to GND
B B
HW Montior Not implemented
3D3V_S0 3D3V_VDDAN_DAC_S0_R
15V_S5
or HW Montior balls used as GPIO
L2018 => Bead not used 1D2V_S5 1D2V_VPPL_SYS_S5
1 2 DY
DoDY
Not Stuff L2020
1
3D3V_VDDAN_DAC_S0 C2072 C2071 1 2

R2014 Q2002 SC2D2U6D3V3KX-GP SCD1U10V2KX-5GP Do Not Stuff
100KR2J-1-GP Do Not Stuff
Do Not Stuff
2
1
D S C2078
L2019 DY Do Not Stuff
DY
2
Do Not Stuff 1 2
2
VGA_PD_R Do Not Stuff Do Not Stuff
DY
G
220 ohm 300mA

Do Not Stuff
1
C2070
Q2001
18 VGA_PD G
DY Do Not Stuff MOS spec VGS:20V
2
D Rosa:RUN_Enable 15V Current Limit=360mA

1
1D1V_S0 1D1V_VDDAN_MLDAC_S0
Annie:RUN Enable 9V 3.3V CRT LDO
1
R2015 C2073 S 5V_S5 3D3V_VDDAN_DAC_S0_R

2K2R2J-2-GP Do Not Stuff Q2003 U2002
DY
2
2N7002K-2-GP
D S 1 5 0111: Remove R2023
2
84.2N702.J31 VIN VOUT

2
AO3404A-GP VGA_PD_G GND
2ND = 84.2N702.031 1 R2022 2 Do Not Stuff U2002_EN 3 4
EN NC#4
84.03404.B31
G
1
1
C2079 C2081 G9091-330T11U-GP C2080

DY Do Not Stuff 74.09091.J3F
SC1U10V2KX-1GP
SC1U6D3V2KX-GP
2
2
2nd = 74.09198.G7F
2
1122 Modify: 20100621 V1.2

Add G9091 LDO circuit for CRT DAC power
to avoid monitor noise issue.
3D3V_S0
2
R2026
10KR2J-3-GP
Q2005
1
18 VGA_PD G
D VGA_PD_G
A A
S
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
Wistron Corporation
Title
HUDSON-M2 Power(4/6)
Custom
5 4 3 2 1
5 4 3 2 1
SSID = S.B
D D
CRB: PU to 3.3V_AUX_S5
REQUIRED STRAPS Checklist: PU to 3.3V_S5
Confrim with AMD, follow CRB suggestion
3D3V_S0 3D3V_S5 3D3V_AUX_S5 Use this pin to determine INT/EXT CLK

REQUIRED SYSTEM STRAPS
EC_PWM2 PCI_CLK1 RTC_CLK CLK_PCI_LPC PCI_CLK4 LPC_CLK0 LPC_CLK1
PCH GPO199
PULL Allow USE CLKGEN
1
1
HIGH LPC ROM PCIE GEN2 S5_PLUS Mode DEBUG non_Fusion ENABLE EC ENABLED
R2102 R2101 R2103 R2104 R2105 R2107
DISABLE STRAPS CLOCK mode
10KR2J-3-GP
DYDo Not Stuff DYDo Not Stuff DYDo Not Stuff 10KR2J-3-GP 10KR2J-3-GP
DEFAULT DEFAULT DEFAULT
(Use Internal)
DEFAULT
2
2
17 PCI_CLK1 PULL Force S5_PLUS Mode IGNORE Fusion DISABLE EC CLKGEN
17,71 CLK_PCI_LPC LOW SPI ROM PCIE GEN1 ENABLE DEBUG CLOCK mode DISABLED
17 PCI_CLK4 STRAPS DEFAULT (Use External)
DEFAULT DEFAULT
C C
17,27 LPC_CLK0
17 LPC_CLK1 No Fusion Config, Strap Not needed, but reserve
18 EC_PWM2
17 RTC_CLK
1
1
R2113 R2114 R2115 R2116 R2117 R2118
DY Do Not Stuff 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP
DYDo Not Stuff DYDo Not Stuff
2
DEBUG STRAPS
B B
PCI_AD23 17
PCI_AD24 17 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
PCI_AD25 17
PCI_AD26 17
PCI_AD27 17 USE PCI Disable ILA USE FC USE DEFAULT
PULL PLL AUTORUN PLL PCIE STRAPS Disable PCI
HIGH MEM BOOT
1 R2108
1 R2109
1 R2110
1 R2111
1 R2112
(DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT)
BYPASS Enable ILA BYPASS FC USE EEPROM Enable PCI

PULL PCI PLL AUTORUN PLL PCIE STRAPS MEM BOOT
DYDYDYDYDY LOW
2
Note: FCH has 15K internal PU FOR PCI_AD[27:23]

Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Wistron Corporation
Title
SB820M_STRAPPING_(5/5)
A3
5 4 3 2 1
5 4 3 2 1
FCH1D Part 4 of 5
A3 T25
VSS VSS
A33 T27
VSS VSS
B7 U6
VSS VSS
B13 U14
VSS VSS
D9 U17
VSS VSS
D13 U20
VSS VSS
E5 U21
VSS VSS
D E12 U30 D
VSS VSS
E16 U32
VSS VSS
E29 V11
VSS VSS
F7 V16
VSS VSS
F9 V18
VSS VSS
F11 W4
VSS VSS
F13 W6
VSS VSS
F16 W25
VSS VSS
F17 W28
VSS VSS
F19 Y14
VSS VSS
F23 Y16
VSS VSS
F25 Y18
VSS VSS
F29 AA6
VSS VSS
G6 AA12
VSS VSS
G16 AA13
VSS VSS
G32 AA14
VSS VSS
H12 AA16
VSS VSS
H15 AA17
VSS VSS
H29 AA25
VSS VSS
J6 AA28
VSS VSS
J9 AA30
VSS VSS
J10 AA32
GROUND
VSS VSS
J13 AB25
VSS VSS
J28 AC6
VSS VSS
J32 AC18
VSS VSS
K7 AC28
VSS VSS
K16 AD27
VSS VSS
K27 AE6
VSS VSS
K28 AE15
C VSS VSS C
L6 AE21
VSS VSS
L12 AE28
VSS VSS
L13 AF8
VSS VSS
L15 AF12
VSS VSS
L16 AF16
VSS VSS
L21 AF33
VSS VSS
M13 AG30
VSS VSS
M16 AG32
VSS VSS
M21 AH5
VSS VSS
M25 AH11
VSS VSS
N6 AH18
VSS VSS
N11 AH19
VSS VSS
N13 AH21
VSS VSS
N23 AH23
VSS VSS
N24 AH25
VSS VSS
P12 AH27
VSS VSS
P18 AJ18
VSS VSS
P20 AJ28
VSS VSS
P21 AJ29
VSS VSS
P31 AK21
VSS VSS
P33 AK25
VSS VSS
R4 AL18
VSS VSS
R11 AM21
VSS VSS
R25 AM25
VSS VSS
R28 AN1
VSS VSS
T11 AN18
VSS VSS
T16 AN28
VSS VSS
T18 AN33
VSS VSS
B B
N8 T21
VSSAN_HWM VSSPL_DAC
L28
VSSAN_DAC
K25 K33
VSSXL VSSANQ_DAC
N28
VSSIO_DAC
H25
VSSPL_SYS
R6
EFUSE
71.HUDM2.M01
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 Date: Thursday, May 26, 2011 Sheet
1 23 of 104
5 4 3 2 1
D D
C C
B B
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Wistron Corporation
Title
Reserved
A3
1 25 of 104
5 4 3 2 1
D D
C C
B B
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
5 4 3 2 1
0107: Update Model_ID_DET

0107: Change R2724 & R2726 from 5 % To 1 & Resistor tolerence. 0107: POP C2718, R2739, Change To Voltage Divider Table,
** BOM Control For R2710 Value. DQ15_AMD_UMA
Default R2710 10K = DQ15_UMA DQ15_AMD_DIS (PX)
3D3V_AUX_KBC
3D3V_AUX_KBC DN15_AMD_DIS (PX)
PCB VERSION A/D(PIN98) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE MODEL_ID_DET(GPIO07) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE
1
R2724
47KR2F-GP SA 100.0K 10.0K 3.0V DQ15_UMA 100.0K 10.0K(64.10025.6DL) 3.0V
1
R2710 R2740 R2741
SB 100.0K 20.0K 2.75V Do Not Stuff 20KR2F-L-GP Do Not Stuff DQ15_ATI 100.0K 20.0K(64.20025.6DL) 2.75V
MODELID MODELID MODELID
2
SC 100.0K 33.0K 2.48V DQ15_NVIDIA 100.0K 33.0K 2.48V
PCB_VER_AD
2
-1 100.0K 47.0K 2.24V MODEL_ID_DET DN15_UMA 100.0K 47.0K(64.47025.6DL) 2.24V
1
C2717 DY R2726 Reserved 100.0K 64.9K 2.0V DN15_ATI 100.0K 64.9K(64.64925.6DL) 2.0V
2
Do Not Stuff 100KR2F-L1-GP R2739
1
Reserved 100.0K 76.8 1.87V C2718 100KR2F-L1-GP Reserved 100.0K 76.8K 1.87V
SCD1U10V2KX-5GP
1
Reserved 100.0K 100.0K 1.65V Reserved 100.0K 100.0K 1.65V
2
SSID = KBC EC_AGND
EC_AGND
DN13_UMA 100.0K 143.0K 1.358V
D
DN13_ATI 100.0K 174.0K 1.204V D
DQ15_Ventura 100.0K 215.0K 1.048V

0702 Modify:
0628 Modify: Defualt un-stuff R2739(internal PL in KBC)
Move R2771 to closed 3D3V_AUX_KBC power
rail base on layout placement.
3D3V_AUX_KBC 3D3V_S0
1 R2702 2 VBAT
Do Not Stuff
1
1
C2702 C2703
R2771 SCD1U10V2KX-5GP DY Do Not Stuff
2D2R3-1-U-GP
2
0716: Vendor Suggestion
3D3V_AUX_KBC_VCC
2
C2701S C2704S C2705D C2706S C2707S C2708S C2709S C2710S

1
1
C2D2U10V3KX-1GP
CD1U10V2KX-5GP
o Not Stuff
CD1U10V2KX-5GP
CD1U10V2KX-5GP
CD1U10V2KX-5GP
C2D2U10V3KX-1GP
CD1U10V2KX-5GP
DY
2
115
102
19
46
76
88
4
U2701A 1 OF 2
VCC
VCC
VCC
VCC
VCC
AVCC
VDD
C2711 1 2Do Not Stuff
EC_AGND
DY
40 AD_IA 104 7 PLT_RST#_EC 1 R2735 2 A_RST# 17,36 <-- Rename Netname For AMD
VREF LRESET# Do Not Stuff
2 LPC_CLK0 17,21 <-- Need To Align With Intel Netname?
C2714 1 Do Not Stuff LCLK
EC_AGND DY2 PCB_VER_AD
97
GPIO90/AD0 LFRAME#
3
LPC_AD3 LPC_FRAME# 17,71
98 1 LPC_AD3 17,71
GPIO91/AD1 LAD3 LPC_AD2
82 PSID_EC 99 128 LPC_AD2 17,71
28 CPU_THRM 100 127 LPC_AD1 17,71
126 LPC_AD0 17,71
LAD0
28 FAN1_DAC 101 125 INT_SERIRQ 17
GPIO94/DA0 SERIRQ
49 LCD_TST 105 8 PM_CLKRUN# 17
MEDIA_BTN2# GPIO95/DA1 GPIO11/CLKRUN# PANEL_BLEN
106 9
GPIO96/DA2 GPIO65/SMI# ECSCI#_KBC
29
0107: Modify: ECSCI#/GPIO54
124 PCH_TEMP_ALERT# 6,19
Remove ESATA_PWR_EN# In GPIO2 GPIO10/LPCPD# ECSWI#_KBC 0702 Modify: 0706 Modify:
79
GPIO2 GPIO67/PWUREQ#
123 0106 Modify:
Add GPIO04 To USB_IO_CRT_EN# 95 121 Rename CHARGE_LED# to CHG_AMBER_LED# KBC GPIO13 change to MEDIA_LED1#.
57 USBCHARGER_CB0 GPIO3 GPIO85/GA20 H_A20GATE 18 Rename DC_BATFULL# to BATT_WHITE_LED#. KBC GPIO66 change to MEDIA_LED2#. Update U2701A, U2701B Symbol
57,82 USB_IO_CRT_EN# 96 122
0702 Modify: GPIO4 KBRST#/GPIO86 H_RCIN# 18 KBC GPIO33 change to MEDIA_LED3#. U2701B 2 OF 2
28 SYS_THRM 108 KCOL[0..16] 69
Rename EC_GPIO6 to PSL_IN2 PSL_IN2 GPIO5
93
MODEL_ID_DET GPIO6 0107 Modify: Add AD_IA_HW2 GPIO For Charger KCOL0
94 27 BLON_OUT 49 28 FAN_TACH1 31 53
0629 Modify: GPIO7 GPIO52/PSDAT3/RDY# AD_IA_HW2 GPIO56/TA1 KBSOUT0/JENK# KCOL1
114 25 117 52
Rename TP_LOCK_LED#&BATT_WHITE_LED# 68 BATT_WHITE_LED# ECSMI#_KBC 6
GPIO16 GPIO50/PSCLK3/TDO
11
AD_IA_HW2 40 18 PM_PWRBTN#
63
GPIO20/TA2 KBSOUT1/TCK
51 KCOL2
GPIO24 GPIO27/PSDAT2 PCH_WAKE# 18 <-- Use For Lan Wake Up, Need SW Confirm 75,82 PCIE_WAKE# GPIO14/TB1 KBSOUT2/TMS
109 10 MEDIA_BTN1# 18,36,44,46,75 PM_SLP_S3# 64 50 KCOL3
69 CAP_LED GPIO30 GPIO26/PSCLK2 GPIO01/TB2 KBSOUT3/TDI
14 71 0716: Rename, ADD PCH_WAKE# To FCH 49 KCOL4
36 S5_ENABLE GPIO34 GPIO35/PSDAT1 TPDATA 69 KBSOUT4/JEN0#
82 MEDIA_BTN3# 15 72 <-- TP 32 48 KCOL5
GPIO36 GPIO37/PSCLK1 TPCLK 69 68 CHG_AMBER_LED# GPIO15/A_PWM KBSOUT5/TDO
39 BAT_IN# 80 118 47 KCOL6
GPIO41 29 KBC_BEEP GPIO21/B_PWM KBSOUT6/RDY#
70 LID_CLOSE# 17 62 43 KCOL7
Rename PM_SLP_S4# To PM_SLP_S5# GPIO42/TCK 82 MEDIA_LED1# GPIO13/C_PWM KBSOUT7
18 RSMRST#_KBC 20 70 69 KB_BL_CTRL 65 42 KCOL8
GPIO43/TMS GPIO17/SCL1 BAT_SCL 39,40 GPIO32/D_PWM KBSOUT8
18,44,75 PM_SLP_S5# 21 69 <-- BATTERY / CHARGER 81 41 KCOL9
GPIO44/TDI GPIO22/SDA1 BAT_SDA 39,40 40 AD_IA_HW GPIO66/G_PWM KBSOUT9/SDP_VIS#
EC_SPI_WP# 23 67 66 40 KCOL10
60 EC_SPI_WP# GPIO46/TRST# GPIO73/SCL2 SML1_CLK 6,85 82 MEDIA_LED3# GPIO33/H_PWM KBSOUT10/P80_CLK
C 82 RCID 26 68 <-- CPU -Temp 22 39 KCOL11 C
GPIO51 GPIO74/SDA2 SML1_DATA 6,85 82 MEDIA_LED2# GPIO45/E_PWM KBSOUT11/P80_DAT
0702 Modify: PSL_IN1 73 119 16 38 KCOL12
Rename EC_GPIO70 to PSL_IN1 GPIO70 GPIO23/SCL3 PM_LAN_ENABLE 82 68 PWRLED# GPIO40/F_PWM KBSOUT12/GPIO64
PSL_OUT 74 120 EC_ENABLE#_1 37 KCOL13
Rename EC_GPIO71 to PSL_OUT EC_GPIO72 GPIO71 GPIO31/SDA3 PROCHOT_EC 0914: Modify GPIO Pin KBSOUT13/GPIO63 KCOL14
75 24 Modify KBC GPIO45 From PWR_BTN_LED# To MEDIA_LED2# 36
GPIO72 GPIO47/SCL4 0629 Modify:Modify KBC GPIO66 From MEDIA_LED2# To AD_IA_HW ECRST# KBSOUT14/GPIO62 KCOL15
82 WIFI_RF_EN 82 28 LCD_TST_EN 49 85 35
GPIO75 GPIO53/SDA4 Rename PWRLED#&PWR_BTN_LED#&CHARGE_LED# VCC_POR# KBSOUT15/GPIO61/XOR_OUT KCOL16
63,82 BLUETOOTH_EN 83 34
GPO76/SHBM GPIO60/KBSOUT16 USB_DET# 0716: Rename
36,46 1D1V_S5_PWRGD 84 33
GPIO77 GPIO57/KBSOUT17
68 TP_LOCK_LED# 91 82 E51_RxD 113 KROW[0..7] 69
GPIO81 GPIO87/SIN_CR KROW0
57 USB_PWR_EN# 110 82 E51_TxD 111 54
GPO82/TEST# EC_SPI_CS#_C GPO83/SOUT_CR/TRIST# KBSIN0
85 THERMTRIP_VGA_GATE 112 90 1 R2736 2 33R2J-2-GP SPI_CS0#_R 60 55 KROW1
GPO84/XORTR# F_CS0# EC_SPI_CLK_C KBSIN1
0719: ADD 36,46 1D2V_S0_PWRGD 107 92 1 R2719 2 33R2J-2-GP SPI_CLK_R 60 29 AMP_MUTE# 30 56 KROW2
GPIO97 F_SCK EC_SPI_DI_C GPIO55/CLKOUT KBSIN2
86 1 R2737 2 Do Not Stuff SPI_SO_R 60
EC_SPI_DI_C 17 PCH_SUSCLK_KBC 77 57 KROW3
F_SDI/F_SDIO1 GPIO00/EXTCLK KBSIN3
0604 Modify: 87 EC_SPI_DO_C 1 R2722 2 33R2J-2-GP SPI_SI_R 60 58 KROW4
F_SDIO/F_SDIO0 KBSIN4
1
RN2704 pull-Low 10K Resistor to DY KBC_VCORF 44 For Intel Only 59 KROW5
on BLUETOOTH_EN. VCORF R2773 KBSIN5 KROW6
Layout Note: 13
PECI KBSIN6
60
1
C2712 100KR2J-1-GP 12 61 KROW7

Locate resistors R2719 and R2722 close to the KBC. VTT KBSIN7
AGND
SC1U25V3KX-1-GP
GND
GND
GND
GND
GND
GND
0706 Modify:
2
2
KBC GPIO7 change to DISCRETE# 0106 Modify: NPCE795PA0DX-GP-U
KBC GPIO97 change to IMVP_PWRGD. NPCE795PA0DX-GP-U
Update U2701A, U2701B Symbol
18
45
78
89
116
5
103
0109: EMI Reserve, Place Near R2768 1122 Modify: 0604 Modify:
Layout Note: Add Pull down 100k ohm at F_SDI for Power consumption concern.
Change To X5R Cap
Connect GND and AGND planes via either 1027 Modify:
EC_AGND
RSMRST#_KBC 0R resistor or one point layout connection. Change R2075 PU From 3D3V_AUX_S5 to 3D3V_AUX_KBC
0719 Modify:
2
3D3V_AUX_KBC
EC2702
Reserved 0.1uF on all of ADC input pins base on
1 R2711 2
NUVOTON feedback list.(C2717~C2721) Do Not Stuff ECRST#
DY Do Not Stuff
1
1
C2719 Do Not Stuff EC_AGND EC_GPIO47 High Active R2705
CPU_THRM 2 DY1 10KR2J-3-GP
Q2702
C2720 Do Not Stuff D2705
1
USB_IO_CRT_EN# 2 DY1 D2701 PROCHOT_EC G C2715 1 0716: Modify
18 EC_SMI#
E
C2721 Do Not Stuff 1 R2733 Do Not Stuff 0111: Pop D2705, DY R2760
18 EC_SWI#
1
SYS_THRM 2 DY1 DY D H_PROCHOT#_EC 1 2 H_PROCHOT# 6,40 28,36 PURE_HW_SHUTDOWN# B Q2701 3 ECSMI#_KBC
2
3 ECSWI#_KBC R2732 Do Not Stuff MMBT3906-4-GP DY
100KR2J-1-GP S 0621 Modify: 84.T3906.A11 2
C
EC_AGND 2 2nd = 84.03906.F11
R2761
Removed R2723 BAS16-6-GP
2
2N7002K-2-GP
9 L_BKLT_EN 1 2 PANEL_BLEN Do Not Stuff 83.00016.K11
Do Not Stuff Do Not Stuff 84.2N702.J31 2ND = 83.00016.F11
2ND = 83.00016.F11 2ND = 84.2N702.031
0702 Modify:
Rename EC_GPIO6 to PSL_IN2 D2704 18 EC_SMI# 1 R2760 2ECSMI#_KBC
1 DY Do Not Stuff
18 EC_SCI#
PSL_IN2 DY
3 ECSCI#_KBC PSL Solution 10mW Solution
D2702 2
1 1 R2704 2 330KR2J-L1-GP EC_GPIO72 RTC_AUX_S5 3D3V_AUX_KBC 3D3V_AUX_KBC
Do Not Stuff R2756
EC GPIO standard PH/PL
68 KBC_PWRBTN# 3 Do Not Stuff 1 2 EC_GPIO72 1 R2734 2 Do Not Stuff EC_GPIO72
B Do Not Stuff RN2701 B
KBC_ON#
2ND = 83.00016.F11 DY BAT_SDA
2 VBACKUP 3 2
0714 Modify: BAT_SCL 4 1
BAT54CPT-GP
Un-stuff D2701,D2704 and Add R2758,R2759 SRN4K7J-8-GP
83.R2003.E81
2ND = 83.00054.Q81 ohm confirm with NUVOTON and SW. R2763
40 PWR_CHG_ACOK 1 R2768 2 Do Not Stuff PSL_IN1 AC_IN#_KBC 1 2 PSL_IN1 RN2703
18 EC_SWI# 1 R2758 2ECSWI#_KBC PSL Do Not Stuff BAT_IN# 3 2
D2703 Do Not Stuff 0702 Modify: AC_IN#_KBC 4 1
2 Rename EC_GPIO70 to PSL_IN1
10mW PSL_IN1
18 EC_SCI# 1 R2759 2ECSCI#_KBC 0630 Modify: SRN100KJ-6-GP
Do Not Stuff Removed LID_CLOSE#
10mW 3 AC_IN# 40 Q2704 PH 10K on RN2705.
AC_IN#_KBC 1 1 R2767
DY2 Do Not Stuff KBC_ON#_R 3D3V_AUX_KBC G RN2705
EC_ENABLE#_1 4 1
BAT54CPT-GP 0909 Modify: Q2705 D KBC_ON# S5_ENABLE 3 2
83.R2003.E81 De-Pop C2713 & PSL_OUT G 10mW
DY
2ND = 83.00054.Q81 Add C2722 Soft Start To Solve Leakage Issue. EC_ENABLE#_1 S Do Not Stuff
0702 Modify: D
Rename EC_GPIO71 to PSL_OUT
3D3V_AUX_KBC 3D3V_AUX_S5 3D3V_AUX_S5 2N7002K-2-GP 0623 Modify: 0628 Modify:
S
C2722 PSL 84.2N702.J31 Change RN2702 to R2712 10K 0402 Stuff R2712 and Removed R2805.
1 2 Resistor on FAN_TACH1.
Do Not Stuff 2ND = 84.2N702.031 3D3V_S0
USB_DET# 1 R2772 2100KR2J-1-GP RN2706 SCD1U10V2KX-5GP Do Not Stuff KBC_ON# 1 R2766 2 KBC_ON#_R
S
3 2 Do Not Stuff FAN_TACH1 1 R2712 2 10KR2J-3-GP

MEDIA_BTN2# 1 R2774 2100KR2J-1-GP KBC_ON#_R 4 1 KBC_ON#_GATE G Q2703 2ND = 84.2N702.031 28 FAN_TACH1
G DMP2130L-7-GP
PSL_OUT
PCIE_WAKE# 1 R2776 2100KR2J-1-GP SRN10KJ-5-GP 84.02130.031 10mW E51_RxD 1 R2708 2 Do Not Stuff
DY
1
D
2ND = 84.03413.A31
3D3V_AUX_KBC PSL_IN1
DY
D
BLUETOOTH_EN 1 R2709 2 Do Not Stuff

DY
2
C2713
RN2704 Do Not Stuff 3D3V_AUX_KBC R2769
MEDIA_BTN3#
PSL
3 2 Do Not Stuff 0604 Modify: 0623 Modify:
MEDIA_BTN1# 4 1 RN2704 pull-Low 10K Resistor to DY Change RN2704 to R2708 10K 0402
2
0625 Modify: on BLUETOOTH_EN. Resistor on BLUETOOTH_EN.

SRN100KJ-6-GP Change R2769 dummy column for PSL solution.
Do Not Stuff
3D3V_AUX_KBC
G
R2757 0109: Follow Intel, Need Confirm DQ/DN Spec
1 2 D S5_ENABLE
DQ15 0R2J-2-GP ECRST# 1 R2713 2 10KR2J-3-GP
Do Not Stuff S
DY
1 MEDIA_BTN1# Q2706
Do Not Stuff
82 INSTANT_ON# INSTANT_ON# 3 Do Not Stuff 2ND = 84.2N702.031
2ND = 83.00054.Q81 0628 Modify:
0712 Modify:
DN15 KBC_ON#_R Stuff R2712 and Removed R2805.
2
Add D2706 connect to MEDIA
BUTTON Instant_on#. D2706 0928 Modify:
A 0713 Modify: Add Q2706 2N7002 to avoid leakage loop from A
Add R2772,D2707 for USBCHARGER BAT54CPT-GP
DETECT Function. 3D3V_S5 to 3D3V_AUX_KBC issue when 10mW
1 USB_DET# latched fail timing.
57 USBDET_CON# USBDET_CON# 3 83.R2003.E81

2ND = 83.00054.Q81
2 KBC_ON#_R
D2707
PWR_CHG_ACOK
0109: EMI Reserve, Place Near R2768
BAT54CPT-GP DQ15 AMD DIS SAMSUNG TI
2
1MEDIA_BTN2# EC2701
DY Wistron Corporation
1
DATA_RECOVERY#3 83.R2003.E81
Do Not Stuff
82 DATA_RECOVERY#
2ND = 83.00054.Q81 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2 KBC_ON#_R Taipei Hsien 221, Taiwan, R.O.C.
D2708 Title
KBC Nuvoton NPCE795

Custom
5 4 3 2 1
5 4 3 2 1
1122 Modify:
ADJ&ADJ_VGA power source change to 3D3V_DAC_S0
from 3D3V_S0 to solve T8 shut down issue.
3D3V_S0
3D3V_S0 3D3V_S0 Fan controller P2793
1123 Modify:
RSET = 0.0012T 2 — 0.9308T + 96.147 U2802
2
Co-lay 3D3V_DAC_S0 & 3D3V_S0 In Case LDO is Not Used R2811
T=87 ; RSET=24.25ohm R2802
FON#
1 DY 2 1
FON# GND
8
1
0112: Remove R2811 ADJ 3D3V_AUX_KBC Pull High DY Do Not Stuff Do Not Stuff 2 7 5V_S0
5V_S0 VIN GND
R2805 R2828 FAN_VCC 3 6
Do Not Stuff VO GND
DYDo Not Stuff 27 FAN1_DAC 4 5
1
VSET GND
*Layout* 10 mil
3D3V_S0 1 R2813 2 Do Not Stuff R2801 U2804
2
Do Not Stuff G991P11U-GP
1 DY 2 G709_SET 1 5 G709_VCC For linear FAN 74.00991.031
1
C2802 SET VCC
87.1 Degree 2
GND DY DY
1
ADJ THERM_SYS_SHDN# 1 2 G709_OUT# 3 4 G709_HYSY 2nd = 74.02793.A31 C2803 C2804
1
R2820 OUT# HYST
SC4D7U6D3V3KX-GP
3rd = 74.05606.071
2
Do Not Stuff R2829
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2
2
1
1
D Do Not Stuff C2816 Do Not Stuff
DY Hysterisis: D
DY
1
R2804 DY DYC2805 Do Not Stuff DY Do Not Stuff
Do Not Stuff
Do Not Stuff 10°C for HYST = V CC
2
0819 X01 Modify: 0921:Modify
2°C for HYST = GND
2
Re-assign FAN1 pin define from Niki suggestion.
Add AFTP, Follow DQ15 Intel
2
Pin1 : VCC;Pin2 : Ground;Pin3 : TACH
0823 X01 Modify:
Layout notice : Change U2802 Main source to 74.00991.031
Both DXN and DXP routing 10 mil 2nd 74.02793.A31,3rd 74.05606.071 AFTP2801 1FAN_TACH1_C
1027 Modify: Add Extra T8 Incase P2800 Don't Work Properly 0831 X01 Modify:
trace width and 10 mil spacing. Change FAN1 to 20.F0772.003 from 20.F1639.004
0105 Modify: 1122 Modify: Add R2829 0 Ohm To GND, DY R2828 Change Power AFTP2802 1FAN_VCC
base on ME Double updated.
P2800_DXP
Change P2800 To EB0 Version rail to 3D3V_S0, Change R2805 Power Rail From 3D3V_S0 To 3D3V_DAC_S0,
U2801 Change R2801 Resistor Value From 18K to 24.3K.
1
2ND = 84.03904.P11 0115: Use P2800EB0 As Pure Hardware Shutdown, DY R2820, Pop R2806
3
1
84.03904.L06 C2806 5 4
Q2801 VCC TDR SYS_THRM 27
SC470P50V3JN-2GP C2807
DY 1 6 3 CPU_THRM 27
2
PMBS3904-1-GP SC2200P50V2KX-2GP DXP TDL

2 7 2
THERM_SYS_SHDN#_OTZ DXN GND ADJ
8 1 0906: Follow DQ15 Intel, Modify Fan1 Connector, Pin Define Changed
2
P2800_DXN OTZ ADJ

1122: Add 2nd 20.F1841.003 on FAN1 from ME updated connector list.
R2808 0105: Update DQ15 AMD Fan1 Connector To 4 Pin P/N 20.F1621.004, AMD Different To Intel
Do Not Stuff 2.System Sensor, Put on palm rest 0117 Modify:
P2800EB0-GP
Vendor Suggest, But will reserve first only, Place Near KBC is OK
1.H/W T8 Shutdown
FAN2
6
SYS_THRM CPU_THRM
2
4
0906 X01 Modify: R2812 R2814 1 R2807 2 Do Not Stuff FAN_TACH1_C 3
27 FAN_TACH1
Change U2801,U2803 to 74.02800.A71 from 470KR2J-2-GP 470KR2J-2-GP 2
74.02800.071 from vender updated parts. 3D3V_AUX_S5
Change R2803&R2817 to 107K from 499K, 3D3V_S0 *Layout* 15 mil FAN_VCC 1
1
R2804&R2818 to 226K from 102K base on THERM_SYS_SHDN#_OTZ 1 R2806 2 Do Not Stuff
updated ADJ Table. 5
2
D2801 R2831 D2802 ACES-CON4-17-GP-U
1
Do Not Stuff 100KR2J-1-GP C2808 C2809 DY C2810 20.F1621.004
DY Do Not Stuff
SC4D7U6D3V3KX-GP
EMI/ESD
Do Not Stuff
Q2805
2ND = 83.BAT54.D81 DY CH551H-30PT-GP 20.F1561.004
Do Not Stuff
2
2
C 3rd = 83.BAT54.S81 S THERM_SYS_SHDN# 83.R5003.C8F C
2
27,36 PURE_HW_SHUTDOWN# D FAN_VCC 2ND = 83.R5003.H8H
3rd = 83.5R003.08F
1
G Q2805_G 1 R2810 2 Do Not Stuff 3D3V_S0
1
C2811
DY R2818 DY Do Not Stuff
1
Do Not Stuff 2N7002K-2-GP EC2801
2
84.2N702.J31 DY
2
2ND = 84.2N702.031
Do Not Stuff
2
1122 Modify: AddR2806
B 1213 Modify: Remove Dimm Thermal Function B
0107: Remove VGA P2800, SW Does Not Use
A A
Wistron Corporation
Title
Size
Thermal/Fan
Document Number
Controllor EMC2102
Document Number Rev
5 4 3 2 1
5 4 3 2 1
SSID = AUDIO
0913 X01 Modify:

Add R2920,R2921 and reserved EC2901,EC2902 on
ANNIE Audio solution
AUD_DMIC_CLK &AUD_DMIC_IN0 for EMC suggestion.
0105 Modify:
EMI Request R2920, R2921 Place Near LCD1 Connector.
Ε
Move EC2901 EC2902 to P.49 and place after R2920, R2921
0105 Modify:
Vendor Suggest To Change R2920 To 33 Ohm
D D
For EMI
AUD_DMIC_CLK AUD_SPK_R+ 5V_S0 +PVDD 5V_S0

AUD_DMIC_IN0 AUD_SPK_R- AUD_SPK_R+ 58
AUD_SPK_L- AUD_SPK_R- 58 +AVDD
AUD_SPK_L+ AUD_SPK_L- 58
1 2
1
AMP_MUTE# +PVDD AUD_SPK_L+ 58
1 2 R2903 Do Not Stuff
27 AMP_MUTE# +AVDD
EC2901 EC2902 R2902 Do Not Stuff
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC22P50V2JN-4GP SC22P50V2JN-4GP
SC10U6D3V5MX-3GP
C2905
C2906
C2908
C2909
C2910
2
1
AUD_VREG
1 2
R2904 Do Not Stuff
2
Close to codec AUD_AGND
0304 Modify: AUD_DVDDCORE
41
40
39
38
37
36
35
34
33
32
31
EMI Suggest To Pop EC2901, EC2902 22P U2901 AUD_AGND
1
AUD_AGND
PVSS
VREG/+2_5V
THERMAL_PAD
EAPD
PVDD
PORTD_+R
PORTD_-R
PVDD
PORTD_-L
PORTD_+L
AVDD2
C2901
SC10U6D3V5MX-3GP
2
PUMP_CAPP
0625 Modify:
2
AUD_DMIC_CLK&AUD_DMIC_IN0 connector CLOSE TO CODEC
to LVDS pin define. C2914
R2920 1 30 SC2D2U10V3KX-1GP
1
DVDD_LV CAP+
1 222R2J-2-GP AUD_DMIC_CLK_R 2 29 PUMP_CAPN
49 AUD_DMIC_CLK DMIC_CLK/GPIO_1 CAP-
3D3V_S0 1 R2921 222R2J-2-GP AUD_DMIC_IN0_R 3 28 AUD_V_B
49 AUD_DMIC_IN0 HDA_CODEC_SDOUT DMIC_0/GPIO_2 V-
4 27
18 HDA_CODEC_SDOUT HDA_CODEC_BITCLK SDATA_OUT AVSS2 AUD_HP1_JACK_R R2906
5 26 1 2 60D4R2F-GP
18 HDA_CODEC_BITCLK BITCLK PORTB_R AUD_HP1_JACK_R2 82
Close to codec 1R2901 2 HDA_CODEC_SDIN0 6 25 AUD_HP1_JACK_L R2905 1 2 60D4R2F-GP
18 HDA_SDIN0 SDATA_IN PORTB_L AUD_HP1_JACK_L2 82
33R2J-2-GP 7 24
DVDD AVSS2 AUD_AGND
HDA_CODEC_SYNC 8 71.92H87.A03 23 AUD_EXT_MIC_R C2922 2 1 SC1U10V3KX-3GP
18 HDA_CODEC_SYNC SYNC PORTA_R MIC_IN_R 82
HDA_CODEC_RST# 9 22 AUD_EXT_MIC_L C2921 2 1 SC1U10V3KX-3GP MIC_IN_L 82
1
18 HDA_CODEC_RST# RESET# PORTA_L

SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
AUD_PC_BEEP 10 21
C2903
C2904
C2902
PCBEEP AVDD1 +AVDD
VREFOUT_C
VREFOUT_A
C Put C2921 and C2922 close to codec C
2
PORTC_R
VREFFILT
PORTF_R
PORTC_L
SENSE_A
SENSE_B
PORTF_L
0707 Modify:
CAP2
updated U2901 part number from data base.
92HD87B1A5NDGXTBX8-GP
11
12
13
14
15
16
17
18
19
20
2010/06/30 Change to 92HD87 (71.92H87.A03)
AUD_VREFOUT_B
AUD_SENSE_A
AUD_SENSE_B
AUD_PC_BEEP
AUD_VREFFLT
AUD_CAP2
3D3V_S0
AUD_CAP2
AUD_VREFFLT
1
R2908
10KR2J-3-GP
AUD_V_B
AUD_VREG
Remove Annie Audio
2
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC4D7U6D3V3KX-GP
SC1U6D3V2KX-GP
AMP_MUTE#
C2917
C2918
C2915
C2916
1
1
AUD_VREFOUT_B
120KR2J-L-GP From SB
2
HDA_CODEC_BITCLK R2909
AUD_PC_BEEP C2912 2 1 SCD1U10V2KX-5GP SB_SPKR_R 1 2 HDA_SPKR 18
C2913 2 1 SCD1U10V2KX-5GP KBC_BEEP_R 1 2 0707 Modify:
AUD_PC_BEEP KBC_BEEP 27
1
AUD_AGND AUD_AGND AUD_AGND AUD_AGND Change R2911,R2914,R2917 change

C2923 C2907 Trace width>15 mils R2910 From EC
SC1U10V2KX-1GP DY Do Not Stuff 470KR2J-2-GP
Close to codec
to 0ohm 0603 from short pad.
2
R2911
2 1 0R3J-0-U-GP
B B
R2914
2 1 0R3J-0-U-GP
R2917
2 1 0R3J-0-U-GP
$]DOLD,)(0,
HDA_CODEC_SDOUT
AUD_AGND
1
R2912
Do Not Stuff
DY +AVDD +AVDD
R2913
2
1 2
1
AUD_HP1_JD# 82
PCH_AZ_CODEC_SDOUT1
R2915 20KR2F-L-GP R2916

2K49R2F-GP 2K49R2F-GP
0715: Move To MB
2
AUD_SENSE_A AUD_SENSE_B
1
0,&,1
1
R2918
C2919 20KR2F-L-GP
SC1000P50V3JN-GP-U R2919
2
2 1
2
1
EXT_MIC_JD# 82 AUD_VREFOUT_B
C2920 AUD_AGND 39K2R2F-L-GP
DY Do Not Stuff AUD_AGND
2
2
1
Close to Pin13
A Close to Pin14 RN2901 A
SRN4K7J-8-GP
3
4
0109: EMI Reserve, Place Near R2918
Wistron Corporation
21F, 88, Sec.1, Hs in Tai Wu Rd., Hs ichih,
AUD_SENSE_B Taipei Hs ien 221, Taiwan, R.O.C.
Title
2
82 MIC_IN_L
EC2903 Audio Codec 92HD79B1
Size Docum ent Num ber Rev
DY Do Not Stuff
1
Cus tom X00

82 MIC_IN_R
Date:
QUEEN AMD Muxless/UMA
Sheet
Thurs day, May 26, 2011 29 of 104
AUD_AGND
5 4 3 2 1
5 4 3 2 1
AUDIO OP AMPLIFIER
D D
C C
B B
Wistron Corporation
Title
AMP
A3
5 4 3 2 1
5 4 3 2 1
D D
C C
DG15 M12 In Daughter BD
B B
Wistron Corporation
Title
LOM
A3
5 4 3 2 1
5 4 3 2 1
D D
SSID = SDIO
48MHz clock input trace of characteristic impedance (Zo) must be 50 ±15%. 3D3V_CARD_S0
0110: Follow Intel to change to 4.7 uF 0603
3D3V_CARD_S0
17 CLK_PCH_48M
1
C3207
PCH GPIO67(48M) confirm with SW C3206 SC2D2U6D3V3KX-GP
SCD1U10V2KX-4GP
2
XD_D7 XD_D7 74
SP14
SP14 74
SP13
SP13 74
SP12
SP12 74
SP11
C3201
SP11 74 Close to chip
1 RREF U3201
DY2
24
23
22
21
20
19
RTS5138-GR-GP
3D3V_S0 Do Not Stuff
XD_D7
SP14
SP13
SP12
SP11
CLK_IN
C 1 R3201 2 C
6K2R2F-GP 1 18 SP10
RREF SP10 SP10 74
USB_PN9_R 2 17
MAX 0.4A USB_PP9_R 3
DM GPIO0
16 SP9
SP9 74
DP SP9 SP8_R 1 R3212 2 SP8
4 15 SP8 74
3V3_IN SP8 Do Not Stuff SP7
3D3V_CARD_S0 5 14 SP7 74
V18 CARD_3V3 SP7 SP6
6 13 SP6 74
2
V18 SP6
XD_CD#
DY
1
C3203 C3204 C3202
SP1
SP2
SP3
SP4
SP5
SCD1U10V2KX-4GP Do Not Stuff SC1U10V2KX-1GP 25
1
GND SP8
2
71.05138.003 0719: EMI Request, ADD RC Filter
7
8
9
10
11
12
1
DY EC3201
SP5 Do Not Stuff
SP5 74
2
SP4
SP4 74
SP3
SP3 74
SP2
The maximum range of the PMOS output current SP1
SP2
SP1
74
74
XD_CD#
1. xD-Picture Card: 250mA XD_CD# 74
2. SD/MMC Card: 250mA The pin2 / pin3 (DM/DP) of RTS5138 chip trace layout
3. MS/MSPRO/Duo-HG: 250mA with differential characteristic impedance (Zdiff) is 90ȍ± 10%
B POWER TRACE B
USB_PP9_R
1.RTS5138: pin 4 (3V3_IN) trace fixed width is 30 mils (minimum). 18 USB_PP9 1 R3211 2
DY Do Not Stuff
2.RTS5138: pin 5 (CARD_3V3) trace fixed width is 30 mils (minimum).
1
3.RTS5138: pin 6 (V18) trace fixed width is 12 mils (minimum). C3209
Do Not Stuff
Keep the trace routing lengths as short as possible. TR3201 DY
FILTER-130-GP
4.RTS5138: pin 1(RREF) trace fixed width is 12 mils (minimum).
5.RTS5138: pin 1(RREF) trace must far away 48MHz clock trace.
6.De-coupling and Bulk capacitor should place near to RT5138 chip and Combo Socket.
7.It is recommended that use of ferrites bead on power trace.
4
8.Via size: Pad>=32 mils, Finished hole>=16 mils.
18 USB_PN9 1 R3210 2 USB_PN9_R
DY Do Not Stuff
1
C3208
Do Not Stuff
0103 Modify: DY
AMD Spec Update To reserve 6.8P Cap If Trace < 10 Inch
A 0118 Modify: DQ15 AMD DIS SAMSUNG TI A
Change TR3201 To 69.10118.001 due to layout limitation
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
A B C D E
4 4
3 3
2 2
1 DQ15 AMD DIS SAMSUNG TI 1
Wistron Corporation
Title
Reserved
A3
A B C D E
5 4 3 2 1
ROSA Run Power

15V_S5
Rds(on) = 14m ohm 5V_S0
5V_S5 Max. Current 11.6A 5V_S0
U3601 Peak current: 6.27A
1
5 D G 4
6 D S 3
R3604 7 D S 2
100KR2J-1-GP 8 D S 1
2
AO4468-GP
1 R3605 2 0R2J-2-GP 5V_RUN_ENABLE 84.04468.037
2nd = 84.08882.037
1
D C3608 C3603 D
3D3V_AUX_S5 Do Not Stuff SC10U10V5KX-2GP
DY
2
1122 Modify:
1 R3606 2 100KR2J-1-GP PS_S3CNTRL
Change From Y5V To X5R
D G S
4
Q3602
2N7002KDW-GP Rds(on) = 14m ohm 3D3V_S0
84.2N702.A3F Max. Current 11.6A
Do Not Stuff
3D3V_S5 3D3V_S0 3D3V_S0
Peak current: 4.76A
1
3
2nd = 84.DM601.03F U3602
2
EC3601
S G D 5 D G 4
6 D S 3
7 2
DY
1
D S
8 1
1
D S
18,27,44,46,75 PM_SLP_S3#
AO4468-GP C3604
RUN_ENABLE 1 R3607 2 0R2J-2-GP 3.3V_RUN_ENABLE 84.04468.037 SC10U6D3V5KX-1GP
2
2nd = 84.08882.037
1
DY C3605 0720 Modify:
Do Not Stuff
Reserved EC3601 0.1uF near
2
C3604 for EMC NEO suggestion.
0120 Modify:
Change From 0603 To 0402
1D1V_S5
Rds(on) = 14m ohm 1D1V_S0 1D1V_S0
Max. Current 11.6A
U3611 Peak current: 4.0A
8 D S 1
7 D S 2
6 D S 3
1
5 D G 4 C3614
SC10U6D3V5KX-1GP
C AO4468-GP C
2
1 2 1.1V_RUN_ENABLE 84.04468.037
R3633 2nd = 84.08882.037
1
49K9R2F-L-GP C3615
SCD1U25V2KX-GP
2
1027 Modify: Tune Sequence

Rds(on) = 14m ohm
Max. Current 11.6A
1D5V_S3 1D5V_S0
1D5V_S0
U3606
AO3404A-GP Peak current: 0.5A
D S
1
C3609
G
2 SC10U6D3V5KX-1GP
1 R3630 2 10KR2J-3-GP 1.5V_RUN_ENABLE

1
C3610
SCD01U50V2KX-1GP
2
0307: Change Material, 84.02222.S11 Locked
Power Sequence H_THERMTRIP# 6,18,85
E
3D3V_S0
B 3D3V_S0 H_PWRGD_R MMBT2222A-3-GP B
6,17,71 H_CPUPWRGD
1
DYR3601
2
Do Not Stuff
B
Q3601
C
1
10KR2J-3-GP
C3602
DY
Do Not Stuff
R3624
2
1
Do Not Stuff
17,27 A_RST# 1 2
R3627
R3622 1KR2J-1-GP
DY D3603 83.00056.Q11 0713: Remove R3623, Change R3622 to 1K
2
18,27,44,46,75 PM_SLP_S3# 2 2ND = 83.00056.G11
Cost Down Opportunity 3RD = 83.00056.K11
2
Do Not Stuff 3
BAS16-6-GP
2ND = 83.00056.G11
3RD = 83.00056.K11 27,46 1D2V_S0_PWRGD 1 R3626 21D2V_S0_PWRGD_R 1 2
Do Not Stuff
R3629 D3605 BAW56-5-GP 3 PURE_HW_SHUTDOWN# 27,28
1 DY 2 R3629_2 2
6 FS1R1
D3604 41 3V_5V_EN 1 83.00016.K11
Do Not Stuff DY 3VCORE_EN_R 1 R3628 2 Do Not Stuff VCORE_EN 42 27,46 1D1V_S5_PWRGD 2 2ND = 83.00016.F11
D3601
Do Not Stuff
1
1 R3634 2 R3634_2 1 3 RUNPWROK_D 1 R3625 2 Do Not Stuff FCH_PWRGD 18 1 2 S5_ENABLE 27
1
18,27,44,46,75 PM_SLP_S3#
R3602
DY C3616 R3603 1KR2J-1-GP
Do Not Stuff Do Not Stuff DY Do Not Stuff 1
44 1D5V_S3_PWRGD DY
2
BAW56-5-GP
2
83.00056.Q11
48 PWR_2D5V_PGOOD
2 DY 1 0708: DG Change to 1K
D3606 Do Not Stuff 2ND = 83.00056.G11
3RD = 83.00056.K11
D3607 confrim Intersil by FAE,don't need L/S
0110 Modify: Reserve R3631 For Cost Time, C3616 For Tune Timing 42 VRM_VDD_PWRGD 2
3
BAW56-5-GP
83.00056.Q11
2ND = 83.00056.G11
A 3RD = 83.00056.K11 A
RUNPWROK_D
1013 Modify: Remove D3607 Pin 1 VRM_VDD_NB_PWRGD 1D1V_S5_PWRGD
1D5V_S3_PWRGD
EC3602 EC3603 EC3604

0109: EMI Reserve, EC3602 Place Near R3625
2
2
0109: EMI Reserve, EC3603 Place Near D3604
0109: EMI Reserve, EC3604 Place Near D3604
Wistron Corporation
Do Not Stuff
Do Not Stuff
Do Not Stuff
DY DY DY
1
1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Title
Power On Logic
Custom
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A Wistron Corporation A
Title

Power Plane Enable Rev
A3
5 4 3 2 1
5 4 3 2 1
D D
Move To CRT BD
C C
B B
Wistron Corporation
Title
DCIN_JACK
Custom
X00
5 4 3 2 1
5 4 3 2 1
SSID = BATT CONN

D D
BT+
Batt Connecter
Do Not Stuff
1
PD3902
C3902 C3901
SCD1U50V3KX-GP SC2200P50V2KX-2GP DY BATT1
2
0916: Change Charger IC, Remove BATT_SENSE 10
A
1
2
R3902 1 2 100R2J-2-GP PBAT_SMBCLK1 3
27,40 BAT_SCL PBAT_SMBDAT1
R3903 1 2 100R2J-2-GP 4
27,40 BAT_SDA PBAT_PRES1#
R3904 1 2 100R2J-2-GP 5
27 BAT_IN#
R3901 6
2 1 AFTP3901 1 BAT_ALERT 7
3D3V_AUX_KBC
K
PD3904 8
470KR2J-2-GP 9
DY EC3901 EC3902 11
1
Do Not Stuff
Do Not Stuff
ALP-CON9-2-GP-U
A
C DY DY C
20.81316.009
2
2nd = 20.81440.009
3rd = 20.81328.009
0720 Modify:
DCBATOUT
AFTP3902 1 PBAT_PRES1#
EC3903
Do Not Stuff
AFTP3903 1 PBAT_SMBDAT1
1
AFTP3904 1 PBAT_SMBCLK1
AFTP3905 1 BT+ DY
2
0719 Modify:
Reserved EC3903 0.1uF near EC3901 for EMC NEO suggestion.
B B
For actual location, need to be swap all pin
Close to Batt Connector
BAT_SCL
BAT_IN#
BAT_SDA
3
3
D3901
D3902 D3903 BAV99-5-GP-U
BAV99-5-GP-U BAV99-5-GP-U
1
83.00099.T11
1
83.00099.T11 83.00099.T11 2nd = 83.00099.K11

2nd = 83.00099.K11 2nd = 83.00099.K11 3rd = 83.BAV99.D11
3rd = 83.BAV99.D11 3rd = 83.BAV99.D11
3D3V_AUX_KBC
Wistron Corporation
Title
BATT CONN
A3
5 4 3 2 1
5 4 3 2 1
SSID = Charger
D D
DCBATOUT BT+
AD+_TO_SYS
PU4003
PU4002 1 S D 8
AD+ 8 D S 1 2 S D 7
7 D S 2 1 2 3 S D 6
1
6 D S 3 PR4002 AD+ 4 G D 5
5 D G 4 D01R2512F-4-GP
PR4003
Do Not Stuff
100KR2J-1-GP
AO4407AL-GP
1
EE need pull high and net name AO4407AL-GP
PG4002
1
2
PG4003
10KR2J-3-GP
2
0802 Rename H_PROCHOT# Id= -10A
1
AD+_G_2
PR4004
Do Not Stuff
Id= -10A PR4005 Qg= -22nC
PG4004
PG4005
PG4001
PG4006
3D3V_AUX_S5
PWR_CHG_REGN
2
2
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Qg= -22nC 470KR2J-2-GP
2
Rdson=14~13mohm
10KR2F-2-GP
PR4006
PR4001
Rdson=14~13mohm Do Not Stuff
1
1
2
1
2 1
DY
DC_IN_D
6,27 H_PROCHOT# PR4030
PR4032
Do Not Stuff
1
DY 100KR2J-1-GP 1 2
D
PQ4002
AD+_G_1
PQ4005
2N7002A-7-GP PC4002
2
3 4
2
SCD1U25V2KX-GP
Do Not Stuff
G PWR_CHG_CMPOUT PWR_CHG_ACOK 2 5 0222: Change PC4004, PC4024 From 0603 To 0402 0.1uF
1 6 0106: Update PU4005 Symbol From Database. PWR_DCBATOUT_CHG
PC4003
1
S
AD+ PC4004
2N7002KDW-GP DY
Do Not Stuff
SC10U25V5KX-GP
SC10U25V5KX-GP
R4040 SCD1U25V3KX-GP
SC10U25V5KX-GP
2
Do Not Stuff
PC4008
PC4009
120KR2J-L-GP 84.2N702.A3F
PWR_CHG_ACN
PWR_CHG_ACP
PC4006
1
1
PWR_CHG_CMPIN
EC4001
EC4002
2nd = 84.DM601.03F
1
PC4024
1
PR4008 CHG_AGND SCD1U25V3KX-GP

CHG_AGND DY DY
SCD47U25V3KX-2GP
2
1
20R5J-GP PD4001
2
1
5
6
7
8
PR4007 1 2 PWR_CHG_VCC SD103AWS-1-GP
X00 0415
D
D
D
D
C PR4029 CHG_AGND PR4009 PU4004 C
316KR2F-GP
54K9R2F-L-GP Do Not Stuff
PC4010
1 2 K A 1 2
1
1 2 Do Not Stuff PC4007
65MOS
2
SCD047U25V2KX-GP
2
1
PR4010 20R5J-GP PU4005 SC1U25V3KX-1-GP
X00 0415
2
G
PC4011
4
ACN
ACP
2
S
S
S
PWR_CHG_IOUT 20
VCC
1
CHG_AGND
3
2
1
PR4011
2
19K1R2F-GP PWR_CHG_ACDET 6 17 PWR_CHG_BTST
PR4031
D
SCD01U50V2KX-1GP
ACDET BTST
1
Charger Current=1.4~3.6A
1
PQ4004
PC4012
2N7002A-7-GP PWR_CHG_CMPOUT 16 PWR_CHG_REGN

REGN
G
DY
49K9R2F-L-GP
AD_IA_HW 27
2
1
PR4014 3
2
PR4013 3D3MR2J-GP CMPOUT PWR_CHG_HIDRV

HIDRV 18 PL4001
49K9R2F-L-GP BT+
S
PR4015 1 2
4
CMPIN PWR_CHG_PHASE Do Not Stuff PWR_CHG_LX1 BT+_R
19 1 2 PC4013 1 2 1 2
2
2
PWR_CHG_CMPIN PHASE PR4016
Do Not Stuff
Do Not Stuff
SCD1U25V2KX-GP
SCD1U50V3KX-GP
IND-5D6UH-48-GP-U1
Do Not Stuff
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
D01R2512F-4-GP
PC4019
CHG_AGND CHG_AGND 2 1 PWR_CHG_BAT_SCL 9 15 PWR_CHG_LODRV
PC4015
PC4016
PC4017
27,39 BAT_SCL SCL LODRV
1
Do Not Stuff
PC4018
CHG_AGND PG4007 Do Not Stuff
PG4010
PG4009
5
6
7
8
PC4014
Do Not Stuff
PWR_CHG_BAT_SDA
DY
D
D
D
D
3D3V_AUX_KBC X00 0415 27,39 BAT_SDA 2 1 8 PU4006
2
PG4008 Do Not Stuff SDA
1
Do Not Stuff
1
PC4020
PWR_CHG_CMPIN PR4019
PWR_CHG_SRP 2 10R2F-L-GP
SRP
13 1
65MOS
1
PWR_CHG_ILIM 10
X00 0415
G
ILIM
1
PR4017 PWR_CHG_SRN 4
1
12 1 2
S
S
S
100KR2J-1-GP SRN PR4012 7D5R2F-GP
PR4037
TP4001 PWR_CHG_AD_OFF 1 PWR_CHG_IFAULT
DY
3
2
1
1 2 11 IFAULT#
19K6R2F-GP DY
2
Do Not Stuff
2
PR4018
Do Not Stuff PR4022
2
B B
2
PR4023 Do Not Stuff CHG_AGND

3D3V_AUX_KBC PWR_CHG_IOUT
Do Not Stuff
5 7 1 2 AD_IA 27
SCD1U25V2KX-GP
PR4035
Do Not Stuff ACOK# IOUT PWR_CHG_CSOP_1

DY
GND
GND
PWR_CHG_REGN DY
D
SC220P50V2JN-3GP
PC4021
PQ4007
2
2N7002A-7-GP DYPR4026 BQ24707ARGRR-GP

X00 0415
21
14
PQ4001
1 PR4024
Do Not Stuff
Do Not Stuff
D
1
G AD_IA_HW2 27 Do Not Stuff
1 PC4022
CHG_AGND PG4011
2
DY 1 2
2
PWR_CHG_CMPOUT
S
G
Do Not Stuff PWR_CHG_CSON_1
SCD1U25V2KX-GP
CHG_AGND
X00 0415 CHG_AGND DY
S
2
EE need check pull high
PC4023
2
1
CHG_AGND
3D3V_AUX_S5 PWR_CHG_REGN
2
3D3V_AUX_S5 PWR_CHG_REGN
CHG_AGND
CHG_AGND
1
1
CHG_AGND
1
PR4039 PR4028
PR4027 PR4025 100KR2J-1-GP Do Not Stuff
100KR2J-1-GP DY Do Not Stuff DY
2
2
AD+ 27 PWR_CHG_ACOK X00 0415

2
27 AC_IN#
1
1
DY PQ4006
Do Not Stuff
PR4033
PC4025
Do Not Stuff
PR4034
Do Not Stuff 2N7002A-7-GP

1
DY
2
DY PR4036 G AC_IN#
Do Not Stuff
2
EC code only BQ24707

2
A A
PQ4009 DY DQ15 AMD DIS SAMSUNG TI
G
2
H_PROCHOT# AD_IA_HW AD_IA_HW2 D

Wistron Corporation
1
DY
Do Not Stuff
PR4038
S 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

65W 0 0 DY Taipei Hsien 221, Taiwan, R.O.C.
Do Not Stuff
Do Not Stuff Title
2
90W 1 0
BQ24707RGRRG4
130W 0 1 0120 Modify Custom
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_3p3v5v
PWR_3D3V_LGATE2
SC1KP50V2KX-1GP
1
PC4105
SCD1U25V3KX-GP
SCD1U25V3KX-GP
1
2
2
PC4102
PC4103
D PD4102 D
Do Not Stuff
2
DY
3
3
3
0307: Power Team Modify PD4103 PD4104
BAT54S-7F-GP BAT54S-7F-GP
36 3V_5V_EN 1 2 PWR_3D3V5V_ENTRIP
1
PR4106 10KR2J-3-GP 15V_S5 5V_S5
DCBATOUT PWR_3D3V_DCBATOUT
PR4108 15V_PWR
1
PG4102 PWR_3D3V_ENTRIP2 1 2
1 2 PR4113 66K5R2F-GP 1 2
DY Do Not Stuff PG4103
1
1
PG4104 PC4109 DY PC4111
4
1 2 Do Not Stuff PD4101 SC1U25V3KX-1-GP PC4106 PC4107
2
Do Not Stuff SCD1U25V3KX-GP SCD1U25V3KX-GP
2
Do Not Stuff PQ4101 DY
PG4105 DMN66D0LDW-7-GP
A
1 2
3
Do Not Stuff
PG4106
PR4105
1 2
1 2 PWR_5V_ENTRIP1
Do Not Stuff
105KR2F-1-GP
1
DCBATOUT PWR_5V_DCBATOUT
DY PC4108
Do Not Stuff
2
PG4107
1 2
Do Not Stuff
PG4108
1 2
C C
Do Not Stuff
PG4109
1 2
Do Not Stuff
PG4122
1 2
DCBATOUT
Do Not Stuff
Design Current = 4.5A PWR_3D3V_DCBATOUT
PWR_5V_DCBATOUT PG4126
6.3A<OCP<7.65A PC4110 1 2
SCD1U50V3KX-GP
DCBATOUT
1
Do Not Stuff
PC4127
Do Not Stuff
1
3D3V_S5
SC10U25V5KX-GP
PC4113
SCD1U50V3KX-GP
PC4112
SC10U25V5KX-GP
PC4114
3D3V_PWR
DY PG4127
1
PC4116
SC10U25V5KX-GP
PC4117
SC10U25V5KX-GP
PC4118
SCD1U50V3KX-GP
PC4128
SC10U25V5KX-GP
1 2
2
1
PG4115
2
1 2 PR4112 Do Not Stuff

D
2
5
6
7
8
Do Not Stuff
D 5V_AUX_S5 100KR2F-L1-GP
D 8
D 7
D 6
D 5
D
D
D
D
PU4102
PG4117 PU4101 Do Not Stuff
2
1 2 PU4103
Do Not Stuff
1
PC4115 PR4109 65MOS
Do Not Stuff
65MOS SC10U6D3V3MX-GP 12 PWR_5V3D3V_ENLDO1 2
PG4119 ENLDO
G
S
S
S
100KR2F-L1-GP
14 G
2
1 2 LDO5
S
1 S
2 S
3 S
4 G
4
3
2
1
Design Current = 8.085A
Do Not Stuff
RT8239CZQW-GP-U 11.3A<OCP<13.7 A
PG4121 S G PC4119
PR4110 VIN
11
PR4111
PC4124
1 2
2 1PWR_3D3V_VOOT2_1 1 2 PWR_3D3V_BOOT2 7 19 PWR_5V_BOOT1 1 2 PWR_5V_VOOT1_1 1 2
BOOT2 BOOT1 5V_S5
Do Not Stuff 3D3V_PWR PL4101
PL4103 SCD1U25V3KX-GP 2D2R2J-GP PWR_3D3V_UGATE2 8 18 PWR_5V_UGATE1 2D2R2J-GP SCD1U25V3KX-GP
PG4124 UGATE2 UGATE1
1 2 PWR_3D3V_PHASE2 PWR_5V_PHASE1
1 2 9 17 1 2
PHASE2 PHASE1
1
IND-2D2UH-157-GP-U1
Do Not Stuff COIL-1UH-61-GP
1
1
PG4125 PR4107 PWR_5V_LGATE1 PR4122 PG4123

DY LGATE1
16 D
1
1 2
PC4101
SE330U6D3VM-15-GP
Do Not Stuff
Do Not Stuff PWR_3D3V_LGATE2 Do Not Stuff
PG4128
D 10
LGATE2 DY
D 8
D 7
D 6
D 5
2
Do Not Stuff
1
5
6
7
8
1
Do Not Stuff
Do Not Stuff
PC4122
PWR_3D3V_FB2 5 1 PWR_5V_FB1
2
PU4104 FB2 FB1
D
D
D
D
PU4105 DY PC4104
1PWR_3D3V_SNUB
Do Not Stuff
2
B 3D3V_AUX_PWR PWR_5V_VOUT B
Do Not Stuff
20 SE330U6D3VM-15-GP
1PWR_5V_SNUB
2
74.08239.A73 BYP1
65MOS
1PWR_5V_VOUT
2
15V_PWR
15
LDO3 PR4120 65MOS
S
S
S
G
G
S
S
S
13 PWR_5V3D3V_ENM/SECFB 1 2
PC4123 3D3V_AUX_PWR SECFB
1
2
3
4
S G
PWR_3D3V_VOUT
4
3
2
1
SC4D7U6D3V3KX-GP 200KR2F-L-GP
S
2
3V_5V_POK 6
PGOOD
PC4126 G
1
DY 1 DY2 DY PC4121
PC4120 PWR_5V_ENTRIP1 2 Do Not Stuff PR4115
2
2
ENTRIP1
1
Do Not Stuff PR4114 Do Not Stuff 15KR2F-GP
100KR2J-1-GP 3 PWR_5V3D3V_TON PR4121
PWR_3D3V_ENTRIP2 TON 39KR2F-GP
4
2
2
ENTRIP2
1
GND
PR4116
2
0304: Power Team Modify 46 3V_5V_POK 68KR2F-GP
21
1
2
PR4117
1
6K65R2F-GP
PR4118
2
10KR2F-2-GP
3D3V_AUX_PWR 3D3V_AUX_S5
1
PC4125 DY
2
PR4123
Do Not Stuff
Do Not Stuff
2
1 2
1
PR4119
10KR2F-2-GP
2
X00-0921
I/P cap: 10U 25V K0805 X5R/ 78.10622.51L
I/P cap: 10U 25V K0805 X5R/ 78.10622.51L Inductor: 2.2UPCMB104T-2R2MS Cyntec 6mohm/7mohm Isat =18Arms 68.2R210.20J
DCBATOUT Inductor: 2.2U PCMC063T-2R2MH Cyntec 18mohm/20mohm Isat =14Arms 68.2R210.20Q O/P cap: 330U 6.3V MP6VU330MC5R7 15mOhm 3.16Arms Matsuki Polymer/77.53371.04L
A
O/P cap: 330U 6.3V MP6VU330MC5R7 15mOhm 3.16Arms Matsuki Polymer/77.53371.04L H/S: RJK03B9DPA / 10.9mohm/15.1mOhm@4.5Vgs/ 84.003B9.B37 A
DCBATOUT
H/S: AO4496 / 21mohm/26mOhm@4.5Vgs/ 84.04496.037
2
L/S: RJK03D4DPA / 4.6mohm/5.6mOhm@4.5Vgs/ 84.00034.A37

Vz=5.1V PD4106 L/S: AO4720L / 14mohm/17.5mOhm@4.5Vgs/ 84.04720.037
1
PQ4106 DY Do Not Stuff

PR4126 4 3 PWR_5V3D3V_ENLDO
Do Not Stuff
DY
1
PQ4606_2 DQ15 AMD DIS SAMSUNG TI

5 DY 2
2
PQ4606_5 6 1 0629 Modify

0629 Modify
PR4102 Wistron Corporation
1
Do Not Stuff DYDo Not Stuff 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
PR4127
DY Do Not Stuff Do Not Stuff Taipei Hsien 221, Taiwan, R.O.C.
2
Title
2
Size
TPS51125ARGER
Document Number Rev
A2
5 4 3 2 1
5 4 3 2 1
DCBATOUT_VCC_CORE1 0110 Modify: Remove PTC4209

DCBATOUT
DCBATOUT
PG4327
1 2 DCBATOUT_VCC_CORE1
Do Not Stuff
PG4328
DY
1
1 2
PTC4210
Do Not Stuff Do Not Stuff PC4231
1
PC4230
SC10U25V5KX-GP
PC4229
SC10U25V5KX-GP
PC4246
SC10U25V5KX-GP
PC4247
SC10U25V5KX-GP
PG4329
SCD1U50V3KX-GP
1 2
2
Do Not Stuff
PG4330
5
6
7
8
1 2
D
D
D
D
D PU4202 D
PG4331
1 2 65MOS
5V_S5
G
S
S
S
Do Not Stuff 5V_S5
PG4332 5V_S5 Cyntec 0.36uH Iomax=36A
4
3
2
1
1 2
DCR=1.05mohm OPC>54A
ྤሩறᇆ
1
Do Not Stuff 0304 Modify: Change To Idc=30A, Isat=60A
2
PC4239
APU_VDD
2
PR4233 SC2D2U10V3KX-1GP
2
PWR_VCC_CORE_VCC PC4240
24
10R2F-L-GP PL4201
PU4201 SC2D2U10V3KX-1GP
1
PC4238 1 2
VDDA
1
Do Not Stuff
DCBATOUT_VCC_CORE1 IND-D36UH-9-GP
DCBATOUT 1 2 40 15 PR4241
VCC VDDB
PG4337
1
Do Not Stuff
1 2 PTC4201 PTC4202 PTC4203
SC1U10V2KX-1GP
5
6
7
8
5
6
7
8
2
Do Not Stuff
MAX17811_TON 1 2DCBATOUT_VCC_CORE1 PU4203 PU4208
TON 2
DY DY
D
D
D
D
D
D
D
D
Do Not Stuff
SE330U2VDM-L-GP
SE330U2VDM-L-GP
Do Not Stuff
PG4214
PG4215
Do Not Stuff MAX17811_AGND PR4226 100KR2D-1-GP
2
PG4334 31 Do Not Stuff
DRVPWMA MAX17811_BSTA1 2 PWR_VCC_CORE_BOOT1_R
1PWR_APU_SNUB1 2
1 2 1013 Modify: Change VRM_VDD_NB_PWRGD 20 1 2 1 65MOS 65MOS
1
BSTA1 PR42312D7R3-GP
Do Not Stuff
To VRM_VDD_PWRGD Since Regulator A & B is Wired-OR Together PC4210
39 CSPA3
2
S
S
S
S
S
S
PR4227 PWR_VCC_CORE_UG1 SCD1U25V3KX-GP
G
PG4336 22
DHA1 PR4284
1 2 3D3V_S0 1 2
4
3
2
1
4
3
2
1
100KR2F-L1-GP PR4285 1R2J-GP
1
Do Not Stuff 21 PWR_VCC_CORE_PH1 1K78R2F-GP
LXA1
PG4338 36 VRM_VDD_PWRGD 1 PR4228 2 VRM_VDDNB_PWRGD 10
1
Do Not Stuff PWRGD PWR_VCC_CORE_LG1 PC4236
1 2 3D3V_S0 2 1 23
LXA1 SENSE
DLA1
Do Not Stuff
PR4229 100KR2F-L1-GP R9323
DY PR4288
Do Not Stuff 6 APU_PROCHOT#_VDDIO_R 1 PR4230 2PWR_VCC_CORE_PROC_HOT# 5 PWR_VCC_CORE_CSPA1 0110 Modify 2K87R2F-1-GP
2
Do Not Stuff VRHOT#
2
PG4333 1 2 1 2
1 2 1209 Modify: Change from APU_PROCHOT#_VDDIO 36 PC4255 NTC-10K-27-GP
CSPA1 Do Not Stuff PR4283
To APU_PROCHOT#_VDDIO_R To Align Netname
1
Do Not Stuff 3K57R2F-GP PR4281
PG4335 1 DY 3K57R2F-GP
36 VCORE_EN EN
1 2 PR4278 PC4244 LXA2 SENSE 1 2 1 2
2
1R2J-GP SCD22U25V3KX-GP PR4290 PC4243
1
Do Not Stuff 35 PWR_VCC_CORE_CSPAAVE 1 2 PR4278_2 1R2J-GP SCD22U25V3KX-GP
1
PWR_VCC_CORE_SVD CSPAAVE
C
6 APU_SVD_R 1 PR4235 2 16 SVD DY MAX17811_AGND C
Do Not Stuff PWR_VCC_CORE_CSNA PWR_VCC_CORE_CSPA2 2PWR_VCC_CORE_CSPA1
37 1 2
DY 1
DY 1 2
2
CSNA
2
1 PR4234 2 PWR_VCC_CORE_SVC 17 PC4254 PR4293 PR4292
6 APU_SVC_R SVC
Do Not Stuff 38 PWR_VCC_CORE_CSPA2 Do Not Stuff
CSPA2 Do Not Stuff Do Not Stuff PR4286
1
6 H_CPUPWRGD_E 1 PR4236 2 PWR_VCC_CORE_PWROK 19
PWROK_IN
MAX17811_AGND 0321 Modify: No Need To Pop, Confirmed Power
1
Do Not Stuff DY 1 2
1D5V_S3 PC4252 PC4253 PR4280 NTC-10K-27-GP
DY
2
18 Do Not Stuff Do Not Stuff 2K87R2F-1-GP
2
VDDIO PWR_VCC_CORE_CSPAAVE PWR_VCC_CORE_CSNA
PC4212 MAX17811_AGND
1 2 1
PR4282
2
DY
2
MAX17811_AGND SCD1U25V3KX-GP DCBATOUT_VCC_CORE1 Do Not Stuff

PC4237
SCD1U25V3KX-GP PWR_VCC_CORE_THERMA 33 28 MAX17811_BSTA2
1 2PWR_VCC_CORE_BOOT2_R
2 1
1
THERMA BSTA2 PR4232 2D7R3-GP

PWR_VCC_CORE_THERMB 34
THERMB PWR_VCC_CORE_UG2 PC4233
DHA2 26
1
PC4232
SC10U25V5KX-GP
PC4234
SC10U25V5KX-GP
PC4248
SC10U25V5KX-GP
PC4249
SC10U25V5KX-GP
MAX17811_AGND PWR_VCC_CORE_SR 32
SR
SCD1U50V3KX-GP
PWR_VCC_CORE_IMAXA 29 27 PWR_VCC_CORE_PH2
2
IMAXA LXA2
5
6
7
8
D
D
D
D
PWR_VCC_CORE_IMAXB 30 PU4205
IMAXB PWR_VCC_CORE_LG2
25 Do Not Stuff
DLA2
65MOS
PC4241
Iomax=36A
G
S
S
S
SCD1U25V3KX-GP
APU_VDD 1 2 1 2 MAX17811_FBA_R
1 2MAX17811_FBA
4
3
2
1
PR4201 10R2F-L-GP PR4202 PR4224 11 MAX17811_BSTB
1 2PR4237_22 1 PWR_VCC_CORE_PH1_NB 43
10R2F-L-GP BSTB PR4237 2D7R3-GP APU_VDD
7K5R2F-1-GP
2 1 4 PL4202
PC4201 SC1KP50V2JN-2GP FBA
6 APU_VDD_RUN_FB_H 13
DHB PWR_VCC_CORE_UG1_NB 43
MAX17811_AGND 1 2
6 APU_VDD_RUN_FB_L 1 2 3 IND-D36UH-9-GP
GNDSA
Do Not Stuff
Do Not Stuff
PC4202 12
SC1KP50V2JN-2GP LXB
1
1 2 1 2 MAX17811_GNDSA PTC4204 PTC4205 PTC4206
PR4243
2
PR4203 10R2F-L-GP PR4204 14
DLB Do Not Stuff
5
6
7
8
5
6
7
8
DY
Do Not Stuff
SE330U2VDM-L-GP
SE330U2VDM-L-GP
PWR_VCC_CORE_LG1_NB 43
PG4216
PG4217
10R2F-L-GP PU4206 PU4214
DY
2
D
D
D
D
D
D
D
D
Do Not Stuff
Do Not Stuff
1PWR_APU_SNUB2 2
1
APU_VDDNB 1 2 1 2 MAX17811_FBB_R 1 2MAX17811_FBB
B PR4205 10R2F-L-GP PR4207 PR4225 B
CSPB1 8
PWR_VCC_CORE_CSPB1 43 65MOS 65MOS
10R2F-L-GP PC4203
1LXA2 SENSE
7K15R2F-L-GP
S
S
S
S
S
S
G
G
6 APU_VDDNB_RUN_FB_H 2 1 6 9
FBB CSNB
1
SC1KP50V2JN-2GP
0R2J-2-GP
4
3
2
1
4
3
2
1
1
Do Not Stuff
PR4287
MAX17811_AGND
1
6 APU_VDDNB_RUN_FB_L 7
GNDSB DY PC4251
AGND
1 2 DY
2
2
PC4204 PC4250 PR4276
PC4235
2
1 2 1 2SC1KP50V2JN-2GP MAX17811_GNDSB Do Not Stuff DY Do Not Stuff 1K78R2F-GP PR4275

PR4206 10R2F-L-GP PR4208 MAX17811GTL-GP
2
1R2J-GP
41
10R2F-L-GP MAX17811_AGND
1
Do Not Stuff 2 MAX17811_AGND
PG4218 PR4277
PR4289
2 1 1 PC4245 2K87R2F-1-GP
SCD22U25V3KX-GP 1 2 1 2
NTC-10K-27-GP
MAX17811_AGND PWR_VCC_CORE_CSNB 43
1 2 PWR_VCC_CORE_CSNA
1
PR4291 PC4242
PWR_VCC_CORE_VCC 1R2J-GP SCD22U25V3KX-GP
PWR_VCC_CORE_CSPA2
2!OUD 3!OUD
1
PR4242
PR4239
5K62R2F-GP
PR4238
5K62R2F-GP 1KR2F-L-GP
PR4270
137KR2F-1-GP
PR4273
150KR2F-L-GP QS5391>3/98L QS5391>EZ
QS5393>3/32L)EZ* QS5393>EZ
2
PWR_VCC_CORE_THERMA PWR_VCC_CORE_SR PWR_VCC_CORE_IMAXA

PWR_VCC_CORE_THERMB PWR_VCC_CORE_IMAXB QS5392-QS5394>4/68L QS5392-QS5394>EZ
1
PR4269
QD5355>1/33VG QD5355>2oG
2
PR4244 PR4272
PR4240 100KR2F-L1-GP
DYDo Not Stuff PR4274
NTC-100K-10-GP NTC-100K-10-GP 150KR2F-L-GP
QS5396-QS5387>2/6L QS5396-QS5387>2/89L
2
QS538:-QS5388>3L)EZ* QS538:-QS5388>3/89L
1
A A
MAX17811_AGND MAX17811_AGND MAX17811_AGND
QS5397>OUD!21L QS5397>OUD!21L)EZ*
QS5399-QS539:>OUD!21L)EZ* QS5399-QS539:>OUD!21L
QS53:1-QS53:2>1!pin! QS53:1-QS53:2>2!pin
QS53:3-QS54:4>211pin!)EZ* QS53:3-QS54:4>211!pin Wistron Corporation

Title
VREG : +VCC_CORE&+VDDNB
Custom
5 4 3 2 1
5 4 3 2 1
D D
DCBATOUT_VDDNB
DCBATOUT
PG4301
1 2
Do Not Stuff
PG4302
1 2
Do Not Stuff
PG4303
1 2
Do Not Stuff
PG4304
1 2
Do Not Stuff
PG4305
1 2
DCBATOUT_VDDNB
Do Not Stuff
PG4306
1 2
PC4305
Do Not Stuff
1
PC4301
Do Not Stuff
PC4302
SC10U25V5KX-GP
PC4303
SC10U25V5KX-GP
PC4304
SC10U25V5KX-GP
SCD1U50V3KX-GP
C C
2
DY
5
6
7
8
D
D
D
D
PU4207
SIR462DP-T1-GE3-GP
Imax=22A
G
S
S
S
Cyntec 0.36uH
OCP>27A
4
3
2
1
DCR=1.05mohm
Idc=30A, Isat=60A
APU_VDDNB
42 PWR_VCC_CORE_UG1_NB PL4301
42 PWR_VCC_CORE_PH1_NB 1 2
IND-D36UH-9-GP
42 PWR_VCC_CORE_LG1_NB
1
PTC4301 PTC4302 PTC4303 PTC4304
PR4305
DY Do Not Stuff DY DY
5
6
7
8
5
6
7
8
Do Not Stuff
SE330U2VDM-L-GP
Do Not Stuff
SE330U2VDM-L-GP
PU4302 PU4303
Do Not Stuff
2
D
D
D
D
D
D
D
D
2
Do Not Stuff
SIR164DP-T1-GE3-GP
PG4307
1 PWR_VDDNB_SNU
Do Not Stuff
PG4308
2
DY
1
G
S
S
S
G
S
S
S
4
3
2
1
4
3
2
1
Do Not Stuff
PC4306
Panasonic 330uF
1
DY PR4303 2V, ESR=9 mohm
1K78R2F-GP
2
B PR4302 B
Id=26.5A
Qg=40.6~61nC 1 2 0304: Power Team change from 0603 To 0402
NTC-10K-27-GP
Rdson=2.6~3.2mohm
42 PWR_VCC_CORE_CSPB1 1 2 2
DY 1 PWR_VCC_CORE_CSNB 42
PR4304 PR4306
2K87R2F-1-GP Do Not Stuff
A A
Wistron Corporation
Title
VDDNB
A2
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_1p5v0p75v
DCBATOUT PWR_DCBATOUT_1D5V
PG4401
2 1
Do Not Stuff
PG4402
2 1
D D
Do Not Stuff
PG4403
2 1 1D5V_PWR 1D5V_S3
Do Not Stuff
PG4404
2 1 1 2
PG4405
5V_S5 Do Not Stuff Do Not Stuff
PG4406
PWR_DCBATOUT_1D5V 2 1 1 2
SC1U10V3KX-3GP
PG4407
PC4406
3D3V_S5 PG4408
2 1 1 2
1
PC4403
SC10U25V5KX-GP
PC4404
SC10U25V5KX-GP
PC4405
SCD1U50V3KX-GP
PC4129
SC10U25V5KX-GP
PG4409
2
2
5
6
7
8
5
6
7
8
2
Rename RUNPWROK to 1D5V_S3_PWRGD
D
D
D
D
D
D
D
D
PR4402 PU4402 1 2
PG4410
20KR2F-L-GP Do Not Stuff
Do Not Stuff
PU4401 65MOS 65MOS
1
1 2
36 1D5V_S3_PWRGD 20 12 PC4408 PG4411
PGOOD V5IN
G
S
S
S
G
S
S
S
PU4404
SCD1U25V3KX-GP Do Not Stuff
PWR_0D75V_EN 17 PR4401 Do Not Stuff
4
3
2
1
4
3
2
1
VTTEN PWR_1D5V_VBST 1
15 2 1 2
PWR_1D5V_EN VBST 2D2R3J-2-GP 1 2
16 PG4412
EN/PSV Design Current = 12.9A
1D5V_PWR Do Not Stuff
PWR_1D5V_VREF 6
VREF DRVH
14 PWR_1D5V_DRVH 18.06A<OCP< 21A
1
PL4401 1 2
PR4403 PG4413
11K3R2F-2-GP 13 PWR_1D5V_SW 1 2
SW Do Not Stuff
IND-1D5UH-34-GP 1 2
SC4D7U6D3V5KX-3GP
PWR_1D5V_REFIN TPS51216_DRVL
2
8 11 PC4402 PG4414
SCD1U10V2KX-4GP
REFIN DRVL
5
6
7
8
2
PU4403 PTC4401
PC4410
PC4411
Do Not Stuff
D
D
D
D
1
SE560U2D5VM-2-GP
PR4404
PG4415
PGND
10
DY
Do Not Stuff
C PWR_1D5V_MODE 19 Do Not Stuff Do Not Stuff C
SCD01U16V2KX-3GP
MODE
1
DY 1 2
Do Not Stuff
PC4409
54K9R2F-L-GP
200KR2F-L-GP
PG4416
2
1
PR4405
SCD1U10V2KX-4GP
65MOS Do Not Stuff

2
PWR_1D5V_TRIP 18 9 PWR_1D5V_VDDQS
1
PC4412
2
TRIP VDDQS
66K5R2F-GP
S
S
S
TPS51216_PHS_SET
G
PR4406
2
1 2
PWR_1D5V_VDDQS
2
PR4408
PG4417
4
3
2
1
VTTIN
1
PWR_1D5V_VTTREF 5 0D75V_PWR
VTTREF Do Not Stuff
3 DY PC4413
1
SC10U6D3V5MX-3GP
VTT
1
Do Not Stuff
Do Not Stuff
2
SCD1U10V2KX-4GP
2
1
1
PC4414 1 2
PC4415
PC4416
PC4417
1 PG4418
2
VTTS
SCD22U6D3V2KX-1GP
21 DY Do Not Stuff
2
GND
4
2
VTTGND
7
GND 1 2
0630 modify PG4419
TPS51216RUKR-GP
Do Not Stuff
1D5V_PWR 1 2
PG4422
SC1U10V3KX-3GP
Do Not Stuff
0630 Modify:
PC4401
1
ADD PC4604 1uF0603 on PWR_1D5V_VTTIN.
DDR_VREF_S3 1 2
PG4423
PR4409
Do Not Stuff
2
PWR_1D5V_VTTREF 1 2
Do Not Stuff I/P cap: 10U 25V K0805 X5R/ 78.10622.51L
Inductor: 1.5uH PCMC104T-1R5MH Cyntec 3.8mohm/4.2mohm Isat =33Arms 68.1R510.10J
0702 Modify: O/P cap: 560U 2.5V MP2VL560MC5R7 16mOhm 3.5Arms 77.55671.00L
Add PR4611 0ohm 0603 pad
on PWR_1D5V_VTTREF. O/P cap: 220U 2V EEFCX0D221R 15mOhm 2.7Arms Panasonic/79.22719.20L
0D75V_PWR 0D75V_S0 H/S: RJK03B9DPA / 10.9mohm/15.1mOhm@4.5Vgs/ 84.003B9.B37
PG4420 L/S: RJK03D4DPA / 4.6mohm/5.6mOhm@4.5Vgs/ 84.00034.A37
2 1
Intel Sequence, Remove
Do Not Stuff
PG4421
2 1
Do Not Stuff
B B
State S3 S5 VDDR VTTREF VTT

S0 Hi Hi On On On
Add For Sequence
S3 Lo Hi On On Off(Hi-Z)
S4/S5 Lo Lo Off Off Off 1125-1
PR4410 1 2 2D2R2J-GP PWR_0D75V_EN
18,27,36,46,75 PM_SLP_S3#
MODE
PR4411 1 2 Do Not Stuff
PR4406 Frequency Discharge Mode 18,27,75 PM_SLP_S5# DY
1
200k ohm 400kHz PC4418
Tracking Discharge SCD1U10V2KX-4GP
2
100k ohm 300kHz
68k ohm 300kHz
Non-tracking Discharge
47k ohm 400kHz
0816
PR4412 1 2 0R2J-2-GP PWR_1D5V_EN
18,27,75 PM_SLP_S5#
1
Change To SLP_S5 PC4419

A DY Do Not Stuff A
2
Wistron Corporation
Title
TPS51216_1D5V_S3
Custom
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Wistron Corporation
Title
VDDR & VDDP

A2
5 4 3 2 1
A B C D E
SSID = PWR.Plane.Regulator_1D1V_S5
DCBATOUT
4
3D3V_S5 4
SCD1U50V3KX-GP
1
1
PC4602
Do Not Stuff
PC4603
SC10U25V5KX-GP
PC4605
1
10KR2J-3-GP
PR4602 DY 1D1V_PWR 1D1V_S5
5
6
7
8
2
D
D
D
D
PG4603
PU4602 1 2
2
1 PR4603 2 Do Not Stuff
27,36 1D1V_S5_PWRGD Do Not Stuff Do Not Stuff
65MOS
PG4605
G
S
S
S
1 2
PU4607 PC4606 Design Current =3.937A
4
3
2
1
PR4604
1 2 PR4601 SCD1U25V3KX-GP Do Not Stuff
95K3R2F-GP PWR_1D1V_PWRGD 1 11 2D2R3J-2-GP 6.116A<OCP<7.228A PG4606
PGOOD GND PL4601 1D1V_PWR
PWR_1D1V_TRIP 2 10 PWR_1D1V_BOOT 1 2PWR_1D1V_BOOT_R2 1 1 2
PD4601 PWR_1D1V_EN TRIP VBST PWR_1D1V_UGATE
K A 3 9
SDMK0340L-7-F-GP PWR_1D1V_FB EN DRVH PWR_1D1V_PHASE Do Not Stuff
4 8 1 2
VFB SW
1
PWR_1D1V_CCM 5 7 5V_S5 PG4607
RF V5IN
Do Not Stuff
41 3V_5V_POK PR4605 1 2 6 PWR_1D1V_LGATE 0728 PR4606 2D2R5J-1-GP 1 2
DRVL
1
100KR2J-1-GP COIL-2D2UH-27-GP PC4608
1
PG4608
SCD1U10V2KX-4GP
PC4607 Do Not Stuff
151218_SW_GND_VTT_1D1V
1
1
PC4601
PR4607 TPS51218DSCR-GP-U1 SC1U10V2KX-1GP PTC4601 PG4609

SC1KP50V2KX-1GP
2
5
6
7
8
470KR2F-GP SE390U2D5VM-7GP 1 2
2
D
D
D
D
2
2
PU4603 Do Not Stuff
2
Do Not Stuff PG4610
65MOS 1 2
G
S
S
S
Do Not Stuff
SC330P50V2KX-3GP
PWR_1D1V_PWR PG4611
4
3
2
1
1 2
PC4609 Do Not Stuff
1
PR4608
2
DY PC4610
6K49R2F-1-GP
Do Not Stuff
2
2
3 3
PWR_1D1V_FB
I/P cap: 4.7U 25V K0805 X5R/ 78.47522.51L
Inductor: 2.2UH ETQP3W2R2WFN Panasonic 15.5mohm Isat =10Arms 68.2R210.20Y
O/P cap: 390U 2.5V MP2VU390MC5R7 10mOhm 3.87Arms MATSUKI/79.3971V.30L
1
H/S: FDMC8884/ 22mohm/30mOhm@4.5Vgs/ 84.08884.A37 PR4609
L/S: FDMC8884/ 22mohm/30mOhm@4.5Vgs/ 84.08884.A37 11K5R2F-GP
2
Vout=0.704V*(R1+R2)/R2
DCBATOUT PWR_DCBATOUT_1D2V PWR_DCBATOUT_1D2V
PG4617
2 1
3D3V_S5
Do Not Stuff
PG4622
1
10KR2J-3-GP
SCD1U50V3KX-GP
2 1
1
PC4604
Do Not Stuff
PC4613
SC10U25V5KX-GP
PC4614
PR4614 1D2V_PWR 1D2V_S0
5
6
7
8
Do Not Stuff DY
D
D
D
D
2 PG4620 PG4619 2
2
2 1 PU4606 Design Current =4.802A 1 2
2
1 PR4611 2 Do Not Stuff 65MOS

27,36 1D2V_S0_PWRGD Do Not Stuff Do Not Stuff 7.2A<OCP<8.64A Do Not Stuff
PG4618
G
S
S
S
1 2
PR4613 PU4605 PC4619
4
3
2
1
1 2 PR4616 SCD1U25V3KX-GP Do Not Stuff
PWR_1D2V_PWRGD 1 11 2D2R3J-2-GP PG4615
118KR2F-1-GP PGOOD GND PL4602 1D2V_PWR
PWR_1D2V_TRIP 2 10 PWR_1D2V_BOOT 1 2PWR_1D2V_BOOT_R2 1 1 2
PD4602 PWR_1D2V_EN TRIP VBST PWR_1D2V_UGATE
K A 3 9
SDMK0340L-7-F-GP PWR_1D2V_FB EN DRVH PWR_1D2V_PHASE Do Not Stuff
0715 4
VFB SW
8 1 2
1
PWR_1D2V_CCM 5 7 5V_S5 PG4613
PR4618 1 RF V5IN PWR_1D2V_LGATE PR4617
18,27,36,44,75 PM_SLP_S3# 2
DRVL
6 0728 DY Do Not Stuff 1 2
1
COIL-2D2UH-27-GP
Do Not Stuff
SCD1U10V2KX-4GP
100KR2J-1-GP PC4620
1
PC4612 Do Not Stuff
2
2
PC4615 PR4615 TPS51218DSCR-GP-U1 SC1U10V2KX-1GP PTC4602 PG4614
151218_SW_GND_VTT_1V
2
2
5
6
7
8
PG4621
470KR2F-GP SE390U2D5VM-7GP 1 2
2
D
D
D
D
SCD1U16V2KX-3GP
1
PU4604 Do Not Stuff
1
Do Not Stuff 65MOS PG4616
1 2
G
S
S
S
Do Not Stuff
Do Not Stuff
PWR_1D2V_PWR PG4612
4
3
2
1
1 2
PC4611 Do Not Stuff
1
DY
1
PR4612
2
DY PC4617
6K49R2F-1-GP
Do Not Stuff
2
2
PWR_1D2V_FB
1 PR4610 1
1
9K1R2F-1-GP
2
I/P cap: 4.7U 25V K0805 X5R/ 78.47522.51L
Inductor: 2.2UH ETQP3W2R2WFN Panasonic 15.5mohm Isat =10Arms 68.2R210.20Y Wistron Corporation
O/P cap: 390U 2.5V MP2VU390MC5R7 10mOhm 3.87Arms MATSUKI/79.3971V.30L 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
H/S: FDMC8884/ 22mohm/30mOhm@4.5Vgs/ 84.08884.A37 Taipei Hsien 221, Taiwan, R.O.C.
L/S: FDMC8884/ 22mohm/30mOhm@4.5Vgs/ 84.08884.A37 Vout=0.704V*(R1+R2)/R2 Title
VDDR & VDDP

A2
A B C D E
5 4 3 2 1
D D
C C
B B
A A
Wistron Corporation
Title
Reserved
A2
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_2p5v VGA 1V

D D
G9661 for 2D5V_S0

3D3V_S5 PW R_DCBATOUT_2D5V
5V_S5 PG4807
2 1
Do Not Stuff
PG4806
PW R_DCBATOUT_2D5V
2 1
1
PC4816 Do Not Stuff
SC1U10V2KX-1GP
2
SC10U6D3V5MX-3GP
PC4818
C C
1
Design Current =0.525A
2
G9661-25ADJF11U-GP
Rename Net For Sequence 2D5V_PW R 2D5V_S0
5 PG4805
NC#5
SC22U6D3V5MX-2GP
1.2mA 4 6 1 2
VPP VO
Do Not Stuff
Do Not Stuff
3 7 PW R_2D5V_FB
VIN ADJ
1
PC4808
3D3V_S0 1 PR4812 2 PW R_2D5V_EN 2 VEN GND 8 PC4811 PC4812 Do Not Stuff
1
Do Not Stuff 1 9 PG4808
DY
16K9R2F-GP
POK GND
PR4819
DY 1 2
2
1
Do Not Stuff
PC4820
DY
2
Do Not Stuff
PU4801
PWR_2D5V_POK
3D3V_S0
2
2
1
PR4814
100KR2J-1-GP
B B
Vo=0.8*(1+(R1/R2))
2
7K68R2F-GP
1 PR4817 2 Vout=0.8V*(R1+R2)/R2
PR4818
36 PW R_2D5V_PGOOD
Do Not Stuff
2
Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, A
Title
2D5V_S0
A4
5 4 3 2 1
5 4 3 2 1
SSID = VIDEO
0909 X01 Modify:

Change LCD1 to 20.F1816.030 for 30pin 0914 Modify:
Re-assign LCD1 pin define base on Roy updated Change PU From Page 82 To Page 49
cable pin define list.
0921Modify:
3D3V_S0_TRAVIS
SSID = VIDEO
Change BLON_OUT_C to pin 15 and pin 4
2
1
to NC on LCD1.
LCD POWER for ROSA
SRN2K2J-1-GP
D LVDS CONNECTOR RN4902 D
LCD1 DCBATOUT_LCD
3
4
31
NP1 9 LVDS_DDC_CLK_R
1 9 LVDS_DDC_DATA_R
2 0902 X01 Modify:
3 Add 2nd source 74.09724.09F on
4 U4901 sync with Annie.
5 LCD_BRIGHTNESS R4902 2 1 33R2J-2-GP L_BKLT_CTRL 9 LCDVDD 3D3V_S0
6 3D3V_CAMERA_S0 BAT54CPT-GP
7 USB_CAMERA# 2 DY 1
USB_CAMERA USB_PN7 18
8 2 R4908 1Do Not Stuff USB_PP7 18 9 LVDS_VDD_EN 1 U4901
9 R4909 Do Not Stuff Layout 40 mil
10 DY 3 LCDVDD_EN 1 5
EN IN#5
11 2
AUD_DMIC_CLK 29 GND
12 27 LCD_TST_EN 2 3 4
1
AUD_DMIC_IN0 29 LVDSA_CLK_R OUT IN#4
13
49K9R2F-L-GP
1
LVDSA_CLK#_R
R4905
14 D4901 C4907
SC4D7U6D3V3KX-GP
15 BLON_OUT_C C4908 G5285T11U-GP
SC4D7U6D3V3KX-GP
16 LVDSA_DATA2_R 83.R2003.E81 DY
2
Do Not Stuff
17 LVDSA_DATA2#_R 2ND = 83.00054.Q81 74.05285.07F
2
EC4907
18
19 LVDSA_DATA1_R 2nd = 74.09724.09F
20 LVDSA_DATA1#_R
21
22 LVDSA_DATA0_R
23 LVDSA_DATA0#_R
24 LVDS_DDC_DATA_R 9
25 LVDS_DDC_CLK_R 9 1 R4907 2
26 LCD_TST_C 1 TP4904 100KR2J-1-GP
27 3D3V_S0 Do Not Stuff RN4901
28 BLON_OUT_C 1 4 BLON_OUT 27
29 LCDVDD LCD_TST_C 2 3 LCD_TST 27
30
Do Not Stuff
C4901
NP2
1
32 C4902 SRN100J-3-GP 1123 Modify:

PS-CON30-GP DY SC1U6D3V2KX-GP
Change RN4901 to 100ohm 4p from 8p
2
for improve layout place.

20.F1816.030
2nd = 20.F1860.030
USB_CAMERA#
18 USB_PN7
USB_CAMERA
C
TOUCH PANEL C
2
CLOSED TO LVDS CONN LCD1

TPNL1
5 TPNL_5V 5V_S0
TR4902 R4904
FILTER-130-GP 1 1
TPNL 2
TPNL
1
USB_PN5_C
C4910
2 Do Not Stuff
TPNL TPNL
Do Not Stuff
USB_PP5_C
3
DY
Do Not Stuff
4
1
2
Do Not Stuff
EC4908
C4911
6
18 USB_PP7
Do Not Stuff
DCBATOUT_LCD DCBATOUT Do Not Stuff

2nd = 20.F1561.004
F4901 3rd = 20.F1686.004
2 1
1
EC4906
Do Not Stuff
1
POLYSW-1D1A24V-GP-U
DY
Do Not Stuff
C4904
C4905
69.50007.A31 DY
SC1KP50V2KX-1GP
SCD1U50V3KX-GP
2
EC4909
0909 Modify: TPNL

2
R4911
2nd = 69.50007.A41 Add TPNL1 for touch panel solution 4pin connector.
1 2 USB_PP5_C
18 USB_PP5
0928 Modify:
For EMI request Do Not Stuff
Close to LVDS connector Change To 20.F1621.004 on TPNL1 from updated
4
connector list.
LCD_BRIGHTNESS
LCD_TST_C
DY
TR4901
Do Not Stuff
Camera Power
3
1
3D3V_S0 3D3V_CAMERA_S0 EC4901 EC4902
F4902 2 1 0R3J-0-U-GP
DY TPNL
1 2 USB_PN5_C
2
18 USB_PN5
DY
Do Not Stuff
Do Not Stuff
R4912 Do Not Stuff

1
EC4903
C4903
DY
Do Not Stuff
SC10U6D3V5KX-1GP
2
B B
LVDSA_CLK_R 1 R4913 2 Do Not Stuff LVDSA_DATA2_R 1 R4917 2 Do Not Stuff

LVDSA_CLK 9 LVDSA_DATA2 9
1
DY DY
TR4903 TR4905
2

R4914 R4918
LVDSA_CLK#_R 1 2 LVDSA_DATA2#_R 1 2
LVDSA_CLK# 9 LVDSA_DATA2# 9
LVDSA_DATA1_R 1 R4915 2 Do Not Stuff LVDSA_DATA0_R 1 R4919 2 Do Not Stuff

LVDSA_DATA1 9 LVDSA_DATA0 9
A A
1
DY DY
TR4904 TR4906
Wistron Corporation
2

R4916 R4920 Title
LVDSA_DATA1#_R 1 2 LVDSA_DATA0#_R 1 2
LVDSA_DATA1# 9 LVDSA_DATA0# 9
LCD/Inverter Connector
Custom
Date: Thursday, April 21, 2011 Sheet 49 of 104
5 4 3 2 1
5 4 3 2 1
Remove For M12 Spec & Put In Daughter BD
D D
C C
B B
A Wistron Corporation A
Title
CRT Board Connector

Custom
5 4 3 2 1
5 4 3 2 1
HDMI Level Shifter & CONNECTOR 0913: Modify R5130 R5132
Change HDMI1 Part Number From 22.10296.311 To 22.10296.331 0719: Reserve For EMI 1
Do Not Stuff
2 1
Do Not Stuff
2
HDMI_DATA2_Q HDMI_DATA2_R_C HDMI_DATA1_Q HDMI_DATA1_R_C

HDMI CONN
3
1
HDMI1 0719: Modify Netname
1
22 R5142
20 R5140 90D9R2F-1-GP
1 HDMI_DATA2_Q 90D9R2F-1-GP
DY DY
2
2 Do Not Stuff Do Not Stuff
2
3 HDMI_DATA2_Q# TR5101 TR5102
D 4 HDMI_DATA1_Q D
4
5
6 HDMI_DATA1_Q# HDMI_DATA2_Q# HDMI_DATA2_R_C# HDMI_DATA1_Q# HDMI_DATA1_R_C#
7 HDMI_DATA0_Q
8 R5131 R5133
9 HDMI_DATA0_Q# 1 2 1 2
10 HDMI_CLK_Q Do Not Stuff Do Not Stuff
11
12 HDMI_CLK_Q#
13
14 5V_CRT_S0_R
15 DDC_CLK_HDMI R5134 R5136
16 DDC_DATA_HDMI 1 2 1 2
17 Do Not Stuff Do Not Stuff
18
HDMI_DATA0_Q HDMI_DATA0_R_C HDMI_CLK_Q HDMI_CLK_R_C
Close to HDMI Connector 19
21
1
23 C5102 1104 Modify: Change To Power Net
3
UMA_PX C5111 1 2 SCD1U16V2KX-3GP HDMI_CLK_R_C#
SCD1U10V2KX-5GP
4 APU_HDMI_CLK# C5112 1
5V_HDMI
UMA_PX 2 SCD1U16V2KX-3GP HDMI_CLK_R_C
1
4 APU_HDMI_CLK SKT-HDMI23-2-GP-U1 0112 Modify: Combine with CRT Fuse and Diode with HDMI
UMA_PX C5113 1 2 SCD1U16V2KX-3GP HDMI_DATA0_R_C# R5141 R5143
4 APU_HDMI_DATA0#
UMA_PX C5114 1 2 SCD1U16V2KX-3GP HDMI_DATA0_R_C 22.10296.331 90D9R2F-1-GP 90D9R2F-1-GP
4 APU_HDMI_DATA0
0426 chaomin DY DY
C5115 1 2 SCD1U16V2KX-3GP HDMI_DATA1_R_C# Do Not Stuff Do Not Stuff
UMA_PX
2
4 APU_HDMI_DATA1# C5116 1 TR5103 TR5104
UMA_PX 2 SCD1U16V2KX-3GP HDMI_DATA1_R_C For HDMI 1.4 Reserve
4 APU_HDMI_DATA1
4
UMA_PX C5117 1 2 SCD1U16V2KX-3GP HDMI_DATA2_R_C#
4 APU_HDMI_DATA2# C5118 1 3D3V_VGA_S0 1D5V_S3
UMA_PX 2 SCD1U16V2KX-3GP HDMI_DATA2_R_C HDMI_DATA0_Q# HDMI_DATA0_R_C# HDMI_CLK_Q# HDMI_CLK_R_C#
4 APU_HDMI_DATA2
R5135 R5137
1 2 1 2
0719: Remove RN Resistor Do Not Stuff Do Not Stuff
2
HPD_HDMI_CON
R5126
HDMI1.4 R5127
UMA_PX
1
HDMI_HPD_PWR
C
Q5102 C
C
MMBT3904-4-GP
1 2HDMI_HPD_B B Do Not Stuff AFTP5101 1 DDC_DATA_HDMI
R5111 150KR2J-L1-GP For HDMI 1.4 Reserve
84.T3904.C11
E
2ND = 84.03904.P11 Do Not Stuff
HDMI1.4 0921:Modify
HDMI_DET 2 R5129 1 HDMI_HPD_DET 85 Add AFTP, Follow DQ15 Intel
3rd = 84.03904.L06
R5128
1 2 DP2_HPD 6
Do Not Stuff
For HDMI 1.4 Reserve Impedance:100 ohm
1
UMA_PX
1
R5112
R5110 10KR2J-3-GP
100KR2J-1-GP
Place Near HDMI CONN 0719: Remove RN Resistor
2
2
HDMI_CLK# C5103 1HDMI1.4
2 Do Not Stuff HDMI_CLK_R_C#
85 HDMI_CLK# HDMI_CLK C5104 Do Not Stuff HDMI_CLK_R_C
1HDMI1.4
2
85 HDMI_CLK DP2_HPD DP2_HPD
HDMI_DATA0# C5105 1HDMI1.4
2 Do Not Stuff HDMI_DATA0_R_C#
85 HDMI_DATA0# HDMI_DATA0 C5106 Do Not Stuff HDMI_DATA0_R_C
1HDMI1.4
2
85 HDMI_DATA0
1
R5138 R5139
2 Do Not Stuff HDMI_DATA1_R_C# Do Not Stuff Do Not Stuff
1HDMI1.4
2 DY DY
85 HDMI_DATA1
2
2 Do Not Stuff HDMI_DATA2_R_C#
1HDMI1.4
2
DATA_HDMI_B
85 HDMI_DATA2
confrim by NXP FAE
CLK_HDMI_B
Do not need PU Res,
604R2F-2-GP
604R2F-2-GP
604R2F-2-GP
604R2F-2-GP
604R2F-2-GP
604R2F-2-GP
604R2F-2-GP
604R2F-2-GP
Reserve PU Res for debug furtur

1

2ND = 84.03904.P11 2ND = 84.03904.P11
1
1D5V_S3 5V_S0 1D5V_S3
2
B PCH_HDMI_CLK_R DDC_CLK_HDMI PCH_HDMI_DATA_R DDC_DATA_HDMI B

2 DY Q5105
3 2 DY Q5106
3
R5114
R5115
R5116
R5117
R5118
R5119
R5120
R5121

HDMI_PLL_GND
4
3
RN5113
1213 Modify: Checklist Suggestion To Change To 604 Ohm DY
Do Not Stuff
U5103
D
Q5103 1
1
2
VCC_A
2N7002K-2-GP 8
VCC_B
84.2N702.J31 DDC_DATA_HDMI
6 PCH_HDMI_DATA_R 2 UMA_PX
A1 B1
7
2ND = 84.2N702.031 6 PCH_HDMI_CLK_R 3
A2 B2
6 DDC_CLK_HDMI
5V_S0 DP2_HPD 1 R5123 2 HPD_HDMI_CON_EN 5 4

G
10KR2J-3-GP EN GND
UMA_PX PCA9509DP-GP
1
R5113 71.09509.A0W
Do Not Stuff
DY
2
5V_S0
3
4
RN5101
SRN2K2J-1-GP
2
1
DDC_DATA_HDMI
A DDC_CLK_HDMI A

Do Not Stuff
1 4
85 GPU_DDC_DATA_HDMI
85 GPU_DDC_CLK_HDMI
2
HDMI1.43 Wistron Corporation
RN5106
Title
HDMI Level Shifter/Connector

A2
5 4 3 2 1
5 4 3 2 1
Remove EDP
D D
C C
LCD POWER CIRCUIT

Rosa team
Remove EDP Remove EDP
B B
A A
Wistron Corporation
Title
eDP
Custom
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
SSID = User.Interface
D D
C C
ITP Connector
H_CPURST# use pull-up Resistor close
ITP connector 500 mil ( max ),
others place near CPU side.
B B
CPU ITP Connector

TCK(PIN 5)
TCK(PIN AC5)
FBO(PIN 11)
Wistron Corporation
Title

ITP Rev
A3
5 4 3 2 1
5 4 3 2 1
SSID = SATA HDD1
23
NP1
SATA HDD Connector 19 SATA_TXP0

19 SATA_TXN0
2
3
1
4
19 SATA_RXN0_C C5602 1 2 SCD01U16V2KX-3GP SATA_RXN0 5
19 SATA_RXP0_C C5603 1 2 SCD01U16V2KX-3GP SATA_RXP0 6
D 7 D
3D3V_S0 8
9
10
C5604 C5601 11
12
1
Do Not Stuff
Do Not Stuff
13
DY DY 5V_S0 14
15
2
16
C5605 C5606 17
18
SC10U10V5KX-2GP
SCD1U10V2KX-5GP
79 FFS_INT2
19
Do Not Stuff TP5601 1HDD1_20 20
1
NP2
2
24
TYCO-CON22-1-GP-U2
20.F1011.022
1122 Modify:
Change From Y5V To X5R
0614 Modify:
Change HDD1 connector part number to
20.F1011.022 base on ME EMN and DXF.
C C
When the drive is powered on, the FET to the MD/DA pin drive is OFF.
When the drive is powered off, the FET to the MD/DA pin is ON
ODD Connector SATA_RX- and SATA_RX+ Trace
Length match within 20 mil
3D3V_S0
SUPPORT ZERO SATA ODD integrated PU

ODD1 19 SATA_ODD_PWRGT
1
8
NP1 R5611
S1 Following AMD routing table DY Do Not Stuff
UP7534PRA8-15-GP
S2 5V_S0
SATA_TXP1 19
2
S3 SATA_TXN1 19 4 5
EN OC# ODD_PWR_5V
S4 3 6 100 mil
SATA_RX1-_C C5607 1 VIN VOUT#6
S5 2SCD01U16V2KX-3GP SATA_RXN1_C 19 2 7
SATA_RX1+_C C5608 1 VIN VOUT#7
S6 2SCD01U16V2KX-3GP SATA_RXP1_C 19 TC5604 1 8
1
GND VOUT#8 TC5603
S7
1
SC10U10V5KX-2GP
P1 U5601
SC10U10V5KX-2GP
SATA_ODD_PRSNT# 18
2
P2 ODD_PWR_5V 1 DY 2 R5603 Part Number = 74.07534.D79
5V_S0
2
P3 Do Not Stuff
B SATA_ODD_DA#_C B
P4 2nd = 74.00547.G79
P5
1
P6
NP2 R5604
Do Not Stuff 1122 Modify:
9 DY 0719: Modify Zero ODD Circuit ƵƌƌĞŶƚůŝŵŝƚ
Change From Y5V To X5R 1122 Modify:
SKT-SATA7P-6P-40-GP-U
ĐƚŝǀĞ,ŝŐŚ Change From Y5V To X5R
2
62.10065.E01 3D3V_S0 3D3V_S0

1
ƚǇƉсхϮ͘ϱ
2
0914 Modify: R5606 R5610 0109: EMI Request.
10KR2J-3-GP
Change ODD Part number From 22.10300.421 To 62.10065.E01 DY Do Not Stuff
R5607 ODD_PWR_5V
2
1
SATA_ODD_DA#_C 2 DY 1 SATA_ODD_DA#
Do Not Stuff
ODD_PWRGT#
Do Not Stuff
2
EC5601
G
D
Q5602 Q5601
DY
1
2N7002K-2-GP 2N7002K-2-GP
84.2N702.J31
84.2N702.J31
S
2 R5605
DY
1 SATA_ODD_DA# 17
Wistron Corporation
Do Not Stuff 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SATA_ODD_PWRGT SATA_ODD_DA#_Q 1 R5609 2 ODD_DA_Q 18 Taipei Hsien 221, Taiwan, R.O.C.
Do Not Stuff
Title
0712
HDD/ODD Rev
A3
5 4 3 2 1
5 4 3 2 1
USB30_VCCA
at least 80 mil
1
0706: Sourcer Request To Change To GMT
1
R5705 C5703 C5704 0906: Add 0hm in USB_PWR_EN# and Remove CEN#/
DY DY TC5702
Consult SW Use Which Enable.
Do Not Stuff
ST100U6D3VAM-3-GP
SCD1U10V2KX-4GP
2
2
Do Not Stuff
80.10715.B1L 0906: Change TC5702 Part Number,
2
5V_S5 U5703
Follow DQ15 Intel
2nd = xxx
1
GND FLG1
8
USB_OC#0 18 0113: Change To Duel USB PWR Switch & Some Cap.
2 7
IN OUT1
1 R5720 2 U5703_EN# 3 6
27 USB_PWR_EN# Do Not Stuff EN1# OUT2
4 5
27,82 USB_IO_CRT_EN# EN2# FLG2
1
1
C5702 C5711 USB30_VCCB
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
AP2182SG-13-GP
D
74.02182.071 D
2
2nd = 74.00546.A7D
3rd = 74.02062.079 USB_OC#1 18 C5709
SCD1U10V2KX-4GP
1
1
C5710
SC10U10V5KX-2GP
2
0101: Change ESATA1 To 22.10290.271
C C
Wait For 3.0 Esata COMBO With DETECT PIN

1 R5701 2
Do Not Stuff USB30_VCCA
USB_PP0_U
DY USB_PP0_C ESATA1
1
C5705 USB30_VCCA 1 12
VBUS DT1
2
13
2
Do Not Stuff
D5706 DT2 USBDET_CON# 27

DY SATA_TXP2
1 4 19 SATA_TXP2 6 4
SATA_TXN2 A+ GND
19 SATA_TXN2 7 5
A- GND
8
C5707 1 SCD01U16V2KX-3GP SATA_RXP2 GND
FILTER-130-GP DY 19 SATA_RXP2_C
C5708 1
2
SCD01U16V2KX-3GP SATA_RXN2
10
B+ GND
11
19 SATA_RXN2_C 2 9 14
TR5701 B- GND
15
USB_PP0_C GND
3 16
1
USB_PP0_C USB_PN0_C USB_PN0_C D+ GND

2 3 2 17
USB_PN0_U USB_PN0_C D- GND
1
Do Not Stuff
1 R5702 2 C5706 SKT-ESATA-USB-11P-6-GP 1
Do Not Stuff 22.10321.W11
DY
2
Do Not Stuff
DY 0103 Modify: 2nd = 22.10339.261 AFTP5717

AMD Spec Update To reserve 6.8P Cap If Trace < 10 Inch USB30_VCCA AFTP5716 Do Not Stuff Do Not Stuff
1
0706: Rename Netname

0112: Change To USB 2.0 ESD Diode X 2
0101: Reserve Common Mode Choke & ESD Diode.
B B
USB CHARGER
0906: Modify:
Change U5702 soltuion to PI5USB14550
from MAX14566 U5702
1 11
USB_PP0_U S0 GND CB
2 10 1 R5721 2 USBCHARGER_CB0 27
USB_PN0_U D+ S1 Do Not Stuff
3 9 USB_PP0 18
D- Y+
4 8 USB_PN0 18
GND Y-
5 7 5V_S5
A+ VDD
6
A-
2
PI5USB14550AZEE-GP
SCD1U10V2KX-4GP
C5701
Switch Control Bit:
1
CB=0 (AM):auto detection charger identification active.

A
CB=1 (PM):connect DP/DM to TDP/TDM. A
S0 S1
0 0 Auto DQ15 AMD DIS SAMSUNG TI
0 1
1 0
1 1 D+/- connects to Y+/- Wistron Corporation
0914: Remove Non Charger Co-lay Resistor.
Title
ESATA/USB Charger
A2
5 4 3 2 1
5 4 3 2 1
SSID = AUDIO
0715 Modify:
Change EC5801~EC5804 to 100p 0402
and default un-stuff.
Add R5801~R5804 between SPK signal and connector
D for EMC NEO suggest. D
0914 Modify:
Change SPK1 to 20.F0772.004 from
20.F1647.004 from Double updated.
0921 Modify:
Modify Pin Define Base On DQ15 Intel
1110 X02 Modify:

Add 2nd 20.F1804.004 on SPK1 from
ME updated connector list.
6SHDNHU&RQQHFWRU
ACES-CON4-7-GP-U
6
C R5801 1 2 Do Not Stuff AUD_SPK_L-_C 4 C
29 AUD_SPK_L- R5802 1 AUD_SPK_L+_C
2 Do Not Stuff 3
29 AUD_SPK_L+ R5803 1 AUD_SPK_R-_C
2 Do Not Stuff 2
29 AUD_SPK_R-
R5804 1 2 Do Not Stuff AUD_SPK_R+_C 1
29 AUD_SPK_R+
5
SPK1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
20.F0772.004
1
1
EC5801
EC5802
EC5803
EC5804
2nd = 20.F1804.004
DY 2
DY DY DY
2
Do Not Stuff AFTP5801 1 AUD_SPK_L-_C
Do Not Stuff AFTP5802 1 AUD_SPK_L+_C 0921:Modify
Do Not Stuff AFTP5803 1 AUD_SPK_R-_C
AUD_SPK_R+_C
Do Not Stuff AFTP5804 1
B B
Wistron Corporation
Title
Audio Jack
A3
5 4 3 2 1
LAN CONN In Daugthter BD
Wistron Corporation
Title
LAN_CONN
A3
5 4 3 2 1
SSID = Flash.ROM
SPI FLASH ROM (2M byte) for KBC 0111: Follow DV14 To Change Power rail to 3D3V_AUX_KBC 3D3V_S5 3D3V_AUX_KBC
3D3V_S5 3D3V_AUX_KBC
2
R6005 R6007
2
R6008 R6009
DY Do Not Stuff Do Not Stuff
D DY Do Not Stuff Do Not Stuff D
1
SPI_VCC
Reserved 795 use LPC ROM or 791 LPC ROM used
1
1
SPI_POWR C6002
DY C6001
2
Do Not Stuff
1
3
4
0111: Follow DV14 To Change Power rail to 3D3V_AUX_KBC
SCD1U10V2KX-5GP
RN6002
R6002
DY SRN100KJ-6-GP
Do Not Stuff
2
2
1
SPI_HOLD_0#
U6001
1 8 SPI_VCC
27 SPI_CS0#_R CS# VCC
1 R6003 2 33R2J-2-GP SPI_SO 2 7
27 SPI_SO_R SO/SIO1 HOLD#
2 R6004 1 SPI_WP# 3 6
27 EC_SPI_WP# WP# SCLK SPI_CLK_R 27
4 5 SPI_SI_R 27
Do Not Stuff GND SI/SIO0
1
MX25L1606EM2I-12G-GP
R6001 72.25160.B01 EC6003 DY DY EC6001
10KR2J-3-GP
2ND = 72.25Q16.001
Do Not Stuff
Do Not Stuff
C C
3RD = 72.25016.D01
1
4TH = 72.02516.A01
SSID = RBATT
RTC_AUX_S5 3D3V_AUX_S5
U6003
2
+RTC_VCC
3 X01 RTC1
1 RTC_PWR 1 R6006 2 1
2
510R2J-1-GP PWR
2
C6005 GND
CH715FPT-GP NP1
SC1U6D3V2KX-GP NP1
NP2
1
B NP2 BAT-330DG02PSS0301CE-GP-U B
83.R0304.B81 1
2nd = 83.00040.E81 AFTP6002
Width=20mils 62.70001.051
2nd = 62.70014.001
3rd = 62.70001.061
3D3V_S0
2
R6032
Q6002 DY Do Not Stuff
G
1
D
1
RTC_SENSE 17
1 +RTC_VCC R6011 S
AFTP6001 10MR2J-L-GP
2N7002K-2-GP
2
84.2N702.J31
0105 Modify:
updated RTC1 symbol and footprint from Wistron Corporation
data base. 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1122 Modify: Taipei Hsien 221, Taiwan, R.O.C.
Add Q6002, R6010, R6011 for FACTORY RTC detect function. Title
0111: Change RTC Schematic As DV14 Brazo, SW Suggest.
Flash/RTC Rev
A3
5 4 3 2 1
5 4 3 2 1
SSID = USB
D D
C C
B B
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Title
USB Power SW
5 4 3 2 1
5 4 3 2 1
1222 Modify: 0916: Move From IO Board To Main Board

C6222,C6224, C6231, C6234 Change Y5V To X7R
Place near Pin 13 Place near Pin 1

as closed as possible 3D3V_S5 as closed as possible
2
C6220 C6221 C6222 C6223 C6219 C6224
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2
1
0310: Modify Strap Pin To Improve Re-driver Strength
D D
3D3V_S5
All pin have a default
setting of NC U6215
1 23 USB_SS_TXDN2_C C6225 1 2 SCD1U16V2KX-3GP USB30_TXDN2_R 82

R6225 1PARAD EQ1_A 3D3V_S5 VCC TX1- USB_SS_TXDP2_C C6226 1
2 EN_RXD default value PU 3.3V 13 OutTX1+ 22 2 SCD1U16V2KX-3GP USB30_TXDP2_R 82 To Connector
Do Not Stuff VCC
2 R6226 1PARAD EQ2_A (internally pulled high) 11 USB_SS_RXDN2_C C6227 1 2 SCD1U16V2KX-3GP USB30_RXDN2 18
Do Not Stuff EQ1_A TX2- USB_SS_RXDP2_C C6228 1
2 OutTX2+ 12 2 SCD1U16V2KX-3GP USB30_RXDP2 18 To FCH
R6227 1PARAD OS1_A R6228 1DY EN_RXD_A EQ2_A EQ1
2 2 17
Do Not Stuff Do Not Stuff EQ2
2 R6230 1DY OS2_A 2 R6231 1DY CM_A OS1_A 4 8
Do Not Stuff Do Not Stuff OS2_A 15
OS1
In
RX1-
9
USB30_TXDN2 18 From FCH
R6232 1DY DE1_A OS2 RX1+ USB30_TXDP2 18
2 CM default value PD GND
Do Not Stuff DE1_A 3 20
2 R6234 1DY DE2_A (internally pulled down) DE2_A 16
DE1
In
RX2-
19
USB30_RXDN2_R 82
Do Not Stuff DE2 RX2+ USB30_RXDP2_R 82 From Connector
2 R6235 1 DY EN_RXD_A
Do Not Stuff EN_RXD_A 5
R6236 1 EQ1_A R6237 1 EN_RXD
2
4K7R2J-2-GP
TI 2
Do Not Stuff
DY CM_A CM_A 14
CM GND
6 TX Cap Near FCH, RX Cap Near Connector
10
R6238 1 EQ2_A GND
2
4K7R2J-2-GP
TI GND
18
1 R6211 2 PARAD_REXT_P2 7 21
R6239 1 NC#7 GND
2
Do Not Stuff
DY OS1_A Do Not Stuff 24
NC#24 GND
25
R6240 1
PARAD
2
Do Not Stuff
DY OS2_A SN65LVPE502CPRGER-GP
2 R6241 1 DY DE1_A
Do Not Stuff
2 R6242 1 DY DE2_A
Do Not Stuff
DUMMY NAME CONFIGURATION

TI = TI 502R Need Pop
PARAD_ALL = For Both PARAD I2C Mode & Normal MODE
PARAD_I2C = Parad I2C Mode
TI_PARAD= Both TI & PARAD Normal Mode
Pin5 EN_RX_A = Parade = DUMMY

Pin14 CM_A = Parade = Default DUMMY (PU)
Pin2 EQ1 = Parad B_EQ0 = Default DUMMY (PU)
Pin17 EQ2 = Parad A_EQ0 = Default DUMMY (PU) Parad I2C Mode:
Pin4 OS1 = Parad B_EQ1 = Default DUMMY (PU) PIN3 DE1 = Parad I2C_ADDR0 = Default DUMMY (PU)
Pin15 OS2 = Parad A_EQ1 = Default DUMMY (PU) PIN4 OS1 = Parad I2C_ADDR1 = Default DUMMY (PU)
Pin3 DE1 = Parad B_DE0 = Default Pull High Parad I2C Mode:
PIN16 DE2 = Parad A_DE0 = Default Pull High PIN15 OS2 = Parad I2C = SDA_CTL (DATA)
GND6 = Parad B_DE1 = Default Pull High PIN16 DE = Parad I2C = SCL_CTL (CLK)
GND18= Parad A_DE1 = Default Pull High
C C

0310: Modify Strap Pin To Improve Re-driver Strength

1
C6229 C6230 C6231 C6232 C6233 C6234

SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
3D3V_S5
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2
setting of NC
2 R6250 1PARAD EQ1_B

Do Not Stuff
2 R6251 1PARAD EQ2_B
Do Not Stuff
2 R6252 1PARAD OS1_B U6216
Do Not Stuff EN_RXD default value PU 3.3V
2 R6255 1DY OS2_B 1 23 USB_SS_TXDN3_C C6235 1 2 SCD1U16V2KX-3GP
Do Not Stuff 3D3V_S5 (internally pulled high) 13
VCC
OutTX1+
TX1-
22 USB_SS_TXDP3_C C6236 1 2 SCD1U16V2KX-3GP
USB30_TXDN3_R
USB30_TXDP3_R
82
82
To Connector
R6257 1DY DE1_B VCC
2
Do Not Stuff 11 USB_SS_RXDN3_C C6237 1 2 SCD1U16V2KX-3GP
2 R6258 1DY DE2_B EQ1_B 2 OutTX2+
TX2-
12 USB_SS_RXDP3_C C6238 1 2 SCD1U16V2KX-3GP
USB30_RXDN3
USB30_RXDP3
18
18
To FCH
Do Not Stuff R6253 1DY EN_RXD_B EQ2_B EQ1
2 17
Do Not Stuff EQ2
2 R6256 1DY CM_B OS1_B 4 8
From FCH
R6260 1 EQ1_B Do Not Stuff OS2_B OS1 RX1- USB30_TXDN3 18
2
4K7R2J-2-GP
TI 15
OS2 In RX1+
9
USB30_TXDP3 18
CM default value PD GND
2 R6262 1 TI EQ2_B DE1_B 3 20
4K7R2J-2-GP (internally pulled down) DE2_B 16
DE1
In
RX2-
19
USB30_RXDN3_R 82 From Connector
R6263 1 OS1_B DE2 RX2+ USB30_RXDP3_R 82
2
Do Not Stuff
DY R6259 1
R6264 1 OS2_B
2
Do Not Stuff
DY EN_RXD_B EN_RXD_B
2
Do Not Stuff
DY R6261 1
5
EN_RXD TX Cap Near FCH, RX Cap Near Connector
R6266 1 DE1_B
2
Do Not Stuff
DY CM_B CM_B 14
CM GND
6
2
Do Not Stuff
DY GND
10
18
R6267 1 DE2_B GND
2 DY 1 R6212 2 PARAD_REXT_P3 7 21
Do Not Stuff Do Not Stuff NC#7 GND
24 25
NC#24 GND
PARAD
SN65LVPE502CPRGER-GP
B B
DUMMY NAME CONFIGURATION

TI = TI 502R Need Pop
PARAD_ALL = For Both PARAD I2C Mode & Normal MODE
PARAD_I2C = Parad I2C Mode
TI_PARAD= Both TI & PARAD Normal Mode
Pin5 EN_RX_A = Parade = DUMMY

Pin14 CM_A = Parade = Default DUMMY (PU) Parad I2C Mode:
Pin2 EQ1 = Parad B_EQ0 = Default DUMMY (PU) PIN15 OS2 = Parad I2C = SDA_CTL (DATA)
Pin17 EQ2 = Parad A_EQ0 = Default DUMMY (PU) PIN16 DE = Parad I2C = SCL_CTL (CLK)
Pin4 OS1 = Parad B_EQ1 = Default DUMMY (PU)
Pin15 OS2 = Parad A_EQ1 = Default DUMMY (PU) Parad I2C Mode:
Pin3 DE1 = Parad B_DE0 = Default Pull High PIN3 DE1 = Parad I2C_ADDR0 = Default DUMMY (PU)
PIN16 DE2 = Parad A_DE0 = Default Pull High PIN4 OS1 = Parad I2C_ADDR1 = Default DUMMY (PU)
GND6 = Parad B_DE1 = Default Pull High
GND18= Parad A_DE1 = Default Pull High
0113: CRT BD Redriver

CRT BD USB 3.0 Redriver

1
C6244 C6245 C6247 C6246 C6243 C6248 18 USB30_TXDN1 1 R6249 2 Do Not Stuff USB30_TXDN1_R 82
18 USB30_TXDP1 1 R6271 2 Do Not Stuff USB30_TXDP1_R 82
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DY DY DY
2
DY DY DY
18 USB30_RXDN1 1 R6272 2 Do Not Stuff
USB30_RXDN1_R 82
18 USB30_RXDP1 1 R6273 2 Do Not Stuff
USB30_RXDP1_R 82
3D3V_S5
setting of NC U6217
DY R6285
DY
EN_RXD default value PU 3.3V 1 23 USB_SS_TXDN1_C C6242 1 2 Do Not Stuff USB30_TXDN1_X 1 2 Do Not Stuff
2 R6254 1DY EQ1_C 3D3V_S5 13
VCC TX1-
OutTX1+ 22 USB_SS_TXDP1_C C6241 1 DY2 Do Not Stuff USB30_TXDP1_X 1 2 Do Not Stuff
USB30_TXDN1_R
USB30_TXDP1_R
82
82
To Connector
Do Not Stuff (internally pulled high) VCC
DY R6286
DY
2 R6275 1DY EQ2_C 11 USB_SS_RXDN1_C C6240 1 2 Do Not Stuff
Do Not Stuff EQ1_C 2
TX2-
OutTX2+ 12 USB_SS_RXDP1_C C6239 1 DY2 Do Not Stuff
USB30_RXDN1
USB30_RXDP1
18
18
To FCH
R6274 1DY OS1_C R6269 1DY EN_RXD_C EQ2_C EQ1
2 2 17
Do Not Stuff Do Not Stuff EQ2
2 R6276 1DY OS2_C 2 R6270 1DY CM_C OS1_C 4 8
From FCH
Do Not Stuff Do Not Stuff OS2_C OS1 RX1- USB30_TXDN1 18
15
OS2 In RX1+ 9
USB30_TXDP1 18
A 2 R6278 1DY DE1_C DY R6287 A
Do Not Stuff DE1_C 3 20 USB30_RXDN1_X 1 DY 2 Do Not Stuff
2 R6277 1DY DE2_C DE2_C 16
DE1 RX2-
In RX2+ 19 USB30_RXDP1_X 1 DY 2 Do Not Stuff USB30_RXDN1_R 82 From Connector
Do Not Stuff DE2 R6288 USB30_RXDP1_R 82
2 R6268 1 DY EN_RXD_C
Do Not Stuff EN_RXD_C 5
R6279 1 EN_RXD
2
Do Not Stuff
DY EQ1_C 2 R6265 1
Do Not Stuff
DY CM_C CM_C 14
CM GND
6
10
R6282 1 GND
2
Do Not Stuff
DY EQ2_C GND
18
1 R6213 2 PARAD_REXT_P1 7 21
R6280 1 NC#7 GND
2
Do Not Stuff
DY OS1_C Do Not Stuff 24
NC#24 GND
25
R6283 1
DY
2
Do Not Stuff
DY OS2_C Do Not Stuff
2 R6281 1 DY DE1_C
Do Not Stuff
2 R6284 1 DY DE2_C
Do Not Stuff
CM default value PD GND Wistron Corporation

(internally pulled down) Taipei Hsien 221, Taiwan, R.O.C.
Eng stuff 20.K0216.024 Pin1 -> left side Title
PD change to 20.K0276.024 Pin1 -> left side USB 3.0

so do not swap net Size Document Number Rev
Custom
5 4 3 2 1
5 4 3 2 1
D D
R6303
1 DY 2
Do Not Stuff
Q6301
BT_LED G DY Bluetooth Module conn.
D W LAN_W W AN_LED#
BT1
S 15
NP1
AFTP6301 1 BLUETOOTH_DET# 1 2 BT_ACT 3D3V_S0
Do Not Stuff
C C
Do Not Stuff W LAN_ACT 3 DY 4 x01 change tolerant 20091118
AFTP6302 1 BDC_ON 5 6 USB_PP4
2ND = 84.2N702.031 BLUETOOTH_EN 7 8 USB_PN4
AFTP6304 1 BT_LED 9 10
1
AFTP6305 1 BLUETOOTH_GPIO3 11 12 C6301
AFTP6307 1 BLUETOOTH_GPIO5 13 14 Do Not Stuff
NP2
2
16
AFTP6306
DY
1
Do Not Stuff
Do Not Stuff
2nd = 20.F1500.014
68,82 W LAN_W W AN_LED#
18 USB_PP4
USB_PP4
18 USB_PN4
USB_PN4
82 BT_ACT BT_ACT
27,82 BLUETOOTH_EN BLUETOOTH_EN AFTP6309 1 W LAN_ACT
B 82 W LAN_ACT W LAN_ACT AFTP6310 1 BLUETOOTH_EN B
AFTP6308 1 BT_ACT
AFTP6311 1 3D3V_S0
1
AFTP6312 1 USB_PP4
C6302 C6303 AFTP6313 1 USB_PN4
EC6301
2
Do Not Stuff
Do Not Stuff
1
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
DY DY
1
R6301
R6302
DY DY DY
2
2
0103 Modify:
AMD Spec Update To reserve 6.8P Cap If Trace < 10 Inch
0906 Modify:
Dell Peter already confirmed DQ15 and DN15 will not Wistron Corporation
A support Bluetooth BT365, only support combo Wirless+BT. 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, A
Please DUMMY Bluetooth connector(BT1) and stand off Taipei Hsien 221, Taiwan, R.O.C.
(HBT1) and related components. Title
Bluetooth
A4
5 4 3 2 1
5 4 3 2 1
Finger Printer Connector
D D
Finger Printer Connector

FP1
7
1124 X02 Modify: 1
Add EC6402 0.1uF,EC6403 180pF and stuff EC6401
47pF from RF fine tune result. 2
3
3D3V_S0 Biometric_USBPN
C
Biometric_USBPP
4 DN15 C
5
Do Not Stuff
6
EC6401
1
1
Do Not Stuff
Do Not Stuff
8
EC6402
EC6403
DN15 DN15 DN15
2
Do Not Stuff
Do Not Stuff
2nd = 20.K0382.006
R6403 1 DN15 2 Do Not Stuff
18 USB_PN2 Biometric_USBPN
AFTP42 DY 1 3D3V_S0
AFTP43 DY 1 Biometric_USBPN
2
AFTP44 DY 1 Biometric_USBPP
B B
DY
Do Not Stuff
TR6401
1
18 USB_PP2 Biometric_USBPP
R6404 1
DN15
2 Do Not Stuff
A
Title
F/P
A4
5 4 3 2 1
5 4 3 2 1
D D
WLAN CONN In Daugthter BD
C C
B B
A A
Wistron Corporation
Title
WLAN
A3
1 65 of 104
5 4 3 2 1
D D
Remove For DG12 M12 SPEC
C C
B B
Wistron Corporation
Title
WWAN
A3
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
5 4 3 2 1
0928 Modify:
D D
Rename CHARGER_LED1 to CHARGERLED1.
Rename FPOWER_LED1 to FPOWERLED1.
0928 Modify: Rename HDD_LED1 to HDDLED1.
Change R6806,R6808,R6811~R6813,R6801,
R6803,R6815 to 390ohm from 1K to fine tune Rename TP_LOCK_LED1 to TPLOCKLED1.
all of MB LED for 5mA spec. Rename TP_LOCK_LED2 to TPLOCKLED2.
Rename WLAN_LED1 to WLANLED1
FRONT POWER LED NEED confirm with ME actual 0105 Modify:
Change Part Reference FPOWERLED1 To FPLED1
Need change to LOW actived from KBC GPIO FPOWER_LED part number.
Q6801
R2
E
5V_S5
FPLED1 WLAN_LED
3
PWRLED#_C B 0706 Modify:
R1
C LED_PWR 1 2 FPOWER_LED_A 1A K2 WLAN__LED# rename to WLAN_WWAN_LED#. 5V_S0
R6806 390R2J-1-GP 0629 Modify Q6806
1
R2
EC6801 LED-W-27-GP E
PDTA143ET-GP
1 2 POWER_SW_LED_B R6814
1 2 Q6806_B B
DYDo Not Stuff R6808 1KR2J-1-GP 83.01221.R70 63,82 WLAN_WWAN_LED# 15KR2J-1-GP
R1
C
84.00143.M11
2
2nd = 83.00110.J70
SRN15KJ-3-GP 1 2 POWER_SW_LED_C
R6811 1KR2J-1-GP PDTA143ET-GP
2 3
27 PWRLED#
1 4
19 SATA_LED# 1122 Modify: 0928 Modify:
84.00143.M11
RN6802 R6808,R6811 change to 1K from 390ohm
NEED confirm with ME actual
5V_S0 Add 2nd source 83.00110.J70 on FPOWERLED1
for fine tune POWER BUTTON LED. HDD_LED part number. HDDLED1,WLANLED1 from Sourcer Anya suggestion.
Q6805
HDLED1
R2 0706 Modify:
E
3
SATA_LED#_C B Change HDD_LED part number to
R1
C SATA_LED_R 1 2 HDD_LED_A 1A K2 83.01221.R70 base on latest EMN and DXF.
R6812 390R2J-1-GP
Do Not Stuff
EC6810
LED-W-27-GP WLED1
PDTA143ET-GP
DY 83.01221.R70 0105 Modify:
SATA HDD LED(White)
3
84.00143.M11 Change Part Reference HDDLED1 To HDLED1
2
2nd = 83.00110.J70 2K A1 WLAN_LED_A 1 2 WLAN_LED_R
R6815 390R2J-1-GP
1
Do Not Stuff
EC6811
LED-W-27-GP
C
83.01221.R70 DY C
2
2nd = 83.00110.J70
0706 Modify:
Change WLAN_LED part number to
NEED confirm with ME actual 83.01221.R70 base on latest EMN and DXF.
5V_S5
HDD_LED part number.
Battery LED2(WHITE_LED) Q6807
R2
E
0105 Modify:
Change Part Reference WLANLED1 To WLED1
B
Need change to LOW actived from KBC GPIO R1
C WHITE_LED_BAT 1 2 BAT_WHITE
0702 Modify: R6801 390R2J-1-GP
Do Not Stuff
Rename CHARGE_LED# to CHG_AMBER_LED#
EC6807
CHLED1
Rename DC_BATFULL# to BATT_WHITE_LED#. PDTA143ET-GP WHITE
RN6801
DY 2
84.00143.M11
WHITE
2
+
1 4 WHITE_LED_BAT# 3 0716 Modify:
27 BATT_WHITE_LED#
-
2 3 AMBER_LED_BAT# 1
+
27 CHG_AMBER_LED# ORANGE CHARGER_LED part number change
SRN15KJ-3-GP 5V_S5 to 83.01222.X80 from 83.19223.D70.
Q6808
LED-OW-8-GP
Battery LED1(AMBER_LED) R2
E
AMBER 0105 Modify:
B R1
C AMBER_LED_BAT 1 2 BAT_AMBER 83.01222.X80 Change Part Reference CHARGERLED1 To CHLED1
1 R6803 390R2J-1-GP 2nd = 83.00326.G70
PDTA143ET-GP
Need change to LOW actived from KBC GPIO EC6809
84.00143.M11 DY Do Not Stuff
2
0706 Modify:
Change TP_LOCK_LED part number to
83.19217.J70 base on latest EMN and DXF.
TPLOCK LED NEED confirm with ME actual

5V_S0
HDD_LED part number.
Q6804
R2 0117 Modify: Brightness Follow Intel
0629 Modify E
R6807
1 2 Q6804_B B TPLED2
27 TP_LOCK_LED# 15KR2J-1-GP
R1
TP_LOCK_LED_R TP_LOCK_LED_A
C 1 2 A K 0928 Modify:
R6813 390R2J-1-GP
DN15 Add 2nd source 83.00326.G70 on
1
Do Not Stuff
B B
EC6803
Do Not Stuff
Need change to LOW actived from KBC GPIO PDTA143ET-GP CHARGERLED1from Sourcer Anya suggestion.
DY Do Not Stuff
2nd = 83.00190.S7A 1122 Modify:
84.00143.M11
2
Change R6813 to 1K from 390ohm for fine tune LED illumination

0105 Modify:
Change Part reference name From TPLOCKLED1/TPLOCKLED2 To TPLED1/TPLED2
TPLED1
A K
DQ15
LED-Y-57-GP
83.01921.P70
2nd = 83.00190.S7A
27 KBC_PWRBTN# 1 2 PWRBT1 PWRBT2

R6802 100R2J-2-GP 5 5
0914:Modify
1
CONFIRM PWR_BTN_LED# SPEC. 1 1

EC6808
maybe by can combine with FPOWER_LED. KBC_PWRBTN#_C 2 KBC_PWRBTN#_C 2
Then PWR_BTN_LED can reserved for other function.
EGA10402V12A0-GP
POWER_SW_LED_C 3
DQ15 POWER_SW_LED_C 3
DN15
POWER_SW_LED_B 4 POWER_SW_LED_B 4
2
6 6
ACES-CON4-10-GP-U Do Not Stuff
0105 Modify: 20.K0320.004 Do Not Stuff

A A
EMI Request 2nd = 20.K0382.004
0304 Modify:
EMI Request To Pop EC6808 83.MS04A.AA0
0105 Modify: DQ15 AMD DIS SAMSUNG TI
0321 Modify: Change Part reference name From PWRBTN1/PWRBTN2 To PWRBT1/PWRBT2
Change EC6808 Source To 83.10402.0A0
Wistron Corporation
0921:Modify
Title
LED Bard/Power Button
KBC_PWRBTN#_C 1 AFTP6801 Size Document Number Rev
POWER_SW_LED_C 1 AFTP6802 A2
POWER_SW_LED_B 1 AFTP6803 QUEEN AMD Muxless/UMA X00
5 4 3 2 1
5 4 3 2 1
SSID = Touch.Pad
1122 Modify:
Add 2nd 20.K0592.030 on KB1 from ME 0715 Modify:
updated connector list. Add R6908,R6909 for TPAD1 co-lay power option.
0109 Modify:
Internal KeyBoard Connector Change TP_VDD To 3D3V_S0, Follow Intel
0630 Modify: 0624 Modify:

Change KB1 part number to 20.K0565.030 Removed TP LOCKED CONTROL combin
base on ME updated EMN and DXF. with KEYBOARD Function KEY. TP_VDD 5V_S0
D R6909 D
0630 Modify: 1 DY 2
KB1 AFTP45
Change TPAD1 part number to 20.K0320.006 Do Not Stuff
1 0713 Modify:
31 base on ME updated EMN&DXF. 3D3V_S0
Change TPAD1 power source to 3D3V_S0 from
1 0712 Modify:
KB_DET# 18 5V_S0 base on DELL latest spec A02. R6910 1 2 Do Not Stuff
Change TPAD1 part number to 20.K0320.004
2 KROW7 1
3 KROW6
KROW4
1 AFTP46
AFTP47
TouchPad Connector from 20.K0320.006.
4 1
5 KROW2 1 AFTP48
6 KROW5 1 AFTP49 TP_VDD TP_VDD
7 KROW1 1 AFTP50
8 KROW3 1 AFTP51
9 KROW0 1 AFTP52
10 KCOL5 1 AFTP53
2
1
11 KCOL4 1 AFTP54
1
12 KCOL7 1 AFTP55 RN6901 C6901
KROW[0..7] 27
13 KCOL6 1 AFTP56 SRN10KJ-5-GP SCD1U10V2KX-5GP
14 KCOL8 1 AFTP57
2
15 KCOL3 1 AFTP58 TPAD1
KCOL[0..16] 27
16 KCOL1 1 AFTP59 6
3
4
17 KCOL2 1 AFTP60
18 KCOL0 1 AFTP61 4
19 KCOL12 1 AFTP62 3
27 TPCLK
20 KCOL16 1 AFTP63 27 TPDATA 2
21 KCOL15 1 AFTP64
22 KCOL13 1 AFTP65 1
1
23 KCOL14 1 AFTP66
KCOL9 AFTP68 0624 Modify: C6902 C6903
24
KCOL11
1
AFTP67 Add CAP LED Control circuit(Q6902,R6906,R6907) Do Not Stuff
DY DY Do Not Stuff
1 5
25 1
2
26 KCOL10 1 AFTP69 and Connect CAP_LED_R control to KB1 pin27 from AFTP71 ACES-CON4-10-GP-U
27 AFTP70 CAP_LED_R KBC GPIO(High active).
28
CAP_LED_R 20.K0320.004
29
30 1
32 AFTP72 0707 Modify:
C Change TPAD1 pin define to follow C
JAE-CON30-7-GP TOUCH PAD DATASHEET.
1 TP_VDD 0713 Modify:
20.K0565.030
2nd = 20.K0592.030 AFTP73 1 TPCLK Change TPAD1 pin define to follow
0921 Modify: AFTP74 1 TPDATA TOUCH PAD DATASHEET.
AFTP75
un-stuff R6907 and stuff R6905,Q6902,R6906
for 5V drive CAP LED.
0109 Modify: CAP_LED Change To Low Active From KBC GPIO
0109 Modify: R6906 Change To 1K
Low Active from KBC GPIO.

CAP LED CONTROL
5V_S5
Q6902
R2
R6905 E
1 2 Q6902_B
B CAP_LED_R
27 CAP_LED R1
CAP_LED_Q CAP_LED_R
C 1 2
15KR2J-1-GP R6906 1KR2J-1-GP
PDTA143ET-GP
84.00143.M11
1 2
R6907 DYDo Not Stuff
0719: EMI Request

B B
KB Backlight Connector
CAP_LED_R
5V_S0 +5V_KB_BL
F6901
1
1 2
DY EC6901 DY MAX 260mA1123 X02 Modify:
1
Do Not Stuff Do Not Stuff C6905 Add 2nd(20.K0613.004)on KBLIT1

2
Do Not Stuff from Karl updated.

2 R6902
1
DN15
2
Do Not Stuff
KBLIT1
DN15 5
1
R6904
1 2 KB_LED_DET_C 2
17 KB_LED_BL_DET DN15 3
DN15
1
Do Not Stuff 4
1
KB_BL_CTRL#
R6903 C6906 6
Do Not Stuff
DN15 DY
Do Not Stuff
Do Not Stuff
2
Do Not Stuff
1
2nd = 20.K0613.004
AFTP82
D
Q6901
Do Not Stuff
DN15
27 KB_BL_CTRL
G
Do Not Stuff
2nd = 84.03404.C31
1
A R6901 A
Do Not Stuff
+5V_KB_BL
DN15 KB_LED_DET_C
1
1 AFTP76
2

KB_BL_CTRL# 1 AFTP77
AFTP78
Wistron Corporation
Title
Key Board/Touch Pad

Custom
5 4 3 2 1
5 4 3 2 1
SSID = Hall.Sensor
D D
0906 Modify:
HALL SENSOR move to small board at X01 stage,so
Removed HALLSW1 related circuit and add HALL1
connector.
1122 Modify:
Add 2nd 20.F0962.010 on HALL1 from
HALL1
NP1
12
C C
13 11
10 1
9 2
8 3 LID_CLOSE# 27
7 4 3D3V_S5
6 5
16 14
AFTP85
15
NP2
1
TCN-CONN10C-GP
AFTP83 Do Not Stuff
Do Not Stuff
1 3D3V_S5
1 LID_CLOSE#
AFTP84 Do Not Stuff 20.F1655.010
B 2nd = 20.F0962.010 B
1110 X02 Modify:

Add 2nd 20.F0962.010 on HALL1 from
A
Title
Size
Hall Effect Sensor
Document Number Rev
A4
5 4 3 2 1
5 4 3 2 1
SSID = Debug
D D
3D3V_S0
DB1
1
17,27 LPC_AD0 2
17,27 LPC_AD1 3
17,27 LPC_AD2 4
17,27 LPC_AD3 5
17,27 LPC_FRAME# 6
7
9,17,82,83 PLT_RST#
8
DY
17,21 CLK_PCI_LPC 9
10
11
12
Do Not Stuff
20.D0183.110
C C
1D5V_S3
HDT+ Connectors
HDT7101
1 CPU_VDDIO CPU_TCK 2 APU_TCK 6

3 GND CPU_TMS 4 APU_TMS 6
5 GND CPU_TDI 6 APU_TDI 6
7 8
Do Not Stuff 1 R7101 APU_TRST#_R 9
2
GND DY CPU_TDO
10
APU_TDO 6
6 APU_TRST#
DBRDY3 DY 11
CPU_TRST# CPU_PWROK_BUF
12
H_CPUPW RGD 6,17,36
CPU_DBRDY3 CPU_RST#_BUF APU_RST_L_BUF 6
B DBRDY2 13 14 B
CPU_DBRDY2 CPU_DBRDY0 APU_DBRDY 6
DBRDY1 15 16
CPU_DBRDY1 CPU_DBREQ# APU_DBREQ# 6
17 18 APU_TEST19_PLLTEST0_R R7105 2 Do Not Stuff
19
GND CPU_PLLTEST0
20 APU_TEST18_PLLTEST1_R DY11 R7106 2 Do Not Stuff
APU_TEST19_PLLTEST0 6
CPU_VDDIO CPU_PLLTEST1 DY APU_TEST18_PLLTEST1 6
Do Not Stuff CRB:placed 0-ohm

RN7101 checklist:if both SCAN and HDT+ header are implement
8 1 DBRDY1 placed 15-ohm
7 2 DBRDY2
6
DY 3 DBRDY3
5 4
Do Not Stuff
0603
A
Title
Dubug connector
A4
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
Wistron Corporation
Title
RESERVED
A3
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
5 4 3 2 1
SSID = SDIO
3D3V_CARD_S0 Close to CARD1
SC2D2U6D3V3MX-1-GP
D D
SCD01U16V2KX-3GP
Do Not Stuff
Do Not Stuff
Do Not Stuff
C7403
C7404
C7405
1
1
C7401
C7402
DY DY DY
2
2
SD/XD/MS/MMC+ Card Reader
3D3V_CARD_S0
CARD1
P13 1 XD_CD# 32
SD_VCC XD_CD
2 SP1 32
XD_R/B
P22 3 SP2 32
MS_VCC XD_RE
4 SP3 32
XD_CE
18 5 SP4 32
XD_VCC XD_CLE
6 SP5 32
XD_ALE
7 SP6 32
XD_WE
32 SP4 P4 8 SP7 32
SD_DAT0 XD_WP_IN
32 SP3 P3
SD_DAT1
32 SP13 P25 10 SP8 32
SD_DAT2 XD_D0
32 SP12 P23 11 SP9 32
C SD_DATA3 XD_D1 C
12 SP10 32
XD_D2
32 SP8 P10 13 SP11 32
SD_CLK XD_D3
32 SP6 P1 14 SP12 32
SD_CD XD_D4
32 SP1 P2 15 SP13 32
SD_WP XD_D5
32 SP10 P19 16 SP14 32
SD_CMD XD_D6
17 XD_D7 32
XD_D7
32 SP14 P9
MS_BS
32 SP2 P16 P26
MS_INS SD_WP_COM/SDIO_GND
32 SP1 P20 P27
MS_SCLK SD_CD_COM/SDIO_GND
P7
SD_GND
32 SP9 P12 P15
MS_DATA0 SD_GND
32 SP12 P11
MS_DATA1
32 SP8 P14 P6
MS_DATA2 MS_GND
32 SP5 P18 P24
MS_DATA3 MS_GND
9
XD_GND
32 SP11 P21
MMC_DATA4 XD_GND
19 0906 Modify:
32 SP9 P17 Change CARD1 to 20.I0129.001 from 62.10051.931
MMC_DATA5
32 SP7 P8 NP1
MMC_DATA6 NP1 from ME double updated latest DXF&EMN on X01.
32 SP5 P5 NP2
MMC_DATA7 NP2
0928 Modify:
CARD-PUSH-46P-1-GP-U Updated CARD1 footprint to R013-P12-HM-1
from data base updated footprint.
20.I0129.001
2nd = 20.I0135.001 1122 Modify:
B Add 2nd 20.I0135.001 on CARD1 from B
PCB Footprint = R013-P12-HM-1 ME updated latest connector list.
For EMI Reserved
SP1
SP2
SP3
SP4
SP5
SP6
SP7
SP8
SP9
SP10
SP11
SP12
SP13
SP14
XD_D7
XD_CD#
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
1
1
EC7402
EC7403
EC7404
EC7405
EC7406
EC7407
EC7408
EC7409
EC7410
EC7411
EC7412
EC7413
EC7414
EC7415
EC7416
EC7417
A
DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DQ15 AMD DIS SAMSUNG TI A
2
2
Wistron Corporation
Title
0913: Schematic Score Card Suggest Cap Less Than 10P CARD Reader CONN
A3
5 4 3 2 1
5 4 3 2 1
SSID = ExpressCard
D D
1D5V_S0_CARD Max. 650mA, Average 500mA.

3D3V_S0_CARD Max. 1300mA, Average 1000mA
3D3V_S5_CARDAUX Max. 275mA
SB-25
NEW1
27
1
R7505 1 2 Do Not Stuff
17 PCIE_TXP5 PCIE_TXP5_CON 2
1122 X02 Modify: R7506
1 2 PCIE_TXN5_CON 3
Change TR7501 CM choke to 69.10103.041 17 PCIE_TXN5 Do Not Stuff 4
and un-stuff R7501,R7502 from EMC Neo Suggestion. R7508 1 Do Not Stuff
2 PCIE_RXP5_CON 5
Change R7501,R7502 to 0603 from 0402. 17 PCIE_RXP5 PCIE_RXN5_CON
R7507 1 Do Not Stuff
2 6
1123 X02 Modify: 17 PCIE_RXN5
7
SWAP TR7501 pin1&4 and pin2&3 each other R7503 1 2 CLK_PCIE_NEW_C8
base on Connie swap report. 17 CLK_PCIE_NEW
17 CLK_PCIE_NEW# R7504 1 Do Not Stuff
2 CLK_PCIE_NEW#_C 9
Do Not Stuff 10
C R7509 1 2 CLK_PCIE_NEW_REQ#_CON 11 C
18 CLK_PCIE_NEW_REQ#
Do Not Stuff 12
3D3V_S0 13 DN15
14
3D3V_S5 15
18 USB_PP8 R7501
1 2Do Not Stuff USB_PP8_R 27,82 PCIE_WAKE# R7510 1 2 PCIE_WAKE#_CON
Do Not Stuff 16
DY 1D5V_S0 17
18
14,18 SMB_DATA SMB_DATA 19
Do Not Stuff SMB_CLK 20
14,18 SMB_CLK
18,27,44 PM_SLP_S5# PM_SLP_S5# 21
2 1 18,27,36,44,46 PM_SLP_S3# PM_SLP_S3# 22
DN15 FCH_PCIE_RST# 23
18 FCH_PCIE_RST#
3 4 USB_PP8_R 24
USB_PN8_R 25
TR7501 26
Do Not Stuff 28
1214: Modify To RST Due To Use FCH GPP Do Not Stuff

R7502 2Do Not Stuff USB_PN8_R
18 USB_PN8 1
DY
Do Not Stuff
2nd = 20.K0382.026
For EMI
Do Not Stuff 1 3D3V_S5
AFTP107
Do Not Stuff AFTP108 1 3D3V_S0
B 1D5V_S0 CLK_PCIE_NEW#_C PCIE_TXP5_CON CLK_PCIE_NEW_REQ# B
Do Not Stuff AFTP109 1
Do Not Stuff 1 USB_PN8_R CLK_PCIE_NEW_C PCIE_TXN5_CON PCIE_WAKE#
AFTP110
Do Not Stuff AFTP111 1 USB_PP8_R PCIE_RXP5
Do Not Stuff 1 CLK_PCIE_NEW_REQ#_CON PCIE_RXN5
AFTP112 2
2
Do Not Stuff AFTP113 1 SMB_CLK
Do Not Stuff 1 SMB_DATA EC7501 EC7502 EC7507 EC7508
AFTP114
2
1 PM_SLP_S3#
Do Not Stuff AFTP115 DY DY DY DY
1
1
Do Not Stuff AFTP116 1 PM_SLP_S5# Do Not Stuff EC7505 EC7506 EC7503 EC7504 Do Not Stuff
1 FCH_PCIE_RST# Do Not Stuff Do Not Stuff
Do Not Stuff AFTP117 DY DY DY DY
1
Do Not Stuff 1 CLK_PCIE_NEW#_C Do Not Stuff Do Not Stuff
AFTP118
Do Not Stuff 1 CLK_PCIE_NEW_C Do Not Stuff Do Not Stuff
AFTP119
Do Not Stuff 1 PCIE_TXN5_CON
AFTP120
Do Not Stuff 1 PCIE_TXP5_CON
AFTP121
Do Not Stuff 1 PCIE_RXN5_CON
AFTP122
Do Not Stuff AFTP123 1 PCIE_RXP5_CON
Do Not Stuff 1 PCIE_WAKE#_CON
AFTP124

A A
Wistron Corporation
Title
Express Card
A3
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A
Title
Reserved
A4
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A
Title
Reserved
A4
5 4 3 2 1
5 4 3 2 1
D D
Free Fall Sensor

Note
- no via, trace, under the sensor (keep out area around 2mm)
- stay away from the screw hole or metal shield soldering joints
3D3V_S0
- design PCB pad based on our sensor LGA pad size (add 0.1mm)
- solder stencil opening to 90% of the PCB pad size
- mount the sensor near the center of mass of the NB as possible as you can
DN15
1
C7901 C7902
DY
Do Not Stuff
2
Do Not Stuff 3D3V_S0
1
6
1
U7901 R7902
14,15,82 PCH_SMBCLK Do Not Stuff
DY
VDD_IO
VDD
14,15,82 PCH_SMBDATA
3D3V_S0
2
PCH_SMBCLK 14 8 HDD_FALL_INT1
1
C SCL/SPC INT1 HDD_FALL_INT1 17 C
3D3V_S0 PCH_SMBDATA 13 9 R7903
R7901 SDA/SDI/SDO INT2 Do Not Stuff
DN15
1 DY 2 HDD_FALL_SDO 12
Do Not Stuff SDO
2
7 FALL_INT2
CS
DN15 GND
2
GND
4 0906: Need Pop R7906 ?
3 5
RESERVED#3 GND
11 10
1
RESERVED#11 GND
3D3V_S5 3D3V_S0 Q7901 5V_S0
Do Not Stuff DN15
Do Not Stuff
1
Do Not Stuff
6
2nd = 84.DM601.03F
Do Not Stuff DY R7907 DY R7904 DY R7906
09/0422 Do Not Stuff Do Not Stuff Do Not Stuff
(#1) Just pull +3.3V_RUN ~ Ref. Rothschild
2
(#2) FAE/ DY is ok, chip internal pull-up resistors
(#3) From spec, Slave ADdress(SAD) is 001110xb 0901 X01 Modify: FFS_INT2_R
U7901 G-SENSOR MAIN SOURCE change to FFS_INT2 56
Pull HIGH SAD is 0011101b ST(74.00351.0B3),2nd change to ADI(74.00345.0BZ)
Pull GND SAD is 0011100b 1 DY R7905
2
Do Not Stuff
0906: Follow DQ15 Intel to Change Main Source To ST FFS_INT2_R 18

B B
Note
(1) Keep all signals are the same trace width. (included VDD, GND).
(2) No VIA under IC bottom.
Wistron Corporation
Title
Free Fall Sensor

A3
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
Wistron Corporation
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
Reserved
A
5 4 3 2 1
5 4 3 2 1
D D
C (Blanking) C
B B
Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Title
UNUSED PARTS/EMI Capacitors

A4
5 4 3 2 1
5 4 3 2 1
IO Board CONN 80 pin

IOBD1
ACES-CONN80D-1-GP
82
NP1
2 1
62 USB30_TXDN2_R 4 3
USB30_RXDP3_R 62
62 USB30_TXDP2_R 6 5
USB30_RXDN3_R 62
USB 3.0 (1) Port 3 8 7 USB 3.0 Port 4
62 USB30_RXDN2_R 10 9 USB30_TXDP3_R 62
62 USB30_RXDP2_R 12 11 USB30_TXDN3_R 62
14 13
17 CLK_PCIE_LAN# 16 15 USB20_DP2 18
LAN CLK 17 CLK_PCIE_LAN 18 17 USB20_DM2 18 USB2.0 Port 3
20 19
D 17 CLK_PCIE_WLAN 22 21 USB20_DP3 18 D
WLAN CLK 17 CLK_PCIE_WLAN# 24 23 USB20_DM3 18 USB 2.0 Port 4
26 25
28 27 USB_PP1 18
4 PCIE_RXN2
30 29 USB_PN1 18
4 PCIE_RXP2
32 31
LAN PCIE RX 4 PCIE_RXP0 34 33 PCIE_TXP2 4
4 PCIE_RXN0 36 35 PCIE_TXN2 4
38 37 WLAN USB
LAN PCIE TX 4 PCIE_TXP0 40 39
CLK_PCIE_WLAN_REQ# 18
4 PCIE_TXN0 42 41 5V_S5
44 43
WLAN SMBUS 27 E51_RXD 46 45
27 E51_TXD 48 47
14,15,79 PCH_SMBDATA 50 49
14,15,79 PCH_SMBCLK 52 51
27,63 BLUETOOTH_EN 54 53
29 MIC_IN_L 56 55 WLAN PCIE
29 EXT_MIC_JD# 58 57 3D3V_S0
29 MIC_IN_R 60 59
29 AUD_HP1_JACK_L2 62 61
29 AUD_HP1_JD# 64 63 3D3V_S5
29 AUD_HP1_JACK_R2 66 65
27 WIFI_RF_EN 68 67 1D5V_S0
63,68 WLAN_WWAN_LED# 70 69 PM_LAN_ENABLE 27
18 USB_OC#2 72 71 PLT_RST# 9,17,71,83
18 USB_OC#5 74 73
PCIE_WAKE# 27,75
27,57 USB_IO_CRT_EN# 76 75 BT_ACT 63
18 PCIE_CLK_LAN_REQ# 78 77
WLAN_ACT 63
80 79
NP2
81
20.F1849.080
2nd = 20.F1908.080
C C
0706 Modify: ADD WLAN_LED, Follow Intel, AMD Dont have
WWAN
1123 Modify: Change Main Source To 20.F1849.080 & Add 2nd 20.F1908.080 on IOBD1 from
ME updated latest connector list & Modify Pin Define So 4 corner pin are GND.
NP1
CRTBD1
42
43 41
2 1 CRT_RED_R 1 AFTP5004
94 CRT_RED_R
CRT RGB CRT_GREEN_R 1 AFTP5005
4 3 AD+ CRT_BLUE_R 1 AFTP5006
94 CRT_GREEN_R 6 5
8 7
94 CRT_BLUE_R 10 9
12 11
5V_CRT_S0_R 5V_CRT_S0 5V_S0
CRT SMBUS 94 CRT_VSYNC_R 14 13
D8201
94 CRT_HSYNC_R 16 15
18 17 F8201
94 DDCCLK
CRT H/VSYNC 94 DDCDATA 20 19 1 2 2 1
5V_CRT_S0_R 22 21
3D3V_S0 24 23 FUSE-1D1A6V-4GP-U
5V_S5 26 25 USB30_TXDP1_R USB30_TXDP1_R 62 USB 3.0 PORT1 69.50007.691 CH551H-30PT-GP
3D3V_S5 28 27 USB30_TXDN1_R USB30_TXDN1_R 62
27 PSID_EC 30 29
32 31 USB30_RXDP1_R
27 RCID USB30_RXDP1_R 62
34 33 USB30_RXDN1_R
USB30_RXDN1_R 62
USB30_VCCB 36 35 0906 Modify:
B USB20_DM1 B
at least 80 mil 38 37
USB20_DP1
USB20_DM1 18 Change Part Number 20.K0422.010 To20.K0320.008
40 39 USB20_DP1 18 USB 2.0 PORT11 Base On ME Connector List
46 44
0914 Modify:
Change R8201~R8203 to 470 ohm from 33ohm
45
NP2
for fine tune MEDIA LED 5mA current.

0928 Modify:
20.F1121.040 Change R8201~R8203 to 430 ohm from 470 ohm
2nd = 20.F0085.040 for fine tune MEDIA LED 5mA current.
ACES-CONN40D-GP
0914 Modify:
Change BTB Connector To 20.F1121.040
Follow ME Connector List
1228 Modify:
Remove USB 3.0 Signal and Re-arrange Pin-Define For Better Layout Routing
0105:Modify
1118 Modify: EMI Neo Suggest To Reserve, Close To Media Buttom Board
Modify Pin Define
MEDIA_LED1# 5V_S5
MEDIA_LED2# EC8203
1 DY
2
1 2Do Not Stuff
DY
MEDIA_LED3# EC8204 1 2Do Not Stuff
DY
2
INSTANT_ON# EC8205 1 2Do Not Stuff
DY
DATA_RECOVERY#EC8206 1 2Do Not Stuff
DY DY EC8209
MEDIA_BTN3# EC8207 1 2Do Not Stuff
DY Do Not Stuff
1
EC8208 Do Not Stuff
MEDIA1
9
1 5V_S5 5V_S5
0902 X01 Modify: MEDIA1_1

Low active MEDIA_LED1#
A Add F8201,D8201 sync with DQ15-NV.
2 1
MEDIA1_2 R8201
2 MEDIA_LED1# 27 1 DY 2
A
3 1 21KR2J-1-GP MEDIA_LED2# 27 MEDIA_LED2# R8204
1 DY 2Do Not Stuff
Rename CRTBD1 pin24 power to 5V_CRT_S0_R. MEDIA1_3 R8202 21KR2J-1-GP MEDIA_LED3# R8205 2Do Not Stuff
4 1
R8203 1KR2J-1-GP
MEDIA_LED3# 27 1
R8208
DY Do Not Stuff
5 INSTANT_ON# 27
0916 X01 Modify: 6 DATA_RECOVERY# 27
Change R8201~R8203 to 430ohm from 100ohm. 7 MEDIA_BTN3# 27
Add R8204,R8205,R8208 PH 5V_S5 on 8
MEDIA_LED1~3# for PWM OD mode.
0921:Modify DQ15 AMD DIS SAMSUNG TI
10 Add AFTP, Follow DQ15 Intel
ACES-CON8-19-GP AFTP8201 MEDIA1_1

Wistron Corporation
1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
AFTP8202 1 MEDIA1_2
20.K0320.008 AFTP8203 1 MEDIA1_3
AFTP8204 1 5V_S5 Title
1122 Modify: AFTP8205 1 INSTANT_ON#
change Media resistor from 430 ohm to 1K on both DQ/DN15
AFTP8206
AFTP8207
1
1
DATA_RECOVERY#
MEDIA_BTN3# Size
IO Board Connector
Document Number Rev
(R8201, R8202, R8203) for Media button LED light spot issue A2 QUEEN AMD Muxless/UMA X00
Date: Thursday, April 21, 2011 Sheet 82 of 104
5 4 3 2 1
5 4 3 2 1
VGA1A 1 OF 8
4 PEG_TXP[8..15] PEG_RXP[8..15] 4
CONFIGURATION STRAPS RECOMMENDED SETTINGS
0= DO NOT INSTALL RESISTOR
4 PEG_TXN[8..15] ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, 1 = INSTALL 3K RESISTOR
PEG_RXN[8..15] 4
X = DESIGN DEPENDANT
THEY MUST NOT CONFLICT DURING RESET NA = NOT APPLICABLE
AA38
PCIE_RX0P PCIE_TX0P
Y33 PLATFORM
Y37 Y32 STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS RECOMMEND
PCIE_RX0N PCIE_TX0N SETTING
Transmitter Power Savings Enable
Y35
PCIE_RX1P PCIE_TX1P
W33 TX_PWRS_ENB GPIO0 0: 50% Tx output swing 1: Full Tx output swing X 1
W36 W32
PCIE_RX1N PCIE_TX1N
PCIE TRANSMITTER DE-EMPHASIS ENABLED
TX_DEEMPH_EN GPIO1 0:Tx de-emphasis disabled 1:Tx de-emphasis enabled X 1
D W38 U33 D
PCIE_RX2P PCIE_TX2P
V37
PCIE_RX2N PCIE_TX2N
U32 0:Advertises the PCIe device as 2.5GT/s capable at power on.
BIF_GEN2_EN_A GPIO2 1:Advertises the PCIe device as 5.0GT/s capable at power on. 0 1
V35
PCIE_RX3P PCIE_TX3P
U30 optional input allow the system to request a fast
U36
PCIE_RX3N PCIE_TX3N
U29 GPIO5_AC_BATT GPIO5 power reduction by setting GPIO5 to low. ? 0
U38
PCIE_RX4P PCIE_TX4P
T33 RESERVED GPIO8 RESERVED 0 0
PCI EXPRESS INTERFACE

T37 T32
PCIE_RX4N PCIE_TX4N
0:VGA Controller capacity enabled
VGA_DIS GPIO9 1:The device won't be recognized as the system's VGA controller 0 0
T35 T30
PCIE_RX5P PCIE_TX5P BIOS_ROM_EN=1, Config[2:0] defines the ROM type
R36
PCIE_RX5N PCIE_TX5N
T29 0 0 1
ROMIDCFG[2:0] GPIO[13:11] BIOS_ROM_EN=0, Config[2:0] defines the primary memory aperture size X X X
(256MB)
R38 P33
PCIE_RX6P PCIE_TX6P
P37
PCIE_RX6N PCIE_TX6N
P32 RESERVED GPIO21 RESERVED 0 0
0:Disable external BIOS ROM device
P35 P30 BIOS_ROM_EN GPIO_22_ROMCSB X 0
PCIE_RX7P PCIE_TX7P 1:Enable external BIOS ROM device
N36 P29
PCIE_RX7N PCIE_TX7N
VIP Device Strap Enable indicates to the software driver that it sense
VIP_DEVICE_STRAP_EN V2SYNC X 0
PEG_TXP8 PEG_C_RXP8 C8318 SCD1U10V2KX-5GP PEG_RXP8
whether or not a VIP device is connected on the VIP Host interface.
PEG_TXN8
N38
PCIE_RX8P PCIE_TX8P
N33
PEG_C_RXN8 C8317
DIS_PX
1 2
SCD1U10V2KX-5GP PEG_RXN8
M37
PCIE_RX8N PCIE_TX8N
N32 DIS_PX
1 2
RSVD H2SYNC RESERVED 0 0
PEG_TXP9 M35 N30 PEG_C_RXP9 C8320 DIS_PX
1 2 SCD1U10V2KX-5GP PEG_RXP9
PEG_TXN9 PCIE_RX9P PCIE_TX9P PEG_C_RXN9 C8319 SCD1U10V2KX-5GP PEG_RXN9
L36
PCIE_RX9N PCIE_TX9N
N29 DIS_PX
1 2 RSVD GENERICC RESERVED 0 0
PEG_TXP10 L38 L33 PEG_C_RXP10C8321 DIS_PX

1 2 SCD1U10V2KX-5GP PEG_RXP10 AUD[1] HSYNC X 1
PEG_TXN10 PCIE_RX10P PCIE_TX10P PEG_C_RXN10C8322 SCD1U10V2KX-5GP PEG_RXN10
K37
PCIE_RX10N PCIE_TX10N
L32 DIS_PX
1 2 AUD[1:0]:11-Audio for both DisplayPort and HDMI
C
PEG_TXP11 PEG_C_RXP11C8323 SCD1U10V2KX-5GP PEG_RXP11
AUD[0] VSYNC X 1 C
PEG_TXN11
K35
PCIE_RX11P PCIE_TX11P
L30
PEG_C_RXN11C8324
DIS_PX
1 2
SCD1U10V2KX-5GP PEG_RXN11
J36
L29 DIS_PX
1 2
Full Tx output swing. Must be pulled to 3.3 V at reset using ~3-K (5%) resistor.
PEG_TXP12 J38 K33 PEG_C_RXP12C8325 DIS_PX
1 2 SCD1U10V2KX-5GP PEG_RXP12 3D3V_VGA_S0
H37
K32 DIS_PX
1 2
DG DY, CHECK 3D3V_VGA_S0
PIN STRAPS
PEG_TXP13 H35 J33 PEG_C_RXP13C8328 2 SCD1U10V2KX-5GP
DIS_PX
1 PEG_RXP13
PCIE_RX13P PCIE_TX13P PEG_C_RXN13C8327
PEG_TXN13 G36 J32 1 2 SCD1U10V2KX-5GP
DIS_PX PEG_RXN13 DIS_PX 0716: Modify Dummy Name
PCIE_RX13N PCIE_TX13N R8301 3KR2J-2-GP
85 TX_PWRS_ENB 1 2
DIS_PX
PEG_TXP14 G38 K30 PEG_C_RXP14C8330 DIS_PX
1 2 SCD1U10V2KX-5GP PEG_RXP14 85 TX_DEEMPH_EN R8302 1 2 3KR2J-2-GP
F37
K29 DIS_PX
1 2
R8303
DIS_PX 10KR2J-3-GP
85 BIF_GEN2_EN_A 1 2
PEG_C_RXP15C8332 SCD1U10V2KX-5GP R8304
DY Do Not Stuff R8325 1
DY
PEG_TXP15 F35 H33 DIS_PX
1 2 PEG_RXP15 85 GPIO8_ROMSO 1 2 85 JTAG_TMS_VGA 2 Do Not Stuff
E37
H32 DIS_PX
1 2
R8305
DY Do Not Stuff
85 VGA_DIS 1 2
R8306
DIS_PX 10KR2J-3-GP
DY
CLOCK 85 CONFIG0 1 2 2R8331 1 Do Not Stuff
17 CLK_PCIE_VGA AB35
PCIE_REFCLKP R8307
DY Do Not Stuff
17 CLK_PCIE_VGA# AA36 85 CONFIG1 1 2 84 TESTEN
PCIE_REFCLKN
R8308
DY Do Not Stuff
DIS_PX
R8332
85 CONFIG2 1 2 1 2
CALIBRATION R8316 DIS_PX 1V_VGA_S0 5K1R2F-2-GP
AJ21 Y30 PCIE_CALRP 1 2 R8309 1 DY 2 Do Not Stuff
NC#AJ21 PCIE_CALRP 85,94 VGA_CRT_VSYNC
DIS_PX AK21 1K27R2F-L-GP
PWRGOOD AH16 NC#AK21 PCIE_CALRN R8310 Do Not Stuff
1
R8317
2
10KR2F-2-GP PWRGOOD PCIE_CALRN
Y29 1 2
R8318 DIS_PX 2KR2F-3-GP
85,94 VGA_CRT_HSYNC 1 DY 2
R8323 1
DIS_PX
85 JTAG_TCK_VGA 2 10KR2J-3-GP
R8320
ATI_RST# 1 2 VGA_RST# AA30 DIS_PX DY DY
Do Not Stuff PERST# R8311 Do Not Stuff R8322 1
85 VSYNC_DAC2 1 2 85 JTAG_TRST#_VGA 2 Do Not Stuff
B
ROBSON-PRO-M2-GP R8312
DY Do Not Stuff
B
85 HSYNC_DAC2 1 2
DIS_PX DY
1
85 BIOS_ROM_EN R8313 1 2 Do Not Stuff

DY C8333 DY
Do Not Stuff PE_GPIO0 PX3.0 PX4.0 R8314 1 2 Do Not Stuff
85 GPIO5_AC_BATT
2
R8315
DY Do Not Stuff
IGPU L H 85 GPIO21_BB_EN 1 2
DGPU H H
JTAG SIGNAL OPTION - for option2

3D3V_VGA_S0
3D3V_VGA_S0
Normal Debug pilot run
R8330 U8302 Signal
1 2 1D8V_S0_VGA_PG_R 1
mode mode mode
93 1D8V_S0_VGA_PG B
Do Not Stuff 5
VCC
1
C8334 2 DIS_PX U8303 TESTEN "1"(PU) "1"(PU) "0"(PD)

Do Not Stuff A U8302_4
DIS_PX DY Y
4 1
B
3 5
2
GND VCC
ADIS_PX JTAG_TRST# "0"(PD) "1"(PU) NC
17 PE_GPIO0 2
74LVC1G08GW-1-GP 4 ATI_RST#
Y
73.01G08.L04 3
GND
2ND = 73.7SZ08.DAH JTAG_TCK CLK "1"(PU) NC
R8326 74LVC1G08GW-1-GP
9,17,71,82 PLT_RST# 1 2 PLT_RST#_R 73.01G08.L04
Do Not Stuff JTAG_TMS "1"(PU) "1"(PU) NC
2ND = 73.7SZ08.DAH
DIS_PX
0113: Remove APU_RST# Level Shift 1008: Add Level Shift For APU_RST# To 3.3V
A A

0113: Remove APU_RST# Colay R8328
PLT_RST# 2 DY 1 ATI_RST#
Wistron Corporation
R8329
Do Not Stuff Taipei Hsien 221, Taiwan, R.O.C.
PE_GPIO0 2 DY 1 ATI_RST#
Title
Do Not Stuff GPU_PCIE/STRAPPING(1/5)

5 4 3 2 1
5 4 3 2 1
VGA1C 3 OF 8 VGA1D 4 OF 8
DDR2 DDR2 DDR2 DDR2
88 MDA[0..31] GDDR3/GDDR5 GDDR5/GDDR3 90 MDB[0..31] GDDR3/GDDR5 GDDR5/GDDR3
DDR3 DDR3 DDR3 DDR3
MDA0 C37 G24 MAA0 88,89 MDB0 C5 P8 MAB0 90,91
MDA1 DQA0_0/DQA_0 MAA0_0/MAA_0 MDB1 DQB0_0/DQB_0 MAB0_0/MAB_0
C35 J23 MAA1 88,89 C3 T9 MAB1 90,91
A35 DQA0_2/DQA_2 MAA0_2/MAA_2 H24 MAA2 88,89 E3 DQB0_2/DQB_2 MAB0_2/MAB_2 P9 MAB2 90,91
MEMORY INTERFACE A
MDA3 E34 J24 MDB3 E1 N7
DQA0_3/DQA_3 MAA0_3/MAA_3 MAA3 88,89 DQB0_3/DQB_3 MAB0_3/MAB_3 MAB3 90,91
MEMORY INTERFACE B
MDA4 G32 H26 MAA4 88,89 MDB4 F1 N8 MAB4 90,91
D33 J26 MAA5 88,89 F3 N9 MAB5 90,91
F32 DQA0_6/DQA_6 MAA0_6/MAA_6 H21 MAA6 88,89 F5 DQB0_6/DQB_6 MAB0_6/MAB_6 U9 MAB6 90,91
MDA7 E32 G21 MAA7 88,89 MDB7 G4 U8 MAB7 90,91
D31 DQA0_8/DQA_8 MAA1_0/MAA_8 H19 MAA8 88,89 H5 DQB0_8/DQB_8 MAB1_0/MAB_8 Y9 MAB8 90,91
D MDA9 F30 H20 MAA9 88,89 MDB9 H6 W9 MAB9 90,91 D
C30 DQA0_10/DQA_10 MAA1_2/MAA_10 L13 MAA10 88,89 J4 DQB0_10/DQB_10 MAB1_2/MAB_10 AC8 MAB10 90,91
MDA11 A30 G16 MAA11 88,89 MDB11 K6 AC9 MAB11 90,91
F28 J16 MAA12 88,89 K5 AA7 MAB12 90,91
C28 H16 A_BA2 88,89 L4 AA8 B_BA2 90,91
MDA14 DQA0_13/DQA_13 MAA1_5/MAA_13_BA2 MDB14 DQB0_13/DQB_13 MAB1_5/BA2
A28 J17 A_BA0 88,89 M6 Y8 B_BA0 90,91
MDA15 DQA0_14/DQA_14 MAA1_6/MAA_14_BA0 MDB15 DQB0_14/DQB_14 MAB1_6/BA0
E28 H17 A_BA1 88,89 M1 AA9 B_BA1 90,91
MDA16 DQA0_15/DQA_15 MAA1_7/MAA_A15_BA1 MDB16 DQB0_15/DQB_15 MAB1_7/BA1
D27 DQA0_16/DQA_16 M3 DQB0_16/DQB_16
MDA17 F26 A32 DQMA0 88 MDB17 M5 H3 DQMB0 90
MDA18 DQA0_17/DQA_17 WCKA0_0/DQMA_0 MDB18 DQB0_17/DQB_17 WCKB0_0/DQMB_0
C26 DQA0_18/DQA_18 WCKA0_0#/DQMA_1 C32 DQMA1 88 N4 DQB0_18/DQB_18 WCKB0B_0/DQMB_1 H1 DQMB1 90
MDA19 A26 D23 DQMA2 88 MDB19 P6 T3 DQMB2 90
F24 E22 DQMA3 88 P5 T5 DQMB3 90
MDA21 DQA0_20/DQA_20 WCKA0_1#/DQMA_3 MDB21 DQB0_20/DQB_20 WCKB0B_1/DQMB_3
C24 DQA0_21/DQA_21 WCKA1_0/DQMA_4 C14 DQMA4 89 R4 DQB0_21/DQB_21 WCKB1_0/DQMB_4 AE4 DQMB4 91
MDA22 A24 A14 DQMA5 89 MDB22 T6 AF5 DQMB5 91
MDA23 DQA0_22/DQA_22 WCKA1_0#/DQMA_5 MDB23 DQB0_22/DQB_22 WCKB1B_0/DQMB_5
E24 E10 DQMA6 89 T1 AK6 DQMB6 91
C22 DQA0_24/DQA_24 WCKA1_1#/DQMA_7 D9 DQMA7 89 U4 DQB0_24/DQB_24 WCKB1B_1/DQMB_7 AK5 DQMB7 91
MDA25 A22 MDB25 V6
MDA26 DQA0_25/DQA_25 GDDR5/DDR2/GDDR3 MDB26 DQB0_25/DQB_25 GDDR5/DDR2/GDDR3
F22 C34 QSAP_0 88 V1 F6 QSBP_0 90
MDA27 DQA0_26/DQA_26 EDCA0_0/QSA_0/RDQSA_0 MDB27 DQB0_26/DQB_26 EDCB0_0/QSB_0/RDQSB_0
D21 D29 QSAP_1 88 V3 K3 QSBP_1 90
A20 D25 QSAP_2 88 Y6 P3 QSBP_2 90
F20 DQA0_29/DQA_29 EDCA0_3/QSA_3/RDQSA_3 E20 QSAP_3 88 Y1 DQB0_29/DQB_29 EDCB0_3/QSB_3/RDQSB_3 V5 QSBP_3 90
MDA30 D19 E16 QSAP_4 89 MDB30 Y3 AB5 QSBP_4 91
89 MDA[32..63] E18 DQA0_31/DQA_31 EDCA1_1/QSA_5/RDQSA_5 E12 QSAP_5 89 91 MDB[32..63] Y5 DQB0_31/DQB_31 EDCB1_1/QSB_5/RDQSB_5 AH1 QSBP_5 91
MDA32 C18 J10 QSAP_6 89 MDB32 AA4 AJ9 QSBP_6 91
A18 D7 QSAP_7 89 AB6 AM5 QSBP_7 91
F18 DQA1_2/DQA_34 AB1 DQB1_2/DQB_34
MDA35 D17 A34 QSAN_0 88 MDB35 AB3 G7 QSBN_0 90
MDA36 DQA1_3/DQA_35 DDBIA0_0/QSA_0B/WDQSA_0 MDB36 DQB1_3/DQB_35 DDBIB0_0/QSB_0B/WDQSB_0
A16 E30 QSAN_1 88 AD6 K1 QSBN_1 90
F16 E26 QSAN_2 88 AD1 P1 QSBN_2 90
D15 C20 QSAN_3 88 AD3 W4 QSBN_3 90
E14 C16 QSAN_4 89 AD5 AC4 QSBN_4 91
F14 C12 QSAN_5 89 AF1 AH3 QSBN_5 91
D13 DQA1_9/DQA_41 DDBIA1_2/QSA_6B/WDQSA_6 J11 QSAN_6 89 AF3 DQB1_9/DQB_41 DDBIB1_2/QSB_6B/WDQSB_6 AJ8 QSBN_6 91
MDA42 F12 F8 QSAN_7 89 MDB42 AF6 AM3 QSBN_7 91
A12 DQA1_11/DQA_43 AG4 DQB1_11/DQB_43 0109: EMI Reserve, Place Near C8401
MDA44 D11 J21 MDB44 AH5 T7
MDA45 DQA1_12/DQA_44 ADBIA0/ODTA0 ODTA0 88 MDB45 DQB1_12/DQB_44 ADBIB0/ODTB0 ODTB0 90
F10 DQA1_13/DQA_45 ADBIA1/ODTA1 G19 ODTA1 89 AH6 DQB1_13/DQB_45 ADBIB1/ODTB1 W7 ODTB1 91
MDA46 A10 MDB46 AJ4
MDA47 DQA1_14/DQA_46 MDB47 DQB1_14/DQB_46 DRAM_RST_RC
C10 H27 AK3 L9
C MDA48 DQA1_15/DQA_47 CLKA0 CLKA0 88 MDB48 DQB1_15/DQB_47 CLKB0 CLKB0 90 C
G13 G27 AF8 L8
MDA49 DQA1_16/DQA_48 CLKA0# CLKA0# 88 MDB49 DQB1_16/DQB_48 CLKB0# CLKB0# 90
H13 DQA1_17/DQA_49 AF9 DQB1_17/DQB_49
2
MDA50 J13 J14 MDB50 AG8 AD8
MDA51 DQA1_18/DQA_50 CLKA1 CLKA1 89 MDB51 DQB1_18/DQB_50 CLKB1 CLKB1 91 EC8401
H11 DQA1_19/DQA_51 CLKA1# H14 CLKA1# 89 AG7 DQB1_19/DQB_51 CLKB1# AD7 CLKB1# 91
MDA52 MDB52
G10 AK9
DY
1
DQA1_20/DQA_52 DQB1_20/DQB_52
Do Not Stuff
MDA53 G8 K23 MDB53 AL7 T10
MDA54 DQA1_21/DQA_53 RASA0# RASA0# 88 MDB54 DQB1_21/DQB_53 RASB0# RASB0# 90
K9 K19 AM8 Y10
MDA55 DQA1_22/DQA_54 RASA1# RASA1# 89 MDB55 DQB1_22/DQB_54 RASB1# RASB1# 91
K10 DQA1_23/DQA_55 AM7 DQB1_23/DQB_55
MDA56 G9 K20 MDB56 AK1 W10
MDA57 DQA1_24/DQA_56 CASA0# CASA0# 88 MDB57 DQB1_24/DQB_56 CASB0# CASB0# 90
A8 K17 AL4 AA10
MDA58 DQA1_25/DQA_57 CASA1# CASA1# 89 MDB58 DQB1_25/DQB_57 CASB1# CASB1# 91
C8 AM6
MDA59 DQA1_26/DQA_58 MDB59 DQB1_26/DQB_58
E8 DQA1_27/DQA_59 CSA0_0# K24 CSA0#_0 88 AM1 DQB1_27/DQB_59 CSB0_0# P10 CSB0#_0 90
MDA60 A6 K27 MDB60 AN4 L10
MDA61 DQA1_28/DQA_60 CSA0_1# MDB61 DQB1_28/DQB_60 CSB0_1#
C6 AP3
MDA62 DQA1_29/DQA_61 MDB62 DQB1_29/DQB_61
E6 M13 AP1 AD10
MDA63 DQA1_30/DQA_62 CSA1_0# CSA1#_0 89 MDB63 DQB1_30/DQB_62 CSB1_0# CSB1#_0 91
A5 K16 AP5 AC10
DQA1_31/DQA_63 CSA1_1# DQB1_31/DQB_63 CSB1_1#
MVREFDA L18 K21 U10
MVREFSA MVREFDA CKEA0 CKEA0 88 MVREFDB CKEB0 CKEB0 90
L20 MVREFSA CKEA1 J20 CKEA1 89 Y12 MVREFDB CKEB1 AA11 CKEB1 91
MVREFSB AA12 1D5V_VGA_S0
MEM_CALRN0 MVREFSB
L27 K26 N10
MEM_CALRN1 MEM_CALRN0 WEA0# WEA0# 88 WEB0# WEB0# 90
N12 L15 AB11
MEM_CALRN1 WEA1# WEA1# 89 WEB1# WEB1# 91
1
MEM_CALRN2 AG12
MEM_CALRN2
MEM_CALRP1 M12 H23 MAA13 88,89 AD28 T8 MAB13 90,91 DY R8401
MEM_CALRP1 MAA0_8 83 TESTEN TESTEN MAB0_8 Do Not Stuff
MEM_CALRP0 M27 J19 W8
MEM_CALRP0 MAA1_8 MAB1_8
GDDR5
MEM_CALRP2 AH12 CLKTESTA AK10 DIS_PX
GDDR5
2
MEM_CALRP2 CLKTESTB AL10 CLKTESTA DRAM_RST
CLKTESTB DRAM_RST AH11 1 R8420 2 DRAM_RST_RC 1 2 MEM_RST 88,89,90,91
10R2J-2-GP R8402 51R2J-2-GP
DIS_PX DIS_PX
2
DIS_PX C8407 R8404 C8401
DIS_PX
SC120P50V2JN-1GP
Do Not Stuff 5K1R2F-2-GP
1
CLKTESTA_C 1 2 CLKTESTA ROBSON-PRO-M2-GP
ROBSON-PRO-M2-GP DY DIS_PX
1
C8406
Do Not Stuff VANCOUVER
CLKTESTB_C 1 2 CLKTESTB
B B
Modify Dummy Name For Co-lay DY
1
If for Mannhatton,have to change to other value

R8419 DY DY
1D5V_VGA_S0 Do Not Stuff R8418
Do Not Stuff Place all these components very close to GPU (Within
Whistler
*
25mm) and keep all component close to each Other
2
route 50ohms single-ended/100ohms diff and keep short

1 2 MEM_CALRN0
Do Not Stuff R8403
Debug only, for clock observation, if not needed, DNI
** This basic topology should be used for DRAM_RST for
DIS_PX DDR3/GDDR3/GDDR5.These Capacitors and Resistor values
1 2 MEM_CALRN1 are an example only. The Series R and || Cap values
243R2F-2-GP R8405 will depend on the DRAM load and will have to be
Whistler PLACE MVREF DIVIDERS AND CAPS CLOSE TO ASIC calculated for different Memory ,DRAM Load and board
1 2 MEM_CALRN2 to pass Reset Signal Spec.
Do Not Stuff R8406
1D5V_VGA_S0 1D5V_VGA_S0 1D5V_VGA_S0 1D5V_VGA_S0
Whistler
1
R8408 1 2 MEM_CALRP0 Ra R8410 Ra R8411 R8412 R8413

Do Not Stuff Whistler Do Not Stuff Do Not Stuff Ra 40D2R2F-GP Ra 40D2R2F-GP DDR3/GDDR3 Memory Stuff Option(Mad/Park)
DIS_PX Whistler DIS_PX DIS_PX
2
R8407 1 2 MEM_CALRP1 MVREFDA MVREFSA MVREFDB MVREFSB

243R2F-2-GP GDDR5 GDDR3 DDR3
1
Whistler Whistler C8402 Whistler C8403 DIS_PXC8404 DIS_PXC8405

Whistler R8414 R8415 R8416 R8417
R8409 1 2 MEM_CALRP2 Rb Do Not Stuff Rb Do Not Stuff Rb 100R2F-L1-GP-U Rb 100R2F-L1-GP-U MVDDQ 1.5V 1.8V/1.5V 1.5V
2
Do Not Stuff Do Not Stuff Whistler Do Not Stuff DIS_PX SCD1U10V2KX-5GP DIS_PX SCD1U10V2KX-5GP
2
Ra 40.2R 40.2R 40.2R
Rb 100R 100R 100R

A A
Whistler Pop All MEM_CAR Whistler Only Robson_Seymour_Whistler Need Pop

Robson_& Seymour "M2" Only Pop
MEM_CALRN1 & MEM_CALRP1 DQ15 AMD DIS SAMSUNG TI
Wistron Corporation
Title
GPU_Memory(2/5)
5 4 3 2 1
5 4 3 2 1
LVDS Interface
1228: Modify Table VGA1B 2 OF 8
FOR HDMI 1.4 VGA1G 7 OF 8
Default 1G + Hynix Vram, 0011 72.52G63.A0U
1D8V_VGA_S0
MEMORY ID Table TXCAP_DPA3P
AU24 HDMI_CLK 51
LVDS CONTROL
VARY_BL
AK27
AV23 HDMI_CLK# 51 AJ27
TXCAM_DPA3N DIGON
DVPDATA[3:0] Description PN
AT25 HDMI_DATA0 51
MUTI GFX TX0P_DPA2P
AR24 HDMI_DATA0# 51
DPA TX0M_DPA2N
0001 DDR3 Hynix-H5TQ2G63BFR-11C (900MHz) 128M*16 72.52G63.A0U
AU26 HDMI_DATA1 51 AK35
TX1P_DPA1P TXCLK_UP_DPF3P
AV25 HDMI_DATA1# 51 AL36
TX1M_DPA1N TXCLK_UN_DPF3N
2
0011 DDR3 Hynix-H5TQ1G63DFR-11C (900MHz) 64M*16 72.51G63.H0U
R8523 R8522 R8519 R8518 AR8 AT27 HDMI_DATA2 51 AJ38
DVPCNTL_MVP_0 TX2P_DPA0P TXOUT_U0P_DPF2P
Do Not Stuff
Do Not Stuff
10KR2J-3-GP
Do Not Stuff
DY DY HYNIX AU8 AR26 AK37
DVPCNTL_MVP_1 TX2M_DPA0N HDMI_DATA2# 51 TXOUT_U0N_DPF2N
SAMSUNG_Gdie
0010 DDR3 SAMSUNG-K4W2G1646C-HC11(900MHz) 128M*16 72.42164.D0U AP8
DVPCNTL_0
AW8 AR30 AH35
1
DVPCNTL_1 TXCBP_DPB3P TXOUT_U1P_DPF1P
D AR3 AT29 AJ36 D
DVPCNTL_2 TXCBM_DPB3N TXOUT_U1N_DPF1N
0000 DDR3 SAMSUNG-K4W1G1646G-BC11 (900MHz) 64M*16 72.41646.Q0U AR1
DVPCLK
MEM_ID0 AU1 AV31 AG38
MEM_ID1 AU3 DVPDATA_0 TX3P_DPB2P TXOUT_U2P_DPF0P
AU30 AH37
MEM_ID2 AW3 DVPDATA_1 DPB TX3M_DPB2N TXOUT_U2N_DPF0N
MEM_ID3 DVPDATA_2
AP6 AR32 AF35
DVPDATA_3 TX4P_DPB1P TXOUT_U3P
AW5 AT31 AG36
DVPDATA_4 TX4M_DPB1N TXOUT_U3N
AU5
DVPDATA_5
AR6 AT33
THERMTRIP_R
DVPDATA_6 TX5P_DPB0P LVTMDP
AW6 AU32
DVPDATA_7 TX5M_DPB0N
AU6
THERMTRIP_VGA DVPDATA_8
AT7 AU14 AP34
DVPDATA_9 TXCCP_DPC3P TXCLK_LP_DPE3P
1
AV7 AV13 AR34
R8508 DVPDATA_10 TXCCM_DPC3N TXCLK_LN_DPE3N
0914: Change R8518 Part Reference To HYNIX AN7
DVPDATA_11
For Hynix + Vram 1G, Pop R8518, Pop R8519 AV9 AT15 AW37
Do Not Stuff DVPDATA_12 TX0P_DPC2P TXOUT_L0P_DPE2P
AT9 AR14 AU35
For Hynix + Vram 512M, Pop R8518, De-pop R8519 DVPDATA_13 TX0M_DPC2N TXOUT_L0N_DPE2N
DY AR10
2
DVPDATA_14
6
For Samsung+Vram1G, De-pop R8518, Pop R8519 AW10 DPC AU16 AR37
Q8501 DVPDATA_15 TX1P_DPC1P TXOUT_L1P_DPE1P
For Samsung+Vram512M, De-pop R8518, De-POP R8519 AU10 AV15 AU39
DVPDATA_16 TX1M_DPC1N TXOUT_L1N_DPE1N
Do Not Stuff DY AP10
DVPDATA_17
AV11 AT17 AP35
Do Not Stuff AT11
DVPDATA_18 TX2P_DPC0P
AR16
TXOUT_L2P_DPE0P
AR35
1
2nd = 84.DM601.03F DVPDATA_19 TX2M_DPC0N TXOUT_L2N_DPE0N

AR12
DVPDATA_20
AW12 AU20 AN36
DVPDATA_21 TXCDP_DPD3P TXOUT_L3P
AU12 AT19 AP37
DVPDATA_22 TXCDM_DPD3N TXOUT_L3N
AP12
DVPDATA_23
6,18,36 H_THERMTRIP# TX3P_DPD2P
AT21 DIS_PX
AR20
TX3M_DPD2N
DPD AU22 ROBSON-PRO-M2-GP
27 THERMTRIP_VGA_GATE TX4P_DPD1P
AV21
TX4M_DPD1N
I2C AT23
TX5P_DPD0P
0708: Need To Pick GPIO TX5M_DPD0N
AR22
0708: Add Thermal Shutdown Circuit AK26
SCL
0107: SW Will Not Use This Function, DY For Reserve Only AJ26
SDA
I2C Bus for LVDS GENERAL PURPOSE I/O R
AD39 VGA_CRT_RED 94
AD37
R#
83 TX_PWRS_ENB AH20
GPIO_0 1D8V_VGA_S0
83 TX_DEEMPH_EN AH18
GPIO_1 G
AE36 VGA_CRT_GREEN 94 (1.8V@65mA AVDD)
C 83 BIF_GEN2_EN_A AN16 AD35 AVDD C
GPIO_VGA_03_DATA AH23 GPIO_2 G#
GPIO_VGA_04_CLK AJ23 GPIO_3_SMBDATA
AF37 VGA_CRT_BLUE 94 1 2
GPIO_4_SMBCLK B R8512 Do Not Stuff
83 GPIO5_AC_BATT AH17 AE38
GPIO_5_AC_BATT B#
1
1 GPIO6_VGA AJ17 DAC1 C8503 C8504
GPIO_6 DIS_PX
Do Not Stuff
TP8505 Do Not Stuff AK17 AC36 C8501 DY DY DY Do Not Stuff
GPIO_7_BLON HSYNC VGA_CRT_HSYNC 83,94
83 GPIO8_ROMSO AJ13 AC38 Do Not Stuff
2
GPIO_8_ROMSO VSYNC VGA_CRT_VSYNC 83,94
83 VGA_DIS AH15
GPIO_9_ROMSI
AJ16
GPIO_10_ROMSCK GPU_RSET
DIS_PX AVSSQ
83 CONFIG0 AK16 AB34 1 2
GPIO_11 RSET R8514 499R2F-2-GP
83 CONFIG1 AL16
GPIO_12 AVDD VDD1DI
83 CONFIG2 AM16 AD34
VPIO14_VGA GPIO_13 AVDD
1 AM14
GPIO_14_HPD2 AVSSQ
AE34 (1.8V@100mA VDD1DI) 0112: Dummy Cap
TP8506 Do Not Stuff AM13 1 2
92 PWRCNTL_0 GPIO_15_PWRCNTL_0
1 Do Not Stuff GPIO16_SSIN AK14 AC33 VDD1DI R8511 Do Not Stuff
GPIO_16_SSIN VDD1DI
1
TP8502 GPIO17_VGA AG30 AC34 C8506 C8507
GPIO_17_THERMAL_INT VSS1DI DIS_PX
Do Not Stuff
1 Do Not Stuff EDP_HPD_DET AN14 AVSSQ C8502 DY DY DY Do Not Stuff
TP8507 THERMTRIP_VGA GPIO_18_HPD3 Do Not Stuff
AM17
2
GPIO_19_CTF R8506
92 PWRCNTL_1 AL13 AC30
GPIO_20_PWRCNTL_1 R2
83 GPIO21_BB_EN AJ14 AC31 1 2
GPIO_21_BB_EN R2#
83 BIOS_ROM_EN AK13
3D3V_VGA_S0 GPIO_22_ROMCS# Do Not Stuff
18 PEG_CLKREQ# AN13 AD30
GPIO_23_CLKREQ# G2 VDD2DI
83 JTAG_TRST#_VGA AM23 AD31
TP8501 JTAG_TRST# G2#
1 Do Not Stuff JTAG_TDI_VGA AN23 AVSSQ
JTAG_TDI
83 JTAG_TCK_VGA AK23
JTAG_TCK B2
AF30 (1.8V@50mA VDD2DI)
83 JTAG_TMS_VGA AL24 AF31 1 2
JTAG_TMS B2#
2
TP8503 1 Do Not Stuff JTAG_TDO_VGA AM24 R8507 Do Not Stuff

R8532 TP8504 Do Not Stuff GEN_A JTAG_TDO
1 AJ19
GENERICA DIS_PX
10KR2J-3-GP
DIS_PX XTALOUT DY1 R8502 2 TP8508 1 Do Not Stuff GEN_B AK19 AC32
Do Not Stuff TP8512 Do Not Stuff GENERICC GENERICB C
1 AJ20 AD32
TP8513 Do Not Stuff GENERICD GENERICC Y
1 AK20 AF32
1
TP8509 Do Not Stuff GENERICE_HPD4 GENERICD COMP

1 AJ24
TP8514 Do Not Stuff GENERICF GENERICE_HPD4 DAC2
For new version no 27M 1 AH26
GENERICF 0112: Remove Cap
TP8515 1 Do Not Stuff GENERICG AH24 AD29
GENERICG H2SYNC HSYNC_DAC2 83
GPIO17_VGA AC29 A2VDDQ
V2SYNC VSYNC_DAC2 83
VDD2DI
1D8V_VGA_S0 AK24 (1.8V@1.5mA A2VDDQ)
51 HDMI_HPD_DET HPD1
AG31 1 2
VDD2DI R8510 Do Not Stuff
AG32
VSS2DI
1
A2VDD
PLACE VREFG DIVIDER AND CAP R8515 DIS_PX
B B
CLOSE TO ASIC DIS_PX499R2F-2-GP A2VDD
AG33 A2VDDQ
1D8V_VGA_S0 DPLL_PVDD AD33

2
GPU_VREFG A2VDDQ
(1.8V@75mA DPLL_PVDD) AH13
VREFG
L8501
DIS_PX AF33
A2VSSQ
1
1 2 C8514 DPLL_PVDD A2VDD

1
SCD1U10V2KX-5GP
BLM18PG471SN1D-GP C8516 R8516 DIS_PX 3D3V_VGA_S0

1
1
SCD1U10V2KX-5GP
C8515 249R2F-GP DIS_PX AA29 R2SET 1 2 (3.3V@130mA A2VDD)

SC1U6D3V2KX-GP
R2SET
1
C8505 R8517 715R2F-GP

DY DIS_PX AM32 1 2
2
Do Not Stuff DPLL_PVDD R8509 Do Not Stuff

DIS_PX DIS_PX AN32 DDC1/DDC2/DDC6 have 5V-tolerant
2
DPLL_PVSS
DIS_PX
2
DDC/AUX AM26
DDC1CLK VGA_CRT_DDCCLK 94
AN31 PLL/CLOCK AN26 DDC1 channel for CRT
DPLL_VDDC DDC1DATA VGA_CRT_DDCDATA 94
AM27
1V_VGA_S0 DPLL_VDDC XTALIN AUX1P
(1.0V@125mA DPLL_VDDC) AV33
XTALIN AUX1N
AL27
DIS_PX (1.1V@150mA DPLL_VDDC For M96/M92) XTALOUT AU34 FOR HDMI 1.4
XTALOUT
1 2 AM19 GPU_DDC_CLK_HDMI 51
L8506 BLM18PG471SN1D-GP DDC2CLK
DDC2DATA
AL19 GPU_DDC_DATA_HDMI 51 DDC2 channel for HDMI
C8519 TP8516 1 Do Not Stuff XO_IN AW34
XO_IN
1
C8518 AN20
AUX2P
SCD1U10V2KX-5GP
C8517 DY DIS_PXDIS_PX AW35 AM20 AUXP PD 100K

SC1U6D3V2KX-GP
Do Not Stuff SS_IN AUX2N

0107 Modify:
2
AL30 AUXN PU 100K

Removed P2800 Circuit , So does C8523. DDCCLK_AUX3P
DDCDATA_AUX3N
AM30 Draw on EDP circuit page
Do Not Stuff AL29
TP8519 DDCCLK_AUX4P
Clock Input Configuraiton -GDDR3/DDR3 1P2800_VGA_DXP AF29 AM29
TP8520 DPLUS THERMAL DDCDATA_AUX4N
1P2800_VGA_DXN AG29
a) 27MHz crystal connected to XTALIN or XTALOUT or Do Not Stuff DMINUS
AN21
DDCCLK_AUX5P
b) 27MHz (1.8V) oscillator connected to XTALIN or TP8511 DDCDATA_AUX5N
AM21 1027 Modify: Use VGA Smbus Instead of use another P2800
1 Do Not Stuff FAN_PWM_C AK32
TS_FDO
c) 27MHz (3.3V) oscillator connected to XO_IN (Park, Madison, and Broadway only) DDC6CLK
AJ30
AL31 AJ31 3D3V_VGA_S0
1D8V_VGA_S0 TSVDD TS_A DDC6DATA
L8504 DIS_PX (1.8V@20mA TSVDD) AK30
DDCCLK_AUX7P
1 2 AJ32 AK29
BLM15BD121SS1D-GP TSVDD DDCDATA_AUX7N
AJ33
TSVSS DIS_PX
DIS_PX 68.00084.F81
1
3
4
R8524 C8520
DIS_PXC8521
SC1U6D3V2KX-GP
C8522
A Do Not Stuff
DY DIS_PXSCD1U10V2KX-5GP ROBSON-PRO-M2-GP RN8501
A
1 2 DIS_PX SRN4K7J-8-GP
2
1MR2J-1-GP
C8524 X8501
2
1
Q8503
1 2 XTALIN 1 4 GPIO_VGA_04_CLK 1 6 SML1_CLK 6,27 DQ15 AMD DIS SAMSUNG TI
DIS_PX DIS_PX C8525 2 DIS_PX
5
SC12P50V2JN-3GP 2 3 XTALOUT 1 2 3 4 Wistron Corporation

XTAL-27MHZ-85-GP
DIS_PX SC12P50V2JN-3GP 2N7002KDW-GP Taipei Hsien 221, Taiwan, R.O.C.
84.2N702.A3F
82.30034.641
2nd = 82.30034.651 2nd = 84.DM601.03F
Title
3rd = 82.30034.681 SML1_DATA 6,27

GPU_DP/LVDS/CRT/GPIO(3/5)
GPIO_VGA_03_DATA Size Document Number Rev
A2
5 4 3 2 1
5 4 3 2 1
VGA1E
10/8 5 OF 8
1D8V_VGA_S0
1D5V_VGA_S0 MEM I/O
For DDR3/GDDR5, MVDDQ = 1.5V PCIE
AC7
VDDR1 PCIE_VDDR
AA31 (1.8V@504mA PCIE_VDDR)
AD11 AA32
SC1U6D3V2KX-GP
VDDR1 PCIE_VDDR
1
SCD1U10V2KX-5GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C8601 C8604 C8605 C8606 C8607 C8608 C8611 C8612 C8613 C8614 AF7 AA33 C8619 C8615 C8617 C8616 C8618
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VDDR1 PCIE_VDDR SC4D7U6D3V3KX-GP
AG10 AA34
VDDR1 PCIE_VDDR
AJ7 V28
2
VDDR1 PCIE_VDDR
DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX AK8
VDDR1 PCIE_VDDR
W29 DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX
AL9 W30
VDDR1 PCIE_VDDR 1V_VGA_S0
G11 Y31
VDDR1 PCIE_VDDR
G14
VDDR1
G17
VDDR1
G20
VDDR1 PCIE_VDDC
G30 (1.0V@1920mA PCIE_VDDC)
1
SCD1U10V2KX-5GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C8621 C8698 C8696 C8622 C8623 C8624 C8636 C8625 C8635 C8627 G23 G31
VDDR1 PCIE_VDDC
SC4D7U6D3V3KX-GP
G26 H29 C8628 C8629 C8630 C8631 C8632 C8633 C8602 C8634
VDDR1 PCIE_VDDC
1
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
G29 H30
2
VDDR1 PCIE_VDDC
D DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX H10 J29 D
2
VDDR1 PCIE_VDDC
J7 J30 DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX
2
VDDR1 PCIE_VDDC
J9
VDDR1 PCIE_VDDC
L28 DIS_PX
K11 M28
VDDR1 PCIE_VDDC
K13 N28
VDDR1 PCIE_VDDC
K8 R28
VDDR1 PCIE_VDDC
DG COST DOWN L12
VDDR1 PCIE_VDDC
T28
L16 U28
VDDR1 PCIE_VDDC VGA_CORE
L21
VDDR1
1
C8603 C8697 L23
VDDR1
L26 AA15
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
VDDR1 CORE VDDC
L7 AA17
2
VDDR1 VDDC
1
SC1U6D3V2KX-GP
DIS_PX DIS_PX M11 AA20 C8664 C8637 C8638 C8639 C8640 C8641 C8642 C8643 C8644
VDDR1 VDDC
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
Do Not Stuff
SC1U6D3V2KX-GP
Do Not Stuff
N11 AA22 SC1U6D3V2KX-GP
VDDR1 VDDC
P7 AA24
2
VDDR1 VDDC
R11
VDDR1 VDDC
AA27 DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DY DIS_PX DY DIS_PX
U11 AB16
VDDR1 VDDC
U7 AB18
VDDR1 VDDC
Y11 AB21
VDDR1 VDDC
Y7 AB23
VDDR1 VDDC
AB26
1D8V_VGA_S0 VDDC
AB28
VDDC
1
Do Not Stuff
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AC17 C8645 C8646 C8647 C8648 C8649 C8669 C8670 C8671 C8672
VDDC
Do Not Stuff
SCD1U10V2KX-5GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
AC20
SC1U6D3V2KX-GP
VDDC_CT LEVEL VDDC
L8601 AC22
2
VDDC
(1.8V@110mA VDD_CT) TRANSLATION
VDDC
AC24 DY DIS_PX DIS_PX DIS_PX DIS_PX DY DIS_PX DIS_PX DIS_PX
POWER
1 2 AF26 AC27
VDD_CT VDDC
SCD1U10V2KX-5GP
AF27 AD18
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VDD_CT VDDC
1
SC4D7U6D3V3KX-GP
BLM15BD121SS1D-GP C8650 C8651 C8652 C8653 C8654 AG26 AD21
VDD_CT VDDC
DIS_PX AG27
VDD_CT VDDC
AD23
AD26
2
VDDC
68.00084.F81 DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX VDDC
AF17
2ND = 68.00217.701 I/O
VDDC
AF20
AF23 AF22
3D3V_VGA_S0 VDDR3 VDDC
AF24 AG16
VDDR3 VDDC
AG23
VDDR3 VDDC
AG18 Only For PX 3.0 Validation If Need
AG24 AG21
VDDR3 VDDC
AH22
VDDC
1
1
C8665 SC1U6D3V2KX-GP C8666 C8667 C8668 AH27
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VDDC
SC4D7U6D3V3KX-GP
AF13 AH28 BIF_VDDC VGA_CORE

VDDR4 VDDC
AF15 M26
2
2
VDDR4 VDDC
DIS_PX DIS_PX DIS_PX DIS_PX AG13
VDDR4 VDDC
N24
55mA in BACO mode
AG15 N27 R8608 1 2
VDDR4 VDDC Do Not Stuff
VDDC
R18 DY
R21
C VDDC C
AD12 R23
VDDR4 VDDC
AF11 R26
VDDR4 VDDC
1
AF12 T17 C8695 C8699
VDDR4 VDDC
SC4D7U6D3V3KX-GP
AG11 T20 DIS_PX DIS_PX
SC10U6D3V3MX-GP
VDDR4 VDDC
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
T22
2
VDDC
1
C8673 C8674 M96 Only T24

VDDC
T27
VDDC
U16
2
VDDC
DIS_PX DIS_PX 1VDDRHA M20 U18
Do Not Stuff TP8604 NC_VDDRHA VDDC
1VSSRHA M21 U21
Do Not Stuff TP8605 NC_VSSRHA VDDC
U23
VDDC
U26
VDDC
1VDDRHB V12 V17
Do Not Stuff TP8606 NC_VDDRHB VDDC
1VSSRHB U12 V20
Do Not Stuff TP8607 NC_VSSRHB VDDC
V22
VDDC
V24
VDDC
V27
PCIE_PVDD VDDC
Y16
L8602
(1.8V@40mA PCIE_PVDD) PLL VDDC
VDDC
Y18 VDDCI and VDDC should have seperate regulators with a merge option on PCB 0603
1 2 AB37
PCIE_PVDD VDDC
Y21 Vgs(th):0.7~1.5 V
SCD1U10V2KX-5GP
BLM15BD121SS1D-GP MPV18
VDDC
Y23
For Madison and Park, VDDCI and VDDC can share one common regulator low Rds(on) U8603 U8605
1
DIS_PX C8675 C8676 C8677 H7 Y26 VGA_CORE

SC1U6D3V2KX-GP
MPV18 VDDC
SC4D7U6D3V3KX-GP
H8 Y28 BIF_VDDC AO3400A-GP AO3400A-GP

SPV10 SPV18 MPV18 VDDC
68.00084.F81
2
2ND = 68.00217.701 DIS_PX DIS_PX DIS_PX VGA_CORE S D BIF_VDDC_CORE

D S
1V_VGA_S0 AM10
L8603 SPV18 3D3V_VGA_S0 5V_S0
(120mA SPV10) VDDCI
AA13
1 DIS_PX 2 AN9 AB13 DIS_PX DIS_PX
G
SPV10 VDDCI
1
SCD1U10V2KX-5GP
BLM15BD121SS1D-GP AC12 C8681 C8682 C8683 C8684 C8685 C8686 84.03400.B37 84.03400.B37
SC1U6D3V2KX-GP
VDDCI
1
1
SC4D7U6D3V3KX-GP
SCD1U10V2KX-5GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C8678 C8679 C8680 AN10 AC15 C8687 2nd = 84.03404.C31 2nd = 84.03404.C31
SPVSS VDDCI SC10U6D3V5KX-1GP
68.00084.F81 AD13
2
VDDCI
2ND = 68.00217.701 AD16 DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX
2
2
VDDCI
1
DIS_PX DIS_PX DIS_PX VDDCI
M15
M16 R8610 R8607
VDDCI Do Not Stuff
VOLTAGE
VDDCI
M18 DIS_PX 1KR2J-1-GP
SENESE M23 DY
VDDCI VGA_CORE
(For M97, Broadway, Madison and Park SPV10 = 1.0V) N13
2
VDDCI PX_EN##
92 FB_VDDC AF28 N15
FB_VDDC VDDCI
N17
VDDCI
SCD1U10V2KX-5GP
N20
VDDCI
1
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
1FB_VDDCI AG28 N22 C8655 C8656 C8657 C8658 C8659 C8660 C8661 C8662 C8663
TP8602 Do Not Stuff FB_VDDCI ISOLATED VDDCI
R12
VDDCI
CORE I/O R13 DG COST DOWN? 1027 Modify: Change Baco Mos Gate Power Rail
2
VDDCI
92 FB_GND AH29
FB_GND VDDCI
R16 DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX To 5V_S0 & Also Reserve 3D3V_VGA_S0
T12
B VDDCI B
VDDCI
T15 DIS_PX
VDDCI
V15 DIS_PX U8602 U8604
Y13 1V_VGA_S0
VDDCI BIF_VDDC AO3418-GP AO3418-GP
ROBSON-PRO-M2-GP 1122 Modify: Dummy 1D5V PowerOK Cost Down S D BIF_VDDC_1V

D S
3D3V_VGA_S0 5V_S0
SPV18 DIS_PX 3D3V_S5 3D3V_VGA_S0
L8604 84.03418.031 84.03418.031
G
(1.8V@75mA SPV18)
1 2
SCD1U10V2KX-5GP
Not Stuff
Not Stuff
R8604
R8605
1
BLM15BD121SS1D-GP C8689 C8690
1
DIS_PX C8688 DIS_PX DIS_PX DIS_PX
SC1U6D3V2KX-GP
Do 2
Do 1
R8609 R8606
2
68.00084.F81 Do Not Stuff DIS_PX 1KR2J-1-GP

SC4D7U6D3V3KX-GP
2ND = 68.00217.701 DY DY DY
Q8603
2
PX_EN#
2
Q8603_G G
1122 Modify: Change Net from 1D5V_VGA_PWOK_R to DGPU_PWROK D 1D5V_VGA_PWOK

DY
S Non-BACO= HIGH
Q8604
(M97, Broadway and Madison: 1.8V@150mA MPV18) R8603
C
Do Not Stuff BACO = LOW PX_EN 8209A_EN/DEM_VGA1D5V_VGA_PWOK_R PX_EN# PX_EN##
DGPU_PWROK R8601 2 1D5V_VGA_PWOK_R Q8604_B DY B Do Not Stuff
(Park: 1.8V@75mA MPV18) 1 1D5V_VGA_S0 1 2
L8605
MPV18 DY Do Not Stuff
Do Not Stuff Non-BACO 0 1 1 0 1
2ND = 84.2N702.031
E
Do Not Stuff
1 2 DIS_PX
SCD1U10V2KX-5GP
Do Not Stuff
SC1U6D3V2KX-GP
1
BLM15BD121SS1D-GP C8692 C8694 2ND = 84.03904.P11 BACO 1 0 0 1 0

DIS_PX C8691 DIS_PX DIS_PX DIS_PX 3rd = 84.03904.L06
2
68.00084.F81 PX_EN# = High, BIF_VDDC = 1V_VGA_S0

SC4D7U6D3V3KX-GP
2ND = 68.00217.701
PX_EN## = High, BIF_VDDC = VGA_CORE
3D3V_VGA_S0
PX_EN Mode BIF_VDDC 1D5V_VGA_PWOK
A 0 Normal VGA_Core A
R8602 1 DY 2
17,92,93 DGPU_PWROK
Do Not Stuff U8607 Non-BACO= HIGH Q8602
1 BACO 1V_VGA 1
B
5 BACO = LOW 4 3
VCC
92,93 8209A_EN/DEM_VGA 2
A 1D5V_VGA_PWOK_R PX_EN#
DY Y
4 5 DIS_PX2
3
GND PX_EN##
Q8601 6 1 DQ15 AMD DIS SAMSUNG TI
Do Not Stuff
87 PX_EN G Do Not Stuff Non-BACO= HIGH 2N7002KDW-GP
D
2ND = 73.7SZ08.DAH BACO = LOW 84.2N702.A3F Non-BACO= LOW Wistron Corporation
DIS_PX 2nd = 84.DM601.03F 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
S BACO = HIGH Taipei Hsien 221, Taiwan, R.O.C.
Title
2N7002K-2-GP GPU_POWER(4/5)
84.2N702.J31 1122 Modify: Dummy U8607, R8602 And GATE Cost Down
2ND = 84.2N702.031 Custom
5 4 3 2 1
5 4 3 2 1
DNI for M96/M92
1D8V_VGA_S0 DPA_VDD18
L8702
DG15 just tied to DPB_VDD18 instead VGA1H 8 OF 8
BLM15BD121SS1D-GP
(1.8V@130mA DPA_VDD18) DPA_VDD18
1 2 DPC_VDD18 DP C/D POWER DP A/B POWER
DIS_PX
1
C8707 C8708 1V_VGA_S0 AP20 AN24
DPC_VDD18 DPA_VDD18
Do Not Stuff
C8706 HDMI1.4 HDMI1.4 HDMI1.4 AP21 AP24
Do Not Stuff Do Not Stuff DPC_VDD18 DPA_VDD18 1V_VGA_S0
2
VGA1F 6 OF 8 DPC_VDD10 DPA_VDD10
(1.0V@110mA DPA_VDD10) L8703 DIS_PX
DPB_VDD18 1 2 (1.0V@110mA DPC_VDD10) AP13 AP31 1 2
DPC_VDD10 DPA_VDD10
1
Do Not Stuff
R8714 Do Not Stuff AT13 AP32 C8702 BLM15BD121SS1D-GP
DPC_VDD10 DPA_VDD10
Do Not Stuff
AB39 A3 Remove EDP C8703
HDMI1.4 HDMI1.4 C8705
HDMI1.4
E39
PCIE_VSS GND
A37 R8702 (1.8V@130mA DPB_VDD18) 0112: Change Dummy Name DIS_PX Do Not Stuff
2
PCIE_VSS GND
F34 AA16 1 2 AN17 AN27
PCIE_VSS GND Do Not Stuff DPC_VSSR DPA_VSSR
F39 AA18 AP16 AP27
PCIE_VSS GND DPC_VSSR DPA_VSSR
1
D G33 AA2 C8710 C8711 AP17 AP28 D
Do Not Stuff
G34 AA21 C8709 HDMI1.4 HDMI1.4 HDMI1.4 AW14 AW24 0112: Change Dummy Name
H31
PCIE_VSS GND
AA23 DIS_PX
Do Not Stuff Do Not Stuff AW16
DPC_VSSR DPA_VSSR
AW26
2
H34 AA26
PCIE_VSS GND DPC_VDD18 DPB_VDD18
H39 AA28
PCIE_VSS GND DPC_VDD18
J31 AA6
PCIE_VSS GND 1V_VGA_S0
J34 AB12 AP22 AP25
PCIE_VSS GND R8710 DPD_VDD18 DPB_VDD18
K31
PCIE_VSS GND
AB15 (1.8V@130mA DPB_VDD18) AP23
DPD_VDD18 DPB_VDD18
AP26
K34 AB17 1 2 1V_VGA_S0
PCIE_VSS GND Do Not Stuff
K39 AB20
PCIE_VSS GND
L31
PCIE_VSS GND
AB22 (1.0V@110mA DPD_VDD10)
L34
PCIE_VSS GND
AB24
DIS_PX AP14
DPD_VDD10 DPB_VDD10
AN33 (1.0V@110mA DPB_VDD10)
M34 AB27 AP15 AP33
PCIE_VSS GND DPD_VDD10 DPB_VDD10
M39 AC11
PCIE_VSS GND
N31
PCIE_VSS GND
AC13 0112: Remove Cap
N34 AC16
PCIE_VSS GND
P31 AC18 AN19 AN29
PCIE_VSS GND DPD_VSSR DPB_VSSR
P34 AC2 AP18 AP29
P39 AC21 AP19 AP30
R34 AC23 AW20 AW30
PCIE_VSS GND DPD_VSSR DPB_VSSR 1D8V_VGA_S0
T31 AC26 AW22 AW32
PCIE_VSS GND DPD_VSSR DPB_VSSR DPA_PVDD
T34
PCIE_VSS GND
AC28 (1.8V@20mA DPA_PVDD)
T39 AC6 x01 change tolerant 20091117 L8704 DIS_PX
PCIE_VSS GND DP mode R8701 R8703
U31
PCIE_VSS GND
AD15 DIS_PX 1 2
U34 AD17 (1.8V@130mA DPE_VDD18) 1 2DPCD_CALR AW18 AW28DPAB_CALR1 2 BLM15BD121SS1D-GP
PCIE_VSS GND DPCD_CALR DPAB_CALR
1
V34 AD20 150R2F-1-GP 150R2F-1-GP C8712 C8713 C8714
PCIE_VSS GND
1
Do Not Stuff
Do Not Stuff
V39 AD22 LVDS mode DPC_VDD18 DIS_PX HDMI1.4 HDMI1.4 HDMI1.4
PCIE_VSS GND
W31 AD24 (1.8V@200mA DPE_VDD18) DP E/F POWER DP PLL POWER
2
PCIE_VSS GND Do Not Stuff
W34 AD27 0112: Combine Power AH34 AU28
2
PCIE_VSS GND DPE_VDD18 DPA_PVDD
Y34 AD9 AJ34 AV27
PCIE_VSS GND DPE_VDD18 DPA_PVSS
Y39 AE2
PCIE_VSS GND
AE6
GND LVDS mode
GND
AF10 (1.8V@20mA DPB_PVDD)
GND
AF16 (1.0V@120mA DPE_VDD10) AL33
DPE_VDD10 DPB_PVDD
AV29
AF18 DP mode DPC_VDD10 AM33 AR28
GND DPE_VDD10 DPB_PVSS DPC_PVDD
AF21 (1.0V@110mA DPE_VDD10)
F15
GND
GND GND
GND
GND
AG17
AG2
(1.8V@20mA DPC_PVDD)
F17 AG20 AN34 AU18 DPC_PVDD 1 R8715 2
GND GND DPE_VSSR DPC_PVDD Do Not Stuff
F19 AG22 AP39 AV17
GND GND DPE_VSSR DPC_PVSS
F21
GND GND
AG6 0112: Change Bead To 0603 0 Ohm & Remove Cap AR39
DPE_VSSR DIS_PX
C F23 AG9 AU37 C
GND GND DPE_VSSR
F25 AH21
GND GND
F27 AJ10 AV19
GND GND DP mode DPD_PVDD
F29 AJ11 AR18
GND GND DPD_PVSS
F31
GND GND
AJ2 (1.8V@130mA DPF_VDD18)
F33 AJ28 LVDS mode AF34
GND GND DPC_VDD18 DPF_VDD18
F7
GND GND
AJ6 (1.8V@200mA DPF_VDD18) AG34
DPF_VDD18 (1.8V@20mA DPE_PVDD)
F9 AK11 AM37
GND GND DPE_PVDD
G2 AK31 AN38
GND GND DPE_PVSS
G6 AK7
GND GND
H9 AL11 AK33
GND GND DPF_VDD10
J2
GND GND
AL14 AK34
DPF_VDD10 (1.8V@20mA DPF_PVDD)
J27
GND GND
AL17 0507 chaomin DPF_PVDD
AL38
J6 AL2 AM35
GND GND R8708 DPF_PVSS
J8 AL20
GND GND PX_EN_R
K14 AL21 1 2 PX_EN 86 AF39
GND GND Do Not Stuff LVDS mode DPF_VSSR
K7 AL23 AH39
GND GND DPC_VDD10 DPF_VSSR
L11 AL26 (1.0V@120mA DPF_VDD10) AK39
10KR2J-3-GP
GND GND DPF_VSSR

1
L17 Pin AL21 is PX_EN AL32 DP mode AL34

GND GND DIS_PX DPF_VSSR
R8711
L2
GND GND
AL6 (1.0V@110mA DPF_VDD10) AM34
DPF_VSSR
L22
GND GND
AL8 DIS_PX
L24 AM11
GND GND
L6 AM31
2
GND GND
M17
GND GND
AM9 DPE/DPF_VDD10 Share Same GRP, Base on Checklist AM39
DPEF_CALR 0112: Remove Cap, Bead and 0 Ohm
M22 AN11
2DPEF_CALR
GND GND
M24 AN2
GND GND ROBSON-PRO-M2-GP
N16 AN30
GND GND
N18 AN6
GND GND
N2 AN8
N21
GND GND
AP11 DIS_PX
GND GND
N23 AP7
GND GND R8705
N26 AP9
GND GND
N6
GND GND
AR5 DIS_PX 150R2F-1-GP
R15
GND GND
B11 DP[F:E]_VDD10
R17 B13 (LVDS/DP/TMDS Transmitter Power (Links E, F))
1
GND GND
R2 B15
GND GND For dual-link TMDS or LVDS, the associated power supply
R20 B17
GND GND
R22
GND GND
B19 rails can share the filters/decoupling capacitors.
R24 B21
GND GND
R27 B23
GND GND
R6 B25
B GND GND B
T11 B27
GND GND
T13 B29
GND GND
T16 B31
GND GND
T18 B33
GND GND
T21 B7
GND GND
T23 B9
GND GND
T26 C1
GND GND
U15 C39
GND GND
U17 E35
GND GND
U2 E5
GND GND
U20
GND GND
F11 For M97/M96, DPF_VDD18 can be shared with DPE_VDD18
U22 F13
GND GND
U24
GND For M97/M96, DPF_VDD10 can be shared with DPE_VDD10
U27
GND
U6
GND
V11
GND
V16
GND For dual link DVI using DPA AND DPB, DPA_VDDxx and DPB_VDDxx can be shared respectively
V18
GND
V21
GND
V23
GND For dual link DVI using DPC AND DPD, DPC_VDDxx and DPD_VDDxx can be shared respectively
V26
GND
W2
GND
W6
GND For dual link LVDS, DPE_VDDxx and DPF_VDDxx can be shared respectively
Y15
GND
Y17
GND
Y20
GND
Y22 A39 VSS_MECH1 Do Not Stuff 1 TP8701
GND VSS_MECH
Y24 AW1 VSS_MECH2 Do Not Stuff 1 TP8702
GND VSS_MECH
Y27 AW39VSS_MECH3 Do Not Stuff 1 TP8703
GND VSS_MECH
U13
GND
V13
GND
ROBSON-PRO-M2-GP
DIS_PX
A A
Wistron Corporation
Title
GPU_DPPWR/GND(5/5)
A2 QUEEN AMD Muxless/UMA X00
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0 1D5V_VGA_S0
VRAM11 VRAM21
D MDA[0..31] 84 MDA[0..31] 84 D
K8 E3 MDA3 K8 E3 MDA29
VDD DQL0 MDA7 VDD DQL0 MDA24
K2 F7 K2 F7
VDD DQL1 VDD DQL1
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
MDA1 MDA30
C8807
C8806
C8809
C8808
C8811
C8810
C8813
C8812
C8823
C8822
C8815
C8814
C8817
C8816
C8818
C8819
N1 F2 N1 F2
1
1
VDD DQL2 VDD DQL2
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
R9 F8 MDA6 R9 F8 MDA26
B2 H3 B2 H3
D9 H8 D9 H8
2
2
G7 G2 G7 G2
R1 H7 R1 H7
VDD DQL7 VDD DQL7
N9 N9
VDD MDA20 VDD MDA8
D7 D7
DQU0 MDA19 DQU0 MDA14
A8 C3 A8 C3
VDDQ DQU1 VDDQ DQU1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
MDA23 MDA9
C8820
C8821
A1 C8 A1 C8
VDDQ DQU2 VDDQ DQU2
Whistler
Whistler
Whistler
Whistler
MDA18 MDA10
C8801
C8804
C1 C2 C1 C2
1
VDDQ DQU3 MDA22 VDDQ DQU3 MDA15
C9 A7 C9 A7
D2 A2 D2 A2
E9 B8 E9 B8
2
2
F1 A3 F1 A3
VDDQ DQU7 VDDQ DQU7
H9 H9
VDDQ VDDQ
H2 C7 QSAP_2 84 H2 C7 QSAP_1 84
VDDQ DQSU VDDQ DQSU
B7 QSAN_2 84 B7 QSAN_1 84
VRAM1_VREF DQSU# VRAM2_VREF DQSU#
H1 H1
VRAM2_VREF VREFDQ VRAM1_VREF VREFDQ
M8 F3 QSAP_0 84 M8 F3 QSAP_3 84
VRAM_ZQ1 VREFCA DQSL VREFCA DQSL
1 2 L8 G3 QSAN_0 84 2VRAM_ZQ2
1 L8 G3 QSAN_3 84
R8801 Do Not Stuff ZQ DQSL# R8802 Whistler Do Not Stuff ZQ DQSL#
Whistler
K1 ODTA0 84 K1 ODTA0 84
ODT ODT
84,89 MAA0 N3 84,89 MAA0 N3
A0 A0
84,89 MAA1 P7 84,89 MAA1 P7
A1 A1
84,89 MAA2 P3 L2 CSA0#_0 84 84,89 MAA2 P3 L2 CSA0#_0 84
C A2 CS# A2 CS# C
84,89 MAA3 N2 T2 MEM_RST 84,89,90,91 84,89 MAA3 N2 T2 MEM_RST 84,89,90,91
A3 RESET# A3 RESET#
84,89 MAA4 P8 84,89 MAA4 P8
A4 A4
84,89 MAA5 P2 84,89 MAA5 P2
A5 A5
84,89 MAA6 R8 T7 84,89 MAA6 R8 T7
A6 NC#T7 A6 NC#T7
84,89 MAA7 R2 L9 84,89 MAA7 R2 L9
A7 NC#L9 A7 NC#L9
84,89 MAA8 T8 L1 84,89 MAA8 T8 L1
A8 NC#L1 A8 NC#L1
84,89 MAA9 R3 J9 84,89 MAA9 R3 J9
A9 NC#J9 A9 NC#J9
84,89 MAA10 L7 J1 84,89 MAA10 L7 J1
A10/AP NC#J1 A10/AP NC#J1
84,89 MAA11 R7 84,89 MAA11 R7
A11 A11
84,89 MAA12 N7 84,89 MAA12 N7
A12/BC# A12/BC#
84,89 MAA13 T3 J8 84,89 MAA13 T3 J8
A13 VSS A13 VSS
M7 M1 M7 M1
NC#M7 VSS NC#M7 VSS
M9 M9
VSS VSS
J2 J2
VSS VSS
84,89 A_BA0 M2 P9 84,89 A_BA0 M2 P9
BA0 VSS BA0 VSS
84,89 A_BA1 N8 G8 84,89 A_BA1 N8 G8
BA1 VSS BA1 VSS
84,89 A_BA2 M3 B3 84,89 A_BA2 M3 B3
BA2 VSS BA2 VSS
T1 T1
VSS VSS
A9 A9
VSS VSS
84 CLKA0 J7 T9 84 CLKA0 J7 T9
CK VSS CK VSS
84 CLKA0# K7 E1 84 CLKA0# K7 E1
CK# VSS CK# VSS
P1 P1
VSS VSS
84 CKEA0 K9 84 CKEA0 K9
1
CKE CKE
G1 G1
R8804 R8803 VSSQ VSSQ
F9 F9
Do Not Stuff Do Not Stuff VSSQ VSSQ
84 DQMA2 D3 E8 84 DQMA1 D3 E8
DMU VSSQ DMU VSSQ
Whistler Whistler
84 DQMA0 E7
DML VSSQ
E2 84 DQMA3 E7
DML VSSQ
E2
D8 D8
2
VSSQ VSSQ
D1 D1
B GPU_CLKA0_T VSSQ VSSQ B
84 WEA0# L3 B9 84 WEA0# L3 B9
WE# VSSQ WE# VSSQ
84 CASA0# K3 B1 84 CASA0# K3 B1
CAS# VSSQ CAS# VSSQ
84 RASA0# J3 G9 84 RASA0# J3 G9
1
C8802 RAS# VSSQ RAS# VSSQ

Do Not Stuff
Whistler
2
Whistler Whistler
1D5V_VGA_S0
1D5V_VGA_S0
1
1
R8808
R8805 Do Not Stuff
Do Not Stuff
Whistler
Whistler
2
2
VRAM2_VREF
VRAM1_VREF
1
C8805
1
C8803 R8807 Whistler Do Not Stuff

R8806 Do Not Stuff Do Not Stuff
Whistler
2
Do Not Stuff
Whistler
2
Whistler
2
2
Wistron Corporation
Title

GPU-VRAM1,2 (1/4) Rev
5 4 3 2 1
5 4 3 2 1
VRAM31 VRAM41
MDA[32..63] 84 MDA[32..63] 84
K8 E3 MDA36 K8 E3 MDA61
K2 F7 K2 F7
VDD DQL1 VDD DQL1
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
Whistler
MDA33 MDA63
C8902
C8906
C8909
C8908
C8911
C8910
C8913
C8912
C8919
C8917
C8921
C8920
C8923
C8922
C8915
C8914
N1 F2 N1 F2
1
1
VDD DQL2 VDD DQL2
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
D R9 F8 MDA39 R9 F8 MDA60 D
B2 H3 B2 H3
D9 H8 D9 H8
2
2
G7 G2 G7 G2
R1 H7 R1 H7
VDD DQL7 VDD DQL7
N9 N9
VDD MDA46 VDD MDA50
D7 D7
DQU0 MDA43 DQU0 MDA55
A8 C3 A8 C3
A1 C8 A1 C8
VDDQ DQU2 VDDQ DQU2
Do Not Stuff
Do Not Stuff
Whistler
Whistler
Whistler
Whistler
MDA40 MDA52
C8905
C8907
C8916
C8918
C1 C2 C1 C2
1
VDDQ DQU3 VDDQ DQU3
Do Not Stuff
Do Not Stuff
C9 A7 MDA44 C9 A7 MDA48
D2 A2 D2 A2
E9 B8 E9 B8
2
F1 A3 F1 A3
VDDQ DQU7 VDDQ DQU7
H9 H9
VDDQ VDDQ
H2 C7 QSAP_5 84 H2 C7 QSAP_6 84
VDDQ DQSU VDDQ DQSU
B7 QSAN_5 84 B7 QSAN_6 84
H1 H1
M8 F3 QSAP_4 84 M8 F3 QSAP_7 84
VREFCA DQSL VREFCA DQSL
2VRAM_ZQ3
1 L8 G3 QSAN_4 84 1 2VRAM_ZQ4 L8 G3 QSAN_7 84
R8903 Whistler Do Not Stuff ZQ DQSL# R8904 Whistler Do Not Stuff ZQ DQSL#
K1 ODTA1 84 K1 ODTA1 84
ODT ODT
84,88 MAA0 N3 84,88 MAA0 N3
A0 A0
84,88 MAA1 P7 84,88 MAA1 P7
A1 A1
84,88 MAA2 P3 L2 CSA1#_0 84 84,88 MAA2 P3 L2 CSA1#_0 84
A2 CS# A2 CS#
84,88 MAA3 N2 T2 MEM_RST 84,88,90,91 84,88 MAA3 N2 T2 MEM_RST 84,88,90,91
A3 RESET# A3 RESET#
84,88 MAA4 P8 84,88 MAA4 P8
A4 A4
84,88 MAA5 P2 84,88 MAA5 P2
A5 A5
84,88 MAA6 R8 T7 84,88 MAA6 R8 T7
C A6 NC#T7 A6 NC#T7 C
84,88 MAA7 R2 L9 84,88 MAA7 R2 L9
A7 NC#L9 A7 NC#L9
84,88 MAA8 T8 L1 84,88 MAA8 T8 L1
A8 NC#L1 A8 NC#L1
84,88 MAA9 R3 J9 84,88 MAA9 R3 J9
A9 NC#J9 A9 NC#J9
84,88 MAA10 L7 J1 84,88 MAA10 L7 J1
84,88 MAA11 R7 84,88 MAA11 R7
A11 A11
84,88 MAA12 N7 84,88 MAA12 N7
A12/BC# A12/BC#
84,88 MAA13 T3 J8 84,88 MAA13 T3 J8
A13 VSS A13 VSS
M7 M1 M7 M1
NC#M7 VSS NC#M7 VSS
M9 M9
VSS VSS
J2 J2
VSS VSS
84,88 A_BA0 M2 P9 84,88 A_BA0 M2 P9
BA0 VSS BA0 VSS
84,88 A_BA1 N8 G8 84,88 A_BA1 N8 G8
BA1 VSS BA1 VSS
84,88 A_BA2 M3 B3 84,88 A_BA2 M3 B3
BA2 VSS BA2 VSS
T1 T1
VSS VSS
A9 A9
VSS VSS
84 CLKA1 J7 T9 84 CLKA1 J7 T9
CK VSS CK VSS
84 CLKA1# K7 E1 84 CLKA1# K7 E1
CK# VSS CK# VSS
P1 P1
VSS VSS
84 CKEA1 K9 84 CKEA1 K9
1
CKE CKE
G1 G1
R8907 R8908 VSSQ VSSQ
F9 F9
Do Not Stuff Do Not Stuff VSSQ VSSQ
84 DQMA5 D3 E8 84 DQMA6 D3 E8
DMU VSSQ DMU VSSQ
Whistler Whistler84 DQMA4 E7
DML VSSQ
E2 84 DQMA7 E7
DML VSSQ
E2
D8 D8
2
VSSQ VSSQ
D1 D1
GPU_CLKA1_T VSSQ VSSQ
84 WEA1# L3 B9 84 WEA1# L3 B9
WE# VSSQ WE# VSSQ
84 CASA1# K3 B1 84 CASA1# K3 B1
CAS# VSSQ CAS# VSSQ
84 RASA1# J3 G9 84 RASA1# J3 G9
1
C8903 RAS# VSSQ RAS# VSSQ

B Whistler B
Do Not Stuff
2
Whistler Whistler
1D5V_VGA_S0
1D5V_VGA_S0
1
R8905
1
Do Not Stuff
R8901 Whistler
Do Not Stuff
2
Whistler VRAM4_VREF
2
VRAM3_VREF
1
C8904
R8906 Do Not Stuff
1
C8901 Do Not Stuff
2
R8902 Do Not Stuff Whistler Whistler
Do Not Stuff
2
Whistler Whistler 2
2
Wistron Corporation
Title

GPU-VRAM3,4 (2/4) Rev
A3
5 4 3 2 1
5 4 3 2 1
VRAM51 VRAM61
MDB[0..31] 84 MDB[0..31] 84
K8 E3 MDB14 K8 E3 MDB16
VDD DQL0 MDB13 VDD DQL0 MDB18
K2 F7 K2 F7
VDD DQL1 VDD DQL1
DIS_PX
DIS_PX
DIS_PX
DIS_PX
DIS_PX
DIS_PX
DIS_PX
DIS_PX
MDB12 MDB20
C9002
C9006
C9009
C9008
C9021
C9022
C9023
C9010
C9012
C9011
C9015
C9016
C9018
C9017
C9019
C9020
N1 F2 N1 F2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1
1
VDD DQL2 VDD DQL2
DIS_PX
DIS_PX
DIS_PX
DIS_PX
DIS_PX
DIS_PX
DIS_PX
DIS_PX
R9 F8 MDB15 R9 F8 MDB19
B2 H3 B2 H3
D9 H8 D9 H8
2
2
D G7 G2 G7 G2 D
R1 H7 R1 H7
VDD DQL7 VDD DQL7
N9 N9
VDD MDB26 VDD MDB1
D7 D7
DQU0 MDB27 DQU0 MDB5
A8 C3 A8 C3
VDDQ DQU1 MDB30 VDDQ DQU1 MDB2
C9013
C9014
A1 C8 A1 C8
SC10U6D3V5KX-1GP
VDDQ DQU2 VDDQ DQU2
Do Not Stuff
DIS_PX
DIS_PX
DIS_PX
MDB24 MDB4
C9005
C9007
C1 C2 C1 C2
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1
1
C9 A7 C9 A7
D2
VDDQ DQU5
A2
MDB29
DY D2
VDDQ DQU5
A2
MDB0
E9 B8 E9 B8
2
F1 A3 F1 A3
VDDQ DQU7 VDDQ DQU7
H9 H9
VDDQ VDDQ
H2 C7 QSBP_3 84 H2 C7 QSBP_0 84
VDDQ DQSU VDDQ DQSU
B7 QSBN_3 84 B7 QSBN_0 84
H1 H1
M8 F3 QSBP_1 84 M8 F3 QSBP_2 84
VRAM_ZQ5 VREFCA DQSL VRAM_ZQ6 VREFCA DQSL
1 2 L8 G3 QSBN_1 84 1 2 L8 G3 QSBN_2 84
R9004 243R2F-2-GP ZQ DQSL# R9006 243R2F-2-GP ZQ DQSL#
DIS_PX DIS_PX
K1 ODTB0 84 K1 ODTB0 84
ODT ODT
84,91 MAB0 N3 84,91 MAB0 N3
A0 A0
84,91 MAB1 P7 84,91 MAB1 P7
A1 A1
84,91 MAB2 P3 L2 CSB0#_0 84 84,91 MAB2 P3 L2 CSB0#_0 84
A2 CS# A2 CS#
84,91 MAB3 N2 T2 MEM_RST 84,88,89,91 84,91 MAB3 N2 T2 MEM_RST 84,88,89,91
A3 RESET# A3 RESET#
84,91 MAB4 P8 84,91 MAB4 P8
A4 A4
84,91 MAB5 P2 84,91 MAB5 P2
A5 A5
84,91 MAB6 R8 T7 84,91 MAB6 R8 T7
A6 NC#T7 A6 NC#T7
84,91 MAB7 R2 L9 84,91 MAB7 R2 L9
A7 NC#L9 A7 NC#L9
84,91 MAB8 T8 L1 84,91 MAB8 T8 L1
A8 NC#L1 A8 NC#L1
84,91 MAB9 R3 J9 84,91 MAB9 R3 J9
C A9 NC#J9 A9 NC#J9 C
84,91 MAB10 L7 J1 84,91 MAB10 L7 J1
84,91 MAB11 R7 84,91 MAB11 R7
A11 A11
84,91 MAB12 N7 84,91 MAB12 N7
A12/BC# A12/BC#
84,91 MAB13 T3 J8 84,91 MAB13 T3 J8
A13 VSS A13 VSS
M7 M1 M7 M1
NC#M7 VSS NC#M7 VSS
M9 M9
VSS VSS
J2 J2
VSS VSS
84,91 B_BA0 M2 P9 84,91 B_BA0 M2 P9
BA0 VSS BA0 VSS
84,91 B_BA1 N8 G8 84,91 B_BA1 N8 G8
BA1 VSS BA1 VSS
20090902 84,91 B_BA2 M3 B3 84,91 B_BA2 M3 B3
BA2 VSS BA2 VSS
T1 T1
VSS VSS
A9 A9
VSS VSS
84 CLKB0 J7 T9 84 CLKB0 J7 T9
CK VSS CK VSS
84 CLKB0# K7 E1 84 CLKB0# K7 E1
CK# VSS CK# VSS
P1 P1
1
VSS VSS
84 CKEB0 K9 84 CKEB0 K9
R9007 R9008 CKE CKE
G1 G1
56R2F-1-GP 56R2F-1-GP VSSQ VSSQ
F9 F9
VSSQ VSSQ
DIS_PX DIS_PX
84 DQMB3 D3
DMU VSSQ
E8 84 DQMB0 D3
DMU VSSQ
E8
84 DQMB1 E7 E2 84 DQMB2 E7 E2
2
DML VSSQ DML VSSQ

D8 D8
GPU_CLKB0_T VSSQ VSSQ
D1 D1
VSSQ VSSQ
84 WEB0# L3 B9 84 WEB0# L3 B9
WE# VSSQ WE# VSSQ
84 CASB0# K3 B1 84 CASB0# K3 B1
1
C9003 CAS# VSSQ CAS# VSSQ

SCD01U16V2KX-3GP
DIS_PX 84 RASB0# J3
RAS# VSSQ
G9 84 RASB0# J3
RAS# VSSQ
G9
2
K4W1G1646E-HC12-GP K4W1G1646E-HC12-GP
B B
DIS_PX DIS_PX
1
1
R9001 R9003
2K1R2F-GP 2K1R2F-GP
DIS_PX DIS_PX
2
2
VRAM5_VREF VRAM6_VREF
1
1
C9001 C9004
R9002 SCD1U10V2KX-5GP R9005 SCD1U10V2KX-5GP
2K1R2F-GP 2K1R2F-GP
2
2
DIS_PX DIS_PX DIS_PX DIS_PX
2
2
Check R9001 & R9002 Change to 4.99K or no
Check R9001 & R9002 Change to 4.99K or no difference?
difference? Wistron Corporation
Title
GPU-VRAM5,6 (3/4)
A3
5 4 3 2 1
5 4 3 2 1
VRAM71 VRAM81
MDB[32..63] 84 MDB[32..63] 84
K8 E3 MDB40 K8 E3 MDB53
K2 F7 K2 F7
VDD DQL1 VDD DQL1
DIS_PX
DIS_PX
DIS_PX
DIS_PX
DIS_PX
DIS_PX
DIS_PX
DIS_PX
DIS_PX
DIS_PX
DIS_PX
DIS_PX
DIS_PX
DIS_PX
MDB47 MDB55
C9102
C9107
C9108
C9109
C9110
C9111
C9112
C9113
C9114
C9117
C9118
C9119
C9120
C9121
C9122
C9123
N1 F2 N1 F2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1
1
VDD DQL2 VDD DQL2
Do Not Stuff
Do Not Stuff
D R9 F8 MDB44 R9 F8 MDB49 D
DY B2
VDD DQL4
H3
MDB45
B2
VDD DQL4
H3
MDB48
D9 H8 D9 H8
2
2
DY G7
VDD DQL6
G2
MDB46
G7
VDD DQL6
G2
MDB50
R1 H7 R1 H7
VDD DQL7 VDD DQL7
N9 N9
VDD MDB36 VDD MDB61
D7 D7
DQU0 MDB35 DQU0 MDB62
A8 C3 A8 C3
A1 C8 A1 C8
VDDQ DQU2 VDDQ DQU2
DIS_PX
DIS_PX
DIS_PX
DIS_PX
MDB32 MDB59
C9105
C9106
C9115
C9116
C1 C2 C1 C2
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1
1
C9 A7 C9 A7
D2 A2 D2 A2
E9 B8 E9 B8
2
2
F1 A3 F1 A3
VDDQ DQU7 VDDQ DQU7
H9 H9
VDDQ VDDQ
H2 C7 QSBP_4 84 H2 C7 QSBP_7 84
VDDQ DQSU VDDQ DQSU
B7 QSBN_4 84 B7 QSBN_7 84
H1 H1
M8 F3 QSBP_5 84 M8 F3 QSBP_6 84
VRAM_ZQ7 VREFCA DQSL VRAM_ZQ8 VREFCA DQSL
1 2 L8 G3 QSBN_5 84 1 2 L8 G3 QSBN_6 84
R9103 243R2F-2-GP ZQ DQSL# R9104 243R2F-2-GP ZQ DQSL#
DIS_PX DIS_PX
K1 ODTB1 84 K1 ODTB1 84
ODT ODT
84,90 MAB0 N3 84,90 MAB0 N3
A0 A0
84,90 MAB1 P7 84,90 MAB1 P7
A1 A1
84,90 MAB2 P3 L2 CSB1#_0 84 84,90 MAB2 P3 L2 CSB1#_0 84
A2 CS# A2 CS#
84,90 MAB3 N2 T2 MEM_RST 84,88,89,90 84,90 MAB3 N2 T2 MEM_RST 84,88,89,90
A3 RESET# A3 RESET#
84,90 MAB4 P8 84,90 MAB4 P8
A4 A4
84,90 MAB5 P2 84,90 MAB5 P2
A5 A5
84,90 MAB6 R8 T7 84,90 MAB6 R8 T7
C A6 NC#T7 A6 NC#T7 C
84,90 MAB7 R2 L9 84,90 MAB7 R2 L9
A7 NC#L9 A7 NC#L9
84,90 MAB8 T8 L1 84,90 MAB8 T8 L1
A8 NC#L1 A8 NC#L1
84,90 MAB9 R3 J9 84,90 MAB9 R3 J9
A9 NC#J9 A9 NC#J9
84,90 MAB10 L7 J1 84,90 MAB10 L7 J1
84,90 MAB11 R7 84,90 MAB11 R7
A11 A11
84,90 MAB12 N7 84,90 MAB12 N7
A12/BC# A12/BC#
84,90 MAB13 T3 J8 84,90 MAB13 T3 J8
A13 VSS A13 VSS
M7 M1 M7 M1
NC#M7 VSS NC#M7 VSS
M9 M9
VSS VSS
J2 J2
VSS VSS
84,90 B_BA0 M2 P9 84,90 B_BA0 M2 P9
BA0 VSS BA0 VSS
84,90 B_BA1 N8 G8 84,90 B_BA1 N8 G8
BA1 VSS BA1 VSS
84,90 B_BA2 M3 B3 84,90 B_BA2 M3 B3
BA2 VSS BA2 VSS
T1 T1
VSS VSS
A9 A9
VSS VSS
84 CLKB1 J7 T9 84 CLKB1 J7 T9
CK VSS CK VSS
84 CLKB1# K7 E1 84 CLKB1# K7 E1
CK# VSS CK# VSS
P1 P1
1
VSS VSS
84 CKEB1 K9 84 CKEB1 K9
R9107 R9108 CKE CKE
G1 G1
56R2F-1-GP 56R2F-1-GP VSSQ VSSQ
F9 F9
VSSQ VSSQ
DIS_PX DIS_PX
84 DQMB4 D3
DMU VSSQ
E8 84 DQMB7 D3
DMU VSSQ
E8
84 DQMB5 E7 E2 84 DQMB6 E7 E2
2
DML VSSQ DML VSSQ

D8 D8
GPU_CLKB1_T VSSQ VSSQ
D1 D1
VSSQ VSSQ
84 WEB1# L3 B9 84 WEB1# L3 B9
WE# VSSQ WE# VSSQ
84 CASB1# K3 B1 84 CASB1# K3 B1
1
C9103 CAS# VSSQ CAS# VSSQ

SCD01U16V2KX-3GP
DIS_PX 84 RASB1# J3
RAS# VSSQ
G9 84 RASB1# J3
RAS# VSSQ
G9
B B
2
K4W1G1646E-HC12-GP K4W1G1646E-HC12-GP
DIS_PX DIS_PX
1
1
R9101 R9105
2K1R2F-GP 2K1R2F-GP
DIS_PX DIS_PX
2
2
VRAM7_VREF VRAM8_VREF
1
1
C9101 C9104
R9102 SCD1U10V2KX-5GP R9106 SCD1U10V2KX-5GP
2K1R2F-GP 2K1R2F-GP
2
2
DIS_PX DIS_PX DIS_PX DIS_PX
2
Wistron Corporation
Title
GPU-VRAM7,8 (4/4)
A3
5 4 3 2 1
5 4 3 2 1
DCBATOUT PWR_DCBATOUT_VGA_CORE
PG9201
2 1
DIS_PX
Do Not Stuff
PG9202
2 1
DIS_PX
Do Not Stuff
PG9203
2 1
DIS_PX
Do Not Stuff
PG9204
2 1
DIS_PX
D Do Not Stuff D
PG9231
2 1
DIS_PX
Do Not Stuff
PG9232
2 1
DIS_PX
Do Not Stuff
PWR_DCBATOUT_VGA_CORE
5V_S5
Do Not Stuff
PC9211
1
2
PC9214
SC10U25V5KX-GP
PC9216
SC10U25V5KX-GP
PC9218
SC10U25V5KX-GP
DIS_PX DIS_PX DIS_PX DY
1
1
5
6
7
8
Freq=360KHz
D
D
D
D
PC9208DIS_PX PU9202
SC1U10V2KX-1GP Do Not Stuff
2
65BOM
PR9210
PWR_VGA_CORE_TON 1 DIS_PX
2 Iomax=14.9A
G
S
S
S
200KR2F-L-2-GP 19.37A<OCP<25A
4
3
2
1
PU9201 PR9202 DIS_PX
DIS_PX 2D2R3-1-U-GP PC9206
PR9203 16 13 PWR_VGA_CORE_BOOT
2 DIS_PX 1PWR_VGA_CORE_BOOT_C
1 2 VGA_CORE
TON BOOT
2 1 9
VDDP PWR_VGA_CORE_UGATE SCD1U25V3KX-GP PL9201
10R2J-2-GP 12
PWR_VGA_CORE_VDD UGATE PWR_VGA_CORE_PHASE
2 11 1 2
VDD PHASE PWR_VGA_CORE_LGATE
8 DIS_PX
Do Not Stuff
LGATE
1
IND-1D5UH-34-GP
DIS_PX
PG8920
PWR_VGA_CORE_PGOOD 4 7 PC9215 PTC9201 PTC9202 PTC9203
PGOOD G0
1
PWRCNTL_0 85
Do Not Stuff
Do Not Stuff
C PWR_VGA_CORE_CS 10 3 PWR_VGA_CORE_FB DIS_PX C
SCD1U10V2KX-4GP
CS FB
5
6
7
8
DIS_PX 14 PU9203 DIS_PX DY DY
G1 PWRCNTL_1 85
1
D
D
D
D
5 PWR_VGA_CORE_D1
2
D1
1
SE390U2D5VM-7GP
PR9205 8209A_EN/DEM_VGA 15 6 PWR_VGA_CORE_D0 Do Not Stuff
PC9204DIS_PX 11K3R3F-2-GP EM/DEM D0 PWR_VGA_CORE_VOUT
65BOM
SC1U10V2KX-1GP 17 1 PWR_VGA_CORE_VOUT
2
DIS_PX GND VOUT

2
S
S
S
G
1
RT8208BGQW-GP Do Not Stuff Do Not Stuff
4
3
2
1
PR9204
10R2F-L-GP
20100520 DIS_PX Matsuki cap 390uF
PR9213
2
Do Not Stuff 2.5V, ESR=10 mohm
86 FB_VDDC 1 2 6.3ĭ×5.7L
DIS_PX
1
PC9217 PC9213
1
PR9208
3D3V_VGA_S0 10KR2F-2-GP DY DY
Do Not Stuff
Do Not Stuff
DIS_PX
2
2
1
R9222 dis-charge circuit
PR9221 10KR2F-2-GP 10KR2J-3-GP PWR_VGA_CORE_FB
DIS_PX
1 2
3D3V_VGA_S0
DIS_PX
2
3D3V_AUX_S5
PD9201 PWR_VGA_CORE_PGOOD 2 R9223 1
1
DGPU_PWROK17,86,93
1
2 1 8209A_EN/DEM_VGA Do Not Stuff PR9211
2
17,93 PE_GPIO1
PR9212 PR9209 150KR2F-L-GP
DIS_PX
1
CH551H-30PT-GP 37K4R2F-1-GP 75KR2F-GP DIS_PX DY PR9218

1
DIS_PX PC9212 C9207 DIS_PX DIS_PX

SC100P50V2JN-3GP Do Not Stuff
DY Do Not Stuff
2
2
2
86,93 8209A_EN/DEM_VGA
PWR_VGA_CORE_EN_R#
1
2
0906: Add Back To Seperate Netname

DIS_PX
1GND_SENSE_1
PR9214
4
PWR_VGA_CORE_D1
Do Not Stuff VGA_CORE
B 1 2 PQ9206 B
FB_GND 86
Vout=0.75V*(R1+R2)/R2 PWR_VGA_CORE_D0 DIS_PX Do Not Stuff DY
2
1
3
PR9220
PR9207
10R2F-L-GP DY Do Not Stuff
DIS_PX
1
2
8209A_EN/DEM_VGA PQ9206_3
0607
Seymour:
PWR_VGA_CORE_D1 PWR_VGA_CORE_D0 VGA_CORE_PWR PR9208 PR9211 PR9209 PR9212
L L 1.1V Seymour 10KR2F 150KR 75KR 37K4R I/P cap: 10U 25V K0805 X5R/ 78.10622.51L
L H 1.0V Inductor: 1.5uH PCMC104T-1R5MH Cyntec 3.8mohm/4.2mohm Isat =33Arms 68.1R510.10J
Whistler 10KR2F 75KR 75KR 150KR
O/P cap: 560U 2.5V MP2VL560MC5R7 16mOhm 3.5Arms 77.55671.00L
H L 0.9V
O/P cap: 220U 2V EEFCX0D221R 15mOhm 2.7Arms Panasonic/79.22719.20L
H H X H/S: RJK03B9DPA / 10.9mohm/15.1mOhm@4.5Vgs/ 84.003B9.B37
L/S: RJK03D4DPA / 4.6mohm/5.6mOhm@4.5Vgs/ 84.00034.A37
Whistler :
PWR_VGA_CORE_D1 PWR_VGA_CORE_D0 VGA_CORE_PWR
L L 1.0V
L H X
H L 0.9V
A A
H H X
Wistron Corporation
Title
RT8208B_+VGA_CORE
A2
5 4 3 2 1
5 4 3 2 1
+3VS to 3.3V_DELAY Transfer
1 DY PR9301
2 3D3V_S5
Do Not Stuff
DMP2130L-7-GP 3D3V_VGA_S0 APL5930KAI for 1D8V_S0
PQ9302
3D3V_S0 S
1
D PC9321
D
PC9325 84.02130.031 SC10U6D3V5MX-3GP
G
PR9316 DIS_PX 2ND = 84.03413.A31
2
100KR2J-1-GP 0629 Modify:
DIS_PX DIS_PX
G
SCD1U10V2KX-5GP Reserved PD9303 connect DGPU_PWR_EN to
DIS_PX PWR_1D8V_EN for power down sequence.
Idesign =1.12A
2
D
1 PR9325 2 PD9303
D
DIS_PX 17,92 PE_GPIO1 2 DIS_PX
1 PG9307
20KR2F-L-GP
2
CH551H-30PT-GP 1 2
1D8V_PWR 1D8V_VGA_S0
3.3V_ALW_1 PR9314
Vo(cal.)=1.812V Do Not Stuff
470R2J-2-GP PG9308
DIS_PX PU9304 1 2
9025_PGOOD_1V 2 PR9320 1 PWR_1D8V_EN
1
6
4
Do Not Stuff DIS_PX
9 1 Do Not Stuff
2N7002KDW-GP PC9323 VIN#9 GND PC9322
1
DIS_PX PWR_1D8V_ADJ
1
3D3V_VGA_S0 8 2
Do Not Stuff
PQ9303 EN FB PR9317 DIS_PX DY PC9324
1
7 3 R1 PC9320
DIS_PX DY POK VOUT#3 15KR2F-GP DY
SC22U6D3V5MX-2GP
Do Not Stuff
PR9323 6 4
Do Not Stuff
2
VCNTL VOUT#4
10KR2J-3-GP
1
2
DIS_PX
1
5 3D3V_S5
DIS_PX VIN#5
R9322
2
84.2N702.A3F DIS_PX 10KR2F-2-GP 5V_S5
APL5930KAI-TRG-GP PWR_1D8V_ADJ
PWR_1D8V_VDD
3.3V_RUN_VGA_1
1
2
PR9321
R2 PR9318
Do Not Stuff 12KR2F-L-GP
83 1D8V_S0_VGA_PG DIS_PX DIS_PX
2
1
PC9319 out=0.8V*(R1+R2)/R2
17,92 PE_GPIO1
SC1U6D3V2KX-GP
Park_Madison Does Not Support BACO, So follow Old Sequence 5V_S5 DIS_PX
2
1
Seymour_Whistler_Robson Support BACO, So Change Sequence
Different To Intel, AMD Is High Active PR9313
1D5V_S3 Do Not Stuff
3D3V_VGA_S0 should ramp-up before VGA_Core
DIS_PX
VGA_Coreshould ramp-up before 1V_VGA_S0
2
1V_VGA_S0 should ramp up before 1D8V_VGA_S0
1
PC9314
1
so 1V_VGA_S0 EN have to fine tune RCSC10U6D3V5MX-3GP
delay PC9313
SC1U6D3V2KX-GP
after VGA_Core DIS_PX
PWR_1V_VDD
DIS_PX
2
Idesign=1.2A
PR9312 RT9025 for 1V_S0
3D3V_VGA_S0 1 2 PG9305
1 2
PE_GPIO1 PX3.0 PX4.0 1V_PWR 1V_VGA_S0
Vo(cal.)=1.005V
IGPU L H 0629 Modify: DIS_PX PWR_1V_EN PG9306
9
Reserved PD9302 connect DGPU_PWR_EN to PU9303 1 2
DGPU H H PWR_1V_EN for power down sequence.
GND
PC9318 4 5 Do Not Stuff
VDD NC#5
1
3D3V_VGA_S0
Do Not Stuff
PD9302 3 6 PR9322 PC9315 PC9317 PC9316
VIN VOUT 10KR2F-L1-GP
17,92 PE_GPIO1 2 DIS_PX
1 DY 2 EN DIS_PX
ADJ 7 DY DIS_PX DY
Do Not Stuff
SC10U6D3V5MX-3GP
Do Not Stuff
2nd = 84.DM601.03F 1 8 DIS_PX
2
PGOOD GND
1
CH551H-30PT-GP
C PR9324 C
2
2K2R2J-2-GP RT9025-25PSP-GP
DIS_PX 74.09025.03D PWR_1V_ADJ
2
1
9025_PGOOD_1V 2 PR9311 1 PWR_1V_PGOOD PR9315
Do Not Stuff DIS_PX 39KR2F-GP
DIS_PX
2
0628 Modify:
Change PU9305 part number to 84.04468.037 same as U3601&U3602.
change low Rds(on) MOSFET
1D5V_VGA_S0 1D5V_S3 1D5V_VGA_S0
PU9305
AO4468, SO-8 8 D S 1
7 D S 2 0629 Modify:
Id=?A, Qg=9~12nC 6 D DIS_PXS 3 Add PC9332 10uF 0603.
1
Rdson=17.4~22m ohm 1 5 D G 4 PC9332
1D5V_ENABLE_RC
PC9327
DIS_PX AO4468-GP SC10U6D3V3MX-GP
2
84.04468.037 DIS_PX
SC10U6D3V3MX-GP
2
2nd = 84.08882.037
PR9330
1DIS_PX 2
Discharge Circuit
20KR2F-L-GP
1
3D3V_AUX_S5 PC9326 DIS_PX 1D5V_VGA_S0

SCD01U50V2KX-1GP
2
1 2 VGA_1D5V_EN#
PR9332 100KR2J-1-GP
1
DIS_PX D G S
PR9336
DIS_PX 470R2J-2-GP
6
0629 Modify:
Reserved PD9301 connect DGPU_PWR_EN to PQ9305
DIS_1D5V_VGA_S02
PWR_1D5V_EN for power down sequence. 15V_S5
2N7002KDW-GP DIS_PX 2ND = 84.2N702.031
84.2N702.A3F
1
84.2N702.J31
1
PD9301 2nd = 84.DM601.03F PR9319 2N7002K-2-GP

S G D 100KR2J-1-GP
17,92 PE_GPIO1 2 DIS_PX
1
VGA_1D5V_EN#
B CH551H-30PT-GP
DIS_PX G
B
2
PR9327 D
1 2 VGA_1D5V_EN
17,86,92 DGPU_PWROK Do Not Stuff S
DY DIS_PX
0628 Modify: PQ9307
2 PR9328 1 Simplify 1D5V_ENABLE control circuit.
86,92 8209A_EN/DEM_VGA Do Not Stuff Rmoved PQ9305,PR9327,PR9328 PQ9306.
DIS_PX
A A
Wistron Corporation
Title
DISCRETE VGA POWER
5 4 3 2 1
5 4 3 2 1
SSID = VIDEO
D D
FCH_UMA_PX R9401
FCH_UMA_PX R9403 1 Do Not Stuff
2 DDCDATA
19 CRT_DDC_DATA
19 CRT_HSYNC 1 Do Not Stuff
2 CRT_HSYNC_R CRT_HSYNC_R 82 1 2 DDCCLK
19 CRT_DDC_CLK
19 CRT_VSYNC 1 2 CRT_VSYNC_R CRT_VSYNC_R 82 FCH_UMA_PX Do Not Stuff
FCH_UMA_PX Do Not Stuff R9402
R9404
RN9422 RN9423
Do Not Stuff 2 3 DDCDATA DDCDATA 82
85 VGA_CRT_DDCDATA
1 4 1 DY 4 DDCCLK DDCCLK 82
83,85 VGA_CRT_HSYNC 85 VGA_CRT_DDCCLK
83,85 VGA_CRT_VSYNC 2 DY 3
Do Not Stuff
C C
RN9414
85 VGA_CRT_BLUE 1 8
B
85 VGA_CRT_GREEN 2 7 B
3 DY 6
85 VGA_CRT_RED 4 5
Do Not Stuff
R9407
FCH_UMA_PX Do Not Stuff
1 2 CRT_RED_R CRT_RED_R 82
19 CRT_RED
FCH_UMA_PX R9405
1 Do Not Stuff
2 CRT_GREEN_R CRT_GREEN_R 82
19 CRT_GREEN CRT_BLUE_R
19 CRT_BLUE 1 2 CRT_BLUE_R 82
Do Not Stuff
FCH_UMA_PX R9406
A A
Wistron Corporation
Title
LVDS_VGA_Switch
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
Wistron Corporation
Title
Reserved
A
5 4 3 2 1
5 4 3 2 1
D
TOUCH PANEL connector D
C C
0707: Move To Page 49, Touch Panel Combine With LVDS
B B
Wistron Corporation
Title
Touch Panel
A
5 4 3 2 1
5 4 3 2 1
H1 H7 H13 H15 H2 H6 H9 H10

Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff
Do Not Stuff Do Not Stuff Do Not Stuff

Do Not Stuff
Check test point
DY Do Not Stuff DY Do Not Stuff DY Do Not Stuff DY Do Not Stuff
1
1
1
DY DY DY DY
0831 X01 Modify:
Change H1,H7,H13,H15 to ZZ.00PAD.J91 0624 Modify:
from ZZ.00PAD.D01 base on ME updated.
Removed AFTP1,AFTP7~AFTP13.
D stand off D
H3 H4 H11 H12
Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff
0721 Modify:
Removed SPR1
1
1
Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff
H5
Do Not Stuff
CPU Thermal module hole
HTML1 HTML2 HTML3
Do Not Stuff Do Not Stuff Do Not Stuff
DY Do Not Stuff
1
0831 X01 Modify:

1
1
Change H5 to ZZ.00PAD.J91 from ZZ.00PAD.E11.
DY DY DY
0109: EMI Reserve 0109: EMI Reserve
5V_S5 5V_S5 5V_S5 5V_S5 AD+ AD+_TO_SYS DCBATOUT DCBATOUT DCBATOUT DCBATOUT DCBATOUT EC9701~EC9704 Place: EC9716~EC9719 Place:
(970 , 7875) Top (3785 3415) Top
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
near C5702 Bottom (5785 2050) Top
SCD1U25V2KX-GP
near PTC9203 Bottom
2
2
EC9701
EC9702
EC9703
EC9704
EC9705
EC9706
EC9707
EC9708
EC9709
EC9728
EC9710
0109: EMI Reserve
near H15 Bottom
EC9716~EC9719 Place:
DY DY DY DY DY DY DY DY DY DY
1
1
C 0109: EMI Reserve (3785 3415) Top C
EC9705 Place: (5785 2050) Top

near PU4002 Top
0109: EMI Reserve
DCBATOUT DCBATOUT DCBATOUT DCBATOUT PWR_DCBATOUT_CHG 1D5V_S3 1D5V_S3 1D5V_S3 1D5V_S3 5V_S0 5V_S0 0109: EMI Reserve EC9720~EC9721 Place:
EC9706 Place: near C5604 Top
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
near PR4002 Top near D3604 Top
2
2
EC9711
EC9712
EC9713
EC9714
EC9715
EC9716
EC9717
EC9718
EC9719
EC9720
EC9721
0109: EMI Reserve 0109: EMI Reserve
DY DY DY DY DY DY DY DY DY DY DY EC9707~EC9714,EC9728 EC9722~EC9723 Place:
1
Place: near C5604 Top

near LCD1 Top near D3604 Top
(4090, 7615) Top
0109: EMI Reserve
(6275 7295) Top
near PU4003 Top
near PC4248 Top
5V_S5 5V_S5 DCBATOUT_VCC_CORE1 DCBATOUT_VCC_CORE1 DCBATOUT_VCC_CORE1 DCBATOUT_VCC_CORE1 PWR_3D3V_DCBATOUT near PC4016 Top
near PC4246 Top
near F6901 Top
(4300 3985) Bottom
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
(7600 6015) Top

(4300 3985) Bottom
near PC4117 Top
2
2
EC9722
EC9723
EC9724
EC9725
EC9726
EC9727
EC9729
near PC4301 Top 0109: EMI Reserve

DY DY DY DY DY DY DY EC9729 Place:
1
0109: EMI Reserve

near PC4114 Top
EC9715 Place:
near PR4002 Top 0109: EMI Reserve
1D2V_S0 1D2V_S0 5V_CRT_S0_R 5V_S0 1D5V_VGA_S0 1D5V_VGA_S0 1D5V_VGA_S0 1D5V_VGA_S0 DCBATOUT DCBATOUT DCBATOUT DCBATOUT DCBATOUT DCBATOUT DCBATOUT near C765 Top
near PTC4203 Top
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2
2
EC9730
EC9731
EC9732
EC9733
EC9734
EC9735
EC9736
EC9737
EC9738
EC9739
EC9740
EC9741
EC9742
EC9743
EC9744
DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY
1
B B
VGA_CORE 5V_S5 5V_S5 5V_S5 5V_S5 5V_S5 5V_S5 5V_S5 BT+

Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
SCD1U25V2KX-GP
2
1
EC9745
EC9746
EC9747
EC9748
EC9749
EC9750
EC9751
EC9752
EC9753
DY DY DY DY DY DY DY DY
1
0105: Add SPR1-9

0115: EMI Agree To Remove Spring7 & 10
0117: Add back SPR7
SPR1 SPR2 SPR3 SPR4 SPR5 SPR6 SPR7 SPR9 0118: Remove SPR8
0127: Change SPR9 P/N To 34.4B312.002, Old P/N No Stock
SPRING-24-GP-U Do Not Stuff SPRING-24-GP-U SPRING-24-GP-U SPRING-24-GP-U SPRING-24-GP-U SPRING-6-GP SPRING-58-GP
DY 0817 X01 Modify:

1
Dell Peter already confirmed DQ15 and DN15 will not

support Bluetooth BT365, only support combo Wirless+BT.
A
Please DUMMY Bluetooth connector(BT1) and stand off A
(HBT1) and related components.
GPU Thermal module hole 1122 Modify: DQ15 AMD DIS SAMSUNG TI
HHD1 HHD4 HBT1 Change HHD1,HDD4,HGPU1,HGPU2 2nd to
STF237R117H83-1-GP HGPU1 HGPU2 STF237R117H83-1-GP Do Not Stuff 34.4CK01.401 from 34.4CK01.201 from ME
STF237R117H83-1-GP STF237R117H83-1-GP updated connector list. Wistron Corporation
DY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
34.4CK01.001 DIS_PX DIS_PX 34.4CK01.001
1
34.4CK01.001 34.4CK01.001 0321 Modify:

1
2nd = 34.4CK01.401 Title

Add HGPU1,HGPU2 Dummy Name DIS_PX, So UMA Wont Pop
2nd = 34.4CK01.401 2nd = 34.4CK01.401 2nd = 34.4CK01.401 Do Not Stuff UNUSED PARTS/CAP
2nd = 34.4A902.001 Size Document Number Rev
A2
5 4 3 2 1
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D D
Thermal Block Diagram Audio Block Diagram
*Reserve 0 ohm.
APU KBC PORTD_+L AUD_SPK_L+
Speaker
VGA_THRM
SID SDA2 PORTD_-L AUD_SPK_L- Connector
CPU_THRM
SIC SCL2 PORTD_-R AUD_SPK_R-
Pure HW Shutdown
Thermal Trip SYS_THRM
*System thermal sensor PORTD_+R AUD_SPK_R+ 58
C C
DXPP2800
PMBS3905 DXN TDR *Stuff 60D4R2F *Stuff BEAD
OTZ TDL
*Close to APU
Codec PORTB_L AUD_HP1_JACK_L
HP Out
PORTB_R AUD_HP1_JACK_R
92HD87B1 82
GPU
SMBDATA VREFOUT_A AUD_VREFOUT_B
SMBCLK *Stuff 4K7J-8-GP

Thermal Trip(CTF)
PORTA_L AUD_EXT_MIC_L
B
MIC IN B
PORTA_R AUD_EXT_MIC_R
82
Wistron Corporation
Title
THERMAL/AUDIO BLOCK DIAGRAM
A3
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POWER SEQUENCE
D D
C C
B B
A A
Wistron Corporation
Title
POWER SEQUENCE
Custom X00
5 4 3 2 1
A B C D E
Adapter DCBATOUT
4 ISL6267HRTZ RT8209 RT8209 TPS51116RGER RT8208 4
AO4407A
Charger
BQ24745 APU_VDD APU_VDDNB 1D1V_S5 1D2V_S0 DDR_VREF_S3 1D5V_S3 0D75V_S0 VGA_CORE
Battery BT+
AO4468 AO4468 RT9025 AO4468
3 3
1D1V_S0 1D5V_S0 1V_VGA_S0 1D5V_VGA_S0
TPS51123RGER
15V_S5 3D3V_AUX_S5 5V_AUX_S5 5V_S5 3D3V_S5
2 2
DMP2130L G547F2P81U AO4468 AO4468 APL5930 RT9025
3D3V_AUX_KBC 5V_USB 5V_S0 3D3V_S0 2D5V_S0 1D8V_VGA_S0
USB Port x4
(G547F2P81U x4)
G5285T11U DMP2130L RTS5138
Wistron Corporation
1 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, 1
Title
LCDVDD 3D3V_VGA_S0 3D3V_CARD_S0 Power Block Diagram
Custom
A B C D E
5 4 3 2 1
PCH SMBus Block Diagram

3D3V_S5 3D3V_S0 KBC SMBus Block Diagram
Θ Θ 3D3V_S0
3D3V_S0 Θ
SRN2K2J-1-GP
Θ SRN2K2J-1-GP
DIMM 1
Θ Θ
SRN10KJ-5-GP
Θ Θ
D SMBCLK SMB_CLK PCH_SMBCLK D
TouchPad Conn.
Θ
SCL
SMBDATA SMB_DATA PCH_SMBDATA
Θ
SDA
PSDAT1 TPDATA TPDATA TPDATA
3D3V_S5
PSCLK1 TPCLK TPCLK TPCLK
SMBus Address:A0
Θ 2N7002SPT
3D3V_S5
3D3V_AUX_KBC
Θ
SRN2K2J-8-GP
Θ
SML1CLK SML1_CLK
SRN4K7J-8-GP
To KBC DIMM 2
Θ
SML1DATA SML1_DATA SRN2K2J-1-GP
Battery Conn.
Θ
PCH_SMBCLK
SCL SRN100J-3-GP
SML0CLK SML0_CLK PCH_SMBDATA GPIO17/SCL1 BAT_SCL BATA_SCL_1 CLK_SMB
SDA
SML0DATA SML0_DATA GPIO22/SDA1 BAT_SDA BATA_SDA_1 DAT_SMB SMBus address:16
SMBus Address:A4
3D3V_S0 G-Sensor BQ24707RGRR

Θ Θ KBC SCL
Θ
PCH_SMBCLK SDA SMBus address:12
PCH PCH_SMBDATA
SCLK
SDATA
NPCE795P
SRN2K2J-1-GP
C
UMA SMBus address:xx C
3D3V_S5 Double Check 1D5V_S3

Level
Θ Θ
SDVO_CTRLCLK PCH_HDMI_CLK DDC_CLK_HDMI
SDVO_CTRLDATA PCH_HDMI_DATA
Shift DDC_DATA_HDMI Minicard
UMA
Θ WLAN 1D5V_S3
Θ Θ
PCH_SMBCLK
SMB_CLK SRN2K2J-1-GP
3D3V_S0
PCH_SMBDATA
SMB_DATA
Θ GPIO73/SCL2 SML1_CLK SCL

APU
GPIO74/SDA2 SML1_DATA SDA
SRN2K2J-1-GP Minicard
UMA SRN0J-6-GP
PCH_SMBCLK
W-WAN
SMB_CLK
2N7002SPT
L_DDC_CLK LVDS_DDC_CLK_R
PCH_SMBDATA
SMB_DATA
L_DDC_DATA LVDS_DDC_DATA_R
UMA
3D3V_VGA_S0
CRT_DDC_CLK CRT_DDC_CLK
CRT_DDC_DATA CRT_DDC_DATA
Θ
SRN2K2J-1-GP
B
DIS
SRN0J-6-GP B
DDC1CLK GPU_LVDS_CLK LVDS_DDC_CLK CLK
DDC1DATA GPU_LVDS_DATA LVDS_DDC_DATA DATA LCD CONN

DIS SRN0J-6-GP
DDC2CLK VGA_CRT_DDCCLK
DDC2DATA VGA_CRT_DDCDATA
3D3V_S0 DIS 5V_S0
VGA Θ Θ
3D3V_S0
SRN0J-6-GP
UMA SRN2K2J-1-GP
UMA
Θ SRN10KJ-6-GP
CRT_DDCCLK_CON
CRT_DDCDATA_CON
CRT CONN
5V_HDMI
3D3V_VGA_S0 UMA
Θ Θ 2N7002DW-1-GP
A
3D3V_S0 A
SRN1K5J-GP
SRN2K2J-1-GP
DIS
DDC2CLK GPU_HDMI_CLK Level DDC_CLK_HDMI
DDC2DATA GPU_HDMI_DATA
Shift DDC_DATA_HDMI
HDMI CONN
Wistron Corporation
SRN0J-6-GP
Title
SMBUS BLOCK DIAGRAM
A2
DIS QUEEN AMD Muxless/UMA X00
5 4 3 2 1
5 4 3 2 1
Change notes -
D D
C C
B B
Wistron Corporation
Title
Change notes
A3
5 4 3 2 1
5 4 3 2 1
Change notes - Page 4
VERSON DATE ITEM PAGE Modify List Issue Description OWNER
X02 01/08 3 18,19 Add C1825,C1922. Reduce V_REF ripple by EA team result. EE
4 37 Reserve C3721,C3722. Prevent signal cross talk. EE
D 5 ALL Change capacitors value and add C3723. Ensure signal quality. EE D
01/11 1 68 Change KB1 P/N. According ME request. ME
2 66 Change R6601,R6602,R6604,R6606 to 1KR, R6603 to 470R. Decrease LED brightness. EE
01/12 1 37 Add C3724, R3757. To set accurate current detection in EC. EE
2 10 Add R1041 0R. Add 0R for level shift off. EE
01/13 1 21,37 Add C3725, C2105. Reserve for singal quality. EE
01/14 1 Power Modify power team componets. Request by Power Team. Power
2 7 Change RN712 to 22R. Fine tuned damping resistor value. EE
A00 02/08 1 66 Reserve R6609, R6610 1KR. Add for future LED brightness balance. EE
2 68 Add keyboard back light circuit, remove R5403. Add for keyboard with back light module. EE
C 3 69 Change HALLSW1 footprint for co-layout. Change for co-layout different kind of HALLSW1. EE
C
4 77 Add AFTP7701, AFTP7702, AFTP7703. Add AFTP test point for factory test. EE
02/10 1 Power Update Obsolete parts. Update obsolete parts due to policy. Power
2 79 Change HBT1 part number. Change HBT1 part number to match ME EMN file. ME
3 47 Add PTC4710. Add to solve board accoustic issue. EE
02/22 1 54 Remove co-layout pad. As factory requst. EE 0303-1

2 42 Add C4217, C4401, C4402. Ensure signal quality. EE
3 48 Delete Power Gap. Request by Power Team. Power
02/23 1 ALL Change to short pad. Change most of 0-ohm resistors to short pad. EE
02/24 1 7,68,79 Reserve C724, C725, C6806, C6807, EC7928-EC7932. As EMC team request. EMC
B B
02/25 1 13 Add TP1309. As factory requset to add. Factory
2 7,68 Rename EMC capacitor to EC704,EC705,EC6801,EC6802. Meet schematic standardization. EE
3 49,89 Change PR4913 to 3.9R, PR8905 to 6.98KR. PR4913 for snubber, PR8905 for OCP. Power
4 21 Change R2133 to 0R. Set GPIO input level from 0.5V to 0V. EE
5 79 Remove EC7928. Layout space limitation. EE
02/26 1 39,42 Empty R3906 and Change R4202 from 0R to 1KR. It is for solving T8 shutdown issue. EE
03/03 1 60 Change SPK1 part number. Request by ME. ME
03/05 1 20,24,37 Empty R2029,R2404,R3751. Saving unused components. EE

A A
Wistron Corporation
Title
Change notes

5 4 3 2 1

Dell Inspiron m5110 Dell Wistron Dqdn15 Queen Amd m12 Uma Muxless Dis Reva00

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5 4 3 2 1

DQDN15 AMD QUEEN M12

AMD LIANO APU FS1

DQ15 AMD DIS SAMSUNG TI

Revision : SB 90, 91 SYSTEM DC/DC

I/O Board Connector

CRT DDRIII VTT

2MB 60 PAD KB ENE P2800 G991P11U

Custom QUEEN AMD Muxless/UMA X00

Strapping No Fusion Config, Strap Not needed, but reserve

REQUIRED SYSTEM STRAPS

PULL Force S5_PLUS Mode IGNORE Fusion DISABLE EC CLKGEN

USB Table PCIe Routing

A DQ15 AMD DIS SAMSUNG TI A

AC5 AD4 PCIE_TXP0_C C441 1 2 SCD1U16V2KX-3GP

17 UMI_FCH_APU_RX0P AF8 AF1 UMI_TX0P_C C445 1 2 SCD1U16V2KX-3GP

1D2V_S0 1 R402 2196R2F-GP P_ZVDDP K5 K4 P_ZVSS

A DQ15 AMD DIS SAMSUNG TI A

C501 C502 4 1 M_A_EVENT#

LAYOUT: place them close to APU Wistron Corporation

AMD Confirm: PU Needed even if not used Title

0 1 1.0 1.2 RN611

1 1 0.8 0.9 SRN1K8J-GP

9 LVDS_L0P_TRAVIS UMA_PX C602 1 2 SCD1U16V2KX-3GP DP0_TX0P F2

DISPLAY PORT MISC.

DISP_CLKIN_L DP_AUX_ZVSS 1 R623

RN606 Do Not Stuff G10 APU_TEST9_ANALOGIN DY

APU_ALERT# E DYC APU_PROCHOT#_VDDIO C E

1 R634 2300R2J-4-GP APU_DBREQ#

0714: Move From Page 9

1D5V_S3 1D5V_S3 DQ15 AMD DIS SAMSUNG TI

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

101227 1011: Reserve Level Shift. DY

APU_VDD APU1D 4 OF 6 APU_VDD VDD:

C740 C739 C738 SAINE

180pF Cap for EMI requirment Title

A DQ15 AMD DIS SAMSUNG TI A

1207: Use PLT_RST# to replace

R923 UMA_PX 400mA

Vendor Confirm: C912 100p

0504 -Sabine David

18 TRAVIS_EN# G DY DQ15 AMD DIS SAMSUNG TI

DQ15 AMD DIS SAMSUNG TI

A DQ15 AMD DIS SAMSUNG TI A

A DQ15 AMD DIS SAMSUNG TI A

A DQ15 AMD DIS SAMSUNG TI A

C1411 C1412 C1413 53 125 1D5V_S3

5 M_A_DQ21 DQ21 VDD1

5 M_A_DQ33 DQ33 VDD13

C1419 C1420 C1421 C1422 165 26

5 M_A_DQ51 DQ51 VSS

0914: DIMM1 Change To 62.10017.N71

A 0628: Reserve Cap A

DQ15 AMD DIS SAMSUNG TI

QUEEN AMD Muxless/UMA X00

C1516 C1517 147 2

5 M_B_DQ42 DQ42 VSS

C1518 C1519 C1520 C1521 181 48

5 M_B_DQ58 DQ58 VSS

DDR3-204P-44-GP DQ15 AMD DIS SAMSUNG TI

QUEEN AMD Muxless/UMA X00

A DQ15 AMD DIS SAMSUNG TI A

PCI EXPRESS INTERFACES

LPCCLK1 R1729 33R2J-2-GP LPC_CLK1 21