A B C D E

ZZZ1

1 1

PCB

2
Compal Confidential 2

KAWG0 Schematics Document

AMD S1g1 / RS690MC / SB600
2009 / 04 / 09
3

Rev:1.0 3

4 4

Security Classification
2005/05/09
Compal Secret Data
2009/06/11 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Friday, April 10, 2009 Sheet 1 of 46
A B C D E
 5 4 3 2 1

Compal confidential
Project Code: KAWG0 AMD S1g1 CPU
Thermal Sensor Clock Generator DDRII 533/667 DDRII-SO-DIMM X2
File Name : LA-4861P
ADM1032ARM ICS951462 638P PGA page 10,11
page 6,7,8,9
D
page 8 page 17 Dual Channel D

H_A#(3..31) H_D#(0..63)
HT 16x16 1000MHZ

SIG1 : 35mm x 35mm x (2.20mm+2.11mm) 638pin

CRT AM2 : 40mm x 40mm x (4.56mm+2.11mm) 940pin
page 24 ATI-RS690MC
465 BGA RS485 : 21mm x 21mm (19.2mm x 19.2mm) x2.33mm 465pin
RS690 : 21mm x 21mm (19.2mm x 19.2mm) x2.33mm 465pin
LCD CONN
page 12,13,14,15,16
page 25 SB460 : 27mm x 27mm (21.6mm x 21.6mm) x2.33mm 549pin
SB600 : 23mm x 23mm (21.6mm x 21.6mm) x2.33mm 549pin
A-Link Express
4 x PCIE
PCIE X1

USB 2.0
C C

BT Conn Camera USB conn

Mini card 10/100 LAN ATI-SB600 page 38 X2
CardReader
RT5159
WLAN AR8114 549 BGA
page 31 page 26 HDA Codec
HD Audio AMP & Audio Jack
ALC272 page 40
page 18,19,20,21,22 page 39 TPA6017
MDC Conn.
page 41
RJ45 CONN HeadPhone
page 27
Out
SATA0 HDD Conn.
page 23
LPC BUS MIC In
B B

SATA2
ODD Conn.
page 23
ENE KB926
Power On/Off CKT / LID switch / Power OK CKT Ver:D2 page 28
page 37

Second HDD/ODD
DC/DC Interface CKT. CIR/LED RTC CKT. Int. KBD
page 41 page 38 page 18 page 29 SATA1 HDD Conn.
Touch Pad
CONN. page 29 SATA3 ODD Conn.
Power Circuit DC/DC SPI BIOS
page 30
page 42~48

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/03/08 Deciphered Date 2009/06/11 Title
SCHEMATIC,MB A4861
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401650
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 2 of 46
5 4 3 2 1
 5 4 3 2 1

SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Voltage Rails
Full ON HIGH HIGH HIGH HIGH ON ON ON ON

Power Plane Description S1 S3 S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW

VIN Adapter power supply (19V) N/A N/A N/A S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
D D
B+ AC or battery power rail for power circuit. N/A N/A N/A
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
+CPU_CORE Core voltage for CPU ON OFF OFF
+0.9V 0.9V switched power rail for DDR terminator ON ON OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.2V_HT 1.2V switched power rail ON OFF OFF
+1.5VS 1.5V switched power rail ON OFF OFF
+1.8VALW 1.8V always on power rail ON ON ON* Board ID / SKU ID Table for AD channel
+1.8V 1.8V power rail for DDR ON ON OFF Vcc 3.3V +/- 5%
+1.8VS 1.8V switched power rail ON OFF OFF Ra/Rc/Re 100K +/- 5%
+2.5VS 2.5V switched power rail ON OFF OFF Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+3VALW 3.3V always on power rail ON ON ON* 0 0 0 V 0 V 0 V
+3VS 3.3V switched power rail ON OFF OFF 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+5VALW 5V always on power rail ON ON ON* 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+5VS 5V switched power rail ON OFF OFF 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+VSB VSB always on power rail ON ON ON* 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+RTCVCC RTC power ON ON ON 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
C C
6 200K +/- 5% 1.935 V 2.200 V 2.341 V
7 NC 2.500 V 3.300 V 3.300 V

BOARD ID Table
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

External PCI Devices Board ID PCB Revision BTO Option Table

Device IDSEL# REQ#/GNT# Interrupts
0 0.1
BTO Item BOM Structure
1 0.2
NC Function NC@
2 0.3
10/100 Lan 8114@
3 1.0
GIGA Lan 8132@
4
17" ID 17@
5
15" ID 15@
6
7
B B

EC SM Bus1 address EC SM Bus2 address SKU ID Table

Device Address Device Address SKU ID SKU
Smart Battery 0001 011X b ADM1032 1001 100X b 0
1
2
3
4
5
SB600 SM Bus 1 address SB600 SM Bus 2 address 6
7
Device Address Device Address

Clock Generator 1101 001Xb New Card

(ICS951462)
A DDR DIMM0 A
1001 000Xb
DDR DIMM2 1001 010Xb
Wireless Lan

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/03/08 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401650
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 3 of 46
5 4 3 2 1
 5 4 3 2 1

DIMMA
DDR_A_CLK[1..2]

D D
CPU CLK CPU

DIMMB
DDR_B_CLK[1..2]
200MHZ S1G1 SOCKET

H_CLKI[1:0] Host Bus H_CLKO[1:0]

C C
SBLINK_CLK
100MHZ

NBSRC_CLK
14.31818MHz ATI NB
100MHZ
EXTERNAL RS690
CLK GEN. HTREFCLK
ICS951462
66MHZ

NB_OSC
14.318MHZ

B B

SB_OSCIN
CLK_PCIE_MINI

14.318MHZ
CLK_PCIE_LAN
100MHZ

100MHZ

SBSRC_CLKP
100MHZ
ATI SB
SB600
CLK_48M_USB CLK_PCI_LPC EC
48MHZ 33MHZ ENE
KB926D2

Mini PCI Socket LAN

32.768K Hz
Mini card Atheros 25M Hz
AR8114 32.768K Hz
A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/10/10 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401650
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 4 of 46
5 4 3 2 1
 5 4 3 2 1

AMD S1G1 socket

LDO Regulator
CM8562IS +2.5VS VDDA 2.5V 250mA
BATTERY CPU core +CPU_CORE
BATTERY CHARGER B+ CPU_B+ PWM 0.9V
+CPU_CORE VDD
11.1V MAX1908ETI MAX8774GTL 0.95V 18.89A
2.2Ah/6-cell
+1.8V VDDIO 1.8V 3A CPU
D D

+1.2VALW +0.9V VTT 0.9V 750mA

MOSFET +1.2V_HT +1.2V_HT
SI4856ADY +1.2V_HT VLDT 1.2V 0.5A
AC ADAPTOR
19V 65W
+1.2VALW
+1.2VALW
+1.8VALW DDRII SODIMMX2
B+ PWM +1.8V +1.8V
ISL6227CAZ-T +1.8VALW VDD_MEM 1.8V 6.08A
MOSFET +1.8V SYSTEM
SI4856ADY VTT_MEM MEMORY
0.9V 0.5A
+0.9V

MOSFET +1.8VS +1.8VS

SI4856ADY RS690MC
VDD_CORE 5A
VDDA_12 2.5A
LDO Regulator +0.9V
APL5331KAC VDD_HT 800mA 1.2V
+1.8VALW VDD_PLL 50mA
C C
PLLVDD12 70mA
AVDDQ 150mA
AVDDDI 150mA
+3VALW VDD_18 200mA
+5VALW +3VALW NB
MOSFET +3VS VDDR 100mA
B+ PWM SI4800BDY 1.8V
MAX8734AEEI LPVDD 20mA
LVDDR18D 150mA
+3VALW
PLLVDD18 150mA
HTPVDD 200mA
+5VALW +5VS AVDD 100mA
SWITCH
SI4800BDY VDDR3 70mA 3.3V
LVDDR33 180mA
+5VALW

SB600
B
VDD 500mA B

S5_1.2V 80mA
FAN Control
LDO Regulator AVDDCK_1.2V 40mA
+4.75V APL5605
G9191 PCIE_PVDD 35mA
LDO Regulator +5VS 500mA USB Power PCIE_VDDR 450mA 1.2V
CM8562IS +1.5V Switch AVDD_SATA 300mA
G528
PLLVDD_SATA 65mA
+5V USB_PHY_1.2V 90mA
+3VS SB
VDDQ 150mA
S5_3.3V 15mA
+3VALW
AVDDCK_3.3V 10mA
XTLVDD_SATA 5mA 3.3V
AVDDC 15mA
LCD panel Realtek EC Audio Codec Audio AMP LAN CLOCK GEN AVDD TX/RX 0.5A
15.6" Mini Card RTS5159 ENE KB926 ALC272 TPA6017A2 Atheros AR8114 ICS951462 USB X2 SATA
CPU_PWR 10mA 1.8V

A
+5V 2.5~ A
B+ 300mA +1.5VS 500mA +3.3VS 300mA +3.3VS 3mA +4.75V 45mA +5V 25mA +3.3V 201mA +3.3V 400mA Dual +5V 3A RTC VBAT 3.3V
+3.3VS 1A Bettary
+3.3 350mA +3.3VALW 330mA +3.3VALW 30mA +3.3VS 25mA 1.5A +3.3V

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/10/10 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401650
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 5 of 46
5 4 3 2 1
 5 4 3 2 1

D H_CADIP[0..15] H_CADOP[0..15] D
12 H_CADIP[0..15] H_CADOP[0..15] 12
H_CADIN[0..15] H_CADON[0..15]
12 H_CADIN[0..15] H_CADON[0..15] 12

+1.2V_HT
JCPU1A
D4 VLDT_A3 VLDT_B3 AE5 1 2
VLDT=500mA D3 AE4 C84 4.7U_0805_10V4Z
VLDT_A2 VLDT_B2
D2 VLDT_A1 VLDT_B1 AE3
D1 VLDT_A0 VLDT_B0 AE2

H_CADIP15 H_CADOP15
H_CADIN15
N5
P5
L0_CADIN_H15 L0_CADOUT_H15 T4
T3 H_CADON15 Reserve when PVT
H_CADIP14
H_CADIN14
M3
L0_CADIN_L15
L0_CADIN_H14
L0_CADOUT_L15
L0_CADOUT_H14 V5 H_CADOP14
H_CADON14 +5VS
FAN1 Conn +5VS
for cos down
M4 L0_CADIN_L14 L0_CADOUT_L14 U5
H_CADIP13 L5 V4 H_CADOP13 C92 10U_0805_10V4Z
L0_CADIN_H13 L0_CADOUT_H13

1
H_CADIN13 M5 V3 H_CADON13 1 2
H_CADIP12 L0_CADIN_L13 L0_CADOUT_L13 H_CADOP12 D13
K3 L0_CADIN_H12 L0_CADOUT_H12 Y5

2
H_CADIN12 K4 W5 H_CADON12 @ 1SS355_SOD323-2
H_CADIP11 L0_CADIN_L12 L0_CADOUT_L12 H_CADOP11 R247
H3 L0_CADIN_H11 L0_CADOUT_H11 AB5
H_CADIN11 H4 AA5 H_CADON11 0_0603_5%

2
H_CADIP10 L0_CADIN_L11 L0_CADOUT_L11 H_CADOP10 U1 @D4
@ D4 BAS16_SOT23-3
G5 L0_CADIN_H10 L0_CADOUT_H10 AB4 @
H_CADIN10 H5 AB3 H_CADON10 1 8 1 2

1
H_CADIP9 L0_CADIN_L10 L0_CADOUT_L10 H_CADOP9 EN GND
F3 L0_CADIN_H9 L0_CADOUT_H9 AD5 2 VIN GND 7
H_CADIN9 F4 AC5 H_CADON9 +VCC_FAN1 3 6
H_CADIP8 L0_CADIN_L9 L0_CADOUT_L9 H_CADOP8 VOUT GND C97
E5 L0_CADIN_H8 L0_CADOUT_H8 AD4 28 EN_DFAN1 1 2 4 VSET GND 5
H_CADIN8 F5 AD3 H_CADON8 R733 0_0402_5% 1 10U_0805_10V4Z
C H_CADIP7 L0_CADIN_L8 L0_CADOUT_L8 H_CADOP7 C760 APL5607KI-TRG_SO8 C
N3 L0_CADIN_H7 L0_CADOUT_H7 T1 1 2
H_CADIN7 N2 R1 H_CADON7
L0_CADIN_L7 L0_CADOUT_L7 +3VS

HTT Interface
H_CADIP6 L1 U2 H_CADOP6 @ 0.01U_0402_16V7K C96
H_CADIN6 L0_CADIN_H6 L0_CADOUT_H6 H_CADON6 2 1000P_0402_50V7K
M1 L0_CADIN_L6 L0_CADOUT_L6 U3
H_CADIP5 L3 V1 H_CADOP5 1 2
L0_CADIN_H5 L0_CADOUT_H5

1
H_CADIN5 L2 U1 H_CADON5
H_CADIP4 L0_CADIN_L5 L0_CADOUT_L5 H_CADOP4 R37
J1 L0_CADIN_H4 L0_CADOUT_H4 W2
H_CADIN4 K1 W3 H_CADON4 10K_0402_5%
H_CADIP3 L0_CADIN_L4 L0_CADOUT_L4 H_CADOP3
H_CADIN3
G1 L0_CADIN_H3 L0_CADOUT_H3 AA2
H_CADON3
40mil JP12
H1 AA3

2
H_CADIP2 L0_CADIN_L3 L0_CADOUT_L3 H_CADOP2 +VCC_FAN1
G3 L0_CADIN_H2 L0_CADOUT_H2 AB1 1
H_CADIN2 G2 AA1 H_CADON2
L0_CADIN_L2 L0_CADOUT_L2 28 FAN_SPEED1 2
H_CADIP1 E1 AC2 H_CADOP1
H_CADIN1 L0_CADIN_H1 L0_CADOUT_H1 H_CADON1 3
F1 L0_CADIN_L1 L0_CADOUT_L1 AC3 1
H_CADIP0 E3 AD1 H_CADOP0 C91 CONN@
H_CADIN0 L0_CADIN_H0 L0_CADOUT_H0 H_CADON0 1000P_0402_50V7K ACES_85205-03001
E2 L0_CADIN_L0 L0_CADOUT_L0 AC1
2
12 H_CLKIP1 J5
K5
L0_CLKIN_H1 L0_CLKOUT_H1 Y4
Y3
H_CLKOP1 12 +3VS LDO FAN
12 H_CLKIN1 L0_CLKIN_L1 L0_CLKOUT_L1 H_CLKON1 12
12 H_CLKIP0 J3 L0_CLKIN_H0 L0_CLKOUT_H0 Y1 H_CLKOP0 12

1
12 H_CLKIN0 J2 L0_CLKIN_L0 L0_CLKOUT_L0 W1 H_CLKON0 12
R40
+1.2V_HT 10K_0402_5% JP38
R2 2 1 51_0402_1% P3 T5 @ +VCC_FAN1 1
R3 L0_CTLIN_H1 L0_CTLOUT_H1 1
2 1 51_0402_1% P4 R5 2

2
L0_CTLIN_L1 L0_CTLOUT_L1 FANPWN 2
28 FANPWM 3 3
H_CTLIP0 N1 R2 H_CTLOP0 4
12 H_CTLIP0 L0_CTLIN_H0 L0_CTLOUT_H0 H_CTLOP0 12 4
H_CTLIN0 P1 R3 H_CTLON0
12 H_CTLIN0 L0_CTLIN_L0 L0_CTLOUT_L0 H_CTLON0 12
CONN@
FOX_PZ63823-284S-41F ACES_85205-0400
CONN@
Athlon 64 S1
B Processor Socket PWM FAN B
AMD : 49.9 1%
ATI : 51 1%

+1.2V_HT

250 mil
VLDT CAP.
1 1 1 1 1 1
C86 C82 C90 C89 C83 C85
4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 180P_0402_50V8J 180P_0402_50V8J
2 2 2 2 2 2

Near CPU Socket

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/5/18 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401650 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 6 of 46
5 4 3 2 1
 A B C D E

Processor DDR2 Memory Interface

11 DDR_B_D[63..0]
JCPU1C
DDR_A_D[63..0] 10
+1.8V DDR_B_D63 AD11 AA12 DDR_A_D63
4 DDR_B_D62 MB_DATA63 MA_DATA63 DDR_A_D62 4
AF11 MB_DATA62 MA_DATA62 AB12
DDR_B_D61 AF14 AA14 DDR_A_D61
MB_DATA61 MA_DATA61
2

DDR_B_D60 AE14 AB14 DDR_A_D60

R4 DDR_B_D59 MB_DATA60 MA_DATA60 DDR_A_D59
Y11 MB_DATA59 MA_DATA59 W11
1K_0402_1% DDR_B_D58 AB11 Y12 DDR_A_D58
+CPU_M_VREF DDR_B_D57 MB_DATA58 MA_DATA58 DDR_A_D57
AC12 MB_DATA57 MA_DATA57 AD13
DDR_B_D56 AF13 AB13 DDR_A_D56
1

DDR_B_D55 MB_DATA56 MA_DATA56 DDR_A_D55

AF15 MB_DATA55 MA_DATA55 AD15
1000P_0402_50V7K
0.1U_0402_16V4Z

DDR_B_D54 AF16 AB15 DDR_A_D54

MB_DATA54 MA_DATA54
2

1 1 DDR_B_D53 AC18 AB17 DDR_A_D53

MB_DATA53 MA_DATA53
C16

C100

R5 DDR_B_D52 AF19 Y17 DDR_A_D52

1K_0402_1% DDR_B_D51 MB_DATA52 MA_DATA52 DDR_A_D51
AD14 MB_DATA51 MA_DATA51 Y14
DDR_B_D50 AC14 W14 DDR_A_D50
2 2 DDR_B_D49 MB_DATA50 MA_DATA50 DDR_A_D49
AE18 W16
1

DDR_B_D48 MB_DATA49 MA_DATA49 DDR_A_D48

AD18 MB_DATA48 MA_DATA48 AD17
DDR_B_D47 AD20 Y18 DDR_A_D47
DDR_B_D46 MB_DATA47 MA_DATA47 DDR_A_D46
AC20 MB_DATA46 MA_DATA46 AD19
+CPU_M_VREF DDR_B_D45 AF23 AD21 DDR_A_D45
JCPU1B +0.9V DDR_B_D44 MB_DATA45 MA_DATA45 DDR_A_D44
AF24 MB_DATA44 MA_DATA44 AB21
DDR_B_D43 AF20 AB18 DDR_A_D43
DDR_B_D42 MB_DATA43 MA_DATA43 DDR_A_D42
W17 M_VREF VTT1 D10 AE20 MB_DATA42 MA_DATA42 AA18
C10 DDR_B_D41 AD22 AA20 DDR_A_D41
TP1 VTT_SENSE VTT2 DDR_B_D40 MB_DATA41 MA_DATA41 DDR_A_D40
Y10 VTT_SENSE VTT3 B10 AC22 MB_DATA40 MA_DATA40 Y20
AD10 DDR_B_D39 AE25 AA22 DDR_A_D39
VTT4 DDR_B_D38 MB_DATA39 MA_DATA39 DDR_A_D38
VTT5 W10 AD26 MB_DATA38 MA_DATA38 Y22
+1.8V R7 1 2 M_ZN AE10 AC10 DDR_B_D37 AA25 W21 DDR_A_D37
R6 M_ZN VTT6 MB_DATA37 MA_DATA37
2 1 39.2_0402_1% M_ZP AF10
M_ZP VTT7 AB10 DDR_B_D36 AA26 MB_DATA36 MA_DATA36 W22 DDR_A_D36
39.2_0402_1% AA10 DDR_B_D35 AE24 AA21 DDR_A_D35
VTT8 DDR_B_D34 MB_DATA35 MA_DATA35 DDR_A_D34
VTT9 A10 AD24 MB_DATA34 MA_DATA34 AB22
DDR_B_D33 AA23 AB24 DDR_A_D33
DDR_CS3_DIMMA# DDR_A_CLK2 DDR_B_D32 MB_DATA33 MA_DATA33 DDR_A_D32
V19 Y16 AA24 Y24
3
10
10
DDR_CS3_DIMMA#
DDR_CS2_DIMMA#
DDR_CS2_DIMMA# J22
MA0_CS_L3
MA0_CS_L2
DDRII Cmd/Ctrl//Clk MA0_CLK_H2
MA0_CLK_L2 AA16 DDR_A_CLK#2
DDR_A_CLK2
DDR_A_CLK#2
10
10
DDR_B_D31 G24
MB_DATA32
MB_DATA31
MA_DATA32
MA_DATA31 H22 DDR_A_D31
3
DDR_CS1_DIMMA# V22 E16 DDR_A_CLK1 DDR_B_D30 G23 H20 DDR_A_D30
10 DDR_CS1_DIMMA# MA0_CS_L1 MA0_CLK_H1 DDR_A_CLK1 10 MB_DATA30 MA_DATA30
DDR_CS0_DIMMA# T19 F16 DDR_A_CLK#1 DDR_B_D29 D26 E22 DDR_A_D29
10 DDR_CS0_DIMMA# MA0_CS_L0 MA0_CLK_L1 DDR_A_CLK#1 10 MB_DATA29 MA_DATA29
DDR_B_D28 C26 E21 DDR_A_D28
DDR_CS3_DIMMB# DDR_B_CLK2 DDR_B_D27 MB_DATA28 MA_DATA28 DDR_A_D27
11 DDR_CS3_DIMMB# Y26 MB0_CS_L3 MB0_CLK_H2 AF18 DDR_B_CLK2 11 G26 MB_DATA27 MA_DATA27 J19
DDR_CS2_DIMMB# J24 AF17 DDR_B_CLK#2 DDR_B_D26 G25 H24 DDR_A_D26
11 DDR_CS2_DIMMB# MB0_CS_L2 MB0_CLK_L2 DDR_B_CLK#2 11 MB_DATA26 MA_DATA26
DDR_CS1_DIMMB# W24 A17 DDR_B_CLK1 DDR_B_D25 E24 F22 DDR_A_D25
11 DDR_CS1_DIMMB# MB0_CS_L1 MB0_CLK_H1 DDR_B_CLK1 11 MB_DATA25 MA_DATA25
DDR_CS0_DIMMB# U23 A18 DDR_B_CLK#1 DDR_B_D24 E23 F20 DDR_A_D24
11 DDR_CS0_DIMMB# MB0_CS_L0 MB0_CLK_L1 DDR_B_CLK#1 11 MB_DATA24 MA_DATA24

DDRII Data
DDR_B_D23 C24 C23 DDR_A_D23
DDR_CKE1_DIMMB DDR_B_ODT1 DDR_B_D22 MB_DATA23 MA_DATA23 DDR_A_D22
11 DDR_CKE1_DIMMB H26 MB_CKE1 MB0_ODT1 W23 DDR_B_ODT1 11 B24 MB_DATA22 MA_DATA22 B22
DDR_CKE0_DIMMB J23 W26 DDR_B_ODT0 DDR_B_D21 C20 F18 DDR_A_D21
11 DDR_CKE0_DIMMB MB_CKE0 MB0_ODT0 DDR_B_ODT0 11 MB_DATA21 MA_DATA21
DDR_CKE1_DIMMA J20 V20 DDR_A_ODT1 DDR_B_D20 B20 E18 DDR_A_D20
10 DDR_CKE1_DIMMA MA_CKE1 MA0_ODT1 DDR_A_ODT1 10 MB_DATA20 MA_DATA20
DDR_CKE0_DIMMA J21 U19 DDR_A_ODT0 DDR_B_D19 C25 E20 DDR_A_D19
10 DDR_CKE0_DIMMA MA_CKE0 MA0_ODT0 DDR_A_ODT0 10 MB_DATA19 MA_DATA19
DDR_B_D18 D24 D22 DDR_A_D18
10 DDR_A_MA[15..0] DDR_B_MA[15..0] 11 MB_DATA18 MA_DATA18
DDR_A_MA15 K19 J25 DDR_B_MA15 DDR_B_D17 A21 C19 DDR_A_D17
DDR_A_MA14 MA_ADD15 MB_ADD15 DDR_B_MA14 DDR_B_D16 MB_DATA17 MA_DATA17 DDR_A_D16
K20 MA_ADD14 MB_ADD14 J26 D20 MB_DATA16 MA_DATA16 G18
DDR_A_MA13 V24 W25 DDR_B_MA13 DDR_B_D15 D18 G17 DDR_A_D15
DDR_A_MA12 MA_ADD13 MB_ADD13 DDR_B_MA12 DDR_B_D14 MB_DATA15 MA_DATA15 DDR_A_D14
K24 MA_ADD12 MB_ADD12 L23 C18 MB_DATA14 MA_DATA14 C17
DDR_A_MA11 L20 L25 DDR_B_MA11 DDR_B_D13 D14 F14 DDR_A_D13
DDR_A_MA10 MA_ADD11 MB_ADD11 DDR_B_MA10 DDR_B_D12 MB_DATA13 MA_DATA13 DDR_A_D12
R19 MA_ADD10 MB_ADD10 U25 C14 MB_DATA12 MA_DATA12 E14
DDR_A_MA9 L19 L24 DDR_B_MA9 DDR_B_D11 A20 H17 DDR_A_D11
DDR_A_MA8 MA_ADD9 MB_ADD9 DDR_B_MA8 DDR_B_D10 MB_DATA11 MA_DATA11 DDR_A_D10
L22 MA_ADD8 MB_ADD8 M26 A19 MB_DATA10 MA_DATA10 E17
DDR_A_MA7 L21 L26 DDR_B_MA7 DDR_B_D9 A16 E15 DDR_A_D9
DDR_A_MA6 MA_ADD7 MB_ADD7 DDR_B_MA6 DDR_B_D8 MB_DATA9 MA_DATA9 DDR_A_D8
M19 MA_ADD6 MB_ADD6 N23 A15 MB_DATA8 MA_DATA8 H15
DDR_A_MA5 M20 N24 DDR_B_MA5 DDR_B_D7 A13 E13 DDR_A_D7
DDR_A_MA4 MA_ADD5 MB_ADD5 DDR_B_MA4 DDR_B_D6 MB_DATA7 MA_DATA7 DDR_A_D6
M24 MA_ADD4 MB_ADD4 N25 D12 MB_DATA6 MA_DATA6 C13
DDR_A_MA3 M22 N26 DDR_B_MA3 DDR_B_D5 E11 H12 DDR_A_D5
DDR_A_MA2 MA_ADD3 MB_ADD3 DDR_B_MA2 DDR_B_D4 MB_DATA5 MA_DATA5 DDR_A_D4
N22 MA_ADD2 MB_ADD2 P24 G11 MB_DATA4 MA_DATA4 H11
DDR_A_MA1 N21 P26 DDR_B_MA1 DDR_B_D3 B14 G14 DDR_A_D3
DDR_A_MA0 MA_ADD1 MB_ADD1 DDR_B_MA0 DDR_B_D2 MB_DATA3 MA_DATA3 DDR_A_D2
R21 MA_ADD0 MB_ADD0 T24 A14 MB_DATA2 MA_DATA2 H14
DDR_B_D1 A11 F12 DDR_A_D1
DDR_A_BS#2 MB_DATA1 MA_DATA1
10 DDR_A_BS#2 K22 MA_BANK2 MB_BANK2 K26 DDR_B_BS#2 DDR_B_BS#2 11
DDR_B_D0 C11 MB_DATA0 MA_DATA0 G12 DDR_A_D0
DDR_A_BS#1 R20 T26 DDR_B_BS#1
2 10 DDR_A_BS#1 MA_BANK1 MB_BANK1 DDR_B_BS#1 11 11 DDR_B_DM[7..0] DDR_A_DM[7..0] 10 2
DDR_A_BS#0 T22 U26 DDR_B_BS#0 DDR_B_DM7 AD12 Y13 DDR_A_DM7
10 DDR_A_BS#0 MA_BANK0 MB_BANK0 DDR_B_BS#0 11 MB_DM7 MA_DM7
DDR_B_DM6 AC16 AB16 DDR_A_DM6
DDR_A_RAS# MB_DM6 MA_DM6
10 DDR_A_RAS# T20 MA_RAS_L MB_RAS_L U24 DDR_B_RAS# DDR_B_RAS# 11
DDR_B_DM5 AE22 MB_DM5 MA_DM5 Y19 DDR_A_DM5
DDR_A_CAS# U20 V26 DDR_B_CAS# DDR_B_DM4 AB26 AC24 DDR_A_DM4
10 DDR_A_CAS# MA_CAS_L MB_CAS_L DDR_B_CAS# 11 MB_DM4 MA_DM4
DDR_A_WE# U21 U22 DDR_B_WE# DDR_B_DM3 E25 F24 DDR_A_DM3
10 DDR_A_WE# MA_WE_L MB_WE_L DDR_B_WE# 11 MB_DM3 MA_DM3
DDR_B_DM2 A22 E19 DDR_A_DM2
CONN@ FOX_PZ63823-284S-41F DDR_B_DM1 MB_DM2 MA_DM2 DDR_A_DM1
B16 MB_DM1 MA_DM1 C15
Athlon 64 S1 DDR_B_DM0 A12 E12 DDR_A_DM0
Processor MB_DM0 MA_DM0
Socket DDR_B_DQS7 AF12 W12 DDR_A_DQS7
11 DDR_B_DQS7 MB_DQS_H7 MA_DQS_H7 DDR_A_DQS7 10
DDR_B_DQS#7 AE12 W13 DDR_A_DQS#7
11 DDR_B_DQS#7 MB_DQS_L7 MA_DQS_L7 DDR_A_DQS#7 10
DDR_B_DQS6 AE16 Y15 DDR_A_DQS6
11 DDR_B_DQS6 MB_DQS_H6 MA_DQS_H6 DDR_A_DQS6 10
DDR_B_DQS#6 AD16 W15 DDR_A_DQS#6
11 DDR_B_DQS#6 MB_DQS_L6 MA_DQS_L6 DDR_A_DQS#6 10
DDR_B_DQS5 AF21 AB19 DDR_A_DQS5
11 DDR_B_DQS5 MB_DQS_H5 MA_DQS_H5 DDR_A_DQS5 10
DDR_B_DQS#5 AF22 AB20 DDR_A_DQS#5
11 DDR_B_DQS#5 MB_DQS_L5 MA_DQS_L5 DDR_A_DQS#5 10
PLACE CLOSE TO PROCESSOR DDR_B_DQS4 AC25 AD23 DDR_A_DQS4
11 DDR_B_DQS4 MB_DQS_H4 MA_DQS_H4 DDR_A_DQS4 10
DDR_B_DQS#4 AC26 AC23 DDR_A_DQS#4
WITHIN 1.5 INCH 11 DDR_B_DQS#4
DDR_B_DQS3 MB_DQS_L4 MA_DQS_L4 DDR_A_DQS3
DDR_A_DQS#4 10
11 DDR_B_DQS3 F26 MB_DQS_H3 MA_DQS_H3 G22 DDR_A_DQS3 10
DDR_B_DQS#3 E26 G21 DDR_A_DQS#3
11 DDR_B_DQS#3 MB_DQS_L3 MA_DQS_L3 DDR_A_DQS#3 10
DDR_B_DQS2 A24 C22 DDR_A_DQS2
11 DDR_B_DQS2 MB_DQS_H2 MA_DQS_H2 DDR_A_DQS2 10
DDR_A_CLK2 DDR_B_CLK2 DDR_B_DQS#2 A23 C21 DDR_A_DQS#2
11 DDR_B_DQS#2 MB_DQS_L2 MA_DQS_L2 DDR_A_DQS#2 10
1 1 DDR_B_DQS1 D16 G16 DDR_A_DQS1
11 DDR_B_DQS1 MB_DQS_H1 MA_DQS_H1 DDR_A_DQS1 10
DDR_B_DQS#1 C16 G15 DDR_A_DQS#1
11 DDR_B_DQS#1 MB_DQS_L1 MA_DQS_L1 DDR_A_DQS#1 10
C102 C17 DDR_B_DQS0 C12 G13 DDR_A_DQS0
1.5P_0402_50V8C 1.5P_0402_50V8C 11 DDR_B_DQS0 MB_DQS_H0 MA_DQS_H0 DDR_A_DQS0 10
DDR_B_DQS#0 B12 H13 DDR_A_DQS#0
2 2 11 DDR_B_DQS#0 MB_DQS_L0 MA_DQS_L0 DDR_A_DQS#0 10
DDR_A_CLK#2 DDR_B_CLK#2

DDR_A_CLK1 DDR_B_CLK1 CONN@ FOX_PZ63823-284S-41F

1 1 Athlon 64 S1
Processor Socket
C104 C105
1.5P_0402_50V8C 1.5P_0402_50V8C
1 DDR_A_CLK#1 2 DDR_B_CLK#1 2 1

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/5/18 Deciphered Date 2009/06/11 Title
SCHEMATIC,MB A4861
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401650 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 10, 2009 Sheet 7 of 46
A B C D E
 5 4 3 2 1

+2.5VDDA
VDDA=300mA
L4
+2.5VS 1 2 3300P_0402_50V7K
A:Need to re-Link "SGN00000200" 1 FCM2012CF-800T06_2P
1 1 1
C113 +
150U_D2_6.3VM C116 C118 C22
CPU_PWRGD 0.22U_0603_16V4Z +1.8V
17 CPU_PWRGD 2 2 2 2

1
D 4.7U_0805_10V4Z JCPU1D VID1: For compatibility D
R54 F8 AF6 CPU_THERMTRIP#_R CPU_VID1 1 2 with future processors
680_0402_5% VDDA2 THERMTRIP_L CPU_PROCHOT#_1.8 R24 300_0402_5%
F9 VDDA1 PROCHOT_L AC7
CPU_PRESENT# 1 2
LDT_RST# B7 R64 1K_0402_5%
2

CPU_PWRGD RESET_L CPU_TEST26_BURNIN#

A:PA_IXP600AD12 A7 PWROK 1 2
LDT_STOP# F10 R27 300_0402_5%
LDTSTOP_L
VID5 A5 CPU_VID5 44
LDT_STOP# 2 1 CPU_SIC AF4 C6
14,17 LDT_STOP# SIC VID4 CPU_VID4 44
R13 300_0402_5% AF5 A6 CPU_TEST21_SCANEN 1 2
SID VID3 CPU_VID3 44
2

A4 R47 300_0402_5%
VID2 CPU_VID2 44
R23 +1.2V_HT R61 1 2 44.2_0402_1% CPU_HTREF1 P6 C5
HTREF1 VID1 CPU_VID1 44
680_0402_5% R16 1 2 44.2_0402_1% CPU_HTREF0 R6 B5
HTREF0 VID0 CPU_VID0 44
R61&R16 close to CPU within 1" AC6 CPU_PRESENT#
1

CPU_PRESENT_L
A:PA_IXP600AD12 44 CPU_VCC_SENSE F6 VDD_FB_H
44 CPU_VSS_SENSE E6 VDD_FB_L PSI_L A3 PSI_L 44 +1.8V
TP26
W9 VDDIO_FB_H
LDT_RST# TP3 Y9 2 1 CPU_TEST25_H_BYPASSCLK_H
17 LDT_RST# VDDIO_FB_L R65 510_0402_5%
2

16 CPUCLK 1 2 3900P_0402_50V7K CPU_CLKIN_SC_P A9 CLKIN_H

R21 C109 CPU_CLKIN_SC_N A8 2 1 CPU_TEST25_L_BYPASSCLK_L
CLKIN_L

1
680_0402_5% R68 510_0402_5%
CPU_DBRDY G10 E10 CPU_DBREQ# 2 1 CPU_TEST19_PLLTEST0
R22 DBRDY DBREQ_L R69 300_0402_5%
1

A:PA_IXP600AD12 169_0402_1% CPU_TMS AA9 2 1 CPU_TEST18_PLLTEST1

CPU_TCK TMS CPU_TDO R66 300_0402_5%
AC9 AE9

2
CPU_TRST# TCK TDO
16 CPUCLK# 1 2 AD9 TRST_L
C23 3900P_0402_50V7K CPU_TDI AF9 R53
TDI 80.6_0402_1%
CPU_TEST25_H_BYPASSCLK_H E9 C9 CPU_TEST29_H_FBCLKOUT_P 1 2
C CPU_TEST25_L_BYPASSCLK_L TEST25_H TEST29_H CPU_TEST29_L_FBCLKOUT_N C
E8 TEST25_L TEST29_L C8
CPU_TEST19_PLLTEST0 G9
CPU_TEST18_PLLTEST1 TEST19
H10 TEST18 ROUTE AS 80 Ohm DIFFERENTIAL PAIR

MISC
AA7 TEST13 PLACE IT CLOSE TO CPU WITHIN 1"
C2 TEST9
TP5 D7 AE7 TP6
TP30 TEST17 TEST24 TP7
E7 TEST16 TEST23 AD7
TP8 F7 AE8 TP9
TP28 TEST15 TEST22 CPU_TEST21_SCANEN
C7 TEST14 TEST21 AB8
TP31 AC8 AF7 TP29
TEST12 TEST20
+3VS C3 J7
C119 TEST7 TEST28_H
AA6 TEST6 TEST28_L H8
0.1U_0402_16V4Z CPU_THERMDC W7 AF8
CPU_THERMDA THERMDC TEST27 CPU_TEST26_BURNIN#
1 2 W8 THERMDA TEST26 AE6
Y6 TEST3 TEST10 K8
AB6 TEST2 TEST8 C4

P20 RSVD0 RSVD8 H16

1 U3 P19 B18
C120 RSVD1 RSVD9
1 VDD SCLK 8 EC_SMB_CK2 28 N20 RSVD2
N19 RSVD3 RSVD10 B3
2200P_0402_50V7K CPU_THERMDA 2 7 C1
2 D+ SDATA EC_SMB_DA2 28 RSVD11
CPU_THERMDC 3 6 H6
D- ALERT# RSVD12 +1.8V
RSVD13 G6
4 5 D5 +3VALW
THERM# GND RSVD14

1
R24 +1.8V +3VALW
RSVD15

1
ADM1032ARMZ-2REEL_MSOP8 W18 R18
RSVD16 R25
R26 RSVD4 RSVD17 R23

1
F75383M_MSOP8 R25 AA8 1K_0402_5% @ 1K_0402_5%
B RSVD5 RSVD18 R8 R17 B
P22 H18

2
RSVD6 RSVD19
SMBus Address: 1001110X (b) R22 H19

2 2
RSVD7 RSVD20 300_0402_5% 10K_0402_5%

2
B

B
Q2

2
FOX_PZ63823-284S-41F Q3 MMBT3904_NL_SOT23-3

E
CONN@ CPU_THERMTRIP#_R 3 1H_THERMTRIP# 3 1 MAINPWON 39,41

C
@
MMBT3904_NL_SOT23-3

H_THERMTRIP# 17

AMD: suggest DBREQ need pull high

+1.8V

+1.8V
@ 220_0402_5% R33

@ 220_0402_5% R38

@ 220_0402_5% R34

@ 220_0402_5% R35

220_0402_5% R36

HDT Connector +3VS

1

1
JP3 +1.8V R19
@
1 2

1
10K_0402_5%
2

3 4

1
R20

2
CPU_DBREQ# 5 6 @ 4.7K_0402_5%
CPU_DBRDY 7 8 R52
CPU_TCK 9 10 300_0402_5%

2
11 12

2
+3VS

B
CPU_TMS

2
CPU_TDI
13 14 Q4
15 16

E
CPU_TRST# CPU_PROCHOT#_1.8 3 1
17 18 EC_THERM# 18,28
5

C
CPU_TDO @ MMBT3904_NL_SOT23-3
A 19 20 LDT_RST# A
2
P

21 22 HDT_RST# B
23 24 4 Y
26 A 1 SB_PWROK 17,28,33
G

NOTE: HDT TERMINATION IS REQUIRED U51

NC7SZ08P5X_NL_SC70-5
FOR REV. Ax SILICON ONLY.
3

@ SAMTEC_ASP-68200-07

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/5/18 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401650 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 10, 2009 Sheet 8 of 46
5 4 3 2 1
 5 4 3 2 1

JCPU1F
AA4 VSS1 VSS66 J6
+CPU_CORE +CPU_CORE AA11 J8
JCPU1E VSS2 VSS67
AA13 J10
VDD(+CPU_CORE) decoupling. AC4
AD2
VDD1
VDD2
VDD43
VDD44
V12
V14
AA15
AA17
VSS3
VSS4
VSS5
VSS68
VSS69
VSS70
J12
J14
G4 VDD3 VDD45 W4 AA19 VSS6 VSS71 J16
H2 VDD4 VDD46 Y2 AB2 VSS7 VSS72 J18
+CPU_CORE J9 J15 AB7 K2
D VDD5 VDD47 VSS8 VSS73 D
J11 VDD6 VDD48 K16 AB9 VSS9 VSS74 K7
J13 VDD7 VDD49 L15 AB23 VSS10 VSS75 K9
K6 VDD8 VDD50 M16 AB25 VSS11 VSS76 K11
1 1 1 1 1 1 K10 VDD9 VDD51 P16 AC11 VSS12 VSS77 K13
K12 VDD10 VDD52 T16 AC13 VSS13 VSS78 K15
+ C26 + C32 + C27 + C28 + C29 + C30 K14 U15 AC15 K17
330U_D2E_2.5VM_R9M 330U_D2E_2.5VM_R9M 330U_D2E_2.5VM_R9M 330U_D2E_2.5VM_R9M 330U_D2E_2.5VM_R9M 330U_D2E_2.5VM_R9M VDD11 VDD53 VSS14 VSS79
L4 VDD12 VDD54 V16 AC17 VSS15 VSS80 L6
@ @ L7 +1.8V AC19 L8
2 2 2 2 2 2 VDD13 VSS16 VSS81
L9 VDD14 AC21 VSS17 VSS82 L10
L11 VDD15 VDDIO1 H25 AD6 VSS18 VSS83 L12
L13 J17 AD8 L14
Near CPU Socket M2
VDD16
VDD17
VDDIO2
VDDIO3 K18 AD25
VSS19
VSS20
VSS84
VSS85 L16
M6 VDD18 VDDIO4 K21 AE11 VSS21 VSS86 L18
M8 VDD19 VDDIO5 K23 AE13 VSS22 VSS87 M7
+CPU_CORE

Power
M10 VDD20 VDDIO6 K25 AE15 VSS23 VSS88 M9
N7 VDD21 VDDIO7 L17 AE17 VSS24 VSS89 M11
N9 VDD22 VDDIO8 M18 AE19 VSS25 VSS90 M17
N11 VDD23 VDDIO9 M21 AE21 VSS26 VSS91 N4
1 1 1 1 1 1 1 1 1 P8 VDD24 VDDIO10 M23 AE23 VSS27 VSS92 N8
C33 C36 C34 C35 C178 C41 C190 C39 C128 P10 M25 B4 N10
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M VDD25 VDDIO11 VSS28 VSS93
R4 VDD26 VDDIO12 N17 B6 VSS29 VSS94 N16
R7 VDD27 VDDIO13 P18 B8 VSS30 VSS95 N18
2 2 2 2 2 2 2 2 2

Ground
R9 VDD28 VDDIO14 P21 B9 VSS31 VSS96 P2
R11 VDD29 VDDIO15 P23 B11 VSS32 VSS97 P7
T2 VDD30 VDDIO16 P25 B13 VSS33 VSS98 P9
+CPU_CORE +CPU_CORE +CPU_CORE T6 R17 B15 P11
VDD31 VDDIO17 VSS34 VSS99
T8 VDD32 VDDIO18 T18 B17 VSS35 VSS100 P17
T10 VDD33 VDDIO19 T21 B19 VSS36 VSS101 R8
T12 VDD34 VDDIO20 T23 B21 VSS37 VSS102 R10
1 1 1 1 T14 VDD35 VDDIO21 T25 B23 VSS38 VSS103 R16
C129 C151 C122 C47 U7 U17 B25 R18
0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.01U_0402_25V7K 180P_0402_50V8J VDD36 VDDIO22 VSS39 VSS104
U9 VDD37 VDDIO23 V18 D6 VSS40 VSS105 T7
C C
U11 VDD38 VDDIO24 V21 D8 VSS41 VSS106 T9
2 2 2 2
U13 V23 D9 T11
Under CPU Socket V6
VDD39
VDD40
VDDIO25
VDDIO26 V25 D11
VSS42
VSS43
VSS107
VSS108 T13
V8 VDD41 VDDIO27 Y25 D13 VSS44 VSS109 T15
V10 VDD42 D15 VSS45 VSS110 T17
D17 VSS46 VSS111 U4
D19 VSS47 VSS112 U6
FOX_PZ63823-284S-41F D21 VSS48 VSS113 U8
CONN@ D23 U10
VDDIO decoupling. Athlon 64 S1
Processor Socket
D25
E4
VSS49
VSS50
VSS51
VSS114
VSS115
VSS116
U12
U14
F2 VSS52 VSS117 U16
F11 VSS53 VSS118 U18
F13 VSS54 VSS119 V2
+1.8V F15 V7
+1.8V VSS55 VSS120
F17 VSS56 VSS121 V9
F19 VSS57 VSS122 V11
F21 VSS58 VSS123 V13
1 1 1 1 F23 VSS59 VSS124 V15
C170 C181 C124 C147 F25 V17
22U_0805_6.3V6M 22U_0805_6.3V6M 0.22U_0603_16V4Z 0.22U_0603_16V4Z VSS60 VSS125
H7 VSS61 VSS126 W6
H9 VSS62 VSS127 Y21
2 2 2 2
H21 VSS63 VSS128 Y23
H23 VSS64 VSS129 N6
J4 VSS65
FOX_PZ63823-284S-41F
Under CPU Socket CONN@
Athlon 64 S1
+0.9V Processor Socket
Near Power Supply
B VTT decoupling. C66 +
1
C: Change to NBO CAP B

Between CPU Socket and DIMM

+1.8V 150U_D2_6.3VM
2

1 1 1 1
C157 C182 C68 C188
0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z +0.9V
2 2 2 2

1 1 1 1 1 1 1 1
180PF Qt'y follow the distance between C155 C146 C184 C173 C72 C145 C180 C121
+1.8V +1.8V CPU socket and DIMM0. <2.5inch> 4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 1000P_0402_50V7K 1000P_0402_50V7K 180P_0402_50V8J 180P_0402_50V8J
2 2 2 2 2 2 2 2
1 1 1 1 1 1
C175 C159 C189 C136 C156 C158
0.01U_0402_25V7K 0.01U_0402_25V7K 180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J
2 2 2 2 2 2
Near CPU Socket Right side.
+0.9V

+1.8V 1 1 1 1 1 1 1 1
C73 C70 C127 C185 C164 C163 C152 C179
4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 1000P_0402_50V7K 1000P_0402_50V7K 180P_0402_50V8J 180P_0402_50V8J
1 2 2 2 2 2 2 2 2
1 1 1 1
+ C162
C76 C167 C187 C132
A 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 220U_D2_4VM_R15 A
2 2 2 2 2 Near CPU Socket Left side.

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/5/18 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401650 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 10, 2009 Sheet 9 of 46
5 4 3 2 1
 5 4 3 2 1

+1.8V +1.8V +DIMM_VREF +1.8V

+0.9V +1.8V

1
0.1U_0402_16V4Z
R398 RP1
JDIMM2 C507 DDR_A_MA11 8 1 1 2
1 2 1 1 DDR_A_MA7 7 2 C81 0.1U_0402_16V4Z
VREF VSS DDR_A_D4 1K_0402_1% DDR_A_MA6
3 VSS DQ4 4 6 3 1 2

C503
4.7U_0805_10V4Z
DDR_A_D0 5 6 DDR_A_D5 DDR_A_MA2 5 4 C139 0.1U_0402_16V4Z

2
DDR_A_D1 DQ0 DQ5
7 DQ1 VSS 8
DDR_A_DM0 2 2 47_0804_8P4R_5%
9 VSS DM0 10
D DDR_A_DQS#0 RP2 D
11 DQS0# VSS 12
DDR_A_DQS0 13 14 DDR_A_D6 DDR_CKE0_DIMMA 8 1 1 2
DQS0 DQ6

1
15 16 DDR_A_D7 R397 DDR_CS2_DIMMA# 7 2 C192 0.1U_0402_16V4Z
DDR_A_D2 VSS DQ7 DDR_A_BS#2
17 DQ2 VSS 18 6 3 1 2
DDR_A_D3 19 20 DDR_A_D12 DDR_A_MA12 5 4 C88 0.1U_0402_16V4Z
DQ3 DQ12 DDR_A_D13 1K_0402_1%
21 VSS DQ13 22
DDR_A_D8 23 24 47_0804_8P4R_5%

2
DDR_A_D9 DQ8 VSS DDR_A_DM1 RP3
25 DQ9 DM1 26
27 28 DDR_A_MA4 8 1 1 2
DDR_A_DQS#1 VSS VSS DDR_A_CLK1 DDR_A_MA0 C117 0.1U_0402_16V4Z
29 DQS1# CK0 30 DDR_A_CLK1 7 7 2
DDR_A_DQS1 31 32 DDR_A_CLK#1 DDR_A_BS#1 6 3 1 2
DQS1 CK0# DDR_A_CLK#1 7
33 34 DDR_CS0_DIMMA# 5 4 C144 0.1U_0402_16V4Z
DDR_A_D10 VSS VSS DDR_A_D14
35 DQ10 DQ14 36
DDR_A_D11 37 38 DDR_A_D15 47_0804_8P4R_5%
DQ11 DQ15 RP4
39 VSS VSS 40
DDR_A_MA9 8 1 1 2
DDR_A_MA8 7 2 C114 0.1U_0402_16V4Z
41 42 DDR_A_MA5 6 3 1 2
DDR_A_D16 VSS VSS DDR_A_D20 DDR_A_MA3 C95 0.1U_0402_16V4Z
43 DQ16 DQ20 44 5 4
DDR_A_D17 45 46 DDR_A_D21 DDR_A_D[0..63]
DQ17 DQ21 7 DDR_A_D[0..63] 47_0804_8P4R_5%
47 VSS VSS 48
DDR_A_DQS#2 49 50 DDR_A_DM[0..7] RP5
DQS2# NC 7 DDR_A_DM[0..7]
DDR_A_DQS2 51 52 DDR_A_DM2 8 1 1 2
DQS2 DM2 DDR_A_DQS[0..7] DDR_A_MA1 C193 0.1U_0402_16V4Z
53 VSS VSS 54 7 DDR_A_DQS[0..7] 7 2
DDR_A_D18 55 56 DDR_A_D22 DDR_A_MA10 6 3 1 2
DDR_A_D19 DQ18 DQ22 DDR_A_D23 DDR_A_MA[0..15] DDR_A_BS#0 C125 0.1U_0402_16V4Z
57 DQ19 DQ23 58 7 DDR_A_MA[0..15] 5 4
59 VSS VSS 60
DDR_A_D24 61 62 DDR_A_D28 DDR_A_DQS#[0..7] 47_0804_8P4R_5%
DDR_A_D25 DQ24 DQ28 DDR_A_D29 7 DDR_A_DQS#[0..7] RP6
63 DQ25 DQ29 64
65 66 DDR_A_WE# 8 1 1 2
C DDR_A_DM3 VSS VSS DDR_A_DQS#3 DDR_A_CAS# C103 0.1U_0402_16V4Z C
67 DM3 DQS3# 68 7 2
69 70 DDR_A_DQS3 DDR_CS1_DIMMA# 6 3 1 2
NC DQS3 DDR_A_ODT1 C99 0.1U_0402_16V4Z
71 VSS VSS 72 5 4
DDR_A_D26 73 74 DDR_A_D30
DDR_A_D27 DQ26 DQ30 DDR_A_D31 47_0804_8P4R_5%
75 DQ27 DQ31 76
77 78 RP7
DDR_CKE0_DIMMA VSS VSS DDR_CKE1_DIMMA DDR_A_RAS#
7 DDR_CKE0_DIMMA 79 CKE0 NC/CKE1 80 DDR_CKE1_DIMMA 7 8 1 1 2
81 82 DDR_A_ODT0 7 2 C107 0.1U_0402_16V4Z
DDR_CS2_DIMMA# VDD VDD DDR_A_MA15 DDR_A_MA13
7 DDR_CS2_DIMMA# 83 NC NC/A15 84 6 3 1 2
DDR_A_BS#2 85 86 DDR_A_MA14 DDR_CS3_DIMMA# 5 4 C98 0.1U_0402_16V4Z
7 DDR_A_BS#2 BA2 NC/A14
87 VDD VDD 88
DDR_A_MA12 89 90 DDR_A_MA11 47_0804_8P4R_5%
DDR_A_MA9 A12 A11 DDR_A_MA7 RP8
91 A9 A7 92
DDR_A_MA8 93 94 DDR_A_MA6 DDR_CKE1_DIMMA 8 1 1 2
A8 A6 DDR_A_MA15 C101 0.1U_0402_16V4Z
95 VDD VDD 96 7 2
DDR_A_MA5 97 98 DDR_A_MA4 DDR_A_MA14 6 3 1 2
DDR_A_MA3 A5 A4 DDR_A_MA2 C191 0.1U_0402_16V4Z
99 A3 A2 100 5 4
DDR_A_MA1 101 102 DDR_A_MA0
A1 A0 47_0804_8P4R_5%
103 VDD VDD 104
DDR_A_MA10 105 106 DDR_A_BS#1
A10/AP BA1 DDR_A_BS#1 7
DDR_A_BS#0 107 108 DDR_A_RAS#
7 DDR_A_BS#0 BA0 RAS# DDR_A_RAS# 7
DDR_A_WE# 109 110 DDR_CS0_DIMMA#
7 DDR_A_WE# WE# S0# DDR_CS0_DIMMA# 7
111 VDD VDD 112
DDR_A_CAS# 113 114 DDR_A_ODT0
7 DDR_A_CAS# CAS# ODT0 DDR_A_ODT0 7
DDR_CS1_DIMMA# 115 116 DDR_A_MA13
7 DDR_CS1_DIMMA# NC/S1# NC/A13
117 VDD VDD 118
DDR_A_ODT1 119 120 DDR_CS3_DIMMA#
7 DDR_A_ODT1 NC/ODT1 NC DDR_CS3_DIMMA# 7
121 VSS VSS 122
DDR_A_D32 123 124 DDR_A_D36
DDR_A_D33 DQ32 DQ36 DDR_A_D37
125 DQ33 DQ37 126
B B
127 VSS VSS 128
DDR_A_DQS#4 129 130 DDR_A_DM4
DDR_A_DQS4 DQS4# DM4
131 DQS4 VSS 132
133 134 DDR_A_D38
DDR_A_D34 VSS DQ38 DDR_A_D39
135 DQ34 DQ39 136
DDR_A_D35 137 138
DQ35 VSS DDR_A_D44
139 VSS DQ44 140
DDR_A_D40 141 142 DDR_A_D45
DDR_A_D41 DQ40 DQ45
143 DQ41 VSS 144
145 146 DDR_A_DQS#5
DDR_A_DM5 VSS DQS5# DDR_A_DQS5
147 DM5 DQS5 148
149 VSS VSS 150
DDR_A_D42 151 152 DDR_A_D46
DDR_A_D43 DQ42 DQ46 DDR_A_D47
153 DQ43 DQ47 154
155 VSS VSS 156
DDR_A_D48 157 158 DDR_A_D52
DDR_A_D49 DQ48 DQ52 DDR_A_D53
159 DQ49 DQ53 160
161 VSS VSS 162
163 164 DDR_A_CLK2
NC,TEST CK1 DDR_A_CLK2 7
165 166 DDR_A_CLK#2
VSS CK1# DDR_A_CLK#2 7
DDR_A_DQS#6 167 168
DDR_A_DQS6 DQS6# VSS DDR_A_DM6
169 DQS6 DM6 170
171 VSS VSS 172
DDR_A_D50 173 174 DDR_A_D54
DDR_A_D51 DQ50 DQ54 DDR_A_D55
175 DQ51 DQ55 176
177 VSS VSS 178
DDR_A_D56 179 180 DDR_A_D60
DDR_A_D57 DQ56 DQ60 DDR_A_D61
181 DQ57 DQ61 182
183 VSS VSS 184
DDR_A_DM7 185 186 DDR_A_DQS#7
A DM7 DQS7# DDR_A_DQS7 A
187 VSS DQS7 188
DDR_A_D58 189 190
DDR_A_D59 DQ58 VSS DDR_A_D62
191 DQ59 DQ62 192
193 194 DDR_A_D63
SB_CK_SDAT VSS DQ63
11,16,18,31 SB_CK_SDAT 195 SDA VSS 196
SB_CK_SCLK 197 198 R12 1 2 10K_0402_5%
11,16,18,31 SB_CK_SCLK SCL SAO
199 200 R10 1 2 10K_0402_5%
+3VS
1 203
VDDSPD
GND
SA1
GND 204
Security Classification Compal Secret Data Compal Electronics, Inc.
C448 2005/10/11 2009/06/11 Title
FOX_AS0A426-M2RN-7F
Issued Date Deciphered Date
2
0.1U_0402_16V4Z CONN@ THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
Size Document Number Rev
JAWD0 used AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom D
401650
DIMM1 REV H:5.2mm (BOT) MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 10 of 46
5 4 3 2 1
 5 4 3 2 1

+1.8V +1.8V +DIMM_VREF

+0.9V +1.8V
RP9

0.1U_0402_16V4Z
DDR_B_MA2 8 1 2 1

4.7U_0805_10V4Z

C202

C198
JDIMM1 DDR_B_MA0 7 2 C196 0.1U_0402_16V4Z
1 2 1 1 DDR_B_BS#1 6 3 1 2
VREF VSS DDR_B_D4 DDR_B_RAS# C209 0.1U_0402_16V4Z
3 VSS DQ4 4 5 4
DDR_B_D0 5 6 DDR_B_D5
DDR_B_D1 DQ0 DQ5 47_0804_8P4R_5%
7 DQ1 VSS 8
DDR_B_DM0 2 2
9 VSS DM0 10
D DDR_B_DQS#0 RP10 D
11 DQS0# VSS 12
DDR_B_DQS0 13 14 DDR_B_D6 DDR_B_MA11 8 1 2 1
DQS0 DQ6 DDR_B_D7 DDR_B_MA7 C197 0.1U_0402_16V4Z
15 VSS DQ7 16 7 2
DDR_B_D2 17 18 DDR_B_MA6 6 3 1 2
DDR_B_D3 DQ2 VSS DDR_B_D12 DDR_B_MA4 C211 0.1U_0402_16V4Z
19 DQ3 DQ12 20 5 4
21 22 DDR_B_D13
DDR_B_D8 VSS DQ13 47_0804_8P4R_5%
23 DQ8 VSS 24
DDR_B_D9 25 26 DDR_B_DM1
DQ9 DM1 RP11
27 VSS VSS 28
DDR_B_DQS#1 29 30 DDR_B_CLK1 8 1 2 1
DQS1# CK0 DDR_B_CLK1 7
DDR_B_DQS1 31 32 DDR_B_CLK#1 DDR_CS2_DIMMB# 7 2 C205 0.1U_0402_16V4Z
DQS1 CK0# DDR_B_CLK#1 7
33 34 DDR_B_BS#2 6 3 1 2
DDR_B_D10 VSS VSS DDR_B_D14 DDR_CKE0_DIMMB C213 0.1U_0402_16V4Z
35 DQ10 DQ14 36 5 4
DDR_B_D11 37 38 DDR_B_D15
DQ11 DQ15 47_0804_8P4R_5%
39 VSS VSS 40

RP12
41 42 DDR_B_MA5 8 1 2 1
DDR_B_D16 VSS VSS DDR_B_D20 DDR_B_MA8 C199 0.1U_0402_16V4Z
43 DQ16 DQ20 44 7 2
DDR_B_D17 45 46 DDR_B_D21 DDR_B_MA9 6 3 1 2
DQ17 DQ21 DDR_B_MA12 C200 0.1U_0402_16V4Z
47 VSS VSS 48 5 4
DDR_B_DQS#2 49 50
DDR_B_DQS2 DQS2# NC DDR_B_DM2 DDR_B_D[0..63] 47_0804_8P4R_5%
51 DQS2 DM2 52 7 DDR_B_D[0..63]
53 VSS VSS 54
DDR_B_D18 55 56 DDR_B_D22 DDR_B_DM[0..7] RP13
DQ18 DQ22 7 DDR_B_DM[0..7]
DDR_B_D19 57 58 DDR_B_D23 DDR_B_BS#0 8 1 2 1
DQ19 DQ23 DDR_B_DQS[0..7] DDR_B_MA10 C206 0.1U_0402_16V4Z
59 VSS VSS 60 7 DDR_B_DQS[0..7] 7 2
DDR_B_D24 61 62 DDR_B_D28 DDR_B_MA1 6 3 1 2
DDR_B_D25 DQ24 DQ28 DDR_B_D29 DDR_B_MA[0..15] DDR_B_MA3 C201 0.1U_0402_16V4Z
63 DQ25 DQ29 64 7 DDR_B_MA[0..15] 5 4
65 VSS VSS 66
C DDR_B_DM3 67 68 DDR_B_DQS#3 DDR_B_DQS#[0..7] 47_0804_8P4R_5% C
DM3 DQS3# DDR_B_DQS3 7 DDR_B_DQS#[0..7]
69 NC DQS3 70
71 72 RP14
DDR_B_D26 VSS VSS DDR_B_D30 DDR_B_ODT1
73 DQ26 DQ30 74 8 1 2 1
DDR_B_D27 75 76 DDR_B_D31 DDR_CS1_DIMMB# 7 2 C210 0.1U_0402_16V4Z
DQ27 DQ31 DDR_B_CAS#
77 VSS VSS 78 6 3 1 2
DDR_CKE0_DIMMB 79 80 DDR_CKE1_DIMMB DDR_B_WE# 5 4 C208 0.1U_0402_16V4Z
7 DDR_CKE0_DIMMB CKE0 NC/CKE1 DDR_CKE1_DIMMB 7
81 VDD VDD 82
DDR_CS2_DIMMB# 83 84 DDR_B_MA15 47_0804_8P4R_5%
7 DDR_CS2_DIMMB# NC NC/A15
DDR_B_BS#2 85 86 DDR_B_MA14
7 DDR_B_BS#2 BA2 NC/A14
87 88 RP15
DDR_B_MA12 VDD VDD DDR_B_MA11 DDR_CS0_DIMMB#
89 A12 A11 90 8 1 2 1
DDR_B_MA9 91 92 DDR_B_MA7 DDR_B_ODT0 7 2 C194 0.1U_0402_16V4Z
DDR_B_MA8 A9 A7 DDR_B_MA6 DDR_B_MA13
93 A8 A6 94 6 3 1 2
95 96 DDR_CS3_DIMMB# 5 4 C207 0.1U_0402_16V4Z
DDR_B_MA5 VDD VDD DDR_B_MA4
97 A5 A4 98
DDR_B_MA3 99 100 DDR_B_MA2 47_0804_8P4R_5%
DDR_B_MA1 A3 A2 DDR_B_MA0
101 A1 A0 102
103 104 RP16
DDR_B_MA10 VDD VDD DDR_B_BS#1
105 A10/AP BA1 106 DDR_B_BS#1 7 8 1 2 1
DDR_B_BS#0 107 108 DDR_B_RAS# DDR_CKE1_DIMMB 7 2 C212 0.1U_0402_16V4Z
7 DDR_B_BS#0 BA0 RAS# DDR_B_RAS# 7
DDR_B_WE# 109 110 DDR_CS0_DIMMB# DDR_B_MA15 6 3 1 2
7 DDR_B_WE# WE# S0# DDR_CS0_DIMMB# 7
111 112 DDR_B_MA14 5 4 C195 0.1U_0402_16V4Z
DDR_B_CAS# VDD VDD DDR_B_ODT0
7 DDR_B_CAS# 113 CAS# ODT0 114 DDR_B_ODT0 7
DDR_CS1_DIMMB# 115 116 DDR_B_MA13 47_0804_8P4R_5%
7 DDR_CS1_DIMMB# NC/S1# NC/A13
117 VDD VDD 118
DDR_B_ODT1 119 120 DDR_CS3_DIMMB#
7 DDR_B_ODT1 NC/ODT1 NC DDR_CS3_DIMMB# 7
121 VSS VSS 122
DDR_B_D32 123 124 DDR_B_D36
DDR_B_D33 DQ32 DQ36 DDR_B_D37
125 DQ33 DQ37 126
B B
127 VSS VSS 128
DDR_B_DQS#4 129 130 DDR_B_DM4
DDR_B_DQS4 DQS4# DM4
131 DQS4 VSS 132
133 134 DDR_B_D38
DDR_B_D34 VSS DQ38 DDR_B_D39
135 DQ34 DQ39 136
DDR_B_D35 137 138
DQ35 VSS DDR_B_D44
139 VSS DQ44 140
DDR_B_D40 141 142 DDR_B_D45
DDR_B_D41 DQ40 DQ45
143 DQ41 VSS 144
145 146 DDR_B_DQS#5
DDR_B_DM5 VSS DQS5# DDR_B_DQS5
147 DM5 DQS5 148
149 VSS VSS 150
DDR_B_D42 151 152 DDR_B_D46
DDR_B_D43 DQ42 DQ46 DDR_B_D47
153 DQ43 DQ47 154
155 VSS VSS 156
DDR_B_D48 157 158 DDR_B_D52
DDR_B_D49 DQ48 DQ52 DDR_B_D53
159 DQ49 DQ53 160
161 VSS VSS 162
163 164 DDR_B_CLK2
NC,TEST CK1 DDR_B_CLK2 7
165 166 DDR_B_CLK#2
VSS CK1# DDR_B_CLK#2 7
DDR_B_DQS#6 167 168
DDR_B_DQS6 DQS6# VSS DDR_B_DM6
169 DQS6 DM6 170
171 VSS VSS 172
DDR_B_D50 173 174 DDR_B_D54
DDR_B_D51 DQ50 DQ54 DDR_B_D55
175 DQ51 DQ55 176
177 VSS VSS 178
DDR_B_D56 179 180 DDR_B_D60
DDR_B_D57 DQ56 DQ60 DDR_B_D61
181 DQ57 DQ61 182
183 VSS VSS 184
DDR_B_DM7 185 186 DDR_B_DQS#7
A DM7 DQS7# DDR_B_DQS7 A
187 VSS DQS7 188
DDR_B_D58 189 190
DDR_B_D59 DQ58 VSS DDR_B_D62
191 DQ59 DQ62 192
193 194 DDR_B_D63
SB_CK_SDAT VSS DQ63
10,16,18,31 SB_CK_SDAT 195 SDA VSS 196
SB_CK_SCLK 197 198 R11 1 2 10K_0402_5% +3VS
10,16,18,31 SB_CK_SCLK SCL SAO
199 200 R9 1 2 10K_0402_5%
+3VS
1 201
VDDSPD
GND
SA1
GND 202
Security Classification Compal Secret Data Compal Electronics, Inc.
C21 2005/10/11 2009/06/11 Title
FOX_AS0A426-MARG-7F
Issued Date Deciphered Date
2
0.1U_0402_16V4Z CONN@ THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
Size Document Number Rev
JAWD0 used AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom D
401650
DIMM2 REV H:9.2mm (BOT) MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 11 of 46
5 4 3 2 1
 5 4 3 2 1

U39A

D H_CADOP15 R19 P21 H_CADIP15 D

6 H_CADOP15 HT_RXCAD15P HT_TXCAD15P H_CADIP15 6
H_CADON15 R18 PART 1 OF 5 P22 H_CADIN15
6 H_CADON15 HT_RXCAD15N HT_TXCAD15N H_CADIN15 6
H_CADOP14 R21 P18 H_CADIP14
6 H_CADOP14 HT_RXCAD14P HT_TXCAD14P H_CADIP14 6
H_CADON14 R22 P19 H_CADIN14
6 H_CADON14 HT_RXCAD14N HT_TXCAD14N H_CADIN14 6
H_CADOP13 U22 M22 H_CADIP13
6 H_CADOP13 HT_RXCAD13P HT_TXCAD13P H_CADIP13 6
H_CADON13 U21 M21 H_CADIN13
6 H_CADON13 HT_RXCAD13N HT_TXCAD13N H_CADIN13 6
H_CADOP12 U18 M18 H_CADIP12
6 H_CADOP12 HT_RXCAD12P HT_TXCAD12P H_CADIP12 6
H_CADON12 U19 M19 H_CADIN12
6 H_CADON12 HT_RXCAD12N HT_TXCAD12N H_CADIN12 6
H_CADOP11 W19 L18 H_CADIP11
6 H_CADOP11 HT_RXCAD11P HT_TXCAD11P H_CADIP11 6
H_CADON11 W20 L19 H_CADIN11
6 H_CADON11 HT_RXCAD11N HT_TXCAD11N H_CADIN11 6
H_CADOP10 AC21 G22 H_CADIP10
6 H_CADOP10 HT_RXCAD10P HT_TXCAD10P H_CADIP10 6
H_CADON10 AB22 G21 H_CADIN10
6 H_CADON10 HT_RXCAD10N HT_TXCAD10N H_CADIN10 6
H_CADOP9 AB20 J20 H_CADIP9
6 H_CADOP9 HT_RXCAD9P HT_TXCAD9P H_CADIP9 6
H_CADON9 AA20 J21 H_CADIN9
6 H_CADON9 HT_RXCAD9N HT_TXCAD9N H_CADIN9 6
H_CADOP8 AA19 F21 H_CADIP8
6 H_CADOP8 HT_RXCAD8P HT_TXCAD8P H_CADIP8 6
H_CADON8 Y19 F22 H_CADIN8
6 H_CADON8 HT_RXCAD8N HT_TXCAD8N H_CADIN8 6
H_CADOP7 T24 N24 H_CADIP7
6 H_CADOP7 HT_RXCAD7P HT_TXCAD7P H_CADIP7 6
H_CADON7 R25 N25 H_CADIN7
6 H_CADON7 HT_RXCAD7N HT_TXCAD7N H_CADIN7 6
H_CADOP6 U25 L25 H_CADIP6
6 H_CADOP6 HT_RXCAD6P HT_TXCAD6P H_CADIP6 6
H_CADON6 U24 M24 H_CADIN6
6 H_CADON6 HT_RXCAD6N HT_TXCAD6N H_CADIN6 6
H_CADOP5 V23 K25 H_CADIP5
6 H_CADOP5 HT_RXCAD5P HT_TXCAD5P H_CADIP5 6
H_CADON5 U23 K24 H_CADIN5
6 H_CADON5 HT_RXCAD5N HT_TXCAD5N H_CADIN5 6
H_CADOP4 V24 J23 H_CADIP4
6 H_CADOP4 HT_RXCAD4P HT_TXCAD4P H_CADIP4 6
H_CADON4 V25 K23 H_CADIN4
6 H_CADON4 HT_RXCAD4N HT_TXCAD4N H_CADIN4 6
H_CADOP3 AA25 G25 H_CADIP3
6 H_CADOP3 HT_RXCAD3P HT_TXCAD3P H_CADIP3 6
H_CADON3 AA24 H24 H_CADIN3
6 H_CADON3 HT_RXCAD3N HT_TXCAD3N H_CADIN3 6

HYPER TRANSPORT I/F

H_CADOP2 AB23 F25 H_CADIP2
6 H_CADOP2 HT_RXCAD2P HT_TXCAD2P H_CADIP2 6
H_CADON2 AA23 F24 H_CADIN2
6 H_CADON2 HT_RXCAD2N HT_TXCAD2N H_CADIN2 6
H_CADOP1 AB24 E23 H_CADIP1
C 6 H_CADOP1 HT_RXCAD1P HT_TXCAD1P H_CADIP1 6 C
H_CADON1 AB25 F23 H_CADIN1
6 H_CADON1 HT_RXCAD1N HT_TXCAD1N H_CADIN1 6
H_CADOP0 AC24 E24 H_CADIP0
6 H_CADOP0 HT_RXCAD0P HT_TXCAD0P H_CADIP0 6
H_CADON0 AC25 E25 H_CADIN0
6 H_CADON0 HT_RXCAD0N HT_TXCAD0N H_CADIN0 6
H_CLKOP1 W21 L21 H_CLKIP1
6 H_CLKOP1 HT_RXCLK1P HT_TXCLK1P H_CLKIP1 6
H_CLKON1 W22 L22 H_CLKIN1
6 H_CLKON1 HT_RXCLK1N HT_TXCLK1N H_CLKIN1 6
H_CLKOP0 Y24 J24 H_CLKIP0
6 H_CLKOP0 HT_RXCLK0P HT_TXCLK0P H_CLKIP0 6
H_CLKON0 W25 J25 H_CLKIN0
6 H_CLKON0 HT_RXCLK0N HT_TXCLK0N H_CLKIN0 6
H_CTLOP0 P24 N23 H_CTLIP0
6 H_CTLOP0 HT_RXCTLP HT_TXCTLP H_CTLIP0 6
H_CTLON0 P25 P23 H_CTLIN0
6 H_CTLON0 HT_RXCTLN HT_TXCTLN H_CTLIN0 6
R382 1 2 49.9_0402_1% HT_RXCALP A24 C25 HT_TXCALP 1 R379 2
R380 1 HT_RXCALN HT_RXCALP HT_TXCALP HT_TXCALN
+VDDHT_PKG 2 49.9_0402_1% C24 HT_RXCALN HT_TXCALN D24 100_0402_1%

216MQA6AVA11FG_FCBGA465_RS690M

RS690MC : SA00001I480 / S IC 216LQA6AVA12FG RS690MC BGA 465P 0FA

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/03/08 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401650
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 12 of 46
5 4 3 2 1
 5 4 3 2 1

U39B

G5 GFX_RX0P PART 2 OF 5 GFX_TX0P J1

G4 GFX_RX0N GFX_TX0N H2
J8 GFX_RX1P GFX_TX1P K2
J7 GFX_RX1N GFX_TX1N K1
J4 GFX_RX2P GFX_TX2P K3
J5 GFX_RX2N GFX_TX2N L3
L8 GFX_RX3P GFX_TX3P L1
L7 GFX_RX3N GFX_TX3N L2
L4 GFX_RX4P GFX_TX4P N2
L5 GFX_RX4N GFX_TX4N N1
D M8 P2 D
GFX_RX5P GFX_TX5P
M7 GFX_RX5N GFX_TX5N P1
M4 GFX_RX6P GFX_TX6P P3
M5 GFX_RX6N GFX_TX6N R3
P8 R1

PCIE GFX I/F

GFX_RX7P GFX_TX7P
P7 GFX_RX7N GFX_TX7N R2
P4 GFX_RX8P GFX_TX8P T2
P5 GFX_RX8N GFX_TX8N U1
R4 GFX_RX9P GFX_TX9P V2
R5 GFX_RX9N GFX_TX9N V1
R7 GFX_RX10P GFX_TX10P V3
R8 GFX_RX10N GFX_TX10N W3
U4 GFX_RX11P GFX_TX11P W1
U5 GFX_RX11N GFX_TX11N W2
W4 GFX_RX12P GFX_TX12P Y2
W5 GFX_RX12N GFX_TX12N AA1
Y4 GFX_RX13P GFX_TX13P AA2
Y5 GFX_RX13N GFX_TX13N AB2
V9 GFX_RX14P GFX_TX14P AB1
W9 GFX_RX14N GFX_TX14N AC1
AB7 GFX_RX15P GFX_TX15P AE3
AB6 GFX_RX15N GFX_TX15N AE4

PCIE_MRX_PTX_P2 Y7 AD4 PCIE_MTX_PRX_P2 C457 1 2 0.1U_0402_16V7K PCIE_MTX_C_PRX_P2

WLAN 31 PCIE_MRX_PTX_P2
PCIE_MRX_PTX_N2 AA7
GPP_RX2P GPP_TX2P
AE5 PCIE_MTX_PRX_N2 C458 1 2 0.1U_0402_16V7K PCIE_MTX_C_PRX_N2
PCIE_MTX_C_PRX_P2 31
31 PCIE_MRX_PTX_N2 GPP_RX2N GPP_TX2N PCIE_MTX_C_PRX_N2 31 WLAN
PCIE_MRX_C_PTX_P3 AB9 AD5 PCIE_MTX_PRX_P3 C466 1 2 0.1U_0402_16V7K PCIE_MTX_C_PRX_P3
LAN 25 PCIE_MRX_C_PTX_P3
PCIE_MRX_C_PTX_N3 AA9
GPP_RX3P
PCIE I/F GPP
GPP_TX3P
AD6 PCIE_MTX_PRX_N3 C467 1 2 0.1U_0402_16V7K PCIE_MTX_C_PRX_N3
PCIE_MTX_C_PRX_P3 25
25 PCIE_MRX_C_PTX_N3 GPP_RX3N GPP_TX3N PCIE_MTX_C_PRX_N3 25 LAN
A_MRX_STX_P2 W11 AD8 A_MTX_SRX_P2 C659 1 2 0.1U_0402_16V7K A_MTX_C_SRX_P2
C 17 A_MRX_STX_P2 GPP_RX0P(SB_RX2P) GPP_TX0P(SB_TX2P) A_MTX_C_SRX_P2 17 C
A_MRX_STX_N2 W12 AE8 A_MTX_SRX_N2 C660 1 2 0.1U_0402_16V7K A_MTX_C_SRX_N2
17 A_MRX_STX_N2 GPP_RX0N(SB_RX2N) GPP_TX0N(SB_TX2N) A_MTX_C_SRX_N2 17

A_MRX_STX_P3 AA11 AD7 A_MTX_SRX_P3 C661 1 2 0.1U_0402_16V7K A_MTX_C_SRX_P3

17 A_MRX_STX_P3 GPP_RX1P(SB_RX3P) GPP_TX1P(SB_TX3P) A_MTX_C_SRX_P3 17
A_MRX_STX_N3 AB11 AE7 A_MTX_SRX_N3 C662 1 2 0.1U_0402_16V7K A_MTX_C_SRX_N3
A-Link 17 A_MRX_STX_N3 GPP_RX1N(SB_RX3N) GPP_TX1N(SB_TX3N) A_MTX_C_SRX_N3 17
A-Link
A_MRX_STX_P0 W14 AE9 A_MTX_SRX_P0 C465 1 2 0.1U_0402_16V7K A_MTX_C_SRX_P0
17 A_MRX_STX_P0 SB_RX0P SB_TX0P A_MTX_C_SRX_P0 17
A_MRX_STX_N0 W15 AD10 A_MTX_SRX_N0 C464 1 2 0.1U_0402_16V7K A_MTX_C_SRX_N0
17 A_MRX_STX_N0 SB_RX0N SB_TX0N A_MTX_C_SRX_N0 17
A_MRX_STX_P1 AB12 PCIE I/F SB AC8 A_MTX_SRX_P1 C468 1 2 0.1U_0402_16V7K A_MTX_C_SRX_P1
17 A_MRX_STX_P1 SB_RX1P SB_TX1P A_MTX_C_SRX_P1 17
A_MRX_STX_N1 AA12 AD9 A_MTX_SRX_N1 C469 1 2 0.1U_0402_16V7K A_MTX_C_SRX_N1
17 A_MRX_STX_N1 SB_RX1N SB_TX1N A_MTX_C_SRX_N1 17
AA14 AD11 R375 1 2 562_0402_1%
PCE_ISET(NC) PCE_PCAL(PCE_CALRP) R376 1 2K_0402_1%
AA14, AB14 NC AB14 PCE_TXISET(NC) PCE_NCAL(PCE_CALRN) AE11 2 +VDDA12_PKG2
for RS690
R375: 150 Ohm FOR RS485
216MQA6AVA11FG_FCBGA465_RS690M
562 Ohm FOR RS690
R376: 82.5 Ohm FOR RS485
2KOhm FOR RS690

RS690MC : SA00001I480 / S IC 216LQA6AVA12FG RS690MC BGA 465P 0FA

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/03/08 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
SCHEMATIC,MB A4861 Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Tuesday, April 14, 2009 Sheet 13 of 46
5 4 3 2 1
 5 4 3 2 1

+3VS +NB_AVDD
+1.8VS L43
+NB_AVDDQ 1 2 AVDD=100mA
L52 MBK2012121YZF_2P 1 1
1 2 2.2U_0805_10V6K C483 C487
MBK2012121YZF_2P 1 1 1
C495 C489 C484 1U_0603_10V4Z 4.7U_0805_10V4Z
2 2

10U_0805_10V4Z
@
1U_0603_10V4Z
2 2 2
U39C

+1.8VS B22 PART 3 OF 5 B14 LVDS_TXLP0

D AVDD1 TXOUT_L0P LVDS_TXLP0 24 D
L44 MBK2012121YZF_2P C22 B15 LVDS_TXLN0
AVDD2 TXOUT_L0N LVDS_TXLN0 24
AVSSQ_GND LVDS_TXLP1
1
1 2
1 1
G17
H17
AVSSN1 TXOUT_L1P B13
A13 LVDS_TXLN1
LVDS_TXLP1 24 TX
AVSSN2 TXOUT_L1N LVDS_TXLN1 24
+NB_PLLVDD C490 C496 +NB_AVDDDI AVDD=250mA A20 H14 LVDS_TXLP2
+ AVDDDI TXOUT_L2P LVDS_TXLP2 24
C186 B20 G14 LVDS_TXLN2
AVSSDI TXOUT_L2N LVDS_TXLN2 24
L53 150U_D2_6.3VM 1U_0603_10V4Z 2.2U_0805_10V6K D17
2 2 TXOUT_L3P
1 2
2
AVDDQ=200mA A21 AVDDQ TXOUT_L3N E17
MBK2012121YZF_2P
1 1 1 1 +NB_AVDDQ A22 AVSSQ

CRT/TVOUT
C499 C485 C492 A15 LVDS_TXUP0
TXOUT_U0P LVDS_TXUP0 24
10U_0805_10V4Z

C183 + @ C21 B16 LVDS_TXUN0

C TXOUT_U0N LVDS_TXUN0 24
4.7U_0805_10V4Z C20 C17 LVDS_TXUP1
2 2 2 Y TXOUT_U1P LVDS_TXUP1 24
R74~R76 CLOSE TO NB LVDS_TXUN1
2
D19 COMP TXOUT_U1N C18
B17 LVDS_TXUP2
LVDS_TXUN1 24 TZ
TXOUT_U2P LVDS_TXUP2 24
150U_D2_6.3VM 1U_0603_10V4Z CRT_R AVSSQ_GND E19 A17 LVDS_TXUN2
23 CRT_R RED TXOUT_U2N LVDS_TXUN2 24
CRT_G F19 A18
23 CRT_G GREEN TXOUT_U3P
CRT_B G19 B18
23 CRT_B BLUE TXOUT_U3N
VGA_CRT_VSYNC C6
23 VGA_CRT_VSYNC DACVSYNC

1
150_0402_1%

150_0402_1%

150_0402_1%
VGA_CRT_HSYNC A5 E15 LVDS_TXLCKP
23 VGA_CRT_HSYNC DACHSYNC TXCLK_LP LVDS_TXLCKP 24
+1.8VS R75 R76 R74 AMD review: use D15 LVDS_TXLCKN
TXCLK_LN LVDS_TXLCKN 24
+NB_HTPVDD 1 2 B21 H15 LVDS_TXUCKP +1.8VS +3VS
AVSSQ_GND (1006) AVSSQ_GND
R386 715_0402_1% RSET TXCLK_UP LVDS_TXUCKN
LVDS_TXUCKP 24
L54

MBK2012121YZF_2P
TXCLK_UN G15 LVDS_TXUCKN 24
L56 B6 1 1 1 1 2
23 VGA_DDC_CLK

2
DACSCL

2
1 2 A6 D14 +NB_LPVDD C154 C172 MBK2012121YZF_2P

LVTM
23 VGA_DDC_DATA DACSDA LPVDD
MBK2012121YZF_2P E14 0.1U_0402_16V4Z C177 L55
+3VS LPVSS 4.7U_0805_10V4Z
1 1 1 +NB_PLLVDD PLLVDD18=150mA A10 PLLVDD(PLLVDD18) 2 2 2
10U_0805_10V4Z

@ C493 C498 C488 B10 A12 +NB_LPVDDR18D LPVSS_GND +1.8VS

PLLVSS LVDDR18D_1 1U_0603_10V4Z
LVDDR18D_2 B12

1
4.7U_0805_10V4Z R568 R46 HTPVDD=200mA B24 +NB_LPVDDR18A

PLL PWR
+NB_HTPVDD C12 1 2

1
2 2 2 HTPVDD LVDDR18A_1(LVDDR33_1)
+1.8VS 2 1 10K_0402_5% 1K_0402_5% B25 HTPVSS LVDDR18A_2(LVDDR33_2) C13 L57 MBK2012121YZF_2P
LVDDR33=180mA

2
B
C 1U_0603_10V4Z C10 A16 C491 C
18,25,28,30,31 NB_RST# SYSRESET# LVSSR1

4.7U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

4.7U_0805_10V4Z
Q27 R62 1 2 0_0402_5% C11 A14 C171 1 1 1 1 1 1
28,33 NB_PWROK

2
E POWERGOOD LVSSR3

1U_0603_10V4Z
3 1 LDT_STOP#_NB C5 D12 C176 C481 C131 C497
8,17 LDT_STOP# LDTSTOP# LVSSR5

1U_0603_10V4Z
17 ALLOW_LDTSTOP B5 ALLOW_LDTSTOP LVSSR6 C19
MMBT3904_NL_SOT23-3 C15

PM
+1.2V_HT +PLLVDD12 R383 2 LVSSR7 2 2 2 2 2 2
1 10K_0402_5% C23 HTTSTCLK LVSSR8 C16
L70 PLLVDD12=70mA B23
16 HTREFCLK HTREFCLK
1 2
MBC1608121YZF_0603 1 1 C2 F14
TVCLKIN LVSSR12
LVSSR13 F15
C690 C691 A12 solved B11
16 NB_OSC OSCIN

CLOCKs
2.2U_0603_6.3V4Z 1U_0402_6.3V4Z +PLLVDD12 A11
2 2 OSCOUT(PLLVDD12)
PLLVDD12=70mA
16 NBSRC_CLKP F2 GFX_CLKP
E1 E12 LVDS_ENVDD LVSSR_GND
16 NBSRC_CLKN GFX_CLKN LVDS_DIGON
RS690 A11: This clock is needed even if External Graphic slot is not supported G12 LVDS_ENBKL
LVDS_BLON TP4 PAD
16 SBLINK_CLKP G1 SB_CLKP LVDS_BLEN F12
+3VS C763 G2
16 SBLINK_CLKN SB_CLKN
0.1U_0402_16V4Z
DVO_D0(GPP_TX0P) AD14 PCIE_MTX_PRX_P0 C527 1 2 0.1U_0402_16V7K PCIE_MTX_C_PRX_P0 30
R73 1 2 @ 2.7K_0402_5% DFT_GPIO0 D6 AD15 PCIE_MTX_PRX_N0 C528 1 2 0.1U_0402_16V7K
DFT_GPIO0 DVO_D1(GPP_TX0N) PCIE_MTX_C_PRX_N0 30
R78 1 2 @ 2.7K_0402_5% DFT_GPIO1 D7 AE15
DFT_GPIO1 DVO_D2(DEBUG6)
5

R60 @ 2.7K_0402_5% DFT_GPIO2

LVDS_ENVDD 2 R57
1
1
2
2 @ 2.7K_0402_5% DFT_GPIO3
C8
C7
DFT_GPIO2 DVO_D3(GPP_RX0P) AD16
AE16
PCIE_MRX_C_PTX_P0 30 NewCard
P

B DFT_GPIO3 DVO_D4(GPP_RX0N) PCIE_MRX_C_PTX_N0 30

4 ENVDD R58 1 2 @ 2.7K_0402_5% DFT_GPIO4 B8 AC17
Y R59 @ 2.7K_0402_5% DFT_GPIO5 DFT_GPIO4 DVO_D5(DEBUG9)
1 2 1 A 1 2 A8 DFT_GPIO5 DVO_D6(DEBUG10) AD18
G

R746 2.2K_0402_5% U48 AE19

DVO_D7(GPP_TX1N)

DVO
NC7SZ08P5X_NL_SC70-5 B2 AD19
3

MIS.
EDID_LCD_CLK BMREQ# DVO_D8(GPP_TX1P)
24 EDID_LCD_CLK A2 I2C_CLK DVO_D9(GPP_RX1N) AE20
NB_PWROK EDID_LCD_DAT B4 AD20
24 EDID_LCD_DAT I2C_DATA DVO_D10(GPP_RX1P)
AA15 THERMALDIODE_P DVO_D11(DEBUG15) AE21
B AB15 B
THERMALDIODE_N
5

DVO_VSYNC(DEBUG0) AD13
2 C14 AC13
P

B ENBKL DDC_DATA TMDS_HPD DVO_DE(DEBUG2)

LVDS_ENBKL Y 4 B3 DDC_DATA DVO_HSYNC(DEBUG1) AE13 RS690MC : SA00001I480 / S IC
1 A C3 TESTMODE DVO_IDCKP(DEBUG14) AE17
G

U49 STRP_DATA A3 AD17 216LQA6AVA12FG RS690MC BGA

STRP_DATA DVO_IDCKN(DEBUG13)
1

NC7SZ08P5X_NL_SC70-5
1 2 465P 0FA
3

R747 2.2K_0402_5% R377

4.7K_0402_5% 216MQA6AVA11FG_FCBGA465_RS690M

R744 @ 0_0402_5%
2

LVDS_ENVDD 1 2 ENVDD 24
R745 @ 0_0402_5%
LVDS_ENBKL 1 2 ENBKL 28

RS690 RS690 only

DFT_GPIO0 DFT_GPIO1 DFT_GPIO[4:2] DFT_GPIO5
PULL HIGH
R540 1 2 0_0805_5%
+3VS (internally Memory Bypass the loading These pin straps are used to configure PCI-E GPP mode: Enable debug bus via the memory
pulled high) side port of EEPROM straps IO pads, if available in the package
111: register defined (register default to Config E) DEFAULT
R49 2 1 4.7K_0402_5% EDID_LCD_CLK not available and use Hardware 110: 4-0-0-0-0 Config A
default values 101: 4-4 Config B use default values DEFAULT
R51 2 1 4.7K_0402_5% EDID_LCD_DAT AVSSQ_GND DEFAULT DEFAULT 100: 4-2-2 Config C 010: 4-1-1-1-1 Config E
011: 4-2-1-1 Config D
R50 2 @ 1 4.7K_0402_5% DDC_DATA R541 1 2 0_0805_5% I2C Master can
PULL Memory load strap values others: register defined (register default to Config E)
R576 1 2 4.7K_0402_5% VGA_DDC_CLK
A LOW side port from EEPROM if A
R575 1 2 4.7K_0402_5% VGA_DDC_DATA available connected, or use use the memory data bus
LPVSS_GND default values if
R41 STRP_DATA
to output the debug bus
1 2 10K_0402_5%
not connected
R39 1 @ 2 10K_0402_5% R542 1 2 0_0805_5%
Security Classification Compal Secret Data Compal Electronics, Inc.
STRP_DATA set PowerPlay Issued Date 2005/03/08 Deciphered Date 2009/06/11 Title
mode PWM output: won't
support THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
SCHEMATIC,MB A4861
Document Number Rev
LVSSR_GND AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Tuesday, April 14, 2009 Sheet 14 of 46
5 4 3 2 1
 5 4 3 2 1

+1.2V_HT
+1.2V_HT
L59
L63 2 1
2 1 FBMA-L11-201209-221LMA30T_0805 U39E
D FBMA-L11-201209-221LMA30T_0805 L60 D
2 1 A25 VSS1
L64 FBMA-L11-201209-221LMA30T_0805 F11 PAR 5 OF 5 V12
VSS2 VSSA2
2 1 D23 VSS3 VSSA3 V11
FBMA-L11-201209-221LMA30T_0805 E9 V14
+VDDA12 VSS4 VSSA4
G11 VSS5 VSSA5 F3
+VDD_HT U39D VDDA12=2.5A Y23 V15
VSS6 VSSA6
VDD_HT=800mA AA17 VDD_HT1 PART 4 OF 5 VDDA12_1 B1 P11 VSS7 VSSA7 A1
10U_0805_10V4Z

1U_0402_6.3V4Z AB17 C1 1 1 1 1 1 1 R24 H1

VDD_HT2 VDDA12_2 VSS8 VSSA8

1U_0402_6.3V4Z
1 1 1 1 1 1 AB19 D1 C110 C130 C112 C93 C106 C75 AE18 G3
C37 C46 C54 C50 C49 C48 VDD_HT3 VDDA12_3 + VSS9 VSSA9
AC18 VDD_HT4 VDDA12_4 D2 M15 VSS10 VSSA10 J2
AC19 D3 10U_0805_10V4Z 10U_0805_10V4Z J22 H3
VDD_HT5 VDDA12_5 2 2 2 2 2 150U_D2_6.3VM VSS11 VSSA11
AC20 VDD_HT6 VDDA12_6 E2 G23 VSS12
2 2 2 2 2 2 2
AD21 VDD_HT7 VDDA12_7 E3 J12 VSS13 VSSA13 J6
1U_0402_6.3V4Z 1U_0402_6.3V4Z AD22 F4 1U_0402_6.3V4Z L12
1U_0402_6.3V4Z 1U_0402_6.3V4Z VDD_HT8 VDDA12_8 1U_0402_6.3V4Z VSS14
AD23 VDD_HT9 VDDA12_9 E6 L14 VSS15 VSSA15 F1
+1.8VS +VDD18 AD24 G7 L20 L6
L2 VDD_HT10 VDDA12_10 VSS16 VSSA16
AE23 VDD_HT11 VDDA12_11 L9 L23 VSS17 VSSA17 M2
1 2 1U_0402_6.3V4Z AE24 M9 +1.2V_HT M11 M6
MBC1608121YZF_0603 VDD_HT12 VDDA12_12 VSS18 VSSA18
1 1 1 AE25 VDD_HT13 VDDC=5A M20 VSS19 VSSA19 J3

POWER
C141 C142 C123 W17 A4 M23 P6
VDD_HT14 VDDC_1 VSS20 VSSA20
Y17 VDD_HT15 VDDC_2 A7 1 1 1 1 1 1 M25 VSS21 VSSA21 T1
VDD18=200mA A9 C115 C126 C87 C94 C60 C79 N12 N3
2.2U_0805_10V6K 2 2 2 VDDC_3 VSS22 VSSA22
J14 VDD18_1 VDDC_4 A19 N14 VSS23
+1.2V_HT 1U_0402_6.3V4Z J15 B9 1U_0402_6.3V4Z R6
L58 +VDDA12 VDD18_2 VDDC_5 2 2 2 2 2 2 VSSA24
VDD12=2.5A VDDC_6 B19 L24 VSS25 VSSA25 U2
1 2 1 AB3 C9 10U_0805_10V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z P13 T3
FBMA-L11-201209-221LMA30T_0805 VDDA18_1(VDDA12_13) VDDC_7 10U_0805_10V4Z 1U_0402_6.3V4Z VSS26 VSSA26
AB4 D9 P20

GROUND
1 1 1 1 1 1 1 VDDA18_2(VDDA12_14) VDDC_8 VSS27 VSSA27 U3
10U_0805_10V4Z

+ C44 C40 C459 C460 C462 C456 C461 AC3 D20 P15 U6
VDDA18_3(VDDA12_15) VDDC_9 1 1 1 VSS28 VSSA28
C25 AD2 G20 C108 C138 C135 R12
C 150U_D2_6.3VM VDDA18_4(VDDA12_16) VDDC_10 VSS29 C
AE1 VDDA18_5(VDDA12_17) VDDC_11 H11 R14 VSS30 VSSA30 Y1
2 2 2 2 2 2 2 2
AE2 VDDA18_6(VDDA12_18) VDDC_12 J11 R20 VSS31
10U_0805_10V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z 2 2 2
U7 VDDA18_7(VDDA12_19) VDDC_13 J19 W23 VSS32 VSSA32 W6
+3VS 1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z W7 L11 1 1U_0402_6.3V4Z 1U_0402_6.3V4Z Y25 AC2
L3 +VDDR3 VDDA18_8(VDDA12_20) VDDC_14 C24 1U_0402_6.3V4Z VSS33 VSSA33
VDDR3=70mA VDDC_15 L13 1 AD25 VSS34 VSSA34 Y3
1 2 D11 L15 + C31 U20 Y9
MBC1608121YZF_0603 VDDR3_1 VDDC_16 10U_0805_10V4Z VSS35 VSSA35
1 1 E11 VDDR3_2 VDDC_17 L17 H25 VSS36 VSSA36 Y11
C161 C160 M12 150U_D2_6.3VM W24 Y12
VDDC_18 2 2 VSS37 VSSA93
VDDR=100mA AC12 VDD_DVO1(VDDR_1) VDDC_19 M14 Y22 VSS38 VSSA94 Y14
1U_0402_6.3V4Z 4.7U_0805_10V4Z AD12 N11 AC23 AA3
2 2 VDD_DVO2(VDDR_2) VDDC_20 VSS39 VSSA95
AE12 VDD_DVO3(VDDR_3) VDDC_21 N13 D25 VSS40 VSSA37 R9
VDD12=50mA VDDC_22 N15 G24 VSS41 VSSA38 AD1
+VDDR E7 P12 AC14 AC5
+1.8VS L1 VDDA12(VDDPLL_1) VDDC_23 VSS42 VSSA39
F7 VDDA12(VDDPLL_2) VDDC_24 P14 VSSA40 AC6
1 2 F9 VSSA12(VSSPLL_1) VDDC_25 P17 AC22 VSS44 VSSA41 AC7
MBK2012121YZF_2P 1 1 1 G9 R11 R23 AD3
VSSA12(VSSPLL_2) VDDC_26 VSS45 VSSA42
1U_0402_6.3V4Z

C38 C42 C43 R13 C4 AC9

VDDC_27 VSS46 VSSA43
+VDDHT_PKG D22 VDDHT_PKG VDDC_28 R15 AE22 VSS47 VSSA44 AC10
+VDDA12_PKG1 M1 VDDA12_PKG1 VDDC_29 U11 T23 VSS48 VSSA45 G6
2 2 2
+VDDA12_PKG2 AC11 VDDA12_PKG2 VDDC_30 U12 T25 VSS49 VSSA46 Y15
1U_0402_6.3V4Z U14 AE14 AC4
1U_0402_6.3V4Z VDDC_31 VSS50 VSSA47
VDDC_32 U15 R17 VSS51 VSSA48 P9
H23 VSS52 VSSA49 AE6
+VDDA12 +VDDPLL +VDDA12_PKG1 216MQA6AVA11FG_FCBGA465_RS690M M17 AE10
L76 VSS53 VSSA50
A23 VSS54 VSSA51 M3
1 2
MBC1608121YZF_0603
1 RS690MC : SA00001I480 / S IC 216LQA6AVA12FG RS690MC BGA 465P 0FA AC15 VSS55
1 1 F17 VSS56
4.7U_0805_10V4Z

C140 C168 C134 D4

10U_0805_10V4Z VSS57
1U_0402_6.3V4Z 2
M13 VSS59
B 2 2 B
RS485: 0 Ohm RESISTOR AC16 VSS60
RS690: 220 Ohm 500mA FERRITE BEAD H12 VSS61
B7 VSS62

216MQA6AVA11FG_FCBGA465_RS690M

+1.2V_HT +1.8VS
+1.2V_HT +1.2VALW
C353
C350
2 1
2 1
0.1U_0402_16V4Z
0.1U_0402_16V4Z

+1.2V_HT +1.2VALW +1.2V_HT +3VS

C352 C354
2 1 2 1

0.1U_0402_16V4Z 0.1U_0402_16V4Z EMI

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/10/10 2009/06/11 Title
Deciphered Date SCHEMATIC,MB A4861
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Tuesday, April 14, 2009 Sheet 15 of 46
5 4 3 2 1
 5 4 3 2 1

+3VS
+CLK_VDD
L8 CLK_VDD=500mA
1 2 +3VS
MBK2012121YZF_2P 1 1 1 1 1 1 1 1 1 CLK_VDDA=50mA L10

10U_0805_10V4Z
C277 C272 C263 C276 C268 C259 C254 C248 C279 CLK_VDDA 1 2
2 1 MBK2012121YZF_2P
C261 C260
2 2 2 2 2 2 2 2 2
0.1U_0402_16V4Z 10U_0805_10V4Z
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 2
D 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z D

1- PLACE ALL SERIAL TERMINATION

+3VS
RESISTORS CLOSE TO U40 +CLK_VDD
L9 CLK_VDD48=50mA
2- PUT DECOUPLING CAPS CLOSE TO U40 1 2
POWER PIN MBK2012121YZF_2P U40
1 R427
C252 54 50 261_0402_1%
VDDCPU VDDA
14 VDDSRC GNDA 49 1 2
2.2U_0805_10V6K 23 47.5_0402_1%
+3VS 2 VDDSRC CPUCLK_EXT_R R423 1
28 VDDSRC CPUCLK8T0 56 2 CPUCLK 8
L6 44 55 CPUCLK#_EXT_R R429 1 2
VDDSRC CPUCLK8C0 CPUCLK# 8
1 2 CLK_VDD48 5 52
MBK2012121YZF_2P VDD48 CPUCLK8T1 47.5_0402_1%
39 VDDATIG CPUCLK8C1 51
1 CLK_VDDREF 2
C246 VDDREF SBLINK_CLKP_R R435 33_0402_1% SBLINK_CLKP
CLK_VDDREF=50mA 60 VDDHTT SRCCLKT6 16 1 2 SBLINK_CLKP 14
17 SBLINK_CLKN_R R437 1 2 33_0402_1% SBLINK_CLKN PCI-E A-LINK
SRCCLKC6 SBLINK_CLKN 14
2.2U_0805_10V6K 53 41 NBSRC_CLKP_R R450 1 2 33_0402_1% NBSRC_CLKP
2 GNDCPU ATIGCLKT0 NBSRC_CLKP 14
15 40 NBSRC_CLKN_R R456 1 2 33_0402_1% NBSRC_CLKN PCI-E GFX
GNDSRC ATIGCLKC0 NBSRC_CLKN 14
22 GNDSRC ATIGCLKT1 37
Parallel Resonance Crystal 29 GNDSRC ATIGCLKC1 36 RS690 A11: This clock is needed even if External Graphic slot is not supported
45 GNDSRC ATIGCLKT2 35
+3VS C511 1 2 8 34
GND48 ATIGCLKC2
38 GNDATIG ATIGCLKT3 30

2
27P_0402_50V8J 1 31
R412 GNDREF ATIGCLKC3 SBSRC_CLKP_R R443 1
58 GNDHTT SRCCLKT5 18 2 33_0402_1% SBSRC_CLKP 17
Y5 @ 19 SBSRC_CLKN_R R449 1 2 33_0402_1% PCI-E A-LINK
SRCCLKC5 SBSRC_CLKN 17
1

CLK_X1 3 20

2
R415 1M_0402_5% X1 SRCCLKT4
21

1
C C510 1 CLK_X2 SRCCLKC4 CLK_PCIE_CARD_R R651 33_0402_1% C
10K_0402_5% 2 2 1 4 X2 SRCCLKT3 24 1 2 CLK_PCIE_CARD 30
14.31818MHz_20P_1BX14318BE1A 25 CLK_PCIE_CARD#_R R682 1 2 33_0402_1% NewCard
SRCCLKC3 CLK_PCIE_CARD# 30
27P_0402_50V8J R417 0_0402_5% 26 CLK_PCIE_LAN_R R637 1 2 33_0402_1%
CLK_PCIE_LAN 25
2

SRCCLKT2 CLK_PCIE_LAN#_R R638 33_0402_1%

SRCCLKC2 27 1 2 CLK_PCIE_LAN# 25 LAN
11 47 CLK_PCIE_MINI2_R R438 1 2 33_0402_1%
RESET_IN# SRCCLKT0 CLK_PCIE_MINI2 31
61 46 CLK_PCIE_MINI2#_R R444 1 2 33_0402_1% WLAN
NC SRCCLKC0 CLK_PCIE_MINI2# 31
SRCCLKT1 43
SRCCLKC1 42

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%
SRCCLKT7 12
SRCCLKC7 13

2
SB_CK_SCLK R425 1 2 0_0402_5% 9 57
10,11,18,31 SB_CK_SCLK SMBCLK CLKREQA#

1 R445

1 R439

1 R458

1 R453

1 R448

1 R442

1 R452

1 R446

1 R457

1 R451

1 R436

1 R434
SB_CK_SDAT R431 1 2 0_0402_5% 10 32 R459 1 2 0_0402_5%
10,11,18,31 SB_CK_SDAT SMBDAT CLKREQB# EXP_CLKREQ# 30
33 R461 1 2 0_0402_5%
CLKREQC# MINI2_CLKREQ# 31
48 IREF 48MHz_1 7
Ioh = 5 * Iref 48MHz_0 6 +CLK_VDD
(2.32mA) 2 CLK_SD_48M_R R421 1 2 33_0402_1% CLK_SD_48M 27
2.2K_0402_5%
R433 CLK_48M_USB_R R416 1 2 33_0402_1% CLK_USB_48M 18

1
Voh = 0.71V @ 60 ohm 475_0402_1% 63
FS1/REF1 R402 R401 R409
FS0/REF0 64 1 2
62 C861 22P_0402_50V8J EMI
1

FS2/REF2 @ 2.2K_0402_5% 2.2K_0402_5%

HTTCLK0 59

2
R404 1 2 8.2K_0402_5% R400 2 1 @ 0_0402_5%
ICS951462AGLFT_TSSOP64 R403 1 2 8.2K_0402_5% R399 2 1 @ 0_0402_5%
R413 1 2 8.2K_0402_5% R410 2 1 @ 0_0402_5%

SB_OSCIN_R R407 1 2 33_0402_1% SB_OSCIN 18

B NB_OSCIN_R R418 1 2 33_0402_1% B
NB_OSC 14
HTREFCLK_R R419 1 2 33_0402_1% HTREFCLK 14

1
R420
49.9_0402_1%
EXT CLK FREQUENCY SELECT TABLE(MHZ)

2
FS2 FS1 FS0 CPU SRCCLK HTT PCI USB COMMENT
[2:1]
+3VS
0 0 0 Hi-Z 100.00 Hi-Z Hi-Z 48.00 Reserved
0 0 1 X 100.00 X/3 X/6 48.00 Reserved R645 10K_0402_5%
EXP_CLKREQ# 1 2
0 1 0 180.00 100.00 60.00 30.00 48.00 Reserved
R647 10K_0402_5%
0 1 1 220.00 100.00 36.56 73.12 48.00 Reserved MINI2_CLKREQ# 1 2

1 0 0 100.00 100.00 66.66 33.33 48.00 Reserved

1 0 1 133.33 100.00 66.66 33.33 48.00 Reserved
1 1 1 200.00 100.00 66.66 33.33 48.00 Normal ATHLON64 operation

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/03/08 2009/06/11 Title
Deciphered Date SCHEMATIC,MB A4861
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Tuesday, April 14, 2009 Sheet 16 of 46
5 4 3 2 1
 5 4 3 2 1

U18A
SB600 SB U2 CLK_PCI_CLK0
PCICLK0 CLK_PCI_CLK0 21
T2 CLK_PCI_CLK1
PCICLK1 CLK_PCI_CLK1 21
16 SBSRC_CLKP J24 PCIE_RCLKP PCICLK2 U1

PCI CLKS
16 SBSRC_CLKN J25 PCIE_RCLKN PCICLK3 V2
W3 CLK_PCI_CLK4 CLK_PCI_CLK1 R255 1 2 22_0402_5%
PCICLK4 CLK_PCI_CLK4 21 CLK_PCI_LPC 28
A_MRX_STX_P0 C509 1 2 0.1U_0402_16V7K A_MRX_C_STX_P0 P29 U3
13 A_MRX_STX_P0 PCIE_TX0P PCICLK5
+3VALW A_MRX_STX_N0 C508 1 2 0.1U_0402_16V7K A_MRX_C_STX_N0 P28 V1

PCI EXPRESS INTERFACE

13 A_MRX_STX_N0 PCIE_TX0N PCICLK6 CLK_PCI_CLK6 21
A_MRX_STX_P1 C216 1 2 0.1U_0402_16V7K A_MRX_C_STX_P1 M29 T1 R121 1 2 10K_0402_5%
13 A_MRX_STX_P1 PCIE_TX1P SPDIF_OUT/PCICLK7/GPIO41
A_MRX_STX_N1 C217 1 2 0.1U_0402_16V7K A_MRX_C_STX_N1 M28 @
13 A_MRX_STX_N1 PCIE_TX1N
1 2 SB_TEST0 A_MRX_STX_P2 C663 1 2 0.1U_0402_16V7K A_MRX_C_STX_P2 K29 AJ9
13 A_MRX_STX_P2 PCIE_TX2P PCIRST#
R692 @ 2.2K_0402_5% A_MRX_STX_N2 C664 1 2 0.1U_0402_16V7K A_MRX_C_STX_N2 K28
13 A_MRX_STX_N2 PCIE_TX2N
1 2 SB_TEST1 A_MRX_STX_P3 C665 1 2 0.1U_0402_16V7K A_MRX_C_STX_P3 H29
D 13 A_MRX_STX_P3 PCIE_TX3P D
R693 @ 2.2K_0402_5% A_MRX_STX_N3 C666 1 2 0.1U_0402_16V7K A_MRX_C_STX_N3 H28 W7
13 A_MRX_STX_N3 PCIE_TX3N AD0/ROMA18
1 2 SB_TEST2 Y1
R694 @ 2.2K_0402_5% A_MTX_C_SRX_P0 AD1/ROMA17
13 A_MTX_C_SRX_P0 T25 PCIE_RX0P AD2/ROMA16 W8
A_MTX_C_SRX_N0 T26 W5
13 A_MTX_C_SRX_N0 PCIE_RX0N AD3/ROMA15
A_MTX_C_SRX_P1 T22 AA5
13 A_MTX_C_SRX_P1 PCIE_RX1P AD4/ROMA14
A_MTX_C_SRX_N1 T23 Y3
13 A_MTX_C_SRX_N1 PCIE_RX1N AD5/ROMA13
A_MTX_C_SRX_P2 M25 AA6
13 A_MTX_C_SRX_P2 PCIE_RX2P AD6/ROMA12
A_MTX_C_SRX_N2 M26 AC5
+1.8VS 13 A_MTX_C_SRX_N2 PCIE_RX2N AD7/ROMA11
A_MTX_C_SRX_P3 M22 AA7
13 A_MTX_C_SRX_P3 PCIE_RX3P AD8/ROMA9
A_MTX_C_SRX_N3 M23 AC3
13 A_MTX_C_SRX_N3 PCIE_RX3N AD9/ROMA8
2 1 ALLOW_LDTSTOP AC7
R691 1K_0402_5% R137 1 AD10/ROMA7
2 562_0402_1% E29 PCIE_CALRP AD11/ROMA6 AJ7
+PCIE_VDDR R138 1 2 2.05K_0402_1% E28 AD4
PCIE_CALRN AD12/ROMA5
AD13/ROMA4 AB11
R136 1 2 0_0402_5% E27 AE6
PCIE_CALI AD14/ROMA3
AD15/ROMA2 AC9
AD16/ROMD0 AA3
R440 1 2 0_0402_5% AC26 AJ4
8 CPU_PWRGD CPU_PG/LDT_PG AD17/ROMD1
W26 INTR/LINT0 AD18/ROMD2 AB1
+3VALW W24 AH4
NMI/LINT1 AD19/ROMD3
W25 INIT# AD20/ROMD4 AB2
AA24 SMI# AD21/ROMD5 AJ3
8,14 LDT_STOP# LDT_STOP# AA23 AB3
SB_PCIE_WAKE# SLP#/LDT_STP# AD22/ROMD6 PCI_AD23
2 1 AA22 IGNNE#/SIC AD23/ROMD7 AH3 PCI_AD23 21
R466 10K_0402_5% AA26 AC1 PCI_AD24 PCI_AD24 21

CPU
A20M#/SID AD24 PCI_AD25
Y27 FERR# AD25 AH2 PCI_AD25 21
ALLOW_LDTSTOP AA25 AC2 PCI_AD26 PCI_AD26 21
14 ALLOW_LDTSTOP STPCLK#/ALLOW_LDTSTP AD26
2 @ 1 PBTN_OUT# AH9 AH1 PCI_AD27 PCI_AD27 21
R701 1K_0402_1% CPU_STP#/DPSLP_3V# AD27 PCI_AD28
B24 DPSLP_OD#/GPIO37 AD28 AD2 PCI_AD28 21
W23 DPRSLPVR AD29 AG2
C AC25 AD1 C
8 LDT_RST# LDT_RST#/DPRSTP#/PROCHOT# AD30
2 @ 1 PM_SLP_S3# AG1
R470 4.7K_0402_5% AD31
CBE0#/ROMA10 AB9

PCI INTERFACE
EC_SWI# A3 AF9
28 EC_SWI# PCI_PME#/GEVENT4# CBE1#/ROMA1

ACPI / WAKE UP EVENTS

EC_SCI# B2 AJ5
28 EC_SCI# RI#/EXTEVNT0# CBE2#/ROMWE#
2 @ 1 PM_SLP_S5# 28 PM_SLP_S3# PM_SLP_S3# F7 AG3
R184 4.7K_0402_5% PM_SLP_S5# SLP_S3# CBE3#
28 PM_SLP_S5# A5 SLP_S5# FRAME# AA2
PBTN_OUT# E3 AH6
28 PBTN_OUT# SB_PWROK PWR_BTN# DEVSEL#/ROMA0
8,28,33 SB_PWROK B5 PWR_GOOD IRDY# AG5
2 @ 1 S3_STATE_R B3 AA1
R465 10K_0402_5% SB_TEST0 SUS_STAT# TRDY#/ROMOE#
G9 TEST0 PAR/ROMA19 AF7
SB_TEST1 E9 Y2
SB_TEST2 TEST1 STOP#
F9 TEST2 PERR# AG8
2 @ 1 EC_SWI# 2 1 S3_STATE_R D9 AC11
28 S3_STATE S3_STATE/GEVENT5# SERR#
R267 10K_0402_5% R577 @ 0_0402_5% F4 AJ8
SB_PCIE_WAKE# SYS_RESET#/GPM7# REQ0#
30,31 SB_PCIE_WAKE# E7 WAKE#/GEVENT8# REQ1# AE2
C2 BLINK/GPM6# REQ2# AG9
2 1 EC_SCI# H_THERMTRIP# G7 AH8
8 H_THERMTRIP# SMBALERT#/THRMTRIP#/GEVENT2# REQ3#/GPIO70
R571 10K_0402_5% AH5 TP32
REQ4#/GPIO71
D7 LPC_PME#/GEVENT3# GNT0# AD11
C25 LPC_SMI#/EXTEVNT1# GNT1# AF2
EC_GA20 AF26 AH7
28 EC_GA20 EC_KBRST# GA20IN GNT2#
28 EC_KBRST# AG26 KBRST# GNT3#/GPIO72 AB12
AG4 TP33
LPC_AD0 GNT4#/GPIO73 PM_CLKRUN# +3VS
28 LPC_AD0 AG24 LAD0 CLKRUN# AG7 PM_CLKRUN# 28
LPC_AD1 AG25 AF6 @
28 LPC_AD1 LAD1 LOCK#

LPC
20M_0603_5% 2 @ 1 R244 LPC_AD2 AH24 PM_CLKRUN# R120 1 2 10K_0402_5%
28 LPC_AD2 LAD2
LPC_AD3 AH25 AD3
28 LPC_AD3 LAD3 INTE#/GPIO33
18P_0402_50V8J C314 LPC_FRAME# AF24 AF1
28 LPC_FRAME# LFRAME# INTF#/GPIO34
1 2 AJ24 LDRQ0# INTG#/GPIO35 AF4
B AH26 AF3 B
Y3 LDRQ1#/GNT5#/GPIO68 INTH#/GPIO36
W22 BMREQ#/REQ5#/GPIO65
2

3 4 SERIRQ AF23
NC OUT R218 28 SERIRQ SERIRQ
2 1 20M_0603_5% 32K_X1 D2 D3 RTC_CLK 21 +RTCBATT
NC IN X1 RTCCLK

XTAL
RTC_IRQ#/GPIO69 F5 RTC_IRQ# 21
32.768KHZ_12.5P_MC-306
1

1 2 32K_X2 C1 E1 VBAT_IN

RTC
X2 VBAT
RTC_GND D1 1 1
18P_0402_50V8J C307 C322

1
218S6ECLA13FG_FCBGA548_SB600 C315
0.1U_0402_16V4Z D7
2 2
SB600 : SA00001DUD0 / S IC 218S6ECLA21FG SB600 FCBGA 549P 0FA 1U_0402_6.3V4Z
BAS40-04_SOT23-3

+RTCVCC
2 @ 1

2
R240
R764 10K_0603_5% 2 1 +CHGRTC

close to RAM door 510_0402_5% 1 1

C317 C327
@ 0.1U_0402_16V4Z
4.7U_0805_10V4Z 2 2

A
RTC Battery A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/03/08 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
SCHEMATIC,MB A4861 Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Tuesday, April 14, 2009 Sheet 17 of 46
5 4 3 2 1
 5 4 3 2 1

NOTE:
R462 IS 1K 1% FOR +3VALW +3VS
25MHz XTAL, 4.99K 1% PLACE SATA AC COUPLING
FOR 100MHz INTERNAL CAPS CLOSE TO CONN.

10K_0402_5%

10K_0402_5%
CLOCK

2
U18B

R742

R635
SATA_STX_C_DRX_P0 0.01U_0402_16V7K 2 C554 SATA_STX_DRX_P0 @ @
22 SATA_STX_C_DRX_P0
SATA_STX_C_DRX_N0 0.01U_0402_16V7K 1
1
2 C556 SATA_STX_DRX_N0
AH21
AJ21
SATA_TX0+ SB600 SB AB29
22 SATA_STX_C_DRX_N0 SATA_TX0- IDE_IORDY
SATA_STX_C_DRX_P1 0.01U_0402_16V7K 1 2 C576 SATA_STX_DRX_P1 AH18 AA28
22 SATA_STX_C_DRX_P1

1
SATA_STX_C_DRX_N1 0.01U_0402_16V7K 1 C578 SATA_STX_DRX_N1 SATA_TX1+ IDE_IRQ
22 SATA_STX_C_DRX_N1 2 AJ18 SATA_TX1- IDE_A0 AA29
SATA_STX_C_DRX_P2 0.01U_0402_16V7K 1 2 C668 SATA_STX_DRX_P2 AH13 AB27 CRT_DET
22 SATA_STX_C_DRX_P2 SATA_TX2+ IDE_A1
SATA_STX_C_DRX_N2 0.01U_0402_16V7K 1 C669 SATA_STX_DRX_N2
PORT0 : MAIN HDD 22 SATA_STX_C_DRX_N2 2 AH14 SATA_TX2- IDE_A2 Y28

1
D SATA_STX_C_DRX_P3 0.01U_0402_16V7K SATA_STX_DRX_P3 D D
22 SATA_STX_C_DRX_P3 1 2 C581 AJ11 SATA_TX3+ IDE_DACK# AB28 Q38 High: CRT Plugged
PORT1 : SECOND HDD 22 SATA_STX_C_DRX_N3
SATA_STX_C_DRX_N3 0.01U_0402_16V7K 1 2 C582 SATA_STX_DRX_N3 AH11 SATA_TX3- IDE_DRQ AC27 23 CRT_DET# 2
G @ 2N7002_SOT23-3
IDE_IOR# AC29
PORT2 : MAIN ODD

SERIAL ATA
SATA_DTX_C_SRX_P0 0.01U_0402_16V7K 1 2 C564 SATA_DTX_SRX_P0 AJ20 AC28 S
22 SATA_DTX_C_SRX_P0

3
SATA_DTX_C_SRX_N0 0.01U_0402_16V7K 1 C565 SATA_DTX_SRX_N0 SATA_RX0+ IDE_IOW#
2 AH20 W28
PORT3 : SECOND ODD 22
22
SATA_DTX_C_SRX_N0
SATA_DTX_C_SRX_P1
SATA_DTX_C_SRX_P1 0.01U_0402_16V7K 1 2 C583 SATA_DTX_SRX_P1 AJ17
SATA_RX0- IDE_CS1#
W27
SATA_DTX_C_SRX_N1 0.01U_0402_16V7K 1 C584 SATA_DTX_SRX_N1 SATA_RX1+ IDE_CS3#
22 SATA_DTX_C_SRX_N1 2 AH17 SATA_RX1-
SATA_DTX_C_SRX_P2 0.01U_0402_16V7K 1 2 C670 SATA_DTX_SRX_P2 AJ16 AD28
22 SATA_DTX_C_SRX_P2 SATA_RX2+ IDE_D0/GPIO15
SATA_DTX_C_SRX_N2 0.01U_0402_16V7K 1 2 C667 SATA_DTX_SRX_N2 AH16 AD26
22 SATA_DTX_C_SRX_N2 SATA_RX2- IDE_D1/GPIO16
SATA_DTX_C_SRX_P3 0.01U_0402_16V7K 1 2 C585 SATA_DTX_SRX_P3 AJ13 AE29
22 SATA_DTX_C_SRX_P3 SATA_RX3+ IDE_D2/GPIO17
SATA_DTX_C_SRX_N3 0.01U_0402_16V7K 1 2 C586 SATA_DTX_SRX_N3 AH12 AF27
22 SATA_DTX_C_SRX_N3 SATA_RX3- IDE_D3/GPIO18
IDE_D4/GPIO19 AG29
R462 2 1 1K_0402_1% SATA_CAL AF12 AH28
SATA_CAL IDE_D5/GPIO20
AJ28

P-ATA 66/100
R146 10K_0402_5% SATA_X1 IDE_D6/GPIO21
1 2 C544 AD16 SATA_X1 IDE_D7/GPIO22 AJ27
+3VS 1 2 @ 2.2U_0603_6.3V4Z AH27
SATA_X2 IDE_D8/GPIO23 +3VS
C297 AD18 SATA_X2 IDE_D9/GPIO24 AG27
IDE_D10/GPIO25 AG28
SATA_X1 1 2 34 SATA_LED# 2 1 SATA_ACT# AC12 AF28
R143 0_0402_5% SATA ACTIVITY LED SATA_ACT#/GPIO67 IDE_D11/GPIO26
IDE_D12/GPIO27 AF29
1

OSC / RST
R176 10P_0402_50V8J AE28 R180 2 @ 1 10K_0402_5% EC_THERM#
Y2 A_RST# R178 1 A_RST#_R IDE_D13/GPIO28
2 33_0402_5% AG10 A_RST# IDE_D14/GPIO29 AD25
10M_0402_5% 25MHZ_20P RSMRST# E2 AD29 R424 2 1 2.2K_0402_5% SB_CK_SCLK
28 RSMRST# RSMRST# IDE_D15/GPIO30
SB_OSCIN B23
C295 16 SB_OSCIN
2

14M_OSC R430 2 SB_CK_SDAT

J3 1 2.2K_0402_5%
2

SATA_X2 SPI_DI/GPIO12
1 2 SPI_DO/GPIO11 J6
CLK_USB_48M A17 G3

SPI ROM
16 CLK_USB_48M USBCLK SPI_CLK/GPIO47
10P_0402_50V8J G2
SPI_HOLD#/GPIO31
2 1 A14 USB_RCOMP SPI_CS#/GPIO32 G6
R164 11.8K_0402_1%
C A10 C23 C
USB_ATEST0 LAN_RST#/GPIO13
A11 USB_ATEST1 ROM_RST#/GPIO14 G5
+3VALW
+3VALW USB20_P9 H12
C305 24 USB20_P9 USB_HSDP9+
Camera 24 USB20_N9 USB20_N9 G12 M4
USB20_P8 USB_HSDM9- FANOUT0/GPIO3
2 1 27 USB20_P8 E12 USB_HSDP8+ FANOUT1/GPIO48 T3 R464 2 @ 1 10K_0402_5% EC_SMI#
U12 Card Reader 27 USB20_N8 USB20_N8 D12 V4
USB_HSDM8- FANOUT2/GPIO49
5

USB INTERFACE
0.1U_0402_16V4Z NC7SZ08P5X_NL_SC70-5 30 USB20_P7 USB20_P7 E14 R44 2 @ 1 10K_0402_5% USB_OC#0
USB20_N7 USB_HSDP7+
2 NewCard D14 N3
P

B 30 USB20_N7 USB_HSDM7- FANIN0/GPIO50

4 NB_RST# G14 P2 R45 2 @ 1 10K_0402_5% USB_OC#2
Y NB_RST# 14,25,28,30,31 USB_HSDP6+ FANIN1/GPIO51
A_RST# 1 H14 W4
A USB_HSDM6- FANIN2/GPIO52
G

D16 USB_HSDP5+
R70 2 1 2.2K_0402_5% SB_CK_SCLK1
1

E16 P5
3

USB_HSDM5- TEMP_COMM
2

R182 31 USB20_P4 USB20_P4 D18 P7 R71 2 1 2.2K_0402_5% SB_CK_SDAT1

R570 USB20_N4 USB_HSDP4+ TEMPIN0/GPIO61
WLAN 31 USB20_N4 E18 USB_HSDM4- TEMPIN1/GPIO62 P8
@ 47K_0402_5% G16 T8
8.2K_0402_5%2 USB_HSDP3+ TEMPIN2/GPIO63 EC_THERM#
1 H16 T7 EC_THERM# 8,28
2

USB_HSDM3- TEMPIN3/TALERT#/GPIO64

HW MONITOR
R179 33_0402_5% 32 USB20_P2 USB20_P2 G18
1

@ USB20_N2 USB_HSDP2+
USB CONN 32 USB20_N2 H18 USB_HSDM2- VIN0/GPIO53 V5
D19 USB_HSDP1+ VIN1/GPIO54 L7
E19 USB_HSDM1- VIN2/GPIO55 M8
32 USB20_P0 USB20_P0 G19 V6
USB20_N0 USB_HSDP0+ VIN3/GPIO56
USB CONN 32 USB20_N0 H19 USB_HSDM0- VIN4/GPIO57 M6
VIN5/GPIO58 P4
USB_OC#0 A8 M7
32 USB_OC#0 USB_OC0#/GPM0# VIN6/GPIO59
B8 USB_OC1#/GPM1# VIN7/GPIO60 V7
USB_OC#2 C7
32 USB_OC#2 USB_OC2#/GPM2#

USB OC
C8 N2 SB_AZ_BITCLK
USB_OC3#/GPM3# AZ_BITCLK

AZALIA
R506 2 1 0_0402_5% USB_OC#4 A6 M2 SB_AZ_SDOUT
28 EC_LID_OUT# USB_OC4#/GPM4# AZ_SDOUT
R474 2 1 @ 10K_0402_5% ACZ_SDIN0 B6 K2
B R358 @ 10K_0402_5% ACZ_SDIN1 CP_PE# USB_OC5#/DDR3_RST#/GPM5# AZ_SDIN3/GPIO46 SB_AZ_SYNC B
2 1 30 CP_PE# B4 USB_OC6#/GEVENT6# AZ_SYNC L3
R485 2 1 @ 10K_0402_5% ACZ_SDIN2 EC_SMI# C4 K3 SB_AZ_RST#
28 EC_SMI# USB_OC7#/GEVENT7# AZ_RST#
R334 2 1 @ 10K_0402_5% SB_AC_BITCLK C5
CRT_DET USB_OC8#/AZ_DOCK_RST#/GPM8# SB_AC_BITCLK
C6 USB_OC9#/SLP_S2/GPM9# AC_BITCLK/GPIO38 L1
L2 SB_AC_SDOUT SB_AC_SDOUT 21
AC_SDOUT/GPIO39 ACZ_SDIN0
A27 L4

AC97
SSMUXSEL/SATA_IS3#/GPIO0 ACZ_SDIN0/GPIO42 ACZ_SDIN0 35
2 @ 1 A26 J2 ACZ_SDIN1 ACZ_SDIN1 34
R578 10K_0402_5% ROM_CS#/GPIO1 ACZ_SDIN1/GPIO43 ACZ_SDIN2
35 SB_SPKR B26 SPKR/GPIO2 ACZ_SDIN2/GPIO44 J4
B27 SMARTVOLT/SATA_IS2#/GPIO4 AC_SYNC/GPIO40 M3
SB600 A21 and newer: Made provision for an external 1 2 D23 L5 SB_AC_RST#
SHUTDOWN#/GPIO5 AC_RST#/GPIO45

GPIO/ SMBUS
R463 @ 0_0402_5% B29
10-kohm 5% pull-down resistor, not installed by default. A23
GHI#/SATA_IS1#/GPIO6
WD_PWRGD/GPIO7
C26 DDC1_SDA/GPIO8 NC1 E23
R298 2 1 @ 10K_0402_5% SB_AZ_RST# D26 AC21
R296 @ 10K_0402_5% SB_AZ_SYNC DDC1_SCL/GPIO9 NC2
2 1 C28 SATA_IS0#/GPIO10 NC3 AD7
R294 2 1 @ 10K_0402_5% SB_AZ_SDOUT A4 AE7
R333 @ 10K_0402_5% SB_AZ_BITCLK LLB#/GPIO66 NC4
2 1 NC5 AA4
R489 2 1 @ 10K_0402_5% SB_AC_RST# SB_CK_SCLK C27 T4
10,11,16,31 SB_CK_SCLK SCL0/GPOC0# NC6
SB_CK_SDAT B28 D4
10,11,16,31 SB_CK_SDAT SDA0/GPOC1# NC7
NC8 AB19
30 SB_CK_SCLK1 C3 SCL1/GPOC2#
30 SB_CK_SDAT1 F3 SDA1/GPOC3#

218S6ECLA13FG_FCBGA548_SB600
R482 2 1 33_0402_5% SB_AZ_BITCLK
35 AZ_BITCLK
R234 2
SB600 : SA00001DUD0 / S IC 218S6ECLA21FG SB600 FCBGA 549P 0FA
34 AC_BITCLK 1 33_0402_5%
A R505 2 1 33_0402_5% SB_AZ_SYNC A
35 AZ_SYNC
R236 2 1 33_0402_5%
34 AC_SYNC
R175 2 1 33_0402_5% SB_AZ_RST#
35 AZ_RST#
R483 2 1 33_0402_5%
34 AC_RST# Security Classification Compal Secret Data Compal Electronics, Inc.
R235 2 1 33_0402_5% SB_AZ_SDOUT 2005/03/08 2009/06/11 Title
35 AZ_SDOUT Issued Date Deciphered Date
34 AC_SDOUT
R233 2 1 33_0402_5% THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401650
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 18 of 46
5 4 3 2 1
 5 4 3 2 1

XTLVDD_ATA
+3VS +1.2V_HT
PLLVDD_ATA

L47 MBC1608121YZF_0603 L13

1 2 1 2
1 MBC1608121YZF_0603 1 1

1U_0402_6.3V4Z

1U_0402_6.3V4Z
C534 C293 C291
C534 CLOSE TO THE
BALL OF U18 1U_0402_6.3V4Z
2 2 2
D D

+1.2V_HT
AVDD_SATA
L45
2 1 U18D
FBMA-L11-201209-221LMA30T_0805 65mA
1
C539
1
C529
1
C522
1
C543
1
C524 AD14
SB600 SB AB14
PLLVDD_ATA PLLVDD_SATA_1 AVSS_SATA_1
AJ10 PLLVDD_SATA_2 AVSS_SATA_2 AB16
22U_0805_6.3V6M 1U_0402_6.3V4Z 5mA AB18
2 2 2 2 2 AVSS_SATA_3
XTLVDD_ATA AC16 XTLVDD_SATA AVSS_SATA_4 AC14
0.1U_0402_16V4Z 1U_0402_6.3V4Z AC18
0.1U_0402_16V4Z AVSS_SATA_5
300mA AVSS_SATA_6 AC19

SATA Analog PWR

AVDD_SATA AE14 AVDD_SATA_1 AVSS_SATA_7 AD12
AE16 AVDD_SATA_2 AVSS_SATA_8 AD19
AE18 AVDD_SATA_3 AVSS_SATA_9 AD21
AE19 AVDD_SATA_4 AVSS_SATA_10 AE12
AF19 AVDD_SATA_5 AVSS_SATA_11 AE21
AF21 AVDD_SATA_6 AVSS_SATA_12 AF11
AG22 AVDD_SATA_7 AVSS_SATA_13 AF14
AG23 AVDD_SATA_8 AVSS_SATA_14 AF16
AH22 AVDD_SATA_9 AVSS_SATA_15 AF18
AH23 AVDD_SATA_10 AVSS_SATA_16 AG11
Change L46 from SM010014500 as AJ12 AVDD_SATA_11 AVSS_SATA_17 AG12
SM010014520 (2006/08/31) AJ14 AVDD_SATA_12 AVSS_SATA_18 AG13
AJ19 AVDD_SATA_13 AVSS_SATA_19 AG14
AJ22 AVDD_SATA_14 AVSS_SATA_20 AG16
+3VALW AVDD_USB AJ23 AG17
L46 0.1U_0402_16V4Z AVDD_SATA_15 AVSS_SATA_21
AVDDTX=250mA AVSS_SATA_22 AG18
2 1 0.1U_0402_16V4Z 1U_0402_6.3V4Z B9 AG19
C FBMA-L11-201209-221LMA30T_0805 AVDDTX_0 AVSS_SATA_23 C
1 1 1 1 1 1 1 1 AVDDRX=250mA B11 AVDDTX_1 AVSS_SATA_24 AG20
C545 C525 C284 C546 C537 C542 C535 C533 B13 AG21
AVDDTX_2 AVSS_SATA_25

USB Analog PWR

B16 AVDDTX_3 AVSS_SATA_26 AH10
0.1U_0402_16V4Z 22U_0805_6.3V6M B18 AH19
2 2 2 2 2 2 2 2 AVDDTX_4 AVSS_SATA_27
A9 AVDDRX_0
0.1U_0402_16V4Z 1U_0402_6.3V4Z 10U_0805_10V4Z B10 AVDDRX_1
B12 AVDDRX_2 AVSS_USB_1 A16
B14 AVDDRX_3 AVSS_USB_2 C9
Change L12 from SM010014500 as B17 AVDDRX_4 AVSS_USB_3 C10
+3VALW +3.3V_AVDDC C11
L12
SM010014520 (2006/08/31) AVSS_USB_4
15mA AVSS_USB_5 C12
1 2 A12 AVDDC AVSS_USB_6 C13
MBC1608121YZF_0603 1 1 1 C14
C292 C294 C286 AVSS_USB_7
A13 AVSSC AVSS_USB_8 C16

USB PHY Digi. PWR

AVSS_USB_9 C17
1U_0402_6.3V4Z 90mA A18 C18
2 2 2 USB_PHY_1.2V_1 AVSS_USB_10
A19 USB_PHY_1.2V_2 AVSS_USB_11 C19
PLACE C286 AND 2.2U_0603_6.3V4Z 0.1U_0402_16V4Z B19 C20
USB_PHY_1.2V_3 AVSS_USB_12
C294 CLOSE TO B20 USB_PHY_1.2V_4 AVSS_USB_13 D11
U18 +1.2VALW B21 USB_PHY_1.2V_5 AVSS_USB_14 D21
AVSS_USB_15 E11
AVSS_USB_16 E21
+AVDD 1mA N1 AVDD AVSS_USB_17 F11
AVSS_USB_18 F12
M1 AVSS HW Monitor PWR AVSS_USB_19 F14
C520 0.1U_0402_16V4Z F16
AVSS_USB_20
2 1 AVSS_USB_21 F18
AVSS_USB_22 F19
+1.8VS 10mA AA27 CPU_PWR AVSS_USB_23 F21

Special PWR/GND
AVSS_USB_24 G11
B R173 2 V5_VREF B
+5VS 1 5mA AE11 V5_VREF AVSS_USB_25 G21
1K_0402_5% H11
AVSS_USB_26
2 +AVDDCK_3.3V 10mA A24 AVDDCK_3.3V AVSS_USB_27 H21
D6 J11
CH751H-40_SC76 C298 AVSS_USB_28
+AVDDCK_1.2V 40mA A22 AVDDCK_1.2V AVSS_USB_29 J12
+3VS 2 1 AVSS_USB_30 J14
1 1U_0402_6.3V4Z
B22 AVSSCK AVSS_USB_31 J16
AVSS_USB_32 J18
AVSS_USB_33 J19

218S6ECLA13FG_FCBGA548_SB600

SB600 : SA00001DUD0 / S IC 218S6ECLA21FG SB600 FCBGA 549P 0FA

For AMD recommend change to +3.3V_S5

L72 L73
L71 +3VS 1 2 +AVDDCK_3.3V +1.2V_HT 1 2 +AVDDCK_1.2V
+1.2VALW 1 2 MBC1608121YZF_0603 MBC1608121YZF_0603
+3VALW +AVDD
@ MBC1608121YZF_0603
C361 2 1 1U_0402_6.3V4Z C692 1 2 2.2U_0603_6.3V4Z C693 1 2 2.2U_0603_6.3V4Z
C364 2 1 1U_0402_6.3V4Z C694 1 2 2.2U_0603_6.3V4Z
C365 2 1 1U_0402_6.3V4Z @ C695 1 2 0.1U_0402_16V4Z C696 1 2 0.1U_0402_16V4Z
C367 2 1 1U_0402_6.3V4Z C697 1 2 0.1U_0402_16V4Z
@ GND to B22 GND to B22
A A
GND to M1

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/03/08 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401650
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 19 of 46
5 4 3 2 1
 5 4 3 2 1

+1.2VALW +3VS
150mA U18C
A25 VDDQ_1
C750 0.1U_0402_16V4Z
C752
2
2
1
1 0.1U_0402_16V4Z
A28
C29
VDDQ_2 SB600 SB A20
C753 0.1U_0402_16V4Z VDDQ_3 VSS_2
2 1 D24 A21
C751 2 1 0.1U_0402_16V4Z L9
VDDQ_4
VDDQ_5
POWER VSS_3
VSS_4 A29
C754 2 1 10U_0805_10V4Z L21 B1
@ VDDQ_6 VSS_5
M5 VDDQ_7 VSS_6 B7
D P3 B25 D
VDDQ_8 VSS_7
P9 VDDQ_9 VSS_8 C21
T5 VDDQ_10 VSS_9 C22
V9 VDDQ_11 VSS_10 C24
W2 VDDQ_12 VSS_11 D6

3.3V I/O PWR

W6 VDDQ_13 VSS_12 E24
W21 VDDQ_14 VSS_13 F2
W29 VDDQ_15 VSS_14 F23
AA12 VDDQ_16 VSS_15 G1
AA16 VDDQ_17 VSS_16 J1
+3VS +3VALW AA19 J8
VDDQ_18 VSS_17
AC4 VDDQ_19 VSS_18 L6
AC23 VDDQ_20 VSS_19 L8
1 1 1 1 AD27 VDDQ_21 VSS_20 M9
1 1 1 1 1 1 C555 C558 AE1 M12
+ C513 C521 C526 C523 C518 C519 C517 VDDQ_22 VSS_21
AE9 VDDQ_23 VSS_22 M15
C563 AE23 M18
220U_D2_4VM_R15 2 22U_0805_6.3V6M
2 2 VDDQ_24 VSS_23
AH29 VDDQ_25 VSS_24 N13
2 2 2 2 2 2 2 0.1U_0402_16V4Z AJ2 VDDQ_26 VSS_25 N17
1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z 0.1U_0402_16V4Z AJ6 P1
1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z +1.2VS_SB_VDD VDDQ_27 VSS_26
AJ26 VDDQ_28 VSS_27 P6
500mA VSS_28 P21
M13 VDD_1 VSS_29 R12
M17 VDD_2 VSS_30 R15
N12 VDD_3 VSS_31 R18

Core PWR
N15 VDD_4 VSS_32 T6
N18 VDD_5 VSS_33 T9
R13 VDD_6 VSS_34 U13
R17 VDD_7 VSS_35 U17
U12 VDD_8 VSS_36 V3
C U15 V8 C
L74 VDD_9 VSS_37
U18 VDD_10 VSS_38 V12
+1.2V_HT 2 1 +1.2VS_SB_VDD V13 VDD_11 VSS_39 V15
FBMA-L11-201209-221LMA30T_0805 +3VALW V17 V18
VDD_12 VSS_40
15mA VSS_41 V21
A2 S5_3.3V_1 VSS_42 W1
C698 1 2 22U_0805_6.3V6M A7 W9
S5_3.3V_2 VSS_43
F1 S5_3.3V_3 Y29
C699 1 2 1U_0402_6.3V4Z J5 3.3V Standby PWR VSS_44 AA11
C700 1U_0402_6.3V4Z S5_3.3V_4 VSS_45
1 2 J7 S5_3.3V_5 VSS_46 AA14
C701 1 2 1U_0402_6.3V4Z +1.2VALW K1 AA18
C702 1U_0402_6.3V4Z S5_3.3V_6 VSS_47
1 2 80mA VSS_48 AC6
C703 1 2 0.1U_0402_16V4Z G4 AC24
S5_1.2V_1 VSS_49
H1 S5_1.2V_2 AD9
C704 1 2 0.1U_0402_16V4Z H2 1.2V Standby PWR VSS_50 AD23
S5_1.2V_3 VSS_51
H3 S5_1.2V_4 VSS_52 AE3
VSS_53 AE27
450mA VSS_54 AG6
+PCIE_VDDR F27 PCIE_VDDR_1 VSS_55 AJ1
F28 PCIE_VDDR_2 VSS_56 AJ25
F29 PCIE_VDDR_3 VSS_57 AJ29
Delay PCIE_VDDR / PCIE_PVDD G26 PCIE_VDDR_4

PCIE Analog PWR

G27 PCIE_VDDR_5
Add C530 to 22u G28 PCIE_VDDR_6
+1.2VS_SB_VDD PA_SB600AT4 G29 PCIE_VDDR_7
J27 PCIE_VDDR_8 PCIE_VSS_1 D27
+PCIE_VDDR J29 D28
L7 PCIE_VDDR_9 PCIE_VSS_2
L25 PCIE_VDDR_10 PCIE_VSS_3 D29
1 2 22U_0805_6.3V6M 1U_0603_10V6K 0.1U_0402_16V4Z L26 F26
MBK2012121YZF_2P PCIE_VDDR_11 PCIE_VSS_4
1 1 1 1 1 1 1 L29 PCIE_VDDR_12 PCIE_VSS_5 G23
B C530 C515 C516 C512 C247 C250 C514 N29 G24 B
PCIE_VDDR_13 PCIE_VSS_6
35mA PCIE_VSS_7 G25
0.1U_0402_16V4Z +PCIE_PVDD U29 H27
2 2 2 2 2 2 2 PCIE_PVDD PCIE_VSS_8
PCIE_VSS_9 J23
22U_0805_6.3V6M 1U_0603_10V6K 1U_0603_10V6K U28 J26
PCIE_PVSS PCIE_VSS_10
PCIE_VSS_11 J28
PCIE_VSS_12 K27
V29 PCIE_VSS_42 PCIE_VSS_13 L22
V28 PCIE_VSS_41 PCIE_VSS_14 L23
V27 PCIE_VSS_40 PCIE_VSS_15 L24
V26 PCIE_VSS_39 PCIE_VSS_16 L27
V25 PCIE_VSS_38 PCIE_VSS_17 L28
L75 V24 M21
PCIE_VSS_37 PCIE_VSS_18
+1.2VS_SB_VDD 2 1 +PCIE_PVDD V23 PCIE_VSS_36 PCIE_VSS_19 M24
MBK2012601YZF_2P V22 M27
PCIE_VSS_35 PCIE_VSS_20
U27 PCIE_VSS_34 PCIE_VSS_21 N27
C705 1 2 1U_0402_6.3V4Z T29 N28
C706 1 22U_0805_6.3V6M PCIE_VSS_33 PCIE_VSS_22
2 T28 PCIE_VSS_32 PCIE_VSS_23 P22
T27 PCIE_VSS_31 PCIE_VSS_24 P23
T24 PCIE_VSS_30 PCIE_VSS_25 P24
GND to U28 T21 PCIE_VSS_29 PCIE_VSS_26 P25
P27 PCIE_VSS_28 PCIE_VSS_27 P26

218S6ECLA13FG_FCBGA548_SB600

SB600 : SA00001DUD0 / S IC 218S6ECLA21FG SB600 FCBGA 549P 0FA

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/03/08 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401650
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 20 of 46
5 4 3 2 1
 5 4 3 2 1

REQUIRED STRAPS Internal RTC: Not connected. *

SB600 HAS 15K INTERNAL PD FOR AC_SDATA_OUT, External RTC: Connected to IRQ# pin on external RTC.
15K PU FOR RTC_CLK, EXTERNAL PU/PD IS External RTC supports S5 wake capability (from S5
NOT REQUIRED; FOR SB460, EXTERNAL PU/PD ARE power rail or battery).
D REQUIRED D

+3VS +3VALW +3VS +3VS +3VS +3VS +3VALW

1
R499 R473
2.2K_0402_5% @

1
@ 10K_0402_5%
R202 R249 R248 R496 R497
2

2
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
17 RTC_IRQ#
@ @ @
18 SB_AC_SDOUT
2

2
17 RTC_CLK
17 CLK_PCI_CLK4
17 CLK_PCI_CLK6
17 CLK_PCI_CLK0

1
17 CLK_PCI_CLK1
R469
@
10K_0402_5%
1

2
R494 R245 R504 R492
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
@ @
2

2
C C

AC_SDOUT RTC_CLK PCI_CLK4 PCI_CLK6 PCI_CLK0 PCI_CLK1

PULL USE INTERNAL USE INT. CPU IF=K8 ROM TYPE:

HIGH DEBUG RTC PLL48
H, H = PCI ROM
STRAPS DEFAULT
DEFAULT H, L = SPI ROM
L, H = LPC ROM DEFAULT
PULL IGNORE EXTERNAL USE EXT. CPU IF=P4
LOW DEBUG RTC 48MHZ L, L = FWH ROM
STRAPS
DEFAULT DEFAULT

DEBUG STRAPS
SB600 HAS 15K INTERNAL PU FOR PCI_AD[28:23]

17 PCI_AD28
17 PCI_AD27
17 PCI_AD26
B 17 PCI_AD25 B
17 PCI_AD24
17 PCI_AD23

1
2.2K IF USED FOR SB600.
R217 R213 R222 R190 R242 R195
2.2K_0402_5% 2.2K_0402_5% 2.2K_0402_5% 2.2K_0402_5% 2.2K_0402_5% 2.2K_0402_5% 10K IF USED FOR SB460.
@ @ @ @ @ @

2
IDE_DACK# PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23

USE USE USE PCI USE ACPI USE IDE USE DEFAULT BOOTFAILTIMER
PULL LONG LONG PLL BCLK PLL PCIE STRAPS DISABLED SB600 ONLY
HIGH RESET RESET
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT

NOTE: FOR
PULL USE USE BYPASS BYPASS BYPASS IDE USE EEPROM BOOTFAILTIMER SB460,
LOW SHORT SHORT PCI PLL ACPI PLL PCIE STRAPS ENABLED PCI_AD23 IS
RESET RESET BCLK RESERVED

SB460 ONLY SB600 ONLY

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/03/08 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Tuesday, April 14, 2009 Sheet 21 of 46
5 4 3 2 1
 5 4 3 2 1

+5VS +3VS
+5VS

0.1U_0402_16V4Z 0.1U_0402_16V4Z
Placea caps. near ODD CONN.
0.1U_0402_16V4Z
1 1 1 1 1 1 1 1
C351 C349 C347 C346 1 1 1 1
C360
C363 C366 C368 C150 C149
10U_0805_10V4Z 10U_0805_10V4Z C153 C148
2 2 2 2 2 2 2 2 10U_0805_10V4Z
D D
2 2 2 2
0.1U_0402_16V4Z 1000P_0402_50V7K 0.1U_0402_16V4Z 1000P_0402_50V7K 1U_0402_6.3V4Z
1000P_0402_50V7K

SATA HDD CONN SATA ODD CONN

JSATA2

1 JSATA1
SATA_STX_C_DRX_P0 GND
18 SATA_STX_C_DRX_P0 2 HTX+
SATA_STX_C_DRX_N0 3 1
18 SATA_STX_C_DRX_N0 HTX- SATA_STX_C_DRX_P2 GND
4 GND 18 SATA_STX_C_DRX_P2 2 A+
SATA_DTX_C_SRX_N0 5 +5VS SATA_STX_C_DRX_N2 3
18 SATA_DTX_C_SRX_N0 HRX- 18 SATA_STX_C_DRX_N2 A-
SATA_DTX_C_SRX_P0 6 4
18 SATA_DTX_C_SRX_P0 HRX+ SATA_DTX_C_SRX_N2 GND
7 GND 1 18 SATA_DTX_C_SRX_N2 5 B-
C370 SATA_DTX_C_SRX_P2 6
+ 18 SATA_DTX_C_SRX_P2 B+
7 GND
R544 @
+3VS 1 2 8 VCC3.3 150U_D2_6.3VM 2
9 VCC3.3 1 2 8 DP
0_0805_5% 10 R617 @ 1K_0402_1% 9
C
VCC3.3 +5V C
11 GND +5VS 10 +5V
12 GND 11 MD
R545 13 12 15
GND GND GND
+5VS 1 2 14 VCC5 13 GND GND 14
15 VCC5
Close to SATA HDD
0_0805_5% 16 VCC5 SANTA_206401-1_13P
17 GND
18 CONN@
RESERVED
19 GND
20 VCC12 KALA0 used
21 VCC12 GND 24
22 VCC12 GND 23

OCTEK_SAT-22SU1G_NR
CONN@

KALA0 used

JP2
1 1 2 2 +5VS
18 SATA_STX_C_DRX_P1 3 3 4 4
18 SATA_STX_C_DRX_N1 5 5 6 6
7 8
Second HDD 18 SATA_DTX_C_SRX_N1 9
7
9
8
10 10
18 SATA_DTX_C_SRX_P1 11 11 12 12
13 13 14 14
B B
18 SATA_STX_C_DRX_P3 15 15 16 16 +3VS
18 SATA_STX_C_DRX_N3 17 17 18 18
19 20
Second ODD 18 SATA_DTX_C_SRX_N3 21
19
21
20
22 22
18 SATA_DTX_C_SRX_P3 23 23 24 24
25 25 26 26
27 27 28 28
29 30

GND
GND
GND
GND
GND
GND
29 30

ACES_88018-304G

31
32
33
34
35
36
CONN@

+5VS +3VS

0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

1 1 1 1 1 1 1
C574 C577 C579 C580 C572 C573 C571

2 2 2 2 2 2 2

1000P_0402_50V7K 10U_0805_10V4Z 1000P_0402_50V7K 10U_0805_10V4Z

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/03/08 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Tuesday, April 14, 2009 Sheet 22 of 46
5 4 3 2 1
 A B C D E

D18 D19 D20

CRT Connector @ @ @
DAN217_SC59 DAN217_SC59 DAN217_SC59
+5VS +R_CRT_VCC
W=40mils
+CRT_VCC

D17 F1 W=40mils

1
2 1 1 2

RB491D_SC59-3 1.1A_6VDC_FUSE
1
C407

3
0.1U_0402_16V4Z
2
+5VS

1 1

L32 JCRT1
CRT_R 1 2 CRT_R_L 6
14 CRT_R
FCM2012CF-800T06_2P 11
L34 1
CRT_G 1 2 CRT_G_L 7
14 CRT_G
FCM2012CF-800T06_2P 12
L33 2
CRT_B 1 2 CRT_B_L 8
14 CRT_B
FCM2012CF-800T06_2P 13
3

1
1 1 1 1 1 1 9
R339 R338 R340 C408 C412 C414 C413 C410 C409 14 KAW60 used
4
6P_0402_50V8D 6P_0402_50V8D 6P_0402_50V8D 10
150_0402_1% 150_0402_1% 2 8P_0402_50V8D 2 8P_0402_50V8D 2 8P_0402_50V8D 2 2 2
15 SUYIN_070549FR015S208CR

2
C406 5
150_0402_1% 100P_0402_50V8J CONN@

16

17
+CRT_VCC HSYNC_L
1 2
L38 MBC1608121YZF_0603
1 2 2 1 D_DDC_DATA
C434 0.1U_0402_16V4Z R360 10K_0402_5% 1 2 VSYNC_L
L37 MBC1608121YZF_0603 1

1
U36 C411

10P_0402_50V8J

10P_0402_50V8J
1 1

OE#
P
CRT_DET# 18
VGA_CRT_HSYNC 1 2 CRT_HSYNC 2 4 D_CRT_HSYNC 68P_0402_50V8J
14 VGA_CRT_HSYNC A Y 2
R354 0_0402_5% C424 C423

G
D_DDC_CLK

2
74AHCT1G125GW_SOT353-5 2 2

3
1 R636
2 +CRT_VCC C422 2
100K_0402_5%

1 2 68P_0402_50V8J

1
C433 0.1U_0402_16V4Z 2

1
U35

OE#
P
VGA_CRT_VSYNC 1 2 CRT_VSYNC 2 4 D_CRT_VSYNC +CRT_VCC
14 VGA_CRT_VSYNC A Y
R356 0_0402_5%

G
74AHCT1G125GW_SOT353-5

3
Close to Conn side
+CRT_VCC

+3VS

1
R77 R72

6.8K_0402_5% 6.8K_0402_5%

2
G
2

2
D_DDC_DATA 1 3
VGA_DDC_DATA 14

S
Q50

2
BSH111 1N_SOT23-3

G
3 3

D_DDC_CLK 1 3 VGA_DDC_CLK 14

S
Q51
BSH111 1N_SOT23-3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/03/08 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401650 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 23 of 46
A B C D E
 5 4 3 2 1

LCD POWER CIRCUIT

D D

+3VS

+LCDVDD +3VALW
1
C77
LCD/PANEL CONN.
1

2
@ 4.7U_0805_10V4Z
R274 2
300_0603_5% R348

100K_0402_5% W=60mils
1 2

3
Q22 D S
Q23 JLVDS1
G
2 2 1 2 42 GND GND 41
2N7002_SOT23-3 G R278 1K_0402_5% AO3413_SOT23-3 +INVPWR_B+ 40 39 DAC_BRIG
40 39 DAC_BRIG 28
S 1
D 38 37 INVT_PWM
INVT_PWM 28
3

1
38 37
2
+LCDVDD DISPOFF#
W=60mils +3VS
EDID_LCD_CLK
36 36 35 35
14 EDID_LCD_CLK 34 34 33 33 +LCDVDD
R347 C431 +LCDVDD 14 EDID_LCD_DAT EDID_LCD_DAT 32 31
2 0.047U_0402_16V7K 32 31
30 30 29 29
1

D Q25 @ 100K_0402_5% LVDS_TXUN0

1 1 14 LVDS_TXUN0 28 27
1

ENVDD C415 C420 LVDS_TXUP0 28 27 LVDS_TXLN0

14 ENVDD 2 14 LVDS_TXUP0 26 26 25 25 LVDS_TXLN0 14
G 24 23 LVDS_TXLP0
24 23 LVDS_TXLP0 14
1

S 4.7U_0805_10V4Z 0.1U_0402_16V4Z LVDS_TXUP1 22 21

14 LVDS_TXUP1
3

R345 2N7002_SOT23-3 2 2 LVDS_TXUN1 22 21 LVDS_TXLN1

14 LVDS_TXUN1 20 20 19 19 LVDS_TXLN1 14
10K_0402_5% 18 17 LVDS_TXLP1
18 17 LVDS_TXLP1 14
LVDS_TXUP2 16 15
14 LVDS_TXUP2 16 15
C LVDS_TXUN2 14 13 LVDS_TXLP2 C
14 LVDS_TXUN2 LVDS_TXLP2 14
2

14 13 LVDS_TXLN2
12 12 11 11 LVDS_TXLN2 14
LVDS_TXUCKN 10 9
14 LVDS_TXUCKN 10 9
LVDS_TXUCKP 8 7 LVDS_TXLCKN
14 LVDS_TXUCKP 8 7 LVDS_TXLCKN 14
6 5 LVDS_TXLCKP
6 5 LVDS_TXLCKP 14
R759 1 2 0_0402_5% USB20_CMOS_N9 4 3
18 USB20_N9 4 3
R760 1 2 0_0402_5% USB20_CMOS_P9 2 1 R761 1 2 0_0603_5% +3VS
18 USB20_P9 2 1 R762 1 2 0_0603_5% +3VALW
L77 ACES_88242-4001 @
4 3 CONN@ 1
4 3
KALA0 used
1 2 C768 0.1U_0402_16V4Z
1 2 2
@ WCM2012F2S-900T04_0805

+INVPWR_B+

B L20 2 B
1 B+
W=40mils FBMA-L11-201209-221LMA30T_0805
+3VS +3VS
L15 2 1
FBMA-L11-201209-221LMA30T_0805
1

1 1 1
R1 C379 C362
C426
@ 0.1U_0402_16V4Z 4.7K_0402_5% 680P_0402_50V7K 68P_0402_50V8J
2 D2 2 2
2

BKOFF# 1 2 RB751V_SOD323 DISPOFF#

28 BKOFF#

+LCDVDD
INVT_PWM
1

1
D21 C416 DAC_BRIG C371 1 2 220P_0402_50V7K 1 1
BAS16_SOT23-3 1U_0402_6.3V4Z C383 C382
@ @ INVT_PWM C372 1 2 220P_0402_50V7K
2 10U_0805_10V4Z 0.1U_0402_16V4Z
2

DISPOFF# C377 1 2 2
2 220P_0402_50V7K

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/03/08 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Tuesday, April 14, 2009 Sheet 24 of 46
5 4 3 2 1
 5 4 3 2 1

+3V_LAN +3V_LAN

1 8114@ 2 +1.8_VDD/LX
R820 0_0603_5%

1
1 2 C932
1
R821 R822
Place Close to Chip
L88 8132@ 4.7UH_1008HC-472EJFS-A_5%_1008
0.1U_0402_16V4Z 4.7K_0402_1% 4.7K_0402_1%
+AVDD_CEN 2 LAN_MIDI0+ R843 2 1 49.9_0402_1% C978 1 2 0.1U_0402_16V4Z

2
U84 LAN_MIDI0- R845 2 1 49.9_0402_1%
R8441 2 0_0603_5% 1 2 +2.5V_VDDH/VDD17 1 2 +2.5V_VDDH 1 8
R824 8132@ 0_0603_5% R825 8114@ 0_0603_5% A0 VCC LAN_MIDI1+ R846 2
1 2 A1 WP 7 1 49.9_0402_1% C979 1 2 0.1U_0402_16V4Z
D C933 C934 3 6 TWSI_SCL D
A2 SCL TWSI_SDA LAN_MIDI1- R847 2
4 GND SDA 5 1 49.9_0402_1%
4.7U_0805_10V4Z 0.1U_0402_16V4Z
8132@ 2 8132@ AT24C02BN-SH-T_SO8
@

U85

2 1 +1.8_VDD/LX 1 29 TWSI_SCL
C936 8114@ 1U_0603_10V4Z VDD18O TWSI_CLK TWSI_SDA
TWSI_DATA 30
+3V_LAN 2 VDD33
8114@ 47 LAN_ACTIVITY#
LED_ACTn LAN_ACTIVITY# 26
C935 2 1 1U_0603_10V4Z +2.5V_VDDH/VDD17 6 48 LAN_LINK#
VDDHO LED_10_100n LAN_LINK# 26
C982 2 1 0.1U_0402_16V7K CTR12 5 27
CTR12 LED_DUPLEXn
8132@ 3 13 LAN_MIDI0+ LAN_MIDI0+ 26
14,18,28,30,31 NB_RST# PERSTn TRXP0
28 EC_PME# 4 14 LAN_MIDI0- LAN_MIDI0- 26
8114@ WAKEn TRXN0 LAN_MIDI1+
TRXP1 17 LAN_MIDI1+ 26
+3V_LAN 1 2 2 1 7 18 LAN_MIDI1- LAN_MIDI1- 26
R829 4.7K_0402_5% C937 1000P_0402_50V7K VBG1P18V TRXN1
Layout Notice : Close to chip
16 CLK_PCIE_LAN 2 1 41 11 AVDDVCO1
C938 0.1U_0402_16V7K REFCLKP AVDDL_REG AVDDVCO2
AVDDL/AVDDL_REG 42
2 1 40 +3V_LAN
16 CLK_PCIE_LAN# REFCLKN

A
t
h
e
r
o
s
C939 0.1U_0402_16V7K
43 1 2 0.1U_0402_16V4Z
13 PCIE_MTX_C_PRX_P3 RX_P +1.2_DVDDL
+3VALW R830 0_1206_5%
DVDDL0 28
13 PCIE_MTX_C_PRX_N3 44 RX_N DVDDL1 32
C 45 1 1 1 C
PCIE_MRX_PTX_P3 38 DVDDL2 C944 C941 C942 C945
13 PCIE_MRX_C_PTX_P3 2
C940
1
0.1U_0402_16V7K TX_P AR8114A 10/100 LAN DVDDL3 46

13 PCIE_MRX_C_PTX_N3 2 1 PCIE_MRX_PTX_N3 37 8 +1.2_AVDDL 4.7U_0805_10V4Z

C943 0.1U_0402_16V7K TX_N AVDDL0 2 2 2
AVDDL1 16
Place Close to Chip LAN_X1 9
AVDDL2 22
36
LAN_X2 XTLO AVDDL3 0.1U_0402_16V4Z 0.1U_0402_16V4Z
10 XTLI AVDDL4 39

31 15 +2.5V_VDDH
Y8 SMCLK AVDDH0
33 SMDATA AVDDH1 19
LAN_X1 1 2 LAN_X2 25
AVDDH2
20 +3V_LAN
25MHZ_20P NC_0
1 1 2 1 12 RBIAS NC_1 21
R831 2.37K_0402_1% 34 23
C946 C947 TESTMODE NC_2
NC_3 24 1

1
27P_0402_50V8J 27P_0402_50V8J 26
2 2 NC_4 C948 R832
49 GND NC_5 35 1 8132@ 2+2.5V_VDDH
0.1U_0402_16V4Z 10K_0402_1% R833 0_0402_5%

3
8114@ 2 Q73 8114@
AR8114-AL1E_QFN48_6X6

2
1 CTR12
change AR8132-AL1E for pre-PVT 1
C949
For AR8131V1 NJT4030PT1G_SOT223 0.1U_0402_16V4Z

4
2
8114@ 8132@
+1.2_AVDDL 2

B Place Close to Pin 28、32、45、46 C950

1 1
C951 B
+1.2_AVDDL 10U_0805_10V4Z 0.1U_0402_16V4Z
L89 FBMA-L11-201209-221LMA30T_0805 C953 C955 8114@ 8114@
+1.2_DVDDL +1.2_DVDDL 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2
1 2
8114@ 1 1 1 1 1
C952
8132@ 8114@ 0.1U_0402_16V4Z
2 2 2 2 2
R835 0_0603_5% C983 C954
1 2 1 2 AVDDVCO1 1U_0603_10V4Z 0.1U_0402_16V4Z
R834 @ 1 1
0_0603_5% C956
1000P_0402_50V7K C957
1U_0603_10V4Z
2 2
Place Close to Pin8、16、22、36、39
Place Close to Pin15、19、25
C984 C963 C965
C960 +1.2_AVDDL 1U_0603_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
R546 1 2 0_0805_5% AVDDVCO2 +2.5V_VDDH 0.1U_0402_16V4Z 1 1 1 1 1 1
1 1 1 1 C966
C961
C958 8132@ 8114@ 0.1U_0402_16V4Z
0.1U_0402_16V4Z 2 2 2 2 2 2
0.1U_0402_16V4Z
2 2 2 2 C962 C964
C959 0.1U_0402_16V4Z 0.1U_0402_16V4Z
If overclocking, R638, L30 stuffed and R637 removed. 1U_0603_10V4Z
A A
If not overclocking, R637, L30 suffed and R638 removed.
AR8132:L30=0ohm,C856=0.1uF. remove C857

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/07/29 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Friday, April 10, 2009 Sheet 25 of 46
5 4 3 2 1
 5 4 3 2 1

+AVDD_CEN

C967
1 2

2
220P_0402_50V7K
R836
0_0603_5%
JRJ1
2 1 LAN_ACTIVITY#_R 12

1
D T1 25 LAN_ACTIVITY# R837 510_0402_5% Amber LED+ D
1 2 11 Amber LED-
25 LAN_MIDI0+ LAN_MIDI0+ 1 16 RJ45_MIDI0+ R14 5.1K_0402_5% 16
LAN_MIDI0- RD+ RX+ RJ45_MIDI0- SHLD2
25 LAN_MIDI0- 2 RD- RX- 15 8 PR4-
3 CT CT 14 SHLD1 15
4 NC NC 13 7 PR4+
5 NC NC 12
6 11 RJ45_MIDI1- 6
LAN_MIDI1+ CT CT RJ45_MIDI1+ PR2-
25 LAN_MIDI1+ 7 TD+ TX+ 10
25 LAN_MIDI1- LAN_MIDI1- 8 9 RJ45_MIDI1- 5
TD- TX- PR3-
4 PR3+
350uH_NS0013LF
RJ45_MIDI1+ 3 PR2+

1
RJ45_MIDI0- 2 PR1-
SHLD2 14
LAN_TCT R839 R840 RJ45_MIDI0+ 1
75_0402_1% 75_0402_1% PR1+
SHLD1 13
LAN_LINK# 10

2
25 LAN_LINK# Green LED-
1 1
C969 C970 2 1 9
+3V_LAN Green LED+
R838 510_0402_5%
0.1U_0402_16V4Z RJ45_GND FOX_JM36113-L2R8-7F
2 2 CONN@
1
0.1U_0402_16V4Z C968
220P_0402_50V7K
2

C C

RJ45_GND 1 2 LANGND
1 1
C973
1000P_1206_2KV7K C974 C975
4.7U_0805_10V4Z
2 2

0.1U_0402_16V4Z

LAN_LINK#

LAN_ACTIVITY#_R 1 2 LAN_ACTIVITY#_R
C976

2
@ 68P_0402_50V8J
D16
@
LAN_LINK# 1 2
C977
H1 H14 H19 H26 H25 H24 H23 H17 @ 68P_0402_50V8J PJDLC05_SOT23-3
H_3P4 H_3P4 H_3P4 H_3P4 H_3P4 H_3P4 H_3P4 H_3P4

1
@ @ @ @ @ @ @ @
1

B H7 H9 H4 H18 H16 B
H_3P4 H_3P4 H_3P4 H_3P4 H_4P2

@ @ @ @ @
1

H11 H10 H20 H6

H_4P2 H_4P2 H_3P4 H_2P8

@ @ @ @
1

H5 H8 H2 H3 H12 H22 H27

H_2P8 H_4P0N H_3P3 H_3P3 H_3P3 H_3P3 H_2P8

@ @ @ @ @ @ @
1

H15 H21
H_4P2 H_4P6X4P0N

A @ @ A
1

FD1 FD2 FD3 FD4 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/03/08 Deciphered Date 2009/06/11 Title
@ @ @ @
SCHEMATIC,MB A4861
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Tuesday, April 14, 2009 Sheet 26 of 46
5 4 3 2 1
 5 4 3 2 1

2 1
R675 0_0402_5%

U77

2 1 1 AV_PLL
C851 0.1U_0402_16V4Z 3
@ +3V_CARD NC
+3VALW 1 2 7 NC
R548 0_0805_5% +XDPWR_SDPWR_MSPWR 9 CARD_3V3
+3VS 1 2 11 D3V3
R547 0_0805_5% 33 10 1 2
D3V3 VREG
1 1 C853 MS_D4 22 C860 1U_0402_6.3V4Z
D
+3VS C852 30 D
@ 0.1U_0402_16V4Z NC
8 3V3_IN
4.7U_0603_6.3V6K RST# 44
2 2 MODE_SEL RST#
45 MODE_SEL
2

XTLO 47 43 XDCLE
XTLI XTLO XD_CLE_SP19 XDCE#
48 XTLI XD_CE#_SP18 42
@ R674 41 XDALE
100K_0402_5% USB20_N8 XD_ALE_SP17 SDDAT2_XDRE#
18 USB20_N8 4 DM SD_DAT2/XD_RE#_SP16 40
USB20_P8 5 39 SDDAT3_XDWE#
18 USB20_P8
1

DP SD_DAT3/XD_WE#_SP15 XD_RDY
34 5IN1_LED# 14 GPIO0 XD_RDY_SP14 38
1 2 RST# 37 SDDAT4_XDWP#_MSD7
R335 0_0402_5% SD_DAT4/XD_WP#/MS_D7_SP13 SDDAT5_XDD0_MSD6
SD_DAT5/XD_D0/MS_D6_SP12 35
34 SDCLK_XDD1_MSCLK_L 2 1 SDCLK_XDD1_MSCLK
SD_CLK/XD_D1/MS_CLK_SP11 SDDAT6_XDD7_MSD3 R671 0_0402_5%
1 SD_DAT6/XD_D7/MS_D3_SP10 31
29 MS_INS#
C854 MS_INS#_SP9 SDDAT7_XDD2_MSD2
SD_DAT7/XD_D2/MS_D2_SP8 28
1U_0402_6.3V4Z 27 SDDAT0_XDD6_MSD0
2 SD_DAT0/XD_D6/MS_D0_SP7 SDDAT1_XDD3_MSD1
SD_DAT1/XD_D3/MS_D1_SP6 26
25 XDD5_MSBS
XD_D5_SP5 XDD4_SDDAT1
XD_D4/SD_DAT1_SP4 23
21 SDCD
MODE_SEL SD_CD#_SP3 SDWP
SD_WP_SP2 20
19 XDCD
XD_CD#_SP1
EEDI 18
1

1 XTAL_CTR
R680 2 13 XTAL_CTR 2 1 +3VS If Open , use 12MHz. crystal
@ C855 RREF XTAL_CTR R681 0_0603_5%
0_0402_5% MS_D5 24 If Pull high , use CLKGEN 48MHz.
47P_0402_50V8J 12
2 DGND
32 15
2

C
DGND EEDO C
EECS 16
6 AGND EESK 17
46 36 SD_CMD
AGND SD_CMD

2
16 CLK_SD_48M 1 2 R678
R676 0_0402_5% 6.19K_0402_1% RTS5159-GR_LQFP48_7X7
R672
@ 0_0402_5%

1
1 2 XTLI
C856 6P_0402_50V8D
1

R673
10_0402_5%
1

@ Y7
2

1 12MHZ_16PF_6X12000012
C858
2

10P_0402_50V8J
2 @
1 2 XTLO
C857 6P_0402_50V8D
EMI
+CARDPWR
+CARDPWR

B +CARDPWR JREAD1 B

3 XD-VCC SD-VCC 21
MS-VCC 28
SDDAT5_XDD0_MSD6 32
SDCLK_XDD1_MSCLK XD-D0 SDCLK_XDD1_MSCLK
1 1 1 10 XD-D1 7 IN 1 CONN SD_CLK 20
SDDAT7_XDD2_MSD2 9 14 SDDAT0_XDD6_MSD0
C477 C342 C480 SDDAT1_XDD3_MSD1 XD-D2 SD-DAT0 XDD4_SDDAT1
8 XD-D3 SD-DAT1 12
0.1U_0402_16V4Z XDD4_SDDAT1 7 30 SDDAT2_XDRE#
Close to CLK_SD_48M via 2 2 2 XDD5_MSBS 6
XD-D4 SD-DAT2
29 SDDAT3_XDWE#
SDDAT0_XDD6_MSD0 XD-D5 SD-DAT3 SDDAT4_XDWP#_MSD7
5 XD-D6 SD-DAT4 27
10U_0805_10V4Z 0.1U_0402_16V4Z SDDAT6_XDD7_MSD3 4 23 SDDAT5_XDD0_MSD6
+5VS XD-D7 SD-DAT5 SDDAT6_XDD7_MSD3
SD-DAT6 18
SDDAT3_XDWE# 34 16 SDDAT7_XDD2_MSD2
SDDAT4_XDWP#_MSD7 XD-WE SD-DAT7 SD_CMD
33 XD-WP SD-CMD 25
XDALE 35 1 SDCD
XDCD XD-ALE SD-CD-SW
40 XD-CD
1 C859 XD_RDY 39 XD-R/B SD-WP-SW 2 SDWP
+XDPWR_SDPWR_MSPWR SDDAT2_XDRE# 38
0.1U_0402_16V4Z +CARDPWR XDCE# XD-RE
37 XD-CE
XDCLE 36 26 SDCLK_XDD1_MSCLK
2 XD-CLE MS-SCLK SDDAT0_XDD6_MSD0
MS-DATA0 17 1
11 15 SDDAT1_XDD3_MSD1 C862
7IN1 GND MS-DATA1 SDDAT7_XDD2_MSD2 @
31 7IN1 GND MS-DATA2 19
1 2 24 SDDAT6_XDD7_MSD3 22P_0402_50V8J
EMI R318 0_0603_5% MS-DATA3
22 MS_INS# 2
MS-INS XDD5_MSBS
MS-BS 13
41 7IN1 GND
2

1 42 7IN1 GND
A A
R295 C348 TAITW_R015-B10-LM
100K_0402_5% 0.1U_0402_16V4Z CONN@ JAWD0 used
2
1

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/07/29 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Tuesday, April 14, 2009 Sheet 27 of 46
5 4 3 2 1
 5 4 3 2 1

+3VALW

L48
0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 2 +EC_VCCA
1 1 C567 1 1 2 2 FBMA-L11-160808-800LMT_0603
C569
C476 C557 C568 C561
1
Please close to EC pin
1000P_0402_50V7K 1000P_0402_50V7K C566
2 2 2 2 1 1
CLK_PCI_LPC 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z BATT_OVP C672 1 100P_0402_50V8J
2

ECAGND
1
BATT_TEMP C673 1 2 100P_0402_50V8J
D R633 For EC Tools D
@ 10_0402_5% ACIN C676 1 2 100P_0402_50V8J

111
125
KSI[0..7]

22
33
96

67
29,34 KSI[0..7] Place on MiniCard

9
U27 +3VALW
2

1 KSO[0..17] JP37

VCC
VCC
VCC
VCC
VCC
VCC

AVCC
29,34 KSO[0..17]
1 1
C689 2 E51RXD_P80CLK
2 E51RXD_P80CLK 31
@ 22P_0402_50V8J 3 E51TXD_P80DATA
2 3 E51TXD_P80DATA 31
17 EC_GA20 1 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F 21 INVT_PWM 24 4 4
17 EC_KBRST# 2 KBRST#/GPIO01 BEEP#/PWM2/GPIO10 23 BEEP# 35
3 26 ACES_85205-0400
17 SERIRQ SERIRQ# FANPWM1/GPIO12 FANPWM 6
4 27 CONN@
17 LPC_FRAME# LFRAME# ACOFF/FANPWM2/GPIO13 ACOFF 40
17 LPC_AD3 5 LAD3
17 LPC_AD2 7 LAD2 PWM Output
8 63 BATT_TEMP
+3VALW 17 LPC_AD1 LAD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP 41
BATT_OVP
R632 47K_0402_5%
17 LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64 BATT_OVP 40
ADP_I/AD2/GPIO3A 65 ADP_I 40
2 1 ECRST# 12 AD Input 66 AD_BID0
17 CLK_PCI_LPC PCICLK AD3/GPIO3B
13 75 R656
14,18,25,30,31 NB_RST# PCIRST#/GPIO05 AD4/GPIO42
2 1 ECRST# 37 76 1 2 0_0402_5%
C549 0.1U_0402_16V4Z ECRST# SELIO2#/AD5/GPIO43
17 EC_SCI# 20 SCI#/GPIO0E
17 PM_CLKRUN# 38 CLKRUN#/GPIO1D
68 +3VALW
DAC_BRIG/DA0/GPIO3C DAC_BRIG 24
EN_DFAN1/DA1/GPIO3D 70 EN_DFAN1 6
DA Output 71 U45
IREF/DA2/GPIO3E IREF 40

5
KSI0 55 72
KSI0/GPIO30 DA3/GPIO3F CALIBRATE# 40
KSI1 56 2

P
+3VALW KSI2 KSI1/GPIO31 B RSMRST#
57 KSI2/GPIO32 Y 4 RSMRST# 18
KSI3 58 83 EC_RSMRST# 1
KSI3/GPIO33 PSCLK1/GPIO4A A

G
C KSI4 59 84 C
KSI4/GPIO34 PSDAT1/GPIO4B

1
R514 2 1 10K_0402_5% EC_PME# KSI5 60 85 TP_LOCK_LED# 1 @ NC7SZ08P5X_NL_SC70-5
TP_LOCK_LED# 34

3
KSI6 KSI5/GPIO35 PSCLK2/GPIO4C R657
61 KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D 86
R729 1 2 2.2K_0402_5% EC_SMB_CK1 KSI7 62 87 TP_CLK @ C762 R740 10K_0402_5%
KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_CLK 29
KSO0 39 88 TP_DATA 0.1U_0402_16V4Z @
KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA 29 2
R730 1 2 2.2K_0402_5% EC_SMB_DA1 KSO1 40 10K_0402_5%

2
KSO2 KSO1/GPIO21
41 KSO2/GPIO22
R634 2 @ 1 47K_0402_5% KSO1 KSO3 42 97 ID_15_17
KSO4 KSO3/GPIO23 SDICS#/GPXOA00
43 KSO4/GPIO24 SDICLK/GPXOA01 98
R639 2 @ 1 47K_0402_5% KSO2 KSO5 S3_STATE
KSO6
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99
VGATE
S3_STATE 17
45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 VGATE 44
KSO7 46 SPI Device Interface
EC test-mode issue KSO8 47
KSO7/GPIO27
KSO8/GPIO28
KSO9 48 119
KSO9/GPIO29 SPIDI/RD# EC_SI_SPI_SO 30
KSO10 49 120
KSO10/GPIO2A SPIDO/WR# EC_SO_SPI_SI 30
KSO11 50 SPI Flash ROM 126 ID DETECT
+3VS KSO11/GPIO2B SPICLK/GPIO58 EC_SPICLK 30
KSO12 51 128
KSO12/GPIO2C SPICS# EC_SPICS#/FSEL# 30 High : for 15"
KSO13 52
R731 2.2K_0402_5% KSO14 KSO13/GPIO2D
53 KSO14/GPIO2E Low : for 17"
1 2 EC_SMB_CK2 KSO15 54 73
KSO15/GPIO2F CIR_RX/GPIO40 3S/4S# 40 +3VALW
1 2 EC_SMB_DA2 KSO16 81 74
KSO16/GPIO48 CIR_RLC_TX/GPIO41 WL_OFF# 31
R732 2.2K_0402_5% KSO17 82 89 FSTCHG
KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 FSTCHG 40
BATT_CHGI_LED#/GPIO52 90 BATT_GRN_LED# 34
91 ID_15_17 2 1
CAPS_LED#/GPIO53 CAPS_LED# 34
EC_SMB_CK1 77 GPIO 92 R186 15@ 100K_0402_5%
41 EC_SMB_CK1 SCL1/GPIO44 BATT_LOW_LED#/GPIO54 BATT_AMB_LED# 34
EC_SMB_DA1 78 93 2 1
+5VS 41 EC_SMB_DA1 SDA1/GPIO45 SUSP_LED#/GPIO55 PWR_LED 34
EC_SMB_CK2 79 SM Bus 95 R543 17@ 100K_0402_5%
8 EC_SMB_CK2 SCL2/GPIO46 SYSON/GPIO56 SYSON 30,37,43
EC_SMB_DA2 80 121
8 EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON 44
2 1 TP_CLK AC_IN/GPIO59 127 ACIN
ACIN 37,38,40
B 4.7K_0402_5% R208 B

2 1 TP_DATA
4.7K_0402_5% R207 6 100 EC_RSMRST#
17 PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03
17 PM_SLP_S5# 14 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 101 EC_LID_OUT# 18 +3VALW Analog Board ID definition,
18 EC_SMI# 15 EC_SMI#/GPIO08 EC_ON/GPXO05 102 EC_ON 33
34 LID_SW# 16 103 EC_SWI# 17
Please see page 3.
LID_SW#/GPIO0A EC_SWI#/GPXO06 SB_PWRGD
30,37,42 SUSP# 17 SUSP#/GPIO0B ICH_PWROK/GPXO06 104

2
17 PBTN_OUT# 18 PBTN_OUT#/GPIO0C GPO BKOFF#/GPXO08 105 BKOFF# 24
19 GPIO 106 R219
25 EC_PME# EC_PME#/GPIO0D WL_OFF#/GPXO09
1 2 ENBKL EC_THERM#_R 25 107 Ra @
EC_THERM#/GPIO11 GPXO10 EC_MUTE# 100K_0402_5%
6 FAN_SPEED1 28 FAN_SPEED1/FANFB1/GPIO14 GPXO11 108 EC_MUTE# 36
R519 10K_0402_5% 29
33,37 VLDT_EN

1
E51TXD_P80DATA 30 FANFB2/GPIO15 AD_BID0
E51RXD_P80CLK 31 EC_TX/GPIO16
EC_RX/GPIO17 PM_SLP_S4#/GPXID1 110

2
33 ON/OFF 32 ON_OFF/GPIO18 ENBKL/GPXID2 112 ENBKL 14 1
34 114 R215 C306
34 PWR_SUSP_LED PWR_LED#/GPIO19 GPXID3 EAPD 35
34 NUM_LED# 36 NUMLED#/GPIO1A GPI GPXID4 115 Rb
116 NB_PWRGD 8.2K_0402_5% 0.1U_0402_16V4Z
GPXID5 2
117

1
GPXID6
GPXID7 118 65W/90W# 40
EC_CRY1 122
R460 0_0402_5% EC_CRY2 XCLK1
123 XCLK0 V18R 124
1 2 EC_THERM#_R 1
8,18 EC_THERM#
AGND

@ C674
GND
GND
GND
GND
GND

R658 0_0402_5%
EC_CRY1 EC_CRY2 4.7U_0805_10V4Z NB_PWRGD 2 1
2 NB_PWROK 14,33
KB926QFD2_LQFP128_14X14
11
24
35
94
113

69

1 1 20mil R652 0_0402_5%

C344 C343 L69 SB_PWRGD
A Chagne to D3 version 2 1 SB_PWROK 8,17,33 A
1

ECAGND 1 2
15P_0402_50V8J 15P_0402_50V8J FBMA-L11-160808-800LMT_0603
OUT
IN

2 2
NC

NC

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/5/18 Deciphered Date 2009/06/11 Title
2

Y1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
32.768KHZ_12.5P_MC-306 Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Tuesday, April 14, 2009 Sheet 28 of 46
5 4 3 2 1
 For 17" For 15"
Left Right Left Right
SW4 SW5 SW2 SW3
17@ SMT1-05-A_4P 17@ SMT1-05-A_4P 15@ SMT1-05-A_4P 15@ SMT1-05-A_4P
BTN_L 3 1 BTN_R 3 1 BTN_L 3 1 BTN_R 3 1

4 2 4 2 4 2 4 2

5
6

5
6

5
6

5
6
TP_CLK BTN_R

TP_DATA BTN_L

2
D15
TP_DATA C169 1 2 100P_0402_50V8J D14

TP_CLK C174 1 2 100P_0402_50V8J

PJDLC05_SOT23-3 PJDLC05_SOT23-3

1
To TP/B Conn. Change to SCA00000200

JTP1
+5VS
+5VS TP_CLK 6
28 TP_CLK 5
TP_DATA
28 TP_DATA 4
BTN_L C137
BTN_R 3
2 0.1U_0402_16V4Z
1
ACES_85201-0605
CONN@

KALA0 used

KSI[0..7]
KSI[0..7] 28,34
KB1 for 15"
INT_KBD Conn. KSO[0..17]
KSO[0..17] 28,34 KB2 for 17"
(Left) JKB1 (Left) JKB2

KSO15 C243 1 2 100P_0402_50V8J KSO7 C231 1 2 100P_0402_50V8J KSO0 26 28 KSO0 26 28

KSO1 KSO0 G2 KSO1 KSO0 G2
25 KSO1 G1 27 25 KSO1 G1 27
KSO14 C242 1 2 100P_0402_50V8J KSO6 C230 1 2 100P_0402_50V8J KSO2 24 KSO2 24
KSO3 KSO2 KSO3 KSO2
23 KSO3 23 KSO3
KSO13 C241 1 2 100P_0402_50V8J KSO5 C229 1 2 100P_0402_50V8J KSO4 22 KSO4 22
KSO5 KSO4 KSO5 KSO4
21 KSO5 21 KSO5
KSO12 C240 1 2 100P_0402_50V8J KSO4 C228 1 2 100P_0402_50V8J KSO6 20 KSO6 20
KSO7 KSO6 KSO7 KSO6
19 KSO7 19 KSO7
KSO8 18 KSO8 18
KSI0 C239 1 100P_0402_50V8J KSO3 C227 1 100P_0402_50V8J KSO9 KSO8 KSO9 KSO8
2 2 17 KSO9 17 KSO9
KSO10 16 KSO10 16
KSO11 C238 1 100P_0402_50V8J KSI4 C226 1 100P_0402_50V8J KSO11 KSO10 KSO11 KSO10
2 2 15 KSO11 15 KSO11
KSO12 14 KSO12 14
KSO10 C237 1 100P_0402_50V8J KSO2 C225 1 100P_0402_50V8J KSO13 KSO12 KSO13 KSO12
2 2 13 KSO13 13 KSO13
KSO14 12 KSO14 12
KSI1 C236 1 100P_0402_50V8J KSO1 C224 1 100P_0402_50V8J KSO15 KSO14 KSO15 KSO14
2 2 11 KSO15 11 KSO15
KSO16 10 KSO16 10
KSO17 KSO16 KSO17 KSO16
9 KSO17 9 KSO17
KSI2 C235 1 2 100P_0402_50V8J KSO0 C223 1 2 100P_0402_50V8J KSI0 8 KSI0 8
KSI1 KSI0 KSI1 KSI0
7 KSI1 7 KSI1
KSO9 C234 1 2 100P_0402_50V8J KSI5 C222 1 2 100P_0402_50V8J KSI2 6 KSI2 6
KSI3 KSI2 KSI3 KSI2
5 KSI3 5 KSI3
KSI3 C233 1 2 100P_0402_50V8J KSI6 C221 1 2 100P_0402_50V8J KSI4 4 KSI4 4
KSI5 KSI4 KSI5 KSI4
3 KSI5 3 KSI5
KSO8 C232 1 2 100P_0402_50V8J KSI7 C220 1 2 100P_0402_50V8J KSI6 2 KSI6 2
KSI7 KSI6 KSI7 KSI6
1 KSI7 1 KSI7
(Right) ACES_88747-2601
(Right) ACES_88747-2601
KSO16 C245 1 2 100P_0402_50V8J CONN@ CONN@

KSO17 C244 1 2 100P_0402_50V8J

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/03/08 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Tuesday, April 14, 2009 Sheet 29 of 46
 +3VALW 1 2 C675 1 2 0.1U_0402_16V4Z
R618 0_0603_5%

+SPI_VCC
U17

28 EC_SPICS#/FSEL# 1 CE# VDD 8

2 1 SPI_WP# 3 6 EC_SPICLK_R R620 1 2 0_0402_5%
WP# SCK EC_SPICLK 28
+3VALW R619 2 1 4.7K_0402_5% SPI_HOLD# 7 5 EC_SO_SPI_SI_R R622 1 2 0_0402_5%
HOLD# SI EC_SO_SPI_SI 28
R621 4.7K_0402_5% 4 2 EC_SI_SPI_SO_R R623 1 2 0_0402_5%
VSS SO EC_SI_SPI_SO 28
MX25L8005M2C-15G_SOP8

SA00000XT00 : S IC FL 8M MX25L8005M2C-15G SOP 8P

ENE suggestion SPI Frequency over 66MHz
SST: 50MHz R257 C296
MXIC: 70MHz EC_SPICLK 1 2 1 2
ST: 40MHz @ 22_0402_5% @ 10P_0402_50V8J
ONLY MXIC used in this project (66MHz)

U44
EC_SPICS#/FSEL# 1 8 +SPI_VCC
SPI_WP# CS# VCC EC_SPICLK_R
3 WP# SCLK 6
SPI_HOLD# 7 5 EC_SO_SPI_SI
HOLD# SI EC_SI_SPI_SO
4 GND SO 2
MX25L512AMC-12G_SO8
@
Reserved for BIOS simulator.
Footprint SO8
SPI ROM Footprint 150mil

New Card Power Switch

New Card Socket (Left/TOP)
U14 +3VALW_CARD +3VS_CARD +1.5VS_CARD
40mil JEXP1
+1.5VS 12 1.5Vin 1.5Vout 11 +1.5VS_CARD Imax = 0.275A Imax = 1.35A Imax = 0.75A
14 1.5Vin 1.5Vout 13
1 GND
60mils C301
1 1
C299 C304
1 1
C303 C281
1 1
C282
18 USB20_N7 2 USB_D-
+3VS 2 3.3Vin 3.3Vout 3 +3VS_CARD 18 USB20_P7 3 USB_D+
4 5 NC@ NC@ NC@ NC@ NC@ NC@ CP_USB# 4
3.3Vin 3.3Vout 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z CPUSB#
40mil 2 2
0.1U_0402_16V4Z 2 2
0.1U_0402_16V4Z 2 2
0.1U_0402_16V4Z
5 RSV
+3VALW 17 AUX_IN AUX_OUT 15 +3VALW_CARD 6 RSV
18 SB_CK_SCLK1 7 SMB_CLK
NB_RST# 6 19 18 SB_CK_SDAT1 8
4,18,25,28,31 NB_RST# SYSRST# OC# SMB_DATA
+1.5VS_CARD 9 +1.5V
SYSON 20 8 PERST1# 10
28,37,43 SYSON SHDN# PERST# +1.5V
17,31 SB_PCIE_WAKE# 11 WAKE#
SUSP# 1 16 +3VALW_CARD 12
28,37,42 SUSP# STBY# NC +3.3VAUX
PERST1# 13
CP_PE# PERST#
10 CPPE# GND 7 +3VS_CARD 14 +3.3V
(Internal Pull High to AUXIN) +3VS 15
CP_USB# CLKREQ1# +3.3V
9 CPUSB# Thermal_Pad 21 16 CLKREQ#
(Internal Pull High to AUXIN) 18 CP_PE# CP_PE# 17
RCLKEN1 +3VS CPPE#
18 RCLKEN 1 16 CLK_PCIE_CARD# 18 REFCLK-
C309 19
16 CLK_PCIE_CARD REFCLK+
G577NSR91U_TQFN20_4x4 20 GND
1

0.1U_0402_16V4Z 21
2 NC@ 14 PCIE_MRX_C_PTX_N0 PERn0
NC@ R221 22
14 PCIE_MRX_C_PTX_P0 PERp0
5

10K_0402_5% U16 23
CLKREQ1# GND
2 24
G Vcc

B 14 PCIE_MTX_C_PRX_N0 PETn0
NC@ 4 14 PCIE_MTX_C_PRX_P0 25
EXP_CLKREQ# 16
2

Y PETp0
1 A 26 GND
1

+3VS +3VALW +1.5VS D Q31 NC7SZ32P5X_NL_SC70-5 NC@ 27 29

3

RCLKEN1 2 GND GND

28 GND GND 30
G 2N7002_SOT23-3
1 1 1 NC@ S FOX_1CH4110C_LT
3

C310 C300 C283 CONN@

NC@ NC@ NC@ Don't Connect to GND
10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 2008/02/22
2 2 2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/03/08 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Tuesday, April 14, 2009 Sheet 30 of 46
 A B C D E

1 1

+3VS_WLAN +1.5VS +3VALW

1 1 1 1 1 1
C442 C441 C439 C438 C440 C437

4.7U_0805_10V4Z 0.1U_0402_16V4Z 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

2 2 2 2 2 2

For Wireless LAN

+3VS_WLAN R487 1 2 0_1206_5% +3VS
R653 0_0402_5% JMINI2
17,30 SB_PCIE_WAKE# 1 2 1 1 2 2 +3VS_WLAN
@ 3 4
3 4
5 5 6 6 +1.5VS
16 MINI2_CLKREQ# 7 7 8 8
9 9 10 10
16 CLK_PCIE_MINI2# 11 11 12 12
16 CLK_PCIE_MINI2 13 13 14 14
2 2
15 15 16 16 Mini Card Power Rating

R655 0_0402_5%
Power Primary Power (mA) Auxiliary Power (mA)
17 17 18 18
19 20 WL_OFF#_R 1 2 Peak Normal Normal
19 20 WL_OFF# 28
21 22 NB_RST#
21 22 NB_RST# 14,18,25,28,30
23 24 R246 1 2 0_0603_5% +3VS +3VS 1000 750
13 PCIE_MRX_PTX_N2 23 24
25 26 R243 1 2 0_0603_5% +3VALW
13 PCIE_MRX_PTX_P2 25 26
27 28 @ +3VALW 330 250 250 (wake enable)
27 28
29 29 30 30 SB_CK_SCLK 10,11,16,18
13 PCIE_MTX_C_PRX_N2 31 31 32 32 SB_CK_SDAT 10,11,16,18 +1.5VS 500 375 5 (Not wake enable)
13 PCIE_MTX_C_PRX_P2 33 33 34 34
35 35 36 36 USB20_N4 18
37 37 38 38 USB20_P4 18
+3VS_WLAN 39 39 40 40
41 41 42 42
43 44 (MINI1_LED#) 1 2
43 44 WL_ON_LED# 34
45 45 46 46
47 48 R752 0_0402_5%
47 48

1
E51TXD_P80DATA R654 1 2 0_0402_5% E51TXD_P80DATA_R 49 50
28 E51TXD_P80DATA 49 50
E51RXD_P80CLK 51 52 R550
28 E51RXD_P80CLK 51 52 @100K_0402_5%

G1
G2
G3
G3
For MINICARD Port80 Debug

2
53 FOX_AS0B226-S99N-7F
54
55
56
CONN@
+3VALW

H:9.9mm
3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/06/20 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Friday, April 10, 2009 Sheet 31 of 46
A B C D E
 A B C D E

1 1

USB CONN. 1 & 2

+USB_VCCA +USB_VCCA
W=80mils W=80mils
1 1
1 1
+ C478 C474 + C1 C2
@
150U_D_6.3VM 470P_0402_50V7K 150U_D_6.3VM 470P_0402_50V7K
2 2 2 2
JUSB1 JUSB2
1 VCC 1 VCC
USB20_N0 R598 1 @ 2 0_0402_5% USB20_N0_R 2 USB20_N2 R599 1 @ 2 0_0402_5% USB20_N2_R 2
18 USB20_N0 D- 18 USB20_N2 D-
USB20_P0 R600 1 2 0_0402_5% USB20_P0_R 3 USB20_P2 R601 1 2 0_0402_5% USB20_P2_R 3
18 USB20_P0 D+ 18 USB20_P2 D+
@ 4 @ 4
GND GND
5 GND1 5 GND1
L67 6 L68 6
GND2 GND2
4 4 3 3 7 GND3 4 4 3 3 7 GND3
8 GND4 8 GND4
1 2 SUYIN_020173MR004G565ZR 1 2 SUYIN_020173MR004G565ZR
1 2 CONN@ 1 2 CONN@
KALA0 used KALA0 used
WCM2012F2S-900T04_0805 WCM2012F2S-900T04_0805
2 2

D31
USB20_N0_R 6 3 USB20_N2_R
+3VALW CH3 CH2
1

Check net connect +USB_VCCA 5 Vp Vn 2

R42
+5VALW +USB_VCCA when DVT
U4 100K_0402_5%
1 8 USB20_P2_R 4 1 USB20_P0_R
2

GND OUT CH4 CH1

2 IN OUT 7 2 1 USB_OC#2 18
3 6 R171 10K_0402_5% R677 0_0402_5% CM1293-04SO_SOT23-6
IN OUT
1 4 EN# FLG 5 1 2 USB_OC#0 18
C111 1
TPS2061DRG4_SO8 C133
4.7U_0805_10V4Z
2 0.1U_0402_16V4Z
2

37,42 SYSON#

3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/06/20 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Friday, April 10, 2009 Sheet 32 of 46
A B C D E
 A B C D E

+3VS +3VALW +3VALW +3VALW +3VALW +3VALW

Power ON Circuit R111

1
10K_0402_5%
D5 @
BAS16_SOT23-3 U10A U10E U10F
@ SN74LVC14APWR_TSSOP14 SN74LVC14APWR_TSSOP14 SN74LVC14APWR_TSSOP14

14

14

14

14
R112 R104

2
R100 47K_0402_1% 100K_0402_1% 10_0402_5%

P
1 1
VLDT_EN 1 2 1
28,37 VLDT_EN I O 2 3 I O 4 11 I O 10 13 I O 12 1
@
2 SB_PWROK 8,17,28

G
+3V POWER +3V POWER +3V POWER
1 2

7
C204 R105
R106 C203 U10B @
10K_0402_5% 1U_0603_10V4Z SN74LVC14APWR_TSSOP14 1U_0805_16V7K 100K_0402_5%
2 1

R108
10_0402_5%
1 2 NB_PWROK 14,28
+3VALW +3VALW @

U10D
SN74LVC14APWR_TSSOP14

14

14
P

P
1 @ 2 5 6 9 8 2 @ 1
I O I O

G
R109 R113
10_0402_5% 180K_0402_5%

7
U10C
SN74LVC14APWR_TSSOP14

2 2

note:T1 minimum 15ms,T2 minimum 33ms/maximum 500ms,

SUSP# goes to low after SB_PWRGD goes to low for power
down.
T1
TOP Side +3VALW VLDT_EN
2 @ 1
R765 10K_0603_5%
Power Button
NB_PWRGD

2
2 @ 1 R281
SB_PWRGD
R766 10K_0603_5% 100K_0402_5% T2
Bottom Side
1

D10 SUSP#
2 ON/OFF 28
ON/OFFBTN# 1
34 ON/OFFBTN#
3 51ON# +1.8VS
51ON# 38
DAN202UT106_SC70-3
3 3

1
2
SW10
SMT1-05-A_4P C358 D11
1 3 1000P_0402_50V7K RLZ20A_LL34
ON/OFFBTN# 1

2
1

D Q17
2 4
EC_ON 2
28 EC_ON
G 2N7002_SOT23
6
5

R290 S
3

10K_0402_5%

MP would remove

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/03/08 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Tuesday, April 14, 2009 Sheet 33 of 46
A B C D E
 PWR_LED#

MDC Conn.

3
JMDC1
Q68B R254 0_0402_5%
5 2N7002DW-T/R7_SOT363-6 1 2 1 2
28 PWR_LED GND1 RES0 +3VALW
AC_SDOUT 3 4
18 AC_SDOUT IAC_SDATA_OUT RES1

1
5 6 +3VALW

4
R291 AC_SYNC GND2 3.3V
18 AC_SYNC
R357 1
7 IAC_SYNC GND3 8 20mil 1
18 ACZ_SDIN1 2 33_0402_5% 9 IAC_SDATA_IN GND4 10 C3
100K_0402_5% AC_RST# 11 12 AC_BITCLK
18 AC_RST# IAC_RESET# IAC_BITCLK AC_BITCLK 18
1U_0603_10V4Z

1
2
R256

GND
GND
GND
GND
GND
GND
PWR_SUSP_LED# ACES_88018-124G 0_0402_5%

13
14
15
16
17
18

2
CONN@
1
Connector for MDC Rev1.5 C432

6
22P_0402_50V8J
Q68A 2
2 2N7002DW-T/R7_SOT363-6
28 PWR_SUSP_LED For EMI
1

1
R292

100K_0402_5%
2

LED1
To PWR LED/B
R251 1K_0402_5%
1 2 2 1 PWR_LED# +5VS +3VALW +5VALW +3VS
+5VS YG

R250 1.2K_0402_5% JP14

+5VALW 1 2 4 3 PWR_SUSP_LED#
A 1 +5VALW +5VS +3VS +3VALW
2
HT-297UD/CB BLUE/AMB 3
4
HARVATEK
5 LID_SW# C435 C436 C444 C445
6 LID_SW# 28
LED2 TP_LOCK_LED#
7 TP_LOCK_LED# 28
R253 1K_0402_5% KSO0 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
8 KSO0 28,29
+5VALW 1 2 2 1 BATT_GRN_LED# BATT_GRN_LED# 28 KSI2
YG 9 KSI2 28,29
PWR_SUSP_LED#
R252 1.2K_0402_5% 10 PWR_LED#
BATT_AMB_LED# 11 ON/OFFBTN#
+5VALW 1 2 4 A 3 BATT_AMB_LED# 28 12 ON/OFFBTN# 33
KSI1
13 KSI1 28,29
WL_ON_LED#
14 WL_ON_LED# 31
HT-297UD/CB BLUE/AMB MEDIA_LED#
15 NUM_LED#
HARVATEK NUM_LED# 28
16 CAPS_LED#
17 CAPS_LED# 28
18
19
BLUE/AMB LED 20
ACES_85201-20051
CONN@

+3VS
KSO0 Q67A

2
KSI1 WL_BTN# 2N7002DW-T/R7_SOT363-6

KSI2 TP_LOCK_BTN# 6 1 5IN1_LED# 27

KSI3 MEDIA_LED# 3 4 SATA_LED# 18

KSI4 Q67B

5
KSI5 2N7002DW-T/R7_SOT363-6 +3VS

KSI6

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/06/20 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Friday, April 10, 2009 Sheet 34 of 46
 A B C D E F G H

+VDDA

1
1 2
R783 R784 0_0805_5%
10K_0402_5%
+5VAMP

2
U81
1 2 +5VS L80 1 2 0.1U_0402_16V4Z 60mil 1 IN
40mil
C898 1U_0402_6.3V4Z FBMA-L11-201209-221LMA30T_0805 5 +VDDA 4.75V
OUT

1
1 1 2 GND
R785 L81 1 2 C899 C900
1 10K_0402_5% FBMA-L11-201209-221LMA30T_0805 1
3 SHDN BYP 4 1 2
0.1U_0402_16V4Z C901
2 2 @ G9191-475T1U_SOT23-5 0.01U_0402_25V7K

2
C902
1 2 MONO_IN
1U_0402_6.3V4Z HD Audio Codec (output = 300 mA)

1
C 1 2
C903 1 R787 Q72 R786
28 BEEP# 2 1 2 2
1U_0402_6.3V4Z B 2SC2411KT146_SOT23-3 2.4K_0402_1%
560_0402_5% E

3
C904 1 R788
18 SB_SPKR 2 1 2
1U_0402_6.3V4Z

1
560_0402_5%
D37
R789 RB751V_SOD323
10K_0402_5%
L82
2

2
MBK1608121YZF_0603
10mil 0.1U_0402_16V4Z +3VS_DVDD 1 2 +3VS

1 1 1
C905 C906 C907
+AVDD_HDA
10U_0805_10V4Z
2 2 2
L83 1 2 0.1U_0402_16V4Z 40mil
+VDDA
FBM-L11-160808-800LMT_0603 1 1 1 0.1U_0402_16V4Z
C909 C910
2 C908 2
10U_0805_10V4Z

25

38

9
2 2 2 U82
0.1U_0402_16V4Z

DVDD
AVDD1

AVDD2

DVDD_IO
MIC2_VREFO
14 35 AMP_LEFT
LINE2_L LOUT1_L AMP_LEFT 36

1
15 36 AMP_RIGHT
LINE2_R LOUT_R AMP_RIGHT 36
R790
R791 1K_0402_1% 1 2 MIC2_C_L 16 39 2.2K_0402_5%
INT_MIC_R INT_MIC C912 4.7U_0805_6.3V6K MIC2_L LOUT2_L
2 1
1 2 MIC2_C_R 17 41 15mil

2
C911 4.7U_0805_6.3V6K MIC2_R LOUT2_R
JMIC2
23 45 INT_MIC_R 1
LINE1_L SPDIFO2 1
2 2
24 LINE1_R DMIC_CLK1/2 46

2
18 LINE1_VREFO NC 43 3 G1
1 D38 4 G2
20 LINE2_VREFO DMIC_CLK3/4 44 1 2 1 2 C914 C913
R792 0_0402_5% 22P_0402_50V8J For EMI @ ACES_88266-02001
19 220P_0402_50V7K CONN@
MIC2_VREFO MIC2_VREFO 2
6 SM05T1G_SOT23-3
AZ_BITCLK 18

1
MIC1_L MIC1_C_L BITCLK
36 MIC1_L 1 2 21 MIC1_L
C915 4.7U_0805_6.3V6K
MIC1_R 1 2 MIC1_C_R 22 8 1 2 ACZ_SDIN0 18
36 MIC1_R MIC1_R SDATA_IN
C916 4.7U_0805_6.3V6K R793 33_0402_5%
MONO_IN 12 37
PCBEEP_IN MONO_OUT

CBP 29
3 2.2U_0402_6.3V6M 3
18 AZ_RST# 11 RESET#
31 C917 1 2
CPVEE
18 AZ_SYNC 10 SYNC 10mil 1
MIC1_VREFO 28 MIC1_VREFO_L
18 AZ_SDOUT 5 C918 HP_RIGHT
SDATA_OUT HP_RIGHT 36
32 HP_RIGHT 2.2U_0402_6.3V6M
HPOUT_R 2 HP_LEFT
2 GPIO0/DMIC_DATA1/2 HP_LEFT 36
3 GPIO1/DMIC_DATA3/4 CBN 30
R794 2 1 20K_0402_1% SENSE_A 13 10mil
36 MIC_PLUG# SENSE A
R795 2 1 5.11K_0402_1% SENSE_B 34 27 CODEC_VREF
36 HP_PLUG# SENSE B VREF
1 1

10U_0805_10V4Z

0.1U_0402_16V4Z
28 EAPD 1 2 47 EAPD JDREF 40

20K_0402_1%

C919

C920
R796 0_0402_5%

1
update this table 48 33 HP_LEFT
SPDIFO1 HPOUT_L 2 2

R797
4 DVSS1 AVSS1 26
7 DVSS2 AVSS2 42

2
ALC272-VA2-GR_LQFP48_7X7
Sense Pin Impedance Codec Signals 1
R798
2
0_0805_5%
1
R799
2
0_0805_5%
Change to ALC272X
39.2K PORT-A (PIN 39, 41) DGND AGND
1 2 1 2
R800 0_0805_5% R801 0_0805_5%
20K PORT-B (PIN 21, 22)
SENSE A
1 2 1 2
10K PORT-C (PIN 23, 24) R802 0_0805_5% R803 0_0805_5%

5.1K PORT-D (PIN 35, 36)

4 4
GND GNDA GND GNDA
39.2K PORT-E (PIN 14, 15)

20K PORT-F (PIN 16, 17)

SENSE B
10K PORT-G (PIN 43, 44) Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/09/20 Deciphered Date 2009/06/11 Title
5.1K PORT-H (PIN 45, 46) SCHEMATIC,MB A4861
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Friday, April 10, 2009 Sheet 35 of 46
A B C D E F G H
 A B C D E

+5VAMP
0.1U_0402_16V4Z Int. Speaker Conn.
1 1
1 C921 C922 JSPK1 1
10U_0805_10V4Z SPKL+ R804 1 2 0_0603_5% SPK_L+ 1
2 2 SPKL- R805 1 SPK_L- 1
2 0_0603_5% 2 2
20mil Left

2
10 dB D39 3 G1
+5VAMP 4 G2
@

1
ACES_88266-02001

16
15
6
U83 R809 @ R806 PJDLC05_SOT23-3 CONN@
100K_0402_5% 100K_0402_5%

VDD
PVDD1
PVDD2

1
C923 1 2 0.47U_0603_10V7K 7 2 GAIN0 For EMI, Change to Bead
RIN+ GAIN0
3 GAIN1 SM010012010 (footprint no change)
GAIN1
JSPK2

1
1 2 1 2 AMP_C_RIGHT 17 SPKR+ R810 1 2 0_0603_5% SPK_R+ 1
35 AMP_RIGHT C924 3900P_0402_50V7K R808 0_0603_5% RIN- SPKR+ @ R811 R812 SPKR- R807 1 1
ROUT+ 18 2 0_0603_5% SPK_R- 2 2
100K_0402_5% 100K_0402_5% 20mil Right

2
14 SPKR- D40 3

2
C925 1 ROUT- G1
2 0.47U_0603_10V7K 9 LIN+ 4 G2
@
4 SPKL+ ACES_88266-02001
LOUT+ PJDLC05_SOT23-3 CONN@
1 2 1 2 AMP_C_LEFT 5
35 AMP_LEFT C971 3900P_0402_50V7K R813 0_0603_5% LIN- SPKL-
LOUT- 8

1
2 2

NC 12

EC_MUTE# BYPASS 10 Keep 10 mil width

28 EC_MUTE# 19 SHUTDOWN
2
GND5
GND1
GND2
GND3
GND4

C927
0.47U_0603_10V7K
1 LINE Out/Headphone Out
21
20
13
11
1

TPA6017A2_TSSOP20 JHP1
8
7
2 2
C928 C929
HP_PLUG# 5
35 HP_PLUG#
20mil 330P_0402_50V7K 330P_0402_50V7K
1 1
4

35 HP_RIGHT HP_RIGHT 1 2 HPOUT_R_1 1 2 HPOUT_R_2 3

R814 56.2_0402_1% L84 FBM-11-160808-700T_0603 6
35 HP_LEFT HP_LEFT 1 2 HPOUT_L_1 1 2 HPOUT_L_2 2
R815 56.2_0402_1% L85 FBM-11-160808-700T_0603 1

SINGA_2SJ-E351-S03
CONN@

3 3

MIC1_VREFO_L MIC1_VREFO_L

MIC JACK

2
RB751V_SOD323 RB751V_SOD323 JMIC1
D41 D42 8
7

1 1

1 1
MIC_PLUG# 5
35 MIC_PLUG#
R816 R817
4.7K_0402_5% 4.7K_0402_5% 4

2
35 MIC1_R 1 2 1 2 FBM-11-160808-700T_0603 MIC2_R_1 3
R818 1K_0603_1% L86 6
35 MIC1_L 1 2 1 2 FBM-11-160808-700T_0603 MIC2_L_1 2
R819 1K_0603_1% L87 1
1 1
SINGA_2SJ-E351-S01
C930 C931 CONN@
220P_0402_50V7K 220P_0402_50V7K
2 2
(HDA Jack)

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/09/20 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Friday, April 10, 2009 Sheet 36 of 46
A B C D E
 A B C D E

+5VALW

+3VALW TO +3VS
+5VALW TO +5VS

2
+3VS R167
10K_0402_5%
+5VALW +5VS
1 1 U7

1
+3VALW C559 C562 8 1 SUSP
D S
7 D S 2
U41 10U_0805_10V4Z 1U_0603_10V4Z 6 3 1 1
2 2 D S C166 C165
8 D S 1 5 D G 4

1
R508 D Q12
1 7 D S 2 1
6 3 100K_0402_5% 1 AO4468_SO8 10U_0805_10V4Z 1U_0603_10V4Z 2
D S 2 2 28,30,42 SUSP#
5 4 1 2 5VS_GATE 1 2 +VSB G 2N7002_SOT23
D G

1
R562 20K_0402_1% C143 S

3
AO4468_SO8 4.7U_0805_10V4Z R586
2 10K_0402_5%
1 Q29 R728 0_0402_5%
2

1
C560 D 5VS_GATE
1 2

2
100K_0402_5%
C570 2 SUSP

1
10U_0805_10V4Z 0.1U_0603_25V7K G
1

2
2 R500 S 2N7002_SOT23-3

3
@ C658
0.1U_0603_25V7K

1
2
+5VALW

2
D Q58
ACIN
2006/2/22 Add C658 0.1uF R31
28,38,40 ACIN 2
G 2N7002_SOT23-3 10K_0402_5%
@ S
3

1
SYSON#
32,42 SYSON#
+1.2VALW TO +1.2V_HT

1
D Q5
SYSON 2
+1.2V_HT 28,30,43 SYSON
G 2N7002_SOT23
+1.8V TO +1.8VS

1
2 S 2

3
+1.8V
+1.2VALW R589
U37 1 1 100K_0402_5%
8 1 +1.8VS C756 C757

2
D S

2
7 D S 2
6 3 U46 1U_0603_10V4Z 10U_0805_10V4Z R698
D S 2 2 470_0805_5%
5 D G 4 1 1 8 D S 1
C447 C446 7 2
AO4430_SOIC8 D S
6 3

1
10U_0805_10V4Z 1U_0603_10V4Z D S
1 5 D G 4 1 2 +VSB
2 2 R699
1
C443 AO4430_SOIC8 33K_0402_5% +5VALW

1
4.7U_0805_10V4Z D Q63 D Q64
2 1
C759 2 VLDT_EN# 2

2
0.1U_0603_25V7K 2 G G 2N7002_SOT23-3
C758 S 2N7002_SOT23-3 S R725

3
2
1 2 R563 5VS_GATE 10K_0402_5%
60.4K_0402_1% 4.7U_0805_10V4Z

1
2

VLDT_EN#
C632 R700
0.1U_0603_25V7K 33K_0402_5%
1

1
D Q66
12/30 Change R563 to 60.4K

2
VLDT_EN 2
28,33 VLDT_EN
G 2N7002_SOT23

1
S

3
1
D
ACIN 2 Q65 R726
3 G 100K_0402_5% 3
2N7002_SOT23
S

2
Near PU8 Near PU12
+0.9V +2.5VS +1.5VS +1.8V +3VS +1.8VS +5VS
2

2
R604 R587 R588 R26 R224 R270 R181
470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5%
1

1
1

1
D D D D D D D
2 SYSON# 2 SUSP 2 SUSP 2 SYSON# 2 SUSP 2SUSP 2 SUSP
G G G G G G G
S Q34 S Q35 S Q36 S Q6 S Q14 S Q15 S Q10
3

2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/03/08 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 401650 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 37 of 46
A B C D E
 A B C D

DC231000500
PJP1 PR1
SINGA_2DC-G756I200 ADPIN PL1 VIN 1M_0402_5%
SMB3025500YA_2P 1 2
1 1 2 VIN VIN

1
VS
@ PR2

1
G 2 10_1206_5%

560P_0402_50V7K

12P_0402_50V8J
G @ PR3 PR4

560P_0402_50V7K
84.5K_0402_1%

12P_0402_50V8J
1 3 10K_0402_5% 1

1 2
1

1
PC1
PR6

8
PC2

PC3

PC4
PR5 PR160 22K_0402_5%

2
@ PD1 0_0402_5% 10K_0402_5% 3 1 2

P
2

2
RLZ24B_LL34 +
1 2 1 2 1 0
28,37,40 ACIN

20K_0402_1%
- 2

1
PR7
PU1A

1
PC6
0.1U_0603_25V7K
LM358DT_SO8 PC5

4
PR8 PD3 1000P_0402_50V7K

2
10K_0402_5% GLZ4.3B_LL34-2

2
2

2
PR9
10K_0402_5%
1 2
RTCVREF

- PBJ1 +
+RTCBATT
2 1
+RTCBATT
Vin Dectector
Min. Typ Max.
ML1220T13RE H-->L 16.976V 17.525V 17.728V
2 45@ 2

L-->H 17.430V 17.901V 18.384V

VIN

2 PD4
LL4148_LL34-2 PJ1 PJ2
+3VALWP 2 2 1 1 +3VALW +1.5VSP 2 2 1 1 +1.5VS
PD5
1

LL4148_LL34-2 JUMP_43X118 JUMP_43X118

BATT+ 2 1
1

PR10 PR11
PQ1 68_1206_5% 68_1206_5%
TP0610K-T1-E3_SOT23-3 PJ3 PJ4
PR12 2 1 2 1
+5VALWP +5VALW +0.9VP +0.9V
2

200_0603_5% 2 1 2 1
CHGRTCP 1 2 N1 3 1 JUMP_43X118 JUMP_43X79
VS
1

3 PR13 PC8 3
PJ5
100K_0402_1% PC7 0.1U_0603_25V7K PJ6
0.22U_1206_25V7K 2 1 +1.8VP 2 1 +1.8V
+VSBP +VSB
2

PR14 2 1 2 1
2

22K_0402_1% JUMP_43X39 JUMP_43X118

1 2
33 51ON#

PJ7 PJ8
+1.2VALWP 2 2 1 1 +1.2VALW +1.2VALWP 2 2 1 1 +1.2VALW
RTCVREF
1

JUMP_43X118 JUMP_43X118
PR15
PU2 200_0603_5%
PR16 PR17 G920AT24U_SOT89-3
560_0603_5% 560_0603_5% 3.3V PJ10
2

1 2 1 2 3 2 N2 2 1
OUT IN +2.5VSP 2 1 +2.5VS
+CHGRTC
JUMP_43X118
1

GND PC10
PC9 1U_0805_25V4Z
10U_0805_10V4Z 1
2

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/06/11 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 401650 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 38 of 46
A B C D
 A B C D

ISL6237_B+
ISL6237_B+

PJ17 PR18
JUMP_43X118 0_0805_5%
2 2 1 1 1 2
B+

2200P_0402_50V7K

2200P_0402_50V7K
4.7U_1206_25V6K

4.7U_1206_25V6K

4.7U_1206_25V6K

4.7U_1206_25V6K
1 1

5
6
7
8
PC15

PC16

PC17
@ PC203

8
7
6
5

1
PC20
680P_0402_50V7K VL

PC18

PC19
1U_0603_10V6K
2

2
PQ3

2
2
PQ2 PC21 AO4466_SO8

2
AO4466_SO8 0.1U_0603_25V7K

4.7U_0805_6.3V6K
4

1
PC22
4

PC23
1
+5VALWP

3
2
1
PL4

1
2
3
PL5 10UH_MSCDRI-104A-100M-E_4.6A_20%

7
10UH_MSCDRI-104A-100M-E_4.6A_20% PC24 2 1
1 2 1U_0603_10V6K

LDO
VIN

VCC
+3VALWP 33 19 1 2
TP PVCC

5
6
7
8

1
4.7_1206_5%
1

8
7
6
5

PR23
DH3 26 15 DH5
PR19 PR20 UGATE2 UGATE1 PR21 2.2_0603_5% PQ5
4.7_1206_5% PQ4 2 1 BST3A 24 17 BST5A 2 1 AO4712_SO8
BOOT2 BOOT1
2

1 AO4712_SO8 2.2_0603_5%

2
2

63.4K_0402_1%
PR22 PC27 4

2
PC25 + 0_0402_5% 4 PC26 0.1U_0603_25V7K

2
680P_0402_50V7K
330U_6.3V_M 0.1U_0603_25V7K

1
1

PR24
<BOM Structure> LX3 25 16 LX5 1
1

2 PHASE2 PHASE1

PC29
PC28

3
2
1

2
680P_0402_50V7K + PC30

1
2
3
DL3 23 18 DL5 330U_6.3V_M

1
LGATE2 LGATE1
2
2 2
2

10K_0402_1%
PGND 22

2
FB3 30 OUT2

PR26
@ PR25
10K_0402_1% 10
OUT1
VL 32
1

REFIN2

1
11 FB5
2VREF_ISL6237 FB1

1 2 1 REF
PC31 0.22U_0603_10V7K
BYP 9
8 LDOREFIN
+3.3VALWP Ipeak=8.444A ; Imax=5.91A @ PR27 0_0402_5%
29 2 1 VL
Choke DCRmax=60m ohm, DCRtyp=54m ohm SKIP
Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical) PR28 0_0402_5%
1 2
Vlimit=(5E-06 * 330K)/10=165mV 20 28
PD6 PR29 NC POK2
Ilimit=165mV/18m ~ 165mV/15m
GLZ5.1B_LL34-2 100K_0402_1%
=9.167A ~ 11A 1 2 1 2 4 13 SPOK 41,43
Iocp=Ilimit+Delta I/2 VS EN_LDO POK1 PR31
2
200K_0402_5%

330K_0402_1%
=10.134A ~ 11.967A
2
PR30

14 12 ILM1 2 1
EN1 ILIM1
Delta I=1.934A (Freq=300KHz) PC32
0.22U_0603_25V7K
1

27 31 ILIM2 2 1

GND
3 3

TON
1

EN2 ILIM2
1

NC
2

0_0402_5%
PD7 PR32
VL
2
1SS355_SOD323-2 @ PR33 PU3 330K_0402_1%

21
PR34
0_0402_5% ISL6237IRZ-T_QFN32_5X5
2
2

PR35
1

1
1U_0603_10V6K
806K_0603_1%
2VREF_ISL6237 1

PR37 @ PR38 PR36

+5VALWP Ipeak=8.444A ; Imax=5.91A
1

2
0_0402_5% 47K_0402_5% PC33 0_0402_5%
2 1 1 2 Choke DCRmax=60m ohm, DCRtyp=54m ohm

2VREF_ISL6237 2
1
Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical)
0.047U_0603_16V7K

8,41 MAINPWON
Vlimit=(5E-06 * 330K)/10=165mV
1

PC34

Ilimit=165mV/18m ~ 165mV/15m
2

=9.167A ~ 11A
1

@ PC35 Iocp=Ilimit+Delta I/2

3

0.047U_0402_16V7K
2

=10.147A ~ 11.980A
Delta I=1.96A (Freq=400KHz)
2 PQ6
TP0610K-T1-E3_SOT23-3

4 4
1

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/06/11 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
401650Sheet
Tuesday, April 14, 2009 39 of 46
A B C D
 A B C D E

B+
PQ7 PQ8
AO4407A_SO8 AO4407A_SO8 PR39
VIN 8 1 1 8 0.015_2512_1%
7 2 2 7 PJ11
6 3 3 6 1 4 2 1 CHG_B+
2 1

1
5 5

2
2200P_0402_25V7K
4.7U_1206_25V6K

4.7U_1206_25V6K
2 3 JUMP_43X118 PR41
PR40 CHGEN# PC36 100K_0402_1%

2
0.01U_0402_25V7K
3.3_1210_5% 0.01U_0402_25V7K

1
100K_0402_1%

PC37

PC38

PC39

2
1
PC41 PC45

1
2

5
6
7
8

3
2
1
PC40

PR42
1 0.1U_0402_16V7K PU4 0.1U_0805_25V7K 1
1 2 1 28 PVCC 1 2 PQ9
CHGEN PVCC

1
AO4407A_SO8

1
PR43 PR44 /BATDRV 4

2
3.3_1210_5% PC42 PC43 2.2_0603_5% PQ10
0.1U_0603_25V7K 0.1U_0603_25V7K 27 BTST 1 2 4 AO4466_SO8

2
BTST

2
2
PR45 @PD11
@ PD11
340K_0402_1% 1 2 ACN 2 26 DH_CHG
1
ACP ACN HIDRV
3

3
2
1

5
6
7
8
PC44 RLZ24B_LL34 ACP PR46

1
2.2U_0805_25V6K ACDRV 4 25 LX_CHG PL6 0.02_2512_1%
2

ACDET ACDRV PH PD8 10UH_PCMB104T-100MS_6A_20%

5 ACDET
2 1 1 2 1 2 1 4
BATT+

10U_1206_25V6M
Place close to back to back MOS

10U_1206_25V6M
LL4148_LL34-2 PC46

REGN
2 3

2
0.1U_0603_25V7K

5
6
7
8

PC48
24751_VREF PR47 PC47

PC137
CELLS GND 3 Cell 54.9K_0402_1% ACSET 6 10U_1206_25V6M
ACSET
24

2
REGN
VREF 4 Cell
1
2

1
PC49 PQ11

1
@ PR49
@PR49 1U_0603_10V6K 4 AO4466_SO8
100K_0402_1% PR50 PC51 PR48

2
2

0_0402_5% 0.47U_0603_16V7K 4.7_1206_5%

1 2 1 2 7
1

PR51 ACOP DL_CHG

23

3
2
1

2
340K_0402_1% LODRV
CELLS
1

1
22 PC50
@ PQ12 OVPSET PGND 680P_0402_50V7K PC52
8 OVPSET
1

D 2N7002W-T/R7_SOT323-3 0.1U_0402_16V7K

2
2 2
2 3S/4S# 28 1 2
G 9 21 ACOFF 28
AGND LEARN
2

S
3

1
PR52
54.9K_0402_1% PC53 PC54
24751_VREF 20 CELLS 0.1U_0603_25V7K 0.1U_0603_25V7K
Cells selector

2
CELLS
1

24751_VREF 10
VREF

1
PC55
1U_0603_10V6K
PR53 19 SE_CHG+

2
SRP
3
S
100K_0402_1% G
1 2 PQ13_GATE 2 11 18 SE_CHG-
PQ13 VDAC SRN
SI2301BDS-T1-E3_SOT23-3 17
BAT
1

Input OVP : 22.3V

1
D
LI-4S :18.0V----BATT-OVP=2.001V PC56 VADJ 12
1

0.1U_0603_25V7K VADJ PC57

Input UVP : 17.26V
2

BATT-OVP=0.1112*VMB ACSET 0.1U_0603_25V7K Icharge Setting

2
Fsw : 300KHz TP 29
LI-3S :13.5V----BATT-OVP=1.5012V ACGOOD# For 2200mA, Icharge=0.8C=0.8*2*2.2=3.52A
13 ACGOOD ICHG setting PR55
BATT-OVP=0.1112*VMB 17.4K_0402_1% Icharge=(Vsrset/Vdac)*(0.1/PR46)
VMB 16 SRSET 2 1
Per cell=3.5V /BATDRV 14
SRSET IREF 28 IREF=((100k/(100K+17.4K))/3.3)*(0.1/0.02)=Icharge
BATDRV

1
PR56

1
10_0603_5% PR57 IREF=0.7748*Icharge
1

15 1 2 100K_0402_1% @PC58
@PC58
IADAPT 0.01U_0402_25V7K

2
VS PR58 BQ24751ARHDR_QFN28_5X5 24751_VREF

2
CP Point Setting 340K_0402_1%

1
3 RTCVREF 3
2

2
0.01U_0402_25V7K

CP point=Iadapter*85% PC59

100K_0402_5%
100P_0402_50V8J @ PR59

2
65W adapter R=(100K*100K)/(100K+100K)=50K 100K_0402_1%
1

PC60

PR244
24751_VREF 24751_VREF ADP_I 28 @ PR61
1

Vacset=3.3*(50K/(50K+64.9K))=1.436V 0_0402_5% 24751_VREF

1
200K_0402_1%
PR60 1 2
2

1
100K_0402_1%

CP POINT=(1.436V/3.3V)*(0.1/0.015)=2.901A 499K_0402_1% ACIN 28,37,38

1
1

1
PR63

PQ13_GATE

1
D
PR62

@ PR64
2
8

PR65 PU1B 887K_0402_1% ACGOOD# 2 @ PQ14

1
10K_0402_1% LM358DT_SO8 D @ PQ16 G 2N7002W-T/R7_SOT323-3
5
P

+ PQ15 SI2301BDS-T1-E3_SOT23-3 @ PR66

1 2 7 0 2 S
2

3
28 BATT_OVP 6 PC61 G SSM3K7002F_SC59-3 0_0402_5%
-
G

S
0.1U_0402_16V7K REGN VADJ

D
S 3 1 1 2
3
1

24751_VREF
0.01U_0402_25V7K

ACOFF 1 2 2
4

PR67 G

1
PC62

105K_0402_1%

G
S
3

2
1

2
340K_0402_1%

499K_0402_0.1%
PQ17 @ PR69
2

1
PR68

SSM3K7002F_SC59-3 100K_0402_1% @PC63

@PC63 PR72
2

PR71
PR70 1000P_0402_50V7K 100K_0402_5%

2
PR73 210K_0402_0.1%

2
64.9K_0402_1%
2

1
24751_VREF 1 2 ACSET CHGEN#

2
1
D
1

1
@ PQ18 D
2
28 CALIBRATE# G 2N7002W-T/R7_SOT323-3 2 PQ19
28 FSTCHG
PR74 S G 2N7002W-T/R7_SOT323-3

3
100K_0402_1% S

3
1
2

PR75 Charger ADJ Calibrate#

4 100K_0402_1% 4
1

28 65W/90W# 2 4.0V L=0

2

G
PQ20 S
3

2N7002W-T/R7_SOT323-3 4.2V 1.8755V

4.3V 2.8132V
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/06/11 Deciphered Date 2009/06/11 Title
CP setting 4.35V H=3.3V SCHEMATIC,MB A4861
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Tuesday, April 14, 2009 Sheet 40 of 46
A B C D E
 A B C D

PH1 under CPU botten side :

CPU thermal protection at 92 degree C

VL
1
VL 1

VL
VMB

2
PJP2
SUYIN_250133MR007G115ZL PL7 PR76

1
SMB3025500YA_2P 47K_0402_1%
1 1 BATT_S1 1 2 BATT+ PH1 PC64
MAINPWON 8,39
2 100K_0603_1%_TSM1A104F4361RZ 0.1U_0603_25V7K PR77

1
2 47K_0402_1%
3 3

1
4 EC_SMCA 1 2

2
4 EC_SMDA PC65 PC66 PR78 PQ21
5 5

8
6 1000P_0402_50V7K 0.01U_0402_25V7K 11.3K_0402_1% DTC115EUA_SC70-3

2
6 PD9
7 1 2 3

P
7 +
8 8 O 1 2 1 2
9 TM_REF1 2
9 -

G
PU5A LL4148_LL34-2
PR83 LM393DG_SO8

4
6.49K_0402_1%

3
2

0.22U_0603_16V7K
<BOM Structure>
2 1 +3VALWP
PR79 PR80

13.3K_0402_1%
100_0402_1% 100_0402_1%

1
PC67
PR82
1

1000P_0402_50V7K
PR81
100K_0402_1%
1

PR85 2 1 VL

1
1K_0402_1%

PC68
2
2

1
2 2
BATT_TEMP 28
PR84
EC_SMB_CK1 28
100K_0402_1%
EC_SMB_DA1 28

2
PJP3

1 1 2 2

3 3 4 4

5 5 6 6

7 7 8 8 PH2 near main Battery CONN :

EC_SMCA 9 9 10 10 BAT. thermal protection at 75 degree C
11 12 EC_SMDA
11 12
13 13 14 14
VL
15 15 16 16

2
17 17 18 18
@ PR86
19 20 VL 47K_0402_1%
19 20 @ PR87
SUYIN_200109MS020G209ZR 47K_0402_1%

1
1 2

1
3 PQ22 3

TP0610K-T1-E3_SOT23-3
@ PH2
100K_0603_1%_TH11-4H104FT VL

B+ 3 1 +VSBP

2
0.22U_1206_25V7K

0.1U_0603_25V7K

@ PR89
1

8
6.49K_0402_1% @ PD10
1

1
PC69

PC70

PR88 1 2 5 LL4148_LL34-2

P
100K_0402_1% +
O 7 2 1
@ @ TM_REF1 6
2

G
PR90 PU5B
2

1
VL 22K_0402_1% LM393DG_SO8

4
1 2 @ PC71 @ PR91
0.22U_0603_16V7K 22.1K_0402_1%

2
2

PR92
100K_0402_1%

PR93
1

0_0402_5% D
1 2 2 PQ23
39,43 SPOK G 2N7002W-T/R7_SOT323-3
0.1U_0402_16V7K

S
3
1

PC72

@
2

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/06/11 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
401650 D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 41 of 46
A B C D
 5 4 3 2 1

+1.8V

1
PJ12

1
JUMP_43X79

2
D D
PU6

2
1 VIN VCNTL 6 +3VALW
2 GND NC 5

1
1
PC73 3 7 PC74
4.7U_0805_6.3V6K PR94 REFEN NC 1U_0402_6.3V6K

2
1K_0402_1% 4 8
VOUT NC
9

2
GND
RT9173DPSP_SO8

0.1U_0402_16V7K
@PR95
@ PR95 @ PQ24
+0.9VP

1
0_0402_5% 2N7002W-T/R7_SOT323-3 D

PC75
32,37 SYSON# 1 2 2 PR96

1
G 1K_0402_1%

2
1
S PC76

3
@PC77
@ PC77 10U_0805_6.3V6M

2
0.1U_0402_16V7K

PU7
APL5508-25DC-TRL_SOT89-3
C C

+3VS 2 3
IN OUT
+2.5VSP

1
GND

1
PC78
1U_0402_6.3V6K 1 PC79 @ PR98
4.7U_0805_6.3V6K 150_1206_5%

2
+1.8V

+5VALW
1 1

PJ14
JUMP_43X79
1

B PC83 B
1U_0402_6.3V6K
2
2
6

5 PC84
VCNTL

VIN 4.7U_0805_6.3V6K
7 POK
4
2

VOUT
PR101 3
100K_0402_5% VOUT
+1.5VSP
1

28,30,37 SUSP# 1 2 8 EN FB 2
1
GND

9 PR102 PC85
VIN
1

1.54K_0402_1% 0.01U_0402_25V7K
2

PR103 PC86 PC87

1

47K_0402_5% 0.1U_0402_16V7K PU8 22U_0805_6.3V6M

2

APL5915KAI-TRL_SO8
2
1
2

PR104
1.74K_0402_1%
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/06/11 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
401650 D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 42 of 46
5 4 3 2 1
 5 4 3 2 1

PJ15
JUMP_43X118
1.8_51117_B+ 2 2 1 1 B+

5
6
7
8

1
PC88 @ PC204
4.7U_1206_25V6K 680P_0402_50V7K
PR200

2
PR106 0_0603_5%
267K_0402_1% 1 2 4
PR107 1 2 PQ25
0_0402_5% AO4466_SO8
1 2
D 28,30,37 SYSON D

3
2
1
PR108 PC90 PL8
0_0603_5% 0.1U_0603_25V7K 1.8UH_MSCDRI-104A-1R8N-E_9.5A_30%

15

14
1

1
VFB=0.75V @PC89
@PC89
PU9 BST_1.8V 1 2BST_1.8V-1 1 2 1 2 +1.8VP

EN_PSV

TP

VBST
Vo=VFB*(1+PR111/PR112)=0.75*(1+14K/10K)=1.8V 0.1U_0402_16V7K

2
2 13 DH_1.8V
Rton=267K=>Faw=297KHz TON DRVH

1
3 12 LX_1.8V 1
VOUT LL

5
6
7
8
@ PR201
VFB=0.75V 4.7_1206_5% + PC91
4 11 +5VALW

D
D
D
D
V5FILT TRIP 330U_6.3V_M
5 10 PQ26

2
VFB V5DRV FDS6670AS_NL_SO8 2
6 9 DL_1.8V 4 G
PGOOD DRVL

PGND
PR109

GND

1
17.8K_0402_1%
0_0603_5% @ PC171

S
S
S
PR110
1 2 @ PC93 PC92 680P_0402_50V7K
+5VALW 47P_0402_50V8J TPS51117RGYR_QFN14_3.5x3.5 4.7U_0805_10V6K

3
2
1

2
1 2
1

2
PC94
1U_0603_10V6K
2

Cout ESR=15m ohm

Ipeak=11.96A, Imax=8.372A, Iocp=14.352A PR111
14K_0402_1%
Delta I=((19-1.8)*(1.8/19))/(L*Fsw)
1 2
((19-1.8)*(1.8/19))/(1.8u*297000)=3.048A
C =>1/2DeltaI=1.524A C
1

PR112
10K_0402_1%
2

Rtrip=17.8K
Iocp=13.04A~21.41A

PJ16
JUMP_43X118
1.2_51117_B+ 2 2 1 1 B+

5
6
7
8

1
PC95 @ PC205
4.7U_1206_25V6K 680P_0402_50V7K
PR202

2
PR114 0_0603_5%
B 267K_0402_1% PQ27 B
1 2 4
PR115 1 2 AO4466_SO8
0_0402_5%
1 2
39,41 SPOK

3
2
1
PR116 PC97 PL9
0_0603_5% 0.1U_0603_25V7K 1UH_PCMB103E-1R0MS_20A_20%
15

14
1

@PC96
@PC96
PU10 BST_1.2V 1 2BST_1.2V-1 1 2 1 2 +1.2VALWP
EN_PSV

TP

VBST

0.1U_0402_16V7K
2

5
6
7
8

1
2 13 DH_1.2V
TON DRVH @ PR203

D
D
D
D
VFB=0.75V 3 12 LX_1.2V 4.7_1206_5% 1
VOUT LL PQ28
Vo=VFB*(1+PR119/PR120)=0.75*(1+6.04K/10K)=1.203V +
4 VFB=0.75V 11 +5VALW FDS6670AS_NL_SO8 PC98

1 2
Rton=267K=>Fsw=298KHz V5FILT TRIP 330U_D2E_6.3VM_R25M
4 G
5 10 @ PC172
VFB V5DRV 680P_0402_50V7K 2

S
S
S
6 9 DL_1.2V

2
PGOOD DRVL
PGND

PR117
GND

3
2
1
1

1
17.8K_0402_1%

0_0603_5%
PR118

1 2 @ PC100 PC99
+5VALW 47P_0402_50V8J TPS51117RGYR_QFN14_3.5x3.5 4.7U_0805_10V6K
7

1 2
1

PC101
Cout ESR=15m ohm 1U_0603_10V6K
2

A Ipeak=10.80A, Imax=7.56A, Iocp=12.96A A

PR119
Delta I=((19-1.2)*(1.2/19))/(L*Fsw) 6.34K_0402_1%
((19-1.2)*(1.2/19))/(1.8u*298000)=2.10A 1 2
=>1/2DeltaI=1.05A
1

Rtrip=17.8K Security Classification Compal Secret Data Compal Electronics, Inc.

Iocp=12.75A~20.83A PR120 2008/06/11 2009/06/11 Title
10K_0402_1% Issued Date Deciphered Date
SCHEMATIC,MB A4861
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
401650 D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 43 of 46
5 4 3 2 1
 5 4 3 2 1

VR_ON

28
+3VS CPU_VID5 8

PSI_L

8
CPU_VID4 8

2
CPU_VID3 8

0_0402_5%
PL10
PR204 CPU_VID2 8 FBMA-L18-453215-900LMA90T_1812
D D
10K_0402_5% CPU_B+ 1 2
CPU_VID1 8 B+

2200P_0402_50V7K
CPU_VID0 8

0_0402_5%

10U_1206_25V6M

10U_1206_25V6M
1

2
28 VGATE

PR205

5
0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

PC200

PC174

PC175
+ PC201

2
+3VS PQ29 220U_25V_M

1
1

2.2_0603_1%
SI7686DP-T1-E3_SO8

2
2

PR207
PR206
PC176
VCC_PRM 0.22U_0603_25V7K 4

1
2

2
10K_0402_5%

10K_0402_5%

PR211

PR213

PR245

PR214

PR208

PR209

2
PR210

PR212
R212
UG_CPU1

3
2
1
@
@P

1
1000P_0402_50V7K

150K_0402_1%
0.047U_0402_16V7K
PL11
+CPU_CORE

2
1000P_0402_50V7K

36.5K_0402_1%
2 0.36UH_PCMC104T-R36MN1R17_30A_20%

2
6.81K_0402_1%

4.02K_0402_1%
PHASE_CPU1

40

39

38

37

36

35

34

33

32

31
1 2
2
PC178
C178

PR217

PC179

PR215
2

5
6
7
8

5
6
7
8
PR216

PR218

VID4

VID3

VID2

VID1

VID0

BOOT1
PGOOD

PSI_L

VID5
VR_ON
1

10K_0402_1%
PC177

@
@P

2
1_0402_5%
PQ30 PQ31
1

4.7_1206_5%
1 30 AO4456_SO8 AO4456_SO8 PR242
1

SET UGATE1

2
PR221

PR222
3.65K_0805_1%
10K_0402_1%

PR219
2 RBIAS PHASE1 29 4 4

PR220
PC180

1
3 28 LG_CPU1 0.22U_0603_16V7K

1
OFS PGND1
1 2

1
4 27 PR223 0_0402_5%

3
2
1

3
2
1
SOFT LGATE1

680P_0603_50V8J
2 1 CPU_ISEN2
C +5VS C
PR224 PC181 5 26
OCSET PVCC

PC183
97.6K_0402_1% 470P_0402_50V7K 2 1 CPU_ISEN1 VCC_PRM
1 2 1 2 6 25 PC182
PC184 VW PU11 LGATE2 4.7U_0603_6.3V6K Rs

2
220P_0402_50V8J 7 ISL6264CRZ-T_QFN40_6X6 24
COMP PGND2 VSUM
1 2
8 FB PHASE2 23

9 22 UG_CPU2
PR226 VDIFF UGATE2
1K_0402_1% 10 21 2 1
VSEN BOOT2 PR225

DROOP
2 1

ISEN2

ISEN1
VSUM
1000P_0402_50V7K

PR227 PC185 41 2.2_0603_1%

GND

VDD
RTN

DFB
GND PAD
2

2
VIN
255_0402_1% 1000P_0402_50V7K

VO
2

1 2 1 2 @PC186
@ PC186 CPU_B+
PC187
C187

0.068U_0402_16V7K
1

11

12

13

14

15

16

17

18

19

20

2200P_0402_50V7K
1

10U_1206_25V6M

10U_1206_25V6M
@
@P PC188

2
2 1 0.22U_0603_25V7K
8 CPU_VCC_SENSE

PC202

PC190

PC191
CPU_ISEN1
PR228 PC189 PQ32

1
1000P_0402_50V7K

PR229 0_0402_5% 180P_0402_50V8J SI7686DP-T1-E3_SO8

2

10_0402_5% 1 2 CPU_ISEN2
PC192
C192

+CPU_CORE 2 1 PR230 PR231

1K_0402_1% 1.4K_0402_1% 4
1

平行線from output Bulk Cap @

@P 2 1 1 2 +5VS

PR232
10_0402_5% B+

3
2
1
10_0402_5%
1 2

2
Close to Phase1 Choke PL11 PL12
+CPU_CORE
10_0603_5%

PR233
B VCC_PRM 0.36UH_PCMC104T-R36MN1R17_30A_20% B
2

PHASE_CPU2 1 2
10K_0603_5%_TSM1A103J4302RE

PR235

2 1
8 CPU_VSS_SENSE
2

5
6
7
8

5
6
7
8
11K_0402_1%

10K_0402_1%
1
PH3

PR234

2
1_0402_5%
PR236
0.22U_0402_6.3V6K

0_0402_5% PQ33 PQ34

1
0.022U_0402_16V7K
0.22U_0402_6.3V6K

AO4456_SO8 AO4456_SO8 PR243

2

2
PC193

PR239

PR240
4.7_1206_5%

3.65K_0805_1%
10K_0402_1%
1

1
PC194

PC195

1U_0402_6.3V6K

Rn=(PR241+PH3)//(PR236)=5.875k, Rseuq=Rs/2=1.825K 4 4

PR237

PR238
0.01U_0402_50V7K

Vdcrequ=Io*(DCR/2), PC198
1

1
2

1
PC197
2.61K_0402_1%

0.22U_0603_16V7K
Vn=Vdcrequ*(Rn/(Rsequ+Rn))
2
PC196

1 2

1
=Io*(DCR/2)*(Rn/(Rsequ+Rn))
PR241

CPU_ISEN1
2

3
2
1

3
2
1
=Io*(DCR/2)*G1
1

680P_0603_50V8J
LG_CPU2
1

PC199
CPU_ISEN2 VCC_PRM
Vdroop=Vn/Rdroop1*(Rdroop1+Rdroop2)
=Vn*(1+(Rdroop2/Rdroop1)) VSUM

2
=Vn*(1+(PR231/PR230))
=Vn*G2 Rn VSUM

=>Vdroop=Vn*(1+(PR231/PR230))=Io*Rdroop
=>Io*(DCR/2)*G1*G2=Io*Rdroop
=>Rdroop=1.007m ohm

Iocp_min*Rdroop>Rocset*10uA
=>25A*1.007m ohm>Rocset*10uA
=>choose Rocset=2.74K
=>Iocp_min*1.007m ohm>2.74K*10u
A A
=Iocp_min>27.209A

Iocp_max*Rdroop>Rocset*10.4uA
=>Icop_max>28.297A

Iocp=~27.209A~28.297A
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/06/11 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 401650
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 44 of 46
5 4 3 2 1
 5 4 3 2 1

Version change list (P.I.R. List) Page 1 of 1

for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase

D Customer changed CPU to TF36/38. TF36/38 is 31W CPU, must change MOS to 1H2L. Add PQ31 and PQ34 SB000009F80( S TR AO4456 1N SO8) D

1 0.1 44 08, 11/13 to DVT

Change CP OCP setting. TF36/38 CPU OCP setting change.

2 0.1 44 Change PR198 to SD034402180(S RES 1/16W 4.02K 0402 1%)08, 11/13 to DVT

Because APL5915 has 0.4V enable voltage, so add

S3 Mode issue. PR103 to pull down enable voltage when system in Add PR103 SD028470280( S RES 1/16W 47K 0402 5%)
3 S3 mode
0.1 42 08, 11/13 to DVT

4 AMD issue. AMD request add 1.2V to 1.22V for chipset. 0.1 43 Change PR119 from SD034604180 to SD034634180. 08, 11/17 to DVT

5 EMI issue. EMI request add charger snubber. 0.1 40

Add PR48 SD001470B80(S RES 1/4W 4.7 +-5% 1206)
08, 11/17 to DVT
Add PC50 SE074681K80(S CER CAP 680P 50V K X7R 0402)

Change PC201 from SF000000G80(S ELE CAP 220U 25V M

6 Cost issue. Cost issue. 0.1 44 HA0 MVY) to SF22004M210(S ELE CAP 220U 25V M 08, 11/17 to DVT
8X10.2 CE-AX)

7
C C

Support charge voltage. Support charge voltage. 0.1 40 Delete PQ18 SB000006800(S TR 2N7002W T/R7 1N SOT-323) 08, 11/26 to DVT

8 Support charge voltage. Support charge voltage. 0.1 40 Delete PQ16 SB923010020(S TR SI2301BDS-T1-E3 1P SOT23)08, 11/26 to DVT

9 Support charge voltage. Support charge voltage. 0.1 40 Delete PR66 SD028000080(S RES 1/16W 0 0402 5%) 08, 11/26 to DVT

10 Support charge voltage. Support charge voltage. 0.1 40 Delete PR69 SD034100380(S RES 1/16W 100K 0402 1%) 08, 11/26 to DVT

Delete PC63 SE074102K80(S CER CAP 1000P 50V K X7R 0402)

11 Support charge voltage. Support charge voltage. 0.1 40 08, 11/26 to DVT

B 12 Support charge voltage. Support charge voltage. 0.1 40 Add PR70 SD034210380(S RES 1/16W 210K 0402 1%)
08, 11/26 to DVT
B

Support charge voltage. Support charge voltage. 0.1 40

13 Add PR71 SD034499380(S RES 1/16W 499K 0402 1%) 08, 11/26 to DVT

14

15

16

17

18
A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/06/11 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 401650
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 45 of 46
5 4 3 2 1
 5 4 3 2 1

Version change list (P.I.R. List) for HW

Item Reason for change Modify List Rev. PG# Item Reason for change Modify List Rev. PG#
1 Material Change Change U1 to APL5607 DVT P06 26 Material Change
Change U82 to
(SA00002CI20)
ALC272X-GR
PVT P35

2 27 Change U27 to KB926QFD3

D D
Material Change Change U85 to AR8132 DVT P25 Material Change (SA00001J580) PVT P28

3 8132 issue, OS
black screen
Change L90 to R546
(0_0805) DVT P25 28 Material Change
Change U85 to
(SA000034V00)
AR8132M-AL1E
PVT P25

4 Circuit issue Add R677 DVT P32 29 Material Change

Change U85 to
(SA000036Y00)
AR8132-AL1E
Pre-PVT P25

5 RT5159 ID issue Pop R680 to 0_0402_5% DVT P27 30 BOM change Del D13,D4 Pre-PVT P06

6 [EMI] Camera
co-layout choke
Change R759,R760 to 0_0402
Reserve L77 DVT P24 31 ESD Cost down
Del D16,D39,D40
Pre-PVT

7 [Cost Down] audio LDO

Reserve U81
Pop784 DVT P35 32 ESD Cost down Change D15 to SCA00000200 Pre-PVT

8 RT5159 unkow issue Reserve R548, pop R547 DVT P27 33 BOM change Change R251,R253 to 1K Pre-PVT

9 [ESD] Pop D39,D40 DVT P36

10 [ESD] Pop D14,D15 DVT P36

11 [ESD] Pop D16 DVT P29

C C

12 [EMI] Reserve C859 for EMI DVT P27

13 Modify PWR Sequence

Reserve R104,R108
Pop R658,R652 DVT
P34
P28

14 [EMI] Reserve C861 for EMI DVT P16

15 Material Change Change JRJ1 type DVT P26

16 Material Change
Change C924,C971 to
3900pF_0402 DVT P36

17 [EMI]
Reserve
C350,C352,C353,C354 DVT P15

18 [EMI]
Pop R673 to 10ohm_0402
Pop C858 to 10pF_0402 PVT P27

19 [EMI] Pop C859 to 0.1uF_0402 PVT P27

20 [EMI]
Pop C350,C352,C353,C354 to
0.1uF_0402 PVT P15
B 21 Material Change
Change R251,R253 to 1.1Kohm
Change R250,R252 to 1.2Kohm PVT P34 B

22 Material Change
Change Y2 footprint to
correct PVT P18

23 Material Change
Only cChange R810,R807 P/N
to SM010012010 PVT P36

24 Circuit Change
Reserve PWN FAN function.
Add R247,R40,JP38 PVT P06

25 Material Change
Change R814,R815 to
56.2ohm_0402 PVT P36

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/03/08 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Tuesday, April 14, 2009 Sheet 46 of 46
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