Tailoring the ALU to the MIPS

• Need to support the set-on-less-than instruction (slt)

– remember: slt is an arithmetic instruction
– produces a 1 if rs < rt and 0 otherwise
– use subtraction: (a-b) < 0 implies a < b
• Need to support test for equality (beq $t5, $t6, $t7)
– use subtraction: (a-b) = 0 implies a = b

1998 Morgan Kaufmann Publishers 78

Supporting slt Binvert Operation

CarryIn

a
0

• Can we figure out the idea?

1

Result
b 0 2

Less 3

a. CarryOut

Binvert Operation
CarryIn

a
0

Result
b 0 2

Less 3

Set

Overflowı
Overflow
detection
b.
 Binvert CarryIn Operation

a0 CarryIn
b0 ALU0 Result0
Less
CarryOut

a1 CarryIn
b1 ALU1 Result1
0 Less
CarryOut

a2 CarryIn
b2 ALU2 Result2
0 Less
CarryOut

CarryIn

a31 CarryIn Result31

b31 ALU31 Set
0 Less Overflow

1998 Morgan Kaufmann Publishers 80

Test for equality

Bnegate Operation
• Notice control lines:
a0 CarryIn Result0
b0 ALU0
000 = and Less
CarryOut
001 = or
010 = add
a1 CarryIn
110 = subtract b1 ALU1
Result1

0 Less
111 = slt CarryOut Zero

a2 CarryIn Result2
b2 ALU2
0 Less
CarryOut

•Note: zero is a 1 when the result is zero!

Result31
a31 CarryIn
b31 ALU31 Set
0 Less Overflow

1998 Morgan Kaufmann Publishers 81

Conclusion

• We can build an ALU to support the MIPS instruction set

– key idea: use multiplexor to select the output we want
– we can efficiently perform subtraction using two’s complement
– we can replicate a 1-bit ALU to produce a 32-bit ALU
• Important points about hardware
– all of the gates are always working
– the speed of a gate is affected by the number of inputs to the gate
– the speed of a circuit is affected by the number of gates in series
(on the “critical path” or the “deepest level of logic”)
• Our primary focus: comprehension, however,
– Clever changes to organization can improve performance
(similar to using better algorithms in software)
– we’ll look at two examples for addition and multiplication

1998 Morgan Kaufmann Publishers 82

Problem: ripple carry adder is slow

• Is a 32-bit ALU as fast as a 1-bit ALU?

• Is there more than one way to do addition?
– two extremes: ripple carry and sum-of-products

Can you see the ripple? How could you get rid of it?

c1 = b0c0 + a0c0 + a0b0

c2 = b1c1 + a1c1 + a1b1 c2 =
c3 = b2c2 + a2c2 + a2b2 c3 =
c4 = b3c3 + a3c3 + a3b3 c4 =

Not feasible! Why?

1998 Morgan Kaufmann Publishers 83

Carry-lookahead adder

• An approach in-between our two extremes

• Motivation:
– If we didn’t know the value of carry-in, what could we do?
– When would we always generate a carry? gi = ai bi
– When would we propagate the carry? pi = ai + bi
• Did we get rid of the ripple?

c1 = g0 + p0c0
c2 = g1 + p1c1 c2 =
c3 = g2 + p2c2 c3 =
c4 = g3 + p3c3 c4 =

Feasible! Why?

1998 Morgan Kaufmann Publishers 84

Use principle to build bigger adders

CarryIn

a0ı CarryIn
b0ı Result0--3
a1ı
b1ı ALU0
a2ı pi
b2ı P0
G0 gi
a3ı
b3 Carry-lookahead unit
C1
ci + 1

a4ı CarryIn
b4ı Result4--7
a5ı
b5ı
a6ı
ALU1
P1 pi + 1
• Can’t build a 16 bit adder this way... (too big)
b6ı G1 gi + 1
a7ı
b7
• Could use ripple carry of 4-bit CLA adders
C2
ci + 2
• Better: use the CLA principle again!
a8ı CarryIn
b8ı Result8--11
a9ı
b9ı ALU2
a10ı P2 pi + 2
b10ı G2 gi + 2
a11ı
b11
C3
ci + 3

a12ı CarryIn
b12ı Result12--15
a13ı
b13ı ALU3
a14ı P3 pi + 3
b14ı G3 gi + 3
a15ı C4
b15 ci + 4

CarryOut

1998 Morgan Kaufmann Publishers 85