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PCS-902

Line Distance Relay


Instruction Manual

NR Electric Co., Ltd.


Preface

Preface

Introduction
This guide and the relevant operating or service manual documentation for the equipment provide
full information on safe handling, commissioning and testing of this equipment.

Documentation for equipment ordered from NR is dispatched separately from manufactured goods
and may not be received at the same time. Therefore, this guide is provided to ensure that printed
information normally present on equipment is fully understood by the recipient.

Before carrying out any work on the equipment, the user should be familiar with the contents of
this manual, and read relevant chapter carefully.

This chapter describes the safety precautions recommended when using the equipment. Before
installing and using the equipment, this chapter must be thoroughly read and understood.

Health and Safety


The information in this chapter of the equipment documentation is intended to ensure that
equipment is properly installed and handled in order to maintain it in a safe condition.

When electrical equipment is in operation, dangerous voltages will be present in certain parts of
the equipment. Failure to observe warning notices, incorrect use, or improper use may endanger
personnel and equipment and cause personal injury or physical damage.

Before working in the terminal strip area, the equipment must be isolated.

Proper and safe operation of the equipment depends on appropriate shipping and handling,
proper storage, installation and commissioning, and on careful operation, maintenance and
servicing. For this reason, only qualified personnel may work on or operate the equipment.

Qualified personnel are individuals who:

 Are familiar with the installation, commissioning, and operation of the equipment and of the
system to which it is being connected;

 Are able to safely perform switching operations in accordance with accepted safety
engineering practices and are authorized to energize and de-energize equipment and to
isolate, ground, and label it;

 Are trained in the care and use of safety apparatus in accordance with safety engineering
practices;

 Are trained in emergency procedures (first aid).

Instructions and Warnings


The following indicators and standard definitions are used:

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Preface

DANGER!

It means that death, severe personal injury, or considerable equipment damage will occur if safety
precautions are disregarded.

WARNING!

It means that death, severe personal, or considerable equipment damage could occur if safety
precautions are disregarded.

CAUTION!

It means that light personal injury or equipment damage may occur if safety precautions are
disregarded. This particularly applies to damage to the device and to resulting damage of the
protected equipment.

WARNING!

The firmware may be upgraded to add new features or enhance/modify existing features, please
make sure that the version of this manual is compatible with the product in your hand.

WARNING!

During operation of electrical equipment, certain parts of these devices are under high voltage.
Severe personal injury or significant equipment damage could result from improper behavior.

Only qualified personnel should work on this equipment or in the vicinity of this equipment. These
personnel must be familiar with all warnings and service procedures described in this manual, as
well as safety regulations.

In particular, the general facility and safety regulations for work with high-voltage equipment must
be observed. Noncompliance may result in death, injury, or significant equipment damage.

DANGER!

Never allow the current transformer (CT) secondary circuit connected to this equipment to be
opened while the primary system is live. Opening the CT circuit will produce a dangerously high
voltage.

WARNING!

 Exposed terminals

Do not touch the exposed terminals of this equipment while the power is on, as the high voltage
generated is dangerous

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Preface

 Residual voltage

Hazardous voltage can be present in the DC circuit just after switching off the DC power supply. It
takes a few seconds for the voltage to discharge.

CAUTION!

 Earth

The earthing terminal of the equipment must be securely earthed

 Operating environment

The equipment must only be used within the range of ambient environment detailed in the
specification and in an environment free of abnormal vibration.

 Ratings

Before applying AC voltage and current or the DC power supply to the equipment, check that they
conform to the equipment ratings.

 Printed circuit board

Do not attach and remove printed circuit boards when DC power supply to the equipment is on, as
this may cause the equipment to malfunction.

 External circuit

When connecting the output contacts of the equipment to an external circuit, carefully check the
supply voltage used in order to prevent the connected circuit from overheating.

 Connection cable

Carefully handle the connection cable without applying excessive force.

Copyright © 2015 NR. All rights reserved.

We reserve all rights to this document and to the information contained herein. Improper use in particular reproduction and dissemination
to third parties is strictly forbidden except where expressly authorized.

The information in this manual is carefully checked periodically, and necessary corrections will be included in future editions. If
nevertheless any errors are detected, suggestions for correction or improvement are greatly appreciated.

We reserve the rights to make technical improvements without notice.

NR ELECTRIC CO., LTD. Tel: +86-25-87178888


Headquarters: 69, Suyuan Avenue, Jiangning, Nanjing 211102, China Fax: +86-25-87178999
Manufactory: 18, Xinfeng Road, Jiangning, Nanjing 211111, China Website: www.nrelect.com, www.nrec.com

P/N: Version: B1.00

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Preface

Documentation Structure

The manual provides a functional and technical description of this relay and a comprehensive set
of instructions for the relay’s use and application.

All contents provided by this manual are summarized as below:

1 Introduction
Briefly introduce the application, functions and features about this device.

2 Technical Data
Introduce the technical data about this relay, such as electrical specifications, mechanical
specifications, ambient temperature and humidity range, communication port parameters, type
tests, setting ranges and accuracy limits and the certifications that our products have passed.

3 Operation Theory
Introduce a comprehensive and detailed functional description of all protective elements.

4 Supervision
Introduce the automatic self-supervision function of this device.

5 Management
Introduce the management function (measurement and recording) of this device.

6 Hardware
Introduce the main function carried out by each plug-in module of this device and providing the
definition of pins of each plug-in module.

7 Settings
List settings including system settings, communication settings, label settings, logic links and etc.,
and some notes about the setting application.

8 Human Machine Interface


Introduce the hardware of the human machine interface (HMI) module and a detailed guide for the
user how to use this relay through HMI. It also lists all the information which can be view through
HMI, such as settings, measurements, all kinds of reports etc.

9 Configurable Function
Introduce configurable function of the device and all configurable signals are listed.

10 Communication
Introduce the communication port and protocol which this relay can support, IEC60970-5-103,
IEC61850 and DNP3.0 protocols are introduced in details.

11 Installation
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Introduce the recommendations on unpacking, handling, inspection and storage of this relay. A
guide to the mechanical and electrical installation of this relay is also provided, incorporating
earthing recommendations. A typical wiring connection to this relay is indicated.

12 Commissioning
Introduce how to commission this relay, comprising checks on the calibration and functionality of
this device.

13 Maintenance
A general maintenance policy for this device is outlined.

14 Decommissioning and Disposal


A general decommissioning and disposal policy for this relay is outlined.

15 Manual Version History


List the instruction manual version and the modification history records.

Typographic and Graphical Conventions

Deviations may be permitted in drawings and tables when the type of designator can be obviously
derived from the illustration.

The following symbols are used in drawings:

&

AND gate

≥1

OR gate

Comparator

BI
Binary signal via opto-coupler

SET I>
Input signal from comparator with setting

EN
Input signal of logic setting for function enabling

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Preface

SIG
Input of binary signal except those signals via opto-coupler

XXX
Output signal

Timer
t
t
Timer (optional definite-time or inverse-time characteristic)

10ms 0ms
Timer [delay pickup (10ms), delay dropoff (0ms), non-settable]
[XXX] 0ms
Timer (delay pickup, settable)
0ms [XXX]
Timer (delay dropoff, settable)
[XXX] [XXX]
Timer (delay pickup, delay dropoff, settable)
IDMT
Timer (inverse-time characteristic)

---xxx is the symbol

Symbol Corresponding Relationship

Basic Example
A, B, C L1, L2, L3 Ia, Ib, Ic, I0 IL1, IL2, IL3, IN
AN, BN, CN L1N, L2N, L3N Ua, Ub, Uc VL1, VL2, VL3
ABC L123 Uab, Ubc, Uca VL12, VL23, VL31
U (voltage) V U0, U1, U2 VN, V1, V2

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1 Introduction

1 Introduction

Table of Contents
1 Introduction ...................................................................................... 1-a
1.1 Application....................................................................................................... 1-1
1.2 Function ........................................................................................................... 1-4
1.3 Features ........................................................................................................... 1-7

List of Figures
Figure 1.1-1 Typical application of PCS-902 for single circuit breaker .................................1-1

Figure 1.1-2 Typical application of PCS-902 for double circuit breakers ..............................1-2

Figure 1.1-3 Functional diagram of PCS-902...........................................................................1-3

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1 Introduction

1.1 Application
PCS-902 is a digital line distance protection with the main and back-up protection functions, which
is designed for overhead line or cables and hybrid transmission lines of various voltage levels.

52 52

PCS-902 Optical fibre channel or PLC channel PCS-902

Communication channel via direct dedicated fibre, MUX or PLC

Figure 1.1-1 Typical application of PCS-902 for single circuit breaker

In the case of main protection, PCS-902 provides dual-channels pilot distance protection (PUTT,
POTT, blocking and unblocking) and pilot directional earth-fault protection (selectable for
independent communication channel or sharing channel with POTT), which can clear any internal
fault instantaneously for the whole line with the aid of protection signal. Deviation of power
frequency component (DPFC) distance protection with fixed forward direction can perform
extremely high speed operation for close-up faults. There is direct transfer trip (DTT) feature
incorporated in the device.

PCS-902 also includes distance protection (1 forward zones and 4 settable forward or reverse
zone distance protection with selectable mho or quadrilateral characteristic, dedicated pilot
distance zone for pilot distance protection), 4 stages directional earth fault protection, 4 stages
directional phase overcurrent protection, 3 stages voltage protection (under/over voltage
protection), 1 stage negative-sequence overvoltage protection, 4 stages frequency protection
(under/over frequency protection), broken conductor protection, reverse power protection, pole
discrepancy protection, breaker failure protection, thermal overload protection, and dead zone
protection etc. Morever, a backup overcurrent and earth fault protection will be automatically
enabled when VT circuit fails.

In addition, stub overcurrent protection is provided for one and a half breakers arrangement when
transmission line is put into maintenance.

PCS-902 can be configured to support single circuit breaker application or double circuit breakers
application by PCS-Explorer. If the device is applied to double circuit breakers mode, all protection
functions related to the number of circuit breaker will be affected, including circuit breaker position
supervision, breaker failure protection, dead zone protection, pole discrepancy protection,
synchrocheck, automatic reclosure, trip logic, CT circuit supervision.

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1 Introduction

Bus1
Single-phase
voltage

52
PCS-902 Line 1
Three-phase
voltage

52
Line 2
Single-phase
voltage

52

Bus2

Figure 1.1-2 Typical application of PCS-902 for double circuit breakers

PCS-902 has selectable mode of single-phase tripping or three-phase tripping and configurable
auto-reclosing mode for 1-pole, 3-poles and 1/3-pole operation.

PCS-902 with appropriate selection of integrated protection functions can be applied for various
voltage levels and primary equipment such as cables, overhead lines, interconnectors and
transformer feeder, etc. It also supports configurable binary inputs, binary outputs, LEDs and IEC
61850 protocol.

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1 Introduction

BUS

52

81

85 21D 21 50/51P 50/51G 50GVT 50PVT 50BF 49 46BC 32R 62PD FR


59Q

FL 59P

Data Transmitt/Receive

27P
50DZ 50STB (Only for one and a half breakers arrangement)

SOTF 25 79

LINE

Figure 1.1-3 Functional diagram of PCS-902

No. Function ANSI


1 Pilot protection 85
2 DPFC distance protection 21D
3 Distance protection 21
4 Phase overcurrent protection 50/51P
5 Earth fault protection 50/51G
6 Overvoltage protection 59P
7 Undervoltage protection 27P
8 Negative-sequence overvoltage protection 59Q
9 Frequency protection 81
10 Broken conductor protection 46BC
11 Reverse power protection 32R
12 Breaker failure protection 50BF
13 Thermal overload protection 49
14 Stub overcurrent protection 50STB
15 Dead zone protection 50DZ
16 Pole discrepancy protection 62PD
17 Switch onto fault SOTF
18 Phase overcurrent protection when VT circuit failure 50PVT
19 Earth fault protection when VT circuit failure 50GVT
20 Synchronism check 25
21 Automatic reclosure 79
22 Fault recorder FR
23 Fault location FL

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1 Introduction

1.2 Function
1. Protection Function

 Distance protection (including eight zones)

 One zone DPFC distance protection with fixed forward direction

 One zone distance protection with fixed forward direction (including phase-to-ground and
phase-to-phase, mho or quadrilateral characteristic)

 One zone pilot distance protection with fixed forward direction (including phase-to-ground
and phase-to-phase, mho or quadrilateral characteristic)

 One zone pilot distance protection with fixed reverse direction (including phase-to-ground
and phase-to-phase, mho or quadrilateral characteristic)

 Four zones distance protection with settable forward or reverse direction (including
phase-to-ground and phase-to-phase, mho or quadrilateral characteristic)

 Load encroachment for mho and quadrilateral characteristic distance element

 Power swing blocking releasing, selectable for each of above mentioned zones

 Overcurrent protection

 Four stages phase overcurrent protection, selectable time characteristic (definite-time or


inverse-time) and directionality (forward direction, reverse direction or non-directional)

 Four stages directional earth fault protection, selectable time characteristic (definite-time
or inverse-time) and directionality (forward direction, reverse direction or non-directional)

 Breaker failure protection

 Optional instantaneously re-tripping

 One stage with two delay timers

 Thermal overload protection

 Stub overcurrent protection

 Dead zone protection

 Pole discrepancy protection

 Broken conductor protection

 Reverse power protection

 Switch onto fault (SOTF)

 Via distance measurement elements

 Via dedicated earth fault element

 Backup protection when VT circuit failure

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 Phase overcurrent protection when VT circuit failure

 Earth fault protection when VT circuit failure

 Voltage protection

 Three stages overvoltage protection

 Three stages undervoltage protection

 One stage negative-sequence overvoltage protection

 Frequency protection

 Four stages overfrequency protection

 Four stages underfrequency protection

 df/dt block criterion for underfrequency protection

 Control function

 Synchro-checking

 Automatic reclosure (single shot or multi-shot (max. 4) for 1-pole AR and 3-pole AR)

 Pilot scheme logic

 Phase-segregated communication logic of distance protection

 Weak infeed logic of pilot distance protection

 Weak infeed logic of pilot directional earth fault protection

 Communication scheme of optical pilot channel (Optional)

 Direct optical link

 Connection to a communication network, support G.703 and C37.94 protocol

 Dual-channels redundancy

2. Measurement and control function

 Remote control (open and closing)

 Synchronism check for remote and manual closing (only for one circuit breaker)

 Energy metering (active and reactive energy are calculated in import respectively export
direction)

3. Logic

 User programmable logic

4. Additional function

 Fault location

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1 Introduction

 Fault phase selection

 Parallel line compensation for fault location

 VT circuit supervision

 CT circuit supervision

 Self diagnostic

 DC power supply supervision

 Event Recorder including 1024 disturbance records, 1024 binary events, 1024 supervision
events, 256 control logs and 1024 device logs.

 Disturbance recorder including 32 disturbance records with waveforms (The file format of
disturbance recorder is compatible with international COMTRADE file.)

 Four kinds of clock synchronization methods

 Conventional

 PPS (RS-485): Pulse per second (PPS) via RS-485 differential level

 IRIG-B (RS-485): IRIG-B via RS-485 differential level

 PPM (DIN): Pulse per minute (PPM) via the optical coupler

 PPS (DIN): Pulse per second (PPS) via the optical coupler

 SAS

 SNTP (PTP): Unicast (point-to-point) SNTP mode via Ethernet network

 SNTP (BC): Broadcast SNTP mode via Ethernet network

 Message (IEC103): Clock messages through IEC103 protocol

 Advanced

 IEEE1588: Clock message via IEEE1588

 IRIG-B (Fiber): IRIG-B via optical-fibre interface

 PPS (Fiber): Pulse per second (PPS) via optical-fibre interface

 NoTimeSync

5. Monitoring

 Number of circuit breaker operation (single-phase tripping, three-phase tripping and


reclosing)

 Channel status

 Frequency

6. Communication

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 Optional 2 RS-485 communication rear ports conform to IEC 60870-5-103 protocol

 1 RS-485 communication rear ports for clock synchronization

 Optional 2 or 4 Ethernet ports (depend on the chosen type of MON plug-in module) conform
to IEC 61850 protocol, DNP3.0 protocol or IEC 60870-5-103 protocol over TCP/IP

 Optional 2 Ethernet ports via optic fiber (ST interface) conform to IEC 61850 protocol, DNP3.0
protocol or IEC 60870-5-103 protocol over TCP/IP

 GOOSE and SV communication function (optional NET-DSP plug-in module)

7. User Interface

 Friendly HMI interface with LCD and 9-button keypad on the front panel.

 1 front multiplex RJ45 port for testing and setting

 1 RS-232 or RS-485 rear ports for printer

 Language switchover—English+ selected language

 Auxiliary software—PCS-Explorer

1.3 Features
 The intelligent device integrated with protection, control and monitor provides powerful
protection function, flexible protection configuration, user programmable logic and
configurable binary input and binary output, which can meet with various application
requirements.

 High-performance hardware platform and modularized design, fault detector DSP+protection


DSP. Fault detector DSP manages fault detector and protection DSP manages protection
calucation. Their data acquisition system is completely independent in electronic circuit. DC
power supply of output relay is controlled by the operation of fault detector element, which
prevents maloperation due to error from ADC or damage of any apparatus.

 Fast fault clearance for faults within the protected line, the operating time is less than 10 ms
for close-up faults, less than 15ms for faults in the middle of protected line and less than 25ms
for remote end faults.

 The unique DPFC distance element integrated in the protective device provides extremely
high speed operation and insensitive to power swing.

 Self-adaptive floating threshold which only reflects deviation of power frequency component
improves the protection sensitivity and stability under the condition of load fluctuation and
system disturbance.

 Advanced and reliable power swing blocking releasing feature which ensure distance
protection operate correctly for internal fault during power swing and prevent distance
protection from maloperation during power swing

 Flexible automatic reclosure supports various initiation modes and check modes

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 Multiple setting groups with password protection and setting value saved permanently before
modification

 Powerful PC tool software can fulfill protection function configuration, modify setting and
waveform analysis.

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2 Technical Data

2 Technical Data

Table of Contents
2 Technical Data .................................................................................. 2-a
2.1 Electrical Specifications ................................................................................. 2-1
2.1.1 AC Current Input ................................................................................................................ 2-1

2.1.2 AC Voltage Input ................................................................................................................ 2-1

2.1.3 Power Supply ..................................................................................................................... 2-1

2.1.4 Binary Input ........................................................................................................................ 2-1

2.1.5 Binary Output ..................................................................................................................... 2-2

2.2 Mechanical Specifications ............................................................................. 2-3


2.3 Ambient Temperature and Humidity Range .................................................. 2-3
2.4 Communication Port ....................................................................................... 2-3
2.4.1 EIA-485 Port ...................................................................................................................... 2-3

2.4.2 Ethernet Port ...................................................................................................................... 2-3

2.4.3 Optical Fibre Port ............................................................................................................... 2-4

2.4.4 Print Port ............................................................................................................................ 2-5

2.4.5 Clock Synchronization Port ................................................................................................ 2-5

2.5 Type Tests ........................................................................................................ 2-5


2.5.1 Environmental Tests ........................................................................................................... 2-5

2.5.2 Mechanical Tests................................................................................................................ 2-5

2.5.3 Electrical Tests ................................................................................................................... 2-5

2.5.4 Electromagnetic Compatibility ............................................................................................ 2-5

2.6 Certifications ................................................................................................... 2-6


2.7 Terminals ......................................................................................................... 2-7
2.8 Measurement Scope and Accuracy ............................................................... 2-7
2.9 Management Function .................................................................................... 2-7
2.9.1 Control Performance .......................................................................................................... 2-7

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2.9.2 Clock Performance ............................................................................................................ 2-7

2.9.3 Fault and Disturbance Recording....................................................................................... 2-8

2.9.4 Binary Input Signal ............................................................................................................. 2-8

2.10 Protective Functions..................................................................................... 2-8


2.10.1 Fault Detector .................................................................................................................. 2-8

2.10.2 Distance Protection .......................................................................................................... 2-8

2.10.3 Phase Overcurrent Protection .......................................................................................... 2-8

2.10.4 Earth Fault Protection ...................................................................................................... 2-8

2.10.5 Overvoltage Protection..................................................................................................... 2-9

2.10.6 Undervoltage Protection................................................................................................... 2-9

2.10.7 Negative-sequence Overvoltage Protection ..................................................................... 2-9

2.10.8 Overfrequency Protection ................................................................................................ 2-9

2.10.9 Underfrequency Protection .............................................................................................. 2-9

2.10.10 Breaker Failure Protection ........................................................................................... 2-10

2.10.11 Thermal Overload Protection ....................................................................................... 2-10

2.10.12 Stub Overcurrent Protection ......................................................................................... 2-10

2.10.13 Dead Zone Protection .................................................................................................. 2-10

2.10.14 Pole Discrepancy Protection ........................................................................................ 2-10

2.10.15 Broken Conductor Protection ....................................................................................... 2-11

2.10.16 Reverse Power Protection ........................................................................................... 2-11

2.10.17 Auto-reclosing .............................................................................................................. 2-11

2.10.18 Transient Overreach .................................................................................................... 2-11

2.10.19 Fault Locator ................................................................................................................ 2-11

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2 Technical Data

2.1 Electrical Specifications


2.1.1 AC Current Input
Phase rotation ABC
Nominal frequency (fn) 50Hz, 60Hz
Rated current (In) 1A 5A
0.05In~40In (It should measure current without beyond full scale
Linear to
against 20 times of related current and value of DC offset by 100%.)
Thermal withstand
-continuously 4In
-for 10s 30In
-for 1s 100In
-for half a cycle 250In
Burden < 0.15VA/phase @In < 0.25VA/phase @In
Number Up to 7 current input according to various applications

2.1.2 AC Voltage Input


Phase rotation ABC
Nominal frequency (fn) 50Hz, 60Hz
Rated voltage (Un) 100V~130V
Linear to 1V~170V
Thermal withstand
-continuously 200V
-10s 260V
-1s 300V
Burden at rated < 0.20VA/phase @Un
Number Up to 6 voltage input according to various applications

2.1.3 Power Supply


Standard IEC 60255-11:2008
Rated voltage 110Vdc/125Vdc/220Vdc/250Vdc
Permissible voltage range 88~300Vdc
Permissible AC ripple voltage ≤15% of the nominal auxiliary voltage
Burden
Quiescent condition <30W
Operating condition <35W

2.1.4 Binary Input


Rated voltage 24Vdc 48Vdc
Rated current drain 1.2mA 2.4mA
On value 16.8-28.8Vdc 33.6-57.6Vdc
Off value <12Vdc <24Vdc

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Maximum permissible voltage 100Vdc


Withstand voltage 2000Vac, 2800Vdc (continuously )
Response time for logic input ≤1ms
Number Up to 54 binary input according to various hardware configurations

Rated voltage 110Vdc 125Vdc 220Vdc 250Vdc


Rated current drain 1.1mA 1.25mA 2.2mA 2.5mA
On value 77-132Vdc 87.5-150Vdc 154-264Vdc 175-300Vdc
Off value <55Vdc <62.5Vdc <110Vdc <125Vdc
Maximum permissible voltage 300Vdc
Withstand voltage 2000Vac, 2800Vdc (continuously )
Response time for logic input ≤1ms
Number Up to 54 binary input according to various hardware configurations

2.1.5 Binary Output


1. Tripping/signaling contact

Output mode Potential free contact


Maximal system voltage 380Vac, 250Vdc
Continuous carry 8A
Pickup time (Typical) <8ms (3ms)
Dropoff time <5ms
0.65A@48Vdc
0.35A@110Vdc
Breaking capacity (L/R=40ms) 0.30A@125Vdc
0.20A@220Vdc
0.15A@250Vdc
12A@3s
18A@1s
Short duration current
24A@0.5s
40A@0.2s
Durability (Loaded contact) 10000 operations
Number Up to 55 binary output according to various hardware configurations

2. Fast signaling contact

Output mode Potential free contact


Maximal system voltage 380Vac, 250Vdc
Continuous carry 5A
Pickup time <1ms
Dropoff time <5ms
0.65A@48Vdc
0.35A@110Vdc
Breaking capacity (L/R=0ms)
0.30A@125Vdc
0.20A@220Vdc

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2 Technical Data

0.15A@250Vdc
8A@3s
12A@1s
Short duration current
16A@0.5s
30A@0.2s
Durability (Loaded contact) 10000 operations
Number Up to 20 binary output according to various hardware configurations

2.2 Mechanical Specifications


Mounting Way Flush mounted
Chassis color Silver grey
Weight per device Approx. 15kg
Chassis material Aluminum alloy
Location of terminal Rear panel of the device
Device structure Plug-in modular type @ rear side, integrated frontplate
Protection class
Standard IEC 60255-1:2009
Front side IP40
Other sides IP30
Rear side, connection terminals IP20

2.3 Ambient Temperature and Humidity Range


Standard IEC 60255-1:2009
Operating temperature -40°C to +70°C (Readability of display may be impaired below -20°C)
Transport and storage temperature
-40°C to +70°C
range
Permissible humidity 5%-95%, without condensation
Pollution degree Ⅱ
Altitude <3000m

2.4 Communication Port


2.4.1 EIA-485 Port
Baud rate 4.8kbit/s, 9.6kbit/s, 19.2kbit/s, 38.4kbit/s, 57.6kbit/s, 115.2kbit/s
Protocol IEC 60870-5-103:1997
Maximal capacity 32
Transmission distance <500m
Safety level Isolation to ELV level
Twisted pair Screened twisted pair cable

2.4.2 Ethernet Port


Connector type RJ-45 ST (Multi mode)

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2 Technical Data

Transmission rate 100Mbits/s


Transmission standard 100Base-TX 100Base-FX
Transmission distance <100m <2km (1310nm)
Protocol IEC 60870-5-103:1997, DNP 3.0 or IEC 61850
Safety level Isolation to ELV level

2.4.3 Optical Fibre Port


2.4.3.1 For Station Level

Characteristic Glass optical fiber


Connector type ST
Fibre type Multi mode
Transmission distance <2km
Wave length 1310nm
Transmission power Min. -20.0dBm
Minimum receiving power Min. -30.0dBm
Margin Min +3.0dB

2.4.3.2 For Process Level

Characteristic Glass optical fiber


Connector type LC
Fibre type Multi mode
Transmission distance <2km
Wave length 1310nm
Transmission power Min. -20.0dBm
Minimum receiving power Min. -30.0dBm
Margin Min +3.0dB

2.4.3.3 For Pilot Channel

Characteristic Glass optical fiber


Connector type FC ST
Fibre type Single mode Multi mode
Wave length 1310nm 1550nm 850nm
Transmission distance Max.40km Max.100km Max.2km
Transmission power -13.0±3.0 dBm -5.0 dBm±3.0 dBm -12dBm~-20 dBm
Minimum receiving power Min.-37 dBm Min.-36 dBm Min. -30.0dBm
Optical overload point Min.-3 dBm Min.-3 dBm Min.-8 dBm

2.4.3.4 For Synchronization Port

Characteristic Glass optical fiber


Connector type ST
Fibre type Multi mode
Wave length 820nm

2-4 PCS-902 Line Distance Relay


Date: 2014-07-29
2 Technical Data

Minimum receiving power Min. -25.0dBm


Margin Min +3.0dB

2.4.4 Print Port


Type RS-232
Baud Rate 4.8kbit/s, 9.6kbit/s, 19.2kbit/s, 38.4kbit/s, 57.6kbit/s, 115.2kbit/s
Printer type EPSON® 300K printer
Safety level Isolation to ELV level

2.4.5 Clock Synchronization Port


Type RS-485
Transmission distance <500m
Maximal capacity 32
Timing standard PPS, IRIG-B
Safety level Isolation to ELV level

2.5 Type Tests


2.5.1 Environmental Tests
Dry cold test IEC60068-2-1:2007
Dry heat test IEC60068-2-2:2007
Damp heat test, cyclic IEC60068-2-30:2005

2.5.2 Mechanical Tests


Vibration IEC 60255-21-1:1988 Class Ⅰ
Shock and bump IEC 60255-21-2:1988 Class Ⅰ

2.5.3 Electrical Tests


Standard IEC 60255-27:2005
Dielectric tests Test voltage 2kV, 50Hz, 1min
Standard IEC 60255-5:2000
Impulse voltage tests Test voltage 5kV
Overvoltage category Ⅲ
Insulation resistance
Isolation resistance >100MΩ@500VDC
measurements

2.5.4 Electromagnetic Compatibility


IEC 60255-22-1:2007
1MHz burst disturbance test Common mode: class Ⅲ 2.5kV
Differential mode: class Ⅲ 1.0kV
IEC60255-22-2:2008 class Ⅳ
Electrostatic discharge test For contact discharge: 8kV
For air discharge: 15kV

PCS-902 Line Distance Relay 2-5


Date: 2014-07-29
2 Technical Data

IEC 60255-22-3:2007 class Ⅲ


Frequency sweep
Radiated amplitude-modulated
10V/m (rms), f=80~1000MHz
Radio frequency interference tests Spot frequency
Radiated amplitude-modulated
10V/m (rms), f=80MHz/160MHz/450MHz/900MHz
Radiated pulse-modulated
10V/m (rms), f=900MHz
IEC 60255-22-4:2008
Fast transient disturbance tests Power supply, I/O, Earth: class Ⅳ, 4kV, 2.5kHz, 5/50ns
Communication terminals: class Ⅳ, 2kV, 5kHz, 5/50ns
IEC 60255-22-5:2008
Power supply, AC input, I/O port: class Ⅳ, 1.2/50us
Surge immunity test
Common mode: 4kV
Differential mode: 2kV
IEC 60255-22-6:2001
Conducted RF Electromagnetic
Power supply, AC, I/O, Comm. Terminal: Class Ⅲ , 10Vrms, 150
Disturbance
kHz~80MHz
Power Frequency Magnetic Field IEC 61000-4-8:2001
Immunity class Ⅴ, 100A/m for 1min, 1000A/m for 3s
IEC 61000-4-9:2001
Pulse Magnetic Field Immunity
class Ⅴ, 6.4/16μs, 1000A/m for 3s
Damped oscillatory magnetic field IEC 61000-4-10:2001
immunity class Ⅴ, 100kHz & 1MHz–100A/m

Auxiliary power supply performance IEC 60255-11: 2008


- Voltage dips Up to 200ms for dips to 40% of rated voltage without reset
-Voltage short interruptions 100ms for interruption without rebooting

2.6 Certifications
 ISO9001:2008

 ISO14001:2004

 OHSAS18001:2007

 ISO10012:2003

 CMMI L5

 EMC: 2004/108/EC, EN50263:1999

 Products safety(PS): 2006/95/EC, EN61010-1:2001

2-6 PCS-902 Line Distance Relay


Date: 2014-07-29
2 Technical Data

2.7 Terminals
Connection Type Wire Size
Crimp terminals, 1.5mm2~4.0mm2 lead
AC current If using 4.0mm2 lead, only dedicated terminal cable lug provided by NR
can be adopted.
AC voltage Crimp terminals, 1.0mm2~2.5mm2 lead
Power supply Crimp terminals, 1.0mm2~2.5mm2 lead
Contact I/O Crimp terminals, 1.0mm2~2.5mm2 lead
Grounding (Earthing) Connection BVR type, 2.5mm²~6.0mm2 lead

2.8 Measurement Scope and Accuracy


Item Range Accuracy
Phase range 0°~ 360° ≤±3°
Frequency fn±3 Hz ≤ 0.02Hz
Currents from protection measurement current transformers
≤ 2.0% of rating (0.05~1.00In)
Current 0.05~5.00In
≤ 2.0% of applied quantities (1.00~5.00In)
≤ 1.0% of rating (0.05~1.00Un)
Voltage 0.05~1.50Un
≤ 1.0% of applied quantities (1.00~1.50Un)
0.05~1.50Un ≤ 3.0% of rating (0.05~1.00In, 0.05~1.00Un)
Active power (W)
0.05~5.00In ≤ 3.0% of applied quantities (1.00~5.00In, 1.00~1.50Un)
0.05~1.50Un ≤ 3.0% of rating (0.05~1.00In, 0.05~1.00Un)
Reactive power (VAr)
0.05~5.00In ≤ 3.0% of applied quantities (1.00~5.00In, 1.00~1.50Un)
0.05~1.50Un ≤ 3.0% of rating (0.05~1.00In, 0.05~1.00Un)
Apparent power (VA)
0.05~5.00In ≤ 3.0% of applied quantities (1.00~5.00In, 1.00~1.50Un)
0.05~1.50Un ≤ 3.0% of rating (0.05~1.00In, 0.05~1.00Un)
Energy (Wh)
0.05~5.00In ≤ 3.0% of applied quantities (1.00~5.00In, 1.00~1.50Un)
0.05~1.50Un ≤ 3.0% of rating (0.05~1.00In, 0.05~1.00Un)
Energy (VAh)
0.05~5.00In ≤ 3.0% of applied quantities (1.00~5.00In, 1.00~1.50Un)

2.9 Management Function


2.9.1 Control Performance
Control mode Local or remote
Accuracy of local control ≤ 1s
Accuracy of remote control ≤ 3s

2.9.2 Clock Performance


Real time clock accuracy ≤ 3s/day
Accuracy of GPS synchronization ≤ 1ms
External time synchronization IRIG-B (200-98), PPS, IEEE1588 or SNTP protocol

PCS-902 Line Distance Relay 2-7


Date: 2014-07-29
2 Technical Data

2.9.3 Fault and Disturbance Recording


Maximum duration 10000 sampled points (24 sampled points per cycle)
Recording position 10 cycles before pickup of trigger element

2.9.4 Binary Input Signal


Resolution of binary input signal ≤ 1ms
Binary input mode Potential-free contact
Resolution of SOE ≤ 2ms

2.10 Protective Functions


2.10.1 Fault Detector
2.10.1.1 DPFC Current Element

Setting range 0.050In~30.000In (A)


Accuracy ≤2.5% of setting or 0.02In, whichever is greater

2.10.1.2 Residual Current Element

Setting range 0.050In~30.000In (A)


Accuracy ≤2.5% of setting or 0.02In, whichever is greater

2.10.1.3 Overvoltage Element

Setting range Un~2Unn (V)


Accuracy ≤2.5% of setting or 0.01Un, whichever is greater

2.10.2 Distance Protection


Setting range (0.000~4Unn)/In (ohm)
Accuracy ≤2.5% of setting or 0.1Ω/In, whichever is greater
Resetting ratio 105%
Time delay 0.000~10.000 (s)
Accuracy ≤1%Setting+30ms

2.10.3 Phase Overcurrent Protection


Setting range 0.050In~30.000In (A)
Accuracy ≤2.5% of setting or 0.02In, whichever is greater
Resetting ratio 95%
Time delay 0.000~20.000 (s)
Accuracy (definite-time characteristic) ≤1% of Setting+30ms (at 2 times current setting)
≤2.5% operating time or 30ms, whichever is greater
Accuracy (inverse-time characteristic)
(for current between 1.2 and 20 multiples of pickup)

2.10.4 Earth Fault Protection


Setting range 0.050In~30.000In (A)

2-8 PCS-902 Line Distance Relay


Date: 2014-07-29
2 Technical Data

Accuracy ≤2.5% of setting or 0.02In, whichever is greater


Resetting ratio 95%
Time delay 0.000~20.000 (s)
Accuracy (definite-time characteristic) ≤1% of Setting+30ms (at 2 times current setting)
≤2.5% operating time or 30ms, whichever is greater
Accuracy (inverse-time characteristic)
(for current between 1.2 and 20 multiples of pickup)

2.10.5 Overvoltage Protection


Setting range Un~2Unn (V)
Accuracy ≤2.5% of setting or 0.01Un, whichever is greater
Resetting ratio 95%
Time delay 0.000~30.000 (s)
Accuracy (definite-time characteristic) ≤1% of Setting+30ms (at 1.2 times voltage setting)
≤2.5% operating time or 30ms, whichever is greater
Accuracy (inverse-time characteristic)
(for voltage between 1.2 and 2 multiples of pickup)

2.10.6 Undervoltage Protection


Setting range 0~Unn (V)
Accuracy ≤2.5% of setting or 0.01Un, whichever is greater
Resetting ratio 105%
Time delay 0.000~30.000 (s)
Accuracy (definite-time characteristic) ≤1%Setting+30ms (at 0.8 times voltage setting)
≤2.5% operating time or 30ms, whichever is greater
Accuracy (inverse-time characteristic)
(for voltage between 0.5 and 0.8 multiples of pickup)

2.10.7 Negative-sequence Overvoltage Protection


Setting range 0~Un (V)
Accuracy ≤2.5% of setting or 0.01Un, whichever is greater
Resetting ratio 95%
Time delay 0.000~30.000 (s)
Accuracy (definite-time characteristic) ≤1% of Setting+30ms (at 1.2 times voltage setting)

2.10.8 Overfrequency Protection


Setting range 50.00~65.00 (Hz)
Accuracy ≤ 0.02Hz
Time delay 0.000~100.000 (s)
Accuracy ≤1%Setting+30ms (at 1.2 times frequency setting)

2.10.9 Underfrequency Protection


Setting range 45.00~60.00 (Hz)
Accuracy ≤ 0.02Hz
Time delay 0.000~100.000 (s)
Accuracy ≤1%Setting+30ms (at 0.8 times frequency setting)

PCS-902 Line Distance Relay 2-9


Date: 2014-07-29
2 Technical Data

df/dt blocking setting range 0.200~20.000 (Hz/s)


Accuracy ≤ 0.02Hz/s

2.10.10 Breaker Failure Protection


Pick-up time <20ms
Drop-off time <20ms
Setting range of phase current 0.050In~30.000In (A)
Setting range of zero-sequence current 0.050In~30.000In (A)
Setting range of negative-sequence current 0.050In~30.000In (A)
Accuracy ≤2.5% of setting or 0.02In, whichever is greater
Time delay (first) 0.000~10.000 (s)
Time delay (second) 0.000~10.000 (s)

2.10.11 Thermal Overload Protection


Base current setting range 0.050In~30.000In (A)
Accuracy ≤2.5% of setting or 0.02In, whichever is greater
Line thermal time constant 0.100~100.000 (min)
Thermal overload coefficient for trip 1.000~3.000
Thermal overload coefficient for alarm 1.000~3.000
Resetting ratio 95%
Drop-off time <30ms
≤2.5% operating time or 30ms, whichever is greater
Time accuracy
(for current between 1.2 and 20 multiples of pickup)

2.10.12 Stub Overcurrent Protection


Setting range 0.050In~30.000In (A)
Accuracy ≤2.5% of setting or 0.02In, whichever is greater
Resetting ratio 95%
Time delay 0.000~10.000 (s)
Accuracy ≤1% of Setting+30ms (at 2 times current setting)

2.10.13 Dead Zone Protection


Setting range 0.050In~30.000In
Accuracy ≤2.5% of setting or 0.02In, whichever is greater
Resetting ratio 95%
Time delay 0.000~10.000s
Accuracy ≤1%Setting+30ms

2.10.14 Pole Discrepancy Protection


Setting range (zero-sequence current) 0.050In~30.000In (A)
Setting range (negative-sequence current) 0.050In~30.000In (A)
Accuracy ≤2.5% of setting or 0.02In, whichever is greater
Resetting ratio 95%

2-10 PCS-902 Line Distance Relay


Date: 2014-07-29
2 Technical Data

Time delay 0.000~600.000 (s)


Accuracy ≤1% of Setting+30ms (at 2 times current setting)

2.10.15 Broken Conductor Protection


Setting range (I2/I1) 0.20~1.00
Accuracy ≤2.5% of setting
Resetting ratio 95%
Time delay 0.000~600.000 (s)
Accuracy ≤1% of Setting+30ms

2.10.16 Reverse Power Protection


Setting range 0.100In~50.000In
Accuracy ≤2% of setting or 0.5W, whichever is greater
Resetting ratio 95%
Time delay 0.010~300.000 (s)
Accuracy ≤1% of Setting+30ms

2.10.17 Auto-reclosing
Phase difference setting range 0~89 (Deg)
Accuracy 2.0Deg
Voltage difference setting range 0.02Un~0.8Un (V)
Accuracy Max(0.01Un, 2.5%)
Frequency difference setting range 0.02~1 (Hz)
Accuracy 0.01Hz
Operating time of synchronism check ≤1%Setting+20ms
Operating time of energizing check ≤1%Setting+20ms
Operating time of auto-reclosing ≤1%Setting+20ms

2.10.18 Transient Overreach


Tolerance for all high-speed protection ≤2%

2.10.19 Fault Locator


Accuracy for multi-phase faults with single end feed < ±2.5%
Tolerance will be higher in case of single-phase fault with high ground resistance.

PCS-902 Line Distance Relay 2-11


Date: 2014-07-29
2 Technical Data

2-12 PCS-902 Line Distance Relay


Date: 2014-07-29
3 Operation Theory

3 Operation Theory

Table of Contents
3 Operation Theory ............................................................................. 3-a 
3.1 System Parameters ......................................................................................... 3-1 
3.1.1 General Application ............................................................................................................ 3-1 

3.1.2 Function Description .......................................................................................................... 3-1 

3.1.3 Settings .............................................................................................................................. 3-1 

3.2 Line Parameters .............................................................................................. 3-2 


3.2.1 General Application ............................................................................................................ 3-2 

3.2.2 Function Description .......................................................................................................... 3-2 

3.2.3 Settings .............................................................................................................................. 3-2 

3.3 Frequency Calculation.................................................................................... 3-2 


3.3.1 General Application ............................................................................................................ 3-2 

3.3.2 Function Description .......................................................................................................... 3-2 

3.3.3 Function Block Diagram ..................................................................................................... 3-3 

3.3.4 I/O Signal ........................................................................................................................... 3-3 

3.3.5 Logic .................................................................................................................................. 3-3 

3.4 Circuit Breaker Position Supervision ............................................................ 3-4 


3.4.1 General Application ............................................................................................................ 3-4 

3.4.2 Function Description .......................................................................................................... 3-4 

3.4.3 Function Block Diagram ..................................................................................................... 3-4 

3.4.4 I/O Signals ......................................................................................................................... 3-5 

3.4.5 Logic .................................................................................................................................. 3-6 

3.4.6 Settings .............................................................................................................................. 3-7 

3.5 Fault Detector (FD) .......................................................................................... 3-7 


3.5.1 Application.......................................................................................................................... 3-7 

3.5.2 Fault Detector in Fault Detector DSP ................................................................................. 3-8 

PCS-902 Line Distance Relay 3-a


Date: 2014-07-29
3 Operation Theory

3.5.3 Protection Fault Detector in Protection Calculation DSP ................................................. 3-11 

3.5.4 Function Block Diagram ................................................................................................... 3-12 

3.5.5 I/O Signals ....................................................................................................................... 3-12 

3.5.6 Logic ................................................................................................................................ 3-12 

3.5.7 Settings ............................................................................................................................ 3-12 

3.6 Auxiliary Element .......................................................................................... 3-13 


3.6.1 General Application .......................................................................................................... 3-13 

3.6.2 Function Description ........................................................................................................ 3-13 

3.6.3 Function Block Diagram ................................................................................................... 3-15 

3.6.4 I/O Signals ....................................................................................................................... 3-16 

3.6.5 Logic ................................................................................................................................ 3-18 

3.6.6 Settings ............................................................................................................................ 3-21 

3.7 Distance Protection ...................................................................................... 3-23 


3.7.1 General Application .......................................................................................................... 3-23 

3.7.2 Function Description ........................................................................................................ 3-23 

3.7.3 DPFC Distance Protection ............................................................................................... 3-30 

3.7.4 Load Encroachment ......................................................................................................... 3-34 

3.7.5 Mho Distance Protection .................................................................................................. 3-36 

3.7.6 Quadrilateral Distance Protection .................................................................................... 3-47 

3.7.7 Pilot Distance Zone .......................................................................................................... 3-54 

3.7.8 Power Swing Detection .................................................................................................... 3-57 

3.7.9 Power Swing Blocking Releasing..................................................................................... 3-58 

3.7.10 Distance SOTF Protection ............................................................................................. 3-66 

3.8 Optical Pilot Channel (Option) ..................................................................... 3-73 


3.8.1 General Application .......................................................................................................... 3-73 

3.8.2 Function Description ........................................................................................................ 3-73 

3.8.3 Function Block Diagram ................................................................................................... 3-79 

3.8.4 I/O Signals ....................................................................................................................... 3-79 

3.8.5 Logic ................................................................................................................................ 3-80 

3.8.6 Settings ............................................................................................................................ 3-81 

3-b PCS-902 Line Distance Relay


Date: 2014-07-29
3 Operation Theory

3.9 Pilot Distance Protection .............................................................................. 3-81 


3.9.1 General Application .......................................................................................................... 3-81 

3.9.2 Function Description ........................................................................................................ 3-81 

3.9.3 Function Block Diagram ................................................................................................... 3-91 

3.9.4 I/O Signals ....................................................................................................................... 3-92 

3.9.5 Settings ............................................................................................................................ 3-93 

3.10 Pilot Directional Earth-fault Protection ..................................................... 3-94 


3.10.1 General Application ........................................................................................................ 3-94 

3.10.2 Function Description ...................................................................................................... 3-94 

3.10.3 Function Block Diagram ................................................................................................. 3-99 

3.10.4 I/O Signals ..................................................................................................................... 3-99 

3.10.5 Settings ........................................................................................................................ 3-100 

3.11 Current Direction ....................................................................................... 3-101 


3.11.1 General Application ...................................................................................................... 3-101 

3.11.2 Function Description..................................................................................................... 3-102 

3.11.3 Function Block Diagram ............................................................................................... 3-106 

3.11.4 I/O Signals.................................................................................................................... 3-106 

3.11.5 Settings ........................................................................................................................ 3-107 

3.12 Phase Overcurrent Protection ................................................................. 3-107 


3.12.1 General Application ...................................................................................................... 3-107 

3.12.2 Function Description .................................................................................................... 3-107 

3.12.3 Function Block Diagram ............................................................................................... 3-110 

3.12.4 I/O Signals ................................................................................................................... 3-110 

3.12.5 Logic ............................................................................................................................ 3-111 

3.12.6 Settings ........................................................................................................................ 3-112 

3.13 Earth Fault Protection................................................................................ 3-116 


3.13.1 General Application ...................................................................................................... 3-116 

3.13.2 Function Description .................................................................................................... 3-116 

3.13.3 Function Block Diagram ............................................................................................... 3-119 

3.13.4 I/O Signals ................................................................................................................... 3-119 

PCS-902 Line Distance Relay 3-c


Date: 2014-07-29
3 Operation Theory

3.13.5 Logic ............................................................................................................................ 3-120 

3.13.6 Settings ........................................................................................................................ 3-121 

3.14 Overcurrent Protection for VT Circuit Failure ........................................ 3-126 


3.14.1 General Application ...................................................................................................... 3-126 

3.14.2 Function Block Diagram ............................................................................................... 3-126 

3.14.3 I/O Signals ................................................................................................................... 3-126 

3.14.4 Logic ............................................................................................................................ 3-128 

3.14.5 Settings ........................................................................................................................ 3-128 

3.15 Residual Current SOTF Protection .......................................................... 3-129 


3.15.1 General Application ...................................................................................................... 3-129 

3.15.2 Function Description .................................................................................................... 3-129 

3.15.3 Function Block Diagram ............................................................................................... 3-129 

3.15.4 I/O Signals ................................................................................................................... 3-129 

3.15.5 Logic ............................................................................................................................ 3-130 

3.15.6 Settings ........................................................................................................................ 3-130 

3.16 Voltage Protection ..................................................................................... 3-130 


3.16.1 Overvoltage Protection................................................................................................. 3-131 

3.16.2 Negative-sequence Overvoltage Protection ................................................................. 3-136 

3.16.3 Undervoltage Protection............................................................................................... 3-137 

3.17 Frequency Protection ............................................................................... 3-144 


3.17.1 Overfrequency Protection ............................................................................................ 3-144 

3.17.2 Underfrequency Protection .......................................................................................... 3-148 

3.18 Breaker Failure Protection ....................................................................... 3-153 


3.18.1 General Application ...................................................................................................... 3-153 

3.18.2 Function Description .................................................................................................... 3-154 

3.18.3 Function Block Diagram ............................................................................................... 3-155 

3.18.4 I/O Signals ................................................................................................................... 3-155 

3.18.5 Logic ............................................................................................................................ 3-156 

3.18.6 Settings ........................................................................................................................ 3-157 

3.19 Thermal Overload Protection ................................................................... 3-158 

3-d PCS-902 Line Distance Relay


Date: 2014-07-29
3 Operation Theory

3.19.1 General Application ...................................................................................................... 3-158 

3.19.2 Function Description .................................................................................................... 3-158 

3.19.3 Function Block Diagram ............................................................................................... 3-159 

3.19.4 I/O Signals ................................................................................................................... 3-159 

3.19.5 Logic ............................................................................................................................ 3-160 

3.19.6 Settings ........................................................................................................................ 3-161 

3.20 Stub Overcurrent Protection .................................................................... 3-162 


3.20.1 General Application ...................................................................................................... 3-162 

3.20.2 Function Block Diagram ............................................................................................... 3-162 

3.20.3 I/O Signals ................................................................................................................... 3-163 

3.20.4 Logic ............................................................................................................................ 3-163 

3.20.5 Settings ........................................................................................................................ 3-164 

3.21 Dead Zone Protection ............................................................................... 3-164 


3.21.1 General Application ...................................................................................................... 3-164 

3.21.2 Function Description .................................................................................................... 3-164 

3.21.3 Function Block Diagram ............................................................................................... 3-165 

3.21.4 I/O Signal ..................................................................................................................... 3-165 

3.21.5 Logic ............................................................................................................................ 3-165 

3.21.6 Settings ........................................................................................................................ 3-166 

3.22 Pole Discrepancy Protection.................................................................... 3-166 


3.22.1 General Application ...................................................................................................... 3-166 

3.22.2 Function Description .................................................................................................... 3-166 

3.22.3 Function Block Diagram ............................................................................................... 3-167 

3.22.4 I/O Signals ................................................................................................................... 3-167 

3.22.5 Logic ............................................................................................................................ 3-167 

3.22.6 Settings ........................................................................................................................ 3-168 

3.23 Broken Conductor Protection .................................................................. 3-169 


3.23.1 General Application ...................................................................................................... 3-169 

3.23.2 Function Description .................................................................................................... 3-169 

3.23.3 Function Block Diagram ............................................................................................... 3-169 

PCS-902 Line Distance Relay 3-e


Date: 2014-07-29
3 Operation Theory

3.23.4 I/O Signals ................................................................................................................... 3-170 

3.23.5 Logic ............................................................................................................................ 3-170 

3.23.6 Settings ........................................................................................................................ 3-170 

3.24 Reverse Power Protection........................................................................ 3-171 


3.24.1 General Application ...................................................................................................... 3-171 

3.24.2 Function Description .................................................................................................... 3-171 

3.24.3 Function Block Diagram ............................................................................................... 3-172 

3.24.4 I/O Signals ................................................................................................................... 3-172 

3.24.5 Logic ............................................................................................................................ 3-173 

3.24.6 Settings ........................................................................................................................ 3-174 

3.25 Synchrocheck ........................................................................................... 3-174 


3.25.1 General Application ...................................................................................................... 3-174 

3.25.2 Function Description .................................................................................................... 3-175 

3.25.3 Function Block Diagram ............................................................................................... 3-183 

3.25.4 I/O Signals ................................................................................................................... 3-184 

3.25.5 Logic ............................................................................................................................ 3-185 

3.25.6 Settings ........................................................................................................................ 3-187 

3.26 Automatic Reclosure ................................................................................ 3-189 


3.26.1 General Application ...................................................................................................... 3-189 

3.26.2 Function Description .................................................................................................... 3-190 

3.26.3 Function Block Diagram ............................................................................................... 3-191 

3.26.4 I/O Signals ................................................................................................................... 3-191 

3.26.5 Logic ............................................................................................................................ 3-193 

3.26.6 Settings ........................................................................................................................ 3-205 

3.27 Transfer Trip .............................................................................................. 3-207 


3.27.1 General Application ...................................................................................................... 3-207 

3.27.2 Function Description .................................................................................................... 3-208 

3.27.3 Function Block Diagram ............................................................................................... 3-208 

3.27.4 I/O Signals ................................................................................................................... 3-208 

3.27.5 Logic ............................................................................................................................ 3-209 

3-f PCS-902 Line Distance Relay


Date: 2014-07-29
3 Operation Theory

3.27.6 Settings ........................................................................................................................ 3-209 

3.28 Trip Logic ................................................................................................... 3-209 


3.28.1 General Application ...................................................................................................... 3-209 

3.28.2 Function Description .................................................................................................... 3-209 

3.28.3 Function Block Diagram ............................................................................................... 3-210 

3.28.4 I/O Signals ................................................................................................................... 3-210 

3.28.5 Logic ............................................................................................................................ 3-211 

3.28.6 Settings ........................................................................................................................ 3-215 

3.29 VT Circuit Supervision.............................................................................. 3-215 


3.29.1 General Application ...................................................................................................... 3-215 

3.29.2 Function Description .................................................................................................... 3-216 

3.29.3 Function Block Diagram ............................................................................................... 3-216 

3.29.4 I/O Signals ................................................................................................................... 3-216 

3.29.5 Logic ............................................................................................................................ 3-217 

3.29.6 Settings ........................................................................................................................ 3-218 

3.30 CT Circuit Supervision ............................................................................. 3-218 


3.30.1 General Application ...................................................................................................... 3-218 

3.30.2 Function Description .................................................................................................... 3-218 

3.30.3 Function Block Diagram ............................................................................................... 3-219 

3.30.4 I/O Signals ................................................................................................................... 3-219 

3.30.5 Logic ............................................................................................................................ 3-219 

3.31 Control and Synchrocheck for Manual Closing ..................................... 3-219 


3.31.1 General Application ...................................................................................................... 3-219 

3.31.2 Function Description .................................................................................................... 3-220 

3.31.3 Function Block Diagram ............................................................................................... 3-226 

3.31.4 I/O Signals ................................................................................................................... 3-227 

3.31.5 Settings ........................................................................................................................ 3-228 

3.32 Faulty Phase Selection ............................................................................. 3-230 


3.32.1 General Application ...................................................................................................... 3-230 

3.32.2 Function Description .................................................................................................... 3-231 

PCS-902 Line Distance Relay 3-g


Date: 2014-07-29
3 Operation Theory

3.32.3 Function Block Diagram ............................................................................................... 3-232 

3.32.4 I/O Signals ................................................................................................................... 3-232 

3.33 Fault Location ........................................................................................... 3-233 


3.33.1 Application.................................................................................................................... 3-233 

3.33.2 Function Description .................................................................................................... 3-233 

3.33.3 Function Block Diagram ............................................................................................... 3-236 

3.33.4 I/O Signals ................................................................................................................... 3-236

List of Figures
Figure 3.3-1 Logic diagram of frequency calculation .............................................................3-3 

Figure 3.4-1 Logic diagram of CB position supervision.........................................................3-6 

Figure 3.4-2 Logic diagram of trip&closing circuit supervision ............................................3-6 

Figure 3.4-3 Logic diagram of circuit breaker position ..........................................................3-7 

Figure 3.5-1 Flow chart of protection program ..................................................................... 3-11 

Figure 3.5-2 Logic diagram of fault detector .........................................................................3-12 

Figure 3.6-1 Logic diagram of auxiliary element...................................................................3-21 

Figure 3.7-1 Operating time of single-phase fault (50Hz, SIR=1) .........................................3-25 

Figure 3.7-2 Operating time of single-phase fault (60Hz, SIR=1) .........................................3-25 

Figure 3.7-3 Operating time of two-phase fault (50Hz, SIR=1) .............................................3-26 

Figure 3.7-4 Operating time of two-phase fault (60Hz, SIR=1) .............................................3-26 

Figure 3.7-5 Operating time of three-phase fault (50Hz, SIR=1) ..........................................3-27 

Figure 3.7-6 Operating time of three-phase fault (60Hz, SIR=1) ..........................................3-27 

Figure 3.7-7 Operating time of single-phase fault (50Hz, SIR=30) .......................................3-28 

Figure 3.7-8 Operating time of single-phase fault (60Hz, SIR=30) .......................................3-28 

Figure 3.7-9 Operating time of two-phase fault (50Hz, SIR=30) ...........................................3-29 

Figure 3.7-10 Operating time of two-phase fault (60Hz, SIR=30) .........................................3-29 

Figure 3.7-11 Operating time of three-phase fault (50Hz, SIR=30).......................................3-30 

Figure 3.7-12 Operating time of three-phase fault (60Hz, SIR=30) ......................................3-30 

Figure 3.7-13 Operation characteristic for forward fault ......................................................3-31 

Figure 3.7-14 Operation characteristic for reverse fault ......................................................3-32 

3-h PCS-902 Line Distance Relay


Date: 2014-07-29
3 Operation Theory

Figure 3.7-15 Logic diagram of DPFC distance protection ..................................................3-33 

Figure 3.7-16 Distance element with load trapezoid .............................................................3-34 

Figure 3.7-17 Phase-to-ground operation characteristic for forward fault .........................3-36 

Figure 3.7-18 Phase-to-phase operation characteristic for forward fault ...........................3-37 

Figure 3.7-19 Operation characteristic for reverse fault ......................................................3-39 

Figure 3.7-20 Steady-state characteristic of three-phase short-circuit fault ......................3-39 

Figure 3.7-21 Operation characteristic of three-phase close up short-circuit fault ...........3-40 

Figure 3.7-22 Shift impedance characteristic of zone 1 and zone 2 ....................................3-41 

Figure 3.7-23 Logic diagram of enabling distance protection (Mho) ..................................3-43 

Figure 3.7-24 Logic diagram of distance protection (Mho zone 1) ......................................3-43 

Figure 3.7-25 Logic diagram of distance protection (Mho zone x) ......................................3-45 

Figure 3.7-26 Quadrilateral forward distance element characteristics ...............................3-47 

Figure 3.7-27 Quadrilateral reverse distance element characteristic..................................3-48 

Figure 3.7-28 Logic diagram of enabling distance protection (Quad) .................................3-50 

Figure 3.7-29 Logic diagram of distance protection (Quad zone 1) ....................................3-50 

Figure 3.7-30 Logic diagram of distance protection (Quad zone x) ....................................3-52 

Figure 3.7-31 Protected zone of pilot distance protection ...................................................3-54 

Figure 3.7-32 Pilot reverse weak infeed element ..................................................................3-55 

Figure 3.7-33 Logic diagram of pilot distance zone (Mho characteristic) ...........................3-55 

Figure 3.7-34 Logic diagram of pilot distance zone (Quad characteristic) .........................3-56 

Figure 3.7-35 Logic diagram of power swing detection .......................................................3-58 

Figure 3.7-36 Logic diagram of PSBR ....................................................................................3-64 

Figure 3.7-37 Logic diagram of enabling distance SOTF protection...................................3-67 

Figure 3.7-38 Logic diagram of manual closing signal ........................................................3-68 

Figure 3.7-39 Logic diagram of manual closing signal ........................................................3-69 

Figure 3.7-40 Logic diagram of distance SOTF protection by manual closing signal .......3-70 

Figure 3.7-41 Logic diagram of distance SOTF protection by 1-pole or 3-pole AR ...........3-70 

Figure 3.7-42 Logic diagram of distance SOTF protection by PD condition ......................3-71 

Figure 3.7-43 Logic diagram of distance SOTF protection ..................................................3-71 

Figure 3.8-1 Direct optical link up to 2km with 850nm .........................................................3-74 

PCS-902 Line Distance Relay 3-i


Date: 2014-07-29
3 Operation Theory

Figure 3.8-2 Direct optical link up to 40km with 1310nm or up to 100km with 1550nm ....3-74 

Figure 3.8-3 Connect to a communication network via communication convertor ...........3-75 

Figure 3.8-4 Connect to a communication network via MUX-64 ..........................................3-75 

Figure 3.8-5 Connect to a communication network via MUX-2M .........................................3-75 

Figure 3.8-6 Schematic diagram of communication channel time ......................................3-78 

Figure 3.8-7 Logic diagram of receiving signal n .................................................................3-80 

Figure 3.9-1 Enabling/disabling logic of pilot distance protection......................................3-82 

Figure 3.9-2 Logic diagram of receiving signal.....................................................................3-82 

Figure 3.9-3 Zone extension ...................................................................................................3-83 

Figure 3.9-4 Simple schematic of PUTT ................................................................................3-84 

Figure 3.9-5 Logic diagram of pilot distance protection (PUTT)..........................................3-84 

Figure 3.9-6 Simple schematic of POTT ................................................................................3-85 

Figure 3.9-7 Logic diagram of pilot distance protection (POTT) .........................................3-85 

Figure 3.9-8 Simple schematic of system fault .....................................................................3-86 

Figure 3.9-9 Simple schematic of blocking ...........................................................................3-87 

Figure 3.9-10 Logic diagram of pilot distance protection (Blocking) ..................................3-87 

Figure 3.9-11 Logic diagram of pilot distance protection (Unblocking)..............................3-88 

Figure 3.9-12 Current reversal ................................................................................................3-88 

Figure 3.9-13 Logic diagram of current reversal blocking ...................................................3-89 

Figure 3.9-14 Line fault description .......................................................................................3-90 

Figure 3.9-15 Weak infeed logic during pickup .....................................................................3-90 

Figure 3.9-16 Weak infeed logic without pickup ...................................................................3-90 

Figure 3.9-17 Simplified CB echo logic for POTT .................................................................3-91 

Figure 3.10-1 Enabling/disabling logic of pilot directional earth-fault protection .............3-94 

Figure 3.10-2 Logic diagram of receiving signal ...................................................................3-95 

Figure 3.10-3 Forward/reverse direction of zero-sequence power......................................3-95 

Figure 3.10-4 Simple schematic of DEF (permissive scheme) ............................................3-96 

Figure 3.10-5 Logic diagram of DEF (permissive scheme) ..................................................3-96 

Figure 3.10-6 Simple schematic of blocking .........................................................................3-97 

Figure 3.10-7 Logic diagram of DEF (Blocking scheme) ......................................................3-98 

3-j PCS-902 Line Distance Relay


Date: 2014-07-29
3 Operation Theory

Figure 3.10-8 Logic diagram for unblocking .........................................................................3-98 

Figure 3.11-1 Line fault description .....................................................................................3-101 

Figure 3.11-2 Vector diagram of current and voltage .........................................................3-102 

Figure 3.11-3 Vector diagram of zero-sequence power ......................................................3-104 

Figure 3.12-1 Logic diagram of phase overcurrent protection .......................................... 3-111 

Figure 3.13-1 Logic diagram of earth fault protection ........................................................3-120 

Figure 3.14-1 Logic diagram of overcurrent protection for VT circuit failure...................3-128 

Figure 3.15-1 Logic diagram of residual current SOTF protection ....................................3-130 

Figure 3.16-1 Logic diagram of stage x of overvoltage protection ....................................3-134 

Figure 3.16-2 Logic diagram of negative-sequence overvoltage protection ....................3-137 

Figure 3.16-3 Blocking logic of undervoltage protection ...................................................3-141 

Figure 3.16-4 Logic diagram of stage x of undervoltage protection .................................3-142 

Figure 3.17-1 Logic diagram of overfrequency protection (stage 1) .................................3-145 

Figure 3.17-2 Logic diagram of overfrequency protection (stage 2) .................................3-146 

Figure 3.17-3 Logic diagram of overfrequency protection (stage 3) .................................3-146 

Figure 3.17-4 Logic diagram of overfrequency protection (stage 4) .................................3-146 

Figure 3.17-5 Logic diagram of overfrequency protection (start)......................................3-147 

Figure 3.17-6 Logic diagram of underfrequency protection (stag1)..................................3-150 

Figure 3.17-7 Logic diagram of underfrequency protection (stag2)..................................3-150 

Figure 3.17-8 Logic diagram of underfrequency protection (stag3)..................................3-151 

Figure 3.17-9 Logic diagram of underfrequency protection (stag4)..................................3-151 

Figure 3.17-10 Logic diagram of underfrequency protection (start) .................................3-152 

Figure 3.18-1 Logic diagram of breaker failure protection.................................................3-156 

Figure 3.19-1 Characteristic curve of thermal overload model .........................................3-159 

Figure 3.19-2 Logic diagram of thermal overload protection (stage 1) .............................3-160 

Figure 3.19-3 Logic diagram of thermal overload protection (stage 2) .............................3-161 

Figure 3.20-1 3/2 breakers arrangement ..............................................................................3-162 

Figure 3.20-2 Logic diagram of stub overcurrent protection .............................................3-163 

Figure 3.21-1 Dead zone protection .....................................................................................3-165 

Figure 3.22-1 Logic diagram of pole discrepancy protection ............................................3-168 

PCS-902 Line Distance Relay 3-k


Date: 2014-07-29
3 Operation Theory

Figure 3.23-1 Logic diagram of broken conductor protection ...........................................3-170 

Figure 3.24-1 Logic diagram of stage 1 of reverse power protection ...............................3-173 

Figure 3.24-2 Logic diagram of stage 2 of reverse power protection ...............................3-173 

Figure 3.25-1 Relationship between reference voltage and synchronism voltage ..........3-175 

Figure 3.25-2 Voltage connection for single busbar arrangement ....................................3-177 

Figure 3.25-3 Voltage connection for single busbar arrangement ....................................3-177 

Figure 3.25-4 Voltage connection for double busbars arrangement .................................3-178 

Figure 3.25-5 Voltage selection for double busbars arrangement ....................................3-178 

Figure 3.25-6 Voltage connection for one and a half breakers arrangement....................3-179 

Figure 3.25-7 Voltage selection for one and a half breakers arrangement .......................3-180 

Figure 3.25-8 Voltage selection for one and a half breakers arrangement .......................3-181 

Figure 3.25-9 Reference voltage circuit failure supervision logic .....................................3-182 

Figure 3.25-10 Synchronism voltage circuit failure supervision logic..............................3-182 

Figure 3.25-11 Synchronism check ......................................................................................3-186 

Figure 3.25-12 Dead charge check logic..............................................................................3-187 

Figure 3.25-13 Synchrocheck logic ......................................................................................3-187 

Figure 3.26-1 Logic diagram of AR block ............................................................................3-194 

Figure 3.26-2 Logic diagram of AR ready ............................................................................3-195 

Figure 3.26-3 Logic diagram of tripping condition output .................................................3-196 

Figure 3.26-4 Single-phase tripping initiating AR ...............................................................3-197 

Figure 3.26-5 Three-phase tripping initiating AR ................................................................3-197 

Figure 3.26-6 1-pole AR initiation .........................................................................................3-198 

Figure 3.26-7 3-pole AR initiation .........................................................................................3-198 

Figure 3.26-8 One-shot AR ....................................................................................................3-199 

Figure 3.26-9 Extra time delay of AR....................................................................................3-199 

Figure 3.26-10 Reclosing output logic .................................................................................3-200 

Figure 3.26-11 Wait to slave signal.......................................................................................3-200 

Figure 3.26-12 Reclosing failure and success ....................................................................3-201 

Figure 3.26-13 Single-phase transient fault.........................................................................3-204 

Figure 3.26-14 Single-phase permanent fault ([CBx.79.N_Rcls]=2) ..................................3-205 

3-l PCS-902 Line Distance Relay


Date: 2014-07-29
3 Operation Theory

Figure 3.27-1 Logic diagram of transfer trip........................................................................3-209 

Figure 3.28-1 Tripping logic ..................................................................................................3-213 

Figure 3.28-2 Breaker failure initiation logic .......................................................................3-213 

Figure 3.28-3 Blocking AR logic ...........................................................................................3-214 

Figure 3.29-1 Logic of VT circuit supervision .....................................................................3-217 

Figure 3.29-2 Logic of VT neutral point supervision ..........................................................3-217 

Figure 3.30-1 Logic diagram of CT circuit failure ...............................................................3-219 

Figure 3.31-1 Logic diagram of closing primary equipment ..............................................3-221 

Figure 3.31-2 Logic diagram of open primary equipment ..................................................3-222 

Figure 3.31-3 Configuration page of control output 01 (default configration)..................3-223 

Figure 3.31-4 Configuration page of control output 02 (default configration)..................3-224 

Figure 3.32-1 The region of faulty phase selection ............................................................3-232 

Figure 3.33-1 Equivalent sequence network .......................................................................3-234 

List of Tables
Table 3.1-1 System parameters ................................................................................................3-1 

Table 3.2-1 Line parameters ......................................................................................................3-2 

Table 3.3-1 I/O signals of frequency calculation .....................................................................3-3 

Table 3.4-1 I/O signals of CB position supervision .................................................................3-5 

Table 3.4-2 Internal settings of CB position supervision .......................................................3-7 

Table 3.5-1 I/O signals of fault detector .................................................................................3-12 

Table 3.5-2 Settings of fault detector .....................................................................................3-12 

Table 3.6-1 I/O signals of auxiliary element ...........................................................................3-16 

Table 3.6-2 Settings of auxiliary element ...............................................................................3-21 

Table 3.7-1 I/O signals of DPFC distance protection ............................................................3-33 

Table 3.7-2 Settings of DPFC distance protection ................................................................3-34 

Table 3.7-3 I/O signals of load encroachment .......................................................................3-35 

Table 3.7-4 Settings of load encroachment ...........................................................................3-35 

Table 3.7-5 I/O signals of distance protection (Mho) ............................................................3-42 

Table 3.7-6 Settings of distance protection (Mho) ................................................................3-45 

PCS-902 Line Distance Relay 3-m


Date: 2014-07-29
3 Operation Theory

Table 3.7-7 I/O signals of distance protection (Quad) ..........................................................3-49 

Table 3.7-8 Settings of distance protection (Quad) ..............................................................3-52 

Table 3.7-9 Settings of pilot distance zone ............................................................................3-56 

Table 3.7-10 I/O signals of power swing detection ...............................................................3-57 

Table 3.7-11 Settings of power swing detection ...................................................................3-58 

Table 3.7-12 I/O signals of PSBR ............................................................................................3-62 

Table 3.7-13 Settings of PSBR ................................................................................................3-65 

Table 3.7-14 I/O signals of distance SOTF protection ..........................................................3-67 

Table 3.7-15 Settings of distance SOTF protection ..............................................................3-71 

Table 3.7-16 Internal settings of distance SOTF protection .................................................3-73 

Table 3.8-1 I/O signals of pilot channel ..................................................................................3-79 

Table 3.8-2 Settings of pilot channel ......................................................................................3-81 

Table 3.9-1 I/O signals of pilot distance protection ..............................................................3-92 

Table 3.9-2 Settings of pilot distance protection ..................................................................3-93 

Table 3.9-3 Internal settings of pilot distance protection .....................................................3-94 

Table 3.10-1 I/O signals of pilot directional earth-fault protection ......................................3-99 

Table 3.10-2 Settings of pilot directional earth-fault protection ........................................3-100 

Table 3.10-3 Internal settings of pilot distance protection .................................................3-101 

Table 3.11-1 Direction description ........................................................................................3-103 

Table 3.11-2 I/O signals of current direction ........................................................................3-106 

Table 3.11-3 Settings of current direction ............................................................................3-107 

Table 3.12-1 Inverse-time curve parameters........................................................................3-109 

Table 3.12-2 I/O signals of phase overcurrent protection .................................................. 3-110 

Table 3.12-3 Settings of phase overcurrent protection ...................................................... 3-112 

Table 3.13-1 Inverse-time curve parameters........................................................................ 3-118 

Table 3.13-2 I/O signals of earth fault protection ................................................................ 3-119 

Table 3.13-3 Settings of earth fault protection ....................................................................3-121 

Table 3.14-1 I/O signals of overcurrent protection for VT circuit failure ...........................3-126 

Table 3.14-2 Settings of overcurrent protection for VT circuit failure ...............................3-128 

Table 3.15-1 I/O signals of residual SOTF protection .........................................................3-129 

3-n PCS-902 Line Distance Relay


Date: 2014-07-29
3 Operation Theory

Table 3.15-2 Settings of residual current SOTF protection ................................................3-130 

Table 3.16-1 Inverse-time curve parameters........................................................................3-132 

Table 3.16-2 I/O signals of overvoltage protection .............................................................3-133 

Table 3.16-3 Settings of overvoltage protection .................................................................3-135 

Table 3.16-4 I/O signals of negative-sequence overvoltage protection ............................3-136 

Table 3.16-5 Settings of negative-sequence overvoltage protection ................................3-137 

Table 3.16-6 Inverse-time curve parameters of phase undervoltage protection ..............3-139 

Table 3.16-7 I/O signals of undervoltage protection ...........................................................3-140 

Table 3.16-8 Settings of undervoltage protection ...............................................................3-143 

Table 3.17-1 I/O signals of overfrequency protection .........................................................3-145 

Table 3.17-2 Settings of overfrequency protection .............................................................3-147 

Table 3.17-3 I/O signals of underfrequency protection ......................................................3-149 

Table 3.17-4 Settings of underfrequency protection ..........................................................3-152 

Table 3.18-1 I/O signals of breaker failure protection .........................................................3-155 

Table 3.18-2 Settings of breaker failure protection .............................................................3-157 

Table 3.19-1 I/O signals of thermal overload protection.....................................................3-159 

Table 3.19-2 Settings of thermal overload protection.........................................................3-161 

Table 3.20-1 I/O signals of stub overcurrent protection .....................................................3-163 

Table 3.20-2 Settings of stub overcurrent protection .........................................................3-164 

Table 3.21-1 I/O signals of dead zone protection ................................................................3-165 

Table 3.21-2 Settings of dead zone protection ....................................................................3-166 

Table 3.22-1 I/O signals of pole discrepancy protection ....................................................3-167 

Table 3.22-2 Settings of pole discrepancy protection ........................................................3-168 

Table 3.23-1 I/O signals of broken conductor protection ...................................................3-170 

Table 3.23-2 Settings of broken conductor protection .......................................................3-170 

Table 3.24-1 I/O signals of reverse power protection .........................................................3-172 

Table 3.24-2 Settings of broken conductor protection .......................................................3-174 

Table 3.25-1 I/O signals of synchrocheck ............................................................................3-184 

Table 3.25-2 Settings of synchrocheck ................................................................................3-187 

Table 3.26-1 I/O signals of auto-reclosing ...........................................................................3-191 

PCS-902 Line Distance Relay 3-o


Date: 2014-07-29
3 Operation Theory

Table 3.26-2 Reclosing number ............................................................................................3-203 

Table 3.26-3 Settings of auto-reclosing ...............................................................................3-205 

Table 3.27-1 I/O signals of transfer trip ................................................................................3-208 

Table 3.27-2 Settings of Transfer trip ...................................................................................3-209 

Table 3.28-1 I/O signals of trip logic .....................................................................................3-210 

Table 3.28-2 Settings of trip logic .........................................................................................3-215 

Table 3.29-1 I/O signals of VT circuit supervision ..............................................................3-216 

Table 3.29-2 VTS Settings .....................................................................................................3-218 

Table 3.30-1 I/O signals of CT circuit supervision ..............................................................3-219 

Table 3.31-1 I/O signals of control ........................................................................................3-227 

Table 3.31-2 Control Settings ...............................................................................................3-228 

Table 3.31-3 Synchrocheck Settings ....................................................................................3-229 

Table 3.32-1 Relation between ∆UOΦMAX and faulty phase .............................................3-231 

Table 3.32-2 I/O signals of faulty phase selection ..............................................................3-232 

Table 3.33-1 I/O signals of fault location..............................................................................3-236 

3-p PCS-902 Line Distance Relay


Date: 2014-07-29
3 Operation Theory

3.1 System Parameters


3.1.1 General Application
The device performs various protection functions by respective algorithms with the information
(currents and voltages) acquired from primary system through current transformer and voltage
transformer, so it is important to configure analog input channels correctly.

Further to correct configuration of analog input channels, other protected system information, such
as the parameters of voltage transformer and current transformer are also required.

3.1.2 Function Description


The device generally considers transmission line as its protected object, current flows from busbar
to line is considered as the forward direction.

3.1.3 Settings
Table 3.1-1 System parameters

No. Name Range Step Unit Remark


1 Active_Grp 1~10 1 Active setting group
2 Opt_SysFreq 50 or 60 Hz System frequency
3 PrimaryEquip_Name The name of primary equipment
Primary rated value of VT (phase to
4 U1n 33.00~65500.00 0.01 kV
phase)
Secondary rated value of VT (phase to
5 U2n 80.00~220.00 0.01 V
phase)
Primary rated value of CT corresponding
6 CBx.I1n 100~30000 1 A
to circuit breaker No.x
Primary calculation base rated current of
7 I1n_Base 100~30000 1 A CT, and generally set as same as
[CB1.I1n]
Secondary calculation base rated
8 I2n_Base 1 or 5 A
current of CT
Frequency upper limit setting
The device will issue an alarm
9 f_High_FreqAlm 50~65 1 Hz
[Alm_Freq], when system frequency is
higher than the setting.
Frequency lower limit setting
The device will issue an alarm
10 f_Low_FreqAlm 45~60 1 Hz
[Alm_Freq], when system frequency is
lower than the setting.

PCS-902 Line Distance Relay 3-1


Date: 2014-07-29
3 Operation Theory

3.2 Line Parameters


3.2.1 General Application
When the device equips with line protection functions, line parameters of protected line are
required, especially for fault location, precise line parameters are the basic criterion for accurate
fault location.

3.2.2 Function Description


Line parameters mainly include positive-sequence reactance, positive-sequence resistance,
zero-sequence reactance, zero-sequence resistance, mutual zero-sequence reactance, mutual
zero-sequence resistance and line length.

The positive-sequence reactance, zero-sequence reactance, positive-sequence resistance and


zero-sequence resistance are the reactance and resistance value of the whole line. In general, the
device locates the fault through calculating the impedance value from the location of the device to
fault point.

3.2.3 Settings
Table 3.2-1 Line parameters

No. Name Range Step Unit Remark


Positive-sequence reactance of the whole
1 X1L (0.000~4Unn)/In 0.001 ohm
line (secondary value)
Positive-sequence resistance of the whole
2 R1L (0.000~4Unn)/In 0.001 ohm
line (secondary value)
Zero-sequence reactance of the whole line
3 X0L (0.000~4Unn)/In 0.001 ohm
(secondary value)
Zero-sequence resistance of the whole line
4 R0L (0.000~4Unn)/In 0.010 ohm
(secondary value)
Zero-sequence mutual reactance
5 X0M (0.000~4Unn)/In 0.001 ohm
(secondary value)
Zero-sequence mutual resistance of the
6 R0M (0.000~4Unn)/In 0.01 ohm
whole line (secondary value)
7 LineLength 0.00~655.35 0.01 km Total length of the whole line

3.3 Frequency Calculation


3.3.1 General Application
System frequency is an important parameter to characterize power system, and the measurement
and calculation of system frequency are the basis of many protection functions. The frequency
calculation module can accurately calculate the frequency of voltage component.

3.3.2 Function Description


The device can be applied to the power system within frequency range of 40Hz~63Hz, the
reference frequency can be set as 50Hz or 60Hz via the system setting [Opt_SysFreq].

The device provide frequency track function, which can improve the accuracy of protection

3-2 PCS-902 Line Distance Relay


Date: 2014-07-29
3 Operation Theory

algorithms and the performance of protection functions. For the power system using 50Hz or 60Hz
as reference frequency, the frequency track function can be disabled if the fluctuation of the
frequency range is not great. For the power system that the fluctuation of the frequency range is
great, the frequency track function can be enabled to improve protection performance.

It adopts the positive-sequence voltage which derived from protection used voltage as the
calculation reference, the positive-sequence voltage can be calculated as following:

U 1  (U a  U b e j120  U c e j 240 ) / 3

When no VT is connected to the device, the frequency track function is disabled automatically, and
then the device calculates protection algorithm using the system reference frequency. When the
device detects a fault happening to the power system or the voltage is smaller than 0.15Un, the
frequency track function is disabled.

3.3.3 Function Block Diagram

3.3.4 I/O Signal


Table 3.3-1 I/O signals of frequency calculation

No. Input Signal Description


It is used to enabled or disable frequency track function by the configuration
1 FreqTrack
software PCS-Explorer.
2 fn It is the system frequency, which is decided by the setting [Opt_SysFreq].
No. Output Signal Description
1 f Frequency calculation result
2 Alm_Freq Frequency abnormality alarm

3.3.5 Logic

Figure 3.3-1 Logic diagram of frequency calculation

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3.4 Circuit Breaker Position Supervision


3.4.1 General Application
The status of circuit breaker (CB) position is applied for protection and control functions in this
device, such as, SOTF protection, auto-reclose and VT circuit supervision, etc. The status of CB
position can be applied as input signals for other features configured by user.

3.4.2 Function Description


The signal reflecting CB position is acquired via opto-coupler with settable delay pickup and
dropoff, and forms digital signal used by protection functions. CB position can reflect the status of
each phase by means of phase-segregated inputs.

In order to prevent that wrong status of CB position is input into the device via binary input,
appropriate monitor method is used to check the rationality of the binary input. When the binary
input of CB open position is detected, the status of CB position will be thought as incorrect and an
alarm [Alm_52b] will be issued if there is current detected in the line.

Together with the status of circuit breaker and the information of external circuit, this function can
be used to supervise control circuit of circuit breaker.

External manual closing binary input (ManCls) is only used for SOTF logic application, the control
of circuit breaker (CB) closing or opening should refer to section 3.29 (Control and Synchrocheck
for Manual Closing).

3.4.3 Function Block Diagram


1. For phase-segregated circuit breaker

2. For non-phase segregated circuit breaker

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3. Trip&closing circuit supervision (TCCS)

TCCS will be disabled automatically when it is used for phase-segregated circuit breaker. x=1 or 2

3.4.4 I/O Signals


Table 3.4-1 I/O signals of CB position supervision

No. Input Signal Description


1 CBx.52b_PhA Normally closed contact of A-phase of circuit breaker No.x
2 CBx.52b_PhB Normally closed contact of B-phase of circuit breaker No.x
3 CBx.52b_PhC Normally closed contact of C-phase of circuit breaker No.x
Maintenance status binary input of circuit breaker No.x
If any circuit breaker is in maintenance and out of service, CBx.52b or CBx.Test
4 CBx.Test should be set as “1” in fixed, and CB No.x will be not take effect in corresponding
protection logics. (CB position supervision is still kept.) It is only available for
double circuit breakers mode.
External manual closing binary input of circuit breaker No.x, it is only applied to
5 CBx.ManCls
SOTF logic
6 CBx.52b Normally closed contact of three-phase of circuit breaker No.x
7 CBx.52a Normally open contact of three-phase of circuit breaker No.x
Control circuit failure of circuit breaker No.x (normally closed contact and normally
8 CBx.TCCS.Input open contact of three-phase circuit breaker are all de-energized due to DC power
loss of control circuit)
No. Output Signal Description
1 CBx.Alm_52b Circuit breaker No.x position is abnormal
2 CBx.TCCS.Alm Control circuit of circuit breaker No.x is abnormal

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Note!

The signal [CBx.52a] only take effect in the tripping/closing circuit supervision and not
affect any protection function. Only if tripping/closing circuit supervision is configured, this
signal needs to be connected to the device.

3.4.5 Logic

BI [CBx.52b_PhA] >=1
&
&
BI [CBx.52b_PhB] >=1
& &
>=1
10s 10s CBx.Alm_52b
BI [CBx.52b_PhC] >=1 >=1
&
BI [CBx.52b]

&

SIG CBx.Ia>I_Line

& >=1

SIG CBx.Ib>I_Line

&

SIG CBx.Ic>I_Line

Figure 3.4-1 Logic diagram of CB position supervision

Figure 3.4-2 Logic diagram of trip&closing circuit supervision

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BI [CB1.52b_PhA] >=1
&
52b_PhA

BI [CB1.52b_PhB] >=1

BI [CB1.52b_PhC]
>=1
BI [CB1.52b]

BI [CB1.Test]
&
52b_PhB
BI [CB2.52b_PhA] >=1

BI [CB2.52b_PhB] >=1

BI [CB2.52b_PhC]
&
>=1 52b_PhC
BI [CB2.52b]

BI [CB2.Test]

Figure 3.4-3 Logic diagram of circuit breaker position

x=1 or 2

I_Line is threshold value used to determine whether line is on-load or no-load. Default value
0.06In.

3.4.6 Settings
Table 3.4-2 Internal settings of CB position supervision

No. Name Default Value Unit Remark


Pickup delay time of control circuit failure alarm for
1 CBx.TCCS.t_DPU 0.5 s
circuit breaker No.x (x=1 or 2)
Dropoff delay time of control circuit failure alarm for
2 CBx.TCCS.t_DDO 0.5 s
circuit breaker No.x (x=1 or 2)

3.5 Fault Detector (FD)


3.5.1 Application
The device has one DSP module with fault detector DSP and protection DSP for fault detector and
protection calculation respectively. Protection DSP with protection fault detector element is
responsible for calculation of protection elements, and fault detector DSP is responsible to
determine fault appearance on the protected power system. Fault detector in fault detector DSP
picks up to provide positive supply to output relays. The output relays can only operate when both
the fault detector in fault detector DSP and a protection element operate simultaneously.

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3 Operation Theory

Otherwise, the output relays would not operate. An alarm message will be issued with blocking
outputs if a protection element operates while the fault detector does not operate.

3.5.2 Fault Detector in Fault Detector DSP


Main part of FD is DPFC current detector element that detects the change of phase-to-phase
power frequency current, and residual current fault detector element that calculates the vector
sum of 3 phase currents as supplementary. They are continuously calculating the analog input
signals.

All fault detectors in this device include:

1. Fault detector based on DPFC current: DPFC current is greater than the setting value

2. Fault detector based on residual current: Residual current is greater than the setting value

3. Fault detector based on negative-sequence current: Negative-sequence current is greater


than the setting value

4. Fault detector based on phase current: Phase current is greater than the setting value

5. Fault detector based on voltage: Phase voltage or phase-to-phase voltage is greater than the
setting value

6. Fault detector based on circuit breaker position: Circuit breaker position discrepancy

7. Fault detector based on thermal overload logic: Thermal overload pickup

8. Fault detector based on auxiliary element: Auxiliary element pickup

If any of the above conditions is complied, FD will operate to activate the output circuit providing
DC power supply to the output relays. The fault detector based on DPFC current and the fault
detector based on residual current are always enabled, and all protection functions are permitted
to operate when they operate.

3.5.2.1 Fault Detector Based on DPFC Current

DPFC phase-to-phase current is obtained by subtracting the phase-to-phase current from that of a
cycle before.

I(k) is the sampling value at a point.

I(k-24) is the value of a sampling point before a cycle, 24 is the sampling points in one cycle.

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200

100

-100

-200
0 20 40 60 80 100 120
Original Current
100

50

-50

-100
0 20 40 60 80 100 120
DPFC current

From above figures, it is concluded that DPFC can reflect the sudden change of current at the
initial stage of a fault and has a perfect performance of fault detection.

It is used to determine whether this pickup condition is met according to Equation 3.5-1.

For multi-phase short-circuit fault, DPFC phase-to-phase current has high sensitivity to ensure the
pickup of protection device. For usual single phase to earth fault, it also has sufficient sensitivity to
pick up except the earth fault with very large fault resistance. Under this condition, DPFC current is
relative small, however, residual current is also used to judge pickup condition.

This element adopts adaptive floating threshold varied with the change of load current
continuously. The change of load current is small and steadily under normal or power swing
condition, the adaptive floating threshold with the ∆ISet is higher than the change of current under
these conditions and hence maintains the element stability.

The criterion is:

∆IΦΦMAX>1.25∆ITh+∆ISet Equation 3.5-1

Where:

∆IΦΦMAX: The maximum half-wave integration value of phase-to-phase current (ΦΦ=AB, BC, CA)

∆ISet: The fixed threshold value (i.e. the setting [FD.DPFC.I_Set])

∆ITh: The floating threshold value

The coefficient, 1.25, is an empirical value which ensures the threshold always higher than the
unbalance output value of the system.

If operation condition is met, the fault detector based on DPFC current will operate to provide DC
power supply for output relays, the pickup signal will maintain 7s after the fault detector based on
DPFC current drops off.

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3.5.2.2 Fault Detector Based on Residual Current

The operation condition will be met when 3I0 is greater than the setting [FD.ROC.3I0_Set]. The
fault detector based on residual current is always in service.

Where:

3I0: residual current calculates from the vector sum of Ia, Ib and Ic

When the fault detector based on residual current operates and lasts for longer than 10 seconds,
an alarm [Alm_Pkp_I0] will be issued.

If operation condition is met, the fault detector based on residual current will operate to provide DC
power supply for output relay, and the pickup signal will maintain 7s after the fault detector based
on residual current drops off.

3.5.2.3 Fault detector Based on Negative-sequence Current

The operation condition will be met when negative-sequence current (I2) is greater than the
setting [FD.NOC.I2_Set]. It can be enabled or disabled by the logic setting [FD.NOC.En].

If operation condition is met, the fault detector based on negative-sequence current will operate to
provide DC power supply for output relay, and the pickup signal will maintain 7s after the fault
detector based on negative-sequence current drops off.

3.5.2.4 Fault Detector Based on Phase Current

The fault detector based on phase current will operate to provide DC power supply for output relay
when phase overcurrent protection is enabled and meets the operation condition, and the pickup
signal will maintain 500ms after the fault detector based on phase current drops off.

3.5.2.5 Fault Detector Based on Voltage

This fault detector based on voltage includes the fault detectors of overvoltage protection,
undervoltage protection and frequency protection. The fault detector based on voltage will operate
to provide DC power supply for output relay when corresponding voltage element is enabled and
meets the operation condition, and the pickup signal will maintain 500ms after the fault detector
based on voltage drops off.

3.5.2.6 Fault Detector Based on Circuit Breaker Position

When pole discrepancy protection is enabled, i.e. the logic setting [62PD.En] is set as “1”, and if
three phases of circuit breaker are not in the same status, the fault detector based on circuit
breaker position will operate to provide DC power supply for output relays, and the pickup signal
will maintain 500ms after the the fault detector based on circuit breaker position drops off.

3.5.2.7 Fault Detector Based on Thermal Overload Logic

The fault detector based on thermal overload logic will operate to provide DC power supply for
output relay when tripping logic of thermal overload protection meets the operation condition, and
the pickup signal will maintain 500ms after the fault detector based on thermal overload logic
drops off.

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3.5.2.8 Fault Detector Based on Auxiliary Element

The fault detector based on auxiliary element will operate to provide DC power supply for output
relay when auxiliary element is enabled and meets the operation condition, and the pickup signal
will maintain 500ms after the fault detector based on auxiliary element drops off.

3.5.3 Protection Fault Detector in Protection Calculation DSP


The protection device is running either of the two programs: one is “Regular program” for normal
state, and the other is “Fault calculation program” after protection fault detector picks up.

Under the normal state, the protection device will perform the following tasks:

1. Calculate analog quantity

2. Read binary input

3. Hardware self-check

4. Circuit breaker position supervision

5. Analog quantity input supervision

6. Channel supervision

Once the protection fault detector element in protection calculation DSP picks up, the protection
device will switch to fault calculation program, for example the calculation of distance protection,
and to determine logic. If the fault is within the protected zone, the protection device will send
tripping command.

The protection program flow chart is shown as Figure 3.5-1.

Main program

Sampling program

No Yes
Pickup?

Regular program Fault calculation program

Figure 3.5-1 Flow chart of protection program

The protection FD pickup conditions are the same as the FD in fault detector DSP as shown below.
The operation criteria for the conditions are also the same as that in fault detector DSP. Please
refer to section 3.5.2 for details.

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3.5.4 Function Block Diagram

FD

FD.Pkp

FD.DPFC.Pkp

FD.ROC.Pkp

FD.NOC.Pkp

3.5.5 I/O Signals


Table 3.5-1 I/O signals of fault detector

No. Output Signal Description


1 FD.Pkp The device picks up
2 FD.DPFC.Pkp DPFC current fault detector element operates.
3 FD.ROC.Pkp Residual current fault detector element operates.
4 FD.NOC.Pkp Negative-sequence fault detector element operates.

3.5.6 Logic

Figure 3.5-2 Logic diagram of fault detector

3.5.7 Settings
Table 3.5-2 Settings of fault detector

No. Name Range Step Unit Remark


Current setting of DPFC current fault
1 FD.DPFC.I_Set (0.050~30.000)×In 0.001 A
detector element
Current setting of residual current fault
2 FD.ROC.3I0_Set (0.050~30.000)×In 0.001 A
detector element

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Current setting of negative-sequence


3 FD.NOC.I2_Set (0.050~30.000)×In 0.001 A
current fault detector element
Enabling/disabling negative-sequence
current fault detector element
4 FD.NOC.En 0 or 1
0: disable
1: enable

3.6 Auxiliary Element


3.6.1 General Application
Auxiliary element (AuxE) is mainly used to program logics to meet users’ applications or further
improve operating reliability of protection elements. Reliability of protective elements (such as
distance element or current differential element) is assured, auxiliary element is usually not
required to configure. Auxiliary elements including current change auxiliary element (AuxE.OCD),
residual current auxiliary element (AuxE.ROC), phase current auxiliary element (AuxE.OC),
voltage change auxiliary element (AuxE.UVD), phase under voltage auxiliary element (AuxE.UVG),
phase-to-phase under voltage auxiliary element (AuxE.UVS) and residual voltage auxiliary
element (AuxE.ROV), and they can be enabled or disabled by corresponding logic setting or
binary inputs. Users can configure them according to applications via PCS-Explorer software.

3.6.2 Function Description


1. Current change auxiliary element AuxE.OCD

It shares DPFC current element of DPFC fault detector. If DPFC fault detector operates
(FD.DPFC.Pkp=1) and current change auxiliary element is enabled, current change auxiliary
element operates.

2. Residual current auxiliary element AuxE.ROC

There are 3 stages for residual current auxiliary element (AuxE.ROC1, AuxE.ROC2 and
AuxE.ROC3). Each residual current auxiliary element will operate instantly if calculated residual
current amplitude is larger than corresponding current setting

The criteria are:

AuxE.ROC1: 3I0>[AuxE.ROC1.3I0_Set]

AuxE.ROC2: 3I0>[AuxE.ROC2.3I0_Set]

AuxE.ROC3: 3I0>[AuxE.ROC3.3I0_Set]

Where:

3I0: The calculated residual current

3. Phase current auxiliary element AuxE.OC

There are 3 stages for phase current auxiliary element (AuxE.OC1, AuxE.OC2 and AuxE.OC3).
Each phase current auxiliary element will operate instantly if phase current amplitude is larger than

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corresponding current setting.

The criteria are:

AuxE.OC1: IΦMAX>[AuxE.OC1.I_Set]

AuxE.OC2: IΦMAX>[AuxE.OC2.I_Set]

AuxE.OC3: IΦMAX>[AuxE.OC3.I_Set]

Where:

IΦMAX: The maximum phase current among three phases

4. Voltage change auxiliary element AuxE.UVD

AuxE.UVD is based on phase-to-ground voltage change measured in all three phases.

The criterion is:

ΔUΦMAX>[AuxE.UVD.U_Set]

Where:

∆UΦMAX: The maximum phase-to-ground voltage change among three phases

5. Phase under voltage auxiliary element AuxE.UVG

AuxE.UVG will operate instantly if any phase-to-ground voltage is lower than corresponding
voltage setting.

The criterion is:

UΦMIN<[AuxE.UVG.U_Set]

Where:

UΦMIN: The minimum value among three phase-to-ground voltages

6. Phase-to-phase under voltage auxiliary element AuxE.UVS

AuxE.UVS will operate instantly if any phase-to-phase voltage is lower than corresponding voltage
setting.

The criterion is:

UΦΦMIN<[AuxE.UVS.U_Set]

Where:

UΦΦMIN: The minimum value among three phase-to-phase voltages

7. Residual voltage auxiliary element AuxE.ROV

AuxE.ROV will operate instantly if calculated residual voltage is larger than corresponding voltage
setting.

The criterion is:

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3U0>[AuxE.ROV.3U0_Set]

Where:

3U0: The calculated residual voltage

3.6.3 Function Block Diagram

AuxE

AuxE.OCD.En AuxE.St

AuxE.OCD.Blk AuxE.OCD.St_Ext

AuxE.ROCx.En AuxE.OCD.On

AuxE.ROCx.Blk AuxE.ROCx.St

AuxE.OCx.En AuxE.ROCx.On

AuxE.OCx.Blk AuxE.OCx.St

AuxE.UVD.En AuxE.OCx.StA

AuxE.UVD.Blk AuxE.OCx.StB

AuxE.UVG.En AuxE.OCx.StC

AuxE.UVG.Blk AuxE.OCx.On

AuxE.UVS.En AuxE.UVD.St

AuxE.UVS.Blk AuxE.UVD.St_Ext

AuxE.ROV.En AuxE.UVD.On

AuxE.ROV.Blk AuxE.UVG.St

AuxE.UVG.StA

AuxE.UVG.StB

AuxE.UVG.StC

AuxE.UVG.On

AuxE.UVS.St

AuxE.UVS.StAB

AuxE.UVS.StBC

AuxE.UVS.StCA

AuxE.UVS.On

AuxE.ROV.St

AuxE.ROV.On

x can be 1, 2 or 3

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3.6.4 I/O Signals


Table 3.6-1 I/O signals of auxiliary element

No. Input Signal Description


Current change auxiliary element enabling input, it is triggered from binary input or
1 AuxE.OCD.En
programmable logic etc.
Current change auxiliary element blocking input, it is triggered from binary input or
2 AuxE.OCD.Blk
programmable logic etc.
Stage 1 of residual current auxiliary element enabling input, it is triggered from
3 AuxE.ROC1.En
binary input or programmable logic etc.
Stage 1 of residual current auxiliary element blocking input, it is triggered from
4 AuxE.ROC1.Blk
binary input or programmable logic etc.
Stage 2 of residual current auxiliary element enabling input, it is triggered from
5 AuxE.ROC2.En
binary input or programmable logic etc.
Stage 2 of residual current auxiliary element blocking input, it is triggered from
6 AuxE.ROC2.Blk
binary input or programmable logic etc.
Stage 3 of residual current auxiliary element enabling input, it is triggered from
7 AuxE.ROC3.En
binary input or programmable logic etc.
Stage 3 of residual current auxiliary element blocking input, it is triggered from
8 AuxE.ROC3.Blk
binary input or programmable logic etc.
Stage 1 of phase current auxiliary element enabling input, it is triggered from
9 AuxE.OC1.En
binary input or programmable logic etc.
Stage 1 of phase current auxiliary element blocking input, it is triggered from
10 AuxE.OC1.Blk
binary input or programmable logic etc.
Stage 2 of phase current auxiliary element enabling input, it is triggered from
11 AuxE.OC2.En
binary input or programmable logic etc.
Stage 2 of phase current auxiliary element blocking input, it is triggered from
12 AuxE.OC2.Blk
binary input or programmable logic etc.
Stage 3 of phase current auxiliary element enabling input, it is triggered from
13 AuxE.OC3.En
binary input or programmable logic etc.
Stage 3 of phase current auxiliary element blocking input, it is triggered from
14 AuxE.OC3.Blk
binary input or programmable logic etc.
Voltage change auxiliary element enabling input, it is triggered from binary input or
15 AuxE.UVD.En
programmable logic etc.
Voltage change auxiliary element blocking input, it is triggered from binary input or
16 AuxE.UVD.Blk
programmable logic etc.
Phase-to-ground under voltage auxiliary element enabling input, it is triggered
17 AuxE.UVG.En
from binary input or programmable logic etc.
Phase-to-ground under voltage auxiliary element blocking input, it is triggered
18 AuxE.UVG.Blk
from binary input or programmable logic etc.
Phase-to-phase under voltage auxiliary element enabling input, it is triggered from
19 AuxE.UVS.En
binary input or programmable logic etc.
20 AuxE.UVS.Blk Phase-to-phase under voltage auxiliary element blocking input, it is triggered from

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binary input or programmable logic etc.


Residual voltage auxiliary element enabling input, it is triggered from binary input
21 AuxE.ROV.En
or programmable logic etc.
Residual voltage auxiliary element blocking input, it is triggered from binary input
22 AuxE.ROV.Blk
or programmable logic etc.
No. Output Signal Description
1 AuxE.St Any auxiliary element of the device operates.
2 AuxE.OCD.St_Ext Current change auxiliary element operates.
3 AuxE.OCD.On Current change auxiliary element is enabled.
4 AuxE.ROC1.St Stage 1 of residual current auxiliary element operates.
5 AuxE.ROC1.On Stage 1 of residual current auxiliary element is enabled.
6 AuxE.ROC2.St Stage 2 of residual current auxiliary element operates.
7 AuxE.ROC2.On Stage 2 of residual current auxiliary element is enabled.
8 AuxE.ROC3.St Stage 3 of residual current auxiliary element operates.
9 AuxE.ROC3.On Stage 3 of residual current auxiliary element is enabled.
10 AuxE.OC1.St Stage 1 of phase current auxiliary element operates.
11 AuxE.OC1.StA Stage 1 of phase current auxiliary element operates (phase A).
12 AuxE.OC1.StB Stage 1 of phase current auxiliary element operates (phase B).
13 AuxE.OC1.StC Stage 1 of phase current auxiliary element operates (phase C).
14 AuxE.OC1.On Stage 1 of phase current auxiliary element is enabled.
15 AuxE.OC2.St Stage 2 of phase current auxiliary element operates.
16 AuxE.OC2.StA Stage 2 of phase current auxiliary element operates (phase A).
17 AuxE.OC2.StB Stage 2 of phase current auxiliary element operates (phase B).
18 AuxE.OC2.StC Stage 2 of phase current auxiliary element operates (phase C).
19 AuxE.OC2.On Stage 2 of phase current auxiliary element is enabled.
20 AuxE.OC3.St Stage 3 of phase current auxiliary element operates.
21 AuxE.OC3.StA Stage 1 of phase current auxiliary element operates (phase A).
22 AuxE.OC3.StB Stage 1 of phase current auxiliary element operates (phase B).
23 AuxE.OC3.StC Stage 1 of phase current auxiliary element operates (phase C).
24 AuxE.OC3.On Stage 3 of phase current auxiliary element is enabled.
25 AuxE.UVD.St Voltage change auxiliary element operates.
26 AuxE.UVD.St_Ext Voltage change auxiliary element operates.
27 AuxE.UVD.On Voltage change auxiliary element is enabled.
28 AuxE.UVG.St Phase-to-ground under voltage auxiliary element operates.
29 AuxE.UVG.StA Phase-to-ground under voltage auxiliary element operates (phase A).
30 AuxE.UVG.StB Phase-to-ground under voltage auxiliary element operates (phase B).
31 AuxE.UVG.StC Phase-to-ground under voltage auxiliary element operates (phase C).
32 AuxE.UVG.On Phase-to-ground under voltage auxiliary element is enabled.
33 AuxE.UVS.St Phase-to-phase under voltage auxiliary element operates.
34 AuxE.UVS.StAB Phase-to-phase under voltage auxiliary element operates (phase AB).
35 AuxE.UVS.StBC Phase-to-phase under voltage auxiliary element operates (phase BC).
36 AuxE.UVS.StCA Phase-to-phase under voltage auxiliary element operates (phase CA).
37 AuxE.UVS.On Phase-to-phase under voltage auxiliary element is enabled.

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38 AuxE.ROV.St Residual voltage auxiliary element operates.


39 AuxE.ROV.On Residual voltage auxiliary element is enabled.

3.6.5 Logic

SIG Ia
Calculate residual
SIG Ib current:
3I0=Ia+Ib+Ic
SIG Ic

SIG AuxE.ROC1.En
3I0>[AuxE.ROC1.3I0_Set] &
& AuxE.ROC1.St
SIG AuxE.ROC1.Blk
AuxE.ROC1.On
En AuxE.ROC1.En

SIG AuxE.ROC2.En
3I0>[AuxE.ROC2.3I0_Set] &
& AuxE.ROC2.St
SIG AuxE.ROC2.Blk
AuxE.ROC2.On
En AuxE.ROC2.En

SIG AuxE.ROC3.En
3I0>[AuxE.ROC3.3I0_Set] &
& AuxE.ROC3.St
SIG AuxE.ROC3.Blk
AuxE.ROC3.On
En AuxE.ROC3.En

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SIG Ia Ia>[AuxE.OC1.I_Set] &


AuxE.OC1.StA

SIG Ib Ib>[AuxE.OC1.I_Set] &


AuxE.OC1.StB

SIG Ic Ic>[AuxE.OC1.I_Set] &


AuxE.OC1.StC

>=1
SIG AuxE.OC1.En
&
& AuxE.OC1.St
SIG AuxE.OC1.Blk

En AuxE.OC1.En AuxE.OC1.On

SIG Ia Ia>[AuxE.OC2.I_Set] &


AuxE.OC2.StA

SIG Ib Ib>[AuxE.OC2.I_Set] &


AuxE.OC2.StB

SIG Ic Ic>[AuxE.OC2.I_Set] &


AuxE.OC2.StC

>=1
SIG AuxE.OC2.En
&
& AuxE.OC2.St
SIG AuxE.OC2.Blk

En AuxE.OC2.En AuxE.OC2.On

SIG Ia Ia>[AuxE.OC3.I_Set] &


AuxE.OC3.StA

SIG Ib Ib>[AuxE.OC3.I_Set] &


AuxE.OC3.StB

SIG Ic Ic>[AuxE.OC3.I_Set] &


AuxE.OC3.StC

>=1
SIG AuxE.OC3.En
&
& AuxE.OC3.St
SIG AuxE.OC3.Blk

En AuxE.OC4.En AuxE.OC3.On

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SET UA<[AuxE.UVG.U_Set] &


AuxE.UVG.StA

SET UB<[AuxE.UVG.U_Set] &


AuxE.UVG.StB

SET UC<[AuxE.UVG.U_Set] &


AuxE.UVG.StC

>=1

SIG AuxE.UVG.En
&
& AuxE.UVG.St
SIG AuxE.UVG.Blk

En AuxE.UVG.En
AuxE.UVG.On

SET UAB<[AuxE.UVS.U_Set] &


AuxE.UVS.StAB

SET UBC<[AuxE.UVS.U_Set] &


AuxE.UVS.StBC

SET UCA<[AuxE.UVS.U_Set] &


AuxE.UVS.StCA

>=1

SIG AuxE.UVS.En
&
& AuxE.UVS.St
SIG AuxE.UVS.Blk

En AuxE.UVS.En
AuxE.UVS.On

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SIG AuxE.OCD.St_Ext

>=1
SIG AuxE.ROC1.St
>=1
SIG AuxE.ROC2.St

SIG AuxE.ROC3.St

SIG AuxE.OC1.St
>=1
SIG AuxE.OC2.St

SIG AuxE.OC3.St
>=1
SIG AuxE.UVD.St_Ext >=1 >=1 AuxE.St
>=1
SIG AuxE.UVG.St

SIG AuxE.UVS.St >=1

SIG AuxE.ROV.St

Figure 3.6-1 Logic diagram of auxiliary element

3.6.6 Settings
Table 3.6-2 Settings of auxiliary element

No. Name Range Step Unit Remark


Drop-off time delay of current change
1 AuxE.OCD.t_DDO 0.000~10.000 0.001 s
auxiliary element
Enabling/disabling current change
auxiliary element
2 AuxE.OCD.En 0 or 1
0: disable
1: enable
Current setting of stage 1 residual
3 AuxE.ROC1.3I0_Set (0.050~30.000)×In 0.001 A
current auxiliary element
Enabling/disabling stage 1 residual
current auxiliary element
4 AuxE.ROC1.En 0 or 1
0: disable
1: enable
Current setting of stage 2 residual
5 AuxE.ROC2.3I0_Set (0.050~30.000)×In 0.001 A
current auxiliary element
Enabling/disabling stage 2 residual
current auxiliary element
6 AuxE.ROC2.En 0 or 1
0: disable
1: enable
Current setting of stage 3 residual
7 AuxE.ROC3.3I0_Set (0.050~30.000)×In 0.001 A
current auxiliary element
Enabling/disabling stage 3 residual
8 AuxE.ROC3.En 0 or 1
current auxiliary element

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0: disable
1: enable
Current setting of stage 1 phase current
9 AuxE.OC1.I_Set (0.050~30.000)×In
auxiliary element
Enabling/disabling stage 1 phase
current auxiliary element
10 AuxE.OC1.En 0 or 1
0: disable
1: enable
Current setting of stage 2 phase current
11 AuxE.OC2.I_Set (0.050~30.000)×In
auxiliary element
Enabling/disabling stage 2 phase
current auxiliary element
12 AuxE.OC2.En 0 or 1
0: disable
1: enable
Current setting of stage 3 phase current
13 AuxE.OC3.I_Set (0.050~30.000)×In
auxiliary element
Enabling/disabling stage 3 phase
current auxiliary element
14 AuxE.OC3.En 0 or 1
0: disable
1: enable
Voltage setting for voltage change
15 AuxE.UVD.U_Set 0~Un 0.001 V
auxiliary element
Drop-off time delay of voltage change
16 AuxE.UVD.t_DDO 0.000~10.000 0.001 s
auxiliary element
Enabling/disabling voltage change
auxiliary element
17 AuxE.UVD.En 0 or 1
0: disable
1: enable
Voltage setting for phase-to-ground
18 AuxE.UVG.U_Set 0~Un 0.001 V
under voltage auxiliary element
Enabling/disabling phase-to-ground
under voltage auxiliary element
19 AuxE.UVG.En 0 or 1
0: disable
1: enable
Voltage setting for phase-to-phase
20 AuxE.UVS.U_Set 0~Unn 0.001 V
under voltage auxiliary element
Enabling/disabling phase-to-phase
under voltage auxiliary element
21 AuxE.UVS.En 0 or 1
0: disable
1: enable
Voltage setting for residual voltage
22 AuxE.ROV.3U0_Set 0~Un 0.001 V
auxiliary element
Enabling/disabling residual voltage
23 AuxE.ROV.En 0 or 1
auxiliary element

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3 Operation Theory

0: disable
1: enable

3.7 Distance Protection


3.7.1 General Application
When a fault happens on a power system, distance protection will trip circuit breaker to isolate the
fault from power system with its specific time delay if the fault is within the protected zone of
distance protection.

3.7.2 Function Description


The device provide various distance elements, including 1 DPFC distance zone with fixed forward
direction, 1 forward zones, 4 settable forward or reverse zone, and 1 forward zone and 1 reverse
zone dedicated for pilot distance protection. For each independent distance element zone, full
scheme design provides continuous measurement of impedance separately in each independent
phase-to-phase measuring loops as well as in each independent phase-to-ground measuring
loops. Selection of zone characteristic between mho and quadrilateral is available. Distance
protection includes:

1. DPFC distance protection

It is independent fast protection providing extremely fast speed to clear close up fault
especially on long line and thus improves system stability.

2. Mho phase-to-phase distance protection

Zone 1: forward direction

Zone 2~5: settable forward or reverse direction

3. Mho phase-to-ground distance protection

Zone 1: forward direction

Zone 2~5: settable forward or reverse direction

4. Quadrilateral phase-to-phase distance protection

Zone 1: forward direction

Zone 2~5: settable forward or reverse direction

5. Quadrilateral phase-to-ground distance protection

Zone 1: forward direction

Zone 2~5: settable forward or reverse direction

6. Pilot distance protection

The pilot zone is for PUTT, POTT and blocking scheme. The forward direction element is for
sending signal for POTT and tripping upon receiving permissive signal for both PUTT and

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3 Operation Theory

POTT scheme. The forward direction element for blocking scheme is used to stop sending
blocking signal. The reverse direction element is only for POTT scheme with weak infeed
condition.

7. Load encroachment

It is used to prevent all distance elements from undesired trip due to load encroachment
under heavy load condition especially for long lines.

8. Power swing detection (PSD)

9. Power swing blocking releasing (PSBR)

For power swing with external fault, distance protection is always blocked, but for power
swing with internal fault, PSBR will operate to release the blocking for distance protection.

10. SOTF distance protection

For manual closing or automatic closing on to a fault, zone 2, 3 or 4 of distance protection will
accelerate to trip.

When VT circuit fails, VT circuit supervision logic will output a blocking signal to block all distance
protection except DPFC distance protection. The operating threshold will be increased to 1.5UN to
enhance stability.

Distance protection can select line VT or bus VT for protection algorithm by a setting
[VTS.En_LineVT]. When no VT is provided, logic setting [VTS.En_Out_VT] should be set as “1”,
all distance protection will be blocked automatically. The choice of impedance reach is as follow.
(only for reference)

The zone 1 impedance reach setting should be set to cover as much the protected line as possible
but not to respond faults beyond the protected line. The accuracy of the relay distance elements is
±2.5% in general applications, however, the error could be much larger due to errors of current
transformer, voltage transformer and inaccuracies of line parameter from which the relay settings
are calculated. It is recommended the zone 1 reach is set to 80%~85% of the protected line in
consideration the aforesaid errors and safety margin to prevent instantaneously tripping for faults
on adjacent lines. The remaining 20% of the protected line relies on the zone 2 distance elements.
With the pilot scheme distance protection, fast fault clearance could also be achieved for end zone
faults at both ends of the protected line.

The general rule for zone 2 impedance reach setting is set to cover the protected line plus 20% of
the adjacent line. However, the coverage of adjacent line should be extended in the presence of
additional infeed at the remote end of the protected line to ensure 20% coverage of adjacent line.
This assures the fast operation of zone 2 distance element for faults at the remote end of the
protected line since the fault is well within zone 2 reach. This is important for pilot protection as the
impedance reach of pilot zone is the same as that of zone 2 distance element. In a parallel line
situation, a fault cleared sequentially on a line may cause current reversal in the healthy line. If the
pilot zone settings are set to cover 50% of adjacent line and the POTT or Blocking scheme is used,
the current reversal in the healthy line could cause relay mal-operation. Therefore, current reversal
logic is required and explained in section 3.9.2.6.

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3 Operation Theory

For different system impedance ratio (SIR), the operating time of distance protection for different
fault location are shown as the following figures.

35

30

25
Operating Time (ms)

20

15

10

0
0 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%

Figure 3.7-1 Operating time of single-phase fault (50Hz, SIR=1)

30

25
Operating Time (ms)

20

15

10

0
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%

Figure 3.7-2 Operating time of single-phase fault (60Hz, SIR=1)

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3 Operation Theory

35

30

25
Operating Time (ms)

20

15

10

0
0 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%

Fault Location (% of relay setting)

Figure 3.7-3 Operating time of two-phase fault (50Hz, SIR=1)

30

25
Operating Time (ms)

20

15

10

0
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%

Fault Location (% of relay setting)

Figure 3.7-4 Operating time of two-phase fault (60Hz, SIR=1)

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35

30

25
Operating Time (ms)

20

15

10

0
0 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%

Fault Location (% of relay setting)

Figure 3.7-5 Operating time of three-phase fault (50Hz, SIR=1)

30

25
Operating Time (ms)

20

15

10

0
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%

Fault Location (% of relay setting)

Figure 3.7-6 Operating time of three-phase fault (60Hz, SIR=1)

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3 Operation Theory

33
32.5
32
Operating Time (ms)

31.5
31
30.5
30
29.5
29
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%

Fault Location (% of relay setting)

Figure 3.7-7 Operating time of single-phase fault (50Hz, SIR=30)

27.5

27
Operating Time (ms)

26.5

26

25.5

25

24.5

24
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%

Fault Location (% of relay setting)

Figure 3.7-8 Operating time of single-phase fault (60Hz, SIR=30)

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45
40
35
30
Operating Time (ms)

25
20
15
10
5
0
0 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%

Fault Location (% of relay setting)

Figure 3.7-9 Operating time of two-phase fault (50Hz, SIR=30)

35

30
Operating Time (ms)

25

20

15

10

0
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%

Fault Location (% of relay setting)

Figure 3.7-10 Operating time of two-phase fault (60Hz, SIR=30)

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3 Operation Theory

33

32

31
Operating Time (ms)

30

29

28

27
0 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%

Fault Location (% of relay setting)

Figure 3.7-11 Operating time of three-phase fault (50Hz, SIR=30)

27.5
27
26.5
Operating Time (ms)

26
25.5
25
24.5
24
23.5
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%

Fault Location (% of relay setting)

Figure 3.7-12 Operating time of three-phase fault (60Hz, SIR=30)

3.7.3 DPFC Distance Protection


The power system is normally treated as a balanced symmetrical three-phase network. When a
fault occurs in the power system, by applying the principle of superposition, the load current and
voltage can be calculated in the system prior to the fault and the pure fault component can be
calculated by fault current or voltage subtracted by pre-fault load current or voltage. DPFC
distance protection concerns change of current and voltage at power frequency, therefore, DPFC
distance protection is not influenced by load current.

As an independent fast protection, DPFC distance protection is mainly used to clear close up fault
of long line quickly, its protected range can set as 80%~85% of the whole line.

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Since DPFC distance protection only reflects fault component and is not influenced by current
change due to load variation and power swing, power swing blocking (PSB) is this not required.
Moreover, there is no transient overreaching due to infeed current from the remote power supply
because it is not influenced by load current.

DPFC distance protection may not overreach, and its protected zone will be inverse-proportion
reduced with system impedance behind it, i.e. the protected zone will be less than setting if the
system impedance is greater. The protected zone will be close to setting value if the system
impedance is smaller. Therefore, DPFC distance protection is usually used for long transmission
line with large power source and it is recommended to disable DPFC distance protection for short
line or the line with weak power source.

3.7.3.1 Impedance Characteristic

Figure 3.7-13 Operation characteristic for forward fault

Where:

ZZD: the setting of DPFC distance protection

ZS: total impedance between local system and device location

ZK: measurement impedance

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Φ: positive-sequence sensitive angle, i.e. [21-1.phi1_Reach]

Figure 3.7-13 shows the operation characteristic of DPFC distance protection on R-X plane when
a fault occurs in forward direction, which is the circle with the –Zs as the center and the│Zs+Zzd│ as
the radius. When measured impedance Zk is in the circle, DPFC distance protection will operate.
DPFC distance protection has a larger capability of enduring fault resistance than distance
protection using positive-sequence as polarized voltage.

ZZD

F M N
Z
EM EN
∆I
ZK
Z′S

jX

Z's

Zzd

Φ R

-Zk

Figure 3.7-14 Operation characteristic for reverse fault

Z'S:total impedance between remote system and protective device location

Figure 3.7-14 shows the operation characteristic of the DPFC distance element on R-X plane
when a fault occurs in reverse direction, which is the circle with the Z′S as the center and
the│Z′S-Zzd│as the radius. The region of operation is in the quadrant 1 but the measured
impedance -Zk is always in the quadrant 3, the DPFC distance protection will not operate.

The DPFC distance protection can be enabled or disabled by logic setting and binary input.

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3.7.3.2 Function Block Diagram

3.7.3.3 I/O Signals

Table 3.7-1 I/O signals of DPFC distance protection

No. Input Signal Description


DPFC distance protection enabling input, it is triggered from binary input or
1 21D.En
programmable logic etc.
DPFC distance protection blocking input, it is triggered from binary input or
2 21D.Blk
programmable logic etc.
No. Output Signal Description
1 21D.Op DPFC distance protection operates.
2 21D.On DPFC distance protection is enabled.

3.7.3.4 Logic

Figure 3.7-15 Logic diagram of DPFC distance protection

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3 Operation Theory

Note!

PD signal only blocks DPFC distance element of corresponding phase (i.e. broken phase),
and healthy phases (operation phases) are not affected.

3.7.3.5 Settings

Table 3.7-2 Settings of DPFC distance protection

No. Name Range Step Unit Remark


Impedance setting of DPFC distance
1 21D.Z_Set (0.000~4Unn)/In 0.001 ohm
protection
Enabling/disabling DPFC distance
protection
2 21D.En 0 or 1
0: disable
1: enable

3.7.4 Load Encroachment

3.7.4.1 Impedance Characteristic

When distance protection is used to protect long, heavily loaded lines, the risk of encroachment of
the load impedance into the tripping characteristic of the distance protection may exist. A load
trapezoid characteristic for all zones is used to exclude the risk of unwanted fault detection by the
distance protection during heavy load flow.

As shown below, if the measured impedance into the load area, distance elements need to be
blocked.

jX

φLoad φLoad

Load Area Load Area


R

RLoad RLoad

Figure 3.7-16 Distance element with load trapezoid

Two settings are equipped to exclude the encroachment of the load impedance:

RLoad: the minimum load resistance

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φLoad: the load area angle

These values are common for all zones.

3.7.4.2 Function Block Diagram

3.7.4.3 I/O Signals

Table 3.7-3 I/O signals of load encroachment

No. Input Signal Description


Load trapezoid characteristic enabling input, it is triggered from binary input or
1 LoadEnch.En
programmable logic etc.
Load trapezoid characteristic blocking input, it is triggered from binary input or
2 LoadEnch.Blk
programmable logic etc.
No. Output Signal Description
Measured impedance is inside the load area.
If load trapezoid characteristic is enabled and measured impedance is inside the
1 LoadEnch.St load area, LoadEnch.St=1
If load trapezoid characteristic is disabled or measured impedance is outside the
load area, LoadEnch.St=0
2 LoadEnch.On Load trapezoid characteristic is enabled.

3.7.4.4 Settings

Table 3.7-4 Settings of load encroachment

No. Name Range Step Unit Remark


Angle setting of load trapezoid
characteristic, it should be set
1 LoadEnch.phi 0~45 1 deg according to the maximum load area
angle (φLoad_Max), φLoad_Max+5° is
recommended.
Resistance setting of load trapezoid
characteristic, it should be set
2 LoadEnch.R_Set (0.05~200)/In 0.01 ohm according to the minimum load
resistance, 70%~90% minimum load
resistance is recommended.
3 LoadEnch.En 0,1 Enabling/disabling load trapezoid

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3 Operation Theory

characteristic
0: disable
1: enable

3.7.5 Mho Distance Protection

3.7.5.1 Impedance Characteristic

1. Phase-to-ground distance element

ZZD

M F N
Z IN
EM EN
I

ZS ZK

jX

ZZD

ZK

Φ
R

-2ZS/3

Figure 3.7-17 Phase-to-ground operation characteristic for forward fault

Where:

ZZD: the setting of distance protection

ZS: total impedance between local system and protective device location

ZK: measurement impedance

Φ: positive-sequence sensitive angle, i.e. [21-x.phi1_Reach] (x=1, 2, 3, 4, 5)

Phase-to-neutral positive sequence voltage is used as polarized signal for phase-to-ground


distance protection. Phase-to-ground distance protection is controlled by the fault detector based
on residual current.

For zone 1, 2:

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Operation voltage:

Polarized voltage:

In short line, phase shift θ1 could be applied to the polarized voltage to improve the performance
against high resistance fault. The device provides an angle-shift setting, [21Mx.ZG.phi_Shift], to
set value of θ1 among 0°, 15° and 30°. Their impedance shift characteristics towards quadrant 1
are respectively shown as the impedance circle A, B and C in Figure 3.7-22. (x=1, 2)

For zone 3, 4, 5:

Operation voltage:

Polarized voltage:

UPΦ uses phase positive-sequence voltage as polarized voltage. For earth fault, positive-sequence
voltage is mainly formed from healthy phases, basically retaining the phase of the
positive-sequence voltage before fault.

Phase comparison equation is:

The operation characteristic is shown in Figure 3.7-17. Operation characteristic of ZK on R-X plane
is a circle with line connecting ends of ZZD and -2ZS/3 as the diameter. The origin is enclosed in the
circle.

2. Phase-to-phase distance element

Figure 3.7-18 Phase-to-phase operation characteristic for forward fault

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3 Operation Theory

Phase-to-phase positive sequence voltage is used as polarized signal for phase-to-phase


distance protection.

For zone 1, 2:

Operation voltage:

Polarized voltage:

Phase shift θ2 could be applied to polarized voltage of zones 1 and 2 just like θ1 in
phase-to-ground distance element. It is also used for improving performance against high
resistance fault in short line. The device provides an angle-shift setting, [21Mx.ZP.phi_Shift], to set
value of θ2 among 0°, 15° and 30°. Their impedance shift characteristics towards quadrant 1 are
respectively shown as the impedance circle A, B and C in Figure 3.7-22. (x=1, 2)

For zone 3, 4, 5:

Operation voltage:

Polarized voltage:

Phase-to-phase positive-sequence voltage is applied as the polarized voltage of this element.

Phase comparison equation is:

The operation characteristic of phase-to-phase distance element is shown in Figure 3.7-18.


Operation characteristic of ZK on R-X plane is a circle with line connecting ends of ZZD and -ZS/2 as
the diameter. The origin is enclosed in the circle.

Figure 3.7-19 shows operation characteristic of measured impedance -ZK on R-X plane when an
asymmetric reverse fault occurs. This characteristic is a circle with line connecting ends of ZZD and
Z'S as the diameter. It will operate only when -ZK is in the circle. Therefore, directionality of the
distanced protection is achieved.

ZZD

F M N
Z
EM EN

ZK
Z′S

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Figure 3.7-19 Operation characteristic for reverse fault

Z'S: total impedance between remote system and protective device location

jX

ZZD

ZK

Φ
R

Figure 3.7-20 Steady-state characteristic of three-phase short-circuit fault

Phase-to-phase distance protection is also used for three-phase short-circuit fault. The operation
characteristic is shown in Figure 3.7-20. Operation characteristic of ZK on R-X plane is a circle with
setting impedance ZZD as the diameter.

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Figure 3.7-21 Operation characteristic of three-phase close up short-circuit fault

Where:

ZZD: the setting of distance protection (zone x)

ZS: total impedance between local system and protective device location

ZK: measured impedance

Φ: positive-sequence characteristic angle, i.e. [21-x.phi1_Reach] (x=1, 2, 3, 4, 5)

Circle A: transient characteristic

Circle B: steady-state characteristic shifting towards quadrant Ⅲ

Circle C: steady-state characteristic shifting towards quadrant Ⅰ

As shown in Figure 3.7-21, the characteristic of the distance protection for a three-phase fault on a
system is an impedance circle cross the origin, and there is a voltage dead zone around the origin.
In order to eliminate the dead zone of the distance protection for a close up three-phase fault
memorized positive-sequence voltage is adopted as polarized voltage when the
positive-sequence voltage drops down to 15%Un or below.

The transient (during process of memory) operation characteristic is shown as the impedance
circle A in the above figure. The circle takes ZZD and -ZZS as diameter and thus the origin is within
the impedance circle. When three-phase fault happens in reverse direction, its transient
characteristic is shown in Figure 3.7-19, i.e. the distance protection has a clearly defined
directionality and no dead zone during the process of memory.

For phase-to-phase distance protection, if distance protection operates with memorized polarizing
voltage, this means a close up forward fault. When the memory fades out, the operation
characteristic will be reverse offset a little to enclose the origin as impedance circle B shown in
Figure 3.7-21 to ensure keeping operating of distance protection until the fault being cleared. If
distance protection does not operate with memorized polarizing voltage, it will be a close up

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reverse fault. When the memory fades out, the operation characteristic will be forward offset not to
enclose the origin as impedance circle C shown in Figure 3.7-21, and the distance protection will
not mal-operate even if voltage is zero.

The distance protection with such design thoroughly eliminates the dead zone when three-phase
close up fault occurs. It also has favorable directivity and will not operate for a reverse three-phase
fault at busbar.

When receiving manual closing signal or 3-pole reclosing signal, the operation characteristic of
phase to phase distance protection will always shift in reverse direction. It is ensured to enclose
the origin of impedance and without dead zone for three-phase fault, i.e. the reverse shift
impedance circle B shown in Figure 3.7-21.

jX

B: 15° C: 30°
ZZD
A: 0°
D

-ZS

Figure 3.7-22 Shift impedance characteristic of zone 1 and zone 2

The impedance characteristic of phase-to-ground distance protection is the circle with line
connecting ends of ZZD and -2ZS/3 as the diameter and that of phase-to-phase distance is the
circle with line connecting ends of ZZD and -ZS/2 as the diameter.

In order to prevent the transient overreach caused by the infeed power supply from the remote
end, the zero-sequence reactance line D is added. These measures have enhanced the capacity
against fault resistance when using distance protection in short lines.

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3.7.5.2 Function Block Diagram

21M

21.En 21Mx.On

21.Blk 21Mx.Op

21Mx.ZG.En

21Mx.ZP.En

21Mx.ZG.Blk

21Mx.ZP.Blk

21Mx.En_ShortDly

21Mx.Blk_ShortDly

21M1.En_Instant

3.7.5.3 I/O Signals

Table 3.7-5 I/O signals of distance protection (Mho)

No. Input Signal Description


Distance protection enabling input, it is triggered from binary input or
1 21.En
programmable logic etc.
Distance protection blocking input, it is triggered from binary input or
2 21.Blk
programmable logic etc.
Zone x of phase-to-ground distance protection enabling input, default value is
3 21Mx.ZG.En
“1” (x=1, 2, 3, 4, 5)
Zone x of phase-to-ground distance protection blocking input, default value is
4 21Mx.ZG.Blk
“0” (x=1, 2, 3, 4, 5)
Zone x of phase-to-phase distance protection enabling input, default value is
5 21Mx.ZP.En
“1” (x=1, 2, 3, 4, 5)
Zone x of phase-to-phase distance protection blocking input, default value is
6 21Mx.ZP.Blk
“0” (x=1, 2, 3, 4, 5)
7 21Mx.En_ShortDly Enable accelerating zone x of distance protection (x=2, 3, 4, 5)
8 21Mx.Blk_ShortDly Accelerating zone x of distance protection is disabled (x=2, 3, 4, 5)
9 21M1.En_Instant Enable zone 1 of distance protection operates without time delay
No. Output Signal Description
1 21Mx.On Zone x of distance protection is enabled (x=1, 2, 3, 4, 5)
2 21Mx.Op Zone x of distance protection operates (x=1, 2, 3, 4, 5)

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3.7.5.4 Logic

Figure 3.7-23 Logic diagram of enabling distance protection (Mho)

SIG 21M1.Rls_PSBR

SIG FD.Pkp &


&
SIG 21M1.ZG.Enable [21M1.ZG.t_Op] 0 >=1
21M1.ZG.Op
SIG Flag.21M1.ZG & &
SIG LoadEnch.St (PG) &

SET 3I0>[FD.ROC.3I0_Set]
>=1
SIG Flag.21M1.ZP & 21M1.Flg_PSBR

SIG LoadEnch.St (PP)


&
SIG FD.Pkp & [21M1.ZP.t_Op] 0 >=1
21M1.ZP.Op
SIG 21M1.ZP.Enable
&

SIG 21M1.En_Instant

SIG 21M1.ZG.Op >=1


21M1.Op
SIG 21M1.ZP.Op

Figure 3.7-24 Logic diagram of distance protection (Mho zone 1)

Where:

21M1.Rls_PSBR: is the signal of power swing blocking releasing signal, please refer to Figure

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3.7-36.

Flag.21M1.ZG means that measured impedance by zone 1 of phase-to-ground distance


protection is within the range determined by the setting [21M1.ZG.Z_Set].

Flag.21M1.ZP means that measured impedance by zone 1 of phase-to-phase distance protection


is within the range determined by the setting [21M1.ZP.Z_Set].

LoadEnch.St (PG) means that load trapezoid characteristic for distance element is enabled and
measured phase-to-ground impedance into the load area.

LoadEnch.St (PP) means that load trapezoid characteristic for distance element is enabled and
measured phase-to-phase impedance into the load area.

SIG 21.Enable
&
EN [21Mx.ZG.En]
& 21Mx.ZG.Enable
&
SIG 21Mx.ZG.En

SIG 21Mx.ZG.Blk >=1


EN [21Mx.ZP.En]
& 21Mx.On

&
SIG 21Mx.ZP.En

SIG 21Mx.ZP.Blk
&
SIG VTS.Alm >=1 21Mx.ZP.Enable

EN [VTS.En_Out_VT]

SIG 21Mx.En_ShortDly &

SIG 21Mx.Blk_ShortDly
&
EN [21Mx.En_ShortDly] 21Mx.Enable_ShortDly

SIG 21Mx.On

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SIG 21Mx.Enable_ShortDly &


[21Mx.ZG.t_ShortDly] 0 >=1
SIG 21Mx.Rls_PSBR
21Mx.ZG.Op
SIG 21Mx.ZG.Enable & &
[21Mx.ZG.t_Op] 0
SIG FD.Pkp

SIG Flag.21Mx.ZG &


>=1
SIG LoadEnch.St (PG) & 21Mx.Flg_PSBR

SET 3I0>[FD.ROC.3I0_Set]

SIG Flag.21Mx.ZP &

SIG LoadEnch.St (PP)


&
SIG 21Mx.ZP.Enable & [21Mx.ZP.t_Op] 0
>=1
SIG FD.Pkp
& 21Mx.ZP.Op
[21Mx.ZP.t_ShortDly] 0
SIG 21Mx.Enable_ShortDly

SIG 21Mx.ZG.Op >=1


21Mx.Op
SIG 21Mx.ZP.Op

Figure 3.7-25 Logic diagram of distance protection (Mho zone x)

Where:

x=2, 3, 4, 5

21Mx.Rls_PSBR: is the signal of power swing blocking releasing signal, please refer to Figure
3.7-36.

Flag.21Mx.ZG means that measured impedance by zone x of phase-to-ground distance protection


is within the range determined by the setting [21Mx.ZG.Z_Set].

Flag.21Mx.ZP means that measured impedance by zone x of phase-to-phase distance protection


is within the range determined by the setting [21Mx.ZP.Z_Set].

3.7.5.5 Settings

Table 3.7-6 Settings of distance protection (Mho)

No. Name Range Step Unit Remark


Direction option for zone x of distance
protection (x=2, 3, 4, 5)
1 21-x.DirMode 0 or 1 0
0: Forward
1: Reverse
Real component of zero-sequence
2 21-x.Real_K0 -4.000~4.000 0.001 compensation coefficient for zone x
(x=1, 2, 3, 4, 5)
3 21-x.Imag_K0 -4.000~4.000 0.001 Imaginary component of zero-sequence

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compensation coefficient for zone x


(x=1, 2, 3, 4, 5)
Phase angle of positive-sequence
4 21-x.phi1_Reach 30.00~89.00 0.01 deg
impedance for zone x (x=1, 2, 3, 4, 5)
Phase shift of phase-to-ground distance
5 21Mx.ZG.phi_Shift 0, 15 or 30 deg
protection for zone x (x=1, 2)
Phase shift of phase-to-phase distance
6 21Mx.ZP.phi_Shift 0, 15 or 30 deg
protection for zone x (x=1, 2)
Impedance setting of zone x of
7 21Mx.ZG.Z_Set (0.000~4Unn)/In 0.001 ohm phase-to-ground distance protection
(x=1, 2, 3, 4, 5)
Time delay of zone x of phase-to-ground
8 21Mx.ZG.t_Op 0.000~10.000 0.001 s
distance protection (x=1, 2, 3, 4, 5)
Short time delay of zone x of
9 21Mx.ZG.t_ShortDly 0.000~10.000 0.001 s phase-to-ground distance protection
(x=2, 3, 4, 5)
Enabling/disabling zone x of
phase-to-ground distance protection
10 21Mx.ZG.En 0 or 1 (x=1, 2, 3, 4, 5)
0: disable
1: enable
Enabling/disabling phase-to-ground
zone x of distance protection operation
11 21Mx.ZG.En_BlkAR 0 or 1 to block AR (x=1, 2, 3, 4, 5)
0: disable
1: enable
Impedance setting of zone x of
12 21Mx.ZP.Z_Set (0.000~4Unn)/In 0.001 ohm phase-to-phase distance protection
(x=1, 2, 3, 4, 5)
Time delay of zone x of phase-to-phase
13 21Mx.ZP.t_Op 0.000~10.000 0.001 s
distance protection (x=1, 2, 3, 4, 5)
Short time delay of zone x of
14 21Mx.ZP.t_ShortDly 0.000~10.000 0.001 s phase-to-phase distance protection
(x=2, 3, 4, 5)
Enabling/disabling zone x of
phase-to-phase distance protection
15 21Mx.ZP.En 0 or 1 (x=1, 2, 3, 4, 5)
0: disable
1: enable
Enabling/disabling phase-to-phase zone
x of distance protection operation to
16 21Mx.ZP.En_BlkAR 0 or 1 block AR (x=1, 2, 3, 4, 5)
0: disable
1: enable

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Enabling/disabling fixed accelerate zone


x of distance protection (x=2, 3, 4, 5)
17 21Mx.En_ShortDly 0 or 1
0: disable
1: enable

3.7.6 Quadrilateral Distance Protection

3.7.6.1 Impedance Characteristic

Features available with quadrilateral distance protection include 1 forward zone (zone 1)
phase-to-ground or phase-to-phase distance elements and 4 settable forward or reverse zones
(zone 2~5) phase-to-ground or phase-to-phase distance element. Each zone can respectively
enable or disable power swing blocking releasing. Quadrilateral distance protection will be
disabled when VT circuit fails.

1. Forward distance element

Quadrilateral forward distance element characteristic is shown as follows:

jX

A ZZD
θ
B

α φ
φ

β R
O RZD
C

Figure 3.7-26 Quadrilateral forward distance element characteristics

Where:

ZZD: impedance setting in forward direction

RZD: resistance setting in forward direction

φ: line positive-sequence characteristic angle

α: the angle of directional line in the second quadrant, set by the setting [21Q.Ang_Alpha]

β: the angle of directional line in the fourth quadrant, fixed at 15 °

θ: downward offset angle of the reactance line AB

2. Reverse distance element

Zone2, 3, 4, 5 can be set as reverse direction by the setting [21-x.DirMode] (x=2, 3, 4, 5). When a

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3 Operation Theory

fault occurs on the busbar at the back, reverse distance element is provided to clear it with definite
time delay and is used as backup protection for reverse busbar fault.

Figure 3.7-27 Quadrilateral reverse distance element characteristic

Where:

ZZD: impedance setting in reverse direction

RZD: resistance setting in reverse direction

φ: line positive-sequence characteristic angle

α: the angle of directional line, set by the setting [21Q.Ang_Alpha]

β: the angle of directional line, fixed at 15°

θ: downward offset angle of the reactance line AB

For quadrilateral distance protection, the reactance line should consider downward offset angle θ
as shown in Figure 3.7-26 and Figure 3.7-27. According to system status, the downward offset
angle can be independently set for phase-to-ground distance element and phase-to-phase
distance element. The downward offset angle of all zones can be settable by the corresponding
settings [21Qx.ZG.RCA] and [21Qx.ZP.RCA]. (x=1, 2, 3, 4, 5). Phase-to-ground distance
protection is controlled by the fault detector based on residual current.

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3.7.6.2 Function Block Diagram

3.7.6.3 I/O Signals

Table 3.7-7 I/O signals of distance protection (Quad)

No. Input Signal Description


Distance protection enabling input, it is triggered from binary input or
1 21.En
programmable logic etc.
Distance protection blocking input, it is triggered from binary input or
2 21.Blk
programmable logic etc.
Zone x of phase-to-ground distance protection enabling input, default value is
3 21Qx.ZG.En
“1” (x=1, 2, 3, 4, 5)
Zone x of phase-to-ground distance protection blocking input, default value is
4 21Qx.ZG.Blk
“0” (x=1, 2, 3, 4, 5)
Zone x of phase-to-phase distance protection enabling input, default value is
5 21Qx.ZP.En
“1” (x=1, 2, 3, 4, 5)
Zone x of phase-to-phase distance protection blocking input, default value is “0”
6 21Qx.ZP.Blk
(x=1, 2, 3, 4, 5)
7 21Qx.En_ShortDly Enable accelerating zone x of distance protection (x=2, 3, 4, 5)
8 21Qx.Blk_ShortDly Accelerating zone x of distance protection is disabled (x=2, 3, 4, 5)
9 21Q1.En_Instant Enable zone 1 of distance protection operates without time delay
No. Output Signal Description
1 21Qx.On Zone x of distance protection is enabled (x=1, 2, 3, 4, 5)
2 21Qx.Op Zone x of distance protection operates (x=1, 2, 3, 4, 5)

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3.7.6.4 Logic

Figure 3.7-28 Logic diagram of enabling distance protection (Quad)

SIG 21Q1.ZG.Enable &


&
SIG FD.Pkp

SIG LoadEnch.St (PG)


&
& [21Q1.ZG.t_Op] 0 >=1
SET 3I0>[FD.ROC.3I0_Set] 21Q1.ZG.Op
&
SIG Flag.21Q1.ZG

SIG 21Q1.Rls_PSBR >=1


21Q1.Flg_PSBR
SIG FD.Pkp &

SIG 21Q1.ZP.Enable
&
SIG LoadEnch.St (PP) & &
[21Q1.ZP.t_Op] 0 >=1
SIG Flag.21Q1.ZP 21Q1.ZP.Op
&

SIG 21Q1.En_Instant

SIG 21Q1.ZG.Op >=1


21Q1.Op
SIG 21Q1.ZP.Op

Figure 3.7-29 Logic diagram of distance protection (Quad zone 1)

Where:

21Q1. Rls_PSBR: is the signal of power swing blocking releasing signal, please refer to Figure

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3.7-36.

Flag.21Q1.ZG means that measured impedance by zone 1 of phase-to-ground distance protection


is within the range determined by the settings [21Q1.ZG.Z_Set] and [21Q1.ZG.R_Set].

Flag.21Q1.ZP means that measured impedance by zone 1 of phase-to-phase distance protection


is within the range determined by the settings [21Q1.ZP.Z_Set] and [21Q1.ZP.R_Set].

LoadEnch.St (PG) means that load trapezoid characteristic for distance element is enabled and
measured phase-to-ground impedance into the load area.

LoadEnch.St (PP) means that load trapezoid characteristic for distance element is enabled and
measured phase-to-phase impedance into the load area.

SIG 21.Enable
&
EN [21Qx.ZG.En]
& 21Qx.ZG.Enable
&
SIG 21Qx.ZG.En

SIG 21Qx.ZG.Blk >=1


EN [21Qx.ZP.En]
& 21Qx.On

&
SIG 21Qx.ZP.En

SIG 21Qx.ZP.Blk
&
SIG VTS.Alm >=1 21Qx.ZP.Enable

EN [VTS.En_Out_VT]

SIG 21Qx.En_ShortDly &

SIG 21Qx.Blk_ShortDly
&
EN [21Qx.En_ShortDly] 21Qx.Enable_ShortDly

SIG 21Qx.On

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SIG 21Qx.Enable_ShortDly

SIG 21Qx.ZG.Enable &


&
SIG FD.Pkp & [21Qx.ZG.t_ShortDly] 0 >=1
SET 3I0>[FD.ROC.3I0_Set]
& 21Qx.ZG.Op

& [21Qx.ZG.t_Op] 0
SIG LoadEnch.St (PG)

SIG Flag.21Qx.ZG
>=1
SIG 21Qx.Rls_PSBR 21Qx.Flg_PSBR

SIG LoadEnch.St (PP) &


& &
SIG Flag.21Qx.ZP & [21Qx.ZP.t_ShortDly] 0 >=1
21Qx.ZP.Op
SIG 21Qx.ZP.Enable &
[21Qx.ZP.t_Op] 0
SIG FD.Pkp

SIG 21Qx.ZG.Op >=1


21Qx.Op
SIG 21Qx.ZP.Op

Figure 3.7-30 Logic diagram of distance protection (Quad zone x)

Where:

x=2, 3, 4, 5

21Qx.Z.Rls_PSBR: is the signal of power swing blocking releasing signal, please refer to Figure
3.7-36.

Flag.21Qx.ZG means that measured impedance by zone x of phase-to-ground distance protection


is within the range determined by the settings [21Qx.ZG.Z_Set] and [21Qx.ZG.R_Set].

Flag.21Qx.ZP means that measured impedance by zone x of phase-to-phase distance protection


is within the range determined by the settings [21Qx.ZP.Z_Set] and [21Qx.ZP.R_Set].

3.7.6.5 Settings

Table 3.7-8 Settings of distance protection (Quad)

No. Name Range Step Unit Remark


1 21Q.Ang_Alpha 5~30 1 deg The angle of directional line
Direction option for zone x of distance
protection (x=2, 3, 4, 5)
2 21-x.DirMode 0 or 1 0
0: Forward
1: Reverse
Real component of zero-sequence
3 21-x.Real_K0 -4.000~4.000 0.001 compensation coefficient for zone x
(x=1, 2, 3, 4, 5)
Imaginary component of
4 21-x.Imag_K0 -4.000~4.000 0.001
zero-sequence compensation

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coefficient for zone x (x=1, 2, 3, 4, 5)


Phase angle of positive-sequence
5 21-x.phi1_Reach 30~89 1 deg
impedance for zone x (x=1, 2, 3, 4, 5)
Downward offset angle of the
reactance line for zone x of
6 21Qx.ZG.RCA 0~45 1 deg
phase-to-ground distance protection
(x=1,2,3, 4, 5)
Impedance setting of zone x of
7 21Qx.ZG.Z_Set (0.000~4Unn)/In 0.001 ohm phase-to-ground distance protection
(x=1, 2, 3, 4, 5)
Resistance setting of zone x of
8 21Qx.ZG.R_Set (0.000~4Unn)/In 0.001 ohm phase-to-ground distance protection
(x=1, 2, 3, 4, 5)
Time delay of zone x of
9 21Qx.ZG.t_Op 0.000~10.000 0.001 s phase-to-ground distance protection
(x=1, 2, 3, 4, 5)
Short time delay of zone x of
10 21Qx.ZG.t_ShortDly 0.000~10.000 0.001 s phase-to-ground distance protection
(x=2, 3, 4, 5)
Enabling/disabling zone x of
phase-to-ground distance protection
11 21Qx.ZG.En 0 or 1 (x=1, 2, 3, 4, 5)
0: disable
1: enable
Enabling/disabling phase-to-ground
zone x of distance protection operation
12 21Qx.ZG.En_BlkAR 0 or 1 to block AR (x=1, 2, 3, 4, 5)
0: disable
1: enable
Downward offset angle of the
reactance line for zone x of
13 21Qx.ZP.RCA 0~45 1 deg
phase-to-phase distance protection
(x=1,2,3, 4, 5)
Impedance setting of zone x of
14 21Qx.ZP.Z_Set (0.000~4Unn)/In 0.001 ohm phase-to-phase distance protection
(x=1, 2, 3, 4, 5)
Resistance setting of zone x of
15 21Qx.ZP.R_Set (0.000~4Unn)/In 0.001 ohm phase-to-phase distance protection
(x=1, 2, 3, 4, 5)
Time delay of zone x of
16 21Qx.ZP.t_Op 0.000~10.000 0.001 s phase-to-phase distance protection
(x=1, 2, 3, 4, 5)
Short time delay of zone x of
17 21Qx.ZP.t_ShortDly 0.000~10.000 0.001 s
phase-to-ground distance protection

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(x=2, 3, 4, 5)
Enabling/disabling zone x of
phase-to-phase distance protection
18 21Qx.ZP.En 0 or 1 (x=1, 2, 3, 4, 5)
0: disable
1: enable
Enabling/disabling phase-to-phase
zone x of distance protection operation
19 21Qx.ZP.En_BlkAR 0 or 1 to block AR (x=1, 2, 3, 4, 5)
0: disable
1: enable
Enabling/disabling fixed accelerate
zone x of distance protection (x=2, 3,
20 21Qx.En_ShortDly 0 or 1 4, 5)
0: disable
1: enable

3.7.7 Pilot Distance Zone

3.7.7.1 Impedance Characteristic

An independent pilot zone distance protection is used for PUTT and POTT scheme. There is also
a reverse pilot distance element available as an option for application of POTT on weak power
source system.

Figure 3.7-31 Protected zone of pilot distance protection

The operation characteristic of pilot zone is same as that of zone 2, including mho and
quadrilateral characteristic.

When an internal fault occurs, distance protection at weak source end may not operate due to
small fault current. Thus, a reverse distance element is provided to coordinate with the
independent pilot distance protection to implement weak infeed logic, ensure pilot distance
protection can operate to send signal or trip in the weak end. The operation characteristic is shown
in Figure 3.7-32. The reverse weak infeed distance element is forward offset with 1/4 of the
reverse setting to enclose the origin.

Operation characteristics of pilot reverse weak infeed element distance are shown as below.

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jX
jX
B
β 21Q.Pilot.Z_Rev/4
21M.Pilot.Z_Rev/4
21Q.Pilot.R_Rev
Φ
o R
α
R φ φ

C
θ
21M.Pilot.Z_Rev 21Q.Pilot.Z_Rev
A

Figure 3.7-32 Pilot reverse weak infeed element

Where:

Φ: positive-sequence characteristic angle, i.e. [21.Pilot.phi1_Reach]

α: the angle of directional line, set by the setting [21Q.Ang_Alpha]

β: the angle of directional line, fixed at 15°

θ: tilted angle of the reactance line AC, fixed at 12°

3.7.7.2 Logic

Figure 3.7-33 Logic diagram of pilot distance zone (Mho characteristic)

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Figure 3.7-34 Logic diagram of pilot distance zone (Quad characteristic)

Where:

21M.Pilot.Rls_PSBR, 21Q.Pilot.Rls_PSBR: Please refer to Figure 3.7-36.

LoadEnch.St (PG) means that load trapezoid characteristic for distance element is enabled and
measured phase-to-ground impedance into the load area.

LoadEnch.St (PP) means that load trapezoid characteristic for distance element is enabled and
measured phase-to-phase impedance into the load area.

Flag.21Q.Pilot.Z (PG) means that measured impedance by phase-to-ground distance element is


within the range determined by the setting [21Q.Pilot.Z_Set]. (Quad characteristic)

Flag.21Q.Pilot.Z (PP) means that measured impedance by phase-to-phase distance element is


within the range determined by the setting [21Q.Pilot.Z_Set]. (Quad characteristic)

Flag.21M.Pilot.Z (PG) means that measured impedance by phase-to-ground distance element is


within the range determined by the setting [21M.Pilot.Z_Set]. (Mho characteristic)

Flag.21M.Pilot.Z (PP) means that measured impedance by phase-to-phase distance element is


within the range determined by the setting [21M.Pilot.Z_Set]. (Mho characteristic)

3.7.7.3 Settings

Table 3.7-9 Settings of pilot distance zone

No. Name Range Step Unit Remark


Real component of zero-sequence
1 21.Pilot.Real_K0 30.00~89.00 0.01 deg compensation coefficient for pilot
distance protection
Imaginary component of zero-sequence
2 21.Pilot.Imag_K0 -4.000~4.000 0.001 compensation coefficient for pilot
distance protection
Phase angle of positive-sequence
3 21.Pilot.phi1_Reach -4.000~4.000 0.001
impedance for pilot distance protection
4 21M.Pilot.Z_Set (0.000~4Unn)/In 0.001 ohm Impedance setting of pilot distance

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protection (Mho characteristic)


Impedance setting of pilot distance
5 21Q.Pilot.Z_Set (0.000~4Unn)/In 0.001 ohm
protection (Quad characteristic)
Impedance setting of pilot distance
6 21M.Pilot.Z_Rev (0.000~4Unn)/In 0.001 ohm protection in reverse direction (Mho
characteristic)
Impedance setting of pilot distance
7 21Q.Pilot.Z_Rev (0.000~4Unn)/In 0.001 ohm protection in reverse direction (Quad
characteristic)
Resistence setting of pilot distance
8 21Q.Pilot.R_Set (0.000~4Unn)/In 0.001 ohm
protection (Quad characteristic only)
Resistence setting of pilot distance
9 21Q.Pilot.R_Rev (0.000~4Unn)/In 0.001 ohm protection in reverse direction (Quad
characteristic only)

3.7.8 Power Swing Detection


Power swing is generally a dynamic process when power system is disturbed. When power swing
occurs, the angle between the generators in parallel operation, the frequency of the system, the
voltage on the bus, the current and power of the branch lines are all fluctuating. Power swing may
destroy the normal operation of power systems and even damage electrical equipment, causing
the system to collapse.

3.7.8.1 Function Block Diagram

68

68.En 68.St

68.Blk

3.7.8.2 I/O Signals

Table 3.7-10 I/O signals of power swing detection

No. Input Signal Description


Power swing detection enabling input, it is triggered from binary input or
1 68.En
programmable logic etc.
Power swing detection blocking input, it is triggered from binary input or
2 68.Blk
programmable logic etc.
3 21.St Any element of distance protection picks up.
4 FD.ROC.Pkp Residual current FD element operates.
No. Output Signal Description

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1 68.St Power swing detection takes into effect.

3.7.8.3 Logic

Figure 3.7-35 Logic diagram of power swing detection

Y: 21M or 21Q

3.7.8.4 Settings

Table 3.7-11 Settings of power swing detection

No. Name Range Step Unit Remark


Enabling/disabling power swing detection
1 68.En 0 or 1 0: disable
1: enable

3.7.9 Power Swing Blocking Releasing


When power swing occurs on the power system, the impedance measured by the distance
measuring element may vary from the load impedance area into the operating zone of the
distance element. The distance measuring element may operate due to the power swing occurs in
many points of interconnected power systems. To keep the stability of whole power system,
tripping due to operation of the distance measuring element during a power swing is generally not
allowed. Our distance protection adopts power swing blocking releasing to avoid maloperation
resulting from power swing. In another word, distance protection is blocked all along under the
normal condition and power swing when the respective logic settings are enabled. Only when fault
(internal fault or power swing with internal fault) is detected, power swing blocking for distance
protection is released by PSBR element.

Power swing blocking for distance element will be released if any of the following PSBR elements
operates. Each distance zone elements has respective setting for selection this function.

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 Fault detector PSBR element (FD PSBR)

 Unsymmetrical fault PSBR element (UF PSBR)

 Symmetrical fault PSBR element (SF PSBR)

1. Fault detector PSBR element

If any of the following condition is matched, FD PSBR will operate for 160ms.

Positive sequence current is lower than the setting [I_PSBR] before general fault detector element
operates.

As shown in figure below, assuming that normal load impedance locates at position 1 and the
impedance locates at position 2 when positive-sequence current is lower than the setting
[I_PSBR], it means FD operates between point 1 and point 2 if operation condition for FD PSBR
mentioned above is fulfilled (point 3 as an example), and then FD PSBR will operate for 160ms.

2. Unsymmetrical fault PSBR element

The operation criterion:

I0+I2>m×I1

The “m”, an empirical value, is internal fixed coefficient which can ensure UF PSBR operation
during power swing with internal unsymmetrical fault, while no operation during power swing or
power swing with external fault.

This decision mainly utilizes the "discrepancy" that there is no negative-sequence or


zero-sequence current during power swing, and there are negative-sequence and zero-sequence
currents in case of asymmetric fault. In addition, value of m is used to differentiate internal
asymmetric fault and external asymmetric fault in case of power swing.

 In case of power swing or both power swing and external fault, asymmetric fault discriminating
element will not operate and distance protection will be blocked:

In case of power swing but no fault, I0 and I2 are near zero, but I1 is very large. Asymmetric fault
discriminating element will not operate.

In case of both power swing and external fault, if center of power swing is in scope of protection,
both phase-to-phase and grounding impedance relays may operate. At this time, selection of
value of m is used to ensure no operation of asymmetric fault discriminating element, blocking of

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distance protection, and no incorrect operation without selectivity. If power swing center is not on
this line, distance protection will not operate incorrectly without selectivity due to power swing.

 In case of internal asymmetric fault, asymmetric fault discriminating element operates and
distance protection will be release to clear internal fault:

In case of both power swing and internal fault, if at the instant of short circuit, system electric
potential angle is not laid out, asymmetric fault discriminating element will operate at once. If at the
instant of short circuit, system electric potential angle is laid out, asymmetric fault discriminating
element will operate when system angle gradually decreases, or local side tripping may be
activated after immediate operation of opposite side asymmetric fault discriminating element and
releasing of distance protection tripping. In case of normal internal asymmetric phase-to-phase or
grounding fault in the system, relatively large zero-sequence or negative-sequence component will
exist. At this time, the above equation is true and distance protection will be released.

3. Symmetrical fault PSBR element

If a three-phase fault occurs and FD PSBR is invalid (160ms after FD operates), neither FD PSBR
nor UF PSBR will be able to release the distance protection. Thus, SF PSBR is provided for this
case specially. This detection is based on measuring the voltage at power swing center, during
power swing, U1cosΦ will constantly change periodically.

UOS=U1×COSΦ

Where:

Φ: the angle between positive sequence voltage and current

U1: the positive sequence voltage

As shown in the figure below, assume system connection impedance angle of 90°, current vector
will be perpendicular to the line connecting EM and EN, and have the same phase as power swing
center voltage. During normal operation of system or power swing, U1cosΦ just reflects
positive-sequence voltage of power swing center. In case of 3-phase short circuit, U1cosΦ is
voltage drop on arc resistor, transition resistance is arc resistance, and voltage drop on arc resistor
is less than 5%UN. In actual system, line impedance angle is not 90°. Through compensation of
angle Φ, power swing center voltage can be measured accurately. After compensation, power
swing center voltage is U1cos(Φ+90o-ΦL), where ΦL is line impedance angle.

During power swing, power swing center voltage U1cosΦ has the following characteristics: When
electric potential phase angle difference between power supplies at two sides is 180o, U1cosΦ=0

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and change rate dU1cosΦ/dt is the maximum. When this phase angle difference is near 0o, power
swing center voltage change rate dU1cosΦ/dt is the minimum. During short circuit, U1cosΦ
remains unchanged and dU1cosΦ/dt=0. However, in early stage of short circuit when normal state
enters short circuit state, dU1cosΦ/dt is very large. Therefore, use of dU1cosΦ/dt solely to
differentiate power swing and short circuit is not complete.

For these reasons, the method to release distance protection on condition that power swing center
voltage U1cosΦ is less than a setting and after a short delay can be used as symmetric fault
discriminating element. This element can accurately differentiate power swing and 3-phase short
circuit fault, and constitute a complete power swing blocking scheme with other elements. The
element to open distance protection if U1cosΦ is less than a certain setting and after a delay is
easy to realize and has short delay, and can trip fault more quickly and accurately trip 3-phase
short circuit fault during power swing.

The criterion of SF PSBR element comprises the following two parts:

 when -0.03UN<UOS<0.08UN, the SF PSBR element will operate after 150ms.

 when -0.1UN<UOS<0.25UN, the SF PSBR element will operate after 500ms.

The second criterion is a backup of the first criterion allowing longer monitoring period of voltage
variation.

To reduce the time delay for SF PSBR element during power swing, the change rate of voltage at
power swing center is also used which can release SF PSBR element quickly for the fault occurred
during power swing. The typical release time is less than 60ms.

3.7.9.1 Function Block Diagram

21Mx

21Mx.En_PSBR 21Mx.Rls_PSBR

21Mx.Blk_PSBR 21M.Pilot.Rls_PSBR

21M.Pilot.En_PSBR

21M.Pilot.Blk_PSBR

21Qx

21Qx.En_PSBR 21Qx.Rls_PSBR

21Qx.Blk_PSBR 21Q.Pilot.Rls_PSBR

21Q.Pilot.En_PSBR

21Q.Pilot.Blk_PSBR

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3.7.9.2 I/O Signals

Table 3.7-12 I/O signals of PSBR

No. Input Signal Description


Enabling power swing blocking releasing of zone x (Mho characteristic, x=1, 2,
1 21Mx.En_PSBR
3, 4, 5)
Enabling power swing blocking releasing of zone x (Quad characteristic, x=1, 2,
2 21Qx.En_PSBR
3, 4, 5)
Blocking power swing blocking releasing of zone x (Mho characteristic, x=1, 2,
3 21Mx.Blk_PSBR
3, 4, 5)
Blocking power swing blocking releasing of zone x (Quad characteristic, x=1, 2,
4 21Qx.Blk_PSBR
3, 4, 5)
Enabling power swing blocking releasing of pilot distance zone (Mho
5 21M.Pilot.En_PSBR
characteristic)
Blocking power swing blocking releasing of pilot distance zone (Mho
6 21M.Pilot.Blk_PSBR
characteristic)
Enabling power swing blocking releasing of pilot distance zone (Quad
7 21Q.Pilot.En_PSBR
characteristic)
Blocking power swing blocking releasing of pilot distance zone (Quad
8 21Q.Pilot.Blk_PSBR
characteristic)
No. Output Signal Description
1 21Mx.Rls_PSBR PSBR operates to release zone x (Mho characteristic, x=1, 2, 3, 4, 5)
2 21Qx.Rls_PSBR PSBR operates to release zone x (Quad characteristic, x=1, 2, 3, 4, 5)
3 21M.Pilot.Rls_PSBR PSBR operates to release pilot distance zone (Mho characteristic)
4 21Q.Pilot.Rls_PSBR PSBR operates to release pilot distance zone (Quad characteristic)

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3.7.9.3 Logic

SIG 21Mx.En_PSBR &


21Mx.Enable_PSBR
SIG 21Mx.Blk_PSBR

SIG FD.Pkp &

SIG 21Mx.Flg_PSBR

SIG 21Mx.Enable_PSBR &


>=1
EN [21Mx.En_PSBR]

&
SIG Symmetrical |U1cosΦ|< t 0ms Unblocking for SF >=1 21Mx.Rls_PSBR

>=1
&
SIG Unsymmetrical |I0|+|I2|>
Unblocking for UF

SIG 21Mx.Flg_PSBR

SET I1>[21M.I_PSBR] 0 3s & &


0 160ms >=1
SIG FD.Pkp

SIG 21Qx.En_PSBR &


21Qx.Enable_PSBR
SIG 21Qx.Blk_PSBR

SIG FD.Pkp &

SIG 21Qx.Flg_PSBR

SIG 21Qx.Enable_PSBR &


>=1
EN [21Qx.En_PSBR]

&
SIG Symmetrical |U1cosΦ|< t 0ms Unblocking for SF >=1 21Qx.Rls_PSBR

>=1
&
SIG Unsymmetrical |I0|+|I2|>
Unblocking for UF

SIG 21Qx.Flg_PSBR

SET I1>[21Q.I_PSBR] 0 3s & &


0 160ms >=1
SIG FD.Pkp

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SIG 21M.Pilot.En_PSBR &


21M.Pilot.Enable_PSBR
SIG 21M.Pilot.Blk_PSBR

SIG FD.Pkp &

SIG 21M.Pilot.Flg_PSBR

SIG 21M.Pilot.Enable_PSBR &


>=1
EN [21M.Pilot.En_PSBR]

&
SIG Symmetrical |U1cosΦ|< t 0ms Unblocking for SF >=1 21M.Pilot.Rls_PSBR

>=1
&
SIG Unsymmetrical |I0|+|I2|>
Unblocking for UF

SIG 21M.Pilot.Flg_PSBR

SET I1>[21M.I_PSBR] 0 3s & &


0 160ms >=1
SIG FD.Pkp

SIG 21Q.Pilot.En_PSBR &


21Q.Pilot.Enable_PSBR
SIG 21Q.Pilot.Blk_PSBR

SIG FD.Pkp &

SIG 21Q.Pilot.Flg_PSBR

SIG 21Q.Pilot.Enable_PSBR &


>=1
EN [21Q.Pilot.En_PSBR]

&
SIG Symmetrical |U1cosΦ|< t 0ms Unblocking for SF >=1 21Q.Pilot.Rls_PSBR

>=1
&
SIG Unsymmetrical |I0|+|I2|>
Unblocking for UF

SIG 21Q.Pilot.Flg_PSBR

SET I1>[21Q.I_PSBR] 0 3s & &


0 160ms >=1
SIG FD.Pkp

Figure 3.7-36 Logic diagram of PSBR

Where:

x: 1, 2, 3, 4, 5

21Mx.Flg_PSBR: Please refer to Figure 3.7-24 and Figure 3.7-25

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21Qx.Flg_PSBR: Please refer to Figure 3.7-29 and Figure 3.7-30

21M.Pilot.Flg_PSBR and 21Q.Pilot.Flg_PSBR: Please refer to Figure 3.7-33 and Figure 3.7-34

3.7.9.4 Settings

Table 3.7-13 Settings of PSBR

No. Name Range Step Unit Remark


Enabling/disabling zone 1 of distance
protection controlled by PSBR (Mho
1 21M1.En_PSBR 0 or 1 characteristic)
0: disable
1: enable
Enabling/disabling zone 1 of distance
protection controlled by PSBR (Quad
2 21Q1.En_PSBR 0 or 1 characteristic)
0: disable
1: enable
Enabling/disabling zone 2 of distance
protection controlled by PSBR (Mho
3 21M2.En_PSBR 0 or 1 characteristic)
0: disable
1: enable
Enabling/disabling zone 2 of distance
protection controlled by PSBR (Quad
4 21Q2.En_PSBR 0 or 1 characteristic)
0: disable
1: enable
Enabling/disabling zone 3 of distance
protection controlled by PSBR (Mho
5 21M3.En_PSBR 0 or 1 characteristic)
0: disable
1: enable
Enabling/disabling zone 3 of distance
protection controlled by PSBR (Quad
6 21Q3.En_PSBR 0 or 1 characteristic)
0: disable
1: enable
Enabling/disabling zone 4 of distance
protection controlled by PSBR (Mho
7 21M4.En_PSBR 0 or 1 characteristic)
0: disable
1: enable
Enabling/disabling zone 4 of distance
8 21Q4.En_PSBR 0 or 1
protection controlled by PSBR (Quad

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characteristic)
0: disable
1: enable
Enabling/disabling zone 5 of distance
protection controlled by PSBR (Mho
9 21M5.En_PSBR 0 or 1 characteristic)
0: disable
1: enable
Enabling/disabling zone 5 of distance
protection controlled by PSBR (Quad
10 21Q5.En_PSBR 0 or 1 characteristic)
0: disable
1: enable
Enabling/disabling pilot distance
zone controlled by PSBR (Mho
11 21M.Pilot.En_PSBR 0 or 1 characteristic)
0: disable
1: enable
Enabling/disabling pilot distance
zone controlled by PSBR (Quad
12 21Q.Pilot.En_PSBR 0 or 1 characteristic)
0: disable
1: enable
Current setting for power swing
13 21M.I_PSBR (0.050~30.000)×In 0.001 A
blocking (Mho characteristic)
Current setting for power swing
14 21Q.I_PSBR (0.050~30.000)×In 0.001 A
blocking (Quad characteristic)

3.7.10 Distance SOTF Protection


When the circuit breaker is closed manually or automatically, it is possible to switch on to a fault.
This is especially critical if the line in the remote station is grounded, since the distance protection
would not clear the fault until overreach zones (zone 2 and/or zone 3) time delays have elapsed. In
this situation, however, the fastest possible clearance is required.

The SOTF (switch onto fault) protection is a complementary function to the distance protection.
With distance SOTF protection, a fast trip is achieved for a fault on the whole line, when the line is
being energized. It shall be responsive to all types of faults anywhere within the protected line.

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3.7.10.1 Function Block Diagram

3.7.10.2 I/O Signals

Table 3.7-14 I/O signals of distance SOTF protection

No. Input Signal Description


Distance SOTF protection enabling input, it is triggered from binary input or
1 21SOTF.En
programmable logic etc.
Distance SOTF protection blocking input, it is triggered from binary input or
2 21SOTF.Blk
programmable logic etc.
No. Output Signal Description
Accelerate distance protection to trip when manual closing or auto-reclosing to
1 21SOTF.Op
fault
Accelerate distance protection to trip when another fault happened under pole
2 21SOTF.Op_PDF
discrepancy conditions
3 21SOTF.On Accelerate distance protection is enabled.

3.7.10.3 Logic

Figure 3.7-37 Logic diagram of enabling distance SOTF protection

Distance SOTF protection can be enabled or disabled, and can be initiated by several cases,
including manual closing signal, 3-pole reclosing, 1-pole reclosing and pole discrepancy
conditions.

1. For single circuit breaker mode

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SIG CB1.52b_PhA
>=1
SIG CB1.52b_PhB

SIG CB1.52b_PhC
&
SIG FD.Pkp

EN [SOTF.Opt_Mode_ManCls]=CBPos

EN [SOTF.Opt_Mode_ManCls]=ManClsBI
& >=1
SIG FD.Pkp 0 400ms Manual closing signal

SIG ManCls

Set [SOTF.Opt_Mode_ManCls]=AutoInit &


SIG Ua<[SOTF.U_Ddl]
&
SIG Ub<[SOTF.U_Ddl]

SIG Uc<[SOTF.U_Ddl]

SIG FD.Pkp >=1 &


[SOTF.t_DdL] 0ms Dead line
SIG VTS.Alm

SIG Ia<0.06In
&
SIG Ib<0.06In

SIG Ic<0.06In

Figure 3.7-38 Logic diagram of manual closing signal

For double circuit breakers mode, the phase's open status corresponding to the line is invalid
unless both circuit breakers are in open position.

2. For double circuit breakers mode

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BI [CB1.52b_PhA] &

BI [CB2.52b_PhA]

BI [CB1.52b_PhB] & >=1

BI [CB2.52b_PhB]

BI [CB1.52b_PhC] &

BI [CB2.52b_PhC]
&
SIG FD.Pkp

EN [SOTF.Opt_Mode_ManCls]=CBPos

EN [SOTF.Opt_Mode_ManCls]=ManClsBI
& >=1
SIG FD.Pkp 0 400ms Manual closing signal

SIG ManCls

Set [SOTF.Opt_Mode_ManCls]=AutoInit &


SIG Ua<[SOTF.U_Ddl]
&
SIG Ub<[SOTF.U_Ddl]

SIG Uc<[SOTF.U_Ddl]

SIG FD.Pkp >=1 &


[SOTF.t_DdL] 0ms Dead line
SIG VTS.Alm

SIG Ia<0.06In
&
SIG Ib<0.06In

SIG Ic<0.06In

Figure 3.7-39 Logic diagram of manual closing signal

For accelerated tripping mode by manual closing signal, manual closing signal can be from circuit
breaker position, external binary signal of manual closing or dead line check.

When the circuit breaker is in open position while the device does not pick up, or external manual
closing binary input is energized, then manual closing signal will be kept for 400ms, which will
enable SOTF logic.

When the initiation mode of SOTF protection is set as “AutoInit” (i.e., [SOTF.Opt_Mode_ManCls] is
set as “AutoInit”), distance SOTF protection will be initiated by dead line check. When three
phases currents are all smaller than 0.06In and no fault detector element operates, SOTF logic will
be enabled only for 400ms with the time delay [SOTF.t_Ddl] if three phase voltages are all smaller
than the setting [SOTF.U_Ddl].

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SIG Manual closing signal

SIG 21SOTF.On &

SIG FD.Pkp
&
& [21SOTF.t_ManCls] 0 21SOTF.Op_ManCls
EN [21SOTF.En_ManCls]

EN [21SOTF.Z2.En_ManCls] &

SIG 21M(21Q)2.Flg_PSBR

EN [21SOTF.Z3.En_ManCls] & >=1

SIG 21M(21Q)3.Flg_PSBR

EN [21SOTF.Z4.En_ManCls] &

SIG 21M(21Q)4.Flg_PSBR

Figure 3.7-40 Logic diagram of distance SOTF protection by manual closing signal

Figure 3.7-41 Logic diagram of distance SOTF protection by 1-pole or 3-pole AR

For single-phase permanent fault, distance SOTF protection for 1-pole reclosing onto the faulty
phase will trip three-phase circuit breaker.

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Figure 3.7-42 Logic diagram of distance SOTF protection by PD condition

Under pole discrepancy condition after single-phase tripping, distance SOTF protection will
accelerate to operate if another fault happens to the healthy phase.

Figure 3.7-43 Logic diagram of distance SOTF protection

3.7.10.4 Settings

Table 3.7-15 Settings of distance SOTF protection

No. Name Range Step Unit Remark


Enabling/disabling distance SOTF
protection
1 21SOTF.En 0 or 1
0: disable
1: enable
Enabling/disabling zone 2 of
distance SOTF protection for
2 21SOTF.Z2.En_ManCls 0 or 1 manual closing
1: enable
0: disable
Enabling/disabling zone 3 of
distance SOTF protection for
3 21SOTF.Z3.En_ManCls 0 or 1 manual closing
1: enable
0: disable
Enabling/disabling zone 4 of
distance SOTF protection for
4 21SOTF.Z4.En_ManCls 0 or 1 manual closing
1: enable
0: disable
Enabling/disabling zone 2 of
5 21SOTF.Z2.En_3PAR 0 or 1
distance SOTF protection for

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3-pole reclosing
1: enable
0: disable
Enabling/disabling zone 3 of
distance SOTF protection for
6 21SOTF.Z3.En_3PAR 0 or 1 3-pole reclosing
1: enable
0: disable
Enabling/disabling zone 4 of
distance SOTF protection for
7 21SOTF.Z4.En_3PAR 0 or 1 3-pole reclosing
1: enable
0: disable
Enabling/disabling zone 2
controlled by PSB of distance
SOTF protection for 3-pole
8 21SOTF.Z2.En_PSBR 0 or 1
reclosing
1: enable
0: disable
Enabling/disabling zone 3
controlled by PSB of distance
SOTF protection for 3-pole
9 21SOTF.Z3.En_PSBR 0 or 1
reclosing
1: enable
0: disable
Enabling/disabling zone 4
controlled by PSB of distance
SOTF protection for 3-pole
10 21SOTF.Z4.En_PSBR 0 or 1
reclosing
1: enable
0: disable
Enabling/disabling distance SOTF
protection under pole discrepancy
11 21SOTF.En_PDF 0 or 1 conditions
1: enable
0: disable
Time delay of distance protection
12 21SOTF.t_PDF 0.000~10.000 0.001 s operating under pole discrepancy
conditions
Undervoltage setting of deadline
13 SOTF.U_Ddl 0~Unn 0.001 V
detection
14 SOTF.t_Ddl 0.000~600.000 0.001 s Time delay of deadline detection
ManClsBI Option of manual SOTF mode
15 SOTF.Opt_Mode_ManCls
CBPos ManClsBI: initiated by input signal

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ManClsBI/ of manual closing


CBPos CBPos: initiated by CB position
AutoInit ManClsBI/CBPos: initiated by
All either input signal of manual
closing or CB position
AutoInit: initiated by no voltage
detection
All: initiated by both binary input
and no voltage detection

Table 3.7-16 Internal settings of distance SOTF protection

No. Name Default Value Unit Remark


Enabling/disabling distance SOTF protection for
manual closing
1 21SOTF.En_ManCls 1
0: disable
1: enable
Time delay of distance protection accelerating to
2 21SOTF.t_ManCls 0.025 s
trip when manual closing
Enabling/disabling distance SOTF protection for
3-pole reclosing
3 21SOTF.En_3PAR 1
0: disable
1: enable
Time delay of distance protection accelerating to
4 21SOTF.t_3PAR 0.025 s
trip when 3-pole reclosing
Enabling/disabling distance SOTF protection for
1-pole reclosing
5 21SOTF.En_1PAR 1
0: disable
1: enable
Time delay of distance protection accelerating to
6 21SOTF.t_1PAR 0.025 s
trip when 1-pole reclosing

3.8 Optical Pilot Channel (Option)


3.8.1 General Application
When fibre optical channel is available between the devices at both ends, the devices have an
optional module to transmit permissive signal or blocking signal (subject to the scheme selected),
transfer signal and transfer trip via the fibre ports of the module. The communication rate can be
64kbits/s or 2048kbits/s via optional dedicated optical fibre channel or multiplex channel. By the
setting [FO.Protocol], the device can support G.703 or C37.94.

3.8.2 Function Description


12 digital bits are integrated in each frame of transmission message for various applications. Each
received message frame via fibre optical channel will pass through security check to ensure the
integrity of the message consistently.

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The last four digital bits of the 12 have been assigned for pilot scheme protection. The
communication channel can be configured as single channel mode or as dual channels mode.
(FOx, x can be 1 or 2) according to the optical pilot channel module selected.

3.8.2.1 Channel Interface

The modules can communicate in two modes via multiplexer or dedicated optical fibre.
Communication through dedicated fibre is usually recommended unless the received power does
not meet with the requirement.

Channel of 64kbits/s or 2048kbits/s via dedicated fibre is shown in Figure 3.8-1 and Figure 3.8-2.
Two fibre cores of optical cable are dedicated to pilot scheme protection.

Two fibre cores of optical cable are normally in service, and all data are exchanged via the other
healthy core if one core is failed.

Max 2km for 62.5/125um multi-mode FO C37.94 (N*64kbits/s)

TX RX
PCS-902 PCS-902
RX TX

ST connectors ST connectors

Figure 3.8-1 Direct optical link up to 2km with 850nm

Max 40km/100km for 9/125um single-mode FO

TX RX
PCS-902 PCS-902
RX TX

FC connectors FC connectors

Figure 3.8-2 Direct optical link up to 40km with 1310nm or up to 100km with 1550nm

Channel of 64kbits/s or 2048kbits/s via multiplexer is shown in Figure 3.8-3, Figure 3.8-4 and
Figure 3.8-5.

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Figure 3.8-3 Connect to a communication network via communication convertor

Figure 3.8-4 Connect to a communication network via MUX-64

Figure 3.8-5 Connect to a communication network via MUX-2M

The protection transmission data format is shown as following table.

Bit Data Frame Description


High Format The header of transmission data format
LocID The identity code of local device
Time Time for synchronising
FOx.Send1~FOx.Send12 The twelve signals sent by channel No.x
low CRC

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3.8.2.2 Communication Clock

Valid messages exchange is key factor for digital pilot scheme protection.

The device transmits and receives messages based on respective clocks, which are called
transmit clock (i.e. clock TX) and receive clock (i.e. clock RX) respectively. Clock RX is fixed to be
extracted from message frame, which can ensure no slip frame and no error message received.
Clock TX has two options:

1. Use internal crystal clock, which is called internal clock. (master clock)

2. Use external clock. (slave clock)

Depend on the clock used by the device at both ends, there are three modes.

1. Master-master mode

Both ends use internal clock.

2. Slave-slave mode

Both ends use external clock.

3. Master-slave mode

One of them uses internal clock, the other uses external clock

The logic setting [FOx.En_IntClock] is used in pilot scheme protection to select the communication
clock. The internal clock is enabled automatically when the logic setting [FOx.En_IntClock] is set
as “1”. Contrarily, the external clock is enabled automatically when the logic setting
[FOx.En_IntClock] is set to “0”.

If the device uses multiplex PCM channel, logic setting [FOx.En_IntClock] at both ends should be
set as “0” (Mode 2). If the device uses dedicated optical fibre channel, clock Mode 1 and Mode 3
can be used. Mode 1 is recommended in considering simplification to user, i.e. logic setting
[FOx.En_IntClock] at both ends should be set as “1”.

3.8.2.3 Identity Code

In order to ensure reliability of the device when digital communication channel is applied, settings
[FO.LocID] and [FO.RmtID] are provided as identity code to distinguish uniquely the device at
remote end using same channel.

Under normal conditions, the identity code of the device at local end should be different with that at
remote end. In addition, it is recommended that the identity code of all devices, i.e., the setting
[FO.LocID], should be unique in the power grid. The setting range is from 0 to 65535. Only for loop
test, they are set as the same.

The setting [FO.LocID] of the device at an end should be the same as the setting [FO.RmtID] of
the device at opposite end and the greater [FO.LocID] between the two ends is chosen as a
master end for sampling synchronism, the smaller [FO.LocID] is slave end. If the setting [FO.LocID]
is set the same as [FO.RmtID], that implies the device in loopback testing state.

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The setting [FO.LocID] is packaged in the message frame and transmitted to the remote end.
When the [FO.LocID] of the device at remote end received by local device is same to the setting
[FO.RmtID] of local device, the message received from the remote end is valid, and protection
information involved in message is read. When these settings are not matched, the message is
considered as invalid and protection information involved in message is ignored, corresponding
alarms will be issued.

3.8.2.4 Channel Statistics

The device has the function of on-line channel monitoring and channel statistics. It can produce
channel statistic report automatically at 9:00 every day and the report can be printed for operator
to check the channel quality. The monitoring contents of channel status are shown as follows, and
they can be viewed by the menu “Main Menu→Test→Prot Ch Counter→Chx Counter”.

1. FOx.StartTime (starting time)

It shows the starting time of the channel status statistics of the device at local end.

2. FO.RmtID (ID code of the remote end)

It shows the ID information received by the device at local end now.

3. FOx.t_ChLag (propagation delay of channel x)

It shows the calculated communication channel time delay of the device at local end now (unit: us).
The calculation is based on the assumption of same channel path for to and from remote end. The
device measures propagation delay of communication channel based on the below principle.

Side S transmits a frame of message to side M, and meanwhile records the transmitting time “tss”
on the basis of clock on side S. When side M receives the message, it will record receiving time
“tmr” of the message with its own clock, and return a frame of message to side S at next fixed
transmitting time, meanwhile data of “tms-tmr” is included in the frame of message. Side S will
receive the message from side M at the time “tsr” and obtain the data of “tms-tmr”.

Therefore, the propagation delay of the channel “Td” is obtained through calculation:

(t sr  t ss )  (t ms  t mr )
Td 
2

By using the above calculated “Td”, the device automatically compensate time synchronization of
sampling data at each end and transimission time lag.

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Figure 3.8-6 Schematic diagram of communication channel time

4. FOx.N_CRCFail (total number of error frame of channel x)

It shows the total number of the error frames of the device at local end from starting time of
channel statistics until now. Error frame means that this frame fails in CRC check.

5. FOx.N_FramErr (total number of abnormal messages of channel x)

It shows the total number of abnormal messages of the device at local end from starting time of
channel statistics until now.

6. FOx.N_FramLoss (total number of lost frames of channel x)

It shows the total number of the lost frames of the device at local end from starting time of channel
statistics until now.

7. FOx.N_RmtAbnor (total number of abnormal messages from the remote end of channel x)

It shows the total number of abnormal messages received from the remote end from starting time
of channel statistics until now.

8. FOx.N_CRCFailSec (total number of serious error frames of channel x)

It shows the total number of serious error frame seconds of the device at local end from starting
time of the channel statistics until now.

9. FOx.N_LossSyn (total number of loss synchronous of channel x)

It shows the total number of loss synchronous of the device at local end from starting time of the
channel statistics until now.

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3.8.3 Function Block Diagram

FOx

FOx.En FOx.On

FOx.Send1 FOx.Recv1

FOx.Send2 FOx.Recv2

FOx.Send3 FOx.Recv3

FOx.Send4 FOx.Recv4

FOx.Send5 FOx.Recv5

FOx.Send6 FOx.Recv6

FOx.Send7 FOx.Recv7

FOx.Send8 FOx.Recv8

FOx.Send9 FOx.Recv9

FOx.Send10 FOx.Recv10

FOx.Send11 FOx.Recv11

FOx.Send12 FOx.Recv12

FOx.Alm

FOx.Alm_ID

3.8.4 I/O Signals


Table 3.8-1 I/O signals of pilot channel

No. Input Signal Description


1 FOx.En Enabling channel x
2 FOx.Send1 Sending signal 1 of channel x
3 FOx.Send2 Sending signal 2 of channel x
4 FOx.Send3 Sending signal 3 of channel x
5 FOx.Send4 Sending signal 4 of channel x
6 FOx.Send5 Sending signal 5 of channel x
7 FOx.Send6 Sending signal 6 of channel x
8 FOx.Send7 Sending signal 7 of channel x
9 FOx.Send8 Sending signal 8 of channel x
Sending signal 9 of channel x (it is configured by default as sending permissive
10 FOx.Send9 signal 1 or sending A-phase permissive signal (only for phase-segregated
command scheme))
Sending signal 10 of channel x (it is configured by default as sending B-phase
11 FOx.Send10
permissive signal (only for phase-segregated command scheme))

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Sending signal 11 of channel x (it is configured by default as sending C-phase


12 FOx.Send11
permissive signal (only for phase-segregated command scheme))
Sending signal 12 of channel x (it is configured by default as sending
13 FOx.Send12 permissive signal 2 only for pilot directional earth-fault protection adopting
independent pilot channel 2)
No. Output Signal Description
1 FOx.On Channel x is enabled.
2 FOx.Recv1 Receiving signal 1 of channel x
3 FOx.Recv2 Receiving signal 2 of channel x
4 FOx.Recv3 Receiving signal 3 of channel x
5 FOx.Recv4 Receiving signal 4 of channel x
6 FOx.Recv5 Receiving signal 5 of channel x
7 FOx.Recv6 Receiving signal 6 of channel x
8 FOx.Recv7 Receiving signal 7 of channel x
9 FOx.Recv8 Receiving signal 8 of channel x
Receiving signal 9 of channel x (it is configured by default as receiving
10 FOx.Recv9 permissive signal via channel No.1, or receiving permissive signal of A-phase
via channel No.1 (only for phase-segregated command scheme))
Receiving signal 10 of channel x (it is configured by default as receiving
11 FOx.Recv10 permissive signal of B-phase via channel No.1 (only for phase-segregated
command scheme))
Receiving signal 11 of channel x (it is configured by default as receiving
12 FOx.Recv11 permissive signal of C-phase via channel No.1 (only for phase-segregated
command scheme))
Receiving signal 12 of channel x (it is configured by default as receiving
13 FOx.Recv12 permissive signal 2 only for pilot directional earth-fault protection adopting
independent pilot channel 2)
14 FOx.Alm Channel x is abnormal
Received ID from the remote end is not as same as the setting [FO.RmtID] of
15 FOx.Alm_ID
the device in local end

3.8.5 Logic

SIG Receiving transfer signal n from remote side &


FOx.Recvn
SIG FOx.Alm >=1

SIG FOx.Alm_ID

SIG FOx.En &


FOx.On
EN FOx.En

Figure 3.8-7 Logic diagram of receiving signal n

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Where:

n can be 1~12

3.8.6 Settings
Table 3.8-2 Settings of pilot channel

No. Name Range Step Unit Remark

1 FO.LocID 0-65535 1 Identity code of the device at local end

2 FO.RmtID 0-65535 1 Identity code of the device at remote end

G.703 It is used to select protocol type, G.703 or


3 FO.Protocol
C37.94 C37.94

4 FOx.BaudRate 64 or 2048 kbps Baud rate of optical pilot channel x

The setting for the times of 64kbits/s, which


5 FOx.Nx64k_C37.94 1-12 1 is an N*64kbits/s standard defined by IEEE
c37.94 standard
Option of internal clock or external clock
6 FOx.En_IntClock 0 or 1 0: external clock
1: internal clock
Enabling/disabling channel x
7 FOx.En 0 or 1 0: disable
1: enable

3.9 Pilot Distance Protection


3.9.1 General Application
The instant distance protection with underreaching setting is impossible to isolate the fault at
remote end of the line, while distance protection with overreaching setting needs a time delay to
grade with downstream protection to maintain discrimination. Pilot distance protection that
exchanges distance protection information at both ends of the line can remove the fault within this
line quickly, and will not operate for external fault.

Pilot distance protection requires communication channel to exchange protection information at


both ends. The channel may be dedicated or multiplexed channel through optical fiber or any other
communication media. Pilot distance protection has schemes of permissive underreaching
transfer trip (PUTT), permissive overreaching transfer trip (POTT) and blocking. The device
provides duplicated pilot distance protections with dual channels. The communication media and
mode can be independent each other.

3.9.2 Function Description


Pilot distance protection determines whether it will send the signal to the remote end according to
the discrimination result of the distance element or direction element. Pilot distance protection can
be divided into permissive scheme and blocking scheme according to whether the signal sent is
used to permit tripping or block tripping. For permissive scheme, it can be divided into

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overreaching mode or underreaching mode according to the setting of distance element and
scheme selected, furthermore, it will provide the unblocking scheme as auxiliary function. For
overreaching mode, current reversal logic and weak infeed logic are available for parallel line
operation and weak power source situation respectively.

Pilot distance protection with permissive scheme receives permissive signal from the remote end,
so as to combine with local discrimination condition to accelerate tripping, so it has high security.

Blocking scheme will operate with a short time delay [85.t_DPU_Blocking1] if forward pilot zone
element operates and not receiving blocking signal before the short time delay expired.

Pilot distance protection can be enabled or disabled by input signals, logic setting and blocking
signal, as shown in Figure 3.9-1.

SIG 85-x.Z.En1
&
SIG 85-x.Z.En2

EN [85.Z.En]
&
85-x.Z.On
SIG 85-x.Z.Blk

Figure 3.9-1 Enabling/disabling logic of pilot distance protection

Pilot distance protection receives and sends signals via pilot channel, and the logic of receiving
signal is shown in Figure 3.9-2.

Figure 3.9-2 Logic diagram of receiving signal

Pilot distance protection has the following application modes:

3.9.2.1 Zone Extension

When pilot scheme protection is out of service due to pilot channel failure or no pilot scheme
protection is provided. The fault outside zone 1 only can be cleared by zone 2 with a time delay. It
can not ensure that all faults within protected line are cleared instantaneously. As a supplement of
pilot scheme protection, zone extension can clear the fault within the whole line instantaneously.
Different with pilot distance protection, zone extension can also operate for external close up fault

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in parallel line, but power supply can be restored by AR. So zone extension should be blocked
when AR is out of service and is not ready.

In order to prevent too many lines from disconnecting with system due to zone extension operate
when the circuit breaker is closed into permanent fault, zone extension should be blocked when
AR operates. For temporary fault, the line can be into service again after AR operates successfully.
For permanent fault in either local line or parallel line, distance protection with a time delay will
operate.

SIG FD.Pkp &


SIG 85-x.ZX.En1
&
SIG 85-x.ZX.En2 &
85-x.ZX.On
EN [85.ZX.En]

SIG 85-x.ZX.Blk1 >=1

SIG 85-x.ZX.Blk2
&
SIG 79.Ready & [85.t_DPU_ZX] 0ms 85-x.Op_ZX

SIG Zpilot

Figure 3.9-3 Zone extension

Zone extension uses the setting of pilot zone (ZPilot), and its operation characteristic can be Mho
or Quad.

3.9.2.2 Permissive Underreaching Transfer Trip (PUTT)

Distance elements zone 1 (Z1) with underreaching setting and pilot zone (ZPilot) with
overreaching setting are used for this scheme. Z1 element will send permissive signal to the
remote end and release tripping after Z1 time delay expired. After receiving permissive signal with
ZPilot element pickup, a tripping signal will be released.

The signal transmission element for PUTT is set according to underreaching mode, so current
reversal need not be considered.

For PUTT, there may be a dead zone under weak power source condition. If the fault occurs
outside Z1 zone at strong power source side, Z1 at weak power supply side may not operate to trip
and transmit permissive signal, and pilot distance protection will not operate. Therefore, the
system fault can only be removed by Z2 at strong power source side with time delay.

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Figure 3.9-4 Simple schematic of PUTT

Pilot distance protection always adopts pilot channel 1, and the logic of PUTT is shown in Figure
3.9-5.

SIG 21M1(21Q1).Op 0ms 100ms >=1


&
SIG 85-x.ExTrp 0ms 150ms 85-x.Send1

SET [85.Opt_PilotMode]=PUTT &

SIG 85-x.Z.On &


&
SIG FD.Pkp 8ms 0ms 85-x.Op_Z

SIG 85-x.Valid_Recv1

SIG ZPilot

Figure 3.9-5 Logic diagram of pilot distance protection (PUTT)

3.9.2.3 Permissive Overreaching Transfer Trip (POTT)

ZPilot will send permissive signal to remote end once it picks up and release tripping signal upon
receiving permissive signal from the remote end.

When POTT is applied on parallel lines arrangement and the ZPilot setting covers 50% of the
parallel line, there may be a problem under current reversal condition, settings for current reversal
condition should be considered, please refer to section 3.9.2.6 for details.

Under weak power source condition, the problem of dead zone at weak power source end is
eliminated by the weak infeed logic, please refers to section 3.9.2.7 for details.

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Figure 3.9-6 Simple schematic of POTT

SIG Zpilot >=1

SIG 85-x.ExTrp 0ms 150ms

& >=1
SIG CB open position &
200ms 0ms
&
85-x.Send1
SIG 85-x.Valid_Recv1 &
SIG ZPilot &
&
>=1 t1 t2
SIG 85-x.Z.On

SIG WI
&
& 85-x.Op_Z
SIG FD.Pkp 8ms 0ms

SET [85.Opt_PilotMode]=POTT

Figure 3.9-7 Logic diagram of pilot distance protection (POTT)

Where:

t1: pickup time delay of current reversal, the setting [85.t_DPU_CR1]

t2: dropoff time delay of current reversal, the setting [85.t_DDO_CR1]

3.9.2.4 Blocking

Permissive scheme has high security, but it relies on pilot channel seriously. Pilot distance
protection will not operate when there is an internal fault with abnormal channel. Blocking scheme

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could be considered as an alternative.

Blocking scheme takes use of pilot distance element Zpilot operation to terminate sending of
blocking signal. Blocking signal will be sent once fault detector picks up without pilot zone Zpilot
operation. Pilot distance protection will operate with a short time delay if pilot distance element
operates and not receiving blocking signal after timer expired.

The setting of pilot zone element Zpilot in Blocking scheme is overreaching, so current reversal
condition should be considered. However, the short time delay of pilot distance protection has an
enough margin for current reversal, that this problem has been resolved.

The short time delay must consider channel delay and with a certain margin to set. As shown in
Figure 3.9-8, an external fault happens to line MN. The fault is behind the device at M side, for
blocking scheme, the device at M side will send blocking signal to the device at N side. If channel
delay is too long, the device at side N has operated before receiving blocking signal. Hence, the
time delay of pilot distance protection adopted in blocking scheme should be set according to
channel delay.

Blocking signal
M N
EM Fault A B EN

Figure 3.9-8 Simple schematic of system fault

For blocking scheme, pilot distance protection will operate when there is an internal fault with
abnormal channel, however, it is possible that pilot distance protection issue an undesired trip
when there is an external fault with abnormal channel.

ZPilot

Zpilot_Rev
M
EM A Fault B EN

N
Zpilot_Rev
ZPilot

Relay A Relay B
FD.Pkp & & FD.Pkp

Zpilot & & Zpilot


[85.t_DPU_Blocking1] 85-x.Op_Z 85-x.Op_Z [85.t_DPU_Blocking1]

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Figure 3.9-9 Simple schematic of blocking

Figure 3.9-10 Logic diagram of pilot distance protection (Blocking)

Current reversal logic is only used for permissive scheme. For blocking scheme, the time delay of
pilot distance protection has enough margin for current reversal, so current reversal need not be
considered.

3.9.2.5 Unblocking

Permissive scheme will trip only when it receives permissive signal from the remote end. However,
it may not receive permissive signal from the remote end when pilot channel fails. For this case,
pilot distance protection can adopt unblocking scheme. Under normal conditions, the signaling
equipment works in the pilot frequency, and when the device operates to send permissive signal,
the signaling equipment will be switched to high frequency. While pilot channel is blocked, the
signaling equipment will receive neither pilot frequency signal nor high frequency signal. The
signaling equipment will provide a contact to the device as unblocking signal. When the device
receives unblocking signal from the signaling equipment, it will recognize channel failure, and
unblocking signal will be taken as permissive signal temporarily.

The unblocking function can only be used together with PUTT and POTT.

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Figure 3.9-11 Logic diagram of pilot distance protection (Unblocking)

3.9.2.6 Current Reversal

When there is a fault in one of the parallel lines, the direction of the fault current may change
during the sequence tripping of the circuit breaker at both ends as shown in Figure 3.9-12: When a
fault occurs on line C–D near breaker D, the fault current through line A-B to D will flow from A to B.
When breaker D is tripped, but breaker C is not tripped, the fault current in line A-B will then flow
from B to A. This process is the current reversal.

M N M N
Strong Weak
A B A B
source source
EM EN EM EN

C D C D

Direction of fault current Direction of fault current


flow before CB‘D’open flow after CB‘D’open

Figure 3.9-12 Current reversal

As shown above, the device A judges a forward fault while the device B judges a reverse fault
before break D is tripped. However, the device A judges a reverse fault while the device B judges a
forward fault after breaker D is tripped. There is a competition between pickup and drop off of pilot
zones in the device A and the device B when the fault measured by the device A changes from
forward direction into reverse direction and vice versa for the device B. There may be
maloperation for the device in line A-B if the forward direction of the device B has operated but the
forward direction of the device A drops off slightly slower or the forward direction of the device B
has operated but the forward direction information of the device A is still received due to the
channel delay (the permissive signal is received).

In general, the following two methods shall be adopted to solve the problem of current reversal:

1. The fault shall be measured by means of the reverse element of the device B. Once the
reverse element of the device B operates, the send signals and the tripping circuit will be
blocked for a period of time after a short time delay. This method can effectively solve the
problem of competition between the device A and the device B, but there shall be a
precondition. The reverse element of the device B must be in cooperation with the forward
element of the device A, i.e. in case of a fault in adjacent lines, if the forward element of the
device A operates, and the reverse element of the device B must also operate. Once the
bilateral cooperation fails, the anticipated function cannot be achieved. In addition, the
blocking time for sending signals and the tripping circuit after the reverse element of the
device B operates shall be set in combination with the channel time delay.

2. Considering the pickup and drop off time difference of distance elements and the channel time
delay between the device A and the device B, the maloperation due to current reversal shall
be eliminated by setting the time delay. The reverse direction element of the device is not
required for this method, the channel time delay and the tripping time of adjacent breaker
shall be taken into account comprehensively.

This protection device adopts the second method to eliminate the maloperation due to current

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reversal.

Figure 3.9-13 Logic diagram of current reversal blocking

t1: [85.t_DPU_CR1]

t2: [85.t_DDO_CR1]

Referring to above figure, when signal from the remote end is received without pilot forward zone
pickup, the current reversal blocking logic is enabled after t1 delay.

The time delay of t1 [85.t_DPU_CR1] shall be set the shortest possible but allowing sufficient time
for pilot forward zone pickup, generally set as 25ms.

Once the current reversal logic is enabled, the healthy line device B transfer tripping is blocked.
The logic will be disabled by either the dropoff of signal or the pickup of pilot forward zone. A time
delay t2 [85.t_DDO_CR1] is required to avoid maloperation for the case that the pilot forward zone
(or forward element of pilot directional earth-fault protection) of device B picks up before the signal
from device A drops off. Considering the channel propagation delay and the pickup and drop-off
time difference of pilot forward zone (or pilot directional earth-fault element) with margin, t2 is
generally set between 25ms~40ms.

Because the time delay of pilot distance protection has an enough margin to current reversal,
current reversal blocking only used for permissive scheme not blocking scheme.

3.9.2.7 Weak Infeed

In case of a fault in line at one end of which there is a weak power source, the fault current
supplied to the fault point from the weak power source is very small or even nil, and the
conventional distance element could not operate. The weak infeed logic combines the protection
information from the strong power source end and the electric feature of the local end to cope with
the case.

The weak infeed logic can be only applied for BOTT and POTT. The weak infeed logic has options
for echo or both echo and tripping.

ZPilot

Z1 Zpilot_Rev
M
EM A Fault B EN

Z1 N
Zpilot_Rev

ZPilot

Load

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Figure 3.9-14 Line fault description

When the weak infeed logic is enabled, distance forward and reverse element and direction
element of directional earth-fault protection do not operate with the voltage lower than the setting
[85.U_UV_WI] after the device picks up, upon receiving signal from remote end, the weak infeed
logic will echo the signal back to remote end for 200ms if the weak infeed echo is enabled, the
weak infeed end will echo signal and release tripping according to the logic.

ZPilot_Rev at weak source end must coordinate with ZPilot_Set of the remote end. The coverage
of ZPilot_Rev must exceed that of ZPilot_Set of the remote end. ZPilot_Rev only activates in the
protection calculation when the weak infeed logic is enabled. In case of the weak infeed logic not
enabled, the setting coordination is not required.

If the device does not pick up, and the weak infeed logic is enabled, upon receiving signal from
remote end with the voltage lower than the setting [85.U_UV_WI], the weak infeed logic will echo
back to remote end for 200ms. When either weak infeed echo or weak infeed tripping is enabled,
then the weak infeed logic is deemed to be enabled. During the device picking up, the weak infeed
logic is shown in Figure 3.9-15.

SIG FD.Pkp

SIG 85-x.Valid_Recv1

SIG Pilot DEF forward direction >=1

SIG Pilot DEF reverse direction


& &
SIG Pilot distance forward direction >=1 Forward direction (WI)

SIG Pilot distance reverse direction

EN [85.En_WI]

SET Up<[85.U_UV_WI] >=1 200ms 0ms &

SET Upp<[85.U_UV_WI]

Figure 3.9-15 Weak infeed logic during pickup

If the device does not pick up, the weak infeed logic is shown as the following figure:

SIG Signal receive condition &


&
EN [85.En_WI] WI echo

SET Up<[85.U_UV_WI] >=1


200ms 0ms &
SET Upp<[85.U_UV_WI]

Figure 3.9-16 Weak infeed logic without pickup

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For permissive scheme, the signal receive condition means that the permissive signal is received
or the unblocking signal is valid.

3.9.2.8 CB Echo

A feature is also provided which enables fast tripping to be maintained along the whole length of
the protected line, even when one terminal is open. The device will initiate sending a pulse of
200ms permissive signal when signal receive condition is met during CB is in open position.

Figure 3.9-17 Simplified CB echo logic for POTT

CB Echo logic is only applied to permissive overreach mode not underreach mode, and it is
processed without the device pickup. This logic will be terminated immediately once the device
picks up.

3.9.3 Function Block Diagram

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3.9.4 I/O Signals


Table 3.9-1 I/O signals of pilot distance protection

No. Input Signal Description


Pilot distance protection x enabling input 1, it is triggered from binary input or
1 85-x.Z.En1
programmable logic etc. (x=1 or 2)
Pilot distance protection x enabling input 2, it is triggered from binary input or
2 85-x.Z.En2
programmable logic etc. (x=1 or 2)
Pilot distance protection x blocking input, it is triggered from binary input or
3 85-x.Z.Blk
programmable logic etc. (x=1 or 2)
Input signal of indicating that pilot channel 1 is abnormal for pilot distance
4 85-x.Abnor_Ch1
protection x (x=1 or 2)
Input signal of receiving permissive signal via channel No.1 for pilot distance
protection x, or input signal of receiving permissive signal of A-phase via channel
5 85-x.Recv1
No.1 for pilot distance protection x (only for phase-segregated command scheme,
x=1 or 2)
Input signal of receiving permissive signal of B-phase via channel No.1 for pilot
6 85-x.RecvB
distance protection x (only for phase-segregated command scheme, x=1 or 2)
Input signal of receiving permissive signal of C-phase via channel No.1 for pilot
7 85-x.RecvC
distance protection x (only for phase-segregated command scheme, x=1 or 2)
Input signal of initiating sending permissive signal from external tripping signal for
8 85-x.ExTrp
pilot distance protection x (x=1 or 2)
9 85-x.Unblocking1 Unblocking signal 1 of pilot distance protection x (x=1 or 2)
Zone Extension enabling input 1 of pilot distance protection x, it is triggered from
10 85-x.ZX.En1
binary input or programmable logic etc. (x=1 or 2)
Zone Extension enabling input 2 of pilot distance protection x, it is triggered from
11 85-x.ZX.En2
binary input or programmable logic etc. (x=1 or 2)
Zone Extension blocking input 1 of pilot distance protection x, it is triggered from
12 85-x.ZX.Blk1
binary input or programmable logic etc. (x=1 or 2)
Zone Extension blocking input 2 of pilot distance protection x, it is triggered from
13 85-x.ZX.Blk2
binary input or programmable logic etc. (x=1 or 2)
14 79.Ready AR has been ready for reclosing cycle.
No. Output Signal Description
1 85-x.Z.On Pilot distance protection x is enabled. (x=1 or 2)
2 85-x.ZX.On Zone extension protection of pilot distance protection x is enabled. (x=1 or 2)
3 85-x.Op_Z Pilot distance protection x operates. (x=1 or 2)
Output signal of sending permissive signal 1 or sending A-phase permissive
4 85-x.Send1 signal of pilot distance protection x (only for phase-segregated command scheme,
x=1 or 2)
5 85-x.SendB Output signal of sending B-phase permissive signal of pilot distance protection x

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(only for phase-segregated command scheme, x=1 or 2)


Output signal of sending C-phase permissive signal of pilot distance protection x
6 85-x.SendC
(only for phase-segregated command scheme, x=1 or 2)
7 85-x.Op_ZX Zone extension protection of pilot distance protection x operates. (x=1 or 2)
8 85-x.ZX_St Zone extension protection of pilot distance protection x starts (x=1 or 2)

3.9.5 Settings
Table 3.9-2 Settings of pilot distance protection

No. Name Range Step Unit Remark


POTT
1 85.Opt_PilotMode PUTT Option of pilot scheme
Blocking
Option of phase-segregated
signal scheme or three-phase
signal scheme
2 85.Opt_Ch_PhSeg 0 or 1
0: three-phase signal scheme
1: phase-segregated signal
scheme
Enabling/disabling weak infeed
scheme
3 85.En_WI 0 or 1
0: disable
1: enable
Undervoltage setting of weak
4 85.U_UV_WI 0~Unn 0.001 V
infeed logic
Enabling/disabling pilot
distance protection
5 85.Z.En 0 or 1
0: disable
1: enable
Enabling/disabling unblocking
scheme
6 85.En_Unblocking1 0 or 1
0: disable
1: enable
Time delay for blocking
7 85.t_DPU_Blocking1 0.000~1.000 0.001 s scheme of pilot distance
protection operation
Time delay dropoff for current
8 85.t_DDO_CR1 0.000~1.000 0.001 s
reversal logic
Time delay pickup for current
9 85.t_DPU_CR1 0.000~1.000 0.001 s
reversal logic
Enabling/disabling zone
extension protection
10 85.ZX.En 0 or 1
0: disable
1: enable

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Pickup time delay for zone


11 85.t_DPU_ZX 0.000~10.000 0.001 s
extension protection operation

Table 3.9-3 Internal settings of pilot distance protection

No. Name Default Value Unit Remark


Pickup time delay of unblocking scheme for pilot
1 85.t_Unblocking1 0.1 s
channel 1
Option of PLC channel for pilot channel 1
2 85.Opt_PilotCh1 1 0: phase-to-phase channel
1: phase-to-ground channel

3.10 Pilot Directional Earth-fault Protection


3.10.1 General Application
Directional earth fault protection needs to coordinate with downstream protection with definite or
inverse time delay so it cannot clear an internal fault quickly. Pilot directional earth-fault protection
takes use of directional earth fault elements on both ends, it can detect high resistance fault and
maintain high-speed operation.

Pilot protection requires communication channel to exchange the protection information at both
ends. The channel may be dedicated or multiplexed channel through optical fiber or any other
communication media.

Pilot directional earth-fault protection can be used independently, for example, no distance
protection is equipped with the device but fast operation is required for the whole line, or it is used
as backup protection of pilot distance protection to enhance the sensitivity for an earth fault with
high fault resistance.

3.10.2 Function Description


Sending permissive signal (or terminating sending signal) to the opposite end is controlled by
forward direction element. Current reversal logic is available for parallel line operation and CB
echo logic is provided once pilot directional earth fault protection is enabled. Current reversal logic
is only used for permissive scheme. For blocking scheme, current reversal need not be considered
because there is a settable time delay in pilot directional earth-fault protection.

Pilot directional earth-fault protection can be enabled or disabled by input signals, logic setting and
blocking signal, as shown in Figure 3.10-1.

SIG 85-x.DEF.En1
&
SIG 85-x.DEF.En2

EN [85.DEF.En]
&
85-x.DEF.On
SIG 85-x.DEF.Blk

Figure 3.10-1 Enabling/disabling logic of pilot directional earth-fault protection

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Pilot directional earth-fault protection comprises permissive scheme and blocking scheme. It can
share pilot channel 1 ([85.DEF.En_IndepCh]=0) with pilot distance protection, or uses independent
pilot channel 2 ([85.DEF.En_IndepCh]=1) by setting logic setting [85.DEF.En_IndepCh]. For
underreach mode, pilot directional earth-fault always adopts independent pilot channel 2. The
logic of receiving signal is shown in Figure 3.10-2.

SET [85.Opt_PilotMode]=Blocking &


>=1
SIG 85-x.Recv1

&

SIG 85-x.Abnor_Ch1

SIG 85-x.Unblocking1 Valid


&
SET [85.Opt_PilotMode]=PUTT >=1 >=1
85-x.Valid_Recv_DEF
EN [85.DEF.En_IndepCh]

SET [85.Opt_PilotMode]=Blocking & &


>=1

SIG 85-x.Recv2 &

SIG 85-x.Abnor_Ch2

SIG 85-x.Unblocking2 Valid

Figure 3.10-2 Logic diagram of receiving signal

Figure 3.10-3 Forward/reverse direction of zero-sequence power

3.10.2.1 Permissive Transfer Trip (PTT)

Pilot protection with permissive scheme receives permissive signal from the device of remote end,
so as to combine with local discrimination condition to accelerate tripping, so it has high security.

Operation of forward directional earth fault element is used to send permissive signal to the
remote end when the protection is enabled and will release tripping signal upon receiving
permissive signal from the remote end with further guarded by no operation of reverse directional
earth fault element. This ensures the security of the protection.

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The following figure shows the schematic of permissive transfer trip.

Relay A
85-x.FwdDir_DEF_Pilot & &
[85.DEF.t_DPU] 85-x.Op_DEF 85-x.Op_DEF [85.DEF.t_DPU]
85-x.FwdDir_DEF_Pilot
Relay B

Figure 3.10-4 Simple schematic of DEF (permissive scheme)

For blocking scheme, pilot directional earth-fault protection will operate when there is an internal
fault with abnormal channel, however, it is possible that pilot directional earth-fault protection issue
an undesired trip when there is an external fault with abnormal channel.

SIG 85-x.ExTrp 0ms 150ms

& >=1
SIG CB open position &
200ms 0ms
SIG 85-x.Valid_Recv_DEF
&
SIG FD.Pkp 85-x.Send_DEF

SIG 85-x.FwdDir_DEF_Pilot &

SIG 85-x.RevDir_DEF_Pilot
&
&
SIG 85-x.Valid_Recv_DEF t1 t2

&
SIG FD.Pkp

SET [85.Opt_PilotMode]=PUTT >=1


&
SET [85.Opt_PilotMode]=POTT

&
SIG 85-x.DEF.On & 85-x.Op_DEF
[85.DEF.t_DPU] >=1

&

EN [85.DEF.En_IndepCh]

Figure 3.10-5 Logic diagram of DEF (permissive scheme)

t1: pickup time delay of current reversal

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t2: dropoff time delay of current reversal

When adopting independent pilot channel 2, settings of t1 [85.t_DPU_CR2] and t2


[85.t_DDO_CR2] should be considered individually from channel 1.

When sharing pilot channel 1 with pilot distance protection, t1 and t2 are the settings
[85.t_DPU_CR1] and [85.t_DDO_CR1] respectively.

3.10.2.2 Blocking

Permissive scheme has high security, but it relies on pilot channel seriously. Pilot directional
earth-fault protection will not operate when there is an internal fault with abnormal channel.
Blocking scheme could be considered as an alternative.

Blocking scheme sends blocking signal when fault detector picks up and zero-sequence forward
element does not operate or both zero-sequence forward element and zero-sequence reverse
element do not operate. Pilot directional earth-fault protection will operate if forward directional
zero-sequence overcurrent element operates and not receiving blocking signal.

85-x.FwdDir_DEF_Pilot

85-x.RevDir_DEF_Pilot
M
EM A Fault B EN

N
85-x.RevDir_DEF_Pilot

85-x.FwdDir_DEF_Pilot

Figure 3.10-6 Simple schematic of blocking

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SIG Trp >=1

SIG 85-x.ExTrp 0ms 150ms


>=1
SIG CB open position &
85-x.Send_DEF
SIG 85-x.FwdDir_DEF_Pilot &
&
SIG 85-x.RevDir_DEF_Pilot

SIG 85-x.Valid_Recv_DEF
&
SIG FD.Pkp [85.DEF.t_DPU] 85-x.Op_DEF

SET [85.Opt_PilotMode]=Blocking &

SIG 85-x.DEF.On

Figure 3.10-7 Logic diagram of DEF (Blocking scheme)

When DEF shares pilot channel 1 with pilot distance protection, time delay of pilot directional
earth-fault protection will change from the setting [85.DEF.t_DPU] to the setting
[85.t_DPU_Blocking1].

Because the time delay of pilot directional earth-fault protection has enough margin for current
reversal, so blocking scheme should not consider the current reversal condition.

3.10.2.3 Unblocking

Permissive scheme will operate only when it receives permissive signal from the remote end.
However, it may not receive permissive signal from the remote end when pilot channel fails. For
this case, pilot directional earth-fault protection can adopt unblocking scheme. Under normal
conditions, the signaling equipment works in the pilot frequency, and when the device operates to
send permissive signal, the signaling equipment will be switched to high frequency. While the
channel is blocked, the signaling equipment will receive neither pilot frequency signal nor high
frequency signal. The signaling equipment will provide a contact to the device as unblocking signal.
When the device receives unblocking signal from the signaling equipment, it will recognize
channel failure, and unblocking signal will be taken as permissive signal temporarily.

The unblocking scheme can only be used together with permissive scheme.

Figure 3.10-8 Logic diagram for unblocking

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3.10.2.4 Current Reversal

The reach of directional earth-fault protection is difficult to define. There may have problem for
pilot direction earth-fault protection applied on parallel line arrangement due to current reversal
phenomenon. Current reversal blocking logic using time delay method is adopted in the device. It
is the same logic as pilot distance protection. Please refer to section 3.9.2.6 for details. The only
difference is that different signal receive terminal is used if independent channel is selected.

3.10.2.5 CB Echo

It is the same logic as pilot distance protection. Please refer to section 3.9.2.8 for details. The only
difference is that different signal receive terminal is used if independent channel is selected.

3.10.3 Function Block Diagram

85

85-x.DEF.En1 85-x.DEF.On

85-x.DEF.En2 85-x.Op_DEF

85-x.DEF.Blk 85-x.DEF_BlkAR

85-x.Abnor_Ch1 85-x.Send1

85-x.Abnor_Ch2 85-x.Send2

85-x.Rcv1

85-x.Rcv2

85-x.ExTrp

85-x.Unblocking1

85-x.Unblocking2

3.10.4 I/O Signals


Table 3.10-1 I/O signals of pilot directional earth-fault protection

No. Input Signal Description


Pilot directional earth-fault protection x enabling input 1, it is triggered from binary
1 85-x.DEF.En1
input or programmable logic etc. (x=1 or 2)
Pilot directional earth-fault protection x enabling input 2, it is triggered from binary
2 85-x.DEF.En2
input or programmable logic etc. (x=1 or 2)
Pilot directional earth-fault protection x blocking input, it is triggered from binary
3 85-x.DEF.Blk
input or programmable logic etc. (x=1 or 2)
Input signal of indicating that pilot channel 1 is abnormal for pilot directional
4 85-x.Abnor_Ch1
earth-fault protection x (x=1 or 2)
Input signal of indicating that pilot channel 2 is abnormal for pilot directional
5 85-x.Abnor_Ch2
earth-fault protection x (x=1 or 2)

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Input signal of receiving permissive signal via channel 1 for pilot directional
6 85-x.Recv1
earth-fault protection x (x=1 or 2)
Input signal of receiving permissive signal via channel 2 for pilot directional
7 85-x.Recv2
earth-fault protection x (x=1 or 2)
Input signal of initiating sending permissive signal from external tripping signal
8 85-x.ExTrp
(x=1 or 2)
9 85-x.Unblocking1 Unblocking signal 1 for pilot directional earth-fault protection x (x=1 or 2)
10 85-x.Unblocking2 Unblocking signal 2 for pilot directional earth-fault protection x (x=1 or 2)
No. Output Signal Description
1 85-x.DEF.On Pilot directional earth-fault protection x is enabled. (x=1 or 2)
2 85-x.Op_DEF Pilot directional earth-fault protection x operates. (x=1 or 2)
3 85-x.DEF_BlkAR Pilot directional earth-fault protection x operates to block AR. (x=1 or 2)
Output signal of sending permissive signal 1 for pilot directional earth-fault
4 85-x.Send1 protection x when pilot directional earth-fault protection sharing pilot channel 1
with pilot distance protection (x=1 or 2)
Output signal of sending permissive signal 2 for pilot directional earth-fault
5 85-x.Send2 protection x when pilot directional earth-fault protection adopting independent pilot
channel 2 (x=1 or 2)

3.10.5 Settings
Table 3.10-2 Settings of pilot directional earth-fault protection

No. Name Range Step Unit Remark


Enabling/disabling pilot directional
earth-fault protection
1 85.DEF.En 0 or 1
0: disable
1: enable
Enabling/disabling pilot directional
earth-fault protection operate to
block AR
2 85.DEF.En_BlkAR 0 or 1 0: selective phase tripping and not
blocking AR
1: three-phase tripping and blocking
AR
Enabling/disabling independent
channel for pilot directional
earth-fault protection
0: pilot directional earth-fault
3 85.DEF.En_IndepCh 0 or 1
protection sharing same channel
with pilot distance protection
1: pilot directional earth-fault
adopting independent pilot channel
Enabling/disabling unblocking
4 85.En_Unblocking2 0 or 1
scheme for pilot DEF via pilot

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channel 2
0: disable
1: enable
Current setting of pilot directional
5 85.DEF.3I0_Set (0.050~30.000)×In 0.001 A
earth-fault protection
Time delay of pilot directional
6 85.DEF.t_DPU 0.001~10.000 0.001 s
earth-fault protection
Time delay pickup for current
reversal logic when pilot directional
7 85.t_DPU_CR2 0.000~1.000 0.001 s
earth-fault protection adopts
independent pilot channel 2
Time delay dropoff for current
reversal logic when pilot directional
8 85.t_DDO_CR2 0.000~1.000 0.001 s
earth-fault protection adopts
independent pilot channel 2

Table 3.10-3 Internal settings of pilot distance protection

No. Name Default Value Unit Remark


Pickup time delay of unblocking scheme for pilot
1 85.t_Unblocking2 0.2 s
channel 2
Option of PLC channel for pilot channel 2
2 85.Opt_PilotCh2 1 0: phase-to-phase channel
1: phase-to-ground channel

3.11 Current Direction


3.11.1 General Application
Overcurrent protection is widely used in the power system as backup protection, but in some
cases, the direction of current is necessary to aid to complete the selective tripping. As shown
below:

Figure 3.11-1 Line fault description

When line LM has an earth fault, the fault currents flowing through the relay A and the relay D are
of similar magnitude in most cases. It is desirable that the fault is isolated from the power system
by tripping the circuit breaker C and circuit breaker D. Hence, the overcurrent protection of relay A
and relay D require to associate with current direction to fulfill selective tripping.

Directional earth fault protection has a time delay due to coordinate with that of downstream so it
cannot clear the fault quickly. Pilot directional earth-fault protection, which is fulfilled by directional

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earth fault element on both ends, it can maintain fast operation and achieve high sensitivity to
detect high resistance fault.

3.11.2 Function Description


The module computes direction of phase current and phase-to-phase current, zero-sequence
current and negative-sequence current.

The direction of phase current and phase-to-phase current equips with an under-voltage direction
function to ensure that phase or phase-to-phase overcurrent protection has explicit directionality
when the polarized voltage is too low for close up fault.

The direction of zero-sequence current and negative-sequence current direction equips with an
impedance compensation function to ensure that zero-sequence or negative-sequence
overcurrent protection has explicit directionality when the zero-sequence voltage or the
negative-sequence voltage is too low.

3.11.2.1 Phase/Phase-to-phase Current Direction

By setting the characteristic angle [RCA_OC] to determine the most sensitive forward angle of
phase current and phase-to-phase current, power value is calculated using phase current with
phase polarized voltage or phase-to-phase current with phase-to-phase polarized voltage to
determine the direction of phase current or phase-to-phase current respectively in forward
direction or reverse direction. When the power value is zero, neither forward direction nor reverse
direction is considered. As shown below:

Figure 3.11-2 Vector diagram of current and voltage

Where:

φ is the setting [RCA_OC]

θ is the phase angle between polarized voltage and current

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The power value is calculated as below:

P=U×[I×COS(θ-φ)]

1. If P>0, the current direction polarized by U is forward direction

2. If P<0, the current direction polarized by U is reverse direction

From above diagram can be seen, when θ=φ, P reaches to the maximum value. It is considered
as the most sensitive forward direction. Hence, φ is called as sensitivity angle of phase
overcurrent protection.

1. Polarized voltage of phase or phase-to-phase current direction

In the event of asymmetrical fault, because phase or phase-to-phase voltage may decrease to
very low voltage whereas positive-sequence voltage does not, the polarized voltage of phase or
phase-to-phase current direction uses positive-sequence voltage to avoid wrong direction due to
too low polarized voltage. Therefore, using positive-sequence voltage as polarized voltage can
ensure that the direction determination has no dead zone for asymmetrical fault. For symmetric
fault, if positive-sequence voltage decreases to 15%Un, the device uses memorized
positive-sequence voltage as polarized voltage, the memorized positive-sequence voltage is 1.5
cycles pre-fault positive-sequence voltage.

2. Phase or phase-to-phase current direction under normal polarized voltage condition

When using normal polarized voltage to calculate phase and phase-to-phase current direction,
there are total twelve direction determination algorithm including forward direction and reverse
direction.

Table 3.11-1 Direction description

Direction Polarized Voltage Current


Forward direction U1a Ia
Phase A
Reverse direction U1a Ia
Forward direction U1b Ib
Phase B
Reverse direction U1b Ib
Forward direction U1c Ic
Phase C
Reverse direction U1c Ic
Forward direction U1ab Iab
Phase AB
Reverse direction U1ab Iab
Forward direction U1bc Ibc
Phase BC
Reverse direction U1bc Ibc
Forward direction U1ca Ica
Phase CA
Reverse direction U1ca Ica

3. Phase or phase-to-phase current direction for under-voltage conditions

When the symmetrical fault occurs on a power system, positive-sequence voltage may reduce to
less than 0.15Un, the device will switch to phase or phase-to-phase current direction for
under-voltage condition. The 1.5 cycle pre-fault positive-sequence voltage is used as polarized

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voltage with reverse threshold to ensure stable direction decision when three-phase voltage goes
to approximately zero due to close up fault.

At first, the threshold is forward offset before direction is determined, and the threshold will be
reversed offset after direction is determined.

3.11.2.2 Zero-sequence/Negative-sequence Current Direction

By setting the characteristic angle [RCA_ROC] and [RCA_NegOC] to determine the most
sensitive forward angle of zero-sequence current and negative-sequence current, power value is
calculated using zero-sequence current with zero-sequence voltage or negative-sequence current
with negative-sequence voltage to determine the direction of zero-sequence current and
negative-sequence current respectively in forward direction or reverse direction.

When the power value is between 0 and -0.1In, neither forward direction nor reverse direction is
considered.

Figure 3.11-3 Vector diagram of zero-sequence power

Vector diagram of negative-sequence power is similar to that of zero-sequence power.

Where:

φ is the setting [RCA_ROC] or the setting [RCA_NegOC]

θ is the phase angle between zero/negative-sequence voltage and zero/negative-sequence


current

3I0: calculated zero-sequence current by vector sum of Ia, Ib and Ic

The power value is calculated as below:

P=U×[I×COS(θ-φ)]

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 If P>0, the direction of zero /negative-sequence current is reverse direction

 If P<-0.1InVA, the direction of zero /negative-sequence current is forward direction

1. The direction of zero-sequence current

Calculating the power value using zero-sequence current (3I0) and zero-sequence voltage (3U0)
to determine the direction of zero-sequence current

According to the equation:

The zero-sequence current and the zero-sequence voltage can be gained by calculation

Zero-sequence power is: P=3U0×[3I0×COS(θ-φ)]

2. The direction of negative-sequence current

Calculating the power value using negative-sequence current (3I2) and negative-sequence
voltage (3U2) to determine the direction of negative-sequence current

According to the equation:

The negative-sequence current and the negative-sequence voltage can be gained by calculation

Negative-sequence power is: P=3U2×[3I2×COS(θ-φ)]

3. The direction of zero-sequence/negative-sequence current with impedance compensation

When zero-sequence impedance or negative-sequence impedance behind the device is very


small, if the fault in forward direction happens, the measured zero-sequence voltage or
negative-sequence voltage by the device may be relatively small to determine correct direction. In
order to solve this problem, compensated zero-sequence voltage and negative-sequence voltage
are used for power calculation.

The compensation formula is as follows:

is the setting [Z0_Comp], which cannot exceed the total zero-sequence impedance of

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the protected line

is the setting [Z2_Comp], which cannot exceed the total negative-sequence impedance

of the protected line

3.11.3 Function Block Diagram

DIR

FwdDir_ROC

RevDir_ROC

FwdDir_NegOC

RevDir_NegOC

FwdDir_A

FwdDir_B

FwdDir_C

RevDir_A

RevDir_B

RevDir_C

FwdDir_AB

FwdDir_BC

FwdDir_CA

RevDir_AB

RevDir_BC

RevDir_CA

3.11.4 I/O Signals


Table 3.11-2 I/O signals of current direction

No. Output Signal Description


1 FwdDir_ROC The forward direction of zero-sequence power
2 RevDir_ROC The reverse direction of zero-sequence power
3 FwdDir_NegOC The forward direction of negative-sequence power
4 RevDir_NegOC The reverse direction of negative-sequence power
5 FwdDir_A The forward direction of phase-A current
6 FwdDir_B The forward direction of phase-B current
7 FwdDir_C The forward direction of phase-C current
8 RevDir_A The reverse direction of phase-A current

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9 RevDir_B The reverse direction of phase-B current


10 RevDir_C The reverse direction of phase-C current
11 FwdDir_AB The forward direction of phase-AB current
12 FwdDir_BC The forward direction of phase-BC current
13 FwdDir_CA The forward direction of phase-CA current
14 RevDir_AB The reverse direction of phase-AB current
15 RevDir_BC The reverse direction of phase-BC current
16 RevDir_CA The reverse direction of phase-CA current

3.11.5 Settings
Table 3.11-3 Settings of current direction

No. Name Range Step Unit Remark


The characteristic angle of directional
1 RCA_OC 30.00~89.00 0.01 deg
phase overcurrent element
The characteristic angle of directional earth
2 RCA_ROC 30.00~89.00 0.01 deg
fault element
The characteristic angle of directional
3 RCA_NegOC 30.00~89.00 0.01 deg
negative-sequence overcurrent element
The compensated zero-sequence
4 Z0_Comp (0.000~4Unn)/In 0.001 ohm
impedance
The compensated negative-sequence
5 Z2_Comp (0.000~4Unn)/In 0.001 ohm
impedance

3.12 Phase Overcurrent Protection


3.12.1 General Application
When a fault occurs in power system, usually the fault current would be very large and phase
overcurrent protection operates monitoring fault current is then adopted to avoid further damage to
protected equipment. Directional element can be selected to improve the sensitivity and selectivity
of the protection. For application on feeder-transformer circuits, second harmonic can also be
selected to block phase overcurrent protection to avoid the effect of inrush current on the
protection.

3.12.2 Function Description


Phase overcurrent protection has following functions:

1. Four-stage phase overcurrent protection with independent logic, current and time delay
settings.

2. All stages can be selected as definite-time or inverse-time characteristic. The inverse-time


characteristic is selectable among IEC and ANSI/IEEE standard inverse-time characteristics,
and a user-defined inverse-time curve is available for stage 1 of phase overcurrent protection.

3. Direction control element can be selected to control each stage phase overcurrent protection

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with three options: no direction, forward direction and reverse direction.

4. Second harmonic can be selected to block each stage of phase overcurrent protection.

3.12.2.1 Overview

Phase overcurrent protection consists of following three elements:

1. Overcurrent element: each stage is independent overcurrent element.

2. Direction control element: one direction control element shared by all overcurrent elements,
and each overcurrent element can individually select protection direction.

3. Harmonic blocking element: one harmonic blocking element shared by all overcurrent
elements and each phase overcurrent element can individually enable the output signal from
harmonic element as a blocking input.

3.12.2.2 Phase Overcurrent Element

The operation criterion for each stage of overcurrent element is:

Ip> [50/51Px.I_Set] Equation 3.12-1

Where:

Ip is measured phase current.

[50/51Px.I_Set] is the current setting of stage x (x=1, 2, 3, or 4) of overcurrent element.

3.12.2.3 Direction Control Element

Please refer to section 3.11 for details.

3.12.2.4 Harmonic Blocking Element

When phase overcurrent protection is used to protect feeder-transformer circuits harmonic


blocking function can be selected for each stage of phase overcurrent element by configuring logic
setting [50/51Px.En_Hm2_Blk] (x=1, 2, 3 or 4) to prevent maloperation due to inrush current.

When the percentage of second harmonic component to fundamental component of any phase
current is greater than the setting [50/51P.K_Hm2], harmonic blocking element operates to block
stage x overcurrent element if corresponding logic setting [50/51Px.En_Hm2_Blk] enabled.

Operation criterion:

Equation 3.12-2

Where:

is second harmonic of phase current

is fundamental component of phase current.

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[50/51P.K_Hm2] is harmonic blocking coefficient.

If fundamental component of any phase current is lower than the minimum operating current
(0.1In), then harmonic calculation is not carried out and harmonic blocking element does not
operate.

3.12.2.5 Characteristic Curve

All stages can be selected as definite-time or inverse-time characteristic, inverse-time operating


characteristic is as follows.

Where:

Iset is current setting [50/51Px.I_Set].

Tp is time multiplier setting [50/51Px.TMS].

α is a constant.

K is a constant.

C is a constant.

I is measured phase current from line CT

The user can select the operating characteristic from various inverse-time characteristic curves by
setting [50/51Px.Opt_Curve], and parameters of available characteristics for selection are shown
in the following table.

Table 3.12-1 Inverse-time curve parameters

50/51Px.Opt_Curve Time Characteristic K α C


DefTime Definite time
IECN IEC Normal inverse 0.14 0.02 0
IECV IEC Very inverse 13.5 1.0 0
IECE IEC Extremely inverse 80.0 2.0 0
IECST IEC Short-time inverse 0.05 0.04 0
IECLT IEC Long-time inverse 120.0 1.0 0
ANSIE ANSI Extremely inverse 28.2 2.0 0.1217
ANSIV ANSI Very inverse 19.61 2.0 0.491
ANSI ANSI Inverse 0.0086 0.02 0.0185
ANSIM ANSI Moderately inverse 0.0515 0.02 0.114
ANSILTE ANSI Long-time extremely inverse 64.07 2.0 0.25
ANSILTV ANSI Long-time very inverse 28.55 2.0 0.712
ANSILT ANSI Long-time inverse 0.086 0.02 0.185
UserDefine Programmable user-defined

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If all available curves do not comply with user application, user may set [50/51Px.Opt_Curve] as
“UserDefine” to customize the inverse-time curve characteristic with constants α, K and C. (only
stage 1)

When inverse-time characteristic is selected, if calculated operating time is less than setting
[50/51Px.tmin], then the operating time of the protection changes to the value of setting
[50/51Px.tmin] automatically.

Define-time or inverse-time phase overcurrent protection drops off instantaneously after fault
current disappears.

3.12.3 Function Block Diagram

3.12.4 I/O Signals


Table 3.12-2 I/O signals of phase overcurrent protection

No. Input Signal Description


Stage x of phase overcurrent protection enabling input 1, it is triggered from binary
1 50/51Px.En1
input or programmable logic etc.
Stage x of phase overcurrent protection enabling input 2, it is triggered from binary
2 50/51Px.En2
input or programmable logic etc.
Stage x of phase overcurrent protection blocking input, it is triggered from binary
3 50/51Px.Blk
input or programmable logic etc.
No. Output Signal Description
1 50/51Px.On Stage x of phase overcurrent protection is enabled.
2 50/51Px.Op Stage x of phase overcurrent protection operates.
3 50/51Px.St Stage x of phase overcurrent protection starts.
4 50/51Px.StA Stage x of phase overcurrent protection starts (A-Phase).
5 50/51Px.StB Stage x of phase overcurrent protection starts (B-Phase).
6 50/51Px.StC Stage x of phase overcurrent protection starts (C-Phase).

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3.12.5 Logic

EN [50/51Px.En]
&
SIG 50/51Px.En1 &
50/51Px.On
SIG 50/51Px.En2
>=1
SIG 50/51Px.Blk 50/51Px.St

SET Ia>[50/51Px.I_Set] &


50/51Px.StA

SET Ib>[50/51Px.I_Set] &


50/51Px.StB

SET Ic>[50/51Px.I_Set] &


50/51Px.StC
SET [50/51Px.Opt_Dir]=Forward &

SIG Forward DIR

SET [50/51Px.Opt_Dir]=Reverse & >=1


>=1
SIG Reverse DIR

SIG VTS.Alm &

EN [50/51Px.En_VTS_Blk]

SET [50/51Px.Opt_Dir]=Non-Directional

SIG I3P 2nd Hm Detect & &

SET [50/51Px.En_Hm2_Blk]

SIG 50/51Px.On &

SIG FD.Pkp

SET [50/51Px.Opt_Curve]=DefTime &


[50/51Px.t_Op] 0 >=1
50/51Px.Op

& Timer
t
SIG 50/51Px.St

Figure 3.12-1 Logic diagram of phase overcurrent protection

Where:

x=1, 2, 3, 4

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3.12.6 Settings
Table 3.12-3 Settings of phase overcurrent protection

No. Name Range Step Unit Remark


Setting of second harmonic
1 50/51P.K_Hm2 0.000~1.000 0.001 component for blocking phase
overcurrent elements
Current setting for stage 1 of phase
2 50/51P1.I_Set (0.050~30.000)×In 0.001 A
overcurrent protection
Time delay for stage 1 of phase
3 50/51P1.t_Op 0.000~20.000 0.001 s
overcurrent protection
Enabling/disabling stage 1 of phase
overcurrent protection
4 50/51P1.En 0 or 1
0: disable
1: enable
Enabling/Disabling auto-reclosing
blocked when stage 1 of phase
5 50/51P1.En_BlkAR 0 or 1 overcurrent protection operates
0: disable
1: enable
Enabling/Disabling stage 1 of phase
overcurrent protection is blocked by
6 50/51P1.En_VTS_Blk 0 or 1 VT circuit failure
0: disable
1: enable
Non-Directional
Direction option for stage 1 of phase
7 50/51P1.Opt_Dir Forward
overcurrent protection
Reverse
Enabling/disabling second harmonic
blocking for stage 1 of phase
8 50/51P1.En_Hm2_Blk 0 or 1 overcurrent protection
0: disable
1: enable
DefTime
IECN
IECV
IECE
IECST Option of characteristic curve for
9 50/51P1.Opt_Curve IECLT stage 1 of phase overcurrent
ANSIE protection
ANSIV
ANSI
ANSIM
ANSILTE

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ANSILTV
ANSILT
UserDefine
Time multiplier setting for stage 1 of
10 50/51P1.TMS 0.010~200.000 0.001 inverse-time phase overcurrent
protection
Minimum operating time for stage 1
11 50/51P1.tmin 0.000~20.000 0.001 s of inverse-time phase overcurrent
protection
Constant “α” for stage 1 of
customized inverse-time
12 50/51P1.Alpha 0.010~5.000 0.001
characteristic phase overcurrent
protection
Constant “C” for stage 1 of
customized inverse-time
13 50/51P1.C 0.000~20.000 0.001
characteristic phase overcurrent
protection
Constant “K” for stage 1 of
customized inverse-time
14 50/51P1.K 0.050~20.000 0.001
characteristic phase overcurrent
protection
Current setting for stage 2 of phase
15 50/51P2.I_Set (0.050~30.000)×In 0.001 A
overcurrent protection
Time delay for stage 2 of phase
16 50/51P2.t_Op 0.000~20.000 0.001 s
overcurrent protection
Enabling/disabling stage 2 of phase
overcurrent protection
17 50/51P2.En 0 or 1
0: disable
1: enable
Enabling/Disabling auto-reclosing
blocked when stage 2 of phase
18 50/51P2.En_BlkAR 0 or 1 overcurrent protection operates
0: disable
1: enable
Enabling/Disabling stage 2 of phase
overcurrent protection is blocked by
19 50/51P2.En_VTS_Blk 0 or 1 VT circuit failure
0: disable
1: enable
Non-Directional
Direction option for stage 2 of phase
20 50/51P2.Opt_Dir Forward
overcurrent protection
Reverse
Enabling/disabling second harmonic
21 50/51P2.En_Hm2_Blk 0 or 1
blocking for stage 2 of phase

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overcurrent protection
0: disable
1: enable
DefTime
IECN
IECV
IECE
IECST
IECLT Option of characteristic curve for
22 50/51P2.Opt_Curve ANSIE stage 2 of phase overcurrent
ANSIV protection
ANSI
ANSIM
ANSILTE
ANSILTV
ANSILT
Time multiplier setting for stage 2 of
23 50/51P2.TMS 0.010~200.000 0.001 inverse-time phase overcurrent
protection.
Minimum operating time for stage 2
24 50/51P2.tmin 0.000~20.000 0.001 s of inverse-time phase overcurrent
protection
Current setting for stage 3 of phase
25 50/51P3.I_Set (0.050~30.000)×In 0.001 A
overcurrent protection
Time delay for stage 3 of phase
26 50/51P3.t_Op 0.000~20.000 0.001 s
overcurrent protection
Enabling/disabling stage 3 of phase
overcurrent protection
27 50/51P3.En 0 or 1
0: disable
1: enable
Enabling/Disabling auto-reclosing
blocked when stage 3 of phase
28 50/51P3.En_BlkAR 0 or 1 overcurrent protection operates
0: disable
1: enable
Enabling/Disabling stage 3 of phase
overcurrent protection is blocked by
29 50/51P3.En_VTS_Blk 0 or 1 VT circuit failure
0: disable
1: enable
Non-Directional
Direction option for stage 3 of phase
30 50/51P3.Opt_Dir Forward
overcurrent protection
Reverse
31 50/51P3.En_Hm2_Blk 0 or 1 Enabling/disabling second harmonic

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blocking for stage 3 of phase


overcurrent protection
0: disable
1: enable
DefTime
IECN
IECV
IECE
IECST
IECLT Option of characteristic curve for
32 50/51P3.Opt_Curve ANSIE stage 3 of phase overcurrent
ANSIV protection
ANSI
ANSIM
ANSILTE
ANSILTV
ANSILT
Time multiplier setting for stage 3 of
33 50/51P3.TMS 0.010~200.000 0.001 inverse-time phase overcurrent
protection.
Minimum operating time for stage 3
34 50/51P3.tmin 0.000~20.000 0.001 s of inverse-time phase overcurrent
protection
Current setting for stage 4 of phase
35 50/51P4.I_Set (0.050~30.000)×In 0.001 A
overcurrent protection
Time delay for stage 4 of phase
36 50/51P4.t_Op 0.000~20.000 0.001 s
overcurrent protection
Enabling/disabling stage 4 of phase
overcurrent protection
37 50/51P4.En 0 or 1
0: disable
1: enable
Enabling/Disabling auto-reclosing
blocked when stage 4 of phase
38 50/51P4.En_BlkAR 0 or 1 overcurrent protection operates
0: disable
1: enable
Enabling/Disabling stage 4 of phase
overcurrent protection is blocked by
39 50/51P4.En_VTS_Blk 0 or 1 VT circuit failure
0: disable
1: enable
Non-Directional
Direction option for stage 4 of phase
40 50/51P4.Opt_Dir Forward
overcurrent protection
Reverse

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Enabling/disabling second harmonic


blocking for stage 4 of phase
41 50/51P4.En_Hm2_Blk 0 or 1 overcurrent protection
0: disable
1: enable
DefTime
IECN
IECV
IECE
IECST
IECLT Option of characteristic curve for
42 50/51P4.Opt_Curve ANSIE stage 4 of phase overcurrent
ANSIV protection
ANSI
ANSIM
ANSILTE
ANSILTV
ANSILT
Time multiplier setting for stage 4 of
43 50/51P4.TMS 0.010~200.000 0.001 inverse-time phase overcurrent
protection.
Minimum operating time for stage 4
44 50/51P4.tmin 0.010~20.000 0.001 s of inverse-time phase overcurrent
protection

3.13 Earth Fault Protection


3.13.1 General Application
During normal operation of power system, there is trace residual current, whereas a fault current
flows to earth will result in greater residual current. Therefore, residual current is adopted for the
calculation of earth fault protection.

In order to improve the selectivity of earth fault protection in power grid with multiple power
sources, directional element can be selected to control earth fault protection. For application on
line-transformer unit, second harmonic also can be selected to block earth fault protection to avoid
the effect of sympathetic current on the protection.

3.13.2 Function Description


Earth fault protection has following functions:

1. Four-stage earth fault protection with independent logic, current and time delay settings.

2. All stages can be selected as definite-time or inverse-time characteristic. The inverse-time


characteristic is selectable, among IEC and ANSI/IEEE standard inverse-time characteristics,
and a user-defined inverse-time curve is available for stage 1 of earth fault protection.

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3. Directional element can be selected to control each stage of earth fault protection with three
options: no direction, forward direction and reverse direction.

4. Second harmonic can be selected to block each stage of earth fault protection.

3.13.2.1 Overview

Earth fault protection consists of following three elements:

1. Overcurrent element: each stage equipped with one independent overcurrent element.

2. Directional control element: one direction control element shared by all overcurrent elements,
and each overcurrent element can individually select protection direction.

3. Harmonic blocking element: one harmonic blocking element shared by all overcurrent
elements and each overcurrent element can individually enable the output signal of harmonic
blocking element as a blocking input.

3.13.2.2 Zero-sequence Overcurrent Element

The operation criterion for each stage of earth fault protection is:

3I0>[50/51Gx.3I0_Set] Equation 3.13-1

Where:

3I0 is the calculated residual current.

[50/51Gx.3I0_Set] is the current setting of stage x (x=1, 2, 3, or 4) of earth fault protection.

3.13.2.3 Direction Control Element

Please refer to section 3.11 for details.

3.13.2.4 Harmonic Blocking Element

In order to prevent effects of inrush current on earth fault protection, harmonic blocking function
can be selected for each stage of earth fault element by configuring logic setting
[50/51Gx.En_Hm2_Blk] (x=1, 2, 3 or 4).

When the percentage of second harmonic component to fundamental component of residual


current is greater than the setting [50/51G.K_Hm2], harmonic blocking element operates to block
stage x of earth fault protection if corresponding logic setting [50/51Gx.En_Hm2_Blk] is enabled

Operation criterion:

Equation 3.13-2

Where:

is second harmonic of residual current

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is fundamental component of residual current.

[50/51G.K_Hm2] is harmonic blocking coefficient.

If fundamental component of residual current is lower than the minimum operating current (0.1In)
then harmonic calculation is not carried out and harmonic blocking element does not operate.

3.13.2.5 Characteristic Curve

All 4 stages earth fault protection can be selected as definite-time or inverse-time characteristic,
and inverse-time operating time curve is as follows.

Equation 3.13-3

Where:

Iset is residual current setting [50/51G.3I0_Set]

Tp is time multiplier setting [50/51Gx.TMS].

K is a constant

C is a constant.

α is a constant.

3I0 is the calculated residual current.

The user can select the operating characteristic from various inverse-time characteristic curves by
setting [50/51Gx.Opt_Curve], and parameters of available characteristics for selection are shown
in the following table.

Table 3.13-1 Inverse-time curve parameters

50/51Gx.Opt_Curve Time Characteristic K α C


DefTime Definite time
IECN IEC Normal inverse 0.14 0.02 0
IECV IEC Very inverse 13.5 1.0 0
IECE IEC Extremely inverse 80.0 2.0 0
IECST IEC Short-time inverse 0.05 0.04 0
IECLT IEC Long-time inverse 120.0 1.0 0
ANSIE ANSI Extremely inverse 28.2 2.0 0.1217
ANSIV ANSI Very inverse 19.61 2.0 0.491
ANSI ANSI Inverse 0.0086 0.02 0.0185
ANSIM ANSI Moderately inverse 0.0515 0.02 0.114
ANSILTE ANSI Long-time extremely inverse 64.07 2.0 0.25
ANSILTV ANSI Long-time very inverse 28.55 2.0 0.712

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50/51Gx.Opt_Curve Time Characteristic K α C


ANSILT ANSI Long-time inverse 0.086 0.02 0.185
UserDefine Programmable User-defined

If all available curves do not comply with user application, user may set [50/51Gx.Opt_Curve] as
“UserDefine” to customize the inverse-time curve characteristic, and constants K, α and C with
configuration tool software. (only stage 1)

When inverse-time characteristic is selected, if calculated operating time is less than setting
[50/51Gx.tmin], then the operating time of the protection changes to the value of setting
[50/51Gx.tmin] automatically.

Define-time or inverse-time directional earth-fault protection drops off instantaneously after fault
current disappears.

3.13.3 Function Block Diagram

3.13.4 I/O Signals


Table 3.13-2 I/O signals of earth fault protection

No. Input Signal Description


Stage x of earth fault protection enabling input 1, it is triggered from binary input or
1 50/51Gx.En1
programmable logic etc.
Stage x of earth fault protection enabling input 2, it is triggered from binary input or
2 50/51Gx.En2
programmable logic etc.
Stage x of earth fault protection blocking input, it is triggered from binary input or
3 50/51Gx.Blk
programmable logic etc.
No. Output Signal Description
1 50/51Gx.On Stage x of earth fault protection is enabled.
2 50/51Gx.St Stage x of earth fault protection starts.
3 50/51Gx.Op Stage x of earth fault protection operates.

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3.13.5 Logic

Figure 3.13-1 Logic diagram of earth fault protection

Where:

x=1, 2, 3, 4

Abnormal condition 1: when the system is under pole disagreement condition, for 1-pole AR, earth
fault protection will operate. If the logic setting [50/51Gx.En_Abnor_Blk] is set as “1”, the stage x of
earth fault protection will be blocked. If the logic setting [50/51Gx.En_Abnor_Blk] is set as “0”,
earth fault protection is not controlled by direction element.

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Abnormal condition 2: When manually closing circuit breaker, three phases of the circuit breaker
maybe not operate simultaneously, and SOTF protection should operate. If the logic setting
[50/51Gx.En_Abnor_Blk] is set as “1”, the stage x of earth fault protection will be blocked. If the
logic setting [50/51Gx.En_Abnor_Blk] is set as “0”, earth fault protection is not controlled by
direction element.

Abnormal condition 3: VT circuit failure. If the logic setting [50/51Gx.En_Abnor_Blk] is set as “1”,
the stage x of earth fault protection will be blocked. If the logic setting [50/51Gx.En_Abnor_Blk] is
set as “0”, earth fault protection is not controlled by direction element.

3.13.6 Settings
Table 3.13-3 Settings of earth fault protection

No. Name Range Step Unit Remark


Setting of second harmonic
1 50/51G.K_Hm2 0.000~1.000 0.001 component for blocking earth
fault elements
Current setting for stage 1 of
2 50/51G1.3I0_Set (0.050~30.000)×In 0.001 A
earth fault protection
Time delay for stage 1 of earth
3 50/51G1.t_Op 0.000~20.000 0.001 s
fault protection
Enabling/disabling stage 1 of
earth fault protection
4 50/51G1.En 0 or 1
0: disable
1: enable
Enabling/Disabling
auto-reclosing blocked when
stage 1 of earth fault protection
5 50/51G1.En_BlkAR 0 or 1
operates
0: disable
1: enable
Non_Directional
Direction option for stage 1 of
6 50/51G1.Opt_Dir Forward
earth fault protection
Reverse
Enabling/disabling second
harmonic blocking for stage 1 of
7 50/51G1.En_Hm2_Blk 0 or 1 earth fault protection
0: disable
1: enable
Enabling/disabling blocking for
stage 1 of earth fault protection
8 50/51G1.En_Abnor_Blk 0 or 1 under abnormal conditions
0: disable
1: enable
9 50/51G1.En_CTS_Blk 0 or 1 Enabling/disabling blocking for

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3 Operation Theory

stage 1 of earth fault protection


under CT failure conditions
0: disable
1: enable
DefTime
IECN
IECV
IECE
IECST
IECLT
ANSIE Option of characteristic curve for
10 50/51G1.Opt_Curve
ANSIV stage 1 of earth fault protection
ANSI
ANSIM
ANSILTE
ANSILTV
ANSILT
UserDefine
Time multiplier setting for stage
11 50/51G1.TMS 0.010~200.000 0.001 1 of inverse-time earth fault
protection
Minimum operating time for
12 50/51G1.tmin 0.050~20.000 0.001 s stage 1 of inverse-time earth
fault protection
Constant “α” for stage 1 of
customized inverse-time
13 50/51G1.Alpha 0.010~5.000 0.001
characteristic earth fault
protection
Constant “C” for stage 1 of
customized inverse-time
14 50/51G1.C 0.000~20.000 0.001
characteristic earth fault
protection
Constant “K” for stage 1 of
customized inverse-time
15 50/51G1.K 0.050~20.000 0.001
characteristic earth fault
protection
Current setting for stage 2 of
16 50/51G2.3I0_Set (0.050~30.000)×In 0.001 A
earth fault protection
Time delay for stage 2 of earth
17 50/51G2.t_Op 0.000~20.000 0.001 s
fault protection
Enabling/disabling stage 2 of
earth fault protection
18 50/51G2.En 0 or 1
0: disable
1: enable

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Enabling/Disabling
auto-reclosing blocked when
stage 2 of earth fault protection
19 50/51G2.En_BlkAR 0 or 1
operates
0: disable
1: enable
Non_Directional
Direction option for stage 2 of
20 50/51G2.Opt_Dir Forward
earth fault protection
Reverse
Enabling/disabling second
harmonic blocking for stage 2 of
21 50/51G2.En_Hm2_Blk 0 or 1 earth fault protection
0: disable
1: enable
Enabling/disabling blocking for
stage 2 of earth fault protection
22 50/51G2.En_Abnor_Blk 0 or 1 under abnormal conditions
0: disable
1: enable
Enabling/disabling blocking for
stage 2 of earth fault protection
23 50/51G2.En_CTS_Blk 0 or 1 under CT failure conditions
0: disable
1: enable
DefTime
IECN
IECV
IECE
IECST
IECLT
Option of characteristic curve for
24 50/51G2.Opt_Curve ANSIE
stage 2 of earth fault protection
ANSIV
ANSI
ANSIM
ANSILTE
ANSILTV
ANSILT
Time multiplier setting for stage
25 50/51G2.TMS 0.010~200.000 0.001 2 of inverse-time earth fault
protection
Minimum operating time for
26 50/51G2.tmin 0.050~20.000 0.001 s stage 2 of inverse-time earth
fault protection
27 50/51G3.3I0_Set (0.050~30.000)×In 0.001 A Current setting for stage 3 of

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earth fault protection


Time delay for stage 3 of earth
28 50/51G3.t_Op 0.000~20.000 0.001 s
fault protection
Enabling/disabling stage 3 of
earth fault protection
29 50/51G3.En 0 or 1
0: disable
1: enable
Enabling/Disabling
auto-reclosing blocked when
stage 3 of earth fault protection
30 50/51G3.En_BlkAR 0 or 1
operates
0: disable
1: enable
Non_Directional
Direction option for stage 3 of
31 50/51G3.Opt_Dir Forward
earth fault protection
Reverse
Enabling/disabling second
harmonic blocking for stage 3 of
32 50/51G3.En_Hm2_Blk 0 or 1 earth fault protection
0: disable
1: enable
Enabling/disabling blocking for
stage 3 of earth fault protection
33 50/51G3.En_Abnor_Blk 0 or 1 under abnormal conditions
0: disable
1: enable
Enabling/disabling blocking for
stage 3 of earth fault protection
34 50/51G3.En_CTS_Blk 0 or 1 under CT failure conditions
0: disable
1: enable
DefTime
IECN
IECV
IECE
IECST
IECLT
Option of characteristic curve for
35 50/51G3.Opt_Curve ANSIE
stage 3 of earth fault protection
ANSIV
ANSI
ANSIM
ANSILTE
ANSILTV
ANSILT

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Time multiplier setting for stage


36 50/51G3.TMS 0.010~200.000 0.001 3 of inverse-time earth fault
protection
Minimum operating time for
37 50/51G3.tmin 0.050~20.000 0.001 s stage 3 of inverse-time earth
fault protection
Current setting for stage 4 of
38 50/51G4.3I0_Set (0.050~30.000)×In 0.001 A
earth fault protection
Time delay for stage 4 of earth
39 50/51G4.t_Op 0.000~20.000 0.001 s
fault protection
Enabling/disabling stage 4 of
earth fault protection
40 50/51G4.En 0 or 1
0: disable
1: enable
Enabling/Disabling
auto-reclosing blocked when
stage 4 of earth fault protection
41 50/51G4.En_BlkAR 0 or 1
operates
0: disable
1: enable
Non_Directional
Direction option for stage 4 of
42 50/51G4.Opt_Dir Forward
earth fault protection
Reverse
Enabling/disabling second
harmonic blocking for stage 4 of
43 50/51G4.En_Hm2_Blk 0 or 1 earth fault protection
0: disable
1: enable
Enabling/disabling blocking for
stage 4 of earth fault protection
44 50/51G4.En_Abnor_Blk 0 or 1 under abnormal conditions
0: disable
1: enable
Enabling/disabling blocking for
stage 4 of earth fault protection
45 50/51G4.En_CTS_Blk 0 or 1 under CT failure conditions
0: disable
1: enable
DefTime
IECN
IECV Option of characteristic curve for
46 50/51G4.Opt_Curve
IECE stage 4 of earth fault protection
IECST
IECLT

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ANSIE
ANSIV
ANSI
ANSIM
ANSILTE
ANSILTV
ANSILT
Time multiplier setting for stage
47 50/51G4.TMS 0.010~200.000 0.001 4 of inverse-time earth fault
protection
Minimum operating time for
48 50/51G4.tmin 0.050~20.000 0.001 s stage 4 of inverse-time earth
fault protection

3.14 Overcurrent Protection for VT Circuit Failure


3.14.1 General Application
When protection VT circuit fails, distance protection will be disabled. As a substitute, definite-time
phase overcurrent protection and ground overcurrent protection will be enabled automatically, if
selected, as backup protection of distance protection.

3.14.2 Function Block Diagram

50PVT/50GVT

50PVT.En1 50PVT.On

50PVT.En2 50PVT.Op

50PVT.Blk 50PVT.St

50GVT.En1 50PVT.StA

50GVT.En2 50PVT.StB

50GVT.Blk 50PVT.StC

50GVT.On

50GVT.Op

50GVT.St

3.14.3 I/O Signals


Table 3.14-1 I/O signals of overcurrent protection for VT circuit failure

No. Input Signal Description


Phase overcurrent protection for VT circuit failure enabling input 1, it is triggered
1 50PVT.En1
from binary input or programmable logic etc.

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Phase overcurrent protection for VT circuit failure enabling input 2, it is triggered


2 50PVT.En2
from binary input or programmable logic etc.
Phase overcurrent protection for VT circuit failure blocking input, it is triggered
3 50PVT.Blk
from binary input or programmable logic etc.
Ground overcurrent protection for VT circuit failure enabling input 1, it is triggered
4 50GVT.En1
from binary input or programmable logic etc.
Ground overcurrent protection for VT circuit failure enabling input 2, it is triggered
5 50GVT.En2
from binary input or programmable logic etc.
Ground overcurrent protection for VT circuit failure blocking input, it is triggered
6 50GVT.Blk
from binary input or programmable logic etc.
No. Output Signal Description
1 50PVT.On Phase overcurrent protection for VT circuit failure is enabled.
2 50PVT.Op Phase overcurrent protection for VT circuit failure operates.
3 50PVT.St Phase overcurrent protection for VT circuit failure starts.
4 50PVT.StA Phase overcurrent protection for VT circuit failure starts (A-Phase).
5 50PVT.StB Phase overcurrent protection for VT circuit failure starts (B-Phase).
6 50PVT.StC Phase overcurrent protection for VT circuit failure starts (C-Phase).
7 50GVT.On Ground overcurrent protection for VT circuit failure is enabled.
8 50GVT.Op Ground overcurrent protection for VT circuit failure operates.
9 50GVT.St Ground overcurrent protection for VT circuit failure starts.

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3.14.4 Logic

Figure 3.14-1 Logic diagram of overcurrent protection for VT circuit failure

3.14.5 Settings
Table 3.14-2 Settings of overcurrent protection for VT circuit failure

No. Name Range Step Unit Remark


Current setting of phase overcurrent
1 50PVT.I_Set (0.050~30.000)×In 0.001 A
protection when VT circuit failure
Time delay of phase overcurrent
2 50PVT.t_Op 0.000~10.000 0.001 s
protection when VT circuit failure
Enabling/disabling phase overcurrent
protection when VT circuit failure
3 50PVT.En 0 or 1
0: disable
1: enable
Current setting of ground overcurrent
4 50GVT.3I0_Set (0.050~30.000)×In 0.001 A
protection when VT circuit failure
Time delay of ground overcurrent
5 50GVT.t_Op 0.000~10.000 0.001 s
protection when VT circuit failure
6 50GVT.En 0 or 1 Enabling/disabling ground

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overcurrent protection when VT circuit


failure
0: disable
1: enable

3.15 Residual Current SOTF Protection


3.15.1 General Application
When the circuit breaker is closed manually or automatically, it is possible to switch on to an
existing fault. This is especially critical if the line in the remote station is grounded, since earth fault
protection would not clear the fault until their time delays had elapsed. In this situation, however,
the fastest possible clearance is desired.

Residual current SOTF (switch onto fault) protection is a complementary function to earth fault
protection. With residual current SOTF protection, a fast trip is achieved for a fault on the line,
when the line is being energized. It shall be responsive to all types of earth faults anywhere within
the protected line, and it shall be enabled for a period of 400ms when the circuit is energized either
manually or via an auto-reclosing system.

3.15.2 Function Description


Residual current SOTF protection will operate to trip three-phase circuit breaker with a time delay
of 60ms when 1-pole auto-reclosing.

Residual current SOTF protection will operate to trip three-phase circuit breaker with a time delay of
100ms when 3-pole auto-reclosing or closing manually.

3.15.3 Function Block Diagram

50GSOTF

50GSOTF.En1 50GSOTF.On

50GSOTF.En2 50GSOTF.Op

50GSOTF.Blk 50GSOTF.St

3.15.4 I/O Signals


Table 3.15-1 I/O signals of residual SOTF protection

No. Input Signal Description


Residual current SOTF protection enabling input 1, it is triggered from binary input
1 50GSOTF.En1
or programmable logic etc.
Residual current SOTF protection enabling input 2, it is triggered from binary input
2 50GSOTF.En2
or programmable logic etc.
3 50GSOTF.Blk Residual current SOTF protection blocking input, it is triggered from binary input

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or programmable logic etc.


No. Output Signal Description
1 50GSOTF.On Residual current SOTF protection is enabled.
2 50GSOTF.Op Residual current SOTF protection operates.
3 50GSOTF.St Residual current SOTF protection starts.

3.15.5 Logic

Figure 3.15-1 Logic diagram of residual current SOTF protection

3.15.6 Settings
Table 3.15-2 Settings of residual current SOTF protection

No. Name Range Step Unit Remark


Current setting of residual current
1 50GSOTF.3I0_Set (0.050~30.000)×In 0.001 A
SOTF protection
Enabling/disabling residual current
SOTF protection
2 50GSOTF.En 0 or 1
0: disable
1: enable

3.16 Voltage Protection


Voltage protection has the function of protecting device against undervoltage and overvoltage.
Both operational states are unfavorable as overvoltage may cause insulation breakdown while
undervoltage may cause stability problem. Each voltage protection function has three individual
stages with respective time delay, but only one stage negative-sequence overvoltage protection is
available. These voltage protection functions can be switched on or off separately. Selectable
definite-time characteristic and multiple inverse-time characteristics are available.

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3.16.1 Overvoltage Protection

3.16.1.1 General Application

Abnormal high voltages often occur e.g. in low loaded, long distance transmission lines, in
islanded systems when generator voltage regulation fails, or load rejection of a generator. Even if
compensation reactors are provided to avoid line overvoltage by compensation of the line
capacitance and thus reduction of the overvoltage, the overvoltage will endanger the insulation if
the reactors fail. The line must be de-energized within a very short time.

The overvoltage protection in this device detects the phase voltages Ua, Ub and Uc or the
phase-to-phase voltages Uab, Ubc and Uca with an option of any phase or all phases operation
for output. The overvoltage protection can be used for tripping purpose as well as to initiate
transfer trip, which selectable controlled by local circuit breaker.

3.16.1.2 Function Description

Phase overvoltage protection has following functions:

1. Three stages phase overvoltage protection with independent logic, voltage and time delay
settings.

2. Overvoltage protection can be selected as definite-time or inverse-time characteristic. The


inverse-time characteristic is selectable, among IEC and ANSI/IEEE standard inverse-time
characteristics.

3. Phase voltage or phase-to-phase voltage can be selected for protection calculation.

4. “1-out-of-3” or “3-out-of-3” logic can be selected for protection criterion. (1-out-of-3 means any
of three phase voltages, 3-out-of-3 means all three phase voltages)

1. Operation Criterion

Users can select phase voltage or phase-to-phase voltage for the protection calculation. If setting
[59Px.Opt_Up/Upp] is set to “0”, phase voltage criterion is selected and if [59Px.Opt_Up/Upp] is
set to “1”, phase-to-phase voltage criterion is selected.

When phase voltage or phase-to-phase voltage is greater than any enabled stage voltage setting,
the stage protection picks up and operates after delay, which will drop off instantaneously when
fault voltage disappears.

 Phase voltage criterion

Two operation criteria of definite-time overvoltage protection are shown as follows, which of them
is applied depending on the logic setting [59Px.Opt_1P/3P].

UΦ_max>[ 59Px.U_Set] Equation 3.16-1

or

Ua>[59Px.U_Set] & Ub>[59Px.U_Set] & Uc>[59Px.U_Set] Equation 3.16-2

Where:

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UΦ_max is the maximum value among three phase-voltage.

Ua, Ub, Uc are three phase voltages.

[59Px.U_Set] is the setting of stage x (x=1, 2, 3) overvoltage protection.

When [59Px.Opt_1P/3P] is set as “1”, “1-out-of-3” logic (Equation 3.16-1) is selected as operation
criterion, and when set as “0”, “3-out-of-3” logic (Equation 3.16-2) is selected.

 Phase-to-phase voltage criterion

Two operation criteria of definite-time overvoltage protection are shown as follows, which of them
is applied depending on the logic setting [59Px.Opt_1P/3P].

UΦΦ_max>[ 59Px.U_Set] Equation 3.16-3

or

Uab>[59Px.U_Set] & Ubc>[59Px.U_Set] & Uca>[59Px.U_Set] Equation 3.16-4

[59Px.U_Set] is the setting of stage x (x =1, 2, 3) overvoltage protection.

When [59Px.Opt_1P/3P] is set as “1”, “1-out-of-3” logic (Equation 3.16-3) is selected as operation
criterion, and when set as “0”, “3-out-of-3” logic (Equation 3.16-4) is selected.

2. Characteristic Curve

Phase overvoltage protection can be selected as definite-time or inverse-time characteristic, and


inverse-time operating time curve is as follows.

Where:

Uset is the voltage setting [59Px.U_Set] (x=1, 2, 3).

Tp is time multiplier setting [59Px.TMS].

K is a constant.

C is a constant.

α is a constant.

U is the measured voltage

Operating characteristic of overvoltage protection, can be chosen from definite-time characteristic


and 12 inverse-time characteristics by setting the logic setting [59Px.Opt_Curve]. The parameters
of each characteristic are listed in the following table.

Table 3.16-1 Inverse-time curve parameters

59Px.Opt_Curve Time Characteristic K α C

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59Px.Opt_Curve Time Characteristic K α C


DefTime Definite time
IECN IEC Normal inverse 0.14 0.02 0
IECV IEC Very inverse 13.5 1.0 0
IECE IEC Extremely inverse 80.0 2.0 0
IECST IEC Short-time inverse 0.05 0.04 0
IECLT IEC Long-time inverse 120.0 1.0 0
ANSIE ANSI Extremely inverse 28.2 2.0 0.1217
ANSIV ANSI Very inverse 19.61 2.0 0.491
ANSI ANSI Inverse 0.0086 0.02 0.0185
ANSIM ANSI Moderately inverse 0.0515 0.02 0.114
ANSILTE ANSI Long-time extremely inverse 64.07 2.0 0.25
ANSILTV ANSI Long-time very inverse 28.55 2.0 0.712
ANSILT ANSI Long-time inverse 0.086 0.02 0.185

When inverse-time characteristic is selected, if calculated operating time is less than setting
[59Px.tmin], then the operating time changes to the value of setting [59Px.tmin] automatically.

Define-time or inverse-time phase overvoltage protection drops off instantaneously when


measured voltage is lower than reset voltage.

3.16.1.3 Function Block Diagram

3.16.1.4 I/O Signals

Table 3.16-2 I/O signals of overvoltage protection

No. Input Signal Description


Stage x of overvoltage protection enabling input 1, it is triggered from binary input
1 59Px.En1
or programmable logic etc. (x=1, 2, 3)
Stage x of overvoltage protection enabling input 2, it is triggered from binary input
2 59Px.En2
or programmable logic etc. (x=1, 2, 3)
3 59Px.Blk Stage x of overvoltage protection blocking input, it is triggered from binary input or

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programmable logic etc. (x=1, 2, 3)


No. Output Signal Description
1 59Px.On Stage x of overvoltage protection is enabled. (x=1, 2, 3)
2 59Px.Op Stage x of overvoltage protection operates. (x=1, 2, 3)
3 59Px.St Stage x of overvoltage protection starts. (x=1, 2, 3)
4 59Px.St1 Stage x of overvoltage protection starts (A or AB). (x=1, 2, 3)
5 59Px.St2 Stage x of overvoltage protection starts (B or BC). (x=1, 2, 3)
6 59Px.St3 Stage x of overvoltage protection starts (C or CA). (x=1, 2, 3)
7 59Px.Op_InitTT Stage x of overvoltage protection operates to initiate transfer trip. (x=1, 2, 3)
8 59Px.Alm Stage x of overvoltage protection alarms. (x=1, 2, 3)

3.16.1.5 Logic

Figure 3.16-1 Logic diagram of stage x of overvoltage protection

x=1, 2, 3

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3.16.1.6 Settings

Table 3.16-3 Settings of overvoltage protection

No. Name Range Step Unit Remark


Voltage setting for stage x of overvoltage
1 59Px.U_Set Un~2Unn 0.001 V
protection (x=1, 2, 3)
Time delay for stage x of overvoltage
2 59Px.t_Op 0.000~30.000 0.001 s
protection (x=1, 2, 3)
Enabling/disabling stage x of overvoltage
protection (x=1, 2, 3)
3 59Px.En 0 or 1
0: disable
1: enable
Option of 1-out-of-3 mode or 3-out-of-3
mode (x=1, 2, 3)
4 59Px.Opt_1P/3P 0 or 1
0: 3-out-of-3 mode
1: 1-out-of-3 mode
Option of phase-to-phase voltage or phase
voltage (x=1, 2, 3)
5 59Px.Opt_Up/Upp 0 or 1
0: phase voltage
1: phase-to-phase voltage
Enabling/disabling stage x of overvoltage
protection for alarm purpose (x=1, 2, 3)
6 59Px.En_Alm 0 or 1
0: disable
1: enable
Enabling/disabling transfer trip controlled
by CB open position for stage x of
7 59Px.En_52b_TT 0 or 1 overvoltage protection (x=1, 2, 3)
0: disable
1: enable
Enabling/disabling stage x of overvoltage
protection operate to initiate transfer trip
8 59Px.En_TT 0 or 1 (x=1, 2, 3)
0: disable
1: enable
DefTime
IECN
IECV
IECE
IECST Option of characteristic curve for stage x of
9 59Px.Opt_Curve
IECLT overvoltage protection (x=1, 2, 3)
ANSIE
ANSIV
ANSI
ANSIM

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ANSILTE
ANSILTV
ANSILT
Time multiplier setting for stage x of
10 59Px.TMS 0.010~200.000 0.001 inverse-time overvoltage protection (x=1,
2, 3)
Minimum delay for stage x of inverse-time
11 59Px.tmin 0.050~20.000 0.001 s
overvoltage protection (x=1, 2, 3)

3.16.2 Negative-sequence Overvoltage Protection

3.16.2.1 General Application

On a healthy three-phase power system, negative-sequence voltage is nominally zero. However,


when an unbalance situation occurs on the primary system, the negative-sequence voltage is
produced. The device provides a one-stage negative-sequence overvoltage protection with
definite time delay characteristic.

3.16.2.2 Function Block Diagram

59Q

59Q.En1 59Q.On

59Q.En2 59Q.Op

59Q.Blk 59Q.St

3.16.2.3 I/O Signals

Table 3.16-4 I/O signals of negative-sequence overvoltage protection

No. Input Signal Description


Negative-sequence overvoltage protection enabling input 1, it is triggered from
1 59Q.En1
binary input or programmable logic etc.
Negative-sequence overvoltage protection enabling input 2, it is triggered from
2 59Q.En2
binary input or programmable logic etc.
Negative-sequence overvoltage protection blocking input, it is triggered from
3 59Q.Blk
binary input or programmable logic etc.
No. Output Signal Description
1 59Q.On Negative-sequence overvoltage protection is enabled.
2 59Q.Op Negative-sequence overvoltage protection operates.
3 59Q.St Negative-sequence overvoltage protection starts.

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3.16.2.4 Logic

Figure 3.16-2 Logic diagram of negative-sequence overvoltage protection

3.16.2.5 Settings

Table 3.16-5 Settings of negative-sequence overvoltage protection

No. Name Range Step Unit Remark


Voltage setting for negative-sequence
1 59Q.U_Set 0~Un 0.001 V
overvoltage protection
Time delay for negative-sequence
2 59Q.t_Op 0.000~30.000 0.001 s
overvoltage protection
Enabling/disabling negative-sequence
overvoltage protection
3 59Q.En 0 or 1
0: disable
1: enable

3.16.3 Undervoltage Protection

3.16.3.1 General Application

The undervoltage protection can be applied to trip when fault occurs in a system. Two stages of
undervoltage protection are available measuring phase voltages UA, UB and UC or phase-to-phase
voltages UAB, UBC and UCA. The protection output can be selected for either any phase or all
phases operation. The undervoltage protection is normally used as decoupling system rather than
load shedding.

3.16.3.2 Function Description

Phase undervoltage protection has following functions:

1. Three stages phase undervoltage protection with independent logic, voltage and time delay
settings.

2. Undervoltage protection can be selected as definite-time or inverse-time characteristic. The


inverse-time characteristic is selectable, among IEC and ANSI/IEEE standard inverse-time
characteristics.

3. Phase voltage or phase-to-phase voltage can be selected for protection calculation.

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4. “1-out-of-3” or “3-out-of-3” logic can be selected for protection criterion. (1-out-of-3 means any
of three phase voltages, 3-out-of-3 means all three phase voltages)

1. Operation Criterion

Users can select phase voltage or phase-to-phase voltage for the protection calculation. If setting
[27Px.Opt_Up/Upp] is set to “0”, phase voltage criterion is selected and if [27Px.Opt_Up/Upp] is
set to “1”, phase-to-phase voltage criterion is selected.

When phase voltage or phase-to-phase voltage is less than any enabled stage voltage setting, the
stage protection picks up and operates after delay, which will drop off instantaneously when fault
voltage disappears.

 Phase voltage criterion

Two operation criteria of definite-time undervoltage protection are shown as follows, which of them
is applied depending on the logic setting [27Px.Opt_1P/3P].

UΦ_min<[ 27Px.U_Set] Equation 3.16-5

or

Ua<[ 27Px.U_Set] & Ub<[27Px.U_Set] & Uc<[27Px.U_Set] Equation 3.16-6

Where:

UΦ_min is the minimum value among three phase voltages.

Ua, Ub and Uc are three phase voltages.

[27Px.U_Set] is the setting of stage x (x=1, 2, 3) undervoltage protection.

When [27Px.Opt_1P/3P] is set as “1”, “1-out-of-3” logic (Equation 3.16-5) is selected as operation
criterion, and when set as “0”, “3-out-of-3” logic (Equation 3.16-6) is selected.

 Phase-to-phase voltage criterion

Two operation criteria of definite-time undervoltage protection are shown as follows, which of them
is applied depending on the logic setting [27Px.Opt_Up/Upp].

UΦΦ_min<[ 27Px.U_Set] Equation 3.16-7

or

Uab<[27Px.U_Set] & Ubc<[27Px.U_Set] & Uca<[27Px.U_Set] Equation 3.16-8

Where:

UΦΦ_min is the minimum value among three phase-to-phase voltages.

Uab, Ubc and Uca are three phase-to-phase voltages.

[27Px.U_Set] is the setting of stage x (x =1, 2, 3) undervoltage protection.

When the setting [27Px.Opt_1P/3P] is set as “1”, “1-out-of-3” logic (Equation 3.16-7) is selected as
operation criterion, and when it is set as “0”, “3-out-of-3” logic (Equation 3.16-8) is selected.

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2. Characteristic Curve

Undervoltage protection can be selected as definite-time or inverse-time characteristic, and


inverse-time operating time curve is as follows.

Where:

Uset is the setting [27Px.U_Set] (x=1, 2, 3).

Tp is time multiplier setting [27Px.TMS].

K is a constant.

C is a constant.

α is a constant.

U is the measured voltage

Operating characteristic of undervoltage protection can be chosen from definite-time characteristic


and twelve inverse-time characteristics by setting the logic setting [27Px.Opt_Curve]. The
parameters of each characteristic are listed in the following table.

Table 3.16-6 Inverse-time curve parameters of phase undervoltage protection

27Px.Opt_Curve Time Characteristic K α C


DefTime Definite time
IECN IEC Normal inverse 0.14 0.02 0
IECV IEC Very inverse 13.5 1.0 0
IECE IEC Extremely inverse 80.0 2.0 0
IECST IEC Short-time inverse 0.05 0.04 0
IECLT IEC Long-time inverse 120.0 1.0 0
ANSIE ANSI Extremely inverse 28.2 2.0 0.1217
ANSIV ANSI Very inverse 19.61 2.0 0.491
ANSI ANSI Inverse 0.0086 0.02 0.0185
ANSIM ANSI Moderately inverse 0.0515 0.02 0.114
ANSILTE ANSI Long-time extremely inverse 64.07 2.0 0.25
ANSILTV ANSI Long-time very inverse 28.55 2.0 0.712
ANSILT ANSI Long-time inverse 0.086 0.02 0.185

When inverse-time characteristic is selected, if calculated operating time is less than setting
[27Px.tmin], then the operating time changes to the value of setting [27Px.tmin] automatically.

Define-time or inverse-time phase under voltage protection drops off instantaneously when
measured voltage is higher than reset voltage.

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3.16.3.3 Function Block Diagram

27Px

27Px.En1 27Px.On

27Px.En2 27Px.Alm

27Px.Blk 27Px.Op

27Px.St

27Px.St1

27Px.St2

27Px.St3

27Px.U_Absent

3.16.3.4 I/O Signals

Table 3.16-7 I/O signals of undervoltage protection

No. Input Signal Description


Stage x of undervoltage protection enabling input 1, it is triggered from binary
1 27Px.En1
input or programmable logic etc. (x=1, 2, 3)
Stage x of undervoltage protection enabling input 2, it is triggered from binary
2 27Px.En2
input or programmable logic etc. (x=1, 2, 3)
Stage x of undervoltage protection blocking input, it is triggered from binary input
3 27Px.Blk
or programmable logic etc. (x=1, 2, 3)
No. Output Signal Description
1 27Px.On Stage x of undervoltage protection is enabled. (x=1, 2, 3)
2 27Px.Op Stage x of undervoltage protection operates. (x=1, 2, 3)
3 27Px.Alm Stage x of undervoltage protection alarms. (x=1, 2, 3)
4 27Px.St Stage x of undervoltage protection starts. (x=1, 2, 3)
5 27Px.St1 Stage x of undervoltage protection starts (A or AB). (x=1, 2, 3)
6 27Px.St2 Stage x of undervoltage protection starts (B or BC). (x=1, 2, 3)
7 27Px.St3 Stage x of undervoltage protection starts (C or CA). (x=1, 2, 3)
8 27Px.U_Absent No AC voltage input after the device powered on (x=1, 2, 3)

3.16.3.5 Logic

In order to prevent undervoltage protection from undesired operation, after the device powered on,
if any phase current is greater than 0.06In or circuit breaker is in closed posion, undervoltage
protection will be in service with a time delay of 100ms when the corresponding phase voltage is
greater than 0.1Un. Otherwise, undervoltage protection will be blocked by the signal
“27Px.U_Absent”

Through settings these logic settings [27Px.En_FD_Ctrl], [27Px.En_Curr_Ctrl] and


[27Px.En_VTS_Blk], undervoltage protection optionally can be controlled by FD element reflecting

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current (including DPFC current element and residual current element), current condition and VT
circuit failure

When the setting [27Px.En_FD_Ctrl] is set as “1”, undervoltage protection will be blocked if FD
element reflecting current does not operate.

When the setting [27Px.En_Curr_Ctrl] is set as “1”, undervoltage protection will be blocked if
current condition (>0.06In) is not met.

When the setting [27Px.En_VTS_Blk] is set as “1”, undervoltage protection will be blocked if VT
circuit fails.

If any phase of circuit breaker is open (binary input of normal close contact of breaker is energized)
and the corresponding phase current is smaller than 0.06In, undervoltage protection will be
blocked.

Figure 3.16-3 Blocking logic of undervoltage protection

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EN [27Px.En]
&
SIG 27Px.En1 &
27Px.On
SIG 27Px.En2

SIG 27Px.Blk

SIG Ia>0.06In >=1


UV_PhA_Curr_Rls

SIG Ib>0.06In >=1


UV_PhB_Curr_Rls

SIG Ic>0.06In >=1


UV_PhC_Curr_Rls

&
>=1
UV_PhAB_Curr_Rls

&
>=1
UV_PhBC_Curr_Rls

&
>=1
UV_PhCA_Curr_Rls
EN 27Px.En_Curr_Ctrl

EN [27Px.En_Alm]

SET [27P1.Opt_1P/3P]

SIG 27Px.On

SIG Block UV

SET [27Px.Opt_Up/Upp]
& & Timer &
t
SIG UV_PhA_Curr_Rls >=1 &
t
SET UA<[27Px.U_Set]
&
SIG UV_PhB_Curr_Rls

SET UAB<[27Px.U_Set]
Timer &
& &
t 27Px.Op
SIG UV_PhC_Curr_Rls >=1
t
SET UB<[27Px.U_Set]
&
&
>=1 27Px.Alm
SIG UV_PhAB_Curr_Rls
&
SET UBC<[27Px.U_Set] >=1
& & Timer
t
SIG UV_PhBC_Curr_Rls >=1
t
SET UC<[27Px.U_Set]
27Px.St1
&
27Px.St2
SIG UV_PhCA_Curr_Rls
27Px.St3
SET UCA<[27Px.U_Set] >=1
27Px.St

Figure 3.16-4 Logic diagram of stage x of undervoltage protection

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x=1, 2, 3

3.16.3.6 Settings

Table 3.16-8 Settings of undervoltage protection

No. Name Range Step Unit Remark


Voltage setting for stage x of undervoltage
1 27Px.U_Set 0~Unn 0.001 V
protection (x=1, 2, 3)
Time delay for stage x of undervoltage
2 27Px.t_Op 0.000~30.000 0.001 s
protection (x=1, 2, 3)
Enabling/disabling stage x of
undervoltage protection (x=1, 2, 3)
3 27Px.En 0 or 1
0: disable
1: enable
Enabling/disabling stage x of
undervoltage protection controlled by FD
4 27Px.En_FD_Ctrl 0 or 1 element reflecting current (x=1, 2, 3)
0: disable
1: enable
Enabling/disabling stage x of
undervoltage protection controlled by
5 27Px.En_Curr_Ctrl 0 or 1 current condition (x=1, 2, 3)
0: disable
1: enable
Enabling/disabling stage x of
undervoltage protection controlled by VT
6 27Px.En_VTS_Blk 0 or 1 circuit failure (x=1, 2, 3)
0: disable
1: enable
Option of 1-out-of-3 mode or 3-out-of-3
mode for stage x of undervoltage
7 27Px.Opt_1P/3P 0 or 1 protection (x=1, 2, 3)
0: 3-out-of-3 mode
1: 1-out-of-3 mode
Option of voltage criterion adopting
phase-to-phase voltage or phase voltage
8 27Px.Opt_Up/Upp 0 or 1 for stage x of undervoltage protection
0: phase voltage (x=1, 2, 3)
1: phase-to-phase voltage
Enabling/disabling stage x of
undervoltage protection operate to alarm
9 27Px.En_Alm 0 or 1 (x=1, 2, 3)
0: disable
1: enable

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DefTime
IECN
IECV
IECE
IECST
IECLT
Option of characteristic curve for stage x
10 27Px.Opt_Curve ANSIE
of undervoltage protection (x=1, 2, 3)
ANSIV
ANSI
ANSIM
ANSILTE
ANSILTV
ANSILT
Time multiplier setting for stage x of
11 27Px.TMS 0.010~200.000 0.001 inverse-time undervoltage protection (x=1,
2, 3)
Minimum delay for stage x of inverse-time
12 27Px.tmin 0.050~20.000 0.001 s
undervoltage protection (x=1, 2, 3)

3.17 Frequency Protection


3.17.1 Overfrequency Protection

3.17.1.1 General Application

If the power frequency of regional rises due to the active power excess demand, overfrequency
protection operates to perform generator rejection to shed part of the generators automatically
according to the rising frequency so that power supply and the load are re-balanced.

3.17.1.2 Function Description

Overfrequency protection consists of the four stages (stage 1 to stage 4). When system frequency
is greater than the setting [81O.f_Pkp], overfrequency protection will put into service.

In order to prevent possible maloperation of overfreqency protection in conditions of high


harmonics, voltage circuit failures and so on, such blocking measures are carried out as follows:

1. Blocking in undervoltage condition

If the positive voltage U1<0.15Un, the calculation of protection is not carried out and the output
relay will be blocked.

2. Frequency abnormality condition

When f<40Hz or f>65Hz, overfrequency protection will be blocked

Operation criteria of overfrequency protection is shown in the following equation.

f>[81O.OFx.f_Set] Equation 3.17-1

Where:

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f is system frequency.

[81O.OFx.f_Set] is the frequency setting of stage x (x=1, 2, 3, or 4) of overfrequency protection.

3.17.1.3 Function Block Diagram

81O.OFx

81O.En1 81O.OFx.On

81O.En2 81O.St

81O.Blk 81O.OFx.Op

3.17.1.4 I/O Signals

Table 3.17-1 I/O signals of overfrequency protection

No. Input Signal Description


Overfrequency protection enabling input 1, it is triggered from binary input or
1 81O.En1
programmable logic etc.
Overfrequency protection enabling input 2, it is triggered from binary input or
2 81O.En2
programmable logic etc.
Overfrequency protection blocking input, it is triggered from binary input or
3 81O.Blk
programmable logic etc.
No. Output Signal Description
1 81O.OFx.On Stage x of overfrequency protection is enabled (x=1, 2, 3 or 4).
2 81O.OFx.Op Stage x of overfrequency protection operates (x=1, 2, 3 or 4).
3 81O.St Overfrequency protection starts.

3.17.1.5 Logic

SIG 81O.En1
&
SIG 81O.En2 &
81O.OF1.On
EN [81O.OF1.En]

SIG 81O.Blk
&
SIG FD.Pkp

OTH U1<0.15Un ≥1

SIG f<40 or f>65


&

OTH f>[81O.f_Pkp] 50ms 0ms


81O.St1
&
SET f>[81O.OF1.f_Set] & [81O.OF1.t_Op] 0ms 81O.OF1.Op

EN [81O.OF1.En]

Figure 3.17-1 Logic diagram of overfrequency protection (stage 1)

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Figure 3.17-2 Logic diagram of overfrequency protection (stage 2)

Figure 3.17-3 Logic diagram of overfrequency protection (stage 3)

Figure 3.17-4 Logic diagram of overfrequency protection (stage 4)

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SIG 81O.St1 ≥1

SIG 81O.St2
≥1
SIG 81O.St3 ≥1 81O.St

SIG 81O.St4

Figure 3.17-5 Logic diagram of overfrequency protection (start)

3.17.1.6 Settings

Table 3.17-2 Settings of overfrequency protection

No. Name Range Step Unit Remark


Frequency pickup setting for
1 81O.f_Pkp 50.000~65.000 (Hz) 0.001 Hz
overfrequency protection
Frequency setting for stage 1 of
2 81O.OF1.f_Set 50.000~65.000 (Hz) 0.001 Hz
overfrequency protection
Time delay for stage 1 of
3 81O.OF1.t_Op 0.050~20.000 (s) 0.001 s
overfrequency protection
Enabling/disabling stage 1 of
overfrequency protection
4 81O.OF1.En 0 or 1
0: disable
1: enable
Frequency setting for stage 2 of
5 81O.OF2.f_Set 50.000~65.000 (Hz) 0.001 Hz
overfrequency protection
Time delay for stage 2 of
6 81O.OF2.t_Op 0.050~20.000 (s) 0.001 s
overfrequency protection
Enabling/disabling stage 2 of
overfrequency protection
7 81O.OF2.En 0 or 1
0: disable
1: enable
Frequency setting for stage 3 of
8 81O.OF3.f_Set 50.000~65.000 (Hz) 0.001 Hz
overfrequency protection
Time delay for stage 3 of
9 81O.OF3.t_Op 0.050~20.000 (s) 0.001 s
overfrequency protection
Enabling/disabling stage 3 of
overfrequency protection
10 81O.OF3.En 0 or 1
0: disable
1: enable
Frequency setting for stage 4 of
11 81O.OF4.f_Set 50.000~65.000 (Hz) 0.001 Hz
overfrequency protection
Time delay for stage 4 of
12 81O.OF4.t_Op 0.050~20.000 (s) 0.001 s
overfrequency protection
13 81O.OF4.En 0 or 1 Enabling/disabling stage 4 of

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overfrequency protection
0: disable
1: enable

3.17.2 Underfrequency Protection

3.17.2.1 General Application

In case of frequency decline due to lack of active power in the power system, underfrequency
protection operates to shed part of the load according to the declined value of frequency to
re-balance the power supply and the load.

3.17.2.2 Function Description

Underfrequency protection consists of the four stages (stage 1 to stage 4). When system
frequency is smaller than the setting [81U.f_Pkp], underfrequency protection will put into service.

In order to prevent possible maloperation of underfrequency protection in conditions of high


harmonics, voltage circuit failures and so on, such blocking measures are carried out as follows:

1. Blocking in undervoltage condition

If the positive voltage U1<0.15Un, the calculation of protection is not carried out and the output
relay will be blocked.

2. df/dt blocking element

If -df/dt≥[81U.df/dt_Blk], the calculation of protection is not carried out and the output relay will
be blocked. The blocking element will not be released automatically until the system frequency
recovers to be less than the setting [81U.f_Pkp].

3. Frequency abnormality condition

When f<40Hz or f>65Hz, underfrequency protection will be blocked

Operation criteria of underfrequency protection is shown in the following equation.

f<[81U.UFx.f_Set] Equation 3.17-2

Where:

f is system frequency.

[81U.UFx.f_Set] is the frequency settings of stage x (x=1, 2, 3 or 4) of underfrequency protection.

The equation of df/dt blocking function is as follows.

df/dt≥[81U.df/dt_Blk] Equation 3.17-3

Where:

df/dt is the frequency slip speed and the time step (i.e. dt) for the calucation is equal to 5 cycle.

[81U.df/dt_Blk] is the setting of df/dt blocking underfrequency protection.

Underfrequency protection can be blocked by the frequency slip speed (df/dt). If the logic setting

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[81U.UFx.En_df/dt_Blk] (x=1, 2, 3 or 4) is set as “1”, when Equation 3.17-2 and Equation 3.17-3
are met, it is decided that a fault occurred and the corresponding stage underfrequency protection
is blocked at the same time for the purpose of waiting for operation of other related protection. The
blocking signal will not reset until the system frequency recovers, i.e. the system frequency is
greater than the setting [81U.f_Pkp]. If the logic setting is set as “0”, when Equation 3.17-2 and
Equation 3.17-3 are met, the stage underfrequency protection will be released to operate.

3.17.2.3 Function Block Diagram

81U.UFx

81U.En1 81U.UFx.On

81U.En2 81U.St

81U.Blk 81U.UFx.Op

3.17.2.4 I/O Signals

Table 3.17-3 I/O signals of underfrequency protection

No. Input Signal Description


Underfrequency protection enabling input 1, it is triggered from binary input or
1 81U.En1
programmable logic etc.
Underfrequency protection enabling input 2, it is triggered from binary input or
2 81U.En2
programmable logic etc.
Underfrequency protection blocking input, it is triggered from binary input or
3 81U.Blk
programmable logic etc.
No. Output Signal Description
1 81U.UFx.On Stage x of underfrequency protection is enabled (x=1, 2, 3 or 4).
2 81U.UFx.Op Stage x of underfrequency protection operates (x=1, 2, 3 or 4).
3 81U.St Underfrequency protection starts.

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3.17.2.5 Logic

Figure 3.17-6 Logic diagram of underfrequency protection (stag1)

SIG 81U.En1
&
SIG 81U.En2

EN [81U.UF2.En]
&
81U.UF2.On
SIG 81U.Blk
&
SIG FD.Pkp &
OTH U1<0.15Un ≥1

SIG f<40 or f>65

OTH f<[81U.f_Pkp] 50ms 0ms


81U.St2
SET -df/dt>[81U.df/dt_Blk] >=1 &
[81U.UF2.t_Op] 0ms 81U.UF2.Op
EN 81U.UF2.En_df/dt_Blk

SET f<[81U.UF2.f_Set] &

EN [81U.UF2.En]

Figure 3.17-7 Logic diagram of underfrequency protection (stag2)

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SIG 81U.En1
&
SIG 81U.En2

EN [81U.UF3.En]
&
81U.UF3.On
SIG 81U.Blk
&
SIG FD.Pkp &
OTH U1<0.15Un ≥1

SIG f<40 or f>65

OTH f<[81U.f_Pkp] 50ms 0ms


81U.St3
SET -df/dt>[81U.df/dt_Blk] >=1 &
[81U.UF3.t_Op] 0ms 81U.UF3.Op
EN 81U.UF3.En_df/dt_Blk

SET f<[81U.UF3.f_Set] &

EN [81U.UF3.En]

Figure 3.17-8 Logic diagram of underfrequency protection (stag3)

SIG 81U.En1
&
SIG 81U.En2

EN [81U.UF4.En]
&
81U.UF4.On
SIG 81U.Blk
&
SIG FD.Pkp &
OTH U1<0.15Un ≥1

SIG f<40 or f>65

OTH f<[81U.f_Pkp] 50ms 0ms


81U.St4
SET -df/dt>[81U.df/dt_Blk] >=1 &
[81U.UF4.t_Op] 0ms 81U.UF4.Op
EN 81U.UF4.En_df/dt_Blk

SET f<[81U.UF4.f_Set] &

EN [81U.UF4.En]

Figure 3.17-9 Logic diagram of underfrequency protection (stag4)

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SIG 81U.St1 >=1

SIG 81U.St2
>=1
SIG 81U.St3 >=1 81U.St

SIG 81U.St4

Figure 3.17-10 Logic diagram of underfrequency protection (start)

3.17.2.6 Settings

Table 3.17-4 Settings of underfrequency protection

No. Name Range Step Unit Remark


Frequency pickup setting for
1 81U.f_Pkp 45.000~60.000 0.01 Hz
underfrequency protection
Rate of frequency change for
2 81U.df/dt_Blk 0.200~20.000 0.01 Hz/s
blocking underfrequency protection
Frequency setting for stage 1 of
3 81U.UF1.f_Set 45.000~60.000 0.001 Hz
underfrequency protection
Time delay for stage 1 of
4 81U.UF1.t_Op 0.050~30.000 0.01 s
underfrequency protection
Enabling/disabling stage 1 of
underfrequency protection
5 81U.UF1.En 0 or 1    
0: disable
1: enable
Enabling/disabling rate of frequency
change to block stage 1 of
6 81U.UF1.En_df/dt_Blk 0 or 1     underfrequency protection
0: disable
1: enable
Frequency setting for stage 2 of
7 81U.UF2.f_Set 45.000~60.000 0.001 Hz
underfrequency protection
Time delay for stage 2 of
8 81U.UF2.t_Op 0.050~30.000 0.01 s
underfrequency protection
Enabling/disabling stage 2 of
underfrequency protection
9 81U.UF2.En 0 or 1    
0: disable
1: enable
Enabling/disabling rate of frequency
change to block stage 2 of
10 81U.UF2.En_df/dt_Blk 0 or 1     underfrequency protection
0: disable
1: enable
11 81U.UF3.f_Set 45.000~60.000 0.001 Hz Frequency setting for stage 3 of

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underfrequency protection
Time delay for stage 3 of
12 81U.UF3.t_Op 0.050~30.000 0.01 s
underfrequency protection
Enabling/disabling stage 3 of
underfrequency protection
13 81U.UF3.En 0 or 1    
0: disable
1: enable
Enabling/disabling rate of frequency
change to block stage 3 of
14 81U.UF3.En_df/dt_Blk 0 or 1     underfrequency protection
0: disable
1: enable
Frequency setting for stage 4 of
15 81U.UF4.f_Set 45.000~60.000 0.001 Hz
underfrequency protection
Time delay for stage 4 of
16 81U.UF4.t_Op 0.050~30.000 0.01 s
underfrequency protection
Enabling/disabling stage 4 of
underfrequency protection
17 81U.UF4.En 0 or 1
    0: disable
1: enable
Enabling/disabling rate of frequency
change to block stage 4 of
18 81U.UF4.En_df/dt_Blk 0 or 1 underfrequency protection
   
0: disable
1: enable

3.18 Breaker Failure Protection


3.18.1 General Application
Duplicated protection configurations are usually adopted for EHV power system, but the primary
equipment, circuit breaker, is not duplicated. Breaker failure protection is adopted to cater circuit
breaker tripping failure.

Breaker failure protection issues a back-up trip command to trip adjacent circuit breakers in case
of a tripping failure of the circuit breaker, and clears the fault as requested by the device. To utilize
the protection information of faulty equipment and the electrical information of failure circuit
breaker to constitute the criterion of breaker failure protection, it can ensure that the adjacent
circuit breakers of failure circuit breaker are tripped with a shorter time delay, so that the affected
area is minimized, and ensure stable operation of the entire power grid to prevent generators,
transformers and other components from seriously damaged.

Note!

For double circuit breakers mode, the device will provide indenpendent breaker failure

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protection for CB1 and CB2 respectively. Both breaker failure protections have the same
logic.The difference is that the prefix “CBx.” is added to all signals and settings for circuit
breaker No.x (x=1 or 2).

3.18.2 Function Description


The instantaneous re-tripping function, after receiving tripping signal from other device and the
corresponding phase overcurrent element operating, is available and provides phase-segregated
binary output contact, which can ensure the circuit breaker is still tripped in case the secondary
circuit between the device and the circuit breaker is abnormal, to avoid undesired tripping of
breaker failure protection and the expansion of the affected area. Instantaneous re-tripping
function does not block AR.

When both the phase-segregated tripping contact from line protection and the corresponding
phase overcurrent element operate, or both the three-phase tripping contact and any phase
overcurrent element operate, breaker failure protection will send three-phase tripping command to
trip local circuit breaker after time delay of [CBx.50BF.t1_Op] and trip all adjacent circuit breakers
after time delay of [CBx.50BF.t2_Op].

When the protection element except undervoltage element within this device operates and issues
tripping signal, breaker failure protection will also be initiated.

Taking into account that the faulty current is too small for generator or transformer fault, the
sensitivity of phase current element may not meet the requirements, zero-sequence current
criterion and negative-sequence current criterion are provided in addition to the phase overcurrent
element for breaker failure protection initiated by input signal [CBx.50BF.ExTrp3P_GT] from
generator and transformer protection. They can be enabled or disabled by logic settings
[CBx.50BF.En_3I0_3P] and [CBx.50BF.En_I2_3P] respectively.

For some special fault (for example, mechanical protection or overvoltage protection operating),
maybe faulty current is very small and current criterion of breaker failure protection is not met, in
order to make breaker failure protection can also operate under the above situation, an input
signal [CBx.50BF.ExTrp_WOI] is equipped to initiate breaker failure protection, once the input
signal is energized, normally closed auxiliary contact of circuit breaker is chosen in addition to
breaker failure current check to trigger breaker failure timer. The device takes current as priority
with CB auxiliary contact (52b) as an option criterion for breaker failure check.

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3.18.3 Function Block Diagram

50BF

CBx.50BF.ExTrp3P_L CBx.50BF.On

CBx.50BF.ExTrp3P_GT CBx.50BF.Op_ReTrpA

CBx.50BF.ExTrp_WOI CBx.50BF.Op_ReTrpB

CBx.50BF.ExTrpA CBx.50BF.Op_ReTrpC

CBx.50BF.ExTrpB CBx.50BF.Op_ReTrp3P

CBx.50BF.ExTrpC CBx.50BF.Op_t1

CBx.50BF.En CBx.50BF.Op_t2

CBx.50BF.Blk

3.18.4 I/O Signals


Table 3.18-1 I/O signals of breaker failure protection

No. Input Signal Description


1 CBx.50BF.ExTrp3P_L Input signal of three-phase tripping contact from line protection
Input signal of three-phase tripping contact from generator or transformer
2 CBx.50BF.ExTrp3P_GT
protection
3 CBx.50BF.ExTrpA Input signal of phase-A tripping contact from external device
4 CBx.50BF.ExTrpB Input signal of phase-B tripping contact from external device
5 CBx.50BF.ExTrpC Input signal of phase-C tripping contact from external device
Input signal of three-phase tripping contact from external device. Once it is
6 CBx.50BF.ExTrp_WOI energized, normally closed auxiliary contact of circuit breaker is chosen in
addition to breaker failure current check to trigger breaker failure timers.
7 CBx.50BF.En Input signal of enabling breaker failure protection
Breaker failure protection blocking input, such as function blocking binary
input.
8 CBx.50BF.Blk
When the input is 1, breaker failure protection is reset and time delay is
cleared.
No. Output Signal Description
1 CBx.50BF.On Breaker failure protection is enabled
2 CBx.50BF.Op_ReTrpA Breaker failure protection operates to re-trip phase-A circuit breaker
3 CBx.50BF.Op_ReTrpB Breaker failure protection operates to re-trip phase-B circuit breaker
4 CBx.50BF.Op_ReTrpC Breaker failure protection operates to re-trip phase-C circuit breaker
5 CBx.50BF.Op_ReTrp3P Breaker failure protection operates to re-trip three-phase circuit breaker
6 CBx.50BF.Op_t1 Stage 1 of breaker failure protection operates
7 CBx.50BF.Op_t2 Stage 2 of breaker failure protection operates

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3.18.5 Logic

SIG CBx.50BF.En
&
EN [CBx.50BF.En] CBx.50BF.On

SIG CBx.50BF.Blk

SIG CBx.50BF.On
&
SIG FD.Pkp

EN [CBx.50BF.En_ReTrp]

EN [CBx.50BF.En_3I0_1P] >=1

SET 3I0>[CBx.50BF.3I0_Set]
&
SIG CBx.BFI_A >=1 & [CBx.50BF.t_ReTrp] 0ms CBx.50BF.Op_ReTrpA

BI [CBx.50BF.ExTrpA]

SET IA>[CBx.50BF.I_Set]
&
SIG CBx.BFI_B >=1 & [CBx.50BF.t_ReTrp] 0ms CBx.50BF.Op_ReTrpB

BI [CBx.50BF.ExTrpB]

SET IB>[CBx.50BF.I_Set]
&
SIG CBx.BFI_C >=1 & [CBx.50BF.t_ReTrp] 0ms CBx.50BF.Op_ReTrpC

BI [CBx.50BF.ExTrpC] >=1

SET IC>[CBx.50BF.I_Set] >=1

SIG CBx.BFI_3P >=1


&
& >=1
BI [CBx.50BF.ExTrp3P_L]
>=1 [CBx.50BF.t_ReTrp] 0ms [CBx.50BF.Op_ReTrp3P]
BI [CBx.50BF.ExTrp3P_GT] >=1
&

BI [CBx.50BF.ExTrp_WOI]
&
EN [CBx.50BF.En_3I0_3P] &

SET 3I0>[CBx.50BF.3I0_Set]
& >=1 >=1 [CBx.50BF.t1_Op] 0ms CBx.50BF.Op_t1
EN [CBx.50BF.En_I2_3P] & &
[CBx.50BF.t2_Op] 0ms CBx.50BF.Op_t2
SET I2>[CBx.50BF.I2_Set]
&
EN [CBx.50BF.En_CB_Ctrl]

BI [CBx.52b_PhA]
&
BI [CBx.52b_PhB]

BI [CBx.52b_PhC]

SIG CBx.50BF.On &

SIG FD.Pkp

Figure 3.18-1 Logic diagram of breaker failure protection

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3.18.6 Settings
Table 3.18-2 Settings of breaker failure protection

No. Name Range Step Unit Remark


Current setting of phase current
1 CBx.50BF.I_Set (0.050~30.000 )×In 0.001 A
criterion for BFP
Current setting of zero-sequence
2 CBx.50BF.3I0_Set (0.050~30.000 )×In 0.001 A
current criterion for BFP
Current setting of
3 CBx.50BF.I2_Set (0.050~30.000 )×In 0.001 A negative-sequence current
criterion for BFP
4 CBx.50BF.t_ReTrp 0.000~10.000 0.001 s Time delay of re-tripping for BFP

5 CBx.50BF.t1_Op 0.000~10.000 0.001 s Time delay of stage 1 for BFP

6 CBx.50BF.t2_Op 0.000~10.000 0.001 s Time delay of stage 2 for BFP


Enabling/disabling breaker failure
protection
7 CBx.50BF.En 0 or 1
0: disable
1: enable
Enabling/disabling re-trip function
for BFP
8 CBx.50BF.En_ReTrp 0 or 1
0: disable
1: enable
Enabling/disabling
zero-sequence current criterion
for BFP initiated by single-phase
9 CBx.50BF.En_3I0_1P 0 or 1
tripping contact
0: disable
1: enable
Enabling/disabling
zero-sequence current criterion
for BFP initiated by three-phase
10 CBx.50BF.En_3I0_3P 0 or 1
tripping contact
0: disable
1: enable
Enabling/disabling
negative-sequence current
criterion for BFP initiated by
11 CBx.50BF.En_I2_3P 0 or 1
three-phase tripping contact
0: disable
1: enable
Enabling/disabling breaker failure
protection can be initiated by
normally closed contact of circuit
12 CBx.50BF.En_CB_Ctrl 0 or 1
breaker
0: disable
1: enable

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3.19 Thermal Overload Protection


3.19.1 General Application
During overload operation of a transmission line (specially for cable), great current results in
greater heat to lead temperature increase and if the temperature reaches too high values the
equipment might be damaged.

Thermal overload protection estimates the internal heat content (temperature) continuously. This
estimation is made by using a thermal model with two time constants, which is based on current
measurement.

When the temperature increases to the alarm value, the protection issues alarm signals to remind
the operator for attention, and if the temperature continues to increase to the trip value, the
protection sends trip command to disconnect the protected line.

3.19.2 Function Description


Thermal overload protection has following functions:

 Thermal time characteristic adopting IEC 60255-8

 Two stages for alarm purpose and two stages for trip purpose

 Thermal accumulation can be cleared by external input signal

The device provides a thermal overload model which is based on the IEC60255-8 standard. The
thermal overload formulas are shown as below.

1. Cold start characteristic:

I2
T    ln 2
I  (k  I B ) 2

2. Hot start characteristic:

I 2  I p2
T    ln
I 2  (k  I B ) 2

Where:

T = Time to operate (in seconds)

 = Thermal time constant of the equipment to be protected, the setting [49.Tau]


IB = Full load current rating, the setting [49.Ib_Set]

I = The RMS value of the largest phase current

IP = Steady state pre-loading before application of the overload

k = Factor associated to the thermal state formula, the setting [49.K]

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ln = Natural logarithm

The characteristic curve of thermal overload model is shown in Figure 3.19-1.

Figure 3.19-1 Characteristic curve of thermal overload model

The hot start characteristic is adopted in the device. The calculation is carried out at zero of Ip, so
users need not to set the value of Ip.

Tripping outputs of the protection is controlled by current, even if the thermal accumulation value is
greater than the setting for tripping, the protection drops off instantaneously when current
disappears. Alarm outputs of the protection is not controlled by current, and only if the thermal
accumulation value is greater than the setting for alarm, alarm output contacts, which can be
connected to block the auto-reclosure, will operate.

3.19.3 Function Block Diagram

3.19.4 I/O Signals


Table 3.19-1 I/O signals of thermal overload protection

No. Input Signal Description


1 49.Clr_Cmd Input signal of clear thermal accumulation value

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Thermal overload protection enabling input, it is triggered from binary input or


2 49.En
programmable logic etc.
Thermal overload protection blocking input, it is triggered from binary input or
3 49.Blk
programmable logic etc.
No. Output Signal Description
1 49.On Thermal overload protection is enabled.
2 49.St Thermal overload protection starts.
3 49-1.Op Stage 1 of thermal overload protection operates to trip.
4 49-2.Op Stage 2 of thermal overload protection operates to trip.
5 49-1.Alm Stage 1 of thermal overload protection operates to alarm.
6 49-2.Alm Stage 2 of thermal overload protection operates to alarm.

3.19.5 Logic

Figure 3.19-2 Logic diagram of thermal overload protection (stage 1)

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Figure 3.19-3 Logic diagram of thermal overload protection (stage 2)

3.19.6 Settings
Table 3.19-2 Settings of thermal overload protection

No. Name Range Step Unit Remark


The factor setting for stage 1 of
thermal overload protection which
1 49-1.K 1.000~3.000 0.001 %
is associated to the thermal state
formula
The factor setting for stage 2 of
thermal overload protection which
2 49-2.K 1.000~3.000 0.001 %
is associated to the thermal state
formula
The reference current setting of the
3 49.Ib_Set (0.050~30.000 )×In 0.001 A
thermal overload protection
The time constant setting of the
4 49.Tau 0.100~100.000 0.001 min
IDMT overload protection
Enabling/disabling stage 1 of
thermal overload protection for
5 49-1.En_Alm 0 or 1 alarm purpose
0: disable
1: enable
Enabling/disabling stage 1 of
thermal overload protection for trip
6 49-1.En_Trp 0 or 1 purpose
0: disable
1: enable
Enabling/disabling stage 2 of
thermal overload protection for
7 49-2.En_Alm 0 or 1 alarm purpose
0: disable
1: enable

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Enabling/disabling stage 2 of
thermal overload protection for trip
8 49-2.En_Trp 0 or 1 purpose
0: disable
1: enable

3.20 Stub Overcurrent Protection


3.20.1 General Application
Stub overcurrent protection is mainly designed for one and a half breakers arrangement. When
line disconnector is open and transmission line is put into maintenance, line VT is no voltage.
Distance protection is disabled, and stub overcurrent protection is enabled. It is used to protect
stub section among for two circuit breakers and line disconnector. Usually, stub overcurrent
protection is enabled automatically by normally closed auxiliary contact of line disconnector.

Figure 3.20-1 3/2 breakers arrangement

3.20.2 Function Block Diagram

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3 Operation Theory

3.20.3 I/O Signals


Table 3.20-1 I/O signals of stub overcurrent protection

No. Input Signal Description


Stub overcurrent protection enabling input 1, it is triggered from binary input or
1 50STB.En1
programmable logic etc.
Stub overcurrent protection enabling input 2, it is triggered from binary input or
2 50STB.En2
programmable logic etc.
Stub overcurrent protection blocking input, it is triggered from binary input or
3 50STB.Blk
programmable logic etc.
4 50STB.89b_DS Normally closed auxiliary contact of line disconnector
No. Output Signal Description
1 50STB.On Stub overcurrent protection is enabled.
2 50STB.Op Stub overcurrent protection operates.
3 50STB.St Stub overcurrent protection starts.
4 50STB.StA Phase A of stub overcurrent protection starts.
5 50STB.StB Phase B of stub overcurrent protection starts.
6 50STB.StC Phase C of stub overcurrent protection starts.

3.20.4 Logic
Only one stage is available to stub overcurrent protection. Based on calculating summation
current from dual CTs, the logic scheme of stub overcurrent protection is shown as Figure 3.20-2.

SIG 50STB.En1
&
SIG 50STB.En2 &
50STB.On
SIG 50STB.Blk

EN [50STB.En]
&

SIG FD.Pkp

>=1 [50STB.t_Op] 50STB.Op


SIG 50STB.89b_DS

& 50STB.St
50STB.StA
SET Ia>[50STB.I_Set]

&
50STB.StB
SET Ib>[50STB.I_Set]

&
50STB.StC
SET Ic>[50STB.I_Set]

Figure 3.20-2 Logic diagram of stub overcurrent protection

PCS-902 Line Distance Relay 3-163


Date: 2014-07-29
3 Operation Theory

3.20.5 Settings
Table 3.20-2 Settings of stub overcurrent protection

No. Name Range Step Unit Remark


Current setting of stub overcurrent
1 50STB.I_Set (0.050~30.000)×In 0.001 A
protection
Time delay of stub overcurrent
2 50STB.t_Op 0.000~10.000 0.001 s
protection
Enabling/disabling stub overcurrent
protection
3 50STB.En 0 or 1
1: enable
0: disable

3.21 Dead Zone Protection


3.21.1 General Application
Generally, fault current is very large when multi-phase fault occurs between CT and circuit breaker
(i.e. dead zone) and it will have a greater impact on the system. Breaker failure protection can
operate after a longer time delay, in order to clear the dead zone fault quickly and improve the
system stability, dead zone protection with shorter time delay (compared with breaker failure
protection) is adopted.

Note!

For double circuit breakers mode, the device will provide indenpendent dead zone
protection for CB1 and CB2 respectively. Both dead zone protections have the same
logic.The difference is that the prefix “CBx.” is added to all signals and settings for circuit
breaker No.x (x=1 or 2).

3.21.2 Function Description


For some wiring arrangement (for example, circuit breaker is located between CT and the line), if
fault occurs between CT and circuit breaker, line protection can operate to trip circuit breaker
quickly, but the fault have not been cleared since local circuit breaker is tripped. Here dead zone
protection is needed in order to trip relevant circuit breaker.

The criterion for dead zone protection is: when dead zone protection is enabled, binary input of
initiating dead zone protection is energized (by default, three-phase tripping signal is used to
initiate dead zone protection), if overcurrent element for dead zone protection operates, then
corresponding circuit breaker is tripped and three phases normally closed contact of the circuit
breaker are energized, dead zone protection will operate to trip adjacent circuit breaker after a
time delay.

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3.21.3 Function Block Diagram

3.21.4 I/O Signal


Table 3.21-1 I/O signals of dead zone protection

No. Input Signal Description


1 CBx.50DZ.En1 Dead zone protection enabling input 1, it can be binary inputs or logic link.
2 CBx.50DZ.En2 Dead zone protection enabling input 2, it can be binary inputs or logic link.
Dead zone protection blocking input, such as function blocking binary input. When
3 CBx.50DZ.Blk
the input is 1, dead zone protection is reset and time delay is cleared.
4 CBx.50DZ.Init Initiation signal input of the dead zone protection.
No. Output Signal Description
1 CBx.50DZ.On Dead zone protection is enabled.
2 CBx.50DZ.St Dead zone protection starts.
3 CBx.50DZ.Op Dead zone protection operates.

3.21.5 Logic

Figure 3.21-1 Dead zone protection

PCS-902 Line Distance Relay 3-165


Date: 2014-07-29
3 Operation Theory

3.21.6 Settings
Table 3.21-2 Settings of dead zone protection

No. Name Range Step Unit Remark


Current setting for dead zone
protection. This setting shall ensure the
1 CBx.50DZ.I_Set (0.050~30.000)×In 0.001 A
protection being sensitive enough if
dead zone fault occurs.
2 CBx.50DZ.t_Op 0.000~10.000 0.001 s Time delay of dead zone protection.
Enabling/disabling dead zone
protection.
3 CBx.50DZ.En 0 or 1 -
1: enable
0: disable

3.22 Pole Discrepancy Protection


3.22.1 General Application
The pole discrepancy of circuit breaker may occur during operation of a breaker with segregated
operating gears for the three phases. The reason could be an interruption in the tripping/closing
circuits, or mechanical failure. A pole discrepancy can only be tolerated for a limited period. When
there is loading, zero-sequence or negative-sequence current will be generated in the power
system, which will result in overheat of the generator or the motor. With the load current increasing,
overcurrent elements based on zero-sequence current or negative-sequence current may operate.
Pole discrepancy protection is required to operate before the operation of these overcurrent
elements.

Note!

For double circuit breakers mode, the device will provide indenpendent pole discrepancy
protection for CB1 and CB2 respectively. Both pole discrepancy protections have the same
logic.The difference is that the prefix “CBx.” is added to all signals and settings for circuit
breaker No.x (x=1 or 2).

3.22.2 Function Description


Pole discrepancy protection determines three-phase breaker pole discrepancy condition by its
phase segregated CB auxiliary contacts. In order to improve the reliability of pole discrepancy
protection, the asymmetrical current component can be selected as addition criteria when needed.

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3.22.3 Function Block Diagram

62PD

CBx.62PD.En1 CBx.62PD.On

CBx.62PD.En2 CBx.62PD.Op

CBx.62PD.Blk CBx.62PD.St

3.22.4 I/O Signals


Table 3.22-1 I/O signals of pole discrepancy protection

No. Input Signal Description


Pole discrepancy protection enabling input 1, it is triggered from binary input or
1 CBx.62PD.En1
programmable logic etc.
Pole discrepancy protection enabling input 2, it is triggered from binary input or
2 CBx.62PD.En2
programmable logic etc.
Pole discrepancy protection blocking input, it is triggered from binary input or
3 CBx.62PD.Blk
programmable logic etc.
No. Output Signal Description
1 CBx.62PD.On Pole discrepancy protection is enabled.
2 CBx.62PD.Op Pole discrepancy protection operates to trip
3 CBx.62PD.St Pole discrepancy protection starts

3.22.5 Logic
Phase-segregated circuit breaker auxiliary contacts are connected to the device. When the state
of three phase-segregated circuit breaker auxiliary contacts are inconsistent, pole discrepancy
protection will be started and initiate output after a time delay [CBx.62PD.t_Op].

Pole discrepancy protection can be blocked by external input signal [62PD.Blk]. In general, this
input signal is usually from the output of 1-pole AR initiation, so as to prevent pole discrepancy
protection from operation during 1-pole AR initiation.

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3 Operation Theory

SIG CBx.62PD.En1
&
SIG CBx.62PD.En2 &
62PD.On
EN [CBx.62PD.En]

SIG CBx.62PD.Blk
&

SIG FD.Pkp 62PD.St


&
SIG CBx.62PD.In_PD [62PD.t_Op] 0ms 62PD.Op

EN [CBx.62PD.En_3I0/I2_Ctrl] >=1
SET 3I0>[CBx.62PD.3I0_Set] >=1

SET I2>[CBx.62PD.I2_Set]

Figure 3.22-1 Logic diagram of pole discrepancy protection

The signal “CBx.62PD.In_PD” is input signal of pole discrepancy status, which is always from PD
signal of circuit breaker position supervison module. When the states of three auxiliary contacts of
phase-segregate circuit breaker are inconsistent, the signal is energized.

3.22.6 Settings
Table 3.22-2 Settings of pole discrepancy protection

No. Name Range Step Unit Remark


Current setting of residual
1 CBx.62PD.3I0_Set (0.050~30.000 )×In 0.001 A current criterion for pole
discrepancy protection
Current setting of
negative-sequence current
2 CBx.62PD.I2_Set (0.050~30.000 )×In 0.001 A
criterion for pole discrepancy
protection
Time delay of pole discrepancy
3 CBx.62PD.t_Op 0.000~600.000 0.001 s
protection
Enabling/disabling pole
discrepancy protection
4 CBx.62PD.En 0 or 1
0: disable
1: enable
Enabling/disabling residual
current criterion and
negative-sequence current
5 CBx.62PD.En_3I0/I2_Ctrl 0 or 1 criterion for pole discrepancy
protection
0: disable
1: enable

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3.23 Broken Conductor Protection


3.23.1 General Application
Single-phase earthing fault and two-phases earthing fault are the most common fault on circuits,
the fault is easy to detect because the fault current will increase obviously.

Broken-conductor fault is difficult to detect since there is no increase of current but


negative-sequence current, so negative-sequence overcurrent protection can be considered to
clear broken-conductor fault. However, under heavy load condition, negative-sequence current is
relative large due to unbalance loading, but negative-sequence current because of
broken-conductor fault under light load condition is relative small. If negative-sequence current
protection is set larger than maximum negative-sequence current under loading, the protection
may be failure to operate if broken-conductor fault happens under light load condition,
negative-sequence overcurrent protection is therefore not suitable to apply for broken-conductor
fault.

The network of single-phase broken condition is similar to that of two-phases earthing fault,
positive-sequence, negative-sequence and zero-sequence network is connected in parallel, I2/I1=
Z0/(Z0+Z2), generally, zero-sequence impedance is larger than positive-sequence impedance, i.e.
I2/I1>0.5. The network of two-phases broken condition is similar to that of single-phase earthing
fault, positive-sequence, negative-sequence and zero-sequence network is connected in series,
so I2/I1=1.

3.23.2 Function Description


Broken-conductor fault mainly is single-phase broken or two-phases broken. According to the ratio
of negative-sequence current to positive-sequence current (I2/I1), it is used to judge whether there
is an broken-conductor fault. Negative-sequence current under normal operating condition (i.e.
unbalance current) is due to CT error and unbalance load, so the ratio of negative-sequence
current to positive-sequence current (amplitude) is relative steady. The value with margin can then
be used as the setting of broken conductor protection. It is mainly used to detect broken-conductor
fault and CT circuit failure as well.

3.23.3 Function Block Diagram

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3 Operation Theory

3.23.4 I/O Signals


Table 3.23-1 I/O signals of broken conductor protection

No. Input Signal Description


Enable broken conductor protection input 1, it is triggered from binary input or
1 46BC.En1
programmable logic etc.
Enable broken conductor protection input 2, it is triggered from binary input or
2 46BC.En2
programmable logic etc.
Broken conductor protection blocking input, it is triggered from binary input or
3 46BC.Blk
programmable logic etc.
No. Output Signal Description
1 46BC.On Broken-conductor protection is enabled.
2 46BC.St Broken-conductor protection starts.
3 46BC.Op Broken-conductor protection operates to trip.
4 46BC.Alm Broken-conductor protection operates to alarm.

3.23.5 Logic

Figure 3.23-1 Logic diagram of broken conductor protection

3.23.6 Settings
Table 3.23-2 Settings of broken conductor protection

No. Name Range Step Unit Remark


Ratio setting (negative-sequence
1 46BC.I2/I1_Set 0.20~1.00 0.001 current to positive-sequence current)
of broken conductor protection
Time delay of broken conductor
2 46BC.t_Op 0.000~600.000 0.001 s
protection

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Minimum operation current of broken


3 46BC.I_Min (0.050~30.000)×In 0.001 A
conductor protection
Enabling/disabling broken conductor
protection to operate to trip
4 46BC.En_Trp 0 or 1
0: disable
1: enable
Enabling/disabling broken conductor
protection to operate to alarm
5 46BC.En_Alm 0 or 1
0: disable
1: enable

3.24 Reverse Power Protection


3.24.1 General Application
Due to various reasons lead to lose motivity, synchronous generator is changed to run as a motor
state, Absorbing energy from the power grid to drive a turbine (gas turbine) operation. In order to
prevent turbine blade or gas turbine gear from being damaged, reverse power protection (reversal
direction) should be configured.

3.24.2 Function Description


Reverse power protection provides two stages: stage 1 can be set as alarm purpose or tripping
purpose, and stage 2 is only for tripping purpose. When reverse power value of the generator
detected is greater than reverse power protection setting ([32R1.P_Set]), reverse power protection
can operate to alarm or trip with the time delay. After overload protection, over-excitation
protection or loss-of-excitation protection, such as abnormal operation protection operates, the
generator needs sequential tripping. The steam valve of turbine has to be closed firstly, and
sequential tripping reverse power protection blocked by position contact of steam valve and circuit
breaker operates to trip with the time delay.

Generator power is calculated by three-phase voltage and three-phase current of generator


terminal. Positive sequence component of active power is calculated by fundamental wave of the
voltage and current. The benefits is that reverse power protection is independent of the
asymmetric component, so as to truly reflect the load of the engine power system.

The level of generator absorbing the active power will depend on the need to overcome the friction
loss, according to different types of generator units, the settings of reverse power protection will be
different. During testing in the primary side of the generator unit, the active power absorbed by the
generator can be measured by the device.

When the device is equipped with power plant side, reverse power is negative value, and reverse
power is positive value when it is equipped with substation side.

The operation criterion:

[32R.Opt_Dir]=Reverse AND P<-[32Rx.P_Set]

or

[32R.Opt_Dir]=Forward AND P>[32Rx.P_Set]

PCS-902 Line Distance Relay 3-171


Date: 2014-07-29
3 Operation Theory

3.24.3 Function Block Diagram

3.24.4 I/O Signals


Table 3.24-1 I/O signals of reverse power protection

No. Input Signal Description


Enable stage x of reverse power protection input 1, it is triggered from binary
1 32Rx.En
input or programmable logic etc. (x=1, 2)
Stage x of reverse power protection blocking input, it is triggered from binary
2 32Rx.Blk
input or programmable logic etc. (x=1, 2)
No. Output Signal Description
1 P1 Positive-sequence active power
2 32Rx.On Stage x of reverse power protection is enabled. (x=1, 2)
3 32Rx.St Stage x of reverse power protection starts. (x=1, 2)
4 32Rx.Op Stage x of reverse power protection operates to trip. (x=1, 2)
5 32R1.Alm Stage 1 of reverse power protection operates to alarm. (x=1, 2)

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3.24.5 Logic

SIG 32R1.En &

SIG 32R1.Blk
&
EN [32R1.En_Alm] >=1 32R1.On

EN [32R1.En_Trp]

SIG 32R1.On

SET [32R.Opt_Dir]=Reverse &

SIG P1<-[32R1.P_Set]
&
>=1 32R1.St
SET [32R.Opt_Dir]=Forward &

SIG P1>[32R1.P_Set]

&
[32R1.t_Alm] 0s 32R1.Alm
EN [32R1.En_Alm]

&
[32R1.t_Trp] 0s 32R1.Op
EN [32R1.En_Trp]

Figure 3.24-1 Logic diagram of stage 1 of reverse power protection

Figure 3.24-2 Logic diagram of stage 2 of reverse power protection

When stage 2 of reverse power protection is used as sequential tripping reverse power protection,
it can be selectable to be controlled by position contact of steam valve and circuit breaker

PCS-902 Line Distance Relay 3-173


Date: 2014-07-29
3 Operation Theory

3.24.6 Settings
Table 3.24-2 Settings of broken conductor protection

No. Name Range Step Unit Remark


Power setting of stage 1 of reverse
power protection
1 32R1.P_Set (0.100~50.000)×In 0.01 W
It should be greater 0.5 times the
measured value of reverse power.
Time delay of stage 1 of reverse power
2 32R1.t_Alm 0.100~3000.000 0.01 s
protection for alarm purpose
Time delay of stage 1 of reverse power
3 32R1.t_Trp 0.100~3000.000 0.01 s
protection for tripping purpose
Enabling/disabling stage 1 of reverse
power protection to operate to trip
4 32R1.En_Trp 0 or 1
0: disable
1: enable
Enabling/disabling stage 1 of reverse
power protection to operate to alarm
5 32R1.En_Alm 0 or 1
0: disable
1: enable
Power setting of stage 2 of reverse
power protection
6 32R2.P_Set (0.100~50.000)×In 0.01 W
It should be greater 0.5 times the
measured value of reverse power.
Time delay of stage 2 of reverse power
7 32R2.t_Trp 0.100~3000.000 0.01 s
protection
Enabling/disabling stage 2 of reverse
power protection to operate to trip
8 32R2.En_Trp 0 or 1
0: disable
1: enable
The directionality option (forward
Forward
9 32R.Opt_Dir direction or reverse direction) of
Reverse
reverse power protection

3.25 Synchrocheck
3.25.1 General Application
The purpose of synchrocheck is to ensure two systems are synchronism before they are going to
be connected.

When two asynchronous systems are connected together, due to phase difference between the
two systems, larger impact will be led to the system during closing. Thus auto-reclosing and
manual closing are applied with the synchrocheck to avoid this situation and maintain the system
stability. The synchrocheck includes synchronism check and dead charge check.

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Note!

For double circuit breakers mode, the device will provide indenpendent synchrocheck
function for CB1 and CB2 respectively. Both synchrocheck functions have the same
logic.The difference is that the prefix “CBx.” is added to all signals and settings for circuit
breaker No.x (x=1 or 2).

3.25.2 Function Description


The synchronism check function is mainly to measure the electrical quantities between both sides
of the circuit breaker and compares them with the corresponding settings. The output is only given
if all measured quantities are simultaneously within their set limits.

The dead charge check function measures the amplitude of line voltage and bus voltage between
both sides of the circuit breaker, and then compare them with the live check setting [CBx.25.U_Lv]
and the dead check setting [CBx.25.U_Dd]. The output is only given when the measured
quantities comply with the criteria.

The synchrocheck in this device can be used for auto-reclosing and manual closing for both single
circuit breaker and dual circuit breakers. When applied for single circuit breaker, the comparison
relationship between reference voltage (CBx.Uref) and synchronism voltage (CBx.Usyn) for
synchronism check is as shown in Figure 3.25-1.

CBx.Uref CBx.Usyn

Figure 3.25-1 Relationship between reference voltage and synchronism voltage

When both line and busbar are live, the synchronism check element operates if voltage difference,
phase angle difference and frequency difference are all within their setting values.

1. The voltage difference is checked by the following equations.

CBx.Usyn≥[CBx.25.U_Lv]

CBx.Uref≥[CBx.25.U_Lv]

[CBx.25.U_Diff]≥|CBx.Usyn-CBx.Uref|

2. The phase difference is checked by the following equations.

CBx.Usyn×CBx.Uref×cosØ≥0

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CBx.Usyn×CBx.Uref×sin([CBx.25.phi_Diff])≥CBx.Usyn×CBx.Uref×|sinØ|

Where,

Ø is phase difference between Usyn and Uref

3. The frequency difference is checked by the following equations.

|f(CBx.Usyn)-f(CBx.Uref)|≤[CBx.25.f_Diff]

If frequency check is disabled (i.e. [CBx.25.En_fDiffChk] is set as “0”), a detected maximum slip
cycle can also be determined by the following equation based on phase difference setting and the
synchronism check time setting:

f =[CBx.25.phi_Diff]/(180×[CBx.25.t_SynChk])

Where:

f is slip cycle

If frequency check is enabled (i.e. [CBx.25.En_fDiffChk] is set as “1”), [CBx.25.t_SynChk] can be


set to be a very small value (default value is 50ms).

This function module supports voltage switching. In general, voltage switching is fulfilled by
external circuit, and the busbar arrangement should be determined, including three options, single
busbar arrangement, double busbars arrangement and 1½ breakers arrangement, if using this
module to fulfill voltage switching.

Analog input defines four voltage inputs, UL1, UB1, UL2, UB2, and their usage are as follow:

UL1: it connects with three-phase protection voltages (from line or busbar), which mainly are used
by distance protection, voltage protection and so on.

UB1: it connects with single synchronism voltage (from line or busbar).

UL2: it connects with single synchronism voltage (from the other line of the same diameter in 1½
breakers arrangement). When voltage switching is available, it is only used by 1½ breakers
arrangement.

UB2: it connects with single synchronism voltage (from busbar). When voltage switching is
available, it is only used by double busbars arrangement and 1½ breakers arrangement.

The reference voltage (Uref) is determined to use phase voltage or phase-to-phase voltage (UL1)
from three-phase protection voltages and by the setting [CBx.25.Opt_Source_UL1].

The synchronism voltage (Usyn) always connects with UB1 if not adopting voltage switching. It
connects with one of UB1, UL2 and UB2 according to the result of voltage switching if adopting
voltage switching.

3.25.2.1 Single Busbar Arrangement

Voltage selection function is not required for this busbar arrangement, the connection of the
voltage signals and respective VT MCB auxiliary contacts to the device is shown in the Figure
3.25-2 and Figure 3.25-3.

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1. Three-phase bus voltage used for protection ([CBx.VTS.En_LineVT]=0)

Figure 3.25-2 Voltage connection for single busbar arrangement

2. Three-phase line voltage used for protection ([CBx.VTS.En_LineVT]=1)

Figure 3.25-3 Voltage connection for single busbar arrangement

In the figures, the setting [CBx.VTS.En_LineVT] is used to determine protection voltage signals
(Ua, Ub, Uc) from line VT or bus VT according to the condition.

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3 Operation Theory

3.25.2.2 Double Busbars Arrangement

Figure 3.25-4 Voltage connection for double busbars arrangement

For double busbars arrangement, selection of appropriate voltage signals from Bus 1 and Bus 2
for synchronizing are required. Line VT signal is taken as reference to check synchronizing with
the voltage after voltage selection function. Selection approach is as follows.

For the disconnector positions, the normally open (NO) and normally closed (NC) contacts of the
disconnector for bus 1 and bus 2 are required to determine the disconnector open and closed
positions. The voltage selection logic is as follows.

BI 25.NC_UB1DS &
CBx.UB1_Sel
BI 25.NO_UB1DS

BI 25.NC_UB2DS &
CBx.UB2_Sel
BI 25.NO_UB2DS

&
CBx.Alm_Invalid_Sel

UB1 CBx.Usyn

UB2

Figure 3.25-5 Voltage selection for double busbars arrangement

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After acquiring the disconnector open and closed positions of double busbars, use the following
logic to acquire the feeder voltage of double busbars.

DS2 CLOSED DS2 OPEN


DS1 CLOSED Keep original value Voltage from Bus 1 VT (CBx.UB1_Sel=1)
DS1 OPEN Voltage from Bus 2 VT (CBx.UB2_Sel=1) Keep original value

DS1 is disconnector of Bus 1

DS2 is disconnector of Bus 2

If voltage selection is invalid (CBx.Alm_Invalid_Sel=1), keep original selection and without


switchover.

3.25.2.3 One and A Half Breakers Arrangement

For one and a half breakers arrangement, selection of appropriate voltage signals among Line1
VT, Line2 VT and Bus 2 VT as reference voltage to check synchronizing with Bus 1 voltage signal
for closing breaker at Bus 1 side.

Figure 3.25-6 Voltage connection for one and a half breakers arrangement

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For the circuit breaker at bus side (take bus breaker of bus 1 as an example), the device acquires
the disconnector open and closed positions of two feeders and bus 2. The voltage selection logic
is as follows.

BI 25.NC_UL1DS &
CBx.UL1_Sel
BI 25.NO_UL1DS
&
BI 25.NC_UL2DS & CBx.UL2_Sel

BI 25.NO_UL2DS
&
BI 25.NC_UB2DS & CBx.UB2_Sel

BI 25.NO_UB2DS
&
CBx.Alm_Invalid_Sel

UL1 CBx.Uref

UL2

UB2

UB1 CBx.Usyn

Figure 3.25-7 Voltage selection for one and a half breakers arrangement

For the tie breaker, the device acquires the disconnector open and closed positions of two feeders
and two busbars. Either Line 1 VT or Bus 1 VT signal is selected as reference voltage to check
synchronizing with the selected voltage between Line 2 VT and Bus 2 VT. The voltage selection
logic is as follows.

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BI 25.NC_UL1DS &
CBx.UL1_Sel
BI 25.NO_UL1DS
&
BI 25.NC_UB1DS & CBx.UB1_Sel

BI 25.NO_UB1DS
&

UL1 CBx.Uref

UB1

BI 25.NC_UL2DS &
CBx.UL2_Sel
BI 25.NO_UL2DS
&
BI 25.NC_UB2DS & CBx.UB2_Sel

BI 25.NO_UB2DS
>=1
& CBx.Alm_Invalid_Sel

UL2 CBx.Usyn

UB2

Figure 3.25-8 Voltage selection for one and a half breakers arrangement

When the voltage selection fails (including VT circuit failure and MCB failure), the device will issue
the corresponding failure signal. If the voltage selection is invalid (CBx.Alm_Invalid_Sel=1), keep
original selection and without switchover.

In order to simplify description, one of the two voltages used in the synchrocheck (synchronism check
and dead charge check) which obtained after voltage selection function is regarded as line voltage,
and another is bus voltage.

3.25.2.4 Synchronism Voltage Circuit Failure Supervision

If synchronism voltage and reference voltage are used for auto-reclosing with synchronism or
dead line or busbar check, the VT circuit of synchronism voltage and reference voltage are
monitored.

Under normal conditions, the circuit breaker is in closed position but the synchronism voltage is
lower than the setting [CBx.25.U_Lv], it means that synchronism voltage circuit fails and an alarm
[CBx.25.Alm_VTS_Usyn] or [CBx.25.Alm_VTS_Uref] will be issued with a time delay of 10s. If
MCB of synchronism voltage or reference voltage is open, an alarm [CBx.25.Alm_VTS_Usyn] or
[CBx.25.Alm_VTS_Uref] will be issued instantaneously. After synchronism voltage reverted to
normal condition, the alarm will be reset automatically with a time delay of 10s. When synchronism
voltage circuit failure is detected, dead check in auto-reclosing logic will be disabled. If the logic
setting [CBx.25.En_NoChk] is set as “1”, synchronism voltage circuit failure supervision will be

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disabled.

SIG FD.Pkp >=1

SIG CBx.79.Inprog
&
10s 10s >=1
SIG CBx.Uref<[CBx.25.U_Lv] &
CBx.25.Alm_VTS_Uref
SIG 25.MCB_VT_Uref

EN [CBx.25.En_SynChk] >=1
EN [CBx.25.En_DdL_DdB]
>=1
EN [CBx.25.En_DdL_LvB]

EN [CBx.25.En_LvL_DdB]
&

SIG CBx.25.Blk_VTS_UL

Figure 3.25-9 Reference voltage circuit failure supervision logic

SIG FD.Pkp >=1

SIG CBx.79.Inprog
&
10s 10s >=1
SIG CBx.Usyn<[CBx.25.U_Lv] &
CBx.25.Alm_VTS_Usyn
SIG 25.MCB_VT_Usyn

EN [CBx.25.En_SynChk] >=1
EN [CBx.25.En_DdL_DdB]
>=1
EN [CBx.25.En_DdL_LvB]

EN [CBx.25.En_LvL_DdB]
&

SIG CBx.25.Blk_VTS_UB

Figure 3.25-10 Synchronism voltage circuit failure supervision logic

As shown in Figure 3.25-9 and Figure 3.25-10, 25.MCB_VT_Uref is MCB signal corresponding to
reference voltage after switching and 25.MCB_VT_Usyn is MCB signal corresponding to
synchronism voltage after switching.

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3.25.3 Function Block Diagram

25

CBx.25.Blk_Chk CBx.UL1_Sel

CBx.25.Blk_SynChk CBx.UL2_Sel

CBx.25.Blk_DdChk CBx.UB1_Sel

CBx.25.Start_Chk CBx.UB2_Sel

CBx.25.Start_3PLvChk CBx.Alm_Invalid_Sel

CBx.25.Blk_VTS_Uref CBx.25.Ok_fDiffChk

CBx.25.Blk_VTS_Usyn CBx.25.Ok_UDiffChk

25.MCB_VT_UL1 CBx.25.Ok_phiDiffChk

25.MCB_VT_UL2 CBx.25.Ok_DdL_DdB

25.MCB_VT_UB1 CBx.25.Ok_DdL_LvB

25.MCB_VT_UB2 CBx.25.Ok_LvL_DdB

25.NC_UL1DS CBx.25.Chk_LvL

25.NO_UL1DS CBx.25.Chk_DdL

25.NC_UB1DS CBx.25.Chk_LvB

25.NO_UB1DS CBx.25.Chk_DdB

25.NC_UL2DS CBx.25.Ok_DdChk

25.NO_UL2DS CBx.25.Ok_SynChk

25.NC_UB2DS CBx.25.Ok_Chk

25.NO_UB2DS CBx.25.Ok_3PLvChk

CBx.25.Alm_VTS_Uref

CBx.25.Alm_VTS_Usyn

CBx.25.f_Ref

CBx.25.f_Syn

CBx.25.U_Diff

CBx.25.f_Diff

CBx.25.Phi_Diff

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3.25.4 I/O Signals


Table 3.25-1 I/O signals of synchrocheck

No. Input Signal Description


1 CBx.25.Blk_Chk Input signal of blocking synchrocheck function for AR.
Input signal of blocking synchronism check for AR. If the value is “1”, the
2 CBx.25.Blk_SynChk
output of synchronism check is “0”.
3 CBx.25.Blk_DdChk Input signal of blocking dead charge check for AR.
Input signal of starting synchronism check, usually it was starting signal of
4 CBx.25.Start_Chk
AR from auto-reclosing module.
Input signal of starting live three-phase check, usually it was starting signal
5 CBx.25.Start_3PLvChk
of 1-pole AR
6 CBx.25.Blk_VTS_Usyn VT circuit supervision (Usyn) is blocked
7 CBx.25.Blk_VTS_Uref VT circuit supervision (Uref) is blocked
8 25.MCB_VT_UL1 Binary input for VT MCB auxiliary contact (UL1)
9 25.MCB_VT_UL2 Binary input for VT MCB auxiliary contact (UL2)
10 25.MCB_VT_UB1 Binary input for VT MCB auxiliary contact (UB1)
11 25.MCB_VT_UB2 Binary input for VT MCB auxiliary contact (UB2)
12 25.NC_UL1DS Normally closed contact of disconnector (UL1)
13 25.NO_UL1DS Normally open contact of disconnector (UL1)
14 25.NC_UB1DS Normally closed contact of disconnector (UB1)
15 25.NO_UB1DS Normally open contact of disconnector (UB1)
16 25.NC_UL2DS Normally closed contact of disconnector (UL2)
17 25.NO_UL2DS Normally open contact of disconnector (UL2)
18 25.NC_UB2DS Normally closed contact of disconnector (UB2)
19 25.NO_UB2DS Normally open contact of disconnector (UB2)
No. Output Signal Description
1 CBx.UL1_Sel To select voltage of Line 1
2 CBx.UL2_Sel To select voltage of Line 2
3 CBx.UB1_Sel To select voltage of Bus 1
4 CBx.UB2_Sel To select voltage of Bus 2
5 CBx.Alm_Invalid_Sel Voltage selection is invalid.
To indicate that frequency difference condition for synchronism check of AR
6 CBx.25.Ok_fDiffChk
is met, frequency difference between UB and UL is smaller than [25.f_Diff].
To indicate that voltage difference condition for synchronism check of AR is
7 CBx.25.Ok_UDiffChk
met, voltage difference between UB and UL is smaller than [25.U_Diff]
To indicate phase difference condition for synchronism check of AR is met,
8 CBx.25.Ok_phiDiffChk
phase difference between UB and UL is smaller than [25.phi_Diff].
9 CBx.25.Ok_DdL_DdB Dead line and dead bus condition is met
10 CBx.25.Ok_DdL_LvB Dead line and live bus condition is met
11 CBx.25.Ok_LvL_DdB Live line and dead bus condition is met
12 CBx.25.Chk_LvL Line voltage is greater than the voltage setting [25.U_Lv]
13 CBx.25.Chk_DdL Line voltage is smaller than the voltage setting [25.U_Dd]

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14 CBx.25.Chk_LvB Bus voltage is greater than the voltage setting [25.U_Lv]


15 CBx.25.Chk_DdB Bus voltage is smaller than the voltage setting [25.U_Dd]
16 CBx.25.Ok_DdChk To indicate that dead charge check condition of AR is met
17 CBx.25.Ok_SynChk To indicate that synchronism check condition of AR is met
18 CBx.25.Ok_Chk To indicate that synchrocheck condition of AR is met
19 CBx.25.Ok_3PLvChk To indicate that live three-phase check condition is met
20 CBx.25.Alm_VTS_Uref Reference voltage circuit is abnormal
21 CBx.25.Alm_VTS_Usyn Synchronism voltage circuit is abnormal
22 CBx.25.f_Ref Frequency of the voltage used by protection calculation
23 CBx.25.f_Syn Frequency of the voltage used by synchrocheck
24 CBx.25.U_Diff Voltage difference for synchronism check
25 CBx.25.f_Diff Frequency difference for synchronism check
26 CBx.25.phi_Diff Phase difference for synchronism check

3.25.5 Logic

3.25.5.1 Synchronism Check Logic

The frequency difference, voltage difference, and phase difference of voltages from both sides of
the circuit breaker are calculated in the device, they are used as input conditions of the
synchronism check. When the synchronism check function is enabled and the voltages of both
ends meets the requirements of the voltage difference, phase difference, and frequency difference,
and there is no synchronism check blocking signal, it is regarded that the synchronism check
conditions are met.

Synchronism check logic is usually used for 3-pole AR, and 1-pole AR usually adopts no check
logic. However, the circuit breaker at local end can not reclosed unless the circuit breaker at
remote end is reclosed successfully. In order to meet this requirement, live three-phase check can
be used for 1-pole AR, determined by the setting [CBx.25.En_3PLvChk], ensure that three-phase
voltages is restored to normal at local end after the circuit breaker at remote end is reclosed.

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EN [CBx.25.En_3PLvChk]

SIG CBx.Uref.a>[CBx.25.U_Lv]
>=1
&
SIG CBx.Uref.b>[CBx.25.U_Lv]

SIG CBx.Uref.c>[CBx.25.U_Lv]
&
SIG CBx.25.Start_3PLvChk 200ms 0ms CBx.25.Ok_3PLvChk

SIG CBx.25.Blk_Chk >=1


&
SIG CBx.25.Blk_SynChk

EN [CBx.25.En_SynChk]
&

SIG CBx.25.Start_Chk

SIG CBx.Usyn>[CBx.25.U_Lv]
& &
SIG CBx.Uref>[CBx.25.U_Lv] 50ms 0ms & [CBx.25.t_SynChk] 0ms CBx.25.Ok_SynChk

SIG CBx.25.Ok_UdiffChk

SIG CBx.25.Ok_phiDiffChk

SIG CBx.25.Ok_fDiffChk

Figure 3.25-11 Synchronism check

3.25.5.2 Dead Charge Check Logic

The dead charge check conditions have three types, namely, live-bus and dead-line check,
dead-bus and live-line check and dead-bus and dead-line check. The above three modes can be
enabled and disabled by the corresponding logic settings. The device can calculate the measured
bus voltage and line voltage at both sides of the circuit breaker and compare them with the
settings [CBx.25.U_Lv] and [CBx.25.U_Dd]. When the voltage is higher than [CBx.25.U_Lv], the
bus/line is regarded as live. When the voltage is lower than [CBx.25.U_Dd], the bus/line is
regarded as dead.

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SIG CBx.25.Blk_Chk >=1


&
SIG CBx.25.Blk_DdChk &
>=1 [CBx.25.t_DdChk] 0ms CBx.25.Ok_DdChk
SIG CBx.25.Start_Chk

EN [CBx.25.En_DdL_DdB] &
CBx.25.Ok_DdL_DdB
SIG CBx.Uref<[CBx.25.U_Dd] &

SIG CBx.Usyn<[CBx.25.U_Dd]

EN [CBx.25.En_DdL_LvB] &
CBx.25.Ok_DdL_LvB
SIG CBx.Uref<[CBx.25.U_Dd] &

SIG CBx.Usyn>[CBx.25.U_Lv]

EN [CBx.25.En_LvL_DdB] &
CBx.25.Ok_LvL_DdB
SIG CBx.Uref>[CBx.25.U_Lv] &

SIG CBx.Usyn<[CBx.25.U_Dd]

SIG CBx.25.Alm_VTS_Usyn >=1

SIG CBx.25.Alm_VTS_Uref

Figure 3.25-12 Dead charge check logic

3.25.5.3 Synchrocheck Logic

Figure 3.25-13 Synchrocheck logic

3.25.6 Settings
Table 3.25-2 Synchrocheck settings

No. Name Range Step Unit Remark


Voltage selecting mode of line 1.
0: A-phase voltage
1: B-phase voltage
1 CBx.25.Opt_Source_UL1 0~5 1 2: C-phase voltage
3: AB-phase voltage
4: BC-phase voltage
5: CA-phase voltage
Voltage selecting mode of bus 1.
2 CBx.25.Opt_Source_UB1 0~5 1 0: A-phase voltage
1: B-phase voltage

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2: C-phase voltage
3: AB-phase voltage
4: BC-phase voltage
5: CA-phase voltage
Voltage selecting mode of line 2.
0: A-phase voltage
1: B-phase voltage
3 CBx.25.Opt_Source_UL2 0~5 1 2: C-phase voltage
3: AB-phase voltage
4: BC-phase voltage
5: CA-phase voltage
Voltage selecting mode of bus 2.
0: A-phase voltage
1: B-phase voltage
4 CBx.25.Opt_Source_UB2 0~5 1 2: C-phase voltage
3: AB-phase voltage
4: BC-phase voltage
5: CA-phase voltage
Option of circuit breaker
configuration, and it should be
set as “NoVoltSel” if no voltage
selection is adopted.

NoVoltSel DblBusOneCB: one circuit

DblBusOneCB breaker for double busbar


5 CBx.CBConfigMode
3/2BusCB 3/2BusCB: bus side circuit

3/2TieCB breaker for one and a half

breakers
3/2TieCB: line side circuit
breaker for one and a half
breakers

6 CBx.25.U_Dd 0.05Un~0.8Un 0.001 V Voltage threshold of dead check

7 CBx.25.U_Lv 0.5Un~Un 0.001 V Voltage threshold of live check

Compensation coefficient for


8 CBx.25.K_Usyn 0.20-5.00
synchronism voltage
Phase difference limit of
9 CBx.25.phi_Diff 0~ 89 1 deg
synchronism check for AR
Compensation for phase
10 CBx.25.phi_Comp 0~359 1 deg difference between two
synchronism voltages
Frequency difference limit of
11 CBx.25.f_Diff 0.02~1.00 0.01 Hz
synchronism check for AR

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Voltage difference limit of


12 CBx.25.U_Diff 0.02Un~0.8Un V
synchronism check for AR
Time delay to confirm dead
13 CBx.25.t_DdChk 0.010~25.000 s
check condition
Time delay to confirm
14 CBx.25.t_SynChk 0.010~25.000 s
synchronism check condition
Enabling/disabling frequency
difference check
15 CBx.25.En_fDiffChk 0 or 1
0: disable
1: enable
Enabling/disabling synchronism
check
16 CBx.25.En_SynChk 0 or 1
0: disable
1: enable
Enabling/disabling dead line and
dead bus (DLDB) check
17 CBx.25.En_DdL_DdB 0 or 1
0: disable
1: enable
Enabling/disabling dead line and
live bus (DLLB) check
18 CBx.25.En_DdL_LvB 0 or 1
0: disable
1: enable
Enabling/disabling live line and
dead bus (LLDB) check
19 CBx.25.En_LvL_DdB 0 or 1
0: disable
1: enable
Enabling/disabling AR without
any check
20 CBx.25.En_NoChk 0 or 1
0: disable
1: enable
Enabling/disabling live
three-phase check of line
21 CBx.25.En_3PLvChk 0 or 1
0: disable
1: enable

3.26 Automatic Reclosure


3.26.1 General Application
To maintain the integrity of the overall electrical transmission system, the device is installed on the
transmission system to isolate faulted segments during system disturbances. Faults caused by
lightning, wind, or tree branches could be transient in nature and may disappear once the circuit is
de-energized. According to statistics, for overhead transmission line, 80%~90% of the faults on
overhead lines are the transient faults. Auto-reclosing systems are installed to restore the faulted
section of the transmission system once the fault is extinguished (providing it is a transient fault).

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For certain transmission systems, auto-reclosure is used to improve system stability by restoring
critical transmission paths as soon as possible.

Besides overhead lines, other equipment failure, such as cables, busbar, transformer fault and so
on, are generally permanent fault, and auto-reclosing is not initiated after faulty feeder is tripped.
For some mixed circuits, such as overhead line with a transformer unit, hybrid transmission lines,
etc., it is required to ensure that auto-reclosing is only initiated for faults overhead line section, or
make a choice according to the situation.

Note!

For double circuit breakers mode, the device will provide indenpendent automatic
reclosure function for CB1 and CB2 respectively. Both automatic reclosure functions have
the same logic.The difference is that the prefix “CBx.” is added to all signals and settings
for circuit breaker No.x (x=1 or 2).

3.26.2 Function Description


This auto-reclosing logic can be used with either integrated device or external device. When the
auto-reclosure is used with integrated device, the internal protection logic can initiate AR,
moreover, a tripping contact from external device can be connected to the device via opto-coupler
input to initiate integrated AR function.

When external auto-reclosure is used, the device can output some configurable output to initiate
external AR, such as, contact of initiating AR, phase-segregated tripping contact, single-phase
tripping contact, three-phase tripping contact and contact of blocking AR. According to
requirement, these contacts can be selectively connected to external auto-reclosure device to
initiate AR.

For phase-segregated circuit breaker, AR mode can be 1-pole AR for single-phase fault and
3-pole AR for multi-phase fault, or always 3-pole AR for any kinds of fault according to system
requirement. For persistent fault or multi-shot AR number preset value is reached, the device will
send final tripping command. The device will provide appropriate tripping command based on
faulty phase selection if adopting 1-pole AR.

AR can be enabled or disabled by logic setting or external signal via binary input. When AR is
enabled, the device will output contact [CBx.79.On], otherwise, output contact [CBx.79.Off]. After
some reclosing conditions, such as, CB position, CB pressure and so on, is satisfied, the device
will output contact [CBx.79.Ready].

According to requirement, the device can be set as one-shot or multi-shot AR. When adopting
multi-shot AR, the AR mode of first time reclosing can be set as 1-pole AR, 3-pole AR or 1/3-pole
AR. The rest AR mode is only 3-pole AR and its number is determined by the maximum 3-pole
reclosing number.

For one-shot AR or first reclosing of multi-shot AR, AR mode can be selected by logic setting
[CBx.79.En_1PAR], [CBx.79.En_3PAR] and [CBx.79.En_1P/3PAR] or external signal via binary
inputs. When 3-pole or 1/3-pole AR mode is selected, the following three types of check modes

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can be selected: dead charge check, synchronism check and no check.

3.26.3 Function Block Diagram

79

CBx.79.En CBx.79.On

CBx.79.Blk CBx.79.Off

CBx.79.Sel_1PAR CBx.79.Close

CBx.79.Sel_3PAR CBx.79.Ready

CBx.79.Sel_1P/3PAR CBx.79.AR_Blkd

CBx.79.Trp CBx.79.Active

CBx.79.Trp3P CBx.79.Inprog

CBx.79.TrpA CBx.79.Inprog_1P

CBx.79.TrpB CBx.79.Inprog_3P

CBx.79.TrpC CBx.79.Inprog_3PS1

CBx.79.LockOut CBx.79.Inprog_3PS2

CBx.79.PLC_Lost CBx.79.Inprog_3PS3

CBx.79.WaitMaster CBx.79.Inprog_3PS4

CBx.79.CB_Healthy CBx.79.WaitToSlave

CBx.79.Clr_Counter CBx.79.Perm_Trp1P

CBx.79.Ok_Chk CBx.79.Perm_Trp3P

CBx.79.Ok_3PLvChk CBx.79.Rcls_Status

CBx.79.Fail_Rcls

CBx.79.Succ_Rcls

CBx.79.Fail_Chk

CBx.79.Mode_1PAR

CBx.79.Mode_3PAR

CBx.79.Mode_1/3PAR

3.26.4 I/O Signals


Table 3.26-1 I/O signals of auto-reclosing

No. Input Signal Description


Binary input for enabling AR. If the logic setting [79.En_ExtCtrl]=1,
1 CBx.79.En
enabling AR will be controlled by the external signal via binary input

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Binary input for disabling AR. If the logic setting [79.En_ExtCtrl]=1,


2 CBx.79.Blk
disabling AR will be controlled by the external input
Input signal for selecting 1-pole AR mode of corresponding circuit
3 CBx.79.Sel_1PAR
breaker
Input signal for selecting 3-pole AR mode of corresponding circuit
4 CBx.79.Sel_3PAR
breaker
Input signal for selecting 1/3-pole AR mode of corresponding circuit
5 CBx.79.Sel_1P/3PAR
breaker
6 CBx.79.Trp Input signal of single-phase tripping from line protection to initiate AR
7 CBx.79.Trp3P Input signal of three-phase tripping from line protection to initiate AR
8 CBx.79.TrpA Input signal of A-phase tripping from line protection to initiate AR
9 CBx.79.TrpB Input signal of B-phase tripping from line protection to initiate AR
10 CBx.79.TrpC Input signal of C-phase tripping from line protection to initiate AR
Input signal of blocking reclosing, usually it is connected with the
11 CBx.79.LockOut operating signals of definite-time protection, transformer protection
and busbar differential protection, etc.
12 CBx.79.PLC_Lost Input signal of indicating the alarm signal that signal channel is lost
Input signal of waiting for reclosing permissive signal from master
13 CBx.79.WaitMaster
AR (when reclosing multiple circuit breakers)
The input for indicating whether circuit breaker has enough energy to
14 CBx.79.CB_Healthy
perform the close function
15 CBx.79.Clr_Counter Clear the reclosing counter
16 CBx.79.Ok_Chk Synchrocheck condition of AR is met
17 CBx.79.Ok_3PLvChk Live three-phase check condition of AR is met
No. Output Signal Description
1 CBx.79.On Automatic reclosure is enabled
2 CBx.79.Off Automatic reclosure is disabled
3 CBx.79.Close Output of auto-reclosing signal
4 CBx.79.Ready Automatic reclosure have been ready for reclosing cycle
5 CBx.79.AR_Blkd Automatic reclosure is blocked
6 CBx.79.Active Automatic reclosing logic is actived
7 CBx.79.Inprog Automatic reclosing cycle is in progress
8 CBx.79.Inprog_1P The first 1-pole AR cycle is in progress
9 CBx.79.Inprog_3P 3-pole AR cycle is in progress
10 CBx.79.Inprog_3PS1 First 3-pole AR cycle is in progress
11 CBx.79.Inprog_3PS2 Second 3-pole AR cycle is in progress
12 CBx.79.Inprog_3PS3 Third 3-pole AR cycle is in progress
13 CBx.79.Inprog_3PS4 Fourth 3-pole AR cycle is in progress
Waiting signal of automatic reclosing which will be sent to slave
14 CBx.79.WaitToSlave
(when reclosing multiple circuit breakers)
Single-phase circuit breaker will be tripped once protection device
15 CBx.79.Perm_Trp1P
operates
16 CBx.79.Perm_Trp3P Three-phase circuit breaker will be tripped once protection device

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operates
Automatic reclosure status
0: AR is ready.
17 CBx.79.Rcls_Status
1: AR is in progress.
2: AR is successful.
18 CBx.79.Fail_Rcls Auto-reclosing fails
19 CBx.79.Succ_Rcls Auto-reclosing is successful
20 CBx.79.Fail_Chk Synchrocheck for AR fails
21 CBx.79.Mode_1PAR Output of 1-pole AR mode
22 CBx.79.Mode_3PAR Output of 3-pole AR mode
23 CBx.79.Mode_1/3PAR Output of 1/3-pole AR mode
Automatic reclosure counter
24 CBx.79.N_Total_Rcls Recorded number of all reclosing attempts
25 CBx.79.N_1PS1 Recorded number of first 1-pole reclosing attempts
26 CBx.79.N_3PS1 Recorded number of first 3-pole reclosing attempts
27 CBx.79.N_3PS2 Recorded number of second 3-pole reclosing attempts
28 CBx.79.N_3PS3 Recorded number of third 3-pole reclosing attempts
29 CBx.79.N_3PS4 Recorded number of fourth 3-pole reclosing attempts

3.26.5 Logic

3.26.5.1 AR Ready

For the first reclosing of multi-shot AR, AR mode can be 1-pole AR or 3-pole AR, however, the
selection is valid only to the first reclosing, after that it can only be 3-pole AR. When logic setting
[CBx.79.SetOpt] is set as “1”, AR mode is determined by logic settings. When logic setting
[CBx.79.SetOpt] is set as “0”, AR mode is determined by external signal via binary inputs.

An auto-reclosure must be ready to operate before performing reclosing. The output signal
[CBx.79.Ready] means that the auto-reclosure can perform at least one time of reclosing function,
i.e., breaker open-close-open.

When the device is energized or after the settings are modified, AR can not be ready unless the
following conditions are met:

1. AR function is enabled.

2. The circuit breaker is ready, such as, normal storage energy and no low pressure signal.

3. The duration of the circuit breaker in closed position before fault occurrence is not less than
the setting [CBx.79.t_CBClsd].

4. There is no block signal of auto-reclosing.

After the auto-reclosure operates, the auto-reclosure must reset, i.e., [CBx.79.Active]=0, in
addition to the above conditions for reclosing again.

When there is a fault on an overhead line, the concerned circuit breakers will be tripped normally.
After fault is cleared, the tripping command will drop off immediately. In case the circuit breaker is

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in failure, etc., and the tripping signal of the circuit breaker maintains and in excess of the time
delay [CBx.79.t_PersistTrp], AR will be blocked, as shown in Figure 3.26-1.

SIG Any tripping signal [CBx.79.t_PersistTrp] 0ms


>=1
SIG CBx.79.LockOut 0ms [CBx.79.t_DDO_BlkAR] >=1
CBx.79.AR_Blkd
SIG 1-pole AR Initiation [CBx.79.t_SecFault] 0ms &
SIG Any tripping signal

EN [CBx.79.En_PDF_Blk]

SIG CBx.79.Sel_1PAR &


&
EN [CBx.79.N_Rcls]=1

SIG Three phase trip >=1


SIG Phase A open &

SIG Phase B open

& >=1

&

SIG Phase C open

Figure 3.26-1 Logic diagram of AR block

The input signal [CBx.79.CB_Healthy] must be energized before auto-reclosure gets ready.
Because most circuit breakers can finish one complete process: open-closed-open, it is necessary
that circuit breaker has enough energy before reclosing. When the time delay of AR is exhausted,
AR will be blocked if the input signal [CBx.79.CB_Healthy] is still not energized within time delay
[CBx.79.t_CBReady]. If this function is not required, the input signal [CBx.79.CB_Healthy] can be
not to configure, and its state will be thought as “1” by default.

In orde to block AR reliably even if the signal of manually open circuit breaker not connected to the
input of blocking AR, when the circuit breaker is open by manually and there is CB position input
under normal conditions, AR will be blocked with the time delay of 100ms if AR is not initated and
no any trip signal.

When auto-reclosure is blocked, auto-reclosing failure, synchrocheck failure or last shot is


reached, or when the internal blocking condition of AR is met (such as, zone 3 of distance
protection operates, the device operates for multi-phase fault, three-phase fault and so on. These
flags of blocking AR have been configured in the device, additional configuration is not required.),
auto-reclosure will be discharged immediately and next auto-reclosing will be disabled.

When the input signal [CBx.79.LockOut] is energized, auto-reclosure will be blocked immediately.
The blocking flag of AR will be also controlled by the internal blocking condition of AR. When the
blocking flag of AR is valid, auto-reclosure will be blocked immediately. The logic of AR ready is
shown in Figure 3.26-2.

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>=1
SIG 3 CB closed [CBx.79.t_CBClsd] 100ms &
SIG CBx.79.Active >=1

SIG Any tripping signal


& &
100ms 0 CBx.79.Ready
SIG CBx.79.Inprog

SIG [CBx.79.CB_Healthy] 0ms [CBx.79.t_CBReady] &


SIG CBx.79.AR_Blkd >=1
>=1
SIG CBx.TRP.BlkAR &
SIG CBx.79.Fail_Rcls
>=1
SIG CBx.79.Fail_Chk

SIG Last shot is made

EN [CBx.79.En] &
>=1
EN [CBx.79.En_ExtCtrl] CBx.79.On

&
SIG CBx.79.En &

SIG CBx.79.Blk

Figure 3.26-2 Logic diagram of AR ready

When a fault occurs under pole disagreement condition, blocking AR can be enabled or disabled.
The time delay [CBx.79.t_SecFault] is used to discriminate another fault which begins after 1-pole
AR initiated. AR will be blocked if another fault happens after this time delay if the logic setting
[CBx.79.En_PDF_Blk] is set as “1”, and 3-pole AR will be initiated if [CBx.79.En_PDF_Blk] is set
as “1”.

AR will be blocked immediately once the blocking condition of AR appears, but the blocking
condition of AR will drop off with a time delay [CBx.79.t_DDO_BlkAR] after blocking signal
disappears.

When one-shot and 1-pole AR is enabled, auto-reclosure will be blocked immediately if there are
binary inputs of multi-phase CB position is energized.

When any protection element operates to trip, the device will output a signal [CBx.79.Active] until
AR drop off (Reset Command). Any tripping signal can be from external protection device or
internal protection element.

AR function can be enabled by internal logic settings of AR mode or external signal via binary
inputs in addition to internal logic setting [CBx.79.En]. When logic setting [CBx.79.En_ExtCtrl] is
set as “1”, AR enable are determined by external signal via binary inputs and logic settings. When
logic setting [CBx.79.En_ExtCtrl] set as “0”, AR enable are determined only by logic settings.

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For one-shot reclosing, if 1-pole AR mode is selected, auto-reclosure will reset when there is
three-phase tripping signal or input signal of multi-phase open position.

Figure 3.26-3 Logic diagram of tripping condition output

When AR is enabled, the device will output the signal [CBx.79.Perm_Trp3P] if AR is not ready, or
AR mode is set as 3-Pole AR, or another fault occurs after the circuit breaker is open.

3.26.5.2 AR Initiation

AR mode can be selected by external signal via binary inputs or internal logic settings. If the logic
setting [CBx.79.SetOpt] set as “1”, AR mode is determined by the internal logic settings. If the logic
settings [CBx.79.SetOpt] set as “0”, AR mode is determined by the external inputs.

1. AR initiated by tripping signal of line protection

AR can be initiated by tripping signal of line protection, and the tripping signal may be from internal
trip signal or external trip signal.

When selecting 1-pole AR or 1/3-pole AR, line single-phase fault will trigger 1-pole AR. When AR
is ready to reclosing (“CBx.79.Ready”=1) and the single-phase tripping command is received, this
single-phase tripping command will be kept in the device, and 1-pole AR will be initiated after the
single-phase tripping command drops off. The single-phase tripping command kept in the device
will be cleared after the completion of auto-reclosing sequence (Reset Command). Its logic is
shown in Figure 3.26-4.

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Figure 3.26-4 Single-phase tripping initiating AR

When selecting 3-pole AR or 1/3-pole AR, three-phase tripping will trigger 3-pole AR. When AR is
ready to reclosing (“CBx.79.Ready”=1) and the three-phase tripping command is received, this
three-phase tripping command will be kept in the device, and 3-pole AR will be initiated after the
three-phase tripping command drops off. The three-phase tripping command kept in the device will
be cleared after the completion of auto-reclosing sequence (Reset Command). Its logic is shown
in Figure 3.26-5.

Figure 3.26-5 Three-phase tripping initiating AR

2. AR initiated by CB state

A logic setting [CBx.79.En_CBInit] is available for selection that AR is initiated by CB state. Under
normal conditions, when AR is ready to reclosing (“CBx.79.Ready”=1), AR will be initiated if circuit
breaker is open and corresponding phase current is nil. AR initiated by CB state can be divided
into initiating 1-pole AR and 3-pole AR, their logics are shown in Figure 3.26-6 and Figure 3.26-7
respectively. Usually normally closed contact of circuit breaker is used to reflect CB state.

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Figure 3.26-6 1-pole AR initiation

Figure 3.26-7 3-pole AR initiation

3.26.5.3 AR Reclosing

After AR is initiated, the device will output the initiating contact of AR. For 1-pole AR, in order to
prevent pole discrepancy protection from maloperation under pole discrepancy conditions, the
contact of “1-pole AR initiation” can be used to block pole discrepancy protection.

When the dead time delay of AR expires after AR is initiated, as for 1-pole AR, when the setting
[CBx.25.En_3PLvChk] is set as “0”, the result of synchronism check will not be judged, and
reclosing command will be output directly. When the setting [CBx.25.En_3PLvChk] is set as “1”,
the reclosing is not permissible unless live three-phase check is met. As far as the 3-pole AR, if the
synchronism check is enabled, the release of reclosing command shall be subject to the result of
synchronism check. After the dead time delay of AR expires, if the synchronism check is still
unsuccessful within the time delay [CBx.79.t_wait_Chk], the signal of synchronism check failure
(CBx.79.Fail_Syn) will be output and the AR will be blocked. If 3-pole AR with no-check is enabled,
the condition of synchronism check success (CBx.25.Ok_Chk) will always be established. And the
signal of synchronism check success (CBx.25.Ok_Chk) from the synchronism check logic can be
applied by auto-reclosing function inside the device or external auto-reclosure device.

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Figure 3.26-8 One-shot AR

In the process of channel abnormality, an internal fault occurs on the transmission line, backup
protection at both ends of line will operate to trip the circuit breaker of each end. The operation
time of backup protection at both ends of the line is possibly non-accordant, whilst the time delay
of AR needs to consider the arc-extinguishing and insulation recovery ability for transient fault, so
the time delay of AR shall be considered comprehensively according to the operation time of the
device at both ends. When the communication channel of main protection is abnormal (input
signal [CBx.79.PLC_Lost] is energized), and the logic setting [CBx.79.En_AddDly] is set as “1”,
then the dead time delay of AR shall be equal to the original dead time delay of AR plus the extra
time delay [CBx.79.t_AddDly], so as to ensure the recovery of insulation intensity of fault point
when reclosing after transient fault. This extra time delay [CBx.79.t_AddDly] is only valid for the
first shot AR.

>=1

SIG Any tripping signal &

SIG CBx.79.PLC_Lost
&

SIG CBx.79.Active
&
Extend AR time
EN [CBx.79.En_AddDly]

Figure 3.26-9 Extra time delay of AR

Reclosing pulse length may be set through the setting [CBx.79.t_PW_AR]. For the circuit breaker
without anti-pump interlock, a logic setting [CBx.79.En_CutPulse] is available to control the
reclosing pulse. When this function is enabled, if the device operates to trip during reclosing, the

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reclosing pulse will drop off immediately, so as to prevent multi-shot reclosing onto fault. After the
reclosing command is issued, AR will drop off with time delay [CBx.79.t_Reclaim], and can carry
out next reclosing.

SIG WaitMasterValid &


0ms 50ms
SIG AR Pulse >=1
0ms [CBx.79.t_PW_AR] & CBx.79.AR_Out

SIG Single-phase Trip >=1

SIG Three-phase Trip &

EN [CBx.79.En_CutPulse]

>=1
&
SIG CBx.79.AR_Out [CBx.79.t_Reclaim] 0ms Reset Command

Figure 3.26-10 Reclosing output logic

The reclaim timer defines a time from the issue of the reclosing command, after which the
reclosing function resets. Should a new trip occur during this time, it is treated as a continuation of
the first fault. The reclaim timer is started when the CB closing command is given.

Figure 3.26-11 Wait to slave signal

The output signal “CBx.79.WaitToSlave” is usually configured to the signal “CBx.79.WaitMaster” of


slave AR. Slave AR is permissible to reclosing only if master AR is reclosed successfully.

3.26.5.4 Reclosing Failure and Success

For transient fault, the fault will be cleared after the device operates to trip. After the reclosing
command is issued, AR will drop off after time delay [CBx.79.t_Reclaim], and can carry out next
reclosing. When the reclosing is unsuccessful or the reclosing condition is not met after AR
initiated, the reclosing will be considered as unsuccessful, including the following cases.

1. If any protection element operates to trip when AR is enabled ([CBx.79.On]=1) and AR is not
ready ([CBx.79.Ready]=0), the device will output the signal (CBx.79.Fail_Rcls).

2. For one-shot AR, if the tripping command is received again within reclaim time after the

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reclosing pulse is issued, the reclosing shall be considered as unsuccessful.

3. For multi-shot AR, if the reclosing times are equal to the setting value of AR number and the
tripping command is received again after the last reclosing pulse is issued, the reclosing shall
be considered as unsuccessful.

4. The logic setting [CBx.79.En_FailCheck] is available to judge whether the reclosing is


successful by CB state, when it is set as “1”. If CB is still in open position with a time delay
[CBx.79.t_Fail] after the reclosing pulse is issued, the reclosing shall be considered as
unsuccessful. For this case, the device will issue a signal (CBx.79.Fail_Rcls) to indicate that
the reclosing is unsuccessful, and this signal will drop off after (Reset Command). AR will be
blocked if the reclosing shall be considered as unsuccessful.

SET [CBx.79.Opt_Priority]=Low &


WaitMaster Valid
SIG CBx.79.WaitMaster

SIG CBx.79.On
&
SIG CBx.79.Ready

SIG Any tripping command & >=1


0ms 200ms >=1
SIG Last shot is made CBx.79.Fail_Rcls

SIG CBx.79.Inprog &

SIG CBx.79.AR_Blkd

SIG WaitMasterValid &


[CBx.79.t_WaitMaster] 0ms

>=1
&
SIG AR Pulse [CBx.79.t_Fail] 0ms &
SIG 3 CB closed

EN [CBx.79.En_FailCheck] &
& CBx.79.Succ_Rcls

0ms [CBx.79.t_Fail]

Figure 3.26-12 Reclosing failure and success

After unsuccessful AR is confirmed, AR will be blocked. AR will not enter into the ready state
unless the circuit breaker position drops off , and can only begin to enter into the ready state again
after the circuit breaker is closed.

3.26.5.5 Reclosing Numbers Control

The device may be set up into one-shot or multi-shot AR. Through the setting [CBx.79.N_Rcls],
the maximum number of reclosing attempts may be set up to 4 times. Generally, only one-shot AR
is selected. Some corresponding settings may be hidden if one-shot AR is selected.

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1. 1-pole AR

[CBx.79.N_Rcls]=1 means one-shot reclosing. For one-shot 1-pole AR mode, 1-pole AR will be
initiated only for single-phase fault and respective faulty phase selected, otherwise, AR will be
blocked. For single-phase transient fault on the line, line protection device will operate to trip and
1-pole AR is initiated. After the dead time delay for 1-pole AR is expired, the device will send
reclosing pulse, and then the auto-reclosure will drop off after the time delay [CBx.79.t_Reclaim] to
ready for the next reclosing. For permanent fault, the device will operate to trip again after the
reclosing is performed, and the device will output the signal of reclosing failure [CBx.79.Fail_Rcls].

[CBx.79.N_Rcls]>1 means multi-shot reclosing. For multi-shot reclosing in 1-pole AR mode, the
first reclosing is 1-pole AR, and the subsequent reclosing can only be 3-pole AR. For single-phase
transient fault on the line, line protection device will operate to trip and then 1-pole AR is initiated.
After the dead time delay of the first reclosing is expired, the device will send reclosing pulse, and
then the auto-reclosure will drop off after the time delay [CBx.79.t_Reclaim] to ready for the next
reclosing. For permanent fault, the device will operate to trip again after the reclosing is performed,
and then 3-pole AR is initiated. At this time, the time delay applies the setting [CBx.79.t_Dd_3PS2].
After the time delay is expired, if the reclosing condition is met, the device will send reclosing pulse.
The sequence is repeated until the reclosing is successful or the maximum permit reclosing
number [CBx.79.N_Rcls] is reached. If the first fault is multi-phase fault, the device operates to trip
three-phase and initiate 3-pole AR. At this time, the time delay applies the setting
[CBx.79.t_Dd_3PS1]. For the possible reclosing times of 3-pole AR in 1-pole AR mode, please
refer to Figure 3.26-13.

2. 3-pole AR

[CBx.79.N_Rcls]=1 means one-shot reclosing. For one-shot 3-pole AR mode, line protection
device will operate to trip when a transient fault occurs on the line and 3-pole AR will be initiated.
After the dead time delay for 3-pole AR is expired, the device will send reclosing pulse, and then
the auto-reclosure will drop off after the time delay [CBx.79.t_Reclaim] to ready for the next
reclosing. For permanent fault, the device will operate to trip again after the reclosing is performed,
and the device will output the signal of reclosing failure [CBx.79.Fail_Rcls].

[CBx.79.N_Rcls]>1 means multi-shot reclosing. For multi-shot reclosing in 3-pole AR mode, line
protection device will operate to trip when a transient fault occurs on the line and 3-pole AR will be
initiated. After the dead time delay of the first reclosing is expired, the device will send reclosing
pulse, and then the auto-reclosure will drop off after the time delay [CBx.79.t_Reclaim] to ready for
the next reclosing. For permanent fault, the device will operate to trip again after the reclosing is
performed, and then 3-pole AR is initiated after the tripping contact drops off. After the time delay
for AR is expired, the device will send reclosing pulse. The sequence is repeated until the
reclosing is successful or the maximum permit reclosing number [CBx.79.N_Rcls] is reached.

3. 1/3-pole AR

[CBx.79.N_Rcls]=1 means one-shot reclosing. For one-shot 1/3-pole AR mode, line protection
device will operate to trip when a transient fault occurs on the line and 1-pole AR will be initiated
for single-phase fault and 3-pole AR will be initiated for multi-phase fault. After respective dead
time delay for AR is expired, the device will send reclosing pulse, and then the auto-reclosure will

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drop off after the time delay [CBx.79.t_Reclaim] to ready for the next reclosing. For permanent
fault, the device will operate to trip again after the reclosing is performed, and the device will
output the signal of reclosing failure [CBx.79.Fail_Rcls].

[CBx.79.N_Rcls]>1 means multi-shot reclosing. For multi-shot reclosing in 1/3-pole AR mode, line
protection device will operate to trip when a transient fault occurs on the line and AR will be
initiated. After the dead time delay of the first reclosing is expired, the device will send reclosing
pulse, and then the auto-reclosure will drop off after the time delay [CBx.79.t_Reclaim] to ready for
the next reclosing. For permanent fault, the device will operate to trip again after the reclosing is
performed, and then 3-pole AR is initiated after the tripping contact drops off. After the time delay
for AR is expired, the device will send reclosing pulse. The sequence is repeated until the
reclosing is successful or the maximum permit reclosing number [CBx.79.N_Rcls] is reached. For
the possible reclosing times of 3-pole AR in 1/3-pole AR mode, please refer to Figure 3.26-14.

The table below shows the number of reclose attempts with respect to the settings and AR modes.

Table 3.26-2 Reclosing number

1-pole AR 3-pole AR 1/3-pole AR


Setting Value
N-1AR N-3AR N-1AR N-3AR N-1AR N-3AR
1 1 0 0 1 1 1
2 1 1 0 2 1 2
3 1 2 0 3 1 3
4 1 3 0 4 1 4

N-1AR: the reclosing number of 1-pole AR

N-3AR: the reclosing number of 3-pole AR

4. Coordination between dual auto-reclosures

Duplicated protection configurations are normally applied for UHV lines. If reclosing function is
integrated within line protections, the auto-reclosing function can be enabled in any or both of the
line protections without coordination.

If both sets of reclosing functions are enabled, when one of them first recloses onto a permanent
fault, the other will block the reclosing pulse according to the latest condition of the faulty phase.
For one-shot AR mode, if the current is detected in the faulty phase, AR will be blocked
immediately to prevent the circuit breaker from repetitive reclosing. For multi-shot AR mode, if the
current is detected in the faulty phase, the current reclosing pulse will be blocked and go into the
next reclosing pulse logic automatically. If the maximum permitted reclosing number
[CBx.79.N_Rcls] is reached, the auto-reclosure will drop off after the time delay
[CBx.79.t_Reclaim].

For one-shot or multi-shot AR, there is a corresponding reclosing counter at each stage. After
reclosing pulse is sent, the corresponding reclosing counter will plus 1 and the reclosing counter
may be cleared by the submenu “Clear Counter”. If the circuit breaker is reclosed by other
devices during AR initiation, the auto-reclosure will go into the next reclosing pulse logic.

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3.26.5.6 AR Time Sequence Diagram

The following two examples indicate typical time sequence of AR process for transient fault and
permanent fault respectively.

Signal

Fault

Trip

CB 52b
Open
CBx.79.t_Reclaim [CBx.79.t_Reclaim]

CBx.79.Active

CBx.79.Inprog [CBx.79.t_Dd_1PS1]

CBx.79.Inprog_1P [CBx.79.t_Dd_1PS1]

CBx.79.Ok_Chk

AR Out [CBx.79.t_PW_AR]

CBx.79.Perm_Trp3P

CBx.79.Fail_Rcls

Time

Figure 3.26-13 Single-phase transient fault

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Signal

Fault

Trip

Open Open
52b

CBx.79.t_Reclaim [CBx.79.t_Reclaim]

CBx.79.Active

CBx.79.Inprog

CBx.79.Inprog_1P [CBx.79.t_Dd_1PS1]

CBx.79.Inprog_3PS2 [CBx.79.t_Dd_3PS2]

CBx.79.Ok_Chk

AR Out [CBx.79.t_PW_AR] [CBx.79.t_PW_AR]

CBx.79.Perm_Trp3P

CBx.79.Fail_Rcls 200ms

Time

Figure 3.26-14 Single-phase permanent fault ([CBx.79.N_Rcls]=2)

3.26.6 Settings
Table 3.26-3 Auto-reclosing settings

No. Name Range Step Unit Remark


Maximum number of reclosing
1 CBx.79.N_Rcls 1~4 1
attempts
Dead time of first shot 1-pole
2 CBx.79.t_Dd_1PS1 0.000~600.000 0.001 s
reclosing
Dead time of first shot 3-pole
3 CBx.79.t_Dd_3PS1 0.000~600.000 0.001 s
reclosing
Dead time of second shot 3-pole
4 CBx.79.t_Dd_3PS2 0.000~600.000 0.001 s
reclosing
Dead time of third shot 3-pole
5 CBx.79.t_Dd_3PS3 0.000~600.000 0.001 s
reclosing
Dead time of fourth shot 3-pole
6 CBx.79.t_Dd_3PS4 0.000~600.000 0.001 s
reclosing
Time delay of circuit breaker in
7 CBx.79.t_CBClsd 0.000~600.000 0.001 s
closed position before reclosing
Time delay to wait for CB healthy,
8 CBx.79.t_CBReady 0.000~600.000 0.001 s
and begin to timing when the input

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signal [79.CB_Healthy] is
de-energized and if it is not
energized within this time delay, AR
will be blocked.
Maximum wait time for synchronism
9 CBx.79.t_Wait_Chk 0.000~600.000 0.001 s
check
Time delay allow for CB status
10 CBx.79.t_Fail 0.000~600.000 0.001 s change to conform reclosing
successful

11 CBx.79.t_PW_AR 0.000~600.000 0.001 s Pulse width of AR closing signal

12 CBx.79.t_Reclaim 0.000~600.000 0.001 s Reclaim time of AR

Time delay of excessive trip signal to


13 CBx.79.t_PersistTrp 0.000~600.000 0.001 s
block auto-reclosing
Drop-off time delay of blocking AR,
when blocking signal for AR
14 CBx.79.t_DDO_BlkAR 0.000~600.000 0.001 s
disappears, AR blocking condition
drops off after this time delay
Additional time delay for
15 CBx.79.t_AddDly 0.000~600.000 0.001 s
auto-reclosing
Maximum wait time for reclosing
16 CBx.79.t_WaitMaster 0.000~600.000 0.001 s
permissive signal from master AR
Time delay of discriminating another
fault, and begin to times after 1-pole
AR initiated, 3-pole AR will be
17 CBx.79.t_SecFault 0.000~600.000 0.001 s initiated if another fault happens
during this time delay. AR will be
blocked if another fault happens
after that.
Enabling/disabling auto-reclosing
blocked when a fault occurs under
18 CBx.79.En_PDF_Blk 0 or 1 pole disagreement condition
0: disable
1: enable
Enabling/disabling auto-reclosing
with an additional dead time delay
19 CBx.79.En_AddDly 0 or 1
0: disable
1: enable
Enabling/disabling adjust the length
of reclosing pulse
20 CBx.79.En_CutPulse 0 or 1
0: disable
1: enable
Enabling/disabling confirm whether
21 CBx.79.En_FailCheck 0 or 1
AR is successful by checking CB

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state
0: disable
1: enable
Enabling/disabling auto-reclosing
22 CBx.79.En 0 or 1 0: disable
1: enable
Enabling/disabling AR by external
input signal besides logic setting
[79.En]
23 CBx.79.En_ExtCtrl 0 or 1
0: only logic setting
1: logic setting and external input
signal
Enabling/disabling AR be initiated by
open state of circuit breaker
24 CBx.79.En_CBInit 0 or 1
0: disable
1: enable
Option of AR priority
None: single-breaker arrangement
None, High or High: master AR of multi-breaker
25 CBx.79.Opt_Priority
Low arrangement
Low: slave AR of multi-breaker
arrangement
Control option of AR mode
1: select AR mode by internal logic
26 CBx.79.SetOpt 0 or 1 settings
0: select AR mode by external input
signals
Enabling/disabling 1-pole AR mode
27 CBx.79.En_1PAR 0 or 1 0: disable
1: enable
Enabling/disabling 3-pole AR mode
28 CBx.79.En_3PAR 0 or 1 0: disable
1: enable
Enabling/disabling 1/3-pole AR
mode
29 CBx.79.En_1P/3PAR 0 or 1
0: disable
1: enable

3.27 Transfer Trip


3.27.1 General Application
This function module provides a binary input [TT.Init] for receiving transfer trip from the remote end.
This feature ensures simultaneous tripping at both ends.

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3.27.2 Function Description


Transfer trip can be controlled by local fault detector by logic settings [TT.En_FD_Ctrl]. In addition,
the binary input [TT.Init] is always supervised, and the device will issue an alarm [TT.Alm] and
block transfer trip once the binary input is energized for longer than 4s and drop off after resumed
to normal with a time delay of 10s.

3.27.3 Function Block Diagram

TT

TT.Init TT.Alm

TT.En TT.Op

TT.Blk TT.On

3.27.4 I/O Signals


Table 3.27-1 I/O signals of transfer trip

No. Input Signal Description


1 TT.Init Input signal of initiating transfer trip after receiving transfer trip
Transfer trip enabling input, it is triggered from binary input or programmable logic
2 TT.En
etc.
Transfer trip blocking input, it is triggered from binary input or programmable logic
3 TT.Blk
etc.
No. Output Signal Description
1 TT.Alm Input signal of receiving transfer trip is abnormal
2 TT.Op Transfer trip operates
3 TT.On Transfer trip is enabled

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3.27.5 Logic

Figure 3.27-1 Logic diagram of transfer trip

3.27.6 Settings
Table 3.27-2 Settings of transfer trip

No. Name Range Step Unit Remark


1 TT.t_Op 0.000~600.000 0.001 s Time delay of transfer trip
Transfer trip controlled by local fault detector
element
2 TT.En_FD_Ctrl 0 or 1 0: not controlled by local fault detector
element
1: controlled by local fault detector element

3.28 Trip Logic


3.28.1 General Application
For any enabled protection tripping elements, their operation signal will convert to appropriate
tripping signals through trip logics and then trigger output contacts by configuration.

Note!

For double circuit breakers mode, the device will provide indenpendent trip logic for CB1
and CB2 respectively. Both trip logics have the same logic.The difference is that the prefix
“CBx.” is added to all signals for circuit breaker No.x (x=1 or 2). For trip logic settings, only
the setting [En_Trp3P] will be added the prefix “CBx.” for circuit breaker No.x, which
means that both circuit breakers corresponding to the same line protection can be set
different trip mode.

3.28.2 Function Description


This module gathers signals from phase selection and protection tripping elements and then
converts the operation signal from protection tripping elements to appropriate tripping signals.

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The device can implement phase-segregated tripping or three-phase tripping, and may output the
contact of blocking AR and the contact of initiating breaker failure protection.

3.28.3 Function Block Diagram

TRP

CBx.TRP.En CBx.TrpA

CBx.TRP.Blk CBx.TrpB

Faulty phase selection CBx.TrpC

CBx.PrepTrp3P CBx.Trp

Line tripping element CBx.Trp3P

Breaker tripping element CBx.BFI_A

Initiating BFP element CBx.BFI_B

CBx.BFI_C

CBx.BFI

CBx.Trp3P_PSFail

CBx.TRP.BlkAR

CBx.TRP.On

3.28.4 I/O Signals


Table 3.28-1 I/O signals of trip logic

No. Input Signal Description


Trip enabling input, it is triggered from binary input or programmable
1 CBx.TRP.En
logic etc.

Trip blocking input, it is triggered from binary input or programmable


2 CBx.TRP.Blk
logic etc.
Faulty phase selection (phase The result of fault phase selection
3
A, phase B, phase C) If multi-phase is selected, three-phase breakers will be tripped.
Input signal of permitting three-phase tripping
4 CBx.PrepTrp3P When this signal is valid, three-phase tripping will be adopted for any
kind of faults.
All operation signals of various line protection tripping elements, such
5 Line tripping element
as distance protection, overcurrent protection, etc.
All protection tripping elements concerned with breaker, such as pole
6 Breaker tripping element
discrepancy protection, etc.
Tripping element to initiate BFP, except undervoltage protection,
7 Initiating BFP element
tripping elements of all protections initiate BFP

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No. Output Signal Description


1 CBx.TRP.On Tripping logic is enabled.
2 CBx.TrpA Tripping A-phase circuit breaker
3 CBx.TrpB Tripping B-phase circuit breaker
4 CBx.TrpC Tripping C-phase circuit breaker
5 CBx.Trp Tripping any phase circuit breaker
6 CBx.Trp3P Tripping three-phase circuit breaker
Protection tripping signal of A-phase configured to initiate BFP, BFI
7 CBx.BFI_A
signal shall be reset immediately after tripping signal drops off.
Protection tripping signal of B-phase configured to initiate BFP, BFI
8 CBx.BFI_B
signal shall be reset immediately after tripping signal drops off.
Protection tripping signal of C-phase configured to initiate BFP, BFI
9 CBx.BFI_ C
signal shall be reset immediately after tripping signal drops off.
Protection tripping signal configured to initiate BFP, BFI signal shall be
10 CBx.BFI
reset immediately after tripping signal drops off.
11 CBx.Trp3P_PSFail Initiating three-phase tripping due to failure in fault phase selection
12 CBx.TRP.BlkAR Blocking auto-reclosing

3.28.5 Logic
After tripping signal is issued, the tripping pulse will be kept as same as the setting [t_Dwell_Trp] at
least. When the time delay is expired, for phase-segregated tripping, the tripping signal will drop
off immediately if the faulty current of corresponding phase is less than 0.06In (In is secondary
rated current), otherwise the tripping signal will be always kept until the faulty current of
corresponding phase is less than 0.06In. For three-phase tripping, the tripping signal will drop off
immediately if three-phase currents are all less than 0.06In, otherwise the tripping signal will be
always kept until three-phase currents are all less than 0.06In.

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& >=1
SIG FPS (phase A) &

& >=1
SIG FPS (phase B) &

& >=1
SIG FPS (phase C) &

SIG Line tripping element

SIG CBx.TRP.En &


CBx.TRP.On
SIG CBx.TRP.Blk

SIG Breaker tripping element


&

SIG CBx.PrepTrp3P >=1 >=1


&
EN [CBX.En_3PTrp]

SIG CBx.Trp

SIG Line tripping element & >=1


SIG FPS (phase A) &

SIG FPS (phase B) & >=1

SIG FPS (phase C) &

CBx.Trp3P_PSFail

>=1
&
200ms 0ms
SIG Line tripping element
&
SIG CBx.TrpA [t_Dwell_Trp] 0 & CBx.TrpA

SIG Ia<0.06In
&
SIG CBx.TrpB [t_Dwell_Trp] 0 & CBx.TrpB

SIG Ib<0.06In
&
SIG CBx.TrpC [t_Dwell_Trp] 0 & CBx.TrpC

SIG Ic<0.06In

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Figure 3.28-1 Tripping logic

Figure 3.28-2 Breaker failure initiation logic

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SIG 85-1.Op_DEF >=1

SIG 85-2.Op_DEF &

EN [85.DEF.En_BlkAR]

SIG Yx.ZP.Op &


>=1 >=1
EN [Yx.ZP.En_BlkAR] >=1
SIG Yx.ZG.Op &

EN [Yx.ZG.En_BlkAR]

SIG 50/51Pm.Op &


>=1
EN [50/51Pm.En_BlkAR]

SIG 50/51Gm.Op &

EN [50/51Gm.En_BlkAR]

SIG 50PVT.Op
>=1
SIG 50GVT.Op

SIG 46BC.Op

SIG 81O.OFx.Op
>=1 >=1
SIG 81U.UFx.Op >=1 >=1
CBx.BlkAR
SIG TT.Op

SIG CBx.50BF.Op_t1
>=1
SIG CBx.50BF.Op_t2

SIG CBx.50DZ.Op

SIG 49-1.Op
>=1
SIG 49-2.Op

SIG 50STB.Op

SIG 32R2.Op
>=1 >=1
SIG 32R1.Op

SIG CBx.62PD.Op

SIG 59Pz.Op
>=1
SIG 27Pz.Op

SIG 59Q.Op

EN En_MPF_Blk_AR &

SIG Multi-phase fault

EN En_3PF_Blk_AR & >=1

SIG Three-phase fault

EN En_PhSF_Blk_AR &

SIG Phase selection failure

SIG 21SOTF.Op >=1 >=1


&
SIG 50GSOTF.Op

SIG Manual closing signal

Figure 3.28-3 Blocking AR logic

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Where:

Y can be 21M or 21Q

x can be 1, 2, 3, 4 or 5

m can be 1, 2, 3 or 4

z can be 1, 2 or 3

3.28.6 Settings
Table 3.28-2 Settings of trip logic

No. Name Range Step Unit Remark


Enabling/disabling auto-reclosing blocked
when multi-phase fault happens
1 En_MPF_Blk_AR 0 or 1
0: disable
1: enable
Enabling/disabling auto-reclosing blocked
when three-phase fault happens
2 En_3PF_Blk_AR 0 or 1
0: disable
1: enable
Enabling/disabling auto-reclosing blocked
when faulty phase selection fails
3 En_PhSF_Blk_AR 0 or 1
0: disable
1: enable
Enabling/disabling three-phase tripping mode
for any fault conditions
4 CBx.En_Trp3P 0 or 1
0: disable
1: enable
The dwell time of tripping command, empirical
value is 0.04
5 t_Dwell_Trp 0.000~10.000 0.001 s The tripping contact shall drop off under
conditions of no current or protection tripping
element drop-off.

3.29 VT Circuit Supervision


3.29.1 General Application
The purpose of VT circuit supervision is to detect whether VT circuit is normal. Because some
protection functions, such as distance protection, under-voltage protection and so on, will be
influenced by VT circuit failure, these protection functions should be disabled when VT circuit fails.

VT circuit failure can be caused by many reasons, such as fuse blown due to short-circuit fault,
poor contact of VT circuit, VT maintenance and so on. The device can detect them and issue an
alarm signal to block relevant protection functions. However, the alarm of VT circuit failure should
not be issued when the following cases happen.

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1. Line VT is used as protection VT and the protected line is out of service.

2. Only current protection functions are enabled and VT is not connected to the device.

3.29.2 Function Description


VT circuit supervision can detect failure of single-phase, two-phase and three-phase on protection
VT. Under normal condition, the device continuously supervises input voltage from VT, VT circuit
failure signal will be activated if residual voltage exceeds the threshold value or positive-sequence
voltage is lower than the threshold value. If the device is under pickup state due to system fault or
other abnormality, VT circuit supervision will be disabled.

Under normal conditions, the device detect residual voltage greater than 8% of Unn to determine
single-phase or two-phase VT circuit failure, and detect three times positive-sequence voltage less
than Unn to determine three-phase VT circuit failure. Upon detecting abnormality on VT circuit, an
alarm will comes up with the time delay [VTS.t_DPU] and drop off with the time delay [VTS.t_DDO]
after VT circuit restored to normal.

VT (secondary circuit) MCB auxiliary contact as a binary input can be connected to the binary
input circuit of the device. If MCB is open (i.e. [VTS.MCB_VT] is energized), the device will
consider the VT circuit is not in a good condition and issues an alarm without a time delay.

When VT is not connected into the device, the alarm will be not issued if the logic setting
[VTS.En_Out_VT] is set as “1”. However, the alarm is still issued if the binary input [VTS.MCB_VT]
is energized, no matter that the logic setting [VTS.En_Out_VT] is set as “1” or “0”.

When VT neutral point fails, third harmonic of residual voltage is comparatively large. If third
harmonic amplitude of residual voltage is larger than 0.2Unn and without operation of fault
detector element, VT neutral point failure alarm signal [VTNS.Alm] will be issued with the time
delay [VTS.t_DPU] and drop off with the time delay [VTS.t_DDO] after three phases voltage
restored to normal.

3.29.3 Function Block Diagram

VTS VTNS

VTS.En VTS.Alm VTNS.En VTNS.Alm

VTS.Blk VTNS.Blk

VTS.MCB_VT

3.29.4 I/O Signals


Table 3.29-1 I/O signals of VT circuit supervision

No. Input Signal Description


1 VTS.En VT supervision enabling input, it is triggered from binary input or programmable

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logic etc.
VT supervision blocking input, it is triggered from binary input or programmable
2 VTS.Blk
logic etc.
VT neutral point supervision enabling input, it is triggered from binary input or
3 VTNS.En
programmable logic etc.
VT neutral point supervision blocking input, it is triggered from binary input or
4 VTNS.Blk
programmable logic etc.
5 VTS.MCB_VT Binary input for VT MCB auxiliary contact
No. Output Signal Description
1 VTS.Alm Alarm signal to indicate VT circuit fails
2 VTNS.Alm Alarm signal to indicate VT neutral point fails

3.29.5 Logic

Figure 3.29-1 Logic of VT circuit supervision

&
SIG FD.Pkp >=1

SIG 79.Inprog
If the signal [FD.Pkp] or [79.Inprog] operates,
then circuit of time delay will be interrupted.
OTH U03>0.2Unn & >=1
[VTS.t_DPU] [VTS.t_DDO] & VTNS.Alm
EN [VTS.En_Out_VT]

EN [VTS.En]
&
SIG [VTNS.En]

SIG [VTNS.Blk]

Figure 3.29-2 Logic of VT neutral point supervision

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Unn: rated phase-to-phase voltage

U03: third harmonic amplitude of neutral point residual voltage

If there is already a VTS alarm before FD operated, VTS will continue to block distance protection,
that is VTS will be latched when FD operates.

3.29.6 Settings
Table 3.29-2 VTS settings

No. Name Range Step Unit Remark


1 VTS.t_DPU 0.200~100.000 0.001 s Pickup time delay of VT circuit supervision
2 VTS.t_DDO 0.200~100.000 0.001 s Dropoff time delay of VT circuit supervision
No voltage used for protection calculation
1: enable
0: disable
3 VTS.En_Out_VT 0 or 1
In general, when VT is not connected to the
device, this logic setting should be set as
“1”
Voltage selection for protection calculation
from busbar VT or line VT
4 VTS.En_LineVT 0 or 1
1: line VT
0: busbar VT
Alarm function of VT circuit supervision
5 VTS.En 0 or 1 1: enable
0: disable

3.30 CT Circuit Supervision


3.30.1 General Application
The purpose of the CT circuit supervision is to detect any abnormality on CT secondary circuit.

Note!

For double circuit breakers mode, the device will provide indenpendent CT circuit
supervision function for CB1 and CB2 respectively. Both CT circuit supervision functions
have the same logic.The difference is that the prefix “CBx.” is added to all signals for circuit
breaker No.x (x=1 or 2).

3.30.2 Function Description


Under normal conditions, CT secondary signal is continuously supervised by detecting the
residual current and voltage. If residual current is larger than 10%In whereas residual voltage is
less than 3V, an error in CT circuit is considered, the concerned protection functions are blocked
and an alarm is issued with a time delay of 10s and drop off with a time delay of 10s after CT
circuit is restored to normal condition.

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3.30.3 Function Block Diagram

3.30.4 I/O Signals


Table 3.30-1 I/O signals of CT circuit supervision

No. Input Signal Description


CT circuit supervision enabling input, it is triggered from binary input or
1 CBx.CTS.En
programmable logic etc.
CT circuit supervision blocking input, it is triggered from binary input or
2 CBx.CTS.Blk
programmable logic etc.
No. Output Signal Description
1 CBx.CTS.Alm Alarm signal to indicate CT circuit fails

3.30.5 Logic

Figure 3.30-1 Logic diagram of CT circuit failure

3.31 Control and Synchrocheck for Manual Closing


3.31.1 General Application
The purpose of control is to open or close primary equipment, including circuit breaker (CB),
disconnector (DS) and earth switch (ES), or to issue outputs for signaling purpose. Synchronism
check and dead check are also provided for the control processes as below:

1. Local manual closing CB

2. Local closing CB by access the menu “Local Cmd→Control”

3. Remote closing CB from SCADA (i.e., local HMI system) or control center (CC)

Programmable interlocking logics within a bay and amongst different bays are provided by using

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PCS-Explorer.

Note!

For double circuit breakers mode, the device does not support control and synchrocheck
for manual closing.

3.31.2 Function Description


1. Control

High reliability is ensured by adopting the principle of selection before operation (abbreviated
SBO). When the binary input [BI_Maintenance] is energized as “1”, remote control from
SCADA/CC will be disabled, but local control will not be influenced.

The integrated control process is as follow:

1) The control source (SCADA/CC, or local LCD control operation, or manual control operation)
sends control selection command to this device

2) This device sends back the control selection result (success or failure) to the control source
after logic judgment

3) The control source sends control operation command to this device if the control selection
result is “success”. The control source will send control cancellation command to this device if
the control selection result is “failure”.

4) This device sends back the control operation result (success or failure) to the control source
after logic judgment.

Logic calculation result of interlocking is input to the remote control module as a criterion of remote
operation. When the enabling parameter of remote open/close interlock is “1”, remote control
module determines whether it can be output according to the calculation result of interlocking. If
the current breaker position or programmable part can meet the interlocking condition, remote
control can be output normally, otherwise remote operation is blocked. When the enabling
parameter of remote open/close interlock is “0”, interlocking function is disabled and remote
control will be output directly without the judgment of interlocking.

Holding time of each binary output contact can be set by configuring corresponding settings and is
often configured as 250ms. However, for the control circuits without latched relays, the holding
time must be longer to ensure successful control operation.

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SIG CSWI01.CILO.Disable >=1

SIG BIinput.CILO.Disable
>=1
EN [CSWI01.En_Cls_Blk]

SIG CSWI01.CILO.EnCls

SIG CSWI01.RmtCtrl >=1


&
SIG BIinput.RmtCtrl >=1 &
[CSWI01.t_PW_Cls] 0ms [CSWI01.Op_Cls]
SIG CSWI01.Cmd_RmtCtrl

SIG CSWI01.LocCtrl >=1

SIG BIinput.LocCtrl
&

SIG CSWI01.ManSynCls >=1

SIG CSWI01.Cmd_LocCtrl

SET MCBrd.25.En_SynChk >=1


>=1
SIG Sig_Ok_Chk

SET MCBrd.25.En_LvL_DdB
>=1
SET MCBrd.25.En_DdL_LvB >=1

SET MCBrd.25.En_DdL_DdB

SIG Sig_Ok_Chk

SET MCBrd.25.En_NoChk

SIG CSWIxx.CILO.Disable >=1

SIG BIinput.CILO.Disable
>=1
EN [CSWIxx.En_Cls_Blk] &
[CSWIxx.t_PW_Cls] 0ms [CSWIxx.Op_Cls]
SIG CSWIxx.CILO.EnCls

SIG CSWIxx.RmtCtrl >=1


&
SIG BIinput.RmtCtrl >=1

SIG CSWIxx.Cmd_RmtCtrl

SIG CSWIxx.LocCtrl >=1


&
SIG BIinput.LocCtrl

SIG CSWIxx.Cmd_LocCtrl

Figure 3.31-1 Logic diagram of closing primary equipment

Where:

xx=02~10

Only the first closing command “CSWI01.Op_Cls” controlled by synchrocheck logic can be used

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for CB closing.

After receiving a closing command, this device will continuously check whether the 2 voltages
(Incoming voltage and reference voltage) involved in synchronism check (or dead check) can meet
the criteria. Within the duration of [MCBrd.25.t_Wait_Chk], if the synchronism check (or dead
check) criteria are not met, the signal “Sig_Ok_Chk” will be set as “0”; if the synchronism check (or
dead check) criteria are met, the signal “Sig_Ok_Chk” will be set as “1”.

Access the menu “Local Cmd→Control” to issue control command locally, and this signal
“CSWIxx.Cmd_LocCtrl” will be set as “1”.

Remote control commands from SCADA/CC can be transmitted via IEC 60870-5-103 protocol or
IEC 61850 protocol, and this signal “CSWIxx.Cmd_RmtCtrl” will be set as “1”.

SIG CSWI01.CILO.Disable >=1

SIG BIinput.CILO.Disable
>=1
EN [CSWI01.En_Opn_Blk] &
[CSWI01.t_PW_Opn] 0ms [CSWI01.Op_Opn]
SIG CSWI01.CILO.EnOpn

SIG CSWI01.RmtCtrl >=1


&
SIG BIinput.RmtCtrl >=1

SIG CSWI01.Cmd_RmtCtrl

SIG CSWI01.LocCtrl >=1


&
SIG BIinput.LocCtrl

SIG CSWI01.ManOpn >=1

SIG CSWI01.Cmd_LocCtrl

SIG CSWIxx.CILO.Disable >=1

SIG BIinput.CILO.Disable
>=1
EN [CSWIxx.En_Opn_Blk] &
[CSWIxx.t_PW_Opn] 0ms [CSWIxx.Op_Opn]
SIG CSWIxx.CILO.EnOpn

SIG CSWIxx.RmtCtrl >=1


&
SIG BIinput.RmtCtrl >=1

SIG CSWIxx.Cmd_RmtCtrl

SIG CSWIxx.LocCtrl >=1


&
SIG BIinput.LocCtrl

SIG CSWIxx.Cmd_LocCtrl

Figure 3.31-2 Logic diagram of open primary equipment

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Where:

xx=01~10

The control output fulfills signal output circuit, and opens or closes circuit breaker, disconnector
and earth switch according to the control command. Object manipulation strictly performs three
steps: selection, check and excute, and perform output relay check, to ensure that the remote
control can be excuted safely and reliably.

When logic interlock is enabled, the device can receive the programmable interlock logic. The
device can automatically initiate the interlock logic to determine whether to allow control
operations. The device provides corresponding settings ([CSWIxx.En_Opn_Blk] and
[CSWIxx.En_Cls_Blk]) for each control object. When they are set as “1”, the interlock function of
the corresponding control object is enabled. The interlock logic can be configured by using
PCS-Explorer, and downloaded to the device via the Ethernet port. If the interlock function is
enabled, but it is not configured the interlock logic, the result of the logic output is 0.

The control record is a file which is used to store remote control command records of this device
circularly. If the record number is to 256, the storage area of the control record will be full. If this
device has received a new remote command, this device will delete the oldest remote control
record, and then store the latest remote control record.

There are 10 configuration pages corresponding to 10 control outputs in totall respectively. Each
configuration page can finish some signals configuration, including remote control, local control,
disable interlock blocking, and so on.

In order to conveniently configure control output, the same output signals, including
“BIinput.RmtCtrl”, “BIinput.LocCtrl” and “BIinput.CILO.Disable”, are available after processing
binary signals internally, as shown in figure below.

Figure 3.31-3 Configuration page of control output 01 (default configration)

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Figure 3.31-4 Configuration page of control output 02 (default configration)

Control output 03~10 is as same as control output 02.

The configuration rule about remote control and local control to binary outputs is as bellow:

X means that it is not configured.

Remot Local
CSWIxx. BIinput. CSWIxx. BIinput. Control Mode
RmtCtrl RmtCtrl LocCtrl LocCtrl
X X X X Neither Local control nor remote control are permissible.
0 X X X
Only local control is permissible.
X 0 X X
1 X X X
Only remote control is permissible.
X 1 X X
X X 0 X
Only remote control is permissible.
X X X 0
X X 1 X
Only local control is permissible.
X X X 1
0 X 0 X
0 X X 0
Neither Local control nor remote control are permissible.
X 0 0 X
X 0 X 0
0 X 1 X
X 0 1 X
Only local control is permissible.
0 X X 1
X 0 X 1
1 X 0 X
1 X X 0
Only remote control is permissible.
X 1 0 X
X 1 X 0

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1 X 1 X
1 X X 1
Both Local control and remote control are permissible.
X 1 1 X
X 1 X 1

For remote control or local control, they can be configured by either of “CSWIxx.RmtCtrl” and
“BIinput.RmtCtrl”, or either of “CSWIxx.LocCtrl” and “BIinput.LocCtrl”.

2. Synchrocheck

Three synchrocheck modes are designed for CB closing: no check mode, dead check mode and
synchronism check mode, if any one of the condition of three synchrocheck modes satisfied, then
synchrocheck signal “Sig_Ok_Chk” will be asserted.

The synchronism check function measures the conditions across the circuit breaker and compares
them with the corresponding settings. The output is only given if all measured quantities are
simultaneously within their set limits. Compared to the synchronism check for auto-reclosing, an
additional criterion is applied to check the rate of frequency change (df/dt) between both sides of
the CB.

When the following four conditions are all met, the synchronism check is successful.

1) Phase angle difference between incoming voltage and reference voltage is less than the
setting [MCBrd.25.phi_Diff]

2) Frequency difference between incoming voltage and reference voltage is less than
[MCBrd.25.f_Diff]

3) Voltage difference between between incoming voltage and reference voltage is less than
[MCBrd.25.U_Diff]

4) Rate of frequency change between incoming voltage and reference voltage is less than
[MCBrd.25.df/dt]

The dead check function measures the amplitude of line voltage and bus voltage at both sides of
the circuit breaker, and then compare them with the live check setting [MCBrd.25.U_Lv] and the
dead check setting [MCBrd.25.U_Dd]. The dead check is successful when the measured
quantities comply with the criteria.

When this device is set to work in no check mode and receives a closing command, CB will be
closed without synchronism check and dead check.

Synchrocheck for manual closing also supports voltage switching. In general, voltage switching is
fulfilled by external circuit ([CBConfigMode]=NoVoltSel). If using this module to fulfill voltage
switching, the busbar arrangement should be determined by the setting [CBConfigMode],
including:

 Double busbars arrangement ([CBConfigMode]=DblBusOneCB)

 1½ breakers arrangement ([CBConfigMode]=3/2BusCB or [CBConfigMode]=3/2TieCB)

Analog input defines four voltage inputs, UL1, UB1, UL2, UB2, and their usage are as follow:

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UL1: it connects with three-phase protection voltages (from line or busbar), which mainly are used
by distance protection, voltage protection and so on. According to the voltage switching result,
synchrocheck logic choose one voltage to be used for synchrocheck function, synchrocheck
function requires to judgment the phase identification information of the voltage, which is
determined by the setting [25.Opt_Source_UL1]. If voltage switching function is not used, the
reference voltage will be selected from UL1 fixedly.

UB1: according to the voltage switching result, synchrocheck logic determined whether the voltage
is used for synchrocheck function. Synchrocheck function requires to judgment the phase
identification information of the voltage, which is determined by the setting [25.Opt_Source_UB1].
If voltage switching function is not used, UB1 will be taken as the synchronism voltage.

UL2: according to the voltage switching result, synchrocheck logic determined whether the voltage
is used for synchrocheck function. Synchrocheck function requires to judgment the phase
identification information of the voltage, which is determined by the setting [25.Opt_Source_UL2].
When voltage switching is available, it is only available for 1½ breakers arrangement, it is fixedly
connected to the voltage of the other line of the same diameter in 1½ breakers arrangement.

UB2: according to the voltage switching result, synchrocheck logic determined whether the voltage
is used for synchrocheck function. Synchrocheck function requires to judgment the phase
identification information of the voltage, which is determined by the setting [25.Opt_Source_UB2].
When voltage switching is available, it is connected to synchronism voltage for double busbars
arrangement or 1½ breakers arrangement.

Synchrocheck for manual closing supports voltage switching function, and the switching logic is as
same as that of synchrocheck for protection closing. The setting [CBConfigMode] should be set
according to the actual primary busbar arrangement, otherwise, the voltage switching of
synchrocheck for manual closing will fail, so as to block manual closing with synchrocheck.

During dead charge check, when only single-phase voltage is connected to UL1, live voltage is
valid if the setting [VTS.En] should be set as “0” and the connected single-phase voltage is higher
than the setting [MCBrd.25.U_Lv], otherwise, live voltage is regarded as live only when three
phases voltages are all higher than [MCBrd.25.U_Lv].

3.31.3 Function Block Diagram

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CSWIxx

CILO.EnOpn Op_Opn

CILO.EnCls Op_Cls

RmtCtrl

LocCtrl

CILO.Disable

xx can be from 02 to 10

3.31.4 I/O Signals


Table 3.31-1 I/O signals of control

No. Input Signal Description


From receiving a closing command, this device will continuously check
whether the 2 voltages (Incoming voltage and reference voltage) involved
in synchronism check(or dead check) can meet the criteria.
1 Sig_Ok_Chk Within the duration of [MCBrd.25.t_Wait_Chk], if the synchronism
check(or dead check) criteria are not met, [Sig_Ok_Chk] will be set as “0”;
if the synchronism check(or dead check) criteria are met, [Sig_Ok_Chk]
will be set as “1”.
2 CSWIxx.CILO.EnOpn It is the interlock status of No.xx open output of BO module (xx=01~10)

3 CSWIxx.CILO.EnCls It is the interlock status of No.xx closing output of BO module (xx=01~10)


It is used to select the local control to No.xx controlled object (CB/DS/ES).
4 CSWIxx.LocCtrl When the local control is active, No.xx binary outputs can only be locally
controlled. (xx=01~10)
It is used to select the remote control to No.xx controlled object
5 CSWIxx.RmtCtrl (CB/DS/ES). When the remote control is active, No.xx binary outputs can
only be remotely controlled by SCADA or control centers. (xx=01~10)
It is used to disable the interlock blocking function for control output. If the
6 CSWIxx.CILO.Disable
signal “CSWIxx.CILO.Disable” is “1”, No.xx binary outputs of the device

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3 Operation Theory

will not be blocked by interlock conditions. (xx=01~10)


It is used to select the remote control to controlled object (CB/DS/ES).
7 BIinput.RmtCtrl When the remote control is active, all binary outputs can only be remotely
controlled by SCADA or control centers.
It is used to select the local control to controlled object (CB/DS/ES). When
8 BIinput.LocCtrl
the local control is active, all binary outputs can only be locally controlled.
It is used to disable the interlock blocking function for control output. If the
9 BIinput.CILO.Disable signal “BIinput.CILO.Disable” is “1”, all binary outputs of this device will
not be blocked by interlock conditions.
When the condition of local control is met and the signal
10 CSWI01.ManSynCls “CSWI01.ManSynCls” is “1”, the output contact [BO_CtrlCls01] is closed
to execute manually closing the circuit breaker with synschrochcek.
When the condition of local control is met and the signal
11 CSWI01.ManOpn “CSWI01.ManOpn” is “1”, the output contact [BO_CtrlOpn01] is closed to
execute manually open the circuit breaker.
No. Output Signal Description
1 CSWIxx.Op_Opn No.xx command output for open. (xx=01~10)
2 CSWIxx.Op_Cls No.xx command output for closing. (xx=01~10)
3 BIinput.RmtCtrl In order to be convenient to user configure control output, three same
output signals with input signals are available. The relationship with 10
4 BIinput.LocCtrl
binary output have been configured inside the device. The user only
assigns a specific binary input to input signal, the relevant function can be

5 BIinput.CILO.Disable gained. If some binary output need not be controlled by three signals,
please cancle the configuration by PCS-Explorer, and configure it
independently.

3.31.5 Settings
Table 3.31-2 Control settings

No. Name Range Step Unit Remark


No.xx holding time of a normal open contact
of remote opening CB, disconnector or for
1 CSWIxx.t_PW_Opn 0~65535 1 ms
signaling purpose.
(xx=01, 02….10)
No.xx closing time of a normal open contact
of remote closing CB, disconnector or for
2 CSWIxx.t_PW_Cls 0~65535 1 ms
signaling purpose.
(xx=01, 02….10)
These settings are applied to configure the
3 CSWIxx.t_DPU_DPS 0~60000 1 ms debouncing time. “DPU” is the abbreviation of
“Delay Pick Up”. (xx=01, 02….10)
Enabling/disabling No.xx open output of the
4 CSWIxx.En_Opn_Blk 0 or 1 BO module be controlled by the interlocking
logic

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0: disable
1: enable
(xx=01, 02….10)
Enabling/disabling No.xx closing output of the
BO module be controlled by the interlocking
logic
5 CSWIxx.En_Cls_Blk 0 or 1
0: disable
1: enable
(xx=01, 02….10)

Table 3.31-3 Synchrocheck settings

No. Name Range Step Unit Remark


Voltage selecting mode of line 1
0: A-phase voltage
1: B-phase voltage
1 MCBrd.25.Opt_Source_UL1 0~5 1 2: C-phase voltage
3: AB-phase voltage
4: BC-phase voltage
5: CA-phase voltage
Voltage selecting mode of bus 1
0: A-phase voltage
1: B-phase voltage
2 MCBrd.25.Opt_Source_UB1 0~5 1 2: C-phase voltage
3: AB-phase voltage
4: BC-phase voltage
5: CA-phase voltage
Voltage selecting mode for line 2
0: A-phase voltage
1: B-phase voltage
3 MCBrd.25.Opt_Source_UL2 0~5 1 2: C-phase voltage
3: AB-phase voltage
4: BC-phase voltage
5: CA-phase voltage
Voltage selecting mode for bus 2
0: A-phase voltage
1: B-phase voltage
4 MCBrd.25.Opt_Source_UB2 0~5 1 2: C-phase voltage
3: AB-phase voltage
4: BC-phase voltage
5: CA-phase voltage
5 MCBrd.25.U_Dd 0.05Un~0.8Un 0.001 V Voltage threshold of dead check
6 MCBrd.25.U_Lv 0.5Un~Un 0.001 V Voltage threshold of live check
Compensation coefficient for
7 MCBrd.25.K_Usyn 0.20-5.00
synchronism voltage

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3 Operation Theory

Phase difference limit of


8 MCBrd.25.phi_Diff 0~ 89 1 deg synchronism check for manual
closing
Compensation for phase difference
9 MCBrd.25.phi_Comp 0~359 1
between two synchronous voltages
Frequency difference limit of
10 MCBrd.25.f_Diff 0.02~1.00 0.01 Hz synchronism check for manual
closing
Voltage difference limit of
11 MCBrd.25.U_Diff 0.02Un~0.8Un 0.01 V synchronism check for manual
closing
12 MCBrd.25.En_SynChk 0 or 1 Enable synchronism check
Enable dead line and dead bus
13 MCBrd.25.En_DdL_DdB 0 or 1
(DLDB) check
Enable dead line and live bus
14 MCBrd.25.En_DdL_LvB 0 or 1
(DLLB) check
Enable live line and dead bus
15 MCBrd.25.En_LvL_DdB 0 or 1
(LLDB) check
Enable manual closing without any
16 MCBrd.25.En_NoChk 0 or 1
check
Threshold of rate of frequency
17 MCBrd.25.df/dt 0.00~3.00 0.01 Hz/s change between both sides of CB
for synchronism-check.
Circuit breaker closing time. It is the
time from receiving closing
18 MCBrd.25.t_Close_CB 20~1000 1 ms
command pulse till the CB is
completely closed.
From receiving a closing command,
this device will continuously check
whether between incoming voltage
and reference voltage involved in
synchronism check (or dead check)
19 MCBrd.25.t_Wait_Chk 5~30 0.001 s can meet the criteria. If the
synchronism check (or dead check)
criteria are not met within the
duration of this time delay, the failure
of synchronism-check (or dead
check) will be confirmed.

3.32 Faulty Phase Selection


3.32.1 General Application
Fault phase selection logic can be implemented by the following methods:

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1. Detecting the variation of operating voltage

2. Detecting the phase difference between I0 and I2A

The logic makes the device ideal for single-phase tripping applications.

3.32.2 Function Description

3.32.2.1 Variation of Operating Voltage (Faulty Phase Selection Element 1)

1. Variation of phase operating voltage

1) Phase A: ∆UOPA

2) Phase B: ∆UOPB

3) Phase C: ∆UOPC

2. Variation of phase-to-phase operating voltage

1) Phase AB: ∆UOPAB

2) Phase BC: ∆UOPBC

3) Phase CA: ∆UOPCA

∆UOΦMAX=Max(∆UOPA, ∆UOPB, ∆UOPC)

∆UOΦΦMAX=Max(∆UOPAB, ∆UOPBC, ∆UOPCA)

If ∆UOΦMAX is several times higher than the variation of operating voltages of other two phases, the
single-phase fault is ensured, otherwise, the multi-phase fault is ensured.

Table 3.32-1 Relation between ∆UOΦMAX and faulty phase

∆UOΦMAX or ∆UOΦΦMAX Fault phase

∆UOPA Phase A

∆UOPB Phase B

∆UOPC Phase C

∆UOPAB Phase AB

∆UOPBC Phase BC

∆UOPCA Phase CA

3.32.2.2 I0 and I2A (Faulty Phase Selection Element 2)

The phase selection algorithm uses the angle relation between I0 and I2A of the device. As shown
in Figure 3.32-1, there are three faulty phase selection regions.

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Figure 3.32-1 The region of faulty phase selection

Depended on the phase relation between I0 and I2A, the faulty phase can be determined.

1. -60º<Arg(I0/I2A)<60º, region A is selected, possible faulty phase is phase A or phase BC.

2. 60º<Arg(I0/I2A)<180º, region B is selected, possible faulty phase is phase B or phase CA.

3. 180º<Arg(I0/I2A)<300º, region C is selected, possible faulty phase is phase C or phase AB.

For single-phase earth fault, I0 and I2 of faulty phase are in-phase and its distance element
operates.

For phase to phase to earth fault, I0 and I2 of non-faulty phase are in-phase but its distance
element does not operate.

3.32.3 Function Block Diagram

PhSel

PhSA

PhSB

PhSC

GndFlt

3.32.4 I/O Signals


Table 3.32-2 I/O signals of faulty phase selection

No. Output Signal Description


1 PhSA Phase-A is selected as faulty phase
2 PhSB Phase-B is selected as faulty phase

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3 Operation Theory

3 PhSC Phase-C is selected as faulty phase


4 GndFlt Earth fault

3.33 Fault Location


3.33.1 Application
The main objective of line protection is fast, selective and reliable operation for faults on a
protected line section. Besides this, information on distance to fault is very important for those
involved in operation and maintenance. Reliable information on the fault location greatly
decreases the outage of the protected lines and increases the total availability of a power system.
This fault location function cannot be used for the transmission line with series compensation.

3.33.2 Function Description

3.33.2.1 Fundamental Principle

The fault location is an essential function to various line protection devices, after selecting faulty
phase, it measures and indicates the distance to the fault with high accuracy. Thus, the fault can
be quickly located for repairs. The calculation algorithm considers the effect of load currents,
double-end infeed and additional fault resistance. Both double-end fault location and single-end
fault location are available in line differential relay, but only single-end fault location is provided in
other relays.

The calculation equation is:

[km]

Where:

Dist: The distance of fault location according to the Zcalc (km)

Zcalc: The impedance value calculated from the location of protection device to fault point

Zl: The impedance value of the whole line + mutual impedance

Length: The input length of transmission line (km)

3.33.2.2 Mutual Compensation

When an earth fault occurred on a line of parallel lines arrangement, a distance relay at one end of
the faulty line will tend to underreach whilst the distance relay at the other end will tend to
overreach. Usually the degree of underreach or overreach is acceptable, however, for cases
where precise fault location is required for long lines with high mutual coupling, mutual
compensation is then required to improve the distance measurement. Practically, the mutual effect
between the parallel lines is insignificant to positive and negative sequence and thus the mutual
compensation is only for zero sequence

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3 Operation Theory

The principle in the application of mutual compensation is shown as follows with the aid of
following sequence network diagram figure. The diagram indicates a parallel lines arrangement
with an earth fault at location k on line CD.

The equivalent sequence network for an earth fault on a parallel lines arrangement with single
source is shown as below.

Ia1 ZL1
ZS1
kZL1 (1-k)ZL1
Ic1

Ia2 ZL2
ZS2
kZL2 (1-k)ZL2
Ic2

Ia0 ZL0

ZS0
Z0M
kZL0 (1-k)ZL0
Ic0

Figure 3.33-1 Equivalent sequence network

The device at location C without mutual compensation will have voltage URC and current IRC
measured as shown in the expression

URC is the voltage of the device at location C.

If the line is fully transposed, ZL1=ZL2, Then

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The impedance presented to the device is:

For an earth fault, ,

With the mutual compensation enabled,

(Actual distance of the fault)

The residual current from the parallel line should be added to the device. It should be connected to
terminal 08 and star point of the parallel line CT connected to terminal 07 as shown in the following
figure. Please note the connection diagram and the terminal numbers are for reference only. The
final connection terminals are subject to the device configuration at site.

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3 Operation Theory

P2 S2 P2 S2

P1 S1 P1 S1

02 01 02 01

04 03 04 03

06 05 06 05

08 07 08 07

3.33.3 Function Block Diagram

3.33.4 I/O Signals


Table 3.33-1 I/O signals of fault location

No. Input Signal Description


1 FPS_Fault Faulty phase selection
2 FD.Pkp The device picks up
No. Output Signal Description
1 Fault_Location The result of fault location

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2 Faulty_Phase The selected faulty phase


3 Fault_Phase_Curr Maximum faulty current
4 Fault_Resid_Curr Maximum residual current

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3 Operation Theory

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4 Supervision

4 Supervision

Table of Contents
4 Supervision ...................................................................................... 4-a
4.1 Overview .......................................................................................................... 4-1
4.2 Supervision Alarms ......................................................................................... 4-1
4.3 Relay Self-supervision.................................................................................... 4-7
4.3.1 Relay Hardware Monitoring................................................................................................ 4-7

4.3.2 Fault Detector Monitoring ................................................................................................... 4-7

4.3.3 Check Setting..................................................................................................................... 4-7

4.4 AC Input Monitoring ........................................................................................ 4-8


4.4.1 Voltage/current Drift Monitoring and Auto-adjustment ........................................................ 4-8

4.4.2 Sampling Monitoring .......................................................................................................... 4-8

4.5 Secondary Circuit Monitoring ........................................................................ 4-8


4.5.1 Opto-coupler Power Supervision ....................................................................................... 4-8

4.5.2 Circuit Breaker Supervision................................................................................................ 4-8

List of Tables
Table 4.2-1 Alarm description ...................................................................................................4-1

Table 4.2-2 Troubleshooting .....................................................................................................4-5

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4-b PCS-902 Line Distance Relay


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4 Supervision

4.1 Overview
Protection system is in quiescent state under normal conditions, and it is required to respond
promptly for faults occurred on power system. When the device is in energizing process before the
LED “HEALTHY” is on, the device need to be checked to ensure no abnormality. Therefore, the
automatic supervision function, which checks the health of the protection system when startup and
during normal operation, plays an important role.

The numerical relay based on the microprocessor operations is suitable for implementing this
automatic supervision function of the protection system.

In case a defect is detected during initialization when DC power supply is provided to the device,
the device will be blocked with indication and alarm of relay out of service. It is suggested a trial
recovery of the device by re-energization. Please contact supplier if the device is still failure.

When a failure is detected by the automatic supervision, it is followed by a LCD message, LED
indication and alarm contact outputs. The failure alarm is also recorded in event recording report
and can be printed If required.

4.2 Supervision Alarms


Hardware circuit and operation status of the device are self-supervised continuously. If any
abnormal condition is detected, information or report will be displayed and a corresponding alarm
will be issued.

A minor abnormality may block a certain number of protections functions while the other functions
can still work. However, if severe hardware failure or abnormality, such as PWR module failure,
DC converter failure and so on, are detected, all protection functions will be blocked and the LED
“HEALTHY” will be extinguished and blocking output contacts BO_FAIL will be given. The
protective device then can not work normally and maintenance is required to eliminate the failure.
All the alarm signals and the corresponding handling suggestions are listed below.

Note!

If the device is blocked or alarm signal is sent during operation, please do find out its
reason with the help of self-diagnostic record. If the reason can not be found at site, please
notify the factory NR. Please do not simply press button “TARGET RESET” on the
protection panel or re-energize on the device.

Table 4.2-1 Alarm description

No. Item Description Blocking Device


Fail Signals
The device fails.
1 Fail_Device This signal will be pick up if any fail signal picks up and it Blocked
will drop off when all fail signals drop off.
2 Fail_Setting_OvRange Set value of any setting is out of scope. Blocked

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4 Supervision

This signal will pick up instantaneously and will be


latched unless the recommended handling suggestion is
adopted.
Mismatch between the configuration of plug-in modules
3 Fail_BoardConfig Blocked
and the designing drawing of an applied-specific project.
After config file is updated, settings of the file and
settings saved on the device are not matched.
4 Fail_SettingItem_Chgd This signal will pick up instantaneously and will be Blocked
latched unless the recommended handling suggestion is
adopted.
Error is found during checking memory data.
This signal will pick up instantaneously and will be
5 Fail_Memory Blocked
latched unless the recommended handling suggestion is
adopted.
Error is found during checking settings.
This signal will pick up instantaneously and will be
6 Fail_Settings Blocked
latched unless the recommended handling suggestion is
adopted.
DSP chip is damaged.
This signal will pick up instantaneously and will be
7 Fail_DSP Blocked
latched unless the recommended handling suggestion is
adopted.
Communication between two DSP chips is abnormal
8 Fail_DSP_Comm This signal will pick up instantaneously and will drop off Blocked
instantaneously.
Software configuation is incorrect.
This signal will pick up instantaneously and will be
9 Fail_Config Blocked
latched unless the recommended handling suggestion is
adopted.
AC current and voltage samplings are abnormal.
This signal will pick up with a time delay of 200ms and
10 Fail_Sample Blocked
will be latched unless the recommended handling
suggestion is adopted.
For DSP plug-in module for measurement and control in
11 MCBrd.Fail_Sample Blocked
slot 06, AC current and voltage samplings are abnormal
Error is found during checking the settings of DSP
12 MCBrd.Fail_Settings Blocked
plug-in module for measurement and control in slot 06.
Alarm Signals
The device is abnormal.
13 Alm_Device This signal will be pick up if any alarm signal picks up Unblocked
and it will drop off when all alarm signals drop off.
14 Alm_Insuf_Memory The memory of MON plug-in module is insufficient. Unblocked
The device is in the communication test mode.
15 Alm_CommTest Unblocked
This signal will pick up instantaneously and will drop off

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4 Supervision

instantaneously.
The error is found during MON module checking
settings of device.
16 Alm_Settings_MON Unblocked
This signal will pick up with a time delay of 10s and will
be latched unless re-powering or rebooting the device.
The error is found during checking the version of
software downloaded to the device.
17 Alm_Version Unblocked
This signal will pick up instantaneously and will drop off
instantaneously.
The active group set by settings in device and that set
by binary input are not matched.
18 Alm_BI_SettingGrp Unblocked
This signal will pick up instantaneously and will drop off
instantaneously.
Data frame is abnormal between two DSP modules.
19 Alm_DSP_Frame This signal will pick up instantaneously and will drop off Unblocked
instantaneously.
The power supply of BI plug-in module in slot xx is
abnormal.
20 Bxx.Alm_OptoDC Unblocked
This signal will pick up with a time delay of 10s and will
drop off with a time delay of 10s.
Fault detector element operates for longer than 50s.
21 Alm_Pkp_FD This signal will pick up with a time delay of 50s and will Unblocked
drop off with a time delay of 10s.
Neutral current fault detector element operates for
longer than 10s.
22 Alm_Pkp_I0 Unblocked
This signal will pick up with a time delay of 10s and will
drop off with a time delay of 10s.
Protection VT circuit fails.
23 VTS.Alm This signal will pick up with a time delay [VTS.t_DPU] Unblocked
and will drop off with a time delay [VTS.t_DDO].
Protection VT circuit of neutral point fails.
24 VTNS.Alm This signal will pick up with a time delay [VTS.t_DPU] Unblocked
and will drop off with a time delay [VTS.t_DDO].
CT circuit of corresponding circuit breaker No.x fails.
25 CBx.CTS.Alm This signal will pick up with a time delay of 10s and will Unblocked
drop off with a time delay of 10s.
The auxiliary normally closed contact (52b) of
corresponding circuit breaker No.x is abnormal.
26 CBx.Alm_52b Unblocked
This signal will pick up with a time delay of 10s and will
drop off with a time delay of 10s.
The device is in maintenance state.
27 BI_Maintenance This signal will pick up with a time delay of 150ms and Unblocked
will drop off with a time delay of 150ms.

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4 Supervision

28 Alm_TimeSyn Time synchronization abnormality alarm. Unblocked

Frequency of the system is higher than 65Hz or lower


than 45Hz.
29 Alm_Freq Unblocked
This signal will pick up with a time delay of 100ms and
will drop off with a time delay of 10s.
Spare alarm signals
Alm_Sparexx
30 The time delay of pickup and dropoff for these alarm Unblocked
(xx=01~08)
signals can be set by PCS-Explorer.
Protection Element Alarm Signals
Channel x is abnormal
31 FOx.Alm This signal will pick up with a time delay of 100ms and Unblocked
will drop off with a time delay of 1s.
Received ID from the remote end is not as same as the
setting [FOx.RmtID] of the device in local end
32 FOx.Alm_ID Unblocked
This signal will pick up with a time delay of 100ms and
will drop off with a time delay of 1s.
No valid frame of channel x is received.
33 FOx.Alm_NoValFram This signal will pick up with a time delay of 100ms and Unblocked
will drop off with a time delay of 1s.
Rate of error code of channel x is larger than 40 error
codes per second.
34 FOx.Alm_CRC Unblocked
This signal will pick up instantaneously and will drop off
with a time delay of 10s.
Channelx is out of service due to receive error codes
after device picking up.
35 FOx.Alm_Off Unblocked
This signal will pick up instantaneously and will drop off
instantaneously.
Optical fibre of channel x is connected wrongly.
36 FOx.Alm_Connect This signal will pick up with a time delay of 100ms and Unblocked
will drop off with a time delay of 1s.
37 27P1.Alm Stage 1 of undervoltage protection alarms. Unblocked
38 27P2.Alm Stage 2 of undervoltage protection alarms. Unblocked
39 59P1.Alm Stage 1 of overvoltage protection alarms. Unblocked
40 59P2.Alm Stage 2 of overvoltage protection alarms. Unblocked
Stage 1 of thermal overload protection operates to
41 49-1.Alm Unblocked
alarm.
Stage 2 of thermal overload protection operates to
42 49-2.Alm Unblocked
alarm.
43 46BC.Alm Broken-conductor protection operates to alarm. Unblocked
Voltage selection corresponding to circuit breaker No.x
44 CBx.Alm_Invalid_Sel Unblocked
is invalid.
Synchronism voltage circuit corresponding to circuit
45 CBx.25.Alm_VTS_Usyn Unblocked
breaker No.x is abnormal.

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4 Supervision

This signal will pick up with a time delay of 1.25s and will
drop off with a time delay of 10s.
Reference voltage circuit corresponding to circuit
breaker No.x is abnormal.
46 CBx.25.Alm_VTS_Uref Unblocked
This signal will pick up with a time delay of 1.25s and will
drop off with a time delay of 10s.
Auto-reclosing corresponding to circuit breaker No.x
47 CBx.79.Fail_Rcls Unblocked
fails.
Synchrocheck for AR corresponding to circuit breaker
48 CBx.79.Fail_Chk Unblocked
No.x fails.
Input signal of receiving transfer trip is energized for
49 TT.Alm longer than 4s and it will drop off with a time delay of Unblocked
10s.

Table 4.2-2 Troubleshooting

No. Item Handling suggestion


Fail Signals
The signal is issued with other specific fail signals, and please refer to the
1 Fail_Device
handling suggestion other specific alarm signals.
Please reset setting values according to the range described in the instruction
2 Fail_Setting_OvRange manual, then re-power or reboot the device and the device will restore to
normal operation state.
1. Go to the menu “Information→Borad Info”, check the abnormality
information.
3 Fail_BoardConfig 2. For the abnormality board, if the board is not used, then remove, and if the
board is used, then check whether the board is installed properly and work
normally.
Please check the settings mentioned in the prompt message on the LCD, and
4 Fail_SettingItem_Chgd go to the menu “Settings” and select “Confirm_Settings” item to comfirm
settings. Then, the device will restore to normal operation stage.
5 Fail_Memory Please inform the manufacture or the agent for repair.
6 Fail_Settings Please inform the manufacture or the agent for repair.
Chips are damaged and please inform the manufacture or the agent replacing
7 Fail_DSP
the module.
8 Fail_DSP_Comm Please inform the manufacture or the agent for repair.
Please inform configuration engineers to check and confirm visualization
9 Fail_Config
functions of the device
1. Please make the device out of service.
2. Then check if the analog input modules and wiring connectors connected to
10 Fail_Sample
those modules are installed at the position.
3. Re-power the device and the device will restore to normal operation state.
1. Please make the device out of service.
11 MCBrd.Fail_Sample 2. Then check if analog input modules and wiring connectors connected to
those modules are installed at the position.

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3. Re-power the device and the device will restore to normal operation state.
12 MCBrd.Fail_Settings Please inform the manufacturer or the agent for repair.
Alarm Signals
The signal is issued with other specific alarm signals, and please refer to the
13 Alm_Device
handling suggestion other specific alarm signals.
14 Alm_Insuf_Memory Please replace MON plug-in module.
No special treatment is needed, and disable the communication test function
15 Alm_CommTest
after the completion of the test.
16 Alm_Settings_MON Please inform the manufacture or the agent for repair.
Users may pay no attention to the alarm signal in the project commissioning
stage, but it is needed to download the latest package file (including correct
version checksum file) provided by R&D engineer to make the alarm signal
17 Alm_Version
disappear. Then users get the correct software version. It is not allowed that
the alarm signal is issued on the device already has been put into service. the
devices having being put into service so that the alarm signal disappears.
Please check the value of setting [Active_Grp] and binary input of indiating
active group, and make them matched. Then the “ALARM” LED will be
18 Alm_BI_SettingGrp
extinguished and the corresponding alarm message will disappear and the
device will restore to normal operation state.
19 Alm_DSP_Frame Please inform the manufacture or the agent for repair.
1. check whether the binary input module is connected to the power supply.
2. check whether the voltage of power supply is in the required range.
20 Bxx.Alm_OptoDC 3. After the voltage for binary input module restores to normal range, the
“ALARM” LED will be extinguished and the corresponding alarm message will
disappear and the device will restore to normal operation state.
Please check secondary values and protection settings. If settings are not set
reasonable to make fault detectors pick up, please reset settings, and then
21 Alm_Pkp_FD
the alarm message will disappear and the device will restore to normal
operation state.
Please check secondary values and protection settings. If settings are not set
reasonable to make fault detectors pick up, please reset settings, and then
22 Alm_Pkp_I0
the alarm message will disappear and the device will restore to normal
operation state.
Please check the corresponding VT secondary circuit. After the abnormality is
23 VTS.Alm
eliminated, the device returns to normal operation state.
Please check the corresponding VT secondary circuit of neutral point. After
24 VTNS.Alm
the abnormality is eliminated, the device returns to normal operation state.
Please check the corresponding CT secondary circuit. After the abnormality is
25 CBx.CTS.Alm
eliminated, the device returns to normal operation state.
Please check the auxiliary contact of CB. After the abnormality is eliminated,
26 CBx.Alm_52b
the device returns to normal operation state.
After maintenance is finished, please de-energized the binary input
27 BI_Maintenance [BI_Maintenance] and then the alarm will disappear and the device restore to
normal operation state.

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Date: 2014-07-29
4 Supervision

1. check whether the selected clock synchronization mode matches the clock
synchronization source;

2. check whether the wiring connection between the device and the clock
synchronization source is correct

28 Alm_TimeSyn 3. check whether the setting for selecting clock synchronization (i.e.
[Opt_TimeSyn]) is set correctly. If there is no clock synchronization, please
set the setting [Opt_TimeSyn] as ”No TimeSyn”.

4. After the abnormality is removed, the “ALARM” LED will be extinguished


and the corresponding alarm message will disappear and the device will
restore to normal operation state.
29 Alm_Freq Adjust the system operating mode
Alm_Sparexx Find the reason according to specific problem. (These signals are
30
(xx=01~08) user-defined.)
Operation Alarm Signals
31 FOx.Alm Please check the conncetion of optical fibre channel.
32 FOx.Alm_ID Please check the conncetion of optical fibre channel.
33 FOx.Alm_NoValFram Please check the conncetion of optical fibre channel.
34 FOx.Alm_CRC Please check the conncetion of optical fibre channel.
35 FOx.Alm_Off Please check the conncetion of optical fibre channel.
Please check the conncetion of optical fibre channel. (For example, receiving
36 FOx.Alm_Connect
and sending are inconsistent, or channel 1 and channel 2 are inconsistent)
Please check the corresponding binary input secondary circuit. After the
37 TT.Alm abnormality is eliminated, “ALARM” LED will go off automatically and device
returns to normal operation state with a time delay of 10s.

4.3 Relay Self-supervision

4.3.1 Relay Hardware Monitoring


All chips on DSP module are monitored to ensure whether they are damaged or having errors. If
any one of them is detected damaged or having error, the alarm signal [Fail_DSP] is issued with
the device being blocked.

4.3.2 Fault Detector Monitoring


When neutral current fault detector picks up and lasts for longer than 10 seconds, an alarm
[Alm_Pkp_I0] will be issued without the device blocked.

When any fault detector picks up for longer than 50s, an alarm will be issued [Alm_Pkp_FD]
without the device blocked.

4.3.3 Check Setting


This relay has 10 setting groups, only one Setting group could be activiated (is active) at a time.
The settings of active setting group are checked to ensure they are reasonable. If settings are

PCS-902 Line Distance Relay 4-7


Date: 2014-07-29
4 Supervision

checked to be unreasonable or out of setting scopes, a corresponding alarm signal will be issued,
and the device is also blocked.

4.4 AC Input Monitoring


4.4.1 Voltage/current Drift Monitoring and Auto-adjustment
Zero point of voltage and current may drift due to variation of temperature or other environment
factors. The device continually traces the drift and adjust it to normal value automatically.

4.4.2 Sampling Monitoring


AC current and voltage samplings of protection DSP and fault detector DSP are monitored and if
the samples of protection DSP and fault detector DSP are detected to be wrong or inconsistent
between them, the alarm signal [Fail_Sample] will be issued and the device will be blocked.

4.5 Secondary Circuit Monitoring


4.5.1 Opto-coupler Power Supervision
Positive power supply of opto-coupler is continually monitored. If an error or damage has occurred,
an alarm [Bxx.Alm_OptoDC] will be issued.

4.5.2 Circuit Breaker Supervision


If 52b of three phases are energized ,which indicates circuit breaker is open and there is no
current detected in the line, the line will be considered to be out of service. SOTF protection will be
enabled after 50ms.

If 52b of three phases are energized that indicates circuit breaker is open but there is still current
detected in the line (the measured current is greater than a settable threshold value) or
three-phase circuit breaker is in pole disagreement, an alarm signal [Alm_52b] will be issued after
10 seconds.

4-8 PCS-902 Line Distance Relay


Date: 2014-07-29
5 Management

5 Management

Table of Contents
5 Management ..................................................................................... 5-a
5.1 Measurement ................................................................................................... 5-1
5.1.1 Root-Mean-Square Values ................................................................................................. 5-1

5.1.2 Phase Angle ....................................................................................................................... 5-3

5.1.3 Primary Value ..................................................................................................................... 5-3

5.2 Recording ........................................................................................................ 5-5


5.2.1 Overview ............................................................................................................................ 5-5

5.2.2 Event Recording ................................................................................................................ 5-5

5.2.3 Disturbance Recording ...................................................................................................... 5-6

5.2.4 Present Recording ............................................................................................................. 5-7

PCS-902 Line Distance Relay 5-a


Date: 2014-07-29
5 Management

5-b PCS-902 Line Distance Relay


Date: 2014-07-29
5 Management

5.1 Measurement
PCS-902 performs continuous measurement of the analogue input quantities. The current full
scale of relay is 40 times of rated current, and there is no effect to the performance of IED due to
overflowing of current full scale. The device samples 24 points per cycle and calculates the RMS
value in each interval and updated the LCD display in every 0.5 second. The measurement data
can be displayed on the LCD of the relay front panel or on the local/remote PC via software tool.
Navigate the menu to view the sampling value through LCD screen.

Note!

This device can be configured to support single circuit breaker application or double circuit
breakers application by PCS-Explorer. For double circuit breakers mode, the prefix “CBx.”
is added to related measurement quantities for circuit breaker No.x (x=1 or 2).

5.1.1 Root-Mean-Square Values


Access path:

MainMenu  “Measurements”  “Measurements1”

“Measurements1” is used to display measured values from protection calculation DSP (displayed
in secondary value)

MainMenu  “Measurements”  “Measurements2”

“Measurements2” is used to display measured values from fault detector DSP (displayed in
secondary value)
No. Symbol Definition Resolution Unit

The secondary value of phase-A current for circuit


1 CBx.Ia 0.000 A
breaker No.x

The secondary value of phase-B current for circuit


2 CBx.Ib 0.000 A
breaker No.x

The secondary value of phase-C current for circuit


3 CBx.Ic 0.000 A
breaker No.x

The secondary value of calculated residual current for


4 CBx.3I0 0.000 A
circuit breaker No.x

The secondary value of phase-A current (summation


5 Ia 0.000 A
current for double circuit breakers mode)

The secondary value of phase-B current (summation


6 Ib 0.000 A
current for double circuit breakers mode)

The secondary value of phase-C current (summation


7 Ic 0.000 A
current for double circuit breakers mode)

The secondary value of calculated residual current


8 3I0 0.000 A
(summation current for double circuit breakers mode)

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Date: 2014-07-29
5 Management

9 I1 The secondary value of positive-sequence current 0.000 A

10 I2 The secondary value of negative-sequence current 0.000 A

The secondary value of residual current from parallel


11 3I0Adj 0.000 A
line

12 Ua The secondary value of phase-A protection voltage 0.000 V

13 Ub The secondary value of phase-B protection voltage 0.000 V

14 Uc The secondary value of phase-C protection voltage 0.000 V

15 Uab The secondary value of phase-AB protection voltage 0.000 V

16 Ubc The secondary value of phase-BC protection voltage 0.000 V

17 Uca The secondary value of phase-CA protection voltage 0.000 V

18 UB1 The secondary value of voltage of busbar No.1 0.000 V

19 UL2 The secondary value of voltage of line No.2 0.000 V

20 UB2 The secondary value of voltage of busbar No.2 0.000 V

21 U1 The secondary value of positive-sequence voltage 0.000 V

22 U2 The secondary value of negative-sequence voltage 0.000 V

23 3U0 The secondary value of calculated residual voltage 0.000 V

24 f Frequency of protection voltage 0.000 Hz

25 P1 The secondary value of positive-sequence active power 0.000 W

26 CBx.25.f_Syn Frequency of synchronism voltage 0.000 Hz

Frequency difference between protection voltage and


27 CBx.25.f_Diff 0.000 Hz
synchronism voltages

Phase angle difference between protection voltage and


28 CBx.25.phi_Diff 0 V
synchronism voltages

Voltage difference between protection voltage and


29 CBx.25.U_Diff 0.000 V
synchronism voltages

Phase-A thermal accumulation of stage 1 of thermal


30 49-1.Accu_A 0.000 %
overload protection

Phase-A thermal accumulation of stage 1 of thermal


31 49-1.Accu_B 0.000 %
overload protection

Phase-A thermal accumulation of stage 1 of thermal


32 49-1.Accu_C 0.000 %
overload protection

Phase-A thermal accumulation of stage 2 of thermal


33 49-2.Accu_A 0.000 %
overload protection

Phase-A thermal accumulation of stage 2 of thermal


34 49-2.Accu_B 0.000 %
overload protection

Phase-A thermal accumulation of stage 2 of thermal


35 49-2.Accu_C 0.000 %
overload protection

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Date: 2014-07-29
5 Management

5.1.2 Phase Angle


Access path:

MainMenu  “Measurements”  “Measurements1”

“Measurements1” is used to display measured values from protection calculation DSP (displayed
in secondary value)

MainMenu  “Measurements”  “Measurements2”

“Measurements2” is used to display measured values from fault detector DSP (displayed in
secondary value)
No. Symbol Definition Resolution Unit

Phase angle between phase-A voltage and


1 Ang (Ua-Ub) 0 deg
phase-B voltage

Phase angle between phase-B voltage and


2 Ang (Ub-Uc) 0 deg
phase-C voltage

Phase angle between phase-C voltage and


3 Ang (Uc-Ua) 0 deg
phase-A voltage

Phase angle between phase-A voltage and


4 Ang (Ua-Ia) 0 deg
phase-A current

Phase angle between phase-B voltage and


5 Ang (Ub-Ib) 0 deg
phase-B current

Phase angle between phase-C voltage and


6 Ang (Uc-Ic) 0 deg
phase-C current

Phase angle between phase-A current and


7 CBx.Ang (Ia-Ib) 0 deg
phase-B current

Phase angle between phase-B current and


8 CBx.Ang (Ib-Ic) 0 deg
phase-C current

Phase angle between phase-C current and


9 CBx.Ang (Ic-Ia) 0 deg
phase-A current

5.1.3 Primary Value


Access path:

MainMenu  “Measurements”  “Measurements3”

“Measurements3” is used to display measured primary values and other calculated quantities
related to the measurement and control.

No. Symbol Definition Resolution Unit

1 CBx.Ia The primary value of phase-A current for circuit breaker No.x 0.000 A

2 CBx.Ib The primary value of phase-B current for circuit breaker No.x 0.000 A

3 CBx.Ic The primary value of phase-C current for circuit breaker No.x 0.000 A

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Date: 2014-07-29
5 Management

The primary value of calculated residual current for circuit


4 CBx.3I0 0.000 A
breaker No.x

The primary value of phase-A current (summation current for


5 Ia 0.000 A
double circuit breakers mode)

The primary value of phase-B current (summation current for


6 Ib 0.000 A
double circuit breakers mode)

The primary value of phase-C current (summation current for


7 Ic 0.000 A
double circuit breakers mode)

The primary value of calculated residual current (summation


8 3I0 0.000 A
current for double circuit breakers mode)

9 I1 The primary value of positive-sequence current 0.000 A

10 I2 The primary value of negative-sequence current 0.000 A

11 3I0Adj The primary value of residual current from parallel line 0.000 A

12 Ua The primary value of phase-A voltage 0.000 kV

13 Ub The primary value of phase-B voltage 0.000 kV

14 Uc The primary value of phase-C voltage 0.000 kV

15 Uab The primary value of phase-AB voltage 0.000 kV

16 Ubc The primary value of phase-BC voltage 0.000 kV

17 Uca The primary value of phase-CA voltage 0.000 kV

18 U1 The primary value of positive-sequence voltage 0.000 kV

19 U2 The primary value of negative-sequence voltage 0.000 kV

20 3U0 The primary value of calculated residual voltage 0.000 kV

21 UB1 The primary value of voltage of busbar No.1 0.000 kV

22 UL2 The primary value of voltage of line No.2 0.000 kV

23 UB2 The primary value of voltage of busbar No.2 0.000 kV

24 f Frequency of protection voltage 0.000 Hz

25 f_Syn Frequency of synchronism voltage 0.000 Hz

26 P The primary value of active power 0.000 MW

27 Q The primary value of reactive power 0.000 MVar

28 S The primary value of apparent power 0.000 MVA

29 Cos The value of power factor 0.000 -

30 Pa The primary value of phase-A active power 0.000 MW

31 Pb The primary value of phase-B active power 0.000 MW

32 Pc The primary value of phase-C active power 0.000 MW

33 Qa The primary value of phase-A reactive power 0.000 MVar

34 Qb The primary value of phase-B reactive power 0.000 MVar

35 Qc The primary value of phase-C reactive power 0.000 MVar

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Date: 2014-07-29
5 Management

36 Cosa The value of phase-A power factor 0.000 -

37 Cosb The value of phase-B power factor 0.000 -

38 Cosc The value of phase-C power factor 0.000 -

The frequency difference between reference side and


39 f_Diff 0.000 Hz
incoming side for manual closing synchrocheck

The rate of frequency change between reference side and


40 df/dt 0.000 Hz/s
incoming side for manual closing synchrocheck

Phase angle difference between reference side and incoming


41 phi_Diff 0.00 deg
side for manual closing synchrocheck

The primary value of voltage difference between reference


42 U_Diff 0.000 kV
side and incoming side for manual closing synchrocheck.

43 PHr+_Pri The primary positive active energy 0.000 MWh

44 PHr-_Pri The primary negative active energy 0.000 MWh

45 QHr+_Pri The primary positive reactive energy 0.000 MVAh

46 QHr-_Pri The primary negative reactive energy 0.000 MVAh

5.2 Recording
5.2.1 Overview
PCS-902 provides the following recording functions:

1. Event recording

2. Disturbance recording

3. Present recording

All the recording information except waveform can be viewed on local LCD or by printing.
Waveform could only be printed or extracted with PCS-Explorer software tool and a waveform
analysis software.

5.2.2 Event Recording


5.2.2.1 Overview

The device can store the latest 1024 disturbance records, 1024 binary events, 1024 supervision
events, 256 control logs and 1024 device logs. All the records are stored in non-volatile memory,
and when the available space is exhausted, the oldest record is automatically overwritten by the
latest one.

5.2.2.2 Disturbance Records

When any protection element operates or drops off, such as fault detector, distance protection etc.,
they will be logged in event records.

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5 Management

5.2.2.3 Supervision Events

The device is under automatic supervision all the time. If there are any failure or abnormal
condition detected, such as, chip damaged, VT circuit failure and so on, it will be logged in event
records.

5.2.2.4 Binary Events

When there is a binary input is energized or de-energized, i.e., its state has changed from “0” to “1”
or from “1” to “0”, it will be logged in event records.

5.2.2.5 Control Logs

When the total number of control command records reaches 256, “Control_Logs” memory area
will be full. If the device receives a new control command now, the oldest control command record
will be deleted, and then the latest control command record will be stored and displayed.

5.2.2.6 Device Logs

If an operator implements some operations on the device, such as reboot protective device,
modify setting, etc., they will be logged in event records.

5.2.3 Disturbance Recording


5.2.3.1 Application

Disturbance records can be used to have a better understanding of the behavior of the power
network and related primary and secondary equipment during and after a disturbance. Analysis of
the recorded data provides valuable information that can be used to improve existing equipment.
This information can also be used when planning for and designing new installations.

5.2.3.2 Design

A disturbance record consists of fault record and fault waveform. The disturbance record can be
initiated by fault detector element, tripping element, reclosing element or configurable signal
[BI_TrigDFR].

5.2.3.3 Capacity and Information of Disturbance Records

The device can store up to 32 disturbance records with waveform in non-volatile memory. It is
based on first in first out queue that the oldest disturbance record will be overwritten by the latest
one.

For each disturbance record, the following items are included:

1. Sequence number

Each operation will be recorded with a sequence number in the record and displayed on LCD
screen.

2. Date and time of fault occurrence

The time resolution is 1ms using the relay internal clock synchronized via clock synchronized
device if connected. The date and time is recorded when a system fault is detected.

5-6 PCS-902 Line Distance Relay


Date: 2014-07-29
5 Management

3. Relative operating time

An operating time (not including the operating time of output relays) is recorded in the record.

4. Faulty phase

5. Fault location

To get accurate result of fault location, the following settings shall be set correctly:

1) Positive-sequence line reactance [X1L]

2) Positive-sequence line resistance [R1L]

3) Zero-sequence line reactance [X0L]

4) Zero-sequence line resistance [R0L]

5) Zero-sequence line mutual reactance [X0M]

6) Zero-sequence line mutual resistance [R0M]

7) Line positive-sequence sensitive angle [21-x.phi1_Reach] or [21.Pilot.phi1_Reach]

8) Line zero-sequence sensitive angle [21-x.Real_K0] and [21-x.Imag_K0]

9) Line length in km [LineLength]

6. Protection elements

5.2.3.4 Capacity and Information of Fault Waveform

MON module can store 32 pieces of fault waveform oscillogram in non-volatile memory. If a new
fault occurs when 32 fault waveform have been stored, the oldest will be overwritten by the latest
one.

Each fault record consists of all analog and digital quantities related to protection, such as original
current and voltage, differential current, alarm elements, and binary inputs and etc.

Each waveform recording includes 12-cycles pre-fault waveform and post-waveform that is 250
cycles at least, and a completed waveform recording can record 500 cycles at most. Each cycle
waveform is high-frequency recording at a rate of 1200Hz or 1440Hz (24 points per cycle).

5.2.4 Present Recording


Present recording is a waveform triggered manually on on the device′s LCD or remotely through
PCS-Explorer software. Recording content of present recording is same to that of disturbance
recording.

Each waveform recording includes 12-cycles pre-fault waveform and 250-cycles post-fault
waveform. Each cycle waveform is high-frequency recording at a rate of 1200Hz or 1440Hz (24
points per cycle).

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5 Management

5-8 PCS-902 Line Distance Relay


Date: 2014-07-29
6 Hardware

6 Hardware

Table of Contents
6 Hardware .......................................................................................... 6-a
6.1 Overview .......................................................................................................... 6-1
6.2 Typical Wiring .................................................................................................. 6-4
6.2.1 Conventional CT/VT (For reference only) .......................................................................... 6-4

6.2.2 ECT/EVT (For reference only) ........................................................................................... 6-6

6.2.3 CT Requirement ................................................................................................................. 6-8

6.3 Plug-in Module Description ............................................................................ 6-9


6.3.1 PWR Plug-in Module (Power Supply) ................................................................................ 6-9

6.3.2 MON Plug-in Module (Monitor) ........................................................................................ 6-11

6.3.3 AI Plug-in Module (Analog Input) ..................................................................................... 6-13

6.3.4 DSP Plug-in Module (Logic Process) ............................................................................... 6-26

6.3.5 NET-DSP Plug-in Module (GOOSE and SV) ................................................................... 6-27

6.3.6 CH Plug-in Module (Fibre Optical Channel Interface) ...................................................... 6-28

6.3.7 BI Plug-in Module (Binary Input) ...................................................................................... 6-29

6.3.8 BO Plug-in Module (Binary Output) .................................................................................. 6-34

6.3.9 HMI Module...................................................................................................................... 6-37

List of Figures
Figure 6.1-1 Rear view of fixed module position ....................................................................6-1

Figure 6.1-2 Hardware diagram ................................................................................................6-2

Figure 6.1-3 Front view of PCS-902 ..........................................................................................6-3

Figure 6.1-4 Typical rear view of PCS-902 ...............................................................................6-4

Figure 6.2-1 Typical wiring of PCS-902 (conventional CT/VT) ...............................................6-5

Figure 6.2-2 Typical wiring of PCS-902 (ECT/EVT) .................................................................6-7

Figure 6.3-1 View of PWR plug-in module .............................................................................6-10

Figure 6.3-2 Output contacts of PWR plug-in module ..........................................................6-10

PCS-902 Line Distance Relay 6-a


Date: 2015-04-16
6 Hardware

Figure 6.3-3 View of MON plug-in module .............................................................................6-12

Figure 6.3-4 Connection of communication terminal ...........................................................6-13

Figure 6.3-5 Schematic diagram of CT circuit automatically closed .......................................6-14

Figure 6.3-6 Current connection of AI plug-in module (NR1401).........................................6-15

Figure 6.3-7 Voltage connection 1 of AI plug-in module (NR1401) ......................................6-15

Figure 6.3-8 Voltage connection 2 of AI plug-in module (NR1401) ......................................6-16

Figure 6.3-9 View of AI plug-in module for one CT group input (NR1401) ..........................6-16

Figure 6.3-10 Current connection of AI plug-in module (NR1408).......................................6-18

Figure 6.3-11 Voltage connection 1 of AI plug-in module (NR1408) ....................................6-18

Figure 6.3-12 Voltage connection 2 of AI plug-in module (NR1408) ....................................6-19

Figure 6.3-13 View of AI plug-in module for one CT group input (NR1408) ........................6-19

Figure 6.3-14 Current connection of AI plug-in module (NR1401).......................................6-21

Figure 6.3-15 Voltage connection of AI plug-in module (NR1401) .......................................6-21

Figure 6.3-16 View of AI plug-in module for two CT group input (NR1401) ........................6-22

Figure 6.3-17 Current connection of AI plug-in module (NR1401).......................................6-23

Figure 6.3-18 Voltage connection of AI plug-in module (NR1401) .......................................6-24

Figure 6.3-19 View of AI plug-in module for two CT group input (NR1401) ........................6-24

Figure 6.3-20 View of DSP plug-in module ............................................................................6-26

Figure 6.3-21 View of NET-DSP plug-in module ....................................................................6-27

Figure 6.3-22 View of CH plug-in module ..............................................................................6-28

Figure 6.3-23 Debouncing technique .....................................................................................6-29

Figure 6.3-24 View of BI plug-in module (NR1503) ...............................................................6-30

Figure 6.3-25 View of BI plug-in module (NR1504) ...............................................................6-31

Figure 6.3-26 View of BO plug-in module (NR1521A) ...........................................................6-35

Figure 6.3-27 View of BO plug-in module (NR1521C) ...........................................................6-35

Figure 6.3-28 View of BO plug-in module (NR1521F) ...........................................................6-36

Figure 6.3-29 View of BO plug-in module (NR1521G) ...........................................................6-37

List of Tables
Table 6.3-1 Terminal definition and description of PWR plug-in module ............................6-10

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6 Hardware

Table 6.3-2 Terminal definition of AI module (NR1401).........................................................6-16

Table 6.3-3 Terminal definition of AI module (NR1408).........................................................6-19

Table 6.3-4 Terminal definition of AI module (NR1401).........................................................6-22

Table 6.3-5 Terminal definition of AI module (NR1401).........................................................6-25

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Date: 2015-04-16
6 Hardware

6.1 Overview
PCS-902 adopts 32-bit microchip processor CPU produced by FREESCALE as control core for
management and monitoring function, meanwhile, adopts high-speed digital signal processor DSP
for all the protection calculation. 24 points are sampled in every cycle and parallel processing of
sampled data can be realized in each sampling interval to ensure ultrahigh reliability and safety of
the device.

PCS-902 is comprised of intelligent plug-in modules, except that few particular plug-in modules’
position cannot be changed in the whole device (gray plug-in modules as shown in Figure 6.1-1),
other plug-in modules like AI (analog input) and IO (binary input and binary output) can be flexibly
configured in the remaining slot positions.
MON module

PWR module
DSP module

DSP module
CH Module

BO module

BO module

BO module

BO module
AI module

BI module

BI module

Slot No.
01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 P1

Figure 6.1-1 Rear view of fixed module position

PCS-902 has 16 slots, PWR plug-in module, MON plug-in module, DSP plug-in module and CH
plug-in module are assigned at fixed slots.

Besides 5 fixed modules are shown in above figure, there are 12 slots can be flexibly configured.
AI plug-in module, BI plug-in module and BO plug-in module can be configured at position
between slot 02, 03 and 06~15. It should be pay attention that AI plug-in module will occupy two
slots.

This device is developed on the basis of our latest software and hardware platform, and the new
platform major characteristics are of high reliability, networking and great capability in
anti-interference. See Figure 6.1-2 for hardware diagram.

PCS-902 Line Distance Relay 6-1


Date: 2015-04-16
6 Hardware

Output Relay
Binary Input
External
Protection
Conventional CT/VT A/D Calculation
DSP

ECVT

Fault
A/D Detector Pickup
DSP Relay

ECVT
ETHERNET
LCD +E
Clock SYN
Power
Uaux LED CPU
Supply
RJ45
Keypad
PRINT

Figure 6.1-2 Hardware diagram

The working process of the device is as shown in above figure: current and voltage from
conventional CT/VT are converted into small voltage signal and sent to DSP module after filtered
and A/D conversion for protection calculation and fault detector respectively (ECVT signal is sent
to the device without small signal and A/D convertion). When DSP module completes all the
protection calculation, the result will be recorded in 32-bit CPU on MON module. DSP module
carries out fault detector, protection logic calculation, tripping output, and MON module perfomes
SOE (sequence of event) record, waveform recording, printing, communication between the
device and SAS and communication between HMI and CPU. When fault detector detects a fault
and picks up, positive power supply for output relay is provided.

The items can be flexibly configured depending on the situations like sampling method of the
device (conventional CT/VT or ECT/EVT), and the mode of binary output (conventional binary
output or GOOSE binary output). The configurations for PCS-900 series based on microcomputer
are classified into standard and optional modules.

Table 6.1-1 PCS-902 module configuration

No. ID Module description Remark


1 NR1101/NR1102 Management and monitor module (MON module) standard
2 NR1401 Analog input module (AI module ) standard

3 NR1161 Protection calculation and fault detector module (DSP module) standard

4 NR1213 Protection communication channel module (CH module) option


5 NR1503/NR1504 Binary input module (BI module) standard

6 NR1521 Binary output module (BO module) standard

7 NR1301 Power supply module (PWR module) standard

6-2 PCS-902 Line Distance Relay


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6 Hardware

No. ID Module description Remark


GOOSE and SV from merging unit by IEC61850-9-2 (NET-DSP
8 NR1136 option
module)
9 Human machine interface module (HMI module) standard

 MON module provides functions like communication with SAS, event record, setting
management etc.

 AI module converts AC current and voltage from current transformers and voltage
transformers respectively to small voltage signal.

 DSP module performs filtering, sampling, protection calculation and fault detector calculation.

 CH module performs information exchange with the remote device through a dedicated
optical fibre channel, multiplex optical fibre channel or PLC channel.

 BI module provides binary inputs via opto-couplers with rating voltage among
24V/110V/125V/220V/250V (configurable).

 BO module provides output contacts for tripping, and signal output contact for annunciation
signal, remote signal, fault and disturbance signal, operation abnormal signal etc.

 PWR module converts DC 250/220/125/110V into various DC voltage levels for modules of
the device.

 HMI module is comprised of LCD, keypad, LED indicators and multiplex RJ45 ports for user
as human-machine interface.

 NET-DSP module receives and sends GOOSE messages, sampled values (SV) from
merging unit by IEC61850-9-2 protocol.

PCS-902 is made of a 4U height 19” chassis for flush mounting. Components mounted on its front
include a 320×240 dot matrix LCD, a 9 button keypad, 20 LED indicators and a multiplex RJ45
port. A monolithic micro controller is installed in the equipment for these functions.

Following figures show front and rear views of PCS-902 respectively.

1 11
HEALTHY PCS-902
2 12
ALARM
3 13

4 14
GRP

5 15

6 16 ENT
ESC

7 17

8 18

9 19

10 20

Figure 6.1-3 Front view of PCS-902

PCS-902 Line Distance Relay 6-3


Date: 2015-04-16
6 Hardware

20 LED indicators are, from top to bottom, operation (HEALTHY), self-supervision (ALARM),
others are configurable.

For the 9-button keypad, “ENT” is “enter”, “GRP” is “group number” and “ESC” is “escape”.

NR1102 NR1401 NR1161 NR1213 NR1161 NR1504 NR1504 NR1521 NR1521 NR1521 NR1521 NR1301
5V OK ALM

TX
BO_ALM BO_FAIL

RX
ON
TX
OFF
RX

DANGER
1 BO_COM1
2 BO_FAIL

3 BO_ALM

4 BO_COM2

5 BO_FAIL

6 BO_ALM

7 OPTO+

8 OPTO-

9
10 PWR+

11 PWR-

12 GND

Figure 6.1-4 Typical rear view of PCS-902

6.2 Typical Wiring


6.2.1 Conventional CT/VT (For reference only)

NR1102 NR1401 NR1161 NR1213 NR1161 NR1504 NR1521A NR1521C NR1521C NR1521F NR1301
MON module

PWR module
DSP module

DSP module
CH Module

BO module

BO module

BO module

BO module
AI module

BI module

Slot No.
01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 P1

The following typical wiring is given based on above hardware configuration

6-4 PCS-902 Line Distance Relay


Date: 2015-04-16
6 Hardware

Power supply supervision 0801


CH-TX

CH-RX BI_01 + 0802


Dedicated Channel

*BI plug-in module can be independent common terminal


Or or
Telecom Equipment


CH-TX

CH-RX BI_06 + 0807

Fibre Optic Not used 0808


FC/PC Type (Rear)
BI_07 + 0809
0201
0202 Ia


0203
0204 Ib BI_12 + 0814
0205
To parallel line Ic Not used 0815
0206
0207 BI_13 + 0816
From parallel line 0208 IM0


0213
Protection Voltage

0214 Ua BI_18 + 0821


0215
Ub - 0822
0216
0217
Uc 1101

Controlled by fault
0218

detector element
BO_01 1102
1103
0219
Synchronism Voltage

BO_02 1104
0220 UB1


1121
0221 BO_11
UL2 1122
0222
0223
1201
Signal Binary Output

0224 UB2
BO_01 1202
1203
PWR+ P110 BO_02
External DC power Power 1204

supply P111 Supply 1221


PWR-
P107 BO_11 1222
OPTO+
Power supply for
opto-coupler (24V) P108
OPTO- 1301
Signal Binary Output

P102 BO_01 1302


BO_FAIL
(option)

P103 BO_ALM 1303


P101 BO_02 1304
COM

P105 BO_FAIL 1321


P106 BO_11 1322
BO_ALM
P104 COM
1501
A 0101 BO_CtrlOpn1 1502
cable with single point earthing
To the screen of other coaxial

Signal Binary Output (option)

B 0102
COM

1503
SGND 0103 BO_CtrlCls1 1504
0104

SYN+ 0101 1517


Clock SYN

BO_CtrlOpn5 1518
SYN- 0102
SGND 0103 1519
BO_CtrlCls5 1520
0104
1521
PRINTER

RTS 0105 BO_Ctrl 1522


PRINT

TXD 0106
Multiplex P112
SGND 0107 RJ45 (Front)
0225
Grounding
Bus

Figure 6.2-1 Typical wiring of PCS-902 (conventional CT/VT)

PCS-902 Line Distance Relay 6-5


Date: 2015-04-16
6 Hardware

PCS-902 (conventional CT/VT and conventional binary input and binary output)

Slot No. 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 P1

Module ID NR1102 NR1401 NR1161 NR1213 NR1504 NR1504 NR1521 NR1521 NR1521 NR1521 NR1301

MON AI DSP CH BI BI BO BO BO BO PWR

PCS-902 (conventional CT/VT and GOOSE binary input and binary output)

Slot No. 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 P1

Module ID NR1102 NR1401 NR1161 NR1213 NR1136 NR1504 NR1301


NET-
MON AI DSP CH BI PWR
DSP

6.2.2 ECT/EVT (For reference only)

NR1102 NR1161 NR1213 NR1161 NR1136 NR1503 NR1521A NR1521C NR1301

NET-DSP Module
MON module

PWR module
DSP module

DSP module
CH Module

BO module

BO module
BI module

Slot No.
01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 P1

The following typical wiring is given based on above hardware configuration

6-6 PCS-902 Line Distance Relay


Date: 2015-04-16
6 Hardware

CH-TX BI_01 + 0801

*BI plug-in module can be common negative


- 0802
CH-RX
Dedicated Channel
Or or BI_02 + 0803
Telecom Equipment
CH-TX - 0804

terminal
CH-RX BI_03 + 0805

Fibre Optic FC/PC Type (Rear) - 0806


BI_11 + 0821
Phase A RX

FO interface for SV channel


SV from
ECT/EVT - 0822
MU

Phase B
(LC Type)
Up to 8

Phase C TX 1101

Controlled by fault
detector element
BO_01 1102

1103
BO_02 1104


1121
BO_11 1122

PWR+ P110
External DC power Power
1201

Signal Binary Output


supply P111 Supply
PWR- BO_01 1202
OPTO+ P107
Power supply for 1203
opto-coupler (24V) P108 BO_02 1204
OPTO-


1221
P102 BO_FAIL BO_11 1222
P103 BO_ALM
P101 COM 1501
P105 BO_FAIL BO_CtrlOpn1 1502
P106
Signal Binary Output (option)

BO_ALM 1503
P104 COM BO_CtrlCls1 1504


A 0101
B 0102 1517
COM
cable with single point earthing
To the screen of other coaxial

BO_CtrlOpn5 1518
SGND 0103
0104 1519
BO_CtrlCls5 1520
SYN+ 0101 1521
Clock SYN

SYN- 0102 BO_Ctrl 1522


SGND 0103
0104 IRIG-B
PRINTER

RTS 0105
PRINT

P112
TXD 0106
Multiplex
SGND 0107 RJ45 (Front) 0225 Grounding
Bus

Figure 6.2-2 Typical wiring of PCS-902 (ECT/EVT)

PCS-902 ECT/EVT, GOOSE binary input and binary output

Slot No. 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 P1

Module ID NR1102 NR1161 NR1213 NR1136 NR1504 NR1301


NET-
MON DSP CH BI PWR
DSP

PCS-902 ECT/EVT, conventional binary input and binary output

Slot No. 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 P1

Module ID NR1102 NR1161 NR1213 NR1136 NR1504 NR1504 NR1521 NR1521 NR1521 NR1521 NR1301
NET-
MON DSP CH BI BI BO BO BO BO PWR
DSP

PCS-902 Line Distance Relay 6-7


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6 Hardware

In the protection system adopting electronic current and voltage transformer (ECT/EVT), the
merging unit will merge the sample data from ECT/EVT, and then send it to the device through
multi-mode optical fibre. DSP module receives the data from merging unit through the optical-fibre
interface to complete the protection calculation and fault detector.

The difference between the hardware platform based on ECT/EVT and the hardware platform
based on conventional CT/VT lies in the receiving module of sampled values only, and the device
receives the sampled value from merging unit through multi-mode optical fibre.

6.2.3 CT Requirement
-Rated primary current Ipn:

According to the rated current or maximum load current of primary apparatus.

-Rated continuous thermal current Icth:

According to the maximum load current.

-Rated short-time thermal current Ith and rated dynamic current Idyn:

According to the maximum fault current.

-Rated secondary current Isn

-Accuracy limit factor Kalf:

Ipn Rated primary current (amps)


Icth Rated continuous thermal current (amps)
Ith Rated short-time thermal current (amps)
Idyn Rated dynamic current (amps)
Isn Rated secondary current (amps)
Kalf Accuracy limit factor ()Kalf=Ipal/Ipn
IPal Rated accuracy limit primary current (amps)

Performance verification

Esl > Esl′

Rated secondary limiting e.m.f (volts)


Esl
Esl = kalf×Isn×(Rct+Rbn)
Kalf Accuracy limit factor (Kalf=Ipal/Ipn)
IPal Rated accuracy limit primary current (amps)
Ipn Rated primary current (amps)
Isn Rated secondary current (amps)
Rct Current transformer secondary winding resistance. (ohms)
Rated resistance burden (ohms)
Rbn
Rbn=Sbn/Isn2
Sbn Rated burden (VAs)

Esl′ Required secondary limiting e.m.f (volts)

6-8 PCS-902 Line Distance Relay


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6 Hardware

Esl′ = k×Ipcf ×Isn×(Rct+Rb)/Ipn


k stability factor = 2
Protective checking factor current (amps)
Ipcf
Same as the maximum prospective fault current
Isn Rated secondary current (amps)
Rct Current transformer secondary winding resistance. (ohms)
Real resistance burden (ohms)
Rb
Rb=Rr+2×RL+Rc
Rc Contact resistance, 0.05-0.1 ohm (ohms)
RL Resistance of a single lead from relay to current transformer (ohms)
Rr Impedance of relay phase current input (ohms)
Ipn Rated primary current (amps)

For example:

1. Kalf=30, Isn=5A, Rct=1ohm, Sbn=60VA

Esl = kalf×Isn×(Rct+Rbn) = kalf×Isn×(Rct+ Sbn/ Isn2)

= 30×5×(1+60/25)=510V

2. Ipcf=40000A, RL=0.5ohm, Rr=0.1ohm, Rc=0.1ohm, Ipn=2000A

Esl′ = 2×Ipcf×Isn×(Rct+Rb)/Ipn

= 2×Ipcf ×Isn×(Rct+(Rr+2×RL+Rc))/Ipn

= 2×40000×5×(1+(0.1+2×0.5+0.1))/2000=440V

Thus, Esl > Esl′

6.3 Plug-in Module Description


The device consists of PWR plug-in module, MON plug-in module, DSP plug-in module, AI plug-in
module, BI plug-in module, BO plug-in module, CH plug-in module and NET-DSP plug-in module.
Terminal definitions and application of each plug-in module are introduced as follows.

6.3.1 PWR Plug-in Module (Power Supply)


PWR module is a DC/DC converter with electrical insulation between input and output. It has an
input voltage range as described in Chapter 2 “Technical Data”. The standardized output voltages
are +5V and +24V DC. The tolerances of the output voltages are continuously monitored.

The +5V DC output provides power supply for all the electrical elements that need +5V DC power
supply in this device.

The use of an external miniature circuit breaker is recommended. The miniature circuit breaker
must be in the on position when the device is in operation and in the off position when the device is
in cold reserve.

A 12-pin connector is fixed on PWR module. The terminal definition of the connector is described

PCS-902 Line Distance Relay 6-9


Date: 2015-04-16
6 Hardware

as below.

NR1301

5V OK ALM

BO_ALM BO_FAIL

ON

OFF

1 BO_COM1
2 BO_FAIL
3 BO_ALM
4 BO_COM2
5 BO_FAIL
6 BO_ALM
7 OPTO+
8 OPTO-
9
10 PWR+
11 PWR-
12 GND

Figure 6.3-1 View of PWR plug-in module

The power switch in the dotted box of above figure maybe is not existed.

01
BO_FAIL
02
BO_ALM
03

04
BO_FAIL
05
BO_ALM
06

Figure 6.3-2 Output contacts of PWR plug-in module

Terminal definition and description is shown as follows:

Table 6.3-1 Terminal definition and description of PWR plug-in module

Terminal No. Symbol Description

01 BO_COM1 Common terminal 1

02 BO_FAIL Device failure output 1 (01-02, NC)

03 BO_ALM Device abnormality alarm output 1 (01-03, NO)

04 BO_COM2 Common terminal 2

05 BO_FAIL Device failure output 2 (04-05, NC)

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6 Hardware

Terminal No. Symbol Description

06 BO_ALM Device abnormality alarm output 2 (04-06, NO)

07 OPTO+ Positive power supply for BI module (24V)

08 OPTO- Negative power supply for BI module (24V)

09 Blank Not used

10 PWR+ Positive input of power supply for the device (250V/220V/125V/110V)

11 PWR- Negative input of power supply for the device (250V/220V/125V/110V)

12 GND Grounded connection of the power supply

Note!

The standard rated voltage of PWR module is self-adaptive to 88~300 Vdc. If input voltage
is out of range, an alarm signal (Fail_Device) will be issued. For non-standard rated
voltage power supply module please specify when place order, and check if the rated
voltage of power supply module is the same as the voltage of power source before the
device being put into service.

PWR module provides terminal 12 and grounding screw for device grounding. Terminal 12
shall be connected to grounding screw and then connected to the earth copper bar of
panel via dedicated grounding wire.

Effective grounding is the most important measure for a device to prevent EMI, so effective
grounding must be ensured before the device is put into service.

PCS-902, like almost all electronic relays, contains electrolytic capacitors. These
capacitors are well known to be subject to deterioration over time if voltage is not applied
periodically. Deterioration can be avoided by powering the relays up once a year.

6.3.2 MON Plug-in Module (Monitor)


MON module consists of high-performance built-in processor, FLASH, SRAM, SDRAM, Ethernet
controller and other peripherals. Its functions include management of the complete device, human
machine interface, communication and waveform recording etc.

MON module uses the internal bus to receive the data from other modules of the device. It
communicates with the LCD module by RS-485 bus. This module comprises 100BaseT Ethernet
interfaces, RS-485 communication interfaces that exchange information with above system by
using IEC 61850, PPS/IRIG-B differential time synchronization interface and RS-232 printing
interface.

Modules with various combinations of memory and interface are available as shown in the table
below.

PCS-902 Line Distance Relay 6-11


Date: 2015-04-16
6 Hardware

NR1102D NR1102I NR1101E

TX
ETHERNET ETHERNET
RX

TX

RX

ETHERNET

Figure 6.3-3 View of MON plug-in module

Module ID Memory Interface Terminal No. Usage Physical Layer


4 RJ45 Ethernet To SCADA
01 SYN+
02 SYN- To clock Twisted pair wire
RS-485
03 SGND synchronization
NR1102D 128M DDR
04
05 RTS
RS-232 06 TXD To printer Cable
07 SGND
2 RJ45 Ethernet To SCADA Twisted pair wire
2 FO Ethernet To SCADA Optical fibre ST
01 SYN+
02 SYN- To clock
RS-485 Twisted pair wire
NR1102I 128M DDR 03 SGND synchronization
04
05 RTS
RS-232 06 TXD To printer Cable
07 SGND
2 RJ45 Ethernet To SCADA
01 A
NR1101E 128M DDR Twisted pair wire
RS-485 02 B To SCADA
03 SGND

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04
05 A
06 B
RS-485 To SCADA
07 SGND
08
09 SYN+
10 SYN- To clock
RS-485
11 SGND synchronization
12
13 RTS
RS-232 14 TXD To printer Cable
15 SGND
16

The correct connection is shown in Figure 6.3-4. Generally, the shielded cable with two pairs of
twisted pairs inside shall be applied. One pair of the twisted pairs are respectively used to connect
the “+” and “–” terminals of difference signal. The other pair of twisted pairs are used to connect
the signal ground of the communication interface. The module reserves a free terminal for all the
communication ports. The free terminal has no connection with any signal of the device, and it is
used to connect the external shields of the cable when connecting multiple devices in series. The
external shield of the cable shall be grounded at one of the ends only.

Twisted pair wire


A 01

B 02
COM

SGND 03
cable with single point earthing
To the screen of other coaxial

04

Twisted pair wire


SYN+ 01
Clock SYN

SYN- 02

SGND 03

04

Cable
RTS 05
PRINT

TXD 06

SGND 07

Figure 6.3-4 Connection of communication terminal

6.3.3 AI Plug-in Module (Analog Input)


AI module is applicable for power plant or substation with conventional VT and CT. It is assigned to
slot numbers 02 and 03. However, the module is not required if the device is used with ECT/EVT.

For AI module, if the plug is not put in the socket, external CT circuit is closed itself. Just shown as
below.

PCS-902 Line Distance Relay 6-13


Date: 2015-04-16
6 Hardware

Plug
Socket

In

Out

plug is not put in the socket

In

Out

Put the plug in the socket

Figure 6.3-5 Schematic diagram of CT circuit automatically closed

There are three types of AI module with rating 1A (NR1401), 5A (NR1401) or 1A/5A (NR1408).
Please declare which kind of AI module is needed before ordering. Maximum linear range of the
current converter is 40In.

1. One CT group input without synchronism voltage switchover (optional NR1401 or NR1408)

 NR1401

For one CT group input, three phase currents (Ia, Ib and Ic) and residual current from parallel line
(for mutual compensation) are input to AI module separately. Terminal 01, 03, 05 and 07 are
polarity marks. It is assumed that polarity mark of CT installed on line is at line side.

Three phase voltages (Ua, Ub, and Uc) for protection calculation and one synchronism voltage are
input to AI module. The synchronism voltage could be any phase-to-ground voltage or
phase-to-phase voltage.

If the auto-reclosing is enabled but synchronism check is not required, the synchronism voltage
should be disconnected.

In order to accurately locate the fault for parallel lines arrangement, residual current from parallel
line is required to be connected to the device to eliminate the mutual effect between the parallel
lines. Otherwise, residual current from parallel line is not necessary.

Relevant description about parallel line to refer to section “Fault Location”.

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Date: 2015-04-16
6 Hardware

P2 S2 P2 S2

P1 S1 P1 S1

02 01 02 01

04 03 04 03

06 05 06 05

08 07 08 07

Figure 6.3-6 Current connection of AI plug-in module (NR1401)

13 14

15 16

17 18

19 20

Figure 6.3-7 Voltage connection 1 of AI plug-in module (NR1401)

PCS-902 Line Distance Relay 6-15


Date: 2015-04-16
6 Hardware

13 14

15 16

17 18

19 20

Figure 6.3-8 Voltage connection 2 of AI plug-in module (NR1401)

Ia 01 Ian 02
NR1401
Ib 03 Ibn 04

Ic 05 Icn 06

IM0 07 IM0n 08

09 10

11 12

Ua 13 Uan 14

Ub 15 Ubn 16

Uc 17 Ucn 18

Us 19 Usn 20

21 22

23 24

Figure 6.3-9 View of AI plug-in module for one CT group input (NR1401)

Table 6.3-3 lists the terminal number and definition of AI module.

Table 6.3-2 Terminal definition of AI module (NR1401)

Terminal No. Definition Definition


01 Ia The current of A-phase (Polarity mark)

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Terminal No. Definition Definition


02 Ian The current of A-phase
03 Ib The current of B-phase (Polarity mark)
04 Ibn The current of B-phase
05 Ic The current of C-phase (Polarity mark)
06 Icn The current of C-phase
07 IM0 Residual current of parallel line (Polarity mark)
08 IM0n Residual current of parallel line
09 Reserve
10 Reserve
11 Reserve
12 Reserve
13 Ua The voltage of A-phase (Polarity mark)
14 Uan The voltage of A-phase
15 Ub The voltage of B-phase (Polarity mark)
16 Ubn The voltage of B-phase
17 Uc The voltage of C-phase (Polarity mark)
18 Ucn The voltage of C-phase
19 Us Synchronism voltage (Polarity mark)
20 Usn Synchronism voltage
21 Reserve
22 Reserve
23 Reserve
24 Reserve
25 GND Ground

 NR1408

For one CT group input, three phase currents (Ia, Ib and Ic) and residual current from parallel line
(for mutual compensation) are input to AI module separately. Terminal 01 (or 03), 05 (or 07), 09 (or
11) and 13 (or 15) are polarity marks. It is assumed that polarity mark of CT installed on line is at
line side.

Three phase voltages (Ua, Ub, and Uc) for protection calculation and one synchronism voltage are
input to AI module. The synchronism voltage could be any phase-to-ground voltage or
phase-to-phase voltage.

If the auto-reclosing is enabled but synchronism check is not required, the synchronism voltage
should be disconnected.

In order to accurately locate the fault for parallel lines arrangement, residual current from parallel
line is required to be connected to the device to eliminate the mutual effect between the parallel
lines. Otherwise, residual current from parallel line is not necessary.

Relevant description about parallel line to refer to section “Fault Location”.

PCS-902 Line Distance Relay 6-17


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6 Hardware

P2 S2 P2 S2

P1 S1 P1 S1

02/04 01/03 02/04 01/03

06/08 05/07 06/08 05/07

10/12 09/11 10/12 09/11

14/16 13/15 14/16 13/15

Figure 6.3-10 Current connection of AI plug-in module (NR1408)

17 18

19 20

21 22

23 24

Figure 6.3-11 Voltage connection 1 of AI plug-in module (NR1408)

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17 18

19 20

21 22

23 24

Figure 6.3-12 Voltage connection 2 of AI plug-in module (NR1408)

Ia-1A 01 Ian-1A 02
NR1408
Ia-5A 03 Ian-5A 04

Ib-1A 05 Ibn-1A 06

Ib-5A 07 Ibn-5A 08

Ic-1A 09 Icn-1A 10

Ic-5A 11 Icn-5A 12

IM0-1A 13 IM0n-1A 14

IM0-5A 15 IM0n-5A 16

Ua 17 Uan 18

Ub 19 Ubn 20

Uc 21 Ucn 22

Us 23 Usn 24

Figure 6.3-13 View of AI plug-in module for one CT group input (NR1408)

Table 6.3-3 lists the terminal number and definition of AI module.

Table 6.3-3 Terminal definition of AI module (NR1408)

Terminal No. Definition Definition


01 Ia-1A The current of A-phase (Polarity mark)

PCS-902 Line Distance Relay 6-19


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Terminal No. Definition Definition


02 Ian-1A The current of A-phase
03 Ia-5A The current of A-phase (Polarity mark)
04 Ian-5A The current of A-phase
05 Ib-1A The current of B-phase (Polarity mark)
06 Ibn-1A The current of B-phase
07 Ib-5A The current of B-phase (Polarity mark)
08 Ibn-5A The current of B-phase
09 Ic-1A The current of C-phase (Polarity mark)
10 Icn-1A The current of C-phase
11 Ic-5A The current of C-phase (Polarity mark)
12 Icn-5A The current of C-phase
13 IM0-1A Residual current of parallel line (Polarity mark)
14 IM0n-1A Residual current of parallel line
15 IM0-5A Residual current of parallel line (Polarity mark)
16 IM0n-5A Residual current of parallel line
17 Ua The voltage of A-phase (Polarity mark)
18 Uan The voltage of A-phase
19 Ub The voltage of B-phase (Polarity mark)
20 Ubn The voltage of B-phase
21 Uc The voltage of C-phase (Polarity mark)
22 Ucn The voltage of C-phase
23 Us Synchronism voltage (Polarity mark)
24 Usn Synchronism voltage
25 GND Ground

2. Two CT groups input with synchronism voltage switchover (only NR1401)

For two circuit breakers configuration with two CT groups input, three phase currents
corresponding to CB1 and CB2 respectively (Ia1, Ib1, Ic1 and Ia2, Ib2, Ic2) are input to AI module.
Terminal 01, 03, 05, 07, 09 and 11 are polarity marks. It is assumed that polarity mark of CT
installed on line is at line side.

Three phase voltages (Ua, Ub, and Uc) are input to AI module. UB1, UB2 and UL2 are the
synchronism voltage from bus VT and line VT used for synchrocheck, it could be any
phase-to-ground voltage or phase-to-phase voltage. The device can automatically switch
synchronism voltage according to auxiliary contact of CB position or DS position.

If the auto-reclosing is enabled but synchronism check is not required, the synchronism voltage
should be disconnected.

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P2 P1 P1 P2 A

S2 S1 S1 S2 C

02 01

04 03

06 05

08 07

10 09

12 11

Figure 6.3-14 Current connection of AI plug-in module (NR1401)

A B C A B C

13 14

15 16

17 18

19 20

21 22

23 24

Figure 6.3-15 Voltage connection of AI plug-in module (NR1401)

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6 Hardware

Ia1 01 Ia1n 02
NR1401
Ib1 03 Ib1n 04

Ic1 05 Ic1n 06

Ia2 07 Ia2n 08

Ib2 09 Ib2n 10

Ic2 11 Ic2n 12

Ua 13 Uan 14

Ub 15 Ubn 16

Uc 17 Ucn 18

UB1 19 UB1n 20

UL2 21 UL2n 22

UB2 23 UB2n 24

Figure 6.3-16 View of AI plug-in module for two CT group input (NR1401)

Table 6.3-4 lists the terminal number and definition of AI module.

Table 6.3-4 Terminal definition of AI module (NR1401)

Terminal No. Definition Definition


01 Ia1 The current of A-phase (Polarity mark)
02 Ia1n The current of A-phase
03 Ib1 The current of B-phase (Polarity mark)
04 Ib1n The current of B-phase
05 Ic1 The current of C-phase (Polarity mark)
06 Ic1n The current of C-phase
07 Ia2 The current of A-phase (Polarity mark)
08 Ia2n The current of A-phase
09 Ib2 The current of B-phase (Polarity mark)
10 Ib2n The current of B-phase
11 Ic2 The current of C-phase (Polarity mark)
12 Ic2n The current of C-phase
13 Ua The voltage of A-phase (Polarity mark)
14 Uan The voltage of A-phase
15 Ub The voltage of B-phase (Polarity mark)
16 Ubn The voltage of B-phase
17 Uc The voltage of C-phase (Polarity mark)
18 Ucn The voltage of C-phase
19 UB1 The voltage of bus 1 (Polarity mark)
20 UB1n The voltage of bus 1

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Terminal No. Definition Definition


21 UL2 The voltage of line 2 (Polarity mark)
22 UL2n The voltage of line 2
23 UB2 The voltage of bus 2 (Polarity mark)
24 UB2n The voltage of bus 2
25 GND Ground

3. Two CT groups input without synchronism voltage switchover (only NR1401)

For two circuit breakers configuration with two CT groups input, three phase currents
corresponding to CB1 and CB2 respectively (Ia1, Ib1, Ic1 and Ia2, Ib2, Ic2), and residual current
from parallel line (for mutual compensation) are input to AI module. Terminal 01, 03, 05, 07, 09, 11
and 13 are polarity marks. It is assumed that polarity mark of CT installed on line is at line side.

Three phase voltages (Ua, Ub, and Uc) for protection calculation and one synchronism voltage are
input to AI module. The synchronism voltage could be any phase-to-ground voltage or
phase-to-phase voltage.

If the auto-reclosing is enabled but synchronism check is not required, the synchronism voltage
should be disconnected.

P2 P1 P1 P2 A

S2 S1 S1 S2 C

02 01

04 03

06 05

08 07

10 09

12 11

To parallel line
14 13
From parallel line

Figure 6.3-17 Current connection of AI plug-in module (NR1401)

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6 Hardware

A B C A B C

15 16

17 18

19 20

21 22

23 24

Figure 6.3-18 Voltage connection of AI plug-in module (NR1401)

Ia1 01 Ia1n 02
NR1401
Ib1 03 Ib1n 04

Ic1 05 Ic1n 06

Ia2 07 Ia2n 08

Ib2 09 Ib2n 10

Ic2 11 Ic2n 12

IM0 13 IM0n 14

Ua 15 Uan 16

Ub 17 Ubn 18

Uc 19 Ucn 20

Us 21 Usn 22

23 24

Figure 6.3-19 View of AI plug-in module for two CT group input (NR1401)

Table 6.3-5 lists the terminal number and definition of AI module.

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Table 6.3-5 Terminal definition of AI module (NR1401)

Terminal No. Definition Definition


01 Ia1 The current of A-phase (Polarity mark)
02 Ia1n The current of A-phase
03 Ib1 The current of B-phase (Polarity mark)
04 Ib1n The current of B-phase
05 Ic1 The current of C-phase (Polarity mark)
06 Ic1n The current of C-phase
07 Ia2 The current of A-phase (Polarity mark)
08 Ia2n The current of A-phase
09 Ib2 The current of B-phase (Polarity mark)
10 Ib2n The current of B-phase
11 Ic2 The current of C-phase (Polarity mark)
12 Ic2n The current of C-phase
13 IM0 Residual current of parallel line (Polarity mark)
14 IM0n Residual current of parallel line
15 Ua The voltage of A-phase (Polarity mark)
16 Uan The voltage of A-phase
17 Ub The voltage of B-phase (Polarity mark)
18 Ubn The voltage of B-phase
19 Uc The voltage of C-phase (Polarity mark)
20 Ucn The voltage of C-phase
21 Us Synchronism voltage (Polarity mark)
22 Usn Synchronism voltage
23 Reserve
24 Reserve
25 GND Ground

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6 Hardware

6.3.4 DSP Plug-in Module (Logic Process)

NR1161

Figure 6.3-20 View of DSP plug-in module

This device can be equipped with 2 DSP plug-in modules at most and 1 DSP plug-in module at
least. The default DSP plug-in module is necessary, which mainly is responsible for protection
function including fault detector and protection calculation.

The default module consists of high-performance double DSP (digital signal processor),16-digit
high-accuracy ADC that can perform synchronous sampling and manage other peripherals. One
of double DSP is responsible for protection calculation, and can fulfill analog data acquisition,
protection logic calculation and tripping output. The other is responsible for fault detector, and can
fulfill analog data acquisition, fault detector and providing power supply to output relay.

When the module is connected with conventional CT/VT, it can perform the synchronous data
acquisition through AI plug-in module. When the module is connected with ECT/EVT, it can
receive the real-time synchronous sampled value from merging unit through NET-DSP plug-in
module.

The other module is optional and it is not required unless control and manual closing with
synchronism check are equppied with this device. The default DSP plug-in module is fixed at slot
04 and the option DSP plug-in module is fixed at slot 06.

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6.3.5 NET-DSP Plug-in Module (GOOSE and SV)

NR1136A NR1136C

RX

Figure 6.3-21 View of NET-DSP plug-in module

This module consists of high-performance DSP (digital signal processor), 2~8 100Mbit/s
optical-fibre interface (LC type) and selectable IRIG-B interface (ST type). It supports GOOSE and
SV by IEC 61850-9-2 protocols. It can receive and send GOOSE messages to intelligent control
device, and receive SV from MU (merging unit).

This module supports IEEE1588 network time protocol, E2E and P2P defined in IEEE1588
protocol can be selected. This module supports Ethernet IEEE802.3 time adjustment message
format, UDP time adjustment message format and GMRP.

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6 Hardware

6.3.6 CH Plug-in Module (Fibre Optical Channel Interface)

NR1213 NR1213 NR1213 NR1213


NR1214 NR1214

TX TX TX TX

RX RX RX RX

TX TX

RX RX TX1 TX1

RX1 RX1

TX1

RX1

NR1213A NR1213A-100 NR1213B NR1213B-100 NR1214A NR1214B

Figure 6.3-22 View of CH plug-in module

Type Wavelength Application


NR1213A 1310nm Single-mode, single channel, transmission distance <40 km
NR1213A-100 1550nm Single-mode, single channel, transmission distance <100 km
NR1213B 1310nm Single-mode, dual channels, transmission distance <40 km
NR1213B-100 1550nm Single-mode, dual channels, transmission distance <100 km
NR1214A 830nm Multi-mode, single channel, transmission distance <2 km
NR1214B 830nm Multi-mode, dual channels, transmission distance <2 km

PCS-902 series can exchange information with the device at the remote end through a dedicated
optical fibre channel or multiplex channel. The module transmits and receives optical signal using
FC/PC or ST optical connector.

The parameters are shown as follows:

Item Type1 Type2 Type3


Fiber Optic Single mode, Rec.G652 Single mode, Rec.G652 Multi mode, Rec.G652
Wavelength 1310nm 1550nm 830nm
Transmission power -13.0±3.0 dBm -5.0 dBm±3.0 dBm -12dBm~-20 dBm
Receiving sensitivity Min.-37 dBm Min.-36 dBm Min.-30 dBm
Transmission distance Max.40 km Max.100 km Max.2 km
Optical overload point Min.-3 dBm Min.-3 dBm Min.-8 dBm

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Note!

When using dedicated optical fibre channel, if the transmission distance is longer than
50km, the transmitted power may be enchanced to ensure received power larger than
receiving sensitivity. Please notify supplier before ordering and it will be considered as
special project using 1550nm laser diode.

When using multiplex channel, the sending power of the device is fixed.

When using channel multiplexing equipment, the parameters are shown as follows:

1. Channel type: digital optical fibre or digital microwave.

2. Interface standard: 2048kbit/s E1

The device′s requirements on the channel are shown as follows:

1. The routine of both direction shall be same to each other, so the time delays of both direction
are the same.

2. The maximum one-way channel propagation delay shall be less than 15 ms.

6.3.7 BI Plug-in Module (Binary Input)


There are two kinds of BI modules available, NR1503 and NR1504. Up to 3 BI modules can be
equipped with one device. The rated voltage can be selected to be 110V/125V, 220V/250V. The
well-designed debouncing technique is adopted in this device, and the state change of binary input
within “Debouncing time” will be ignored. As shown in Figure 6.3-23.

Binary input state

Validate binary input state


change & write it into SOE
record
1

Debouncing time

Time
T0 T1

Figure 6.3-23 Debouncing technique

Each BI module is with a 22-pin connector for 11 binary inputs (NR1503) or 18 binary inputs
(NR1504).

For NR1503, each binary input has independent negative power input of opto-coupler, and can be

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6 Hardware

configurable. The terminal definition of the connector of BI plug-in module is described as below.
[BI_n] (n=01, 02,…,11 can be configured as a specified binary input by PCS-Explorer software.)

BI_01 01

NR1503 Opto01- 02

BI_02 03

Opto02- 04

BI_03 05

Opto03- 06

BI_04 07

Opto04- 08

BI_05 09

Opto05- 10

BI_06 11

Opto06- 12

BI_07 13

Opto07- 14

BI_08 15

Opto08- 16

BI_09 17

Opto09- 18

BI_10 19

Opto10- 20

BI_11 21

Opto11- 22

Figure 6.3-24 View of BI plug-in module (NR1503)

Terminal description for NR 1503 is shown as follows.

Terminal No. Symbol Description


01 BI_01 Configurable binary input 1
02 Opto01- Negative supply of configurable binary input 1
03 BI_02 Configurable binary input 2
04 Opto02- Negative supply of configurable binary input 2
05 BI_03 Configurable binary input 3
06 Opto03- Negative supply of configurable binary input 3
07 BI_04 Configurable binary input 4
08 Opto04- Negative supply of configurable binary input 4
09 BI_05 Configurable binary input 5
10 Opto05- Negative supply of configurable binary input 5
11 BI_06 Configurable binary input 6
12 Opto06- Negative supply of configurable binary input 6
13 BI_07 Configurable binary input 7
14 Opto07- Negative supply of configurable binary input 7
15 BI_08 Configurable binary input 8
16 Opto08- Negative supply of configurable binary input 8
17 BI_09 Configurable binary input 9

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Terminal No. Symbol Description


18 Opto09- Negative supply of configurable binary input 9
19 BI_10 Configurable binary input 10
20 Opto10- Negative supply of configurable binary input 10
21 BI_11 Configurable binary input 11
22 Opto11- Negative supply of configurable binary input 11

For NR1504, all binary inputs share one common negative power input, and can be configurable.
The terminal definition of the connector of BI plug-in module is described as below. [BI_n] (n=01,
02,…,18 can be configured as a specified binary input by PCS-Explorer software.)

Opto+ 01

NR1504 BI_01 02

BI_02 03

BI_03 04

BI_04 05

BI_05 06

BI_06 07

08

BI_07 09

BI_08 10

BI_09 11

BI_10 12

BI_11 13

BI_12 14

15

BI_13 16

BI_14 17

BI_15 18

BI_16 19

BI_17 20

BI_18 21

COM- 22

Figure 6.3-25 View of BI plug-in module (NR1504)

Terminal description for NR1504 is shown as follows.

Terminal No. Symbol Description


01 Opto+ Positive supply of power supply of the module
02 BI_01 Configurable binary input 1
03 BI_02 Configurable binary input 2
04 BI_03 Configurable binary input 3
05 BI_04 Configurable binary input 4
06 BI_05 Configurable binary input 5
07 BI_06 Configurable binary input 6
08 Blank Not used
09 BI_07 Configurable binary input 7
10 BI_08 Configurable binary input 8

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6 Hardware

Terminal No. Symbol Description


11 BI_09 Configurable binary input 9
12 BI_10 Configurable binary input 10
13 BI_11 Configurable binary input 11
14 BI_12 Configurable binary input 12
15 Blank Not used
16 BI_13 Configurable binary input 13
17 BI_14 Configurable binary input 14
18 BI_15 Configurable binary input 15
19 BI_16 Configurable binary input 16
20 BI_17 Configurable binary input 17
21 BI_18 Configurable binary input 18
22 COM- Common terminal of negative supply of binary inputs

Note!

A default configuration is given for first four binary signals (BI_01, BI_02, BI_03, BI_04) in
first BI plug-in module, and they are [BI_TimeSyn], [BI_Print], [BI_Maintenance] and
[BI_RstTarg] respectively. They can alos be configured as other signals. Because the first
binary signal [BI_01] is set as [BI_TimeSyn] by default (the state change information of
binary signal [BI_TimeSyn] does not need be displayed), new binary signal should be
added to state change message if it is set as other signal.

1. Binary input: [BI_TimeSyn]

It is used to receive clock synchronization signal from clock synchronization device, the binary
input [BI_TimeSyn] will change from “0” to “1” once pulse signal is received. When the device
adopts “Conventional” mode as clock synchronization mode (refer to section “Communication
Settings”), the device can receives PPM (pulse per minute) and PPS (pulse per second). If the
setting [Opt_TimeSyn] is set as other values, this binary input is invalid.

2. Binary input: [BI_Print]

It is used to manually trigger printing latest report when the equipment is configured as manual
printing mode by logic setting [En_AutoPrint]=0. The printer button is located on the panel usually.
If the equipment is configured as automatic printing mode ([En_AutoPrint]=1), report will be printed
automatically as soon as it is formed.

3. Binary input: [BI_Maintenance]

It is used to block communication export when this binary input is energized. During device
maintenance or testing, this binary input is then energized not to send reports via communication
port, local display and printing still work as usual. This binary input should be de-energized when
the device is restored back to normal.

The application of the binary input [BI_Maintenance] for digital substation communication adopting

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IEC61850 protocol is given as follows.

1) Processing mechanism for MMS (Manufacturing Message Specification) message

a) The protection device should send the state of this binary input to client.

b) When this binary input is energized, the bit “Test” of quality (Q) in the sent message changes
to “1”.

c) When this binary input is energized, the client cannot control the isolator link and circuit
breaker, modify settings and switch setting group remotely.

d) According to the value of the bit “Test” of quality (Q) in the message sent, the client
discriminate whether this message is maintenance message, and then deal with it correspondingly.
If the message is the maintenance message, the content of the message will not be displayed on
real-time message window, audio alarm not issued, but the picture is refreshed so as to ensure
that the state of the picture is in step with the actual state. The maintenance message will be
stored, and can be inquired, in independent window.

2) Processing mechanism for GOOSE message

a) When this binary input is energized, the bit “Test” in the GOOSE message sent by the
protection device changes to “1”.

b) For the receiving end of GOOSE message, it will compare the value of the bit “Test” in the
GOOSE message received by it with the state of its own binary input (i..e [BI_Maintenance]), the
message will be thought as invalid unless they are conformable.

3) Processing mechanism for SV (Sampling Value) message

a) When this binary input of merging unit is energized, the bit “Test” of quality (Q) of sampling
data in the SV message sent change “1”.

b) For the receiving end of SV message, if the value of bit “Test” of quality (Q) of sampling data
in the SV message received is “1”, the relevant protection functions will be disabled, but under
maintenance state, the protection device should calculate and display the magnitude of sampling
data.

c) For duplicated protection function configurations, all merging units of control module
configured to receive sampling should be also duplicated. Both dual protection devices and dual
merging units should be fully independent each other, and one of them is in maintenance state will
not affect the normal operation of the other.

4. Binary input: [BI_RstTarg]

It is used to reset latching signal relay and LCD displaying. The reset is done by pressing a button
on the panel.

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6 Hardware

Note!

The rated voltage of binary input is optional: 110V, 125V, 220V or 250V, which must be
specified when placed order. It is necessary to check whether the rated voltage of BI
module complies with site DC supply rating before put the relay in service.

There three binary signals are fixed for measurement functions, they are [BI_Rmt/Loc],
[BI_ManSynCls] and [BI_ManOpen] respectively.

5. Binary input: [BI_Rmt/Loc]

It is used to select the remote control or the local control.

“1”: the remote control, all the binary outputs can only be remotely controlled by SCADA or control
centers.

“0” the local control, each binary output can only be applied to open/close CB/DS/ES locally. Each
binary output can also be applied issue a signal locally.

6. Binary input: [BI_ManSynCls]

When the device is under local control condition (i.e. [BI_Rmt/Loc] is de-energized), the manual
synchronism check for closing circuit breaker will be initiated if it is energized.

7. Binary input: [BI_ManOpen]

When the device is under local control condition (i.e. [BI_Rmt/Loc] is de-energized), the manual
control for open circuit breaker will be initiated if it is energized.

6.3.8 BO Plug-in Module (Binary Output)


Three standard binary output modules, NR1521A, NR1521C and NR1521G, and one optional
binary output module, NR1521F, can be selected. The contacts provided by NR1521A, NR1521C,
NR1521G and NR1521F are all normally open (NO) contacts. Output contact can be configured as
a specified tripping output contact and a signal output contact respectively by PCS-Explorer
software according to user requirement.

NR1521A can provide 11 output contacts controlled by fault detector.

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6 Hardware

01
BO_01
NR1521A 02
03
BO_02
04
05
BO_03
06
07
BO_04
08
09
BO_05
10
11
BO_06
12
13
BO_07
14
15
BO_08
16
17
BO_09
18
19
BO_10
20
21
BO_11
22

Figure 6.3-26 View of BO plug-in module (NR1521A)

NR1521C can provide 11 output contacts without controlled by fault detector.

01
BO_01
NR1521C 02
03
BO_02
04
05
BO_03
06
07
BO_04
08
09
BO_05
10
11
BO_06
12
13
BO_07
14
15
BO_08
16
17
BO_09
18
19
BO_10
20
21
BO_11
22

Figure 6.3-27 View of BO plug-in module (NR1521C)

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6 Hardware

BO plug-in module (NR1521F) is dedicatedly for remote/manual open or closing to circuit breaker,
disconnector and earth switch. 5 pairs of binary outputs (one for open and the other for closing)
can be provided by this BO plug-in module configured in slot 15 if measurement and control
function is equipped with the device. Up to 10 pairs of binary outputs can be provided by two BO
plug-in modules that can be configured in slot 14 and 15 respectively. (BO plug-in module
configured in slot 14 is optional if open or closing contacts is not enough)

A normally open contact is presented via terminal 21-22 designated as ROS (i.e. remote operation
signal). Whenever any of binary output contacts for open or closing is closed, ROS contact will
close to issue a signal indicating that this device is undergoing a remote operation.

BO plug-in module (NR1521F) is displayed as shown in the following figure.

01
BO_CtrlOpn01
NR1521F 02
03
BO_CtrlCls01
04
05
BO_CtrlOpn02
06
07
BO_CtrlCls02
08
09
BO_CtrlOpn03
10
11
BO_CtrlCls03
12
13
BO_CtrlOpn04
14
15
BO_CtrlCls04
16
17
BO_CtrlOpn05
18
19
BO_CtrlCls05
20
21
BO_Ctrl
22

Figure 6.3-28 View of BO plug-in module (NR1521F)

NR1521G can provide 11 output contacts without controlled by fault detector. The first four output
contacts are in parallel with instantaneous operating contacts which are recommended to be
configured as fast signaling contacts to send PLC signal.

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01
BO_01
NR1521G 02
03
BO_02
04
05
BO_03
06
07
BO_04
08
09
BO_05
10
11
BO_06
12
13
BO_07
14
15
BO_08
16
17
BO_09
18
19
BO_10
20
21
BO_11
22

Figure 6.3-29 View of BO plug-in module (NR1521G)

6.3.9 HMI Module


The display panel consists of liquid crystal display module, keyboard, LED and ARM processor.
The functions of ARM processor include display control of the liquid crystal display module,
keyboard processing, and exchanging data with the CPU through LAN port etc. The liquid crystal
display module is a high-performance grand liquid crystal panel with soft back lighting, which has a
user-friendly interface and an extensive display range.

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7 Settings

7 Settings

Table of Contents
7 Settings ............................................................................................. 7-a
7.1 System Settings .............................................................................................. 7-1
7.1.1 Setting Description ............................................................................................................. 7-1

7.1.2 Access Path ....................................................................................................................... 7-2

7.2 Device Setup ................................................................................................... 7-2


7.2.1 Setting Description ............................................................................................................. 7-2

7.2.2 Access Path ...................................................................................................................... 7-8

7.3 Protection Settings ......................................................................................... 7-8


7.3.1 Setting Description ............................................................................................................. 7-8

7.3.2 Access Path ..................................................................................................................... 7-31

7.4 Logic Link Settings ....................................................................................... 7-31


7.4.1 Setting Description ........................................................................................................... 7-31

7.4.2 Access Path ..................................................................................................................... 7-32

7.5 Measurement and Control Settings ............................................................. 7-32


7.5.1 Setting Description ........................................................................................................... 7-32

7.5.2 Access Path ..................................................................................................................... 7-34

List of Tables
Table 7.1-1 System settings ......................................................................................................7-1

Table 7.2-1 Device settings .......................................................................................................7-2

Table 7.2-2 Communication settings ..........................................................................................7-3

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-09-07
7 Settings

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Date: 2014-07-29
7 Settings

The device has some setting groups for protection to coordinate with the mode of power system
operation, one of which is assigned to be active. However, communication settings, system
settings, device settings, logic link settings and measurement and control settings are common for
all protection setting groups.

Note!

All current settings in this chapter are secondary current converted from primary current by
CT ratio. Zero-sequence current or voltage setting is configured according to 3I0 or 3U0
and negative sequence current setting according to I2 or U2.

7.1 System Settings


7.1.1 Setting Description
Table 7.1-1 System settings

No. Item Range Unit


1 Active_Grp 1~10
2 Opt_SysFreq 50 or 60 Hz
3 PrimaryEquip_Name Maximum 12 character
4 U1n 33.00~65500.00 kV
5 U2n 80.00~220.00 V
6 CBx.I1n 100~30000 A
7 I1n_Base 100~30000 A
8 I2n_Base 1 or 5 A
9 f_High_FreqAlm 50~65 Hz
10 f_Low_FreqAlm 45~60 Hz

1. Active_Grp

The number of active setting group, 10 setting groups can be configured for protection settings,
and only one is active at a time

2. PrimaryEquip_Name

It is recognized by the device automatically. Such setting is used for printing messages

3. Opt_SysFreq

It is option of system frequency, and can be set as 50Hz or 60Hz

4. Un1

Primary rated voltage of VT

5. Un2

Secondary rated voltage of VT

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-09-07
7 Settings

6. CBx.I1n

Primary rated value of CT corresponding to circuit breaker No.x

7. I1n_Base

Primary calculation base rated current of CT

8. I2n_Base

Secondary calculation base rated current of CT

9. f_High_FreqAlm

It is frequency upper limit setting. The device will issue an alarm [Alm_Freq], when system
frequency is higher than the setting.

10. f_Low_FreqAlm

It is frequency lower limit setting. The device will issue an alarm [Alm_Freq], when system
frequency is lower than the setting.

7.1.2 Access Path


MainMenu“Settings”“System Settings”

7.2 Device Setup


7.2.1 Setting Description
7.2.1.1 Device Settings

Table 7.2-1 Device settings

No. Item Range


1 HDR_EncodeMode GB18030, UTF-8
2 Opt_Caption_103 0, 1 or 2
3 Bxx.Un_BinaryInput 24V, 30V, 48V, 110V, 125V, 220V

4 En_MDisk 0 or 1

1. HDR_EncodeMode

Select encoding format of header (HDR) file COMTRADE recording file

Default value is “UTF-8”.

2. Opt_Caption_103

Select the caption language sent to SAS via IEC103 protocol

0: Current language

1: Fixed Chinese

2: Fixed English

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7 Settings

Default value of [Opt_Caption_103] is 0 (i.e. current language), and please set it to 1 (i.e. Fixed
Chinese) if the SAS is supplied by China Manufacturer.

3. Bxx.Un_BinaryInput

This setting is used to set voltage level of binary input module. If low-voltage BI module is
equipped, 24V, 30V or 48V can be set according to the actual requirement, and if high-voltage BI
module is equipped, 110V, 125V or 220V can be set according to the actual requirement.

Bxx: this plug-in module is inserted in slot xx.

4. En_MDisk

1: Use moveable disk to realize the backup and recovery function.

0: Moveable disk will be disabled.

A moveable mdisk is implemented on the MON plug-in module to backup and restore programs,
settings and configurations.

If MON plug-in module is broken, remove the mdisk and put it into a new MON plug-in module, use
the menu on HMI to restore the backup programs and configurations. If DSP plug-in module is
broken, after a new DSP plug-in module is installed, use the menu on HMI to restore the backup
programs and configurations. If the moveable mdisk is broken, after a new mdisk is installed on
the MON plug-in module, use the menu on HMI to back up the current programs and
configurations into the new mdisk.

The default setting is 0

7.2.1.2 Communication Settings

Table 7.2-2 Communication settings

No. Item Range


1 IP_LAN1 000.000.000.000~255.255.255.255
2 Mask_LAN1 000.000.000.000~255.255.255.255
3 IP_LAN2 000.000.000.000~255.255.255.255
4 Mask_LAN2 000.000.000.000~255.255.255.255
5 En_LAN2 0 or 1
6 IP_LAN3 000.000.000.000~255.255.255.255
7 Mask_LAN3 000.000.000.000~255.255.255.255
8 En_LAN3 0 or 1

9 IP_LAN4 000.000.000.000~255.255.255.255
10 Mask_LAN4 000.000.000.000~255.255.255.255
11 En_LAN4 0 or 1

12 Gateway 000.000.000.000~255.255.255.255
13 En_Broadcast 0 or 1
14 Addr_RS485A 0~255

15 Baud_RS485A 4800,9600,19200,38400,57600,115200 (bps)

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7 Settings

No. Item Range


16 Protocol_RS485A 0, 1 or 2

17 Addr_RS485B 0~255

18 Baud_RS485B 4800,9600,19200,38400,57600,115200 (bps)

19 Protocol_RS485B 0, 1 or 2

20 Threshold_Measmt_Net 0~100%
21 Period_Measmt_Net 0~65535s
22 Format_Measmt 0, 1
23 Baud_Printer 4800,9600,19200,38400,57600,115200 (bps)

24 En_AutoPrint 0 or 1

25 Opt_TimeSyn Conventional, SAS, Advanced or NoTImeSyn

26 IP_Server_SNTP 000.000.000.000~255.255.255.255
27 IP_StandbyServer_SNTP 000.000.000.000~255.255.255.255
28 OffsetHour_UTC -12~+12 (hrs)
29 OffsetMinute_UTC 0~60 (min)
30 Opt_Display_Status PriValue, SecValue
31 t_Dly_Net_DNP 0~10000 (ms)
32 Format_Setting_DNP None, AO, AI

1. IP_LAN1, IP_LAN2, IP_LAN3, IP_LAN4

IP address of Ethernet port 1, Ethernet port 2, Ethernet port 3 and Ethernet port 4

2. Mask_LAN1, Mask_LAN2, Mask_LAN3, Mask_LAN4

Subnet mask of Ethernet port 1, Ethernet port 2, Ethernet port 3 and Ethernet port 4

3. En_LAN2, En_LAN3, En_LAN4

Put Ethernet port 2, Ethernet port 3 and Ethernet port 4 in service

They are used for Ethernet communication based on the IEC 60870-5-103 protocol. When the IEC
61850 protocol is applied, the IP address of Ethernet A will be GOOSE source MAC address.

Ethernet port 1 is always in service by default.

4. Gateway

IP address of Gateway (router)

5. En_Broadcast

This setting is only used only for IEC 60870-5-103 protocol. If NR network IEC 60870-5-103
protocol is used, the setting must be set as “1”.

0: the device does not send UDP messages through network

1: the device sends UDP messages through network

6. Addr_RS485A, Addr_RS485B

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Date: 2014-07-29
7 Settings

They are the device′s communication address used to communicate with the SCADA or RTU via
serial ports (port A and port B).

7. Baud_RS485A, Baud_RS485B

Baud rate of rear RS-485 serial port A or B

8. Protocol_RS485A, Protocol_RS485B

Communication protocol of rear RS-485 serial port A or B

0: IEC 60870-5-103 protocol

1: Modbus Protocol

2: Reserved

Note!

Above table listed all the communication settings, the device delivered to the user maybe
only show some settings of them according to the communication interface configuration.
If only the Ethernet ports are applied, the settings about the serial ports (port A and port B)
are not listed in this submenu. And the settings about the Ethernet ports only listed in this
submenu according to the actual number of Ethernet ports.

The standard arrangement of the Ethernet port is two, at most four (predetermined when
ordering). Set the IP address according to actual arrangement of Ethernet numbers and
the un-useful port/ports need not be configured. If PCS-Explorer configuration tool
auxiliary software is connected with this device through the Ethernet, the IP address of
PCS-Explorer must be set as one of the available IP address of this device.

9. Threshold_Measmt_Net

Threshold value of sending measurement values to SCADA through IEC 60870-5-103 or


IEC61850 protocol via Ethernet port.

Default value: “1%”

10. Period_Measmt_Net

The time period for equipment sends measurement data to SCADA through IEC 60870-5-103
protocol via Ethernet port.

Default value: “60”

11. Format_Measmt

The setting is used to select the format of measurement data sent to SCADA through IEC
60870-5-103 protocol.

0: GDD data type through IEC103 protocol is 12

1: GDD data type through IEC103 protocol is 7, i.e. 754 short real number of IEEE standard

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7 Settings

12. Baud_Printer

Baud rate of printer port

13. En_AutoPrint

If automatic print is required for fault report after protection operating, it is set as “1”. Otherwise, it
should be set to “0”.

14. Opt_TimeSyn

There are four selections for clock synchronization of device shown as follow.

 Conventional

PPS (RS-485): Pulse per second (PPS) via RS-485 differential level

IRIG-B (RS-485): IRIG-B via RS-485 differential level

PPM (DIN): Pulse per minute (PPM) via the binary input [BI_TimeSyn]

PPS (DIN): Pulse per second (PPS) via the binary input [BI_TimeSyn]

 SAS

SNTP (PTP): Unicast (point-to-point) SNTP mode via Ethernet network

SNTP (BC): Broadcast SNTP mode via Ethernet network

Message (IEC103): Clock messages through IEC103 protocol

 Advanced

IEEE1588: Clock message via IEEE1588

IRIG-B (Fiber): IRIG-B via optical-fibre interface

PPS (Fiber) PPS: Pulse per second (PPS) via optical-fibre interface

 NoTimeSync

When no time synchronization signal is connected to the device, please select this option and the
alarm message [Alm_TimeSyn] will not be issued anymore.

“Conventional” mode and “SAS” mode are always be supported by the device, but “Advanced”
mode is only supported when NET-DSP module is equipped. The alarm signal [Alm_TimeSyn]
may be issued to remind user loss of time synchronization signals.

1) When “SAS” is selected, if there is no conventional clock synchronization signal, the device
will not send the alarm signal [Alm_TimeSyn]. When “Conventional” mode is selected, if there
is no conventional clock synchronization signal, “SAS” mode will be enabled automatically
with the alarm signal [Alm_TimeSyn] issued simultaneously.

2) When “Advanced” mode is selected, if there is no conventional clock synchronization signal


connected to NET-DSP module, “SAS” mode is enabled automatically with the alarm signal
[Alm_TimeSyn] issued simultaneously.

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Date: 2014-07-29
7 Settings

3) When “NoTimeSyn” mode is selected, the device will not send alarm signals without time
synchronization signal. But the device can be still synchronized if receiving time
synchronization signal.

Note!

The clock message via IEC 60870-5-103 protocol is invalid when the device receives the
IRIG-B signal through RCS-485 port.

15. IP_Server_SNTP

It is the address of the SNTP time synchronization server which sends SNTP timing messages to
the relay or BCU.

16. IP_StandbyServer_SNTP

Both [IP_Server_SNTP] and [IP_StandbyServer_SNTP] are inefffective unless SNTP clock


synchronization is valid.

When both [IP_Server_SNTP] and [IP_StandbyServer_SNTP] are set as “000.000.000.000”, the


deivce receives broadcast SNTP synchronization message.

When either [IP_Server_SNTP] or [IP_StandbyServer_SNTP] is set as “000.000.000.000”, the


deivce adopt the setting whose value is not equal to “000.000.000.000” as SNTP server address
and the deivce receives unicast SNTP synchronization message.

When neither [IP_Server_SNTP] nor [IP_StandbyServer_SNTP] are set as “000.000.000.000”, the


deivce adopt the setting [IP_Server_SNTP] as SNTP server address to receive unicast SNTP
synchronization message. If the device does not receive the server responses after 30s, the
deivce adopt the setting [IP_StandbyServer_SNTP] as SNTP server address to receive unicast
SNTP synchronization message. The device will switch between [IP_Server_SNTP] and
[IP_StandbyServer_SNTP] repeatedly if the device always can not receive the server responses
waiting 30s

17. OffsetHour_UTC, OffsetMinute_UTC

If the IEC61850 protocol is adopted in substations, the time tags of communication messages are
required according to UTC (Universal Time Coordinated) time.

The setting [OffsetHour_UTC] is used to set the hour offset of the current time zone to the GMT
(Greenwich Mean Time) zone; for example, if a relay is applied in China, the time zone of China is
east 8th time zone, so this setting is set as “8”. The setting [OffsetMinute_UTC] is used to set the
minute offset of the current time zone to the GMT zone.

Time zone GMT zone East 1st East 2nd East 3rd East 4th East 5th
Setting 0 1 2 3 4 5
Time zone East 6th East 7th East 8th East 9th East 10th East 11th
Setting 6 7 8 9 10 11
Time zone East/West 12th West 1st West 2nd West 3rd West 4th West 5th
Setting 12/-12 -1 -2 -3 -4 -5

PCS-902 Line Distance Relay 7-7


Date: 2014-07-29
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7 Settings

Time zone West 6th West 7th West 8th West 9th West 10th West 11th
Setting -6 -7 -8 -9 -10 -11

18. Opt_Display_Status

This setting is used to set display mode of current and voltage in fault records, primary value or
secondary value. The sampled values of current and voltage are displayed as secondary value by
default. When it is set as primary value, both secondary voltage and secondary current are
converted into primary voltage and primary current according to rated secondary and primary
value of VT and CT respectively.

19. t_Dly_Net_DNP

The setting is used to set transmission time delay for transmitting multi-frame messages during
DNP process (the setting is valid only if network DNP3.0 protocol is configured)

20. Format_Setting_DNP

The setting is used to set settings uploading format during DNP process (this setting is valid only if
network or serial port DNP3.0 protocol is configured).

None: not upload settings

AO: uploading settings adopts the mode of analog output

AI: uploading settings adopts the mode of analog input

7.2.2 Access Path


MainMenu“Settings”“Device Setup”

7.3 Protection Settings


All protection settings are based on secondary ratings of VT and CT.

Unn: rated secondary phase-to-phase voltage

Un: rated secondary phase-to-ground voltage

In: rated secondary current

7.3.1 Setting Description


7.3.1.1 Line Parameters Settings

No. Item Remark Range


1 X1L Positive sequence reactance of the line (0.000~4Unn)/In (ohm)
2 R1L Positive sequence resistance of the line (0.000~4Unn)/In (ohm)
3 X0L Zero-sequence reactance of the line (0.000~4Unn)/In (ohm)
4 R0L Zero-sequence resistance of the line (0.000~4Unn)/In (ohm)
5 X0M Line mutual zero-sequence reactance (0.000~4Unn)/In (ohm)
6 R0M Line mutual zero-sequence resistance (0.000~4Unn)/In (ohm)

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Date: 2014-07-29
7 Settings

7 LineLength Total length of the line 0.00~655.35 (km)

7.3.1.2 Fault Detector Settings (FD)

No. Item Remark Range


Current setting of DPFC current fault detector
1 FD.DPFC.I_Set (0.050~30.000)×In (A)
element
Current setting of residual current fault detector
2 FD.ROC.3I0_Set (0.050~30.000)×In (A)
element
Current setting of negative-sequence current fault
3 FD.NOC.I2_Set (0.050~30.000)×In (A)
detector element
Enable negative-sequence current fault detector
4 FD.NOC.En 0 or 1
element

7.3.1.3 Auxiliary Element Settings (Aux.E)

No. Item Remark Range


Drop-off time delay of current change auxiliary
1 AuxE.OCD.t_DDO 0.000~10.000 (s)
element
2 AuxE.OCD.En Enable current change auxiliary element 0 or 1
Current setting of stage 1 residual current auxiliary
3 AuxE.ROC1.3I0_Set (0.050~30.000)×In (A)
element
4 AuxE.ROC1.En Enable stage 1 residual current auxiliary element 0 or 1
Current setting of stage 2 residual current auxiliary
5 AuxE.ROC2.3I0_Set (0.050~30.000)×In (A)
element
6 AuxE.ROC2.En Enable stage 2 residual current auxiliary element 0 or 1
Current setting of stage 3 residual current auxiliary
7 AuxE.ROC3.3I0_Set (0.050~30.000)×In (A)
element
8 AuxE.ROC3.En Enable stage 3 residual current auxiliary element 0 or 1
Current setting of stage 1 phase current auxiliary
9 AuxE.OC1.I_Set (0.050~30.000)×In (A)
element
10 AuxE.OC1.En Enable stage 1 phase current auxiliary element 0 or 1
Current setting of stage 2 phase current auxiliary
11 AuxE.OC2.I_Set (0.050~30.000)×In (A)
element
12 AuxE.OC2.En Enable stage 2 phase current auxiliary element 0 or 1
Current setting of stage 3 phase current auxiliary
13 AuxE.OC3.I_Set (0.050~30.000)×In (A)
element
14 AuxE.OC3.En Enable stage 3 phase current auxiliary element 0 or 1
15 AuxE.UVD.U_Set Voltage setting for voltage change auxiliary element 0~Un (V)
Drop-off time delay of voltage change auxiliary
16 AuxE.UVD.t_DDO 0.000~10.000 (s)
element
17 AuxE.UVD.En Enable voltage change auxiliary element 0 or 1
Voltage setting for phase-to-ground under voltage
18 AuxE.UVG.U_Set 0~Un (V)
auxiliary element

PCS-902 Line Distance Relay 7-9


Date: 2014-07-29
-09-07
7 Settings

Enable phase-to-ground under voltage auxiliary


19 AuxE.UVG.En 0 or 1
element
Voltage setting for phase-to-phase under voltage
20 AuxE.UVS.U_Set 0~Unn (V)
auxiliary element
Enable phase-to-phase under voltage auxiliary
21 AuxE.UVS.En 0 or 1
element
22 AuxE.ROV.3U0_Set Voltage setting for residual voltage auxiliary element 0~Un (V)
23 AuxE.ROV.En Enable residual voltage auxiliary element 0 or 1

7.3.1.4 DPFC Distance Protection Settings (21D)

No. Item Remark Range


1 21D.Z_Set Impedance setting of DPFC distance protection (0.000~4Unn)/In (ohm)
2 21D.En Enable DPFC distance protection 0 or 1

7.3.1.5 Load Encroachment Settings (LoadEnch)

No. Item Remark Range


Angle setting of load trapezoid characteristic, it should
1 LoadEnch.phi be set according to the maximum load area angle 0~45 (deg)
(φLoad_Max), φLoad_Max+5°is recommended.
Resistance setting of load trapezoid characteristic, it
should be set according to the minimum load
2 LoadEnch.R_Set (0.05~200)/In (ohm)
resistance, 70%~90% minimum load resistance is
recommended.
3 LoadEnch.En Enable load trapezoid characteristic 0 or 1

7.3.1.6 Distance Protection Settings with Mho Characteristic (21M)

No. Item Remark Range


Direction option for zone x of distance protection (x=2,
1 21-x. DirMode 0 or 1
3, 4, 5)
Real component of zero-sequence compensation
2 21-x.Real_K0 -4.000~4.000
coefficient for zone x (x=1, 2, 3, 4, 5)
Imaginary component of zero-sequence
3 21-x.Imag_K0 -4.000~4.000
compensation coefficient for zone x (x=1, 2, 3, 4, 5)
Phase angle of positive-sequence impedance for
4 21-x.phi1_Reach 30.00~89.00 (deg)
zone x (x=1, 2, 3, 4, 5)
Phase shift of phase-to-ground distance protection for
5 21Mx.ZG.phi_Shift 0, 15 or 30 (deg)
zone x (x=1, 2)
Phase shift of phase-to-phase distance protection for
6 21Mx.ZP.phi_Shift 0, 15 or 30 (deg)
zone x (x=1, 2)
Impedance setting of zone x of phase-to-ground
7 21Mx.ZG.Z_Set (0.000~4Unn)/In (ohm)
distance protection (x=1, 2, 3, 4, 5)
Time delay of zone x of phase-to-ground distance
8 21Mx.ZG.t_Op 0.000~10.000 (s)
protection (x=1, 2, 3, 4, 5)

7-10 PCS-902 Line Distance Relay


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7 Settings

Short time delay of zone x of phase-to-ground


9 21Mx.ZG.t_ShortDly 0.000~10.000 (s)
distance protection (x=2, 3, 4, 5)
Enable zone x of phase-to-ground distance protection
10 21Mx.ZG.En 0 or 1
(x=1, 2, 3, 4, 5)
Enable phase-to-ground zone x of distance protection
11 21Mx.ZG.En_BlkAR 0 or 1
operation to block AR (x=1, 2, 3, 4, 5)
Impedance setting of zone x of phase-to-phase
12 21Mx.ZP.Z_Set (0.000~4Unn)/In (ohm)
distance protection (x=1, 2, 3, 4, 5)
Time delay of zone x of phase-to-phase distance
13 21Mx.ZP.t_Op 0.000~10.000 (s)
protection (x=1, 2, 3, 4, 5)
Short time delay of zone x of phase-to-phase distance
14 21Mx.ZP.t_ShortDly 0.000~10.000 (s)
protection (x=2, 3, 4, 5)
Enable zone x of phase-to-phase distance protection
15 21Mx.ZP.En 0 or 1
(x=1, 2, 3, 4, 5)
Enable phase-to-phase zone x of distance protection
16 21Mx.ZP.En_BlkAR 0 or 1
operation to block AR (x=1, 2, 3, 4, 5)
Enable fixed accelerate zone x of distance protection
17 21Mx.En_ShortDly 0 or 1
(x=2, 3, 4, 5)

7.3.1.7 Distance Protection Settings with Quad Characteristic (21Q)

No. Item Remark Range


1 21Q.Ang_Alpha The angle of directional line 5~30 (deg)
Direction option for zone x of distance protection (x=2,
2 21-x. DirMode 0 or 1
3, 4, 5)
Real component of zero-sequence compensation
3 21-x.Real_K0 -4.000~4.000
coefficient for zone x (x=1, 2, 3, 4, 5)
Imaginary component of zero-sequence
4 21-x.Imag_K0 -4.000~4.000
compensation coefficient for zone x (x=1, 2, 3, 4, 5)
Phase angle of positive-sequence impedance for
5 21-x.phi1_Reach 30~89 (deg)
zone x (x=1, 2, 3, 4, 5)
Downward offset angle of the reactance line for zone x
6 21Qx.ZG.RCA 0~45 (deg)
of phase-to-ground distance protection (x=1,2,3, 4, 5)
Impedance setting of zone x of phase-to-ground
7 21Qx.ZG.Z_Set (0.000~4Unn)/In (ohm)
distance protection (x=1, 2, 3, 4, 5)
Resistance setting of zone x of phase-to-ground
8 21Qx.ZG.R_Set (0.000~4Unn)/In (ohm)
distance protection (x=1, 2, 3, 4, 5)
Time delay of zone x of phase-to-ground distance
9 21Qx.ZG.t_Op 0.000~10.000 (s)
protection (x=1, 2, 3, 4, 5)
Short time delay of zone x of phase-to-ground
10 21Qx.ZG.t_ShortDly 0.000~10.000 (s)
distance protection (x=2, 3, 4, 5)
Enable zone x of phase-to-ground distance protection
11 21Qx.ZG.En 0 or 1
(x=1, 2, 3, 4, 5)

PCS-902 Line Distance Relay 7-11


Date: 2014-07-29
-09-07
7 Settings

Enable phase-to-ground zone x of distance protection


12 21Qx.ZG.En_BlkAR 0 or 1
operation to block AR (x=1, 2, 3, 4, 5)
Downward offset angle of the reactance line for zone x
13 21Qx.ZP.RCA 0~45
of phase-to-phase distance protection (x=1,2,3, 4, 5)
Impedance setting of zone x of phase-to-phase
14 21Qx.ZP.Z_Set (0.000~4Unn)/In (ohm)
distance protection (x=1, 2, 3, 4, 5)
Resistance setting of zone x of phase-to-phase
15 21Qx.ZP.R_Set (0.000~4Unn)/In (ohm)
distance protection (x=1, 2, 3, 4, 5)
Time delay of zone x of phase-to-phase distance
16 21Qx.ZP.t_Op 0.000~10.000 (s)
protection (x=1, 2, 3, 4, 5)
Short time delay of zone x of phase-to-ground
17 21Qx.ZP.t_ShortDly 0.000~10.000 (s)
distance protection (x=2, 3, 4, 5)
Enable zone x of phase-to-phase distance protection
18 21Qx.ZP.En 0 or 1
(x=1, 2, 3, 4, 5)
Enable phase-to-phase zone x of distance protection
19 21Qx.ZP.En_BlkAR 0 or 1
operation to block AR (x=1, 2, 3, 4, 5)
Enable fixed accelerate zone x of distance protection
20 21Qx.En_ShortDly 0 or 1
(x=2, 3, 4, 5)

7.3.1.8 Pilot Distance Zone Settings

No. Item Remark Range


Real component of zero-sequence compensation
1 21.Pilot.Real_K0 30.00~89.00 (deg)
coefficient for pilot distance protection
Imaginary component of zero-sequence
2 21.Pilot.Imag_K0 -4.000~4.000
compensation coefficient for pilot distance protection
Phase angle of positive-sequence impedance for pilot
3 21.Pilot.phi1_Reach -4.000~4.000
distance protection
Impedance setting of pilot distance protection (Mho
4 21M.Pilot.Z_Set (0.000~4Unn)/In (ohm)
characteristic)
Impedance setting of pilot distance protection (Quad
5 21Q.Pilot.Z_Set (0.000~4Unn)/In (ohm)
characteristic)
Impedance setting of pilot distance protection in
6 21M.Pilot.Z_Rev (0.000~4Unn)/In (ohm)
reverse direction (Mho characteristic)
Impedance setting of pilot distance protection in
7 21Q.Pilot.Z_Rev (0.000~4Unn)/In (ohm)
reverse direction (Quad characteristic)
Resistence setting of pilot distance protection (Quad
8 21Q.Pilot.R_Set (0.000~4Unn)/In (ohm)
characteristic only)
Resistence setting of pilot distance protection in
9 21Q.Pilot.R_Rev (0.000~4Unn)/In (ohm)
reverse direction (Quad characteristic only)

7.3.1.9 Power Swing Detection Settings (68)

No. Item Remark Range


1 68.En Enable power swing detection 0 or 1

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7 Settings

7.3.1.10 Power Swing Blocking Releasing Settings (PSBR)

No. Item Remark Range


Enable zone 1 of distance protection controlled by
1 21M1.En_PSBR 0 or 1
PSBR (Mho characteristic)
Enable zone 1 of distance protection controlled by
2 21Q1.En_PSBR 0 or 1
PSBR (Quad characteristic)
Enable zone 2 of distance protection controlled by
3 21M2.En_PSBR 0 or 1
PSBR (Mho characteristic)
Enable zone 2 of distance protection controlled by
4 21Q2.En_PSBR 0 or 1
PSBR (Quad characteristic)
Enable zone 3 of distance protection controlled by
5 21M3.En_PSBR 0 or 1
PSBR (Mho characteristic)
Enable zone 3 of distance protection controlled by
6 21Q3.En_PSBR 0 or 1
PSBR (Quad characteristic)
Enable zone 4 of distance protection controlled by
7 21M4.En_PSBR 0 or 1
PSBR (Mho characteristic)
Enable zone 4 of distance protection controlled by
8 21Q4.En_PSBR 0 or 1
PSBR (Quad characteristic)
Enable zone 5 of distance protection controlled by
9 21M5.En_PSBR 0 or 1
PSBR (Mho characteristic)
Enable zone 5 of distance protection controlled by
10 21Q5.En_PSBR 0 or 1
PSBR (Quad characteristic)
Enable pilot distance zone controlled by PSBR (Mho
11 21M.Pilot.En_PSBR 0 or 1
characteristic)
Enable pilot distance zone controlled by PSBR (Quad
12 21Q.Pilot.En_PSBR 0 or 1
characteristic)
Current setting for power swing blocking (Mho
13 21M.I_PSBR (0.050~30.000)×In (ohm)
characteristic)
Current setting for power swing blocking (Quad
14 21Q.I_PSBR (0.050~30.000)×In (ohm)
characteristic)

7.3.1.11 Distance SOTF Protection Settings (21SOTF)

No. Item Remark Range


1 21SOTF.En Enable distance SOTF protection 0 or 1
Enable zone 2 of distance SOTF protection for
2 21SOTF.Z2.En_ManCls 0 or 1
manual closing
Enabling/disabling zone 3 of distance SOTF
3 21SOTF.Z3.En_ManCls 0 or 1
protection for manual closing
Enable zone 4 of distance SOTF protection for
4 21SOTF.Z4.En_ManCls 0 or 1
manual closing
Enable zone 2 of distance SOTF protection for
5 21SOTF.Z2.En_3PAR 0 or 1
3-pole reclosing

PCS-902 Line Distance Relay 7-13


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7 Settings

Enable zone 3 of distance SOTF protection for


6 21SOTF.Z3.En_3PAR 0 or 1
3-pole reclosing
Enable zone 4 of distance SOTF protection for
7 21SOTF.Z4.En_3PAR 0 or 1
3-pole reclosing
Enable zone 2 controlled by PSB of distance
8 21SOTF.Z2.En_PSBR 0 or 1
SOTF protection for 3-pole reclosing
Enable zone 3 controlled by PSB of distance
9 21SOTF.Z3.En_PSBR 0 or 1
SOTF protection for 3-pole reclosing
Enable zone 4 controlled by PSB of distance
10 21SOTF.Z4.En_PSBR 0 or 1
SOTF protection for 3-pole reclosing
Enable distance SOTF protection under pole
11 21SOTF.En_PDF 0 or 1
discrepancy conditions
Time delay of distance protection operating under
12 21SOTF.t_PDF 0.000~10.000 (s)
pole discrepancy conditions
13 SOTF.U_Ddl Undervoltage setting of deadline detection 0~Unn (V)
14 SOTF.t_Ddl Time delay of deadline detection 0.000~600.000 (s)
ManClsBI
CBPos
15 SOTF.Opt_Mode_ManCls Option of manual SOTF mode ManClsBI/ CBPos
AutoInit
All

7.3.1.12 Optical Pilot Channel Settings

No. Item Remark Range


1 FO.LocID Indentity code of the device at local end 0-65535
2 FO.RmtID Indentity code of the device at remote end 0-65535
3 FO.Protocol It is used to select protocol type, G.703 or C37.94 G.703 or C37.94
4 FO.BaudRate Baud rate of optical pilot channel 64 or 2048
The setting for the times of 64kbits/s, which is an
5 FOx.Nx64k_C37.94 1-12
N*64kbits/s standard defined by IEEE c37.94 standard
6 FOx.En_IntClock Option of internal clock or external clock 0 or 1
7 FOx.En Enable channel x 0 or 1

7.3.1.13 Pilot Distance Protection Settings (85)

No. Item Remark Range


POTT
1 85.Opt_PilotMode Option of pilot scheme PUTT
Blocking
Option of phase-segregated signal scheme or
2 85.Opt_Ch_PhSeg 0 or 1
three-phase signal scheme
3 85.En_WI Enable weak infeed scheme 0 or 1
4 85.U_UV_WI Undervoltage setting of weak infeed logic 0~Unn (V)
5 85.Z.En Enable pilot distance protection 0 or 1

7-14 PCS-902 Line Distance Relay


Date: 2014-07-29
7 Settings

6 85.En_Unblocking1 Enable unblocking scheme 0 or 1


Time delay for blocking scheme of pilot distance
7 85.t_DPU_Blocking1 0.000~1.000 (s)
protection operation
8 85.t_DPU_CR1 Time delay pickup for current reversal logic 0.000~1.000 (s)
9 85.t_DDO_CR1 Time delay dropoff for current reversal logic 0.000~1.000 (s)
10 85.ZX.En Enable zone extension protection 0 or 1
Pickup time delay for zone extension protection
11 85.t_DPU_ZX 0.000~10.000 (s)
operation

7.3.1.14 Pilot Directional Earth-fault Protection Settings (85)

No. Item Remark Range


1 85.DEF.En Enable pilot directional earth-fault protection 0 or 1
Enable pilot directional earth-fault protection operate
2 85.DEF.En_BlkAR 0 or 1
to block AR
Enable independent pilot channel for pilot directional
3 85.DEF.En_IndepCh 0 or 1
earth-fault protection
Enable unblocking scheme for pilot DEF via pilot
4 85.En_Unblocking2 0 or 1
channel 2
Current setting of pilot directional earth-fault
5 85.DEF.3I0_Set (0.050~30.000)×In (A)
protection
6 85.DEF.t_DPU Time delay of pilot directional earth-fault protection 0.001~10.000 (s)
Time delay pickup for current reversal logic when pilot
7 85.t_DPU_CR2 directional earth-fault protection adopts independent 0.000~1.000 (s)
pilot channel 2
Time delay dropoff for current reversal logic when
8 85.t_DDO_CR2 pilot directional earth-fault protection adopts 0.000~1.000 (s)
independent pilot channel 2

7.3.1.15 Current Direction Settings

No. Item Remark Range


The characteristic angle of directional phase
1 RCA_OC 30.00~89.00 (deg)
overcurrent element
The characteristic angle of directional earth fault
2 RCA_ROC 30.00~89.00 (deg)
element
The characteristic angle of directional
3 RCA_NegOC 30.00~89.00 (deg)
negative-sequence overcurrent element
4 Z0_Comp Zero-sequence compensation impedance setting (0.000~4Unn)/In (ohm)
5 Z2_Comp Negative-sequence compensation impedance setting (0.000~4Unn)/In (ohm)

7.3.1.16 Phase Overcurrent Protection Settings (50/51P)

No. Item Remark Range


Setting of second harmonic component for blocking
1 50/51P.K_Hm2 0.000~1.000
phase overcurrent elements

PCS-902 Line Distance Relay 7-15


Date: 2014-07-29
-09-07
7 Settings

Current setting for stage 1 of phase overcurrent


2 50/51P1.I_Set (0.050~30.000)×In (A)
protection
Time delay for stage 1 of phase overcurrent
3 50/51P1.t_Op 0.000~20.000 (s)
protection
4 50/51P1.En Enable stage 1 of phase overcurrent protection 0 or 1
Enable auto-reclosing blocked when stage 1 of
5 50/51P1.En_BlkAR 0 or 1
phase overcurrent protection operates
Enable stage 1 of phase overcurrent protection is
6 50/51P1.En_VTS_Blk 0 or 1
blocked by VT circuit failure
Non-Directional
Direction option for stage 1 of phase overcurrent
7 50/51P1.Opt_Dir Forward
protection
Reverse
Enable second harmonic blocking for stage 1 of
8 50/51P1.En_Hm2_Blk 0 or 1
phase overcurrent protection
DefTime
IECN
IECV
IECE
IECST
IECLT
Option of characteristic curve for stage 1 of phase ANSIE
9 50/51P1.Opt_Curve
overcurrent protection ANSIV
ANSI
ANSIM
ANSILTE
ANSILTV
ANSILT
UserDefine
Time multiplier setting for stage 1 of inverse-time
10 50/51P1.TMS 0.010~200.000
phase overcurrent protection
Minimum operating time for stage 1 of inverse-time
11 50/51P1.tmin 0.000~20.000 (s)
phase overcurrent protection
Constant “α” for stage 1 of customized inverse-time
12 50/51P1.Alpha 0.010~5.000
characteristic phase overcurrent protection
Constant “C” for stage 1 of customized inverse-time
13 50/51P1.C 0.000~20.000
characteristic phase overcurrent protection
Constant “K” for stage 1 of customized inverse-time
14 50/51P1.K 0.050~20.000
characteristic phase overcurrent protection
Current setting for stage 2 of phase overcurrent
15 50/51P2.I_Set (0.050~30.000)×In (A)
protection
Time delay for stage 2 of phase overcurrent
16 50/51P2.t_Op 0.000~20.000 (s)
protection
17 50/51P2.En Enable stage 2 of phase overcurrent protection 0 or 1

7-16 PCS-902 Line Distance Relay


Date: 2014-07-29
7 Settings

Enable auto-reclosing blocked when stage 2 of


18 50/51P2.En_BlkAR 0 or 1
phase overcurrent protection operates
Enable stage 2 of phase overcurrent protection is
19 50/51P2.En_VTS_Blk 0 or 1
blocked by VT circuit failure
Non-Directional
Direction option for stage 2 of phase overcurrent
20 50/51P2.Opt_Dir Forward
protection
Reverse
Enable second harmonic blocking for stage 2 of
21 50/51P2.En_Hm2_Blk 0 or 1
phase overcurrent protection
DefTime
IECN
IECV
IECE
IECST
IECLT
Option of characteristic curve for stage 2 of phase
22 50/51P2.Opt_Curve ANSIE
overcurrent protection
ANSIV
ANSI
ANSIM
ANSILTE
ANSILTV
ANSILT
Time multiplier setting for stage 2 of inverse-time
23 50/51P2.TMS 0.010~200.000
phase overcurrent protection.
Minimum operating time for stage 2 of inverse-time
24 50/51P2.tmin 0.000~20.000 (s)
phase overcurrent protection
Current setting for stage 3 of phase overcurrent
25 50/51P3.I_Set (0.050~30.000)×In (A)
protection
Time delay for stage 3 of phase overcurrent
26 50/51P3.t_Op 0.000~20.000 (s)
protection
27 50/51P3.En Enable stage 3 of phase overcurrent protection 0 or 1
Enable auto-reclosing blocked when stage 3 of
28 50/51P3.En_BlkAR 0 or 1
phase overcurrent protection operates
Enable stage 3 of phase overcurrent protection is
29 50/51P3.En_VTS_Blk 0 or 1
blocked by VT circuit failure
Non-Directional
Direction option for stage 3 of phase overcurrent
30 50/51P3.Opt_Dir Forward
protection
Reverse
Enable second harmonic blocking for stage 3 of
31 50/51P3.En_Hm2_Blk 0 or 1
phase overcurrent protection

PCS-902 Line Distance Relay 7-17


Date: 2014-07-29
-09-07
7 Settings

DefTime
IECN
IECV
IECE
IECST
IECLT
Option of characteristic curve for stage 3 of phase
32 50/51P3.Opt_Curve ANSIE
overcurrent protection
ANSIV
ANSI
ANSIM
ANSILTE
ANSILTV
ANSILT
Time multiplier setting for stage 3 of inverse-time
33 50/51P3.TMS 0.010~200.000
phase overcurrent protection.
Minimum operating time for stage 3 of inverse-time
34 50/51P3.tmin 0.000~20.000 (s)
phase overcurrent protection
Current setting for stage 4 of phase overcurrent
35 50/51P4.I_Set (0.050~30.000)×In (A)
protection
Time delay for stage 4 of phase overcurrent
36 50/51P4.t_Op 0.000~20.000 (s)
protection
37 50/51P4.En Enable stage 4 of phase overcurrent protection 0 or 1
Enable auto-reclosing blocked when stage 4 of
38 50/51P4.En_BlkAR 0 or 1
phase overcurrent protection operates
Enable stage 4 of phase overcurrent protection is
39 50/51P4.En_VTS_Blk 0 or 1
blocked by VT circuit failure
Non-Directional
Direction option for stage 4 of phase overcurrent
40 50/51P4.Opt_Dir Forward
protection
Reverse
Enable second harmonic blocking for stage 4 of
41 50/51P4.En_Hm2_Blk 0 or 1
phase overcurrent protection
DefTime
IECN
IECV
IECE
IECST
IECLT
Option of characteristic curve for stage 4 of phase
42 50/51P4.Opt_Curve ANSIE
overcurrent protection
ANSIV
ANSI
ANSIM
ANSILTE
ANSILTV
ANSILT

7-18 PCS-902 Line Distance Relay


Date: 2014-07-29
7 Settings

Time multiplier setting for stage 4 of inverse-time


43 50/51P4.TMS 0.010~200.000
phase overcurrent protection.
Minimum operating time for stage 4 of inverse-time
44 50/51P4.tmin 0.010~20.000 (s)
phase overcurrent protection

7.3.1.17 Earth Fault Protection Settings (50/51G)

No. Item Remark Range


Setting of second harmonic component for blocking
1 50/51G.K_Hm2 0.000~1.000
earth fault elements
2 50/51G1.3I0_Set Current setting for stage 1 of earth fault protection (0.050~30.000)×In (A)
3 50/51G1.t_Op Time delay for stage 1 of earth fault protection 0.000~20.000 (s)
4 50/51G1.En Enable stage 1 of earth fault protection 0 or 1
Enable auto-reclosing blocked when stage 1 of
5 50/51G1.En_BlkAR 0 or 1
earth fault protection operates
Non_Directional
6 50/51G1.Opt_Dir Direction option for stage 1 of earth fault protection Forward
Reverse
Enable second harmonic blocking for stage 1 of
7 50/51G1.En_Hm2_Blk 0 or 1
earth fault protection
Enable blocking for stage 1 of earth fault protection
8 50/51G1.En_Abnor_Blk 0 or 1
under abnormal conditions
Enable blocking for stage 1 of earth fault protection
9 50/51G1.En_CTS_Blk 0 or 1
under CT failure conditions
DefTime
IECN
IECV
IECE
IECST
IECLT
Option of characteristic curve for stage 1 of earth ANSIE
10 50/51G1.Opt_Curve
fault protection ANSIV
ANSI
ANSIM
ANSILTE
ANSILTV
ANSILT
UserDefine
Time multiplier setting for stage 1 of inverse-time
11 50/51G1.TMS 0.010~200.000
earth fault protection
Minimum operating time for stage 1 of inverse-time
12 50/51G1.tmin 0.050~20.000 (t)
earth fault protection
Constant “α” for stage 1 of customized inverse-time
13 50/51G1.Alpha 0.010~5.000
characteristic earth fault protection

PCS-902 Line Distance Relay 7-19


Date: 2014-07-29
-09-07
7 Settings

Constant “C” for stage 1 of customized inverse-time


14 50/51G1.C 0.000~20.000
characteristic earth fault protection
Constant “K” for stage 1 of customized inverse-time
15 50/51G1.K 0.050~20.000
characteristic earth fault protection
16 50/51G2.3I0_Set Current setting for stage 2 of earth fault protection (0.050~30.000)×In (A)
17 50/51G2.t_Op Time delay for stage 2 of earth fault protection 0.000~20.000 (s)
18 50/51G2.En Enable stage 2 of earth fault protection 0 or 1
Enable auto-reclosing blocked when stage 2 of
19 50/51G2.En_BlkAR 0 or 1
earth fault protection operates
Non_Directional
20 50/51G2.Opt_Dir Direction option for stage 2 of earth fault protection Forward
Reverse
Enable second harmonic blocking for stage 2 of
21 50/51G2.En_Hm2_Blk 0 or 1
earth fault protection
Enable blocking for stage 2 of earth fault protection
22 50/51G2.En_Abnor_Blk 0 or 1
under abnormal conditions
Enable blocking for stage 2 of earth faultv protection
23 50/51G2.En_CTS_Blk 0 or 1
under CT failure conditions
DefTime
IECN
IECV
IECE
IECST
IECLT
Option of characteristic curve for stage 2 of earth
24 50/51G2.Opt_Curve ANSIE
fault protection
ANSIV
ANSI
ANSIM
ANSILTE
ANSILTV
ANSILT
Time multiplier setting for stage 2 of inverse-time
25 50/51G2.TMS 0.010~200.000
earth fault protection
Minimum operating time for stage 2 of inverse-time
26 50/51G2.tmin 0.050~20.000 (s)
earth fault protection
27 50/51G3.3I0_Set Current setting for stage 3 of earth fault protection (0.050~30.000)×In (A)
28 50/51G3.t_Op Time delay for stage 3 of earth fault protection 0.000~20.000 (s)
29 50/51G3.En Enable stage 3 of earth fault protection 0 or 1
Enable auto-reclosing blocked when stage 3 of
30 50/51G3.En_BlkAR 0 or 1
earth fault protection operates
Non_Directional
31 50/51G3.Opt_Dir Direction option for stage 3 of earth fault protection Forward
Reverse

7-20 PCS-902 Line Distance Relay


Date: 2014-07-29
7 Settings

Enable second harmonic blocking for stage 3 of


32 50/51G3.En_Hm2_Blk 0 or 1
earth fault protection
Enable blocking for stage 3 of earth fault protection
33 50/51G3.En_Abnor_Blk 0 or 1
under abnormal conditions
Enable blocking for stage 3 of earth fault protection
34 50/51G3.En_CTS_Blk 0 or 1
under CT failure conditions
DefTime
IECN
IECV
IECE
IECST
IECLT
Option of characteristic curve for stage 3 of earth
35 50/51G3.Opt_Curve ANSIE
fault protection
ANSIV
ANSI
ANSIM
ANSILTE
ANSILTV
ANSILT
Time multiplier setting for stage 3 of inverse-time
36 50/51G3.TMS 0.010~200.000
earth fault protection
Minimum operating time for stage 3 of inverse-time
37 50/51G3.tmin 0.050~20.000 (s)
earth fault protection
38 50/51G4.3I0_Set Current setting for stage 4 of earth fault protection (0.050~30.000)×In (A)
39 50/51G4.t_Op Time delay for stage 4 of earth fault protection 0.000~20.000 (s)
40 50/51G4.En Enable stage 4 of earth fault protection 0 or 1
Enable auto-reclosing blocked when stage 4 of
41 50/51G4.En_BlkAR 0 or 1
earth fault protection operates
Non_Directional
42 50/51G4.Opt_Dir Direction option for stage 4 of earth fault protection Forward
Reverse
Enable second harmonic blocking for stage 4 of
43 50/51G4.En_Hm2_Blk 0 or 1
earth fault protection
Enable blocking for stage 4 of earth fault protection
44 50/51G4.En_Abnor_Blk 0 or 1
under abnormal conditions
Enable blocking for stage 4 of earth fault protection
45 50/51G4.En_CTS_Blk 0 or 1
under CT failure conditions

PCS-902 Line Distance Relay 7-21


Date: 2014-07-29
-09-07
7 Settings

DefTime
IECN
IECV
IECE
IECST
IECLT
Option of characteristic curve for stage 4 of earth
46 50/51G4.Opt_Curve ANSIE
fault protection
ANSIV
ANSI
ANSIM
ANSILTE
ANSILTV
ANSILT
Time multiplier setting for stage 4 of inverse-time
47 50/51G4.TMS 0.010~200.000
earth fault protection
Minimum operating time for stage 4 of inverse-time
48 50/51G4.tmin 0.050~20.000 (s)
earth fault protection

7.3.1.18 Overcurrent Protection Settings for VT Circuit Failure (50PVT/50GVT)

No. Item Remark Range


Current setting of phase overcurrent protection
1 50PVT.I_Set (0.050~30.000)×In (A)
when VT circuit failure
Time delay of phase overcurrent protection when
2 50PVT.t_Op 0.000~10.000 (s)
VT circuit failure
Enable phase overcurrent protection when VT
3 50PVT.En 0 or 1
circuit failure
Current setting of ground overcurrent protection
4 50GVT.3I0_Set (0.050~30.000)×In (A)
when VT circuit failure
Time delay of ground overcurrent protection when
5 50GVT.t_Op 0.000~10.000 (s)
VT circuit failure
Enable ground overcurrent protection when VT
6 50GVT.En 0 or 1
circuit failure

7.3.1.19 Residual Current SOTF Protection Settings (50GSOTF)

No. Item Remark Range


1 50GSOTF.3I0_Set Current setting of residual current SOTF protection (0.050~30.000)×In (A)
2 50GSOTF.En Enable residual current SOTF protection 0 or 1

7.3.1.20 Overvoltage Protection Settings (59P)

No. Item Remark Range


Voltage setting for stage x of overvoltage protection
1 59Px.U_Set Un~2Unn (V)
(x=1, 2, 3)

7-22 PCS-902 Line Distance Relay


Date: 2014-07-29
7 Settings

Time delay for stage x of overvoltage protection (x=1, 2,


2 59Px.t_Op 0.000~30.000 (s)
3)
3 59Px.En Enable stage x of overvoltage protection (x=1, 2, 3) 0 or 1
Option of 1-out-of-3 mode or 3-out-of-3 mode (x=1, 2,
4 59Px.Opt_1P/3P 0 or 1
3)
Option of phase-to-phase voltage or phase voltage
5 59Px.Opt_Up/Upp 0 or 1
(x=1, 2, 3)
Enable stage x of overvoltage protection for alarm
6 59Px.En_Alm 0 or 1
purpose (x=1, 2, 3)
Enable transfer trip controlled by CB open position for
7 59Px.En_52b_TT 0 or 1
stage x of overvoltage protection (x=1, 2, 3)
Enable stage x of overvoltage protection operate to
8 59Px.En_TT 0 or 1
initiate transfer trip (x=1, 2, 3)
DefTime
IECN
IECV
IECE
IECST
IECLT
Option of characteristic curve for stage x of overvoltage
9 59Px.Opt_Curve ANSIE
protection (x=1, 2, 3)
ANSIV
ANSI
ANSIM
ANSILTE
ANSILTV
ANSILT
Time multiplier setting for stage x of inverse-time
10 59Px.TMS 0.010~200.000
overvoltage protection (x=1, 2, 3)
Minimum delay for stage x of inverse-time overvoltage
11 59Px.tmin 0.050~20.000 (s)
protection (x=1, 2, 3)

7.3.1.21 Negative-sequence Overvoltage Protection Settings (59Q)

No. Item Remark Range


Voltage setting for negative-sequence overvoltage
1 59Q.U_Set 0~Un (V)
protection
Time delay for negative-sequence overvoltage
2 59Q.t_Op 0.000~30.000 (s)
protection
3 59Q.En Enable negative-sequence overvoltage protection 0 or 1

7.3.1.22 Undervoltage Protection Settings (27P)

No. Item Remark Range


Voltage setting for stage x of undervoltage protection
1 27Px.U_Set 0~Unn (V)
(x=1, 2, 3)

PCS-902 Line Distance Relay 7-23


Date: 2014-07-29
-09-07
7 Settings

Time delay for stage x of undervoltage protection (x=1,


2 27Px.t_Op 0.000~30.000 (s)
2, 3)
3 27Px.En Enable stage x of undervoltage protection (x=1, 2, 3) 0 or 1
Enable stage x of undervoltage protection controlled by
4 27Px.En_FD_Ctrl 0 or 1
FD element reflecting current (x=1, 2, 3)
Enable stage x of undervoltage protection controlled by
5 27Px.En_Curr_Ctrl 0 or 1
current condition (x=1, 2, 3)
Enable stage x of undervoltage protection controlled by
6 27Px.En_VTS_Blk 0 or 1
VT circuit failure (x=1, 2, 3)
Option of 1-out-of-3 mode or 3-out-of-3 mode for stage
7 27Px.Opt_1P/3P 0 or 1
x of undervoltage protection (x=1, 2, 3)
Option of voltage criterion adopting phase-to-phase
8 27Px.Opt_Up/Upp voltage or phase voltage for stage x of undervoltage 0 or 1
protection
Enable stage x of undervoltage protection operate to
9 27Px.En_Alm 0 or 1
alarm (x=1, 2, 3)
DefTime
IECN
IECV
IECE
IECST
IECLT
Option of characteristic curve for stage x of
10 27Px.Opt_Curve ANSIE
undervoltage protection (x=1, 2, 3)
ANSIV
ANSI
ANSIM
ANSILTE
ANSILTV
ANSILT
Time multiplier setting for stage x of inverse-time
11 27Px.TMS 0.010~200.000
undervoltage protection (x=1, 2, 3)
Minimum delay for stage x of inverse-time undervoltage
12 27Px.tmin 0.050~20.000 (s)
protection (x=1, 2, 3)

7.3.1.23 Frequency Protection Settings (81O and 81U)

No. Item Remark Range


1 81O.f_Pkp Frequency pickup setting for overfrequency protection 50.000~65.000 (Hz)
Frequency setting for stage 1 of overfrequency
2 81O.OF1.f_Set 50.000~65.000 (Hz)
protection
3 81O.OF1.t_Op Time delay for stage 1 of overfrequency protection 0.050~20.000 (s)
4 81O.OF1.En Enable stage 1 of overfrequency protection 0 or 1
Frequency setting for stage 2 of overfrequency
5 81O.OF2.f_Set 50.000~65.000 (Hz)
protection

7-24 PCS-902 Line Distance Relay


Date: 2014-07-29
7 Settings

6 81O.OF2.t_Op Time delay for stage 2 of overfrequency protection 0.050~20.000 (s)


7 81O.OF2.En Enable stage 2 of overfrequency protection 0 or 1
Frequency setting for stage 3 of overfrequency
8 81O.OF3.f_Set 50.000~65.000 (Hz)
protection
9 81O.OF3.t_Op Time delay for stage 3 of overfrequency protection 0.050~20.000 (s)
10 81O.OF3.En Enable stage 3 of overfrequency protection 0 or 1
Frequency setting for stage 4 of overfrequency
11 81O.OF4.f_Set 50.000~65.000 (Hz)
protection
12 81O.OF4.t_Op Time delay for stage 4 of overfrequency protection 0.050~20.000 (s)
13 81O.OF4.En Enable stage 4 of overfrequency protection 0 or 1
Frequency pickup setting for underfrequency
14 81U.f_Pkp 45.000~60.000 (Hz)
protection
Rate of frequency change for blocking
15 81U.df/dt_Blk 0.200~20.000 (Hz/s)
underfrequency protection
Frequency setting for stage 1 of underfrequency
16 81U.UF1.f_Set 45.000~60.000 (Hz)
protection
17 81U.UF1.t_Op Time delay for stage 1 of underfrequency protection 0.050~30.000 (s)
18 81U.UF1.En Enable stage 1 of underfrequency protection 0 or 1
Enable rate of frequency change to block stage 1 of
19 81U.UF1.En_df/dt_Blk 0 or 1
underfrequency protection
Frequency setting for stage 2 of underfrequency
20 81U.UF2.f_Set 45.000~60.000 (Hz)
protection
21 81U.UF2.t_Op Time delay for stage 2 of underfrequency protection 0.050~30.000 (s)
22 81U.UF2.En Enable stage 2 of underfrequency protection 0 or 1
Enable rate of frequency change to block stage 2 of
23 81U.UF2.En_df/dt_Blk 0 or 1
underfrequency protection
Frequency setting for stage 3 of underfrequency
24 81U.UF3.f_Set 45.000~60.000 (Hz)
protection
25 81U.UF3.t_Op Time delay for stage 3 of underfrequency protection 0.050~30.000 (s)
26 81U.UF3.En Enable stage 3 of underfrequency protection 0 or 1
Enable rate of frequency change to block stage 3 of
27 81U.UF3.En_df/dt_Blk 0 or 1
underfrequency protection
Frequency setting for stage 4 of underfrequency
28 81U.UF4.f_Set 45.000~60.000 (Hz)
protection
29 81U.UF4.t_Op Time delay for stage 4 of underfrequency protection 0.050~30.000 (s)
30 81U.UF4.En Enable stage 4 of underfrequency protection 0 or 1
Enable rate of frequency change to block stage 4 of
31 81U.UF4.En_df/dt_Blk 0 or 1
underfrequency protection

7.3.1.24 Breaker Failure Protection Settings (50BF)

Note!

PCS-902 can be configured to support single circuit breaker application or double circuit

PCS-902 Line Distance Relay 7-25


Date: 2014-07-29
-09-07
7 Settings

breakers application by PCS-Exploerer. The prefix “CBx.” is added to all settings for circuit
breaker No.x (x=1 or 2).

No. Item Remark Range


1 CBx.50BF.I_Set Current setting of phase current criterion for BFP (0.050~30.000 )×In (A)
Current setting of zero-sequence current criterion
2 CBx.50BF.3I0_Set (0.050~30.000 )×In (A)
for BFP
Current setting of negative-sequence current
3 CBx.50BF.I2_Set (0.050~30.000 )×In (A)
criterion for BFP
4 CBx.50BF.t_ReTrp Time delay of re-tripping for BFP 0.000~10.000 (s)

5 CBx.50BF.t1_Op Time delay of stage 1 for BFP 0.000~10.000 (s)

6 CBx.50BF.t2_Op Time delay of stage 2 for BFP 0.000~10.000 (s)

7 CBx.50BF.En Enable breaker failure protection 0 or 1


8 CBx.50BF.En_ReTrp Enable re-trip function for BFP 0 or 1
Enable zero-sequence current criterion for BFP
9 CBx.50BF.En_3I0_1P 0 or 1
initiated by single-phase tripping contact
Enable zero-sequence current criterion for BFP
10 CBx.50BF.En_3I0_3P 0 or 1
initiated by three-phase tripping contact
Enable negative-sequence current criterion for BFP
11 CBx.50BF.En_I2_3P 0 or 1
initiated by three-phase tripping contact
Enable breaker failure protection can be initiated by
12 CBx.50BF.En_CB_Ctrl 0 or 1
normally closed contact of circuit breaker

7.3.1.25 Thermal Overload Protection Settings (49)

No. Item Remark Range


The factor setting for stage 1 of thermal overload
1 49-1.K protection which is associated to the thermal state 1.000~3.000
formula
The factor setting for stage 2 of thermal overload
2 49-2.K protection which is associated to the thermal state 1.000~3.000
formula
The reference current setting of the thermal
3 49.Ib_Set (0.050~30.000 )×In (A)
overload protection
The time constant setting of the IDMT overload
4 49.Tau 0.100~100.000 (min)
protection
Enable stage 1 of thermal overload protection for
5 49-1.En_Alm 0 or 1
alarm purpose
Enable stage 1 of thermal overload protection for
6 49-1.En_Trp 0 or 1
trip purpose
Enable stage 2 of thermal overload protection for
7 49-2.En_Alm 0 or 1
alarm purpose
Enable stage 2 of thermal overload protection for
8 49-2.En_Trp 0 or 1
trip purpose

7.3.1.26 Stub Overcurrent Protection Settings (50STB)

No. Name Remark Range


1 50STB.I_Set Current setting of stub overcurrent protection (0.050~30.000)×In (A)
2 50STB.t_Op Time delay of stub overcurrent protection 0.000~10.000 (s)

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7 Settings

3 50STB.En Enable stub overcurrent protection 0 or 1

7.3.1.27 Dead Zone Protection Settings (50DZ)

Note!

PCS-902 can be configured to support single circuit breaker application or double circuit
breakers application by PCS-Exploerer. The prefix “CBx.” is added to all settings for circuit
breaker No.x (x=1 or 2).

No. Name Remark Range


1 CBx.50DZ.I_Set Current setting of dead zone protection (0.050~30.000)×In (A)
2 CBx.50DZ.t_Op Time delay of dead zone protection 0.000~10.000 (s)
3 CBx.50DZ.En Enable dead zone protection 0 or 1

7.3.1.28 Pole Discrepancy Protection Settings (62PD)

Note!

PCS-902 can be configured to support single circuit breaker application or double circuit
breakers application by PCS-Exploerer. The prefix “CBx.” is added to all settings for circuit
breaker No.x (x=1 or 2).

No. Item Remark Range


Current setting of residual current criterion for
1 CBx.62PD.3I0_Set (0.050~30.000 )×In (A)
pole discrepancy protection
Current setting of negative-sequence current
2 CBx.62PD.I2_Set (0.050~30.000 )×In (A)
criterion for pole discrepancy protection
3 CBx.62PD.t_Op Time delay of pole discrepancy protection 0.000~600.000 (s)

4 CBx.62PD.En Enable pole discrepancy protection 0 or 1


Enable residual current criterion and
5 CBx.62PD.En_3I0/I2_Ctrl negative-sequence current criterion for pole 0 or 1
discrepancy protection

7.3.1.29 Broken Conductor Protection Settings (46BC)

No. Item Remark Range


Ratio setting (negative-sequence current to
1 46BC.I2/I1_Set positive-sequence current) of broken conductor 0.20~1.00
protection
2 46BC.t_Op Time delay of broken conductor protection 0.000~600.000 (s)
Minimum operation current of broken conductor
3 46BC.I_Min (0.050~30.000)×In (A)
protection
Enable broken conductor protection to operate to
4 46BC.En_Trp 0 or 1
trip
Enable broken conductor protection to operate to
5 46BC.En_Alm 0 or 1
alarm

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7 Settings

7.3.1.30 Reverse Power Protection Settings (32R)

No. Item Remark Range


Power setting of stage 1 of reverse power
1 32R1.P_Set (0.100~50.000)×In (W)
protection
Time delay of stage 1 of reverse power protection
2 32R1.t_Alm 0.100~3000.000 (s)
for alarm purpose
Time delay of stage 1 of reverse power protection
3 32R1.t_Trp 0.100~3000.000 (s)
for tripping purpose
Enable stage 1 of reverse power protection to
4 32R1.En_Trp 0 or 1
operate to trip
Enable stage 1 of reverse power protection to
5 32R1.En_Alm 0 or 1
operate to alarm
Power setting of stage 2 of reverse power
6 32R2.P_Set (0.100~50.000)×In (W)
protection
7 32R2.t_Trp Time delay of stage 2 of reverse power protection 0.100~3000.000 (s)
Enable stage 2 of reverse power protection to
8 32R2.En_Trp 0 or 1
operate to trip
The directionality option of reverse power 0: forward direction
9 32R.Opt_Dir
protection 1: reverse direction

7.3.1.31 Synchrocheck Settings (25)

Note!

PCS-902 can be configured to support single circuit breaker application or double circuit
breakers application by PCS-Exploerer. The prefix “CBx.” is added to all settings for circuit
breaker No.x (x=1 or 2).

No. Item Remark Range


1 CBx.25.Opt_Source_UL1 Voltage selecting mode of line 1. 0~5
2 CBx.25.Opt_Source_UB1 Voltage selecting mode of bus 1. 0~5
3 CBx.25.Opt_Source_UL2 Voltage selecting mode of line 2. 0~5
4 CBx.25.Opt_Source_UB2 Voltage selecting mode of bus 2. 0~5

NoVoltSel
Option of circuit breaker configuration, and it
DblBusOneCB
5 CBx.CBConfigMode should be set as “NoVoltSel” if no voltage selection
3/2BusCB
is adopted.
3/2TieCB

6 CBx.25.U_Dd Voltage threshold of dead check 0.05Un~0.8Un (V)

7 CBx.25.U_Lv Voltage threshold of live check 0.5Un~Un (V)

8 CBx.25.K_Usyn Compensation coefficient for synchronism voltage 0.20-5.00

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7 Settings

Phase difference limit of synchronism check for


9 CBx.25.phi_Diff 0~ 89 (deg)
AR
Compensation for phase difference between two
10 CBx.25.phi_Comp 0~359 (deg)
synchronism voltages
Frequency difference limit of synchronism check
11 CBx.25.f_Diff 0.02~1.00 (Hz)
for AR
Voltage difference limit of synchronism check for
12 CBx.25.U_Diff 0.02Un~0.8Un (V)
AR

13 CBx.25.t_DdChk Time delay to confirm dead check condition 0.010~25.000 (s)

Time delay to confirm synchronism check


14 CBx.25.t_SynChk 0.010~25.000 (s)
condition
15 CBx.25.En_fDiffChk Enable frequency difference check 0 or 1
16 CBx.25.En_SynChk Enable synchronism check 0 or 1
17 CBx.25.En_DdL_DdB Enable dead line and dead bus (DLDB) check 0 or 1
18 CBx.25.En_DdL_LvB Enable dead line and live bus (DLLB) check 0 or 1
19 CBx.25.En_LvL_DdB Enable live line and dead bus (LLDB) check 0 or 1
20 CBx.25.En_NoChk Enable AR without any check 0 or 1
21 CBx.25.En_3PLvChk Enable live three-phase check of line 0 or 1

7.3.1.32 Auto-reclosing Settings (79)

Note!

PCS-902 can be configured to support single circuit breaker application or double circuit
breakers application by PCS-Exploerer. The prefix “CBx.” is added to all settings for circuit
breaker No.x (x=1 or 2).

No. Item Remark Range


1 CBx.79.N_Rcls Maximum number of reclosing attempts 1~4
2 CBx.79.t_Dd_1PS1 Dead time of first shot 1-pole reclosing 0.000~600.000 (s)
3 CBx.79.t_Dd_3PS1 Dead time of first shot 3-pole reclosing 0.000~600.000 (s)
4 CBx.79.t_Dd_3PS2 Dead time of second shot 3-pole reclosing 0.000~600.000 (s)
5 CBx.79.t_Dd_3PS3 Dead time of third shot 3-pole reclosing 0.000~600.000 (s)
6 CBx.79.t_Dd_3PS4 Dead time of fourth shot 3-pole reclosing 0.000~600.000 (s)
Time delay of circuit breaker in closed position
7 CBx.79.t_CBClsd 0.000~600.000 (s)
before reclosing
Time delay to wait for CB healthy, and begin to
timing when the input signal [79.CB_Healthy] is
8 CBx.79.t_CBReady 0.000~600.000 (s)
de-energized and if it is not energized within this
time delay, AR will be blocked.
9 CBx.79.t_Wait_Chk Maximum wait time for synchronism check 0.000~600.000 (s)
Time delay allow for CB status change to conform
10 CBx.79.t_Fail 0.000~600.000 (s)
reclosing successful

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7 Settings

11 CBx.79.t_PW_AR Pulse width of AR closing signal 0.000~600.000 (s)


12 CBx.79.t_Reclaim Reclaim time of AR 0.000~600.000 (s)
Time delay of excessive trip signal to block
13 CBx.79.t_PersistTrp 0.000~600.000 (s)
auto-reclosing
Drop-off time delay of blocking AR, when blocking
14 CBx.79.t_DDO_BlkAR signal for AR disappears, AR blocking condition 0.000~600.000 (s)
drops off after this time delay
15 CBx.79.t_AddDly Additional time delay for auto-reclosing 0.000~600.000 (s)
Maximum wait time for reclosing permissive signal
16 CBx.79.t_WaitMaster 0.000~600.000 (s)
from master AR
Time delay of discriminating another fault, and begin
to times after 1-pole AR initiated, 3-pole AR will be
17 CBx.79.t_SecFault initiated if another fault happens during this time 0.000~600.000 (s)
delay. AR will be blocked if another fault happens
after that.
Enable auto-reclosing blocked when a fault occurs
18 CBx.79.En_PDF_Blk 0 or 1
under pole disagreement condition
Enable auto-reclosing with an additional dead time
19 CBx.79.En_AddDly 0 or 1
delay
20 CBx.79.En_CutPulse Enable adjust the length of reclosing pulse 0 or 1
Enable confirm whether AR is successful by
21 CBx.79.En_FailCheck 0 or 1
checking CB state
22 CBx.79.En Enable auto-reclosing 0 or 1
Enable AR by external input signal besides logic
23 CBx.79.En_ExtCtrl 0 or 1
setting [79.En]
Enable AR be initiated by open state of circuit
24 CBx.79.En_CBInit 0 or 1
breaker
25 CBx.79.Opt_Priority Option of AR priority None, High or Low
26 CBx.79.SetOpt Control option of AR mode 0 or 1
27 CBx.79.En_1PAR Enable 1-pole AR mode 0 or 1
28 CBx.79.En_3PAR Enable 3-pole AR mode 0 or 1
29 CBx.79.En_1P/3PAR Enable 1/3-pole AR mode 0 or 1

7.3.1.33 Transfer Trip Settings (TT)

No. Item Remark Range


1 TT.t_Op Time delay of transfer trip 0.000~600.000 (s)
2 TT.En_FD_Ctrl Enable transfer trip controlled by local fault detector 0 or 1

7.3.1.34 Tripping Logic Settings

Note!

PCS-902 can be configured to support single circuit breaker application or double circuit

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7 Settings

breakers application by PCS-Exploerer. The prefix “CBx.” is added to all settings for circuit
breaker No.x (x=1 or 2).

No. Item Remark Range


Enable auto-reclosing blocked when multi-phase fault
1 En_MPF_Blk_AR 0 or 1
happens
Enable auto-reclosing blocked when three-phase fault
2 En_3PF_Blk_AR 0 or 1
happens
Enable auto-reclosing blocked when selection of faulty
3 En_PhSF_Blk_AR 0 or 1
phase fails
Enable three-phase tripping mode for any fault
4 CBx.En_Trp3P 0 or 1
conditions
The dwell time of tripping command, empirical value is
5 t_Dwell_Trp 0.000~10.000 (s)
0.04

7.3.1.35 VT Circuit Supervision Settings (VTS)

No. Item Remark Range


1 VTS.t_DPU Pickup time delay of VT circuit supervision 0.200~100.000
2 VTS.t_DDO Dropoff time delay of VT circuit supervision 0.200~100.000
3 VTS.En_Out_VT VT is not connected to the protection device 0 or 1
If three-phase voltage used for protection measurement
comes from line side (for example, 3/2 breaker), it
4 VTS.En_LineVT 0 or 1
should be set as “1”. If three-phase voltage comes from
busbar side, it should be set as “0”.
5 VTS.En Enable alarm function of VT circuit supervision 0 or 1

7.3.2 Access Path


MainMenu“Settings”“Prot Settings”

7.4 Logic Link Settings


The logic link settings are used to determine whether the relevant function of this device is
enabled or disabled. If this device supports the logic link function, it will have a corresponding
submenu in the submenu “Logic Links” for the logic link settings.

Each logic link settings is an “AND” condition of enabling the relevant function with the
corresponding binary input and logic setting. Through SAS or RTU, logic link settings can be set
as “1” or “0”; and it means that the relevant function can be in service or out of service through
remote command. It provides convenience for operation management.

7.4.1 Setting Description

7.4.1.1 Function Link Settings

The function link settings can be defined according to project specification through the
configuration tool, PCS-Explorer.

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7 Settings

No. Item Remark Range


1 Link_01 Function link setting 01 0 or 1
2 Link_02 Function link setting 02 0 or 1
3 Link_03 Function link setting 03 0 or 1
4 Link_04 Function link setting 04 0 or 1
5 Link_05 Function link setting 05 0 or 1
6 Link_06 Function link setting 06 0 or 1
7 Link_07 Function link setting 07 0 or 1
8 Link_08 Function link setting 08 0 or 1

7.4.2 Access Path


MainMenu“Settings”“Logic Links”

7.5 Measurement and Control Settings


7.5.1 Setting Description

7.5.1.1 Synchronism Settings

No. Item Remark Range


1 MCBrd.25.Opt_Source_UL1 Voltage selecting mode for line 1 0~5
2 MCBrd.25.Opt_Source_UB1 Voltage selecting mode for bus 1 0~5
3 MCBrd.25.Opt_Source_UL2 Voltage selecting mode for line 2 0~5
4 MCBrd.25.Opt_Source_UB2 Voltage selecting mode for bus 2 0~5
5 MCBrd.25.U_Dd Voltage threshold of dead check 1.000~100.000 (V)
6 MCBrd.25.U_Lv Voltage threshold of live check 1.000~100.000 (V)
7 MCBrd.25.K_Usyn Compensation coefficient for synchronism voltage 0.20-5.00
Phase difference limit of synchronism check for
8 MCBrd.25.phi_Diff 0.10~ 180.00 (deg)
manual closing
Compensation for phase difference between two
9 MCBrd.25.phi_Comp 0~360 (deg)
synchronous voltages
Frequency difference limit of synchronism check
10 MCBrd.25.f_Diff 0.00~3.00 (Hz)
for manual closing
Voltage difference limit of synchronism check for
11 MCBrd.25.U_Diff 1.000~100.000 (V)
manual closing
12 MCBrd.25.En_SynChk Enable synchronism check 0 or 1
13 MCBrd.25.En_DdL_DdB Enable dead line and dead bus (DLDB) check 0 or 1
14 MCBrd.25.En_DdL_LvB Enable dead line and live bus (DLLB) check 0 or 1
15 MCBrd.25.En_LvL_DdB Enable live line and dead bus (LLDB) check 0 or 1
16 MCBrd.25.En_NoChk Enable manual closing without any check 0 or 1
Threshold of rate of frequency change between
17 MCBrd.25.df/dt 0.10~5.00 (Hz/s)
both sides of CB for synchronism-check.

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7 Settings

Circuit breaker closing time. It is the time from


18 MCBrd.25.t_Close_CB receiving closing command pulse till the CB is 0~1000 (ms)
completely closed.
From receiving a closing command, this device
will continuously check whether between incoming
voltage and reference voltage involved in
synchronism check (or dead check) can meet the
19 MCBrd.25.t_Wait_Chk 5.000~30.000 (s)
criteria. If the synchronism check (or dead check)
criteria are not met within the duration of this time
delay, the failure of synchronism-check (or dead
check) will be confirmed.

7.5.1.2 Dual Point Binary Input Settings

Thses settings are applied to configure the status change confirmation time for No.xx double point
binary inputs. Up to 10 virtual double point binary inputs are provided in this device.

If a double point binary input changes from normal status to invalid status, i.e.: double point error
occurs, [CSWIxx.t_DPU_DPS] will be applied as the debouncing time for No.xx double point
binary input.
No. Name Remark Range

These settings are applied to configure the debouncing


1 CSWIxx.t_DPU_DPS time. “DPU” is the abbreviation of “Delay Pick Up”. 0~60000 (ms)
(xx=01, 02….10)

7.5.1.3 Control Settings

No. Name Remark Range

No.xx holding time of a normal open contact of remote


1 CSWIxx.t_PW_Opn opening CB, disconnector or for signaling purpose. 0~60000 (ms)
(xx=01, 02….10)

No.xx closing time of a normal open contact of remote


2 CSWIxx.t_PW_Cls closing CB, disconnector or for signaling purpose. 0~60000 (ms)
(xx=01, 02….10)

7.5.1.4 Interlock Settings

No. Name Remark Range

Enable No.xx open output of the BO module be controlled


1 CSWIxx.En_Opn_Blk by the interlocking logic 0 or 1
(xx=01, 02….10)

Enable No.xx closing output of the BO module be


2 CSWIxx.En_Cls_Blk controlled by the interlocking logic 0 or 1
(xx=01, 02….10)

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7 Settings

7.5.2 Access Path


MainMenu“Settings”“BCU Settings”

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8 Human Machine Interface

8 Human Machine Interface

Table of Contents
8 Human Machine Interface ............................................................... 8-a
8.1 Overview .......................................................................................................... 8-1
8.1.1 Keypad Operation .............................................................................................................. 8-2

8.1.2 LED Indications .................................................................................................................. 8-3

8.1.3 Front Communication Port ................................................................................................. 8-3

8.1.4 Ethernet Port Setup ........................................................................................................... 8-4

8.2 Menu Tree ........................................................................................................ 8-5


8.2.1 Overview ............................................................................................................................ 8-5

8.2.2 Main Menus ....................................................................................................................... 8-6

8.2.3 Sub Menus ......................................................................................................................... 8-7

8.3 LCD Display ................................................................................................... 8-27


8.3.1 Overview .......................................................................................................................... 8-27

8.3.2 Normal Display................................................................................................................. 8-28

8.3.3 Display Disturbance Records ........................................................................................... 8-29

8.3.4 Display Supervision Event ............................................................................................... 8-30

8.3.5 Display IO Events ............................................................................................................ 8-31

8.3.6 Display Device Logs ........................................................................................................ 8-32

8.4 Keypad Operation ......................................................................................... 8-33


8.4.1 View Device Measurements ............................................................................................. 8-33

8.4.2 View Device Status .......................................................................................................... 8-33

8.4.3 View Device Records ....................................................................................................... 8-33

8.4.4 Print Device Records ....................................................................................................... 8-34

8.4.5 View Device Setting ......................................................................................................... 8-35

8.4.6 Modify Device Setting ...................................................................................................... 8-35

8.4.7 Copy Device Setting ........................................................................................................ 8-38

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8 Human Machine Interface

8.4.8 Switch Setting Group ....................................................................................................... 8-38

8.4.9 Delete Device Records .................................................................................................... 8-39

8.4.10 Remote Control .............................................................................................................. 8-40

8.4.11 Modify Device Clock ....................................................................................................... 8-43

8.4.12 View Module Information................................................................................................ 8-44

8.4.13 Check Software Version ................................................................................................. 8-44

8.4.14 Communication Test....................................................................................................... 8-44

8.4.15 Select Language ............................................................................................................ 8-45

List of Figures
Figure 8.1-1 Front panel ............................................................................................................8-1

Figure 8.1-2 Keypad buttons ....................................................................................................8-2

Figure 8.1-3 LED indications ....................................................................................................8-3

Figure 8.1-4 Corresponding cable of the RJ45 port in the front panel ..................................8-4

Figure 8.1-5 Rear view and terminal definition of NR1102D...................................................8-5

Figure 8.2-1 Menu tree ..............................................................................................................8-7

List of Tables
Table 8.1-1 Definition of the 8-core cable ................................................................................8-4

Table 8.3-1 Tripping report messages....................................................................................8-30

Table 8.3-2 User operating event list......................................................................................8-32

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8 Human Machine Interface

The operator can access the protective device from the front panel. Local communication with the
protective device is possible using a computer via a multiplex RJ45 port on the front panel.
Furthermore, remote communication is also possible using a PC with the substation automation
system via rear RS485 port or rear Ethernet port. The operator is able to check the protective
device status at any time.

This chapter describes human machine interface (HMI), and give operator an instruction about
how to display or print event report, setting and so on through HMI menu tree and display metering
value, including r.m.s. current, voltage and frequency etc. through LCD. Procedures to change
active setting group or a settable parameter value through keypad is also described in details.

Note!

About three measurements in menu “Measurements”, please refer to the following


description:

“Measurements1” is use to display measured values from protection calculation DSP


(displayed in secondary value)

“Measurements2” is used to display measured values from fault detector DSP


(displayed in secondary value)

“Measurements3” is used to display measured primary values and other calculated


quantities

8.1 Overview
The human-machine interface consists of a human-machine interface (HMI) module which allows
a communication to be as simple as possible for the user. The HMI module helps to draw your
attention to something that has occurred which may activate a LED or a report displayed on the
LCD. Operator can locate the data of interest by navigating the keypad.

1 11
HEALTHY PCS-902
2 12
5
ALARM
3 13

4 14
GRP

5 15

6 16 ENT
ESC

7 17
4
8 18

1
9 19
3
10 20

Figure 8.1-1 Front panel

The function of HMI module:

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8 Human Machine Interface

No. Item Description


A 320×240 dot matrix backlight LCD display is visible in dim lighting
1 LCD conditions. The corresponding messages are displayed when there is
operation implemented.
20 status indication LEDs, 2 LEDs are fixed as the signals of “HEALTHY”
2 LED (green) and “ALARM” (yellow), 18 LEDs are configurable with selectable
color among green, yellow and red.
3 Keypad Navigation keypad and command keys for full access to device
4 Communication port a multiplex RJ45 port for local communication with a PC
5 Logo Type and designation and manufacturer of device

8.1.1 Keypad Operation GR


P

ENT
ESC

Figure 8.1-2 Keypad buttons

1. “ESC”:

 Cancel the operation

 Quit the current menu

2. “ENT”:

 Execute the operation

 Confirm the interface

3. “GRP”

 Activate the switching interface of setting group

4. leftward and rightward direction keys (“◄” and “►”):

 Move the cursor horizontally

 Enter the next menu or return to the previous menu

5. upward and downward direction keys (“▲” and “▼”)

 Move the cursor vertically

 Select command menu within the same level of menu

6. plus and minus sign keys (“+” and “-”)

 Modify the value

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8 Human Machine Interface

 Modify and display the message number

 Page up/down

8.1.2 LED Indications

HEALTHY
ALARM

Figure 8.1-3 LED indications

A brief explanation has been made as bellow.

LED Display Description


When the equipment is out of service or any hardware error is defected during
Off
HEALTHY self-check.

Steady Green Lit when the equipment is in service and ready for operation.

Off When equipment in normal operating condition.


ALARM
Steady Yellow Lit when VT circuit failure, CT circuit failure or other abnormal alarm is issued.

Note!

“HEALTHY” LED can only be turned on by energizing the device and no abnormality
detected.

“ALARM” LED is turned on when abnormalities of device occurs like above mentioned
and can be turned off after abnormalities are removed except alarm report [CTS.Alm]
which can only be reset only when the failure is removed and the device is rebooted or
re-energized.

Other LED indicators with no labels are configurable and user can configure them to be lit
by signals of operation element, alarm element and binary output contact according to
requirement through PCS-Explorer software, but as drawn in figure, 2 LEDs are fixed as
the signals of “HEALTHY” (green) and “ALARM” (yellow), 18 LEDs are configurable with
selectable color among green, yellow and red.

8.1.3 Front Communication Port


There is a multiplex RJ45 port on the front panel. This port can be used as an RS-232 serial port

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8 Human Machine Interface

as well as a twisted-pair ethernet port. As shown in the following figure, a customized cable is
applied for debugging via this multiplex RJ45 port.

P2

P1

P3

Figure 8.1-4 Corresponding cable of the RJ45 port in the front panel

In the above figure and the following table:

P1: To connect the multiplex RJ45 port. An 8-core cable is applied here.

P2: To connect the twisted-pair ethernet port of the computer.

P3: To connect the RS-232 serial port of the computer.

The definition of the 8-core cable in the above figure is introduced in the following table.

Table 8.1-1 Definition of the 8-core cable

Terminal Device side Computer side


Core color Function
No. (Left) (Right)
1 Orange & white TX+ of the ethernet port P1-1 P2-1
2 Orange TX- of the ethernet port P1-2 P2-2
3 Green & white RX+ of the ethernet port P1-3 P2-3
4 Blue TXD of the RS-232 serial port P1-4 P3-2
5 Brown & white RXD of the RS-232 serial port P1-5 P3-3
6 Green RX- for the ethernet port P1-6 P2-6
7 Blue & white P1-7
The ground connection of the RS-232 port. P3-5
8 Brown P1-8

8.1.4 Ethernet Port Setup


MON plug-in module is equipped with two or four 100Base-TX Ethernet interface, take NR1102D
as an example, as shown in Figure 8.1-5. Its rear view and the definition of terminals.

The Ethernet port can be used to communication with PC via auxiliary software (PCS-Explorer)
after connecting the protection device with PC, so as to fulfill on-line function (please refer to the
instruction manual of PCS-Explorer). At first, the connection between the protection device and PC
must be established. Through setting the IP address and subnet mask of corresponding Ethernet
interface in the menu “Settings→Device Setup→Comm Settings”, it should be ensured that the
protection device and PC are in the same network segment. For example, setting the IP address

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8 Human Machine Interface

and subnet mask of network A. (using network A to connect with PC)

PC: IP address is set as “198.87.96.102”, subnet mask is set as “255.255.255.0”

The IP address and subnet mask of protection device should be [IP_LAN1]= 198.87.96.XXX,
[Mask_LAN1]=255.255.255.0, [En_LAN1]=1. (XXX can be any value from 0 to 255 except 102)

If the logic setting [En_LAN1] is non-available, it means that network A is always enabled.

NR1102D

ETHERNET

Network A

Network B

Network C

Network D

Figure 8.1-5 Rear view and terminal definition of NR1102D

Note!

If using other Ethernet port, for example, Ethernet B, the logic setting [En_LAN2] must be
set as “1”.

8.2 Menu Tree


8.2.1 Overview
Press “▲” of any running interface and enter the main menu. Select different submenu by “▲” and
“▼”. Enter the selected submenu by pressing “ENT” or “►”. Press “◄” and return to the previous
menu. Press “ESC” back to main menu directly. For sake of entering the command menu again, a
command menu will be recorded in the quick menu after its execution. Five latest command
menus can be recorded in the quick menu. When five command menus are recorded, the latest
command menu will cover the earliest one, adopting the “first in first out” principle. It is arranged
from top to bottom and in accordance with the execution order of command menus.

Press “▲” to enter the main menu with the interface as shown in the following diagram:

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MainMenu

Language
Clock

Quick Menu

For the first powered device, there is no record in quick menu. Press “▲” to enter the main menu
with the interface as shown in the following diagram:

Measurements
Status
Records
Settings
Print
Local Cmd
Information
Test
Clock
Language

The descriptions about menu are based on the maximized configuration, for a specific project, if
some function is not available, the corresponding submenu will hidden.

8.2.2 Main Menus


The menu of PCS-902 is organized into main menu and submenus, much like a PC directory
structure. The menu of PCS-902 is divided into 10 sections:

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Main Menu

Measurements

Status

Records

Settings

Print

Local Cmd

Information

Test

Clock

Language

Figure 8.2-1 Menu tree

Under main interface, press “▲” to enter main menu, and select submenu by pressing “▲”, “▼”
and “ENT”. The command menu adopts a tree shaped content structure. The above diagram
provides the integral structure and all main menus (first-level menus) under menu tree of the
device.

8.2.3 Sub Menus


8.2.3.1 Measurements

Main Menu

Measurements

Measurements1

Measurements2

Measurements3

This menu is used to display real-time measured values, including AC voltage, AC current, phase
angle and calculated quantities. These data can help users to acquaint the device′s status. This
menu comprises following submenus. Please refer to section “Measurement” about the detailed
measured values.

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No. Item Function description

Display measured values from protection calculation DSP (Displayed in


1 Measurements1
secondary value)

Display measured values from fault detector DSP (Displayed in


2 Measurements2
secondary value)

3 Measurements3 Display measured primary values and other calculated quantities

8.2.3.2 Status

Main Menu

Status

Inputs

Outputs

Superv State

This menu is used to display real time input signals, output signals and alarm signals of the device.
These data can help users to acquaint the device′s status. This menu comprises following
submenus. Please respectively refer to section “Signal List” about the detailed introduction of input
signals and output signals, and section “Supervision Alarms” about the detailed introduction of
alarm signals.

No. Item Function description

1 Inputs Display all input signal states

2 Outputs Display all output signal states

3 Superv State Display supervision alarm states

The submenu “Inputs” comprises the following command menus.

Main Menu

Status

Inputs

Contact Inputs

GOOSE Inputs

Prot Ch Inputs

No. Item Function description

1 Contact Inputs Display states of binary inputs derived from opto-isolated channels

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2 GOOSE Inputs Display states of GOOSE binary inputs.

3 Prot Ch Inputs Display states of binary inputs received from protection channel.

The submenu “Outputs” comprises the following command menus.

Main Menu

Status

Outputs

Contact Outputs

GOOSE Outputs

Interlock Status

Prot Ch Outputs

No. Item Function description

1 Contact Outputs Display states of contact binary outputs

2 GOOSE Outputs Display states of GOOSE binary outputs

3 Interlock Status Display states of interlock result of each remote control.

4 Prot Ch Outputs Display states of channel outputs

The submenu “Superv State” comprises the following command menus.

Main Menu

Status

Superv State

Prot Superv

FD Superv

GOOSE Superv

SV Superv

BCU Superv

No. Item Function description

1 Prot Superv Display states of self-supervision signals from protection calculation DSP

2 FD Superv Display states of self-supervision signals from fault detector DSP

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3 GOOSE Superv Display states of GOOSE self-supervision signals

4 SV Superv Display states of SV self-supervision signals

5 BCU Superv Display states of measurement and control self-supervision signals

8.2.3.3 Records

Main Menu

Records

Disturb Records

Superv Events

IO Events

Device Logs

Control Logs

Clear Records

This menu is used to display all kinds of records, including the disturbance records, supervision
events, binary events and device logs, so that the operator can load to view and use as the
reference of analyzing accidents and repairing the device. All records are stored in non-volatile
memory, it can still record them even if it loses its power.

This menu comprises the following submenus.

No. Item Function description


1 Disturb Records Display disturbance records of the device
2 Superv Events Display supervision events of the device
3 IO Events Display binary events of the device
4 Device Logs Display device logs of the device
5 Control Logs Display control logs of the device
6 Clear Records Clear all records.

8.2.3.4 Settings

Main Menu

Settings

System Settings

Prot Settings

BCU Settings

Logic Links

Device Setup

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This menu is used to check the device setup, system parameters, protection settings and logic
links settings, as well as modifying any of the above setting items. Moreover, it can also execute
the setting copy between different setting groups.

This menu comprises the following submenus.

No. Item Function description

1 System Settings Check or modify the system parameters

2 Prot Settings Check or modify the protection settings

3 BCU Settings Check or modify the measurement and control settings

Check or modify the logic links settings, including function links, SV links,
4 Logic Links
GOOSE links and spare links

5 Device Setup Check or modify the device setup

The submenu “Prot Settings” includes the following command menus.

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Main Menu

Settings

Prot Settings

Line Settings

FD Settings

AuxE Settings

Direction Settings

Pilot Scheme Settings

Rmt CommCh Settings

DPFC Dist Settings

LoadEnch Settings

Dist Settings

ROC Settings

SOTF Settings

OC Settings

VTF OC Settings

BRC Settings

RevPower Settings

BFP Settings

Deadzone Settings

OV Settings

UV Settings

NegOV Settings

ThOvld Settings

PD Settings

Stub Settings

FreqProt Settings

MiscProt Settings

VTS/CTS Settings

Trip Logic Settings

CB1 AR/Syn Settings

CB2 AR/Syn Settings

Copy Settings

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No. Item Function description

1 Line Settings Check or modify line parameters

2 FD Settings Check or modify fault detector element settings

3 AuxE Settings Check or modify auxiliary element settings

4 Direction Settings Check or modify direction control element settings

Check or modify pilot distance protection and pilot directional earth-fault


5 Pilot Scheme Settings
protection settings

6 Rmt CommCh Settings Check or modify optical pilot channel settings

7 DPFC Dist Settings Check or modify DPFC distance protection settings

8 LoadEnch Settings Check or modify load encroachment settings

9 Dist Settings Check or modify distance protection settings

10 ROC Settings Check or modify directional earth-fault protection settings

11 SOTF Settings Check or modify SOTF distance and overcurrent protection settings

12 OC Settings Check or modify phase overcurrent protection settings

13 VTF OC Settings Check or modify overcurrent protection settings for VT circuit failure

14 BRC Settings Check or modify broken conductor protection settings

15 RevPower Settings Check or modify reverse power protection settings

16 BFP Settings Check or modify breaker failure protection settings

17 Deadzone Settings Check or modify dead zone settings

18 OV Settings Check or modify overvoltage protection settings

19 UV Settings Check or modify undervoltage protection settings

20 NegOV Settings Check or modify negative-sequence overvoltage protection settings

21 ThOvld Settings Check or modify thermal overload protection settings

22 PD Settings Check or modify pole discrepancy protection settings

23 Stub Settings Check or modify stub overcurrent protection settings

24 FreqProt Settings Check or modify frequency protection settings

25 MiscProt Settings Check or modify miscellaneous settings

26 VTS/CTS Settings Check or modify VT circuit supervision and CT circuit supervision settings

27 Trip Logic Settings Check or modify trippling logic settings

Check or modify synchronism check and auto-reclosing settings of circuit


28 CB1 AR/Syn Settings
breaker No.1

Check or modify synchronism check and auto-reclosing settings of circuit


29 CB2 AR/Syn Settings
breaker No.2

30 Copy Settings Copy setting between different setting groups

The submenu “BCU Settings” includes the following command menus.

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Main Menu

Settings

BCU Settings

Syn Settings

BI Settings

Control Settings

Interlock Settings

No. Item Function description

1 Syn Settings Check or modify manual sysnchronism check settings

2 BI Settings Check or modify binary input settings

3 Control Settings Check or modify control settings

4 Interlock Settings Check or modify interlock settings

The submenu “Logic Links” comprises the following command menus.

Main Menu

Settings

Logic Links

Function Links

GOOSE Send Links

GOOSE Recv Links

SV Links

No. Item Function description

1 Function Links Check or modify function links settings

2 GOOSE Send Links Check or modify GOOSE sending links settings

3 GOOSE Recv Links Check or modify GOOSE receiving links settings

4 SV Links Check or modify SV links settings

The submenu “Device Setup” comprises the following command menus.

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Main Menu

Settings

Device Setup

Device Settings

Comm Settings

Label Settings

No. Item Function description

1 Device Settings Check or modify the device settings.

2 Comm Settings Check or modify the communication settings.

3 Label Settings Check or modify the label settings of each protection element.

8.2.3.5 Print

Main Menu

Print

Device Info

Settings

Disturb Records

Superv Events

IO Events

Prot Ch Superv

Prot Ch Statistics

Device Status

Waveforms

IEC103 Info

Cancel Print

This menu is used to print device description, settings, all kinds of records, waveforms, information
related with IEC60870-5-103 protocol, channel state and channel statistic.

This menu comprises the following submenus.

No. Item Function description

1 Device Info Print the description information of the device, including software

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version.

Print device setup, system parameters, protection settings and logic


links settings. It can print by different classifications as well as printing all
2 Settings
settings of the device. Besides, it can also print the latest modified
settings.

3 Disturb Records Print the disturbance records

4 Superv Events Print the supervision events

5 IO Events Print the binary events

Print the self-check information of optical fibre channel, which is made of


6 Prot Ch Superv some hexadecimal characters and used to developer analyze channel
state

Print the statistic report of optical fibre channel, which is formed A.M.
7 Prot Ch Statistics
9:00 every day

Print the current state of the device, including the sampled value of
8 Device Status
voltage and current, the state of binary inputs, setting and so on

9 Waveforms Print the recorded waveforms

Print 103 Protocol information, including function type (FUN),


10 IEC103 Info information serial number (INF), general classification service group
number, and channel number (ACC)

11 Cancel Print Cancel the print command

The submenu “Settings” comprises the following submenus.

Main Menu

Print

Settings

System Settings

Prot Settings

BCU Settings

Logic Links

Device Setup

All Settings

Latest Chgd Settings

No. Item Function description

1 System Settings Print the system parameters

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2 Prot Settings Print the protection settings

3 BCU Settings Print the measurement and control settings

4 Logic Links Print the logic links settings

5 Device Setup Print the settings related to device setup

Print all settings including device setup, system parameters, protection


6 All Settings
settings and logic links settings

7 Latest Chgd Settings Print the setting latest modified

The submenu “Prot Settings” comprises the following command menus.

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Main Menu

Print

Settings

Prot Settings

Line Settings

FD Settings

AuxE Settings

Direction Settings

Pilot Scheme Settings

Rmt CommCh Settings

DPFC Dist Settings

LoadEnch Settings

Dist Settings

ROC Settings

SOTF Settings

OC Settings

VTF OC Settings

BRC Settings

RevPower Settings

BFP Settings

Deadzone Settings

OV Settings

UV Settings

NegOV Settings

ThOvld Settings

PD Settings

Stub Settings

FreqProt Settings

MiscProt Settings

VTS/CTS Settings

Trip Logic Settings

CB1 AR/Syn Settings

CB2 AR/Syn Settings

All Settings

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No. Item Function description

1 Line Settings Print line parameters

2 FD Settings Print fault detector element settings

3 AuxE Settings Print auxiliary element settings

4 Direction Settings Print direction control element settings

Print pilot distance protection and pilot directional earth-fault protection


5 Pilot Scheme Settings
settings

6 Rmt CommCh Settings Print optical pilot channel settings

7 DPFC Dist Settings Print y DPFC distance protection settings

8 LoadEnch Settings Print load encroachment settings

9 Dist Settings Print distance protection settings

10 ROC Settings Print directional earth-fault protection settings

11 SOTF Settings Print SOTF distance and overcurrent protection settings

12 OC Settings Print phase overcurrent protection settings

13 VTF OC Settings Print overcurrent protection settings for VT circuit failure

14 BRC Settings Print broken conductor protection settings

15 RevPower Settings Print reverse power protection settings

16 BFP Settings Print breaker failure protection settings

17 Deadzone Settings Print dead zone settings

18 OV Settings Print overvoltage protection settings

19 UV Settings Print undervoltage protection settings

20 NegOV Settings Print negative-sequence overvoltage protection settings

21 ThOvld Settings Print thermal overload protection settings

22 PD Settings Print pole discrepancy protection settings

23 Stub Settings Print stub overcurrent protection settings

24 FreqProt Settings Print frequency protection settings

25 MiscProt Settings Print miscellaneous settings

26 VTS/CTS Settings Print VT circuit supervision and CT circuit supervision settings

27 Trip Logic Settings Print trippling logic settings

Print synchronism check and auto-reclosing settings of circuit breaker


28 CB1 AR/Syn Settings
No.1

Print synchronism check and auto-reclosing settings of circuit breaker


29 CB2 AR/Syn Settings
No.2

30 All Settings Print all settings included in “Prot Settings” submenu

The submenu “BCU Settings” includes the following command menus.

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Main Menu

Print

Settings

BCU Settings

Syn Settings

BI Settings

Control Settings

Interlock Settings

All Settings

No. Item Function description

1 Syn Settings Print manual sysnchronism check settings

2 BI Settings Print binary input settings

3 Control Settings Print control settings

4 Interlock Settings Print interlock settings

5 All Settings Print all settings included in “BCU Settings” submenu

The submenu “Logic Links” comprises the following command menus.

Main Menu

Print

Settings

Logic Links

Function Links

GOOSE Send Links

GOOSE Recv Links

SV Links

All Settings

No. Item Function description

1 Function Links Print function links settings

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2 GOOSE Send Links Print GOOSE sending links settings

3 GOOSE Recv Links Print GOOSE receiving links settings

4 SV Links Print SV links settings

5 All Settings Print all settings included in “Logic Links” submenu

The submenu “Device Setup” comprises the following command menus.

Main Menu

Print

Settings

Device Setup

Device Settings

Comm Settings

Label Settings

All Settings

No. Item Function description

1 Device Settings Print the device settings.

2 Comm Settings Print the communication settings.

3 Label Settings Print the label settings of each protection element.

4 All Settings Print all settings included in “Device Setup” submenu

The submenu “Prot Ch Superv” comprises the following command menus.

Main Menu

Print

Prot Ch Superv

Channel 1

Channel 2

No. Item Function description

Print the self-check information of optical fibre channel 1, which is made of some
1 Channel 1
hexadecimal characters and used to developer analyze channel state

2 Channel 2 Print the self-check information of optical fibre channel 2, which is made of some

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hexadecimal characters and used to developer analyze channel state

The submenu “Prot Ch Statistics” includes the following command menus.

Main Menu

Print

Prot Ch Statistics

Channel 1

Channel 2

No. Item Function description

Print the statistic report of optical fibre channel 1, which is formed A.M. 9:00 every
1 Channel 1
day

Print the statistic report of optical fibre channel 2, which is formed A.M. 9:00 every
2 Channel 2
day

The submenu “Waveforms” includes the following command menus.

Main Menu

Print

Waveforms

Wave

No. Item Function description

1 Wave Print the recorded current and voltage waveforms

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8.2.3.6 Local Cmd

Main Menu

Local Cmd

Reset Target

Trig Oscillograph

Control

Download

Clear Counter

Clear CB1 AR Counter

Clear CB2 AR Counter

Clear Energy Counter

This menu is used to reset the tripping relay with latch, indicator LED, LCD display, and as same
as the reset function of binary inputs. This menu provides a method of manually recording the
current waveform data of the device under normal condition for printing and uploading SAS.
Besides, it can send out the request of program download, clear statistic information about
GOOSE, SV, AR, FO channel and energy.

This menu comprises the following submenus.

No. Item Function description

1 Reset Target Reset the local signal, indicator LED, LCD display and so on

2 Trig Oscillograph Trigger waveform recording

3 Control Manually operating to trip, close output or for signaling purpose

4 Download Send out the request of downloading program

5 Clear Counter Clear GOOSE, SV and FO channel statistic data

6 Clear CB1 AR Counter Clear AR statistic data of circuit breaker No.1

7 Clear CB2 AR Counter Clear AR statistic data of circuit breaker No.2

Clear all energy metering values (i.e., PHr+_Pri, PHr-_Pri, Qr+_Pri,


8 Clear Energy Counter
QHr-_Pri)

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8.2.3.7 Information

Main Menu

Information

Version Info

Board Info

In this menu, LCD can display software information of all kinds of intelligent plug-in modules,
which consists of version, creating time of software, CRC codes and management sequence
number. Besides, plug-in module information can also be viewed.

This menu comprises the following command menus.

No. Item Function description

Display software information of DSP module, MON module and HMI module,
1 Version Info which consists of version, creating time of software, CRC codes and
management sequence number.

2 Board Info Monitor the current working state of each intelligent module.

8.2.3.8 Test

Main Menu

Test

Prot Ch Counter

GOOSE Comm Counter

SV Comm Counter

Device Test

Internal Signal

AR Counter

This menu is mainly used for developers to debug the program and for engineers to maintain the
device. It can be used to fulfill the communication test function. It is also used to generate all kinds
of reports or events to transmit to the SAS without any external input, so as to debug the
communication on site. Besides, it can also display statistic information about GOOSE, SV, AR
and FO channel.

This menu comprises the following submenus.

No. Item Function description

1 Prot Ch Counter Check communication statistics data of protection FO channel

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2 GOOSE Comm Counter Check communication statistics data of GOOSE

3 SV Comm Counter Check communication statistics data of SV (Sampled Values)

Automatically generate all kinds of reports or events to transmit to SCADA,


including disturbance records, self-supervision events and binary events. It
4 Device Test
can realize the report uploading by different classification, as well as the
uploading of all kinds of reports

5 Internal Signal This submenu is only reserved for the manufacturer

6 AR Counter Check AR counters

The submenu “Prot Ch Counter” comprises the following command menus.

Main Menu

Test

Prot Ch Counter

Ch1 Counter

Ch2 Counter

No. Item Function description

1 Ch1 Counter Check communication statistic information of channel 1

2 Ch2 Counter Check communication statistic information of channel 2

The submenu “Device Test” comprises the following submenus.

Main Menu

Test

Device Test

Disturb Events

Superv Events

IO Events

No. Item Function description

View the relevant information about disturbance records (only used for
1 Disturb Events
debugging persons)

View the relevant information about supervision events (only used for
2 Superv Events
debugging persons)

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View the relevant information about binary events (only used for debugging
3 IO Events
persons)

Users can respectively execute the test automatically or manually by selecting commands “All
Test” or “Select Test”.

The submenu “Disturb Events” comprises the following command menus.

Main Menu

Test

Device Test

Disturb Events

All Test

Select Test

No. Item Description

1 All Test Ordinal test of all protection elements

2 Select Test Selective test of corresponding classification

The submenu “Superv Events” comprises the following command menus.

Main Menu

Test

Device Test

Superv Events

All Test

Select Test

No. Item Description

1 All Test Ordinal test of all self-supervisions

2 Select Test Selective test of corresponding classification

The submenu “IO Events” comprises the following command menus.

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Main Menu

Test

Device Test

IO Events

All Test

Select Test

No. Item Description

1 All Test Ordinal test of change of all binary inputs

2 Select Test Selective test of corresponding classification

The submenu “AR Counter” comprises the following command menus.

Main Menu

Test

AR Counter

CB1 AR Counter

CB2 AR Counter

No. Item Function description

1 CB1 AR Counter Check AR counters of circuit breaker No.1

2 CB2 AR Counter Check AR counters of circuit breaker No.2

8.2.3.9 Clock

The current time of internal clock can be viewed here. The time is displayed in the form
YY-MM-DD and hh:mm:ss. All values are presented with digits and can be modified.

8.2.3.10 Language

This menu is mainly used to set LCD display language.

8.3 LCD Display


8.3.1 Overview
There are some kinds of LCD display, SLD (single line diagram) display, disturbance records,
supervison events, IO events, control logs and device logs. Disturbance records and supervison

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events will not disappear until them are acknowledged by pressing the “RESET” button in the
protection panel (i.e. energizing the binary input [BI_RstTarg]). If any event is detected, the
corresponding event display will pop up automatically, and user can keep pressing “ENT” and then
press “ESC” to switch between normal display and event display. IO events will be displayed for 5s
and then it will return to the previous display interface automatically. Device logs will not pop up
and can only be viewed by navigating the corresponding menu.

8.3.2 Normal Display


After the device is powered and entered into the initiating interface, it takes tens of seconds to
complete the initialization of the device. During the initialization of the device, the “HEALTHY”
indicator lamp of the device goes out.

The device can display single line diagram (SLD) and primary operation information, it can support
wiring configuration function. LCD configuration file can be downloaded via the network. Remote
control operation through single line diagram is also supported.

Under normal condition, LCD will display the following interface. LCD adopts white color as its
backlight that is activated if once there is any keyboard operation, moreover, the backlight will be
extinguished automatically if no keyboard operation is detected for a duration.

S 2010-06-08 10:10:00
Ia 0.00A
Ib 0.00A
Ic 0.00A
3I0 0.00A
Ua 0.02V
Ub 0.00V
Uc 0.00V
3U0 0.02V
U_Syn 0.00V
f 50.00Hz

Addr 24343 Group 01

The content displayed on the screen contains: the current date and time of the device (with a
format of yyyy-mm-dd hh:mm:ss:), the active setting group number, three-phase current sampling
value, residual current sampling value, three-phase voltage sampling value, residual voltage
sampling value, the synchronism voltage sampling value, line frequency and the address relevant
to IP address of Ethernet A. If all the sampling values of the voltage and the current can’t be fully
displayed within one screen, they will be scrolling-displayed automatically from the top to the
bottom.

If IP address of Ethernet A is “xxx.xxx.a.b”, the displayed address equals to (a×256+b). For


example, If IP address of Ethernet A is “198.087.095.023”, the displayed address will be “95×

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256+23=24343”.

If the device has detected any abnormal state, it′ll display the self-check alarm information.

“S” indicates that device clock is synchronized. If “S” disappears, it means that device clock is not
synchronized.

8.3.3 Display Disturbance Records


This device can store up to 32 groups of disturbance records with fault waveform. Each group
consists of disturbance records of operation elements and corresponding fault detector elements.
Up to 1024 disturbance records can be stored in this device. If there is protection element
operation, LCD will automatically display the latest group of disturbance records, and two kinds of
LCD display interfaces will be available depending on whether there are supervision events or not.

For the situation that the disturbance records and the supervision events coexist, the upper half
part is the disturbance record, and the lower half part is the supervision event. The following items
are listed in the upper half part: record No., record name, generation time of the disturbance
record. If there is protection element operation, faulty phase and relative operation time (with
reference to the corresponding fault detector element) will be displayed. If the disturbance records
can not be displayed in one page, they will be displayed in several pages alternately.

If there is no supervision event, disturbance records will be displayed as shown in the following
figure.

NO.001 2013-01-15 13:22:23:669 Disturb

0000ms FD.DPFC.Pkp
0024ms AB 21Q.Z1.Op

If the device has the supervision event, the display interface will show the disturbance record and
the supervision event at the same time.

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NO.001 2013-01-15 13:22:23:669 Disturb

0000ms FD.DPFC.Pkp
0024ms AB 21Q.Z1.Op

Superv Events
Alm_Device

NO.001 shows the SOE No. of the disturbance record.

2013-01-15 13:22:23:669 shows the time of the disturbance record, the format is
“yyyy-mm-dd hh:mm:ss:fff”.

Disturb shows the title of the disturbance record.

0000ms FD.DPFC.Pkp shows fault detector element and its operation time (set as
“0000ms” fixedly).

0024ms AB 21Q.Z1.Op shows operation element and its relative operation time (with
reference to the corresponding fault detector element).

All the protection elements have been listed in chapter “Operation Theory”, and please refer to
each protection element for details. The reports related to oscillography function are showed in the
following table.

Table 8.3-1 Tripping report messages

No. Message Description


1 TrigDFR_Man Oscillography function is triggered manually.
2 TrigDFR_Rmt Oscillography function is triggered remotely.
Oscillography function is triggered by binary input [BI_TrigDFR]. The
3 TrigDFR_BI binary input [BI_TrigDFR] is configurable, and it can be designated to
internal signal or external input.

8.3.4 Display Supervision Event


This device can store 1024 pieces of supervision events. During the running of the device, the
supervision event of hardware self-check errors or system running abnormity will be displayed
immediately.

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S Superv Events

Alm_Device
Alm_Version

S indicates that device clock is synchronized. If “S” disappears, it


means that device clock is not synchronized.

Superv Events shows the title of the supervision events.

Alm_Device shows the contents of supervision events.

Alm_Version

8.3.5 Display IO Events


This device can store 1024 pieces of binary events. During the running of the device, the binary
input will be displayed once its state has changed, i.e. from “0” to “1” or from “1” to “0”.

NO.001 2013-01-15 13:31:23:669 IO Chg

BI_Maintenance 0 1

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NO.001 shows the No. of the binary event.

2013-01-15 13:31:23:669 shows date and time when the report occurred, the format is
“yyyy-mm-dd hh:mm:ss:fff”.

IO Chg shows the title of the binary event.

BI_Maintenance 0→1 shows the state change of binary input, including binary input
name, original state and final state.

8.3.6 Display Device Logs


This device can store 1024 pieces of device logs. Please refer to section “8.4.3” for LCD operation

4. Device Logs NO.4


2008-11-28 10:18:47:569ms
Reboot

Device Logs NO. 4 shows the title and the number of the device log

2008-11-28 10:18:47:569 shows date and time when the report occurred, the format is
year–month-date and hour:minute:second:millisecond

Reboot shows the manipulation content of the device log

User operating information listed below may be displayed.

Table 8.3-2 User operating event list

No. Message Description


1 Reboot The device has been reboot.
2 Settings_Chgd The device′s settings have been changed.
3 ActiveGrp_Chgd Active setting group has been changed.
4 Report_Cleared All reports have been deleted. (Device logs can not be deleted)
5 Waveform_Cleared All waveforms have been deleted.
6 Process_Exit A process has exited.
7 Counter_Cleared Clear counter

It will be displayed on LCD before disturbance records and supervision events are confirmed. Only

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pressing both “ENT” and “ESC” at the same time can switch among disturbance records,
supervision events and the normal running state of the device to display it. IO events will be
displayed for 5s and then it will return to the previous display interface automatically.

8.4 Keypad Operation


8.4.1 View Device Measurements
The operation is as follows:

1. Press the “▲” to enter the main menu;

2. Press the “▲” or “▼” to move the cursor to the “Measurements” menu, and then press
the “ENT” or “►” to enter the menu;

3. Press the “▲” or “▼” to move the cursor to any command menu, and then press the
“ENT” to enter the menu;

4. Press the “▲” or “▼” to page up/down (if all information cannot be displayed in one
display screen, one screen can display 14 lines of information at most);

5. Press the “◄” or “►” to select pervious or next command menu;

6. Press the “ENT” or “ESC” to exit this menu (returning to the “Measurements” menu);

8.4.2 View Device Status


The operation is as follows:

1. Press the key “▲” to enter the main menu.

2. Press the key “▲” or “▼” to move the cursor to the “Status” menu, and then press the
“ENT” or “►” to enter the menu.

3. Press the key “▲” or “▼” to move the cursor to any command menu item, and then press
the key “ENT” to enter the submenu.

4. Press the “▲” or “▼” to page up/down (if all information cannot be displayed in one
display screen, one screen can display 14 lines of information at most).

5. Press the key “◄” or “►” to select pervious or next command menu.

6. Press the key “ENT” or “ESC” to exit this menu (returning to the “Status” menu).

8.4.3 View Device Records


The operation is as follows:

1. Press the “▲” to enter the main menu;

2. Press the “▲” or “▼” to move the cursor to the “Records” menu, and then press the
“ENT” or “►” to enter the menu;

3. Press the “▲” or “▼” to move the cursor to any command menu, and then press the
“ENT” to enter the menu;

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4. Press the “▲” or “▼” to page up/down;

5. Press the “+” or “-” to select pervious or next record;

6. Press the “◄” or “►” to select pervious or next command menu;

7. Press the “ENT” or “ESC” to exit this menu (returning to the “Records” menu);

8.4.4 Print Device Records


The operation is as follows:

1. Press the “▲” to enter the main menu;

2. Press the “▲” or “▼” to move the cursor to the “Print” menu, and then press the “ENT” or
“►” to enter the menu;

3. Press the “▲” or “▼” to move the cursor to any command menu, and then press the
“ENT” to enter the menu;

 Selecting the “Disturb Records”, and then press the “+” or “-” to select pervious
or next record. After pressing the key “ENT”, the LCD will display “Start Printing... ”,
and then automatically exit this menu (returning to the menu “Print”). If the printer
doesn’t complete its current print task and re-start it for printing, and the LCD will
display “Printer Busy…”. Press the key “ESC” to exit this menu (returning to the
menu “Print”).

 Selecting the command menu “Superv Events” or “IO Events”, and then press the
key “▲” or “▼” to move the cursor. Press the “+” or “-” to select the starting and
ending numbers of printing message. After pressing the key “ENT”, the LCD will
display “Start Printing…”, and then automatically exit this menu (returning to the
menu “Print”). Press the key “ESC” to exit this menu (returning to the menu “Print”).

4. If selecting the command menu “Device Info”, “Device Status“ or “IEC103 Info”, press
the key “ENT”, the LCD will display “Start printing..”, and then automatically exit this menu
(returning to the menu “Print”).

5. If selecting the “Settings”, press the key “ENT” or “►” to enter the next level of menu.

6. After entering the submenu “Settings”, press the key “▲” or “▼” to move the cursor, and
then press the key “ENT” to print the corresponding default value. If selecting any item to
printing:

Press the key “+” or “-” to select the setting group to be printed. After pressing the key
“ENT”, the LCD will display “Start Printing…”, and then automatically exit this menu
(returning to the menu “Settings”). Press the key “ESC” to exit this menu (returning to the
menu “Settings”).

7. After entering the submenu “Waveforms”, press the “+” or “-” to select the waveform
item to be printed and press ”ENT” to enter. If there is no any waveform data, the LCD will
display “No Waveform Data!” (Before executing the command menu “Waveforms”, it is
necessary to execute the command menu “Trig Oscillograph” in the menu “Local Cmd”,

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otherwise the LCD will display “No Waveform Data!”). With waveform data existing:

Press the key “+” or “-” to select pervious or next record. After pressing the key “ENT”, the LCD
will display “Start Printing…”, and then automatically exit this menu (returning to the menu
“Waveforms”). If the printer does not complete its current print task and re-start it for printing, and
the LCD will display “Printer Busy…”. Press the key “ESC” to exit this menu (returning to the menu
“Waveforms”).

8.4.5 View Device Setting


The operation is as follows:

1. Press the “▲” to enter the main menu;

2. Press the “▲” or “▼” to move the cursor to the “Settings” menu, and then press the
“ENT” or “►” to enter the menu;

3. Press the “▲” or “▼” to move the cursor to any command menu, and then press the
“ENT” to enter the menu;

4. Press the “▲” or “▼” to move the cursor;

5. Press the “+” or “-” to page up/down;

6. Press the “◄” or “►” to select pervious or next command menu;

7. Press the “ESC” to exit this menu (returning to the menu “Settings”).

Note!

If the displayed information exceeds 14 lines, the scroll bar will appear on the right side of
the LCD to indicate the quantity of all displayed information of the command menu and the
relative location of information where the current cursor points at.

8.4.6 Modify Device Setting


The operation is as follows:

1. Press the “▲” to enter the main menu;

2. Press the “▲” or “▼” to move the cursor to the “Settings” menu, and then press the
“ENT” or “►” to enter the menu;

3. Press the “▲” or “▼” to move the cursor to any command menu, and then press the
“ENT” to enter the menu;

4. Press the “▲” or “▼” to move the cursor;

5. Press the “+” or “-” to page up/down;

6. Press the “◄” or “►” to select pervious or next command menu;

7. Press the “ESC” to exit this menu (returning to the menu “Settings” );

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8. If selecting the command menu “System Settings”, move the cursor to the setting item
to be modified, and then press the “ENT”;

Press the “+” or “-” to modify the value (if the modified value is of multi-bit, press the “◄” or “►”
to move the cursor to the digit bit, and then press the “+” or “-” to modify the value), press the
“ESC” to cancel the modification and return to the displayed interface of the command menu
“System Settings”. Press the “ENT” to automatically exit this menu (returning to the displayed
interface of the command menu “System Settings”).

Move the cursor to continue modifying other setting items. After all setting values are modified,
press the “◄”, “►” or “ESC”, and the LCD will display “Save or Not?”. Directly press the “ESC” or
press the “◄” or “►” to move the cursor. Select the “Cancel”, and then press the “ENT” to
automatically exit this menu (returning to the displayed interface of the command menu “System
Settings”).

Press the “◄” or “►” to move the cursor. Select “No” and press the “ENT”, all modified setting item
will restore to its original value, exit this menu (returning to the menu “Settings”).

Press the “◄” or “►” to move the cursor to select “Yes”, and then press the “ENT”, the LCD will
display password input interface.

Password:

____

Input a 4-bit password (“+”, “◄”, “▲” and “-”). If the password is incorrect, continue inputting it,
and then press the “ESC” to exit the password input interface and return to the displayed interface
of the command menu “System Settings”. If the password is correct, LCD will display “Save
Setting Now…”, and then exit this menu (returning to the displayed interface of the command
menu “System Settings”), with all modified setting items as modified values.

Note!

For different setting items, their displayed interfaces are different but their modification
methods are the same. The following is ditto.

9. If selecting the submenu “Prot Settings”, and press “ENT” to enter. After selecting

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different command menu, the LCD will display the following interface: (take “FD
Settings” as an example)

FD Settings

Please Select Group for Config

Active Group: 01

Selected Group: 02

Press the “+” or “-” to modify the value, and then press the “ENT” to enter it. Move the cursor to
the setting item to be modified, press the “ENT” to enter.

Take the setting [FD.DPFC.I_Set] as an example is selected to modify, then press the “ENT” to
enter and the LCD will display the following interface. Press “+” or “-” to modify the value and
then press the “ENT” to confirm.

FD.DPFC.I_Set

Current Value 0.200

Modified Value 0.202

Min Value 0.050

Max Value 30.000

Note!

After modifying protection settings in current active setting group or system parameters of
the device, the “HEALTHY” LED indicator the device will be lit off, and the MON module
will check the new settings. If the abnormality is detected during the setting check,
corresponding alarm signals will be issued. Moreover, if the critical error is detected, the

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device will be blocked.

8.4.7 Copy Device Setting


The operation is as follows:

1. Press the “▲” to enter the main menu;

2. Press the “▲” or “▼” to move the cursor to the “Settings” menu, and then press the
“ENT” or “►” to enter the menu;

3. Press the “▲” or “▼” to move the cursor to the command menu “Copy Settings”, and
then press the “ENT” to enter the menu.

Copy Settings

Active Group: 01

Copy To Group: 02

Press the “+” or “-” to modify the value. Press the “ESC”, and return to the menu “Settings”.
Press the “ENT”, the LCD will display the interface for password input, if the password is incorrect,
continue inputting it, press the “ESC” to exit the password input interface and return to the menu
“Settings”. If the password is correct, the LCD will display “Setting Copied!”, and exit this menu
(returning to the menu “Settings”).

8.4.8 Switch Setting Group


The operation is as follows:

1. Exit the main menu;

2. Press the “GRP”

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Change Active Group

Active Group: 01

Change To Group: 02

Press the “+” or “-” to modify the value, and then press the “ESC” to exit this menu (returning to
the main menu). After pressing the “ENT”, the LCD will display the password input interface. If the
password is incorrect, continue inputting it, and then press the “ESC” to exit the password input
interface and return to its original state. If the password is correct, the “HEALTHY” indicator lamp
of the protection device will go out, and the protection device will re-check the protection setting. If
the check doesn’t pass, the protection device will be blocked. If the check is successful, the LCD
will return to its original state.

8.4.9 Delete Device Records


The operation is as follows:

1. Exit the main menu;

2. Press the “+”, “-”, “+”, “-” and “ENT”; Press the “ESC” to exit this menu (returning to
the original state). Press the “ENT” to carry out the deletion.

Press <ENT> To Clear


Press <ESC> To Exit

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Note!

The operation of deleting device message will delete all messages saved by the protection
device, including disturbance records, supervision events, binary events, but not including
device logs. Furthermore, the message is irrecoverable after deletion, so the application of
the function shall be cautious.

8.4.10 Remote Control


Control operation method is introduced as below:

1. Press the key “▲” to enter the main menu.

2. Press the key “▲” or “▼” to move the cursor to the command menu “Local Cmd”, and
then press the key “ENT” to enter submenus. Press the key “▲” or “▼” to move the
cursor to the command menu “Control”, and then press the key “ENT” to enter and the
following display will be shown on LCD.

Password:
000

Input a 3-bit password (“111”). If the password is incorrect, continue inputting it, and then press the
“ESC” to exit the password input interface and return to the displayed interface of the command
menu “Control”. If the password is correct, it will go to the following step.

3. Press the key “▲” or “▼” to move the cursor to the control object and press the key
“ENT” to select control object.

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Control
Step1: select Control Object
1. CSWI01
2. CSWI02
3. CSWI03
4. CSWI04
5. CSWI05
6. CSWI06
7. CSWI07
8. CSWI08
9. CSWI09
10. CSWI10

4. Press the key “◄” or “►” to select control command press the key “ENT” to the next step.

Three control commands are optional:

1) Open (Step down): Remote open

2) Close (Step up): Remote close

3) Stop: Reserved

CSWI01
Step2: select Control Command

Open(Lower) Close(Raise) (Stop)

NoCheck SynchroCheck DeadCheck


LoopCheck EF Line Selection

InterlockChk InterlockNotChk

Select Execute Cancel

Result

5. Press the key “◄” or “►” to select synchronism check mode and press the key “ENT” to
the next step.

Five synchronism check modes are optional:

1) NoCheck: Without any check

2) SynchroCheck: Synchronism-check mode

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3) DeadCheck: Dead check mode

4) LoopCheck: Reserved

5) EF Line Selection: Reserved

CSWI01
Step3: select Execution Condition

Open(Lower) Close(Raise) (Stop)

NoCheck SynchroCheck DeadCheck


LoopCheck EF Line Selection

InterlockChk InterlockNotChk

Select Execute Cancel

Result

6. Press the key “◄” or “►” to select interlock mode and press the key “ENT” to next step.

Two interlock check modes are optional:

1) InterlockChk: Check interlocking criteria

2) InterlockNotChk: Not check interlocking criteria

CSWI01
Step4: select Interlock Condition

Open(Lower) Close(Raise) (Stop)

NoCheck SynchroCheck DeadCheck


LoopCheck EF Line Selection

InterlockChk InterLockNotChk

Select Execute Cancel

Result

7. Press the key “◄” or “►” to select control type and press the key “ENT”.

As shown in the following figure, operation results will be shown after “Result” at the bottom of the
LCD.

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Three synchronism control types are optional:

1) Select: Select control object

2) Execute: Execute control operation

3) Cancel: Cancel control operation

CSWI01
Step5: select Control Type

Open(Lower) Close(Raise) (Stop)

NoCheck SynchroCheck DeadCheck


LoopCheck EF Line Selection

InterlockChk InterLockNotChk

Select Execute Cancel

Result

Note!

“Exectue” operation must be operated after “Select” operation.

8.4.11 Modify Device Clock


The operation is as follows:

1. Press the “▲” to enter the main menu;

2. Press the “▲” or “▼” to move the cursor to the “Clock” menu, and then press the “ENT”
to enter clock display

3. Press the “▲” or “▼” to move the cursor to the date or time to be modified;

4. Press the “+” or “-” to modify value, and then press the “ENT” to save the modification
and return to the main menu;

5. Press the “ESC” to cancel the modification and return to the main menu.

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Clock

Year: 2008
Month: 11
Day: 28
Hour: 20
Minute: 59
Second: 14

8.4.12 View Module Information


The operation is as follows:

1. Press the “▲” to enter the main menu;

2. Press the “▲” or “▼” to move the cursor to the “Information” menu, and then press the
“ENT” or “►” to enter the menu;

3. Press the “▲” or “▼” to move the cursor to the command menu “Board Info”, and then
press the “ENT” to enter the menu;

4. Press the “▲” or “▼” to move the scroll bar;

5. Press the “ENT” or “ESC” to exit this menu (returning to the “Information” menu).

8.4.13 Check Software Version


The operation is as follows:

1. Press the “▲” to enter the main menu.

2. Press the “▲” or “▼” to move the cursor to the “Information” menu, and then press the
“ENT” to enter the submenu.

3. Press the key “▲” or “▼” to move the cursor to the command menu “Version Info”, and
then press the key “ENT” to display the software version.

4. Press the “ESC” to return to the main menu.

8.4.14 Communication Test


The operation is as follows:

1. Press the key “▲” to enter the main menu.

2. Press the key “▲” or “▼” to move the cursor to the “Test” menu, and then press the key
“ENT” or “►” to enter the menu.

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3. Press the key “▲” or “▼” to move the cursor to the submenu “Device Test”, and then
press the key “ENT” to enter the submenu,to select test item. If “Disturb Events”
“Superv Events” or “IO Events” is selected, two options “All Test” and “Select Test” are
provided.

4. Press the key “▲” or “▼” to move the cursor to select the corresponding command menu
“All Test” or “Select Test”. If selecting the “All Test”, press the “ENT”, and the device will
successively carry out all operation element message test one by one.

5. If “Select Test” is selected, press the key “ENT”. Press the “+” or “-” to page up/down,
and then press the key “▲” or “▼” to move the scroll bar. Move the cursor to select the
corresponding protection element. Press the key “ENT” to execute the communication
test of this protection element, the substation automatic system (SAS) will receive the
corresponding message.

Note!

If no input operation is carried out within 60s, exit the communication transmission and
return to the “Test” menu, at this moment, the LCD will display “Communication Test
Timeout and Exiting...”.

Press the key “ESC” to exit this menu (returning to the menu “Test”, at this moment, the LCD will
display “Communication Test Exiting…”.

8.4.15 Select Language


The operation is as follows:

1. Press the key “▲” to enter the main menu.

2. Press the key “▲” or “▼” to move the cursor to the command menu “Language”, and
then press the key “ENT” to enter the menu and the following display will be shown on
LCD.

Please Select Language:

1 中文
2 English

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3. Press the key “▲” or “▼” to move the cursor to the language user preferred and press
the key “ENT” to execute language switching. After language switching is finished, LCD
will return to the menu “Language”, and the display language is changed. Otherwise,
press the key “ESC” to cancel language switching and return to the menu “Language”.

Note!

LCD interface provided in this chapter is only a reference and available for explaining
specific definition of LCD. The displayed interface of the actual device may be some
different from it, so you shall be subject to the actual protection device.

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9 Configurable Function

Table of Contents
9 Configurable Function..................................................................... 9-a
9.1 Overview .......................................................................................................... 9-1
9.2 Introduction on PCS-Explorer Software ........................................................ 9-1
9.3 Signal List ........................................................................................................ 9-1
9.3.1 Input Signal ........................................................................................................................ 9-2

9.3.2 Output Signal ................................................................................................................... 9-12

List of Tables
Table 9.3-1 Input signals ...........................................................................................................9-2

Table 9.3-2 Output signals ......................................................................................................9-12

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9 Configurable Function

9.1 Overview

By adoption of PCS-Explorer software, it is able to make device configuration, function


configuration, LCD configuration, binary input and binary output configuration, LED indicator
configuration and programming logic for PCS-902.

9.2 Introduction on PCS-Explorer Software

PCS-Explorer software is developed in order to meet customer’s demand on functions of UAPC


platform device such as device configuration and programmable design. It selects substation as
the core of data management and the device as fundamental unit, supporting one substation to
govern many devices. The software provides on-line and off-line functions: on-line mode: Ethernet
connected with the device supporting IEC60870-5-103 and capable of uploading and downloading
configuration files through Ethernet net; off-line mode: off-line setting configuration. In addition, it
also supports programmable logic to meet customer’s demand.

After function configuration is finished, disabled protection function will be hidden in the device and
in setting configuration list of PCS-Explorer Software. The user can select to show or hide some
setting by this way, and modify the setting value.

Please refer to the instruction manual “PCS-Explorer Auxiliary Software” for details.

Overall functions:

 Programmable logic (off-line function)

 Device configuration (off-line function)

 Function configuration (off-line function)

 LCD configuration (off-line function)

 LED indicators configuration (off-line function)

 Binary signals configuration (off-line function)

 Setting configuration (off-line & on-line function)

 Real-time display of analogue and digital quantity of device (on-line function)

 Display of sequence of report (SOE) (on-line function)

 Analysis of waveform (off-line & on-line function)

 File downloading/uploading (on-line function)

9.3 Signal List

If an input signal or output signal is gray in PCS-Explorer, it means that the input signal or output

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9 Configurable Function

signal is not configurable. Otherwise, it is configurable signal.

Note!

PCS-902 can be configured to support single circuit breaker application or double circuit
breakers application by PCS-Exploerer. The prefix “CBx.” is added to all signals for circuit
breaker No.x (x=1 or 2). The related protection functions include circuit breaker position
supervision, breaker failure protection, dead zone protection, pole discrepancy protection,
synchrocheck, automatic reclosure, trip logic, CT circuit supervision.

9.3.1 Input Signal


All input signals of this device are listed in the following table.

Table 9.3-1 Input signals

No. Item Description


Circuit breaker position supervision
1 CBx.52b_PhA Normally closed contact of A-phase of circuit breaker No.x
2 CBx.52b_PhB Normally closed contact of B-phase of circuit breaker No.x
3 CBx.52b_PhC Normally closed contact of C-phase of circuit breaker No.x
Maintenance status binary input of circuit breaker No.x
If any circuit breaker is in maintenance and out of service, CBx.52b or
4 CBx.Test CBx.Test should be set as “1” in fixed, and CB No.x will be not take effect in
corresponding protection logics. (CB position supervision is still kept.) It is
only available for double circuit breakers mode.
External manual closing binary input of circuit breaker No.x, it is only applied
5 CBx.ManCls
to SOTF logic
6 CBx.52b Normally closed contact of three-phase of circuit breaker No.x
7 CBx.52a Normally open contact of three-phase of circuit breaker No.x
Control circuit failure of circuit breaker No.x (normally closed contact and
8 CBx.TCCS.Input normally open contact of three-phase circuit breaker are all de-energized due
to DC power loss of control circuit)
Auxiliary element
Current change auxiliary element enabling input, it is triggered from binary
9 AuxE.OCD.En
input or programmable logic etc.
Current change auxiliary element blocking input, it is triggered from binary
10 AuxE.OCD.Blk
input or programmable logic etc.
Stage 1 of residual current auxiliary element enabling input, it is triggered
11 AuxE.ROC1.En
from binary input or programmable logic etc.
Stage 1 of residual current auxiliary element blocking input, it is triggered
12 AuxE.ROC1.Blk
from binary input or programmable logic etc.
Stage 2 of residual current auxiliary element enabling input, it is triggered
13 AuxE.ROC2.En
from binary input or programmable logic etc.
Stage 2 of residual current auxiliary element blocking input, it is triggered
14 AuxE.ROC2.Blk
from binary input or programmable logic etc.

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No. Item Description


Stage 3 of residual current auxiliary element enabling input, it is triggered
15 AuxE.ROC3.En
from binary input or programmable logic etc.
Stage 3 of residual current auxiliary element blocking input, it is triggered
16 AuxE.ROC3.Blk
from binary input or programmable logic etc.
Stage 1 of phase current auxiliary element enabling input, it is triggered from
17 AuxE.OC1.En
binary input or programmable logic etc.
Stage 1 of phase current auxiliary element blocking input, it is triggered from
18 AuxE.OC1.Blk
binary input or programmable logic etc.
Stage 2 of phase current auxiliary element enabling input, it is triggered from
19 AuxE.OC2.En
binary input or programmable logic etc.
Stage 2 of phase current auxiliary element blocking input, it is triggered from
20 AuxE.OC2.Blk
binary input or programmable logic etc.
Stage 3 of phase current auxiliary element enabling input, it is triggered from
21 AuxE.OC3.En
binary input or programmable logic etc.
Stage 3 of phase current auxiliary element blocking input, it is triggered from
22 AuxE.OC3.Blk
binary input or programmable logic etc.
Voltage change auxiliary element enabling input, it is triggered from binary
23 AuxE.UVD.En
input or programmable logic etc.
Voltage change auxiliary element blocking input, it is triggered from binary
24 AuxE.UVD.Blk
input or programmable logic etc.
Phase-to-ground under voltage auxiliary element enabling input, it is
25 AuxE.UVG.En
triggered from binary input or programmable logic etc.
Phase-to-ground under voltage auxiliary element blocking input, it is
26 AuxE.UVG.Blk
triggered from binary input or programmable logic etc.
Phase-to-phase under voltage auxiliary element enabling input, it is triggered
27 AuxE.UVS.En
from binary input or programmable logic etc.
Phase-to-phase under voltage auxiliary element blocking input, it is triggered
28 AuxE.UVS.Blk
from binary input or programmable logic etc.
Residual voltage auxiliary element enabling input, it is triggered from binary
29 AuxE.ROV.En
input or programmable logic etc.
Residual voltage auxiliary element blocking input, it is triggered from binary
30 AuxE.ROV.Blk
input or programmable logic etc.
Distance protection
DPFC distance protection enabling input, it is triggered from binary input or
31 21D.En
programmable logic etc.
DPFC distance protection blocking input, it is triggered from binary input or
32 21D.Blk
programmable logic etc.
Load trapezoid characteristic enabling input, it is triggered from binary input
33 LoadEnch.En
or programmable logic etc.
Load trapezoid characteristic blocking input, it is triggered from binary input
34 LoadEnch.Blk
or programmable logic etc.
35 21.En Distance protection enabling input, it is triggered from binary input or

PCS-902 Line Distance Relay 9-3


Date: 2014-07-29
9 Configurable Function

No. Item Description


programmable logic etc.
Distance protection blocking input, it is triggered from binary input or
36 21.Blk
programmable logic etc.
Zone x of phase-to-ground distance protection enabling input, default value
37 21Mx.ZG.En
is “1” (x=1, 2, 3, 4, 5)
Zone x of phase-to-ground distance protection blocking input, default value is
38 21Mx.ZG.Blk
“0” (x=1, 2, 3, 4, 5)
Zone x of phase-to-phase distance protection enabling input, default value is
39 21Mx.ZP.En
“1” (x=1, 2, 3, 4, 5)
Zone x of phase-to-phase distance protection blocking input, default value is
40 21Mx.ZP.Blk
“0” (x=1, 2, 3, 4, 5)
41 21Mx.En_ShortDly Enable accelerating zone x of distance protection (x=2, 3, 4, 5)
42 21Mx.Blk_ShortDly Accelerating zone x of distance protection is disabled (x=2, 3, 4, 5)
43 21M1.En_Instant Enable zone 1 of distance protection operates without time delay
Zone x of phase-to-ground distance protection enabling input, default value
44 21Qx.ZG.En
is “1” (x=1, 2, 3, 4, 5)
Zone x of phase-to-ground distance protection blocking input, default value is
45 21Qx.ZG.Blk
“0” (x=1, 2, 3, 4, 5)
Zone x of phase-to-phase distance protection enabling input, default value is
46 21Qx.ZP.En
“1” (x=1, 2, 3, 4, 5)
Zone x of phase-to-phase distance protection blocking input, default value is
47 21Qx.ZP.Blk
“0” (x=1, 2, 3, 4, 5)
48 21Qx.En_ShortDly Enable accelerating zone x of distance protection (x=2, 3, 4, 5)
49 21Qx.Blk_ShortDly Accelerating zone x of distance protection is disabled (x=2, 3, 4, 5)
50 21Q1.En_Instant Enable zone 1 of distance protection operates without time delay
Power swing detection enabling input, it is triggered from binary input or
51 68.En
programmable logic etc.
Power swing detection blocking input, it is triggered from binary input or
52 68.Blk
programmable logic etc.
Enabling power swing blocking releasing of zone x (Mho characteristic, x=1,
53 21Mx.En_PSBR
2, 3, 4, 5)
Enabling power swing blocking releasing of zone x (Quad characteristic, x=1,
54 21Qx.En_PSBR
2, 3, 4, 5)
Blocking power swing blocking releasing of zone x (Mho characteristic, x=1,
55 21Mx.Blk_PSBR
2, 3, 4, 5)
Blocking power swing blocking releasing of zone x (Quad characteristic, x=1,
56 21Qx.Blk_PSBR
2, 3, 4, 5)
Enabling power swing blocking releasing of pilot distance zone (Mho
57 21M.Pilot.En_PSBR
characteristic)
Blocking power swing blocking releasing of pilot distance zone (Mho
58 21M.Pilot.Blk_PSBR
characteristic)
59 21Q.Pilot.En_PSBR Enabling power swing blocking releasing of pilot distance zone (Quad

9-4 PCS-902 Line Distance Relay


Date: 2014-07-29
9 Configurable Function

No. Item Description


characteristic)
Blocking power swing blocking releasing of pilot distance zone (Quad
60 21Q.Pilot.Blk_PSBR
characteristic)
Distance SOTF protection enabling input, it is triggered from binary input or
61 21SOTF.En
programmable logic etc.
Distance SOTF protection blocking input, it is triggered from binary input or
62 21SOTF.Blk
programmable logic etc.
Optical pilot channel
63 FOx.En Enabling channel x
64 FOx.Send1 Sending signal 1 of channel x
65 FOx.Send2 Sending signal 2 of channel x
66 FOx.Send3 Sending signal 3 of channel x
67 FOx.Send4 Sending signal 4 of channel x
68 FOx.Send5 Sending signal 5 of channel x
69 FOx.Send6 Sending signal 6 of channel x
70 FOx.Send7 Sending signal 7 of channel x
71 FOx.Send8 Sending signal 8 of channel x
Sending signal 9 of channel x (it is configured by fault as sending permissive
72 FOx.Send9 signal 1 or sending A-phase permissive signal (only for phase-segregated
command scheme))
Sending signal 10 of channel x (it is configured by fault as sending B-phase
73 FOx.Send10
permissive signal (only for phase-segregated command scheme))
Sending signal 11 of channel x (it is configured by fault as sending C-phase
74 FOx.Send11
permissive signal (only for phase-segregated command scheme))
Sending signal 12 of channel x (it is configured by fault as sending
75 FOx.Send12 permissive signal 2 only for pilot directional earth-fault protection adopting
independent pilot channel 2)
Pilot distance protection and pilot directional earth-fault protection
Pilot distance protection x enabling input 1, it is triggered from binary input or
76 85-x.Z.En1
programmable logic etc. (x=1 or 2)
Pilot distance protection x enabling input 2, it is triggered from binary input or
77 85-x.Z.En2
programmable logic etc. (x=1 or 2)
Pilot distance protection x blocking input, it is triggered from binary input or
78 85-x.Z.Blk
programmable logic etc. (x=1 or 2)
Input signal of indicating that pilot channel 1 is abnormal for pilot distance
79 85-x.Abnor_Ch1
protection x (x=1 or 2)
Input signal of receiving permissive signal via channel No.1 for pilot distance
protection x, or input signal of receiving permissive signal of A-phase via
80 85-x.Recv1
channel No.1 for pilot distance protection x (only for phase-segregated
command scheme, x=1 or 2)
Input signal of receiving permissive signal of B-phase via channel No.1 for
81 85-x.RecvB
pilot distance protection x (only for phase-segregated command scheme,

PCS-902 Line Distance Relay 9-5


Date: 2014-07-29
9 Configurable Function

No. Item Description


x=1 or 2)
Input signal of receiving permissive signal of C-phase via channel No.1 for
82 85-x.RecvC pilot distance protection x (only for phase-segregated command scheme,
x=1 or 2)
Input signal of initiating sending permissive signal from external tripping
83 85-x.ExTrp
signal for pilot distance protection x (x=1 or 2)
84 85-x.Unblocking1 Unblocking signal 1 of pilot distance protection x (x=1 or 2)
Zone Extension enabling input 1 of pilot distance protection x, it is triggered
85 85-x.ZX.En1
from binary input or programmable logic etc. (x=1 or 2)
Zone Extension enabling input 2 of pilot distance protection x, it is triggered
86 85-x.ZX.En2
from binary input or programmable logic etc. (x=1 or 2)
Zone Extension blocking input 1 of pilot distance protection x, it is triggered
87 85-x.ZX.Blk1
from binary input or programmable logic etc. (x=1 or 2)
Zone Extension blocking input 2 of pilot distance protection x, it is triggered
88 85-x.ZX.Blk2
from binary input or programmable logic etc. (x=1 or 2)
Pilot directional earth-fault protection x enabling input 1, it is triggered from
89 85-x.DEF.En1
binary input or programmable logic etc. (x=1 or 2)
Pilot directional earth-fault protection x enabling input 2, it is triggered from
90 85-x.DEF.En2
binary input or programmable logic etc. (x=1 or 2)
Pilot directional earth-fault protection x blocking input, it is triggered from
91 85-x.DEF.Blk
binary input or programmable logic etc. (x=1 or 2)
Input signal of indicating that pilot channel 1 is abnormal for pilot directional
92 85-x.Abnor_Ch1
earth-fault protection x (x=1 or 2)
Input signal of indicating that pilot channel 2 is abnormal for pilot directional
93 85-x.Abnor_Ch2
earth-fault protection x (x=1 or 2)
Input signal of receiving permissive signal via channel 1 for pilot directional
94 85-x.Recv1
earth-fault protection x (x=1 or 2)
Input signal of receiving permissive signal via channel 2 for pilot directional
95 85-x.Recv2
earth-fault protection x (x=1 or 2)
Input signal of initiating sending permissive signal from external tripping
96 85-x.ExTrp
signal (x=1 or 2)
97 85-x.Unblocking1 Unblocking signal 1 for pilot directional earth-fault protection x (x=1 or 2)
98 85-x.Unblocking2 Unblocking signal 2 for pilot directional earth-fault protection x (x=1 or 2)
Phase overcurrent protection
Stage x of phase overcurrent protection enabling input 1, it is triggered from
99 50/51Px.En1
binary input or programmable logic etc.
Stage x of phase overcurrent protection enabling input 2, it is triggered from
100 50/51Px.En2
binary input or programmable logic etc.
Stage x of phase overcurrent protection blocking input, it is triggered from
101 50/51Px.Blk
binary input or programmable logic etc.
Earth fault protection
102 50/51Gx.En1 Stage x of earth fault protection enabling input 1, it is triggered from binary

9-6 PCS-902 Line Distance Relay


Date: 2014-07-29
9 Configurable Function

No. Item Description


input or programmable logic etc.
Stage x of earth fault protection enabling input 2, it is triggered from binary
103 50/51Gx.En2
input or programmable logic etc.
Stage x of earth fault protection blocking input, it is triggered from binary
104 50/51Gx.Blk
input or programmable logic etc.
Overcurrent protection for VT circuit failure
Phase overcurrent protection for VT circuit failure enabling input 1, it is
105 50PVT.En1
triggered from binary input or programmable logic etc.
Phase overcurrent protection for VT circuit failure enabling input 2, it is
106 50PVT.En2
triggered from binary input or programmable logic etc.
Phase overcurrent protection for VT circuit failure blocking input, it is
107 50PVT.Blk
triggered from binary input or programmable logic etc.
Ground overcurrent protection for VT circuit failure enabling input 1, it is
108 50GVT.En1
triggered from binary input or programmable logic etc.
Ground overcurrent protection for VT circuit failure enabling input 2, it is
109 50GVT.En2
triggered from binary input or programmable logic etc.
Ground overcurrent protection for VT circuit failure blocking input, it is
110 50GVT.Blk
triggered from binary input or programmable logic etc.
Residual SOTF protection
Residual current SOTF protection enabling input 1, it is triggered from binary
111 50GSOTF.En1
input or programmable logic etc.
Residual current SOTF protection enabling input 2, it is triggered from binary
112 50GSOTF.En2
input or programmable logic etc.
Residual current SOTF protection blocking input, it is triggered from binary
113 50GSOTF.Blk
input or programmable logic etc.
Voltage protection
Stage x of overvoltage protection enabling input 1, it is triggered from binary
114 59Px.En1
input or programmable logic etc. (x=1, 2, 3)
Stage x of overvoltage protection enabling input 2, it is triggered from binary
115 59Px.En2
input or programmable logic etc. (x=1, 2, 3)
Stage x of overvoltage protection blocking input, it is triggered from binary
116 59Px.Blk
input or programmable logic etc. (x=1, 2, 3)
Negative-sequence overvoltage protection enabling input 1, it is triggered
117 59Q.En1
from binary input or programmable logic etc.
Negative-sequence overvoltage protection enabling input 2, it is triggered
118 59Q.En2
from binary input or programmable logic etc.
Negative-sequence overvoltage protection blocking input, it is triggered from
119 59Q.Blk
binary input or programmable logic etc.
Stage x of undervoltage protection enabling input 1, it is triggered from binary
120 27Px.En1
input or programmable logic etc. (x=1, 2, 3)
Stage x of undervoltage protection enabling input 2, it is triggered from binary
121 27Px.En2
input or programmable logic etc. (x=1, 2, 3)

PCS-902 Line Distance Relay 9-7


Date: 2014-07-29
9 Configurable Function

No. Item Description


Stage x of undervoltage protection blocking input, it is triggered from binary
122 27Px.Blk
input or programmable logic etc. (x=1, 2, 3)
Frequency protection
Overfrequency protection enabling input 1, it is triggered from binary input or
123 81O.En1
programmable logic etc.
Overfrequency protection enabling input 2, it is triggered from binary input or
124 81O.En2
programmable logic etc.
Overfrequency protection blocking input, it is triggered from binary input or
125 81O.Blk
programmable logic etc.
Underfrequency protection enabling input 1, it is triggered from binary input
126 81U.En1
or programmable logic etc.
Underfrequency protection enabling input 2, it is triggered from binary input
127 81U.En2
or programmable logic etc.
Underfrequency protection blocking input, it is triggered from binary input or
128 81U.Blk
programmable logic etc.
Breaker failure protection
129 CBx.50BF.ExTrp3P_L Input signal of three-phase tripping contact from line protection
Input signal of three-phase tripping contact from generator or transformer
130 CBx.50BF.ExTrp3P_GT
protection
131 CBx.50BF.ExTrpA Input signal of phase-A tripping contact from external device
132 CBx.50BF.ExTrpB Input signal of phase-B tripping contact from external device
133 CBx.50BF.ExTrpC Input signal of phase-C tripping contact from external device
Input signal of three-phase tripping contact from external device. Once it is
134 CBx.50BF.ExTrp_WOI energized, normally closed auxiliary contact of circuit breaker is chosen in
addition to breaker failure current check to trigger breaker failure timers.
135 CBx.50BF.En Input signal of enabling breaker failure protection
Breaker failure protection blocking input, such as function blocking binary
input.
136 CBx.50BF.Blk
When the input is 1, breaker failure protection is reset and time delay is
cleared.
Thermal overload protection
137 49.Clr_Cmd Input signal of clear thermal accumulation value
Thermal overload protection enabling input, it is triggered from binary input or
138 49.En
programmable logic etc.
Thermal overload protection blocking input, it is triggered from binary input or
139 49.Blk
programmable logic etc.
Stub overcurrent protection
Stub overcurrent protection enabling input 1, it is triggered from binary input
140 50STB.En1
or programmable logic etc.
Stub overcurrent protection enabling input 2, it is triggered from binary input
141 50STB.En2
or programmable logic etc.
142 50STB.Blk Stub overcurrent protection blocking input, it is triggered from binary input or

9-8 PCS-902 Line Distance Relay


Date: 2014-07-29
9 Configurable Function

No. Item Description


programmable logic etc.
143 50STB.89b_DS Normally closed auxiliary contact of line disconnector
Dead zone protection
144 CBx.50DZ.En1 Dead zone protection enabling input 1, it can be binary inputs or logic link.
145 CBx.50DZ.En2 Dead zone protection enabling input 2, it can be binary inputs or logic link.
Dead zone protection blocking input, such as function blocking binary input.
146 CBx.50DZ.Blk
When the input is 1, dead zone protection is reset and time delay is cleared.
147 CBx.50DZ.Init Initiation signal input of the dead zone protection.
Pole discrepancy protection
Pole discrepancy protection enabling input 1, it is triggered from binary input
148 CBx.62PD.En1
or programmable logic etc.
Pole discrepancy protection enabling input 2, it is triggered from binary input
149 CBx.62PD.En2
or programmable logic etc.
Pole discrepancy protection blocking input, it is triggered from binary input or
150 CBx.62PD.Blk
programmable logic etc.
Broken conductor protection
Enable broken conductor protection input 1, it is triggered from binary input
151 46BC.En1
or programmable logic etc.
Enable broken conductor protection input 2, it is triggered from binary input
152 46BC.En2
or programmable logic etc.
Broken conductor protection blocking input, it is triggered from binary input or
153 46BC.Blk
programmable logic etc.
Reverse power protection
Enable stage 1 of reverse power protection input 1, it is triggered from binary
154 32R1.En
input or programmable logic etc.
Stage 1 of reverse power protection blocking input, it is triggered from binary
155 32R1.Blk
input or programmable logic etc.
Enable stage 2 of reverse power protection input 2, it is triggered from binary
156 32R2.En
input or programmable logic etc.
Stage 2 of reverse power protection blocking input, it is triggered from binary
157 32R2.Blk
input or programmable logic etc.
Synchrocheck function
158 CBx.25.Blk_Chk Input signal of blocking synchrocheck function for AR.
Input signal of blocking synchronism check for AR. If the value is “1”, the
159 CBx.25.Blk_SynChk
output of synchronism check is “0”.
160 CBx.25.Blk_DdChk Input signal of blocking dead charge check for AR.
Input signal of starting synchronism check, usually it was starting signal of
161 CBx.25.Start_Chk
AR from auto-reclosing module.
Input signal of starting live three-phase check, usually it was starting signal of
162 CBx.25.Start_3PLvChk
1-pole AR
163 CBx.25.Blk_VTS_Usyn VT circuit supervision (Usyn) is blocked
164 CBx.25.Blk_VTS_Uref VT circuit supervision (Uref) is blocked

PCS-902 Line Distance Relay 9-9


Date: 2014-07-29
9 Configurable Function

No. Item Description


165 25.MCB_VT_UL1 Binary input for VT MCB auxiliary contact (UL1)
166 25.MCB_VT_UL2 Binary input for VT MCB auxiliary contact (UL2)
167 25.MCB_VT_UB1 Binary input for VT MCB auxiliary contact (UB1)
168 25.MCB_VT_UB2 Binary input for VT MCB auxiliary contact (UB2)
169 25.NC_UL1DS Normally closed contact of disconnector (UL1)
170 25.NO_UL1DS Normally open contact of disconnector (UL1)
171 25.NC_UB1DS Normally closed contact of disconnector (UB1)
172 25.NO_UB1DS Normally open contact of disconnector (UB1)
173 25.NC_UL2DS Normally closed contact of disconnector (UL2)
174 25.NO_UL2DS Normally open contact of disconnector (UL2)
175 25.NC_UB2DS Normally closed contact of disconnector (UB2)
176 25.NO_UB2DS Normally open contact of disconnector (UB2)
Auto-reclosing
Binary input for enabling AR. If the logic setting [79.En_ExtCtrl]=1, enabling
177 CBx.79.En
AR will be controlled by the external signal via binary input
Binary input for disabling AR. If the logic setting [79.En_ExtCtrl]=1, disabling
178 CBx.79.Blk
AR will be controlled by the external input
179 CBx.79.Sel_1PAR Input signal for selecting 1-pole AR mode of corresponding circuit breaker
180 CBx.79.Sel_3PAR Input signal for selecting 3-pole AR mode of corresponding circuit breaker
181 CBx.79.Sel_1P/3PAR Input signal for selecting 1/3-pole AR mode of corresponding circuit breaker
182 CBx.79.Trp Input signal of single-phase tripping from line protection to initiate AR
183 CBx.79.Trp3P Input signal of three-phase tripping from line protection to initiate AR
184 CBx.79.TrpA Input signal of A-phase tripping from line protection to initiate AR
185 CBx.79.TrpB Input signal of B-phase tripping from line protection to initiate AR
186 CBx.79.TrpC Input signal of C-phase tripping from line protection to initiate AR
Input signal of blocking reclosing, usually it is connected with the operating
187 CBx.79.LockOut signals of definite-time protection, transformer protection and busbar
differential protection, etc.
188 CBx.79.PLC_Lost Input signal of indicating the alarm signal that signal channel is lost
Input signal of waiting for reclosing permissive signal from master AR (when
189 CBx.79.WaitMaster
reclosing multiple circuit breakers)
The input for indicating whether circuit breaker has enough energy to
190 CBx.79.CB_Healthy
perform the close function
191 CBx.79.Clr_Counter Clear the reclosing counter
192 CBx.79.Ok_Chk Synchrocheck condition of AR is met
193 CBx.79.Ok_3PLvChk Live three-phase check condition of AR is met
Transfer trip
194 TT.Init Input signal of initiating transfer trip after receiving transfer trip
Transfer trip enabling input, it is triggered from binary input or programmable
195 TT.En
logic etc.
Transfer trip blocking input, it is triggered from binary input or programmable
196 TT.Blk
logic etc.

9-10 PCS-902 Line Distance Relay


Date: 2014-07-29
9 Configurable Function

No. Item Description


Trip logic
Trip enabling input, it is triggered from binary input or programmable logic
197 CBx.TRP.En
etc.

Trip blocking input, it is triggered from binary input or programmable logic


198 CBx.TRP.Blk
etc.
Input signal of permitting three-phase tripping
199 CBx.PrepTrp3P When this signal is valid, three-phase tripping will be adopted for any kind of
faults.
VT circuit supervision
VT supervision enabling input, it is triggered from binary input or
200 VTS.En
programmable logic etc.
VT supervision blocking input, it is triggered from binary input or
201 VTS.Blk
programmable logic etc.
VT neutral point supervision enabling input, it is triggered from binary input or
202 VTNS.En
programmable logic etc.
VT neutral point supervision blocking input, it is triggered from binary input or
203 VTNS.Blk
programmable logic etc.
204 VTS.MCB_VT Binary input for VT MCB auxiliary contact
CT circuit supervision
CT circuit supervision enabling input, it is triggered from binary input or
205 CBx.CTS.En
programmable logic etc.
CT circuit supervision blocking input, it is triggered from binary input or
206 CBx.CTS.Blk
programmable logic etc.
Control and Synchrocheck for Manual Closing
207 CSWIxx.CILO.EnOpn It is the interlock status of No.xx open output of BO module (xx=01~10)

208 CSWIxx.CILO.EnCls It is the interlock status of No.xx closing output of BO module (xx=01~10)
From receiving a closing command, this device will continuously check
whether the 2 voltages (Incoming voltage and reference voltage) involved in
synchronism check(or dead check) can meet the criteria.
209 Sig_Ok_Chk Within the duration of [MCBrd.25.t_Wait_Chk], if the synchronism check(or
dead check) criteria are not met, [Sig_Ok_Chk] will be set as “0”; if the
synchronism check(or dead check) criteria are met, [Sig_Ok_Chk] will be set
as “1”.
It is used to select the local control to No.xx controlled object (CB/DS/ES).
210 CSWIxx.LocCtrl When the local control is active, No.xx binary outputs can only be locally
controlled.
It is used to select the remote control to No.xx controlled object (CB/DS/ES).
211 CSWIxx.RmtCtrl When the remote control is active, No.xx binary outputs can only be remotely
controlled by SCADA or control centers.
It is used to disable the interlock blocking function for control output. If the
212 CSWIxx.CILO.Disable
signal “CSWIxx.CILO.Disable” is “1”, No.xx binary outputs of the device will

PCS-902 Line Distance Relay 9-11


Date: 2014-07-29
9 Configurable Function

No. Item Description


not be blocked by interlock conditions.
It is used to select the remote control to controlled object (CB/DS/ES). When
213 BIinput.RmtCtrl the remote control is active, all binary outputs can only be remotely controlled
by SCADA or control centers.
It is used to select the local control to controlled object (CB/DS/ES). When
214 BIinput.LocCtrl
the local control is active, all binary outputs can only be locally controlled.
It is used to disable the interlock blocking function for control output. If the
215 BIinput.CILO.Disable signal “BIinput.CILO.Disable” is “1”, all binary outputs of this device will not
be blocked by interlock conditions.
When the condition of local control is met and the signal
216 CSWI01.ManSynCls “CSWI01.ManSynCls” is “1”, the output contact [BO_CtrlCls01] is closed to
execute manually closing the circuit breaker with synschrochcek.
When the condition of local control is met and the signal “CSWI01.ManOpn”
217 CSWI01.ManOpn is “1”, the output contact [BO_CtrlOpn01] is closed to execute manually open
the circuit breaker.

9.3.2 Output Signal


All output signals of this device have been listed in the following table.

Table 9.3-2 Output signals

No. Signal Description


Circuit breaker position supervision
1 CBx.Alm_52b Circuit breaker No.x position is abnormal
2 CBx.TCCS.Alm Control circuit of circuit breaker No.x is abnormal
Fault detector
3 FD.Pkp The device picks up
4 FD.DPFC.Pkp DPFC current fault detector element operates.
5 FD.ROC.Pkp Residual current fault detector element operates.
6 FD.NOC.Pkp Negative-sequence fault detector element operates.
Auxiliary element
7 AuxE.St Any auxiliary element of the device operates.
8 AuxE.OCD.St_Ext Current change auxiliary element operates.
9 AuxE.OCD.On Current change auxiliary element is enabled.
10 AuxE.ROC1.St Stage 1 of residual current auxiliary element operates.
11 AuxE.ROC1.On Stage 1 of residual current auxiliary element is enabled.
12 AuxE.ROC2.St Stage 2 of residual current auxiliary element operates.
13 AuxE.ROC2.On Stage 2 of residual current auxiliary element is enabled.
14 AuxE.ROC3.St Stage 3 of residual current auxiliary element operates.
15 AuxE.ROC3.On Stage 3 of residual current auxiliary element is enabled.
16 AuxE.OC1.St Stage 1 of phase current auxiliary element operates.
17 AuxE.OC1.StA Stage 1 of phase current auxiliary element operates (phase A).
18 AuxE.OC1.StB Stage 1 of phase current auxiliary element operates (phase B).

9-12 PCS-902 Line Distance Relay


Date: 2014-07-29
9 Configurable Function

No. Signal Description


19 AuxE.OC1.StC Stage 1 of phase current auxiliary element operates (phase C).
20 AuxE.OC1.On Stage 1 of phase current auxiliary element is enabled.
21 AuxE.OC2.St Stage 2 of phase current auxiliary element operates.
22 AuxE.OC2.StA Stage 2 of phase current auxiliary element operates (phase A).
23 AuxE.OC2.StB Stage 2 of phase current auxiliary element operates (phase B).
24 AuxE.OC2.StC Stage 2 of phase current auxiliary element operates (phase C).
25 AuxE.OC2.On Stage 2 of phase current auxiliary element is enabled.
26 AuxE.OC3.St Stage 3 of phase current auxiliary element operates.
27 AuxE.OC3.StA Stage 1 of phase current auxiliary element operates (phase A).
28 AuxE.OC3.StB Stage 1 of phase current auxiliary element operates (phase B).
29 AuxE.OC3.StC Stage 1 of phase current auxiliary element operates (phase C).
30 AuxE.OC3.On Stage 3 of phase current auxiliary element is enabled.
31 AuxE.UVD.St Voltage change auxiliary element operates.
32 AuxE.UVD.St_Ext Voltage change auxiliary element operates.
33 AuxE.UVD.On Voltage change auxiliary element is enabled.
34 AuxE.UVG.St Phase-to-ground under voltage auxiliary element operates.
35 AuxE.UVG.StA Phase-to-ground under voltage auxiliary element operates (phase A).
36 AuxE.UVG.StB Phase-to-ground under voltage auxiliary element operates (phase B).
37 AuxE.UVG.StC Phase-to-ground under voltage auxiliary element operates (phase C).
38 AuxE.UVG.On Phase-to-ground under voltage auxiliary element is enabled.
39 AuxE.UVS.St Phase-to-phase under voltage auxiliary element operates.
40 AuxE.UVS.StAB Phase-to-phase under voltage auxiliary element operates (phase AB).
41 AuxE.UVS.StBC Phase-to-phase under voltage auxiliary element operates (phase BC).
42 AuxE.UVS.StCA Phase-to-phase under voltage auxiliary element operates (phase CA).
43 AuxE.UVS.On Phase-to-phase under voltage auxiliary element is enabled.
44 AuxE.ROV.St Residual voltage auxiliary element operates.
45 AuxE.ROV.On Residual voltage auxiliary element is enabled.
Distance protection
46 21D.Op DPFC distance protection operates.
47 21D.On DPFC distance protection is enabled.
48 LoadEnch.St Measured impedance into the load area
49 LoadEnch.On Load trapezoid characteristic is enabled.
50 21Mx.On Zone x of distance protection is enabled (x=1, 2, 3, 4, 5)
51 21Mx.Op Zone x of distance protection operates (x=1, 2, 3, 4, 5)
52 21Qx.On Zone x of distance protection is enabled (x=1, 2, 3, 4, 5)
53 21Qx.Op Zone x of distance protection operates (x=1, 2, 3, 4, 5)
54 68.St Power swing detection takes into effect.
55 21Mx.Rls_PSBR PSBR operates to release zone x (Mho characteristic, x=1, 2, 3, 4, 5)
56 21Qx.Rls_PSBR PSBR operates to release zone x (Quad characteristic, x=1, 2, 3, 4, 5)
57 21M.Pilot.Rls_PSBR PSBR operates to release pilot distance zone (Mho characteristic)
58 21Q.Pilot.Rls_PSBR PSBR operates to release pilot distance zone (Quad characteristic)
59 21SOTF.Op Accelerate distance protection to trip when manual closing or

PCS-902 Line Distance Relay 9-13


Date: 2014-07-29
9 Configurable Function

No. Signal Description


auto-reclosing to fault
60 21SOTF.On Accelerate distance protection is enabled.
Accelerate distance protection to trip when another fault happening
61 21SOTF.Op_PDF
under pole discrepancy conditions
Optical pilot channel
62 FOx.On Channel x is enabled.
63 FOx.Recv1 Receiving signal 1 of channel x
64 FOx.Recv2 Receiving signal 2 of channel x
65 FOx.Recv3 Receiving signal 3 of channel x
66 FOx.Recv4 Receiving signal 4 of channel x
67 FOx.Recv5 Receiving signal 5 of channel x
68 FOx.Recv6 Receiving signal 6 of channel x
69 FOx.Recv7 Receiving signal 7 of channel x
70 FOx.Recv8 Receiving signal 8 of channel x
Receiving signal 9 of channel x (it is configured by fault as receiving
permissive signal via channel No.1, or receiving permissive signal of
71 FOx.Recv9
A-phase via channel No.1 (only for phase-segregated command
scheme))
Receiving signal 10 of channel x (it is configured by fault as receiving
72 FOx.Recv10 permissive signal of B-phase via channel No.1 (only for
phase-segregated command scheme))
Receiving signal 11 of channel x (it is configured by fault as receiving
73 FOx.Recv11 permissive signal of C-phase via channel No.1 (only for
phase-segregated command scheme))
Receiving signal 12 of channel x (it is configured by fault as receiving
74 FOx.Recv12 permissive signal 2 only for pilot directional earth-fault protection
adopting independent pilot channel 2)
75 FOx.Alm Channel x is abnormal
Received ID from the remote end is not as same as the setting
76 FOx.Alm_ID
[FO.RmtID] of the device in local end
Pilot distance protection and pilot directional earth-fault protection
77 85-x.Z.On Pilot distance protection x is enabled. (x=1 or 2)
Zone extension protection of pilot distance protection x is enabled.
78 85-x.ZX.On
(x=1 or 2)
79 85-x.Op_Z Pilot distance protection x operates. (x=1 or 2)
Output signal of sending permissive signal 1 or sending A-phase
80 85-x.Send1 permissive signal of pilot distance protection x (only for
phase-segregated command scheme, x=1 or 2)
Output signal of sending B-phase permissive signal of pilot distance
81 85-x.SendB
protection x (only for phase-segregated command scheme, x=1 or 2)
Output signal of sending C-phase permissive signal of pilot distance
82 85-x.SendC
protection x (only for phase-segregated command scheme, x=1 or 2)

9-14 PCS-902 Line Distance Relay


Date: 2014-07-29
9 Configurable Function

No. Signal Description


Zone extension protection of pilot distance protection x operates. (x=1
83 85-x.Op_ZX
or 2)
Zone extension protection of pilot distance protection x starts (x=1 or
84 85-x.ZX_St
2)
85 85-x.DEF.On Pilot directional earth-fault protection x is enabled. (x=1 or 2)
86 85-x.Op_DEF Pilot directional earth-fault protection x operates. (x=1 or 2)
Pilot directional earth-fault protection x operates to block AR. (x=1 or
87 85-x.DEF_BlkAR
2)
Output signal of sending permissive signal 1 for pilot directional
88 85-x.Send1 earth-fault protection x when pilot directional earth-fault protection
sharing pilot channel 1 with pilot distance protection (x=1 or 2)
Output signal of sending permissive signal 2 for pilot directional
89 85-x.Send2 earth-fault protection x when pilot directional earth-fault protection
adopting independent pilot channel 2 (x=1 or 2)
Current direction
90 FwdDir_ROC The forward direction of zero-sequence power
91 RevDir_ROC The reverse direction of zero-sequence power
92 FwdDir_NegOC The forward direction of negative-sequence power
93 RevDir_NegOC The reverse direction of negative-sequence power
94 FwdDir_A The forward direction of phase-A current
95 FwdDir_B The forward direction of phase-B current
96 FwdDir_C The forward direction of phase-C current
97 RevDir_A The reverse direction of phase-A current
98 RevDir_B The reverse direction of phase-B current
99 RevDir_C The reverse direction of phase-C current
100 FwdDir_AB The forward direction of phase-AB current
101 FwdDir_BC The forward direction of phase-BC current
102 FwdDir_CA The forward direction of phase-CA current
103 RevDir_AB The reverse direction of phase-AB current
104 RevDir_BC The reverse direction of phase-BC current
105 RevDir_CA The reverse direction of phase-CA current
Phase overcurrent protection
106 50/51Px.On Stage x of phase overcurrent protection is enabled.
107 50/51Px.Op Stage x of phase overcurrent protection operates.
108 50/51Px.St Stage x of phase overcurrent protection starts.
109 50/51Px.StA Stage x of phase overcurrent protection starts (A-Phase).
110 50/51Px.StB Stage x of phase overcurrent protection starts (B-Phase).
111 50/51Px.StC Stage x of phase overcurrent protection starts (C-Phase).
Earth fault protection
112 50/51Gx.On Stage x of earth fault protection is enabled.
113 50/51Gx.St Stage x of earth fault protection starts.
114 50/51Gx.Op Stage x of earth fault protection operates.

PCS-902 Line Distance Relay 9-15


Date: 2014-07-29
9 Configurable Function

No. Signal Description


Overcurrent protection for VT circuit failure
115 50PVT.On Phase overcurrent protection for VT circuit failure is enabled.
116 50PVT.Op Phase overcurrent protection for VT circuit failure operates.
117 50PVT.St Phase overcurrent protection for VT circuit failure starts.
118 50PVT.StA Phase overcurrent protection for VT circuit failure starts (A-Phase).
119 50PVT.StB Phase overcurrent protection for VT circuit failure starts (B-Phase).
120 50PVT.StC Phase overcurrent protection for VT circuit failure starts (C-Phase).
121 50GVT.On Ground overcurrent protection for VT circuit failure is enabled.
122 50GVT.Op Ground overcurrent protection for VT circuit failure operates.
123 50GVT.St Ground overcurrent protection for VT circuit failure starts.
Residual SOTF protection
124 50GSOTF.On Residual current SOTF protection is enabled.
125 50GSOTF.Op Residual current SOTF protection operates.
126 50GSOTF.St Residual current SOTF protection starts.
Voltage protection
127 59Px.On Stage x of overvoltage protection is enabled. (x=1, 2, 3)
128 59Px.Op Stage x of overvoltage protection operates. (x=1, 2, 3)
129 59Px.St Stage x of overvoltage protection starts. (x=1, 2, 3)
130 59Px.St1 Stage x of overvoltage protection starts (A or AB). (x=1, 2, 3)
131 59Px.St2 Stage x of overvoltage protection starts (B or BC). (x=1, 2, 3)
132 59Px.St3 Stage x of overvoltage protection starts (C or CA). (x=1, 2, 3)
Stage x of overvoltage protection operates to initiate transfer trip. (x=1,
133 59Px.Op_InitTT
2, 3)
134 59Px.Alm Stage x of overvoltage protection alarms. (x=1, 2, 3)
135 59Q.On Negative-sequence overvoltage protection is enabled.
136 59Q.Op Negative-sequence overvoltage protection operates.
137 59Q.St Negative-sequence overvoltage protection starts.
138 27Px.On Stage x of undervoltage protection is enabled. (x=1, 2, 3)
139 27Px.Op Stage x of undervoltage protection operates. (x=1, 2, 3)
140 27Px.Alm Stage x of undervoltage protection alarms. (x=1, 2, 3)
141 27Px.St Stage x of undervoltage protection starts. (x=1, 2, 3)
142 27Px.St1 Stage x of undervoltage protection starts (A or AB). (x=1, 2, 3)
143 27Px.St2 Stage x of undervoltage protection starts (B or BC). (x=1, 2, 3)
144 27Px.St3 Stage x of undervoltage protection starts (C or CA). (x=1, 2, 3)
Frequency protection
145 81O.OFx.On Stage x of overfrequency protection is enabled (x=1, 2, 3 or 4).
146 81O.OFx.Op Stage x of overfrequency protection operates (x=1, 2, 3 or 4).
147 81O.St Overfrequency protection starts.
148 81U.UFx.On Stage x of underfrequency protection is enabled (x=1, 2, 3 or 4).
149 81U.UFx.Op Stage x of underfrequency protection operates (x=1, 2, 3 or 4).
150 81U.St Underfrequency protection starts.
Breaker failure protection

9-16 PCS-902 Line Distance Relay


Date: 2014-07-29
9 Configurable Function

No. Signal Description


151 CBx.50BF.On Breaker failure protection is enabled
152 CBx.50BF.Op_ReTrpA Breaker failure protection operates to re-trip phase-A circuit breaker
153 CBx.50BF.Op_ReTrpB Breaker failure protection operates to re-trip phase-B circuit breaker
154 CBx.50BF.Op_ReTrpC Breaker failure protection operates to re-trip phase-C circuit breaker
Breaker failure protection operates to re-trip three-phase circuit
155 CBx.50BF.Op_ReTrp3P
breaker
156 CBx.50BF.Op_t1 Stage 1 of breaker failure protection operates
157 CBx.50BF.Op_t2 Stage 2 of breaker failure protection operates
Thermal overload protection
158 49.On Thermal overload protection is enabled.
159 49.St Thermal overload protection starts.
160 49-1.Op Stage 1 of thermal overload protection operates to trip.
161 49-2.Op Stage 2 of thermal overload protection operates to trip.
162 49-1.Alm Stage 1 of thermal overload protection operates to alarm.
163 49-2.Alm Stage 2 of thermal overload protection operates to alarm.
Stub overcurrent protection
164 50STB.On Stub overcurrent protection is enabled.
165 50STB.Op Stub overcurrent protection operates.
166 50STB.St Stub overcurrent protection starts.
167 50STB.StA Phase A of stub overcurrent protection starts.
168 50STB.StB Phase B of stub overcurrent protection starts.
169 50STB.StC Phase C of stub overcurrent protection starts.
Dead zone protection
170 CBx.50DZ.On Dead zone protection is enabled.
171 CBx.50DZ.St Dead zone protection starts.
172 CBx.50DZ.Op Dead zone protection operates.
Pole discrepancy protection
173 CBx.62PD.On Pole discrepancy protection is enabled.
174 CBx.62PD.Op Pole discrepancy protection operates to trip
175 CBx.62PD.St Pole discrepancy protection starts
Broken conductor protection
176 46BC.On Broken-conductor protection is enabled.
177 46BC.St Broken-conductor protection starts
178 46BC.Op Broken-conductor protection operates to trip.
179 46BC.Alm Broken-conductor protection operates to alarm.
Reverse power protection
180 32R1.On Stage 1 of reverse power protection is enabled.
181 32R1.St Stage 1 of reverse power protection starts.
182 32R1.Op Stage 1 of reverse power protection operates to trip.
183 32R1.Alm Stage 1 of reverse power protection operates to alarm.
184 32R2.On Stage 2 of reverse power protection is enabled.
185 32R2.St Stage 2 of reverse power protection starts.

PCS-902 Line Distance Relay 9-17


Date: 2014-07-29
9 Configurable Function

No. Signal Description


186 32R2.Op Stage 2 of reverse power protection operates to trip.
Synchrocheck function
187 CBx.UL1_Sel To select voltage of Line 1
188 CBx.UL2_Sel To select voltage of Line 2
189 CBx.UB1_Sel To select voltage of Bus 1
190 CBx.UB2_Sel To select voltage of Bus 2
191 CBx.Alm_Invalid_Sel Voltage selection is invalid.
To indicate that frequency difference condition for synchronism check
192 CBx.25.Ok_fDiffChk of AR is met, frequency difference between UB and UL is smaller than
[25.f_Diff].
To indicate that voltage difference condition for synchronism check of
193 CBx.25.Ok_UDiffChk AR is met, voltage difference between UB and UL is smaller than
[25.U_Diff]
To indicate phase difference condition for synchronism check of AR is
194 CBx.25.Ok_phiDiffChk met, phase difference between UB and UL is smaller than
[25.phi_Diff].
195 CBx.25.Ok_DdL_DdB Dead line and dead bus condition is met
196 CBx.25.Ok_DdL_LvB Dead line and live bus condition is met
197 CBx.25.Ok_LvL_DdB Live line and dead bus condition is met
198 CBx.25.Chk_LvL Line voltage is greater than the voltage setting [25.U_Lv]
199 CBx.25.Chk_DdL Line voltage is smaller than the voltage setting [25.U_Dd]
200 CBx.25.Chk_LvB Bus voltage is greater than the voltage setting [25.U_Lv]
201 CBx.25.Chk_DdB Bus voltage is smaller than the voltage setting [25.U_Dd]
202 CBx.25.Ok_DdChk To indicate that dead charge check condition of AR is met
203 CBx.25.Ok_SynChk To indicate that synchronism check condition of AR is met
204 CBx.25.Ok_Chk To indicate that synchrocheck condition of AR is met
205 CBx.25.Ok_3PLvChk To indicate that live three-phase check condition is met
206 CBx.25.Alm_VTS_Uref Reference voltage circuit is abnormal
207 CBx.25.Alm_VTS_Usyn Synchronism voltage circuit is abnormal
208 CBx.25.f_Ref Frequency of the voltage used by protection calculation
209 CBx.25.f_Syn Frequency of the voltage used by synchrocheck
210 CBx.25.U_Diff Voltage difference for synchronism check
211 CBx.25.f_Diff Frequency difference for synchronism check
212 CBx.25.phi_Diff Phase difference for synchronism check
Auto-reclosing
213 CBx.79.On Automatic reclosure is enabled
214 CBx.79.Off Automatic reclosure is disabled
215 CBx.79.Close Output of auto-reclosing signal
216 CBx.79.Ready Automatic reclosure have been ready for reclosing cycle
217 CBx.79.AR_Blkd Automatic reclosure is blocked
218 CBx.79.Active Automatic reclosing logic is actived
219 CBx.79.Inprog Automatic reclosing cycle is in progress

9-18 PCS-902 Line Distance Relay


Date: 2014-07-29
9 Configurable Function

No. Signal Description


220 CBx.79.Inprog_1P The first 1-pole AR cycle is in progress
221 CBx.79.Inprog_3P 3-pole AR cycle is in progress
222 CBx.79.Inprog_3PS1 First 3-pole AR cycle is in progress
223 CBx.79.Inprog_3PS2 Second 3-pole AR cycle is in progress
224 CBx.79.Inprog_3PS3 Third 3-pole AR cycle is in progress
225 CBx.79.Inprog_3PS4 Fourth 3-pole AR cycle is in progress
Waiting signal of automatic reclosing which will be sent to slave (when
226 CBx.79.WaitToSlave
reclosing multiple circuit breakers)
Single-phase circuit breaker will be tripped once protection device
227 CBx.79.Perm_Trp1P
operates
Three-phase circuit breaker will be tripped once protection device
228 CBx.79.Perm_Trp3P
operates
Automatic reclosure status
0: AR is ready.
229 CBx.79.Rcls_Status
1: AR is in progress.
2: AR is successful.
230 CBx.79.Fail_Rcls Auto-reclosing fails
231 CBx.79.Succ_Rcls Auto-reclosing is successful
232 CBx.79.Fail_Chk Synchrocheck for AR fails
233 CBx.79.Mode_1PAR Output of 1-pole AR mode
234 CBx.79.Mode_3PAR Output of 3-pole AR mode
235 CBx.79.Mode_1/3PAR Output of 1/3-pole AR mode
Transfer trip
236 TT.Alm Input signal of receiving transfer trip is abnormal
237 TT.Op Transfer trip operates
238 TT.On Transfer trip is enabled
Trip logic
239 CBx.TRP.On Tripping logic is enabled.
240 CBx.TrpA Tripping A-phase circuit breaker
241 CBx.TrpB Tripping B-phase circuit breaker
242 CBx.TrpC Tripping C-phase circuit breaker
243 CBx.Trp Tripping any phase circuit breaker
244 CBx.Trp3P Tripping three-phase circuit breaker
Protection tripping signal of A-phase configured to initiate BFP, BFI
245 CBx.BFI_A
signal shall be reset immediately after tripping signal drops off.
Protection tripping signal of B-phase configured to initiate BFP, BFI
246 CBx.BFI_B
signal shall be reset immediately after tripping signal drops off.
Protection tripping signal of C-phase configured to initiate BFP, BFI
247 CBx.BFI_ C
signal shall be reset immediately after tripping signal drops off.
Protection tripping signal configured to initiate BFP, BFI signal shall be
248 CBx.BFI
reset immediately after tripping signal drops off.
249 CBx.Trp3P_PSFail Initiating three-phase tripping due to failure in fault phase selection

PCS-902 Line Distance Relay 9-19


Date: 2014-07-29
9 Configurable Function

No. Signal Description


250 CBx.TRP.BlkAR Blocking auto-reclosing
VT circuit supervision
251 VTS.Alm Alarm signal to indicate VT circuit fails
252 VTNS.Alm Alarm signal to indicate VT neutral point fails
CT circuit supervision
253 CBx.CTS.Alm Alarm signal to indicate CT circuit fails
Control and Synchrocheck for Manual Closing
254 CSWIxx.Op_Opn No.xx command output for open. (xx=01~10)
255 CSWIxx.Op_Cls No.xx command output for closing. (xx=01~10)
256 BIinput.RmtCtrl In order to be convenient to user configure control output, three same
output signals with input signals are available. The relationship with 10
257 BIinput.LocCtrl
binary output have been configured inside the device. The user only
assigns a specific binary input to input signal, the relevant function can

258 BIinput.CILO.Disable be gained. If some binary output need not be controlled by three
signals, please cancle the configuration by PCS-Explorer, and
configure it independently.
Faulty phase selection
259 PhSA Phase-A is selected as faulty phase
260 PhSB Phase-B is selected as faulty phase
261 PhSC Phase-C is selected as faulty phase
262 GndFlt Earth fault

9-20 PCS-902 Line Distance Relay


Date: 2014-07-29
10 Communication

10 Communication

Table of Contents
10 Communication ............................................................................ 10-a
10.1 Overview ...................................................................................................... 10-1
10.2 Rear Communication Port Information ..................................................... 10-1
10.2.1 RS-485 Interface ............................................................................................................ 10-1

10.2.2 Ethernet Interface .......................................................................................................... 10-3

10.2.3 IEC60870-5-103 Communication ................................................................................... 10-4

10.2.4 DNP3.0 Communication ................................................................................................ 10-4

10.3 IEC60870-5-103 Interface over Serial Port ................................................ 10-4


10.3.1 Physical Connection and Link Layer .............................................................................. 10-5

10.3.2 Initialization .................................................................................................................... 10-5

10.3.3 Time Synchronization ..................................................................................................... 10-5

10.3.4 Spontaneous Events ...................................................................................................... 10-5

10.3.5 General Interrogation ..................................................................................................... 10-6

10.3.6 General Service ............................................................................................................. 10-6

10.3.7 Disturbance Records ..................................................................................................... 10-6

10.4 Messages Description for IEC61850 Protocol .......................................... 10-6


10.4.1 Overview ........................................................................................................................ 10-6

10.4.2 Communication Profiles ................................................................................................. 10-7

10.4.3 MMS Communication Network Deployment................................................................... 10-8

10.4.4 Server Data Organization............................................................................................. 10-11

10.4.5 Server Features and Configuration .............................................................................. 10-14

10.4.6 ACSI Conformance ...................................................................................................... 10-16

10.4.7 Logical Nodes .............................................................................................................. 10-19

10.5 DNP3.0 Interface ....................................................................................... 10-22


10.5.1 Overview ...................................................................................................................... 10-22

PCS-902 Line Distance Relay 10-a


Date: 2013-09-16
10 Communication

10.5.2 Link Layer Functions .................................................................................................... 10-22

10.5.3 Transport Functions ..................................................................................................... 10-22

10.5.4 Application Layer Functions ......................................................................................... 10-22

List of Figures
Figure 10.2-1 EIA RS-485 bus connection arrangements.....................................................10-2

Figure 10.2-2 Ethernet communication cable .......................................................................10-3

Figure 10.2-3 Ethernet communication structure .................................................................10-4

Figure 10.4-1 Dual-net full duplex mode sharing the RCB block instance .........................10-9

Figure 10.4-2 Dual-net hot-standby mode sharing the same RCB instance .....................10-10

Figure 10.4-3 Dual-net full duplex mode with 2 independent RCB instances .................. 10-11

10-b PCS-902 Line Distance Relay


Date: 2013-09-16
10 Communication

10.1 Overview

This section outlines the remote communications interfaces of NR Relays. The protective device
supports a choice of three protocols via the rear communication interface (RS-485 or Ethernet),
selected via the model number by setting. The protocol provided by the protective device is
indicated in the menu “Settings→Device Setup→Comm Settings”.

The rear EIA RS-485 interface is isolated and is suitable for permanent connection of whichever
protocol is selected. The advantage of this type of connection is that up to 32 protective devices
can be “daisy chained” together using a simple twisted pair electrical connection.

It should be noted that the descriptions contained within this section do not aim to fully detail the
protocol itself. The relevant documentation for the protocol should be referred to for this
information. This section serves to describe the specific implementation of the protocol in the relay.

10.2 Rear Communication Port Information

10.2.1 RS-485 Interface


This protective device provides two rear RS-485 communication ports, and each port has three
terminals in the 12-terminal screw connector located on the back of the relay and each port has a
ground terminal for the earth shield of the communication cable. The rear ports provide RS-485
serial data communication and are intended for use with a permanently wired connection to a
remote control center.

10.2.1.1 EIA RS-485 Standardized Bus

The EIA RS-485 two-wire connection provides a half-duplex fully isolated serial connection to the
product. The connection is polarized and whilst the product’s connection diagrams indicate the
polarization of the connection terminals it should be borne in mind that there is no agreed
definition of which terminal is which. If the master is unable to communicate with the product, and
the communication parameters match, then it is possible that the two-wire connection is reversed.

10.2.1.2 Bus Termination

The EIA RS-485 bus must have 120Ω (Ohm) ½ Watt terminating resistors fitted at either end
across the signal wires (refer to Figure 10.2-1). Some devices may be able to provide the bus
terminating resistors by different connection or configuration arrangements, in which case
separate external components will not be required. However, this product does not provide such a
facility, so if it is located at the bus terminus then an external termination resistor will be required.

PCS-902 Line Distance Relay 10-1


Date: 2013-09-16
10 Communication

EIA RS-485
Master 120 Ohm

120 Ohm

Slave Slave Slave

Figure 10.2-1 EIA RS-485 bus connection arrangements

10.2.1.3 Bus Connections & Topologies

The EIA RS-485 standard requires that each device is directly connected to the physical cable that
is the communications bus. Stubs and tees are expressly forbidden, such as star topologies. Loop
bus topologies are not part of the EIA RS-485 standard and are forbidden by it also.

Two-core screened cable is recommended. The specification of the cable will be dependent on the
application, although a multi-strand 0.5mm2 per core is normally adequate. Total cable length must
not exceed 500m. The screen must be continuous and connected to ground at one end, normally
at the master connection point; it is important to avoid circulating currents, especially when the
cable runs between buildings, for both safety and noise reasons.

This product does not provide a signal ground connection. If a signal ground connection is present
in the bus cable then it must be ignored, although it must have continuity for the benefit of other
devices connected to the bus. At no stage must the signal ground be connected to the cables
screen or to the product’s chassis. This is for both safety and noise reasons.

10.2.1.4 Biasing

It may also be necessary to bias the signal wires to prevent jabber. Jabber occurs when the signal
level has an indeterminate state because the bus is not being actively driven. This can occur when
all the slaves are in receive mode and the master is slow to turn from receive mode to transmit
mode. This may be because the master purposefully waits in receive mode, or even in a high
impedance state, until it has something to transmit. Jabber causes the receiving device(s) to miss
the first bits of the first character in the packet, which results in the slave rejecting the message
and consequentially not responding. Symptoms of these are poor response times (due to retries),
increasing message error counters, erratic communications, and even a complete failure to
communicate.

Biasing requires that the signal lines be weakly pulled to a defined voltage level of about 1V. There
should only be one bias point on the bus, which is best situated at the master connection point.
The DC source used for the bias must be clean; otherwise noise will be injected. Note that some
devices may (optionally) be able to provide the bus bias, in which case external components will
not be required.

10-2 PCS-902 Line Distance Relay


Date: 2013-09-16
10 Communication

Note!

It is extremely important that the 120Ω termination resistors are fitted. Failure to do so will
result in an excessive bias voltage that may damage the devices connected to the bus.

As the field voltage is much higher than that required, NR cannot assume responsibility for
any damage that may occur to a device connected to the network as a result of incorrect
application of this voltage.

Ensure that the field voltage is not being used for other purposes (i.e. powering logic inputs)
as this may cause noise to be passed to the communication network.

10.2.2 Ethernet Interface


This protective device can provide four rear Ethernet interfaces (optional) and they are unattached
each other. Parameters of each Ethernet port can be configured in the menu “Settings→Device
Setup→Comm Settings”.

10.2.2.1 Ethernet Standardized Communication Cable

It is recommended to use twisted screened eight-core cable as the communication cable. A picture
is shown bellow.

Figure 10.2-2 Ethernet communication cable

10.2.2.2 Connections and Topologies

Each equipment is connected with an exchanger via communication cable, and thereby it forms a
star structure network. Dual-network is recommended in order to increase reliability. SCADA is
also connected to the exchanger and will play a role of master station, so the every equipment
which has been connected to the exchanger will play a role of slave unit.

PCS-902 Line Distance Relay 10-3


Date: 2013-09-16
10 Communication

SCADA

Switch: Net A

Switch: Net B

……

Figure 10.2-3 Ethernet communication structure

10.2.3 IEC60870-5-103 Communication


The IEC specification IEC60870-5-103: Telecontrol Equipment and Systems, Part 5: Transmission
Protocols Section 103 defines the use of standards IEC60870-5-1 to IEC60870-5-5 to perform
communication with protective device. The standard configuration for the IEC60870-5-103
protocol is to use a twisted pair EIA RS-485 connection over distances up to 500m. It also supports
to use an Ethernet connection. The relay operates as a slave in the system, responding to
commands from a master station.

To use the rear port with IEC60870-5-103 communication, the relevant settings to the protective
device must be configured.

10.2.4 DNP3.0 Communication


The DNP3.0 (Distributed Network Protocol) protocol can support the OSI/EPA model of the ISO
(International Organization for Standards), and it includes four parts: application layer protocol,
transport functions, data link layer protocol and data object library. The DNP3.0 protocol is
recommended to use the Ethernet network. This relay operates as a slave in the system,
responding to commands from a master station.

10.3 IEC60870-5-103 Interface over Serial Port

The IEC60870-5-103 interface over serial port (RS-485) is a master/slave interface with the
protective device as the slave device. It is properly developed by NR.

The protective device conforms to compatibility level 3.

The following IEC60870-5-103 facilities are supported by this interface:

 Initialization (reset)

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 Time synchronization

 Event record extraction

 General interrogation

 General commands

 Disturbance records

10.3.1 Physical Connection and Link Layer


Two EIA RS-485 standardized ports are available for IEC60870-5-103 in this protective device.
The transmission speed is optional: 4800 bit/s, 9600 bit/s, 19200 bit/s or 38400 bit/s.

The link layer strictly abides by the rules defined in the IEC60870-5-103.

10.3.2 Initialization
Whenever the protective device has been powered up, or if the communication parameters have
been changed, a reset command is required to initialize the communications. The protective
device will respond to either of the two reset commands (Reset CU or Reset FCB), the difference
is that the Reset CU will clear any unsent messages in the transmit buffer.

The protective device will respond to the reset command with an identification message ASDU 5,
the COT (Cause Of Transmission) of this response will be either Reset CU or Reset FCB
depending on the nature of the reset command.

10.3.3 Time Synchronization


The protective device time and date can be set using the time synchronization feature of the
IEC60870-5-103 protocol. The protective device will correct for the transmission delay as specified
in IEC60870-5-103. If the time synchronization message is sent as a send/confirm message then
the protective device will respond with a confirmation. Whether the time-synchronization message
is sent as a send confirmation or a broadcast (send/no reply) message, a time synchronization
class 1 event will be generated/produced.

If the protective device clock is synchronized using the IRIG-B input then it will not be possible to
set the protective device time using the IEC60870-5-103 interface. An attempt to set the time via
the interface will cause the protective device to create an event with the current date and time
taken from the IRIG-B synchronized internal clock.

10.3.4 Spontaneous Events


Events are categorized using the following information:

 Type identification (TYP)

 Function type (FUN)

 Information number (INF)

Messages sent to substation automation system are grouped according to IEC60870-5-103


protocol. Operating elements are sent by ASDU2 (time-tagged message with relative time), and

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status of binary signal and alarm element are sent by ASDU1 (time-tagged message). The cause
of transmission (COT) of these responses is 1.

All spontaneous events can be gained by printing, implementing submenu “IEC103 Info” in the
menu “Print”.

10.3.5 General Interrogation


The GI can be used to read the status of the relay, the function numbers, and information numbers
that will be returned during the GI cycle. The GI cycle strictly abides by the rules defined in the
IEC60870-5-103.

Refer the IEC60870-5-103 standard can get the enough details about general interrogation.

10.3.6 General Service


The generic functions can be used to read the setting and protection measurement of the
protective device, and modify the setting. Two supported type identifications are ASDU 21 and
ASDU 10. For more details about generic functions, see the IEC60870-5-103 standard.

All general classification service group numbers can be gained by printing, implementing submenu
“IEC103 Info” in the menu “Print”.

10.3.7 Disturbance Records


This protective device can store up to 32 disturbance records in its memory. A pickup of the fault
detector or an operation of the relay can make the protective device store the disturbance records.

The disturbance records are stored in uncompressed format and can be extracted using the
standard mechanisms described in IEC60870-5-103.

All channel numbers (ACC) of disturbance data can be gained by printing, implementing submenu
“IEC103 Info” in the menu “Print”.

10.4 Messages Description for IEC61850 Protocol

10.4.1 Overview
The IEC 61850 standard is the result of years of work by electric utilities and vendors of electronic
equipment to produce standardized communications systems. IEC 61850 is a series of standards
describing client/server and peer-to-peer communications, substation design and configuration,
testing, environmental and project standards. The complete set includes:

 IEC 61850-1: Introduction and overview

 IEC 61850-2: Glossary

 IEC 61850-3: General requirements

 IEC 61850-4: System and project management

 IEC 61850-5: Communications and requirements for functions and device models

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 IEC 61850-6: Configuration description language for communication in electrical substations


related to IEDs

 IEC 61850-7-1: Basic communication structure for substation and feeder equipment–
Principles and models

 IEC 61850-7-2: Basic communication structure for substation and feeder equipment - Abstract
communication service interface (ACSI)

 IEC 61850-7-3: Basic communication structure for substation and feeder equipment–
Common data classes

 IEC 61850-7-4: Basic communication structure for substation and feeder equipment–
Compatible logical node classes and data classes

 IEC 61850-8-1: Specific Communication Service Mapping (SCSM) – Mappings to MMS (ISO
9506-1 and ISO 9506-2) and to ISO/IEC 8802-3

 IEC 61850-9-1: Specific Communication Service Mapping (SCSM) – Sampled values over
serial unidirectional multidrop point to point link

 IEC 61850-9-2: Specific Communication Service Mapping (SCSM) – Sampled values over
ISO/IEC 8802-3

 IEC 61850-10: Conformance testing

These documents can be obtained from the IEC (http://www.iec.ch). It is strongly recommended
that all those involved with any IEC 61850 implementation obtain this document set.

10.4.2 Communication Profiles


The PCS-900 series relay supports IEC 61850 server services over TCP/IP communication
protocol stacks. The TCP/IP profile requires the PCS-900 series to have an IP address to establish
communications. These addresses are located in the menu “Settings→Device Setup→Comm
Settings”.

1. MMS protocol

IEC 61850 specifies the use of the Manufacturing Message Specification (MMS) at the upper
(application) layer for transfer of real-time data. This protocol has been in existence for a number
of years and provides a set of services suitable for the transfer of data within a substation LAN
environment. IEC 61850-7-2 abstract services and objects are mapped to actual MMS protocol
services in IEC61850-8-1.

2. Client/server

This is a connection-oriented type of communication. The connection is initiated by the client, and
communication activity is controlled by the client. IEC61850 clients are often substation computers
running HMI programs or SOE logging software. Servers are usually substation equipment such
as protection relays, meters, RTUs, transformer, tap changers, or bay controllers.

3. Peer-to-peer

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This is a non-connection-oriented, high speed type of communication usually between substation


equipment, such as protection relays, intelligent terminal. GOOSE is the method of peer-to-peer
communication.

4. Substation configuration language (SCL)

A substation configuration language is a number of files used to describe IED configurations and
communication systems according to IEC 61850-5 and IEC 61850-7. Each configured device has
an IED Capability Description (ICD) file and a Configured IED Description (CID) file. The
substation single line information is stored in a System Specification Description (SSD) file. The
entire substation configuration is stored in a Substation Configuration Description (SCD) file. The
SCD file is the combination of the individual ICD files and the SSD file, moreover, add
communication system parameters (MMS, GOOSE, control block, SV control block) and the
connection relationship of GOOSE and SV to SCD file.

10.4.3 MMS Communication Network Deployment


In order to enhance the stability and reliability of SAS, dual-MMS Ethernet is widely adopted. This
section is applied to introduce the details of dual-MMS Ethernet technology. Generally,
single-MMS Ethernet is recommended to be adopted in the SAS of 110kV and lower voltage levels,
while dual-MMS Ethernet is recommended to be adopted in the SAS of voltage levels above
110kV.

Client-server mode is adopted: clients (SCADA, control center and etc.) communicate with the
IEDs via MMS communication network, and the IEDs operate as the servers. IEDs are connected
to clients passively, and they can interact with the clients according to the configuration and the
issued command of the clients.

Three modes for dual-MMS Ethernet (abbreviated as dual-net) are provided as below.

Note!

Hereinafter, the normal operation status of net means the physical link and TCP link are
both ok. The abnormal operation status of net means physical link or TCP link is broken.

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10.4.3.1 Dual-net Full Duplex Mode Sharing the Same RCB Instance

Client Client

Net A Net B Net A Net B

Report Instance 1 Report Instance 1


RptEna = true RptEna = true

Report Control Block Report Control Block

IED (Server) IED (Server)


Normal operation status Abnormal operation status

TCP Link MMS Link

Figure 10.4-1 Dual-net full duplex mode sharing the RCB block instance

Net A and Net B share the same report control block (abbreviated as RCB) enabled by the client.
IED sends undifferentiated date through dual-net to the clients. If one net is physically
disconnected, the flag of RCB instance (i.e.: “RptEna” in above figure) is still “true”. Only when
both Net A and Net B are disconnected, the flag of the RCB instance will automatically change to
“false”.

In normal operation status of this mode, IED provides the same MMS service for Net A and Net B.
If one net is physically disconnected (i.e.: “Abnormal operation status” in above figure), the
working mode will switch to single-net mode seamlessly and immediately. Network communication
supervision is unnecessary here, and Buffered Report Control Block (abbreviated as BRCB) need
not to be used. On the other net, date alternation works normally. Therefore, MMS service can
interact normally without interruption. This mode ensures no data loss during one net is in
abnormal operation status.

In this mode, one report will be transmitted twice via dual nets for the same report instance, so the
client needs to distinguish whether two reports are same according to corresponding EntryIDs.

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10.4.3.2 Dual-net Hot-standby Mode Sharing the Same RCB Instance

Client Client

Net A Net B Net A Net B

Report Instance 1 Report Instance 1


RptEna = true RptEna = true

Report Control Block Report Control Block

IED (Server) IED (Server)


Normal operation status Abnormal operation status

TCP Link Main MMS Link Standby MMS Link

Figure 10.4-2 Dual-net hot-standby mode sharing the same RCB instance

In this mode, the MMS service is provided on main MMS link, no MMS service interacts on the
standby MMS link. The definitions of two links are as follows:

 Main MMS Link: Physically connected, TCP level connected, MMS report service available.

 Standby MMS Link: Physically connected, TCP level connected, MMS report service not
available.

If the main net fails to operate (i.e.: “Abnormal operation status” in the above figure), the IED will
set “RptEna” to “false”. Meanwhile the client will detect the failure by heartbeat message or
“keep-alive”, it will automatically enable the RCB instance by setting “RptEna” back to “true”
through standby MMS link. By the buffer function of BRCB, the IED can provide uninterrupted
MMS service on the standby net. However, the differences of BRCB standards among different
manufacturers may cause data loss. Moreover, if duration of net switch is too long, the data loss is
positively as the capacity of BRCB’s buffer function is limited.

Note!

The first mode and second mode, Net A IED host address and Net B IED host address
must be the same.

For example, if the subnet mask is “255.255.0.0”, network prefix of Net A is “198.120.0.0”,
network prefix of Net B is “198.121.0.0”, Net A IP address of the IED is “198.120.1.2”, and
then Net B IP address of the IED must be configured as “198.121.1.2”, i.e., Net A IED host
address =1x256+2=258, Net B IED host address =1x256+2=258, Net A IED host address
equals to Net B IED host address.

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10.4.3.3 Dual-net Full Duplex Mode with 2 Independent RCB Instances

Client Client

Net A Net B Net A Net B

Report Instance 1 Report Instance 2 Report Instance 1 Report Instance 2


RptEna = true RptEna = true RptEna = true RptEna = true

Report Control Block Report Control Block

IED (Server) IED (Server)


Normal operation status Abnormal operation status

TCP Link MMS Link

Figure 10.4-3 Dual-net full duplex mode with 2 independent RCB instances

In this mode, IED provides 2 report instances for each RCB, Net A and Net B work independently
from each other, failures of any net will not affect the other net at all. Tow report instances are
required for each client. Therefore, the IED may be unable to provide enough report instances if
there are too many clients.

Net A and Net B send the same report separately when they operates normally, To ensure no
repeated data is saved into database, massive calculation is required for the client.

Moreover, accurate clock synchronization of the IED is required to distinguish whether 2 reports
are the same report according to the timestamps. Clock synchronization error of the IED may lead
to report loss/redundancy.

As a conclusion, for the second mode, it’s difficult to realize seamless switchover between dual
nets, however, for the third mode, the IED may be unable to provide enough report instances if too
many clients are applied on site. Considering client treatment and IED implementation, the first
mode (Dual-net full duplex mode sharing the same report instance) is recommended for MMS
communication network deployment.

10.4.4 Server Data Organization


IEC61850 defines an object-oriented approach to data and services. An IEC61850 physical device
can contain one or more logical device(s) (for proxy). Each logical device can contain many logical
nodes. Each logical node can contain many data objects. Each data object is composed of data
attributes and data attribute components. Services are available at each level for performing
various functions, such as reading, writing, control commands, and reporting.

Each IED represents one IEC61850 physical device. The physical device contains one or more
logical device(s), and the logical device contains many logical nodes. The logical node LPHD
contains information about the IED physical device. The logical node LLN0 contains common

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information about the IED logical device.

10.4.4.1 Digital Status Values

The GGIO logical node is available in the PCS-900 series relays to provide access to digital status
points (including general I/O inputs and warnings) and associated timestamps and quality flags.
The data content must be configured before the data can be used. GGIO provides digital status
points for access by clients. It is intended that clients use GGIO in order to access digital status
values from the PCS-900 series relays. Clients can utilize the IEC61850 buffered reporting
features available from GGIO in order to build sequence of events (SOE) logs and HMI display
screens. Buffered reporting should generally be used for SOE logs since the buffering capability
reduces the chances of missing data state changes. All needed status data objects are transmitted
to HMI clients via buffered reporting, and the corresponding buffered reporting control block
(BRCB) is defined in LLN0.

10.4.4.2 Analog Values

Most of analog measured values are available through the MMXU logical nodes, and metering
values in MMTR, the else in MMXN, MSQI and so on. Each MMXU logical node provides data
from a IED current/voltage “source”. There is one MMXU available for each configurable source.
MMXU1 provides data from CT/VT source 1(usually for protection purpose), and MMXU2 provides
data from CT/VT source 2 (usually for monitor and display purpose). All these analog data objects
are transmitted to HMI clients via unbuffered reporting periodically, and the corresponding
unbuffered reporting control block (URCB) is defined in LLN0. MMXUx logical nodes provide the
following data for each source:

 MMXU.MX.Hz: frequency

 MMXU.MX.PPV.phsAB: phase AB voltage magnitude and angle

 MMXU.MX.PPV.phsBC: phase BC voltage magnitude and angle

 MMXU.MX.PPV.phsCA: Phase CA voltage magnitude and angle

 MMXU.MX.PhV.phsA: phase AG voltage magnitude and angle

 MMXU.MX.PhV.phsB: phase BG voltage magnitude and angle

 MMXU.MX.PhV.phsC: phase CG voltage magnitude and angle

 MMXU.MX.A.phsA: phase A current magnitude and angle

 MMXU.MX.A.phsB: phase B current magnitude and angle

 MMXU.MX.A.phsC: phase C current magnitude and angle

10.4.4.3 Protection Logical Nodes

The following list describes the protection elements for PCS-902 series relays. The specified relay
will contain a subset of protection elements from this list.

 PDIS: Phase-to-phase distance, phase-to-ground distance and SOTF distance

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 PTUC: Undercurrent

 PTOC: Phase overcurrent, zero-sequence overcurrent and overcurrent when VT circuit failure

 PTTR: Thermal overload

 PTUV: Undervoltage

 PTOV: Overvoltage and auxiliary overvoltage

 PTOF: Overfrequency

 PTUF: Underfrequency

 PPDP: Pole discrepancy

 PSCH: Protection scheme

 RBRF:Breaker failure

 RPSB: Power swing detection/blocking

 RREC: Automatic reclosing

 RSYN: Synchronism-check

 RFLO: Fault location

The protection elements listed above contain start (pickup) and operate flags, instead of any
element has its own start (pickup) flag separately, all the elements share a common start (pickup)
flags “PTRC.ST.Str.general”. The operate flag for PTOC1 is “PTOC1.ST.Op.general”. For
PCS-902 series relays protection elements, these flags take their values from related module for
the corresponding element. Similar to digital status values, the protection trip information is
reported via BRCB, and BRCB also locates in LLN0.

10.4.4.4 LLN0 and Other Logical Nodes

Logical node LLN0 is essential for an IEC61850 based IED. This LN shall be used to address
common issues for Logical Devices. Most of the public services, the common settings, control
values and some device oriented data objects are available here. The public services may be
BRCB, URCB and GSE control blocks and similar global defines for the whole device; the
common settings include all the setting items of communication settings, system settings and
some of the protection setting items, which can be configured to two or more protection elements
(logical nodes). In LLN0, the item Loc is a device control object, this Do item indicates the local
operation for complete logical device, when it is true, all the remote control commands to the IED
will be blocked and those commands make effective until the item Loc is changed to false. In
PCS-900 series relays, besides the logical nodes we describe above, there are some other logical
nodes below in the IEDs:

 MMXU: This LN shall be used to acquire values from CTs and VTs and calculate measurands
such as r.m.s. values for current and voltage or power flows out of the acquired voltage and
current samples. These values are normally used for operational purposes such as power
flow supervision and management, screen displays, state estimation, etc. The requested

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accuracy for these functions has to be provided.

 LPHD: Physical device information, the logical node to model common issues for physical
device.

 PTRC: Protection trip conditioning, it shall be used to connect the “operate” outputs of one or
more protection functions to a common “trip” to be transmitted to XCBR. In addition or
alternatively, any combination of “operate” outputs of protection functions may be combined to
a new “operate” of PTRC.

 RDRE: Disturbance recorder function. It triggers the fault wave recorder and its output refers
to the “IEEE Standard Format for Transient Data Exchange (COMTRADE) for Power System”
(IEC 60255-24). All enabled channels are included in the recording, independently of the
trigger mode.

10.4.5 Server Features and Configuration


10.4.5.1 Buffered/unbuffered Reporting

IEC61850 buffered and unbuffered reporting control blocks locate in LLN0, they can be configured
to transmit information of protection trip information (in the Protection logical nodes), binary status
values (in GGIO) and analog measured/calculated values (in MMXU, MMTR and MSQI). The
reporting control blocks can be configured in CID files, and then be sent to the IED via an
IEC61850 client. The following items can be configured.

 TrgOps: Trigger options.

The following bits are supported by the PCS-900 series relays:

- Bit 1: Data-change

- Bit 4: Integrity

- Bit 5: General interrogation

 OptFlds: Option Fields.

The following bits are supported by the PCS-900 series relays:

- Bit 1: Sequence-number

- Bit 2: Report-time-stamp

- Bit 3: Reason-for-inclusion

- Bit 4: Data-set-name

- Bit 5: Data-reference

- Bit 7: EntryID (for buffered reports only)

- Bit 8: Conf-revision

- Bit 9: Segmentation

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 IntgPd: Integrity period.

10.4.5.2 File Transfer

MMS file services are supported to allow transfer of oscillography, event record or other files from
a PCS-900 series relay.

10.4.5.3 Timestamps

The Universal Time Coordinated(UTC for short) timestamp associated with all IEC61850 data
items represents the latest change time of either the value or quality flags of the data item.

10.4.5.4 Logical Node Name Prefixes

IEC61850 specifies that each logical node can have a name with a total length of 11 characters.
The name is composed of:

 A five or six-character name prefix.

 A four-character standard name (for example, MMXU, GGIO, PIOC, etc.).

 A one or two-character instantiation index.

Complete names are of the form xxxxxxPTOC1, where the xxxxxx character string is configurable.
Details regarding the logical node naming rules are given in IEC61850 parts 6 and 7-2. It is
recommended that a consistent naming convention be used for an entire substation project.

10.4.5.5 GOOSE Services

IEC61850 specifies the type of broadcast data transfer services: Generic Object Oriented
Substation Events (GOOSE). IEC61850 GOOSE services provide virtual LAN (VLAN) support,
Ethernet priority tagging, and Ether-type Application ID configuration. The support for VLANs and
priority tagging allows for the optimization of Ethernet network traffic. GOOSE messages can be
given a higher priority than standard Ethernet traffic, and they can be separated onto specific
VLANs. Devices that transmit GOOSE messages also function as servers. Each GOOSE
publisher contains a “GOOSE control block” to configure and control the transmission.

The GOOSE transmission (including subscribing and publishing) is controlled by GOOSE logic link
settings in device.

The PCS-900 series relays support IEC61850 Generic Object Oriented Substation Event (GOOSE)
communication. All GOOSE messages contain IEC61850 data collected into a dataset. It is this
dataset that is transferred using GOOSE message services. The GOOSE related dataset is
configured in the CID file and it is recommended that the fixed GOOSE be used for
implementations that require GOOSE data transfer between PCS-900 series relays.

IEC61850 GOOSE messaging contains a number of configurable parameters, all of which must be
correct to achieve the successful transfer of data. It is critical that the configured datasets at the
transmission and reception devices are an exact match in terms of data structure, and that the
GOOSE addresses and name strings match exactly.

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10.4.6 ACSI Conformance


10.4.6.1 ACSI Basic Conformance Statement

Services Client Server PCS-900 Series


Client-Server Roles
B11 Server side (of Two-party Application-Association) - C1 Y
B12 Client side (of Two-party Application-Association) C1 - N
SCSMS Supported
B21 SCSM: IEC 61850-8-1 used Y Y Y
B22 SCSM: IEC 61850-9-1 used N N N
B23 SCSM: IEC 61850-9-2 used Y N Y
B24 SCSM: other N N N
Generic Substation Event Model (GSE)
B31 Publisher side - O Y
B32 Subscriber side O - Y
Transmission Of Sampled Value Model (SVC)
B41 Publisher side - O N
B42 Subscriber side O - N

Where:

C1: Shall be "M" if support for LOGICAL-DEVICE model has been declared

O: Optional

M: Mandatory

Y: Supported by PCS-900 series relays

N: Currently not supported by PCS-900 series relays

10.4.6.2 ACSI Models Conformance Statement

Services Client Server PCS-900 Series


M1 Logical device C2 C2 Y
M2 Logical node C3 C3 Y
M3 Data C4 C4 Y
M4 Data set C5 C5 Y
M5 Substitution O O Y
M6 Setting group control O O Y
Reporting
M7 Buffered report control O O Y
M7-1 sequence-number Y Y Y
M7-2 report-time-stamp Y Y Y
M7-3 reason-for-inclusion Y Y Y
M7-4 data-set-name Y Y Y
M7-5 data-reference Y Y Y

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M7-6 buffer-overflow Y Y N
M7-7 entryID Y Y Y
M7-8 BufTm N N N
M7-9 IntgPd Y Y Y
M7-10 GI Y Y Y
M8 Unbuffered report control M M Y
M8-1 sequence-number Y Y Y
M8-2 report-time-stamp Y Y Y
M8-3 reason-for-inclusion Y Y Y
M8-4 data-set-name Y Y Y
M8-5 data-reference Y Y Y
M8-6 BufTm N N N
M8-7 IntgPd N Y Y
Logging
M9 Log control O O N
M9-1 IntgPd N N N
M10 Log O O N
GSE
M12 GOOSE O O Y
M13 GSSE O O N
M14 Multicast SVC O O N
M15 Unicast SVC O O N
M16 Time M M Y
M17 File transfer O O Y

Where:

C2: Shall be "M" if support for LOGICAL-NODE model has been declared

C3: Shall be "M" if support for DATA model has been declared

C4: Shall be "M" if support for DATA-SET, Substitution, Report, Log Control, or Time models has
been declared

C5: Shall be "M" if support for Report, GSE, or SMV models has been declared

M: Mandatory

Y: Supported by PCS-900 series relays

N: Currently not supported by PCS-900 series relays

10.4.6.3 ACSI Services Conformance Statement

Services Server/Publisher PCS-902


Server
S1 ServerDirectory M Y
Application association

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S2 Associate M Y
S3 Abort M Y
S4 Release M Y
Logical device
S5 LogicalDeviceDirectory M Y
Logical node
S6 LogicalNodeDirectory M Y
S7 GetAllDataValues M Y
Data
S8 GetDataValues M Y
S9 SetDataValues M Y
S10 GetDataDirectory M Y
S11 GetDataDefinition M Y
Data set
S12 GetDataSetValues M Y
S13 SetDataSetValues O Y
S14 CreateDataSet O N
S15 DeleteDataSet O N
S16 GetDataSetDirectory M Y
Substitution
S17 SetDataValues M Y
Setting group control
S18 SelectActiveSG M/O Y
S19 SelectEditSG M/O Y
S20 SetSGValuess M/O Y
S21 ConfirmEditSGValues M/O Y
S22 GetSGValues M/O Y
S23 GetSGCBValues M/O Y
Reporting
Buffered report control block
S24 Report M Y
S24-1 data-change M Y
S24-2 qchg-change M N
S24-3 data-update M N
S25 GetBRCBValues M Y
S26 SetBRCBValues M Y
Unbuffered report control block
S27 Report M Y
S27-1 data-change M Y
S27-2 qchg-change M N
S27-3 data-update M N
S28 GetURCBValues M Y

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S29 SetURCBValues M Y
Logging
Log control block
S30 GetLCBValues O N
S31 SetLCBValues O N
Log
S32 QueryLogByTime O N
S33 QueryLogAfter O N
S34 GetLogStatusValues O N
Generic substation event model (GSE)
GOOSE control block
S35 SendGOOSEMessage M Y
S36 GetGoReference O Y
S37 GetGOOSEElementNumber O N
S38 GetGoCBValues M Y
S39 SetGoCBValuess M N
Control
S51 Select O N
S52 SelectWithValue M Y
S53 Cancel M Y
S54 Operate M Y
S55 Command-Termination O Y
S56 TimeActivated-Operate O N
File transfer
S57 GetFile M/O Y
S58 SetFile O N
S59 DeleteFile O N
S60 GetFileAttributeValues M/O Y
Time
SNTP M Y

10.4.7 Logical Nodes


10.4.7.1 Logical Nodes Table

The PCS-902 series relays support IEC61850 logical nodes as indicated in the following table.
Note that the actual instantiation of each logical node is determined by the product order code.

Nodes PCS-902 Series


L: System Logical Nodes
LPHD: Physical device information YES
LLN0: Logical node zero YES
P: Logical Nodes For Protection Functions
PDIF: Differential -

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PDIR: Direction comparison -


PDIS: Distance YES
PDOP: Directional overpower -
PDUP: Directional underpower -
PFRC: Rate of change of frequency -
PHAR: Harmonic restraint -
PHIZ: Ground detector -
PIOC: Instantaneous overcurrent -
PMRI: Motor restart inhibition -
PMSS: Motor starting time supervision -
POPF: Over power factor -
PPAM: Phase angle measuring -
PSCH: Protection scheme YES
PSDE: Sensitive directional earth fault -
PTEF: Transient earth fault -
PTOC: Time overcurrent YES
PTOF: Overfrequency YES
PTOV: Overvoltage YES
PTRC: Protection trip conditioning YES
PTTR: Thermal overload YES
PTUC: Undercurrent -
PPDP: Pole discrepancy YES
PTUV: Undervoltage YES
PUPF: Underpower factor -
PTUF: Underfrequency YES
PVOC: Voltage controlled time overcurrent -
PVPH: Volts per Hz -
PZSU: Zero speed or underspeed -
R: Logical Nodes For Protection Related Functions
RDRE: Disturbance recorder function YES
RADR: Disturbance recorder channel analogue -
RBDR: Disturbance recorder channel binary -
RDRS: Disturbance record handling -
RBRF: Breaker failure YES
RDIR: Directional element -
RFLO: Fault locator YES
RPSB: Power swing detection/blocking YES
RREC: Autoreclosing YES
RSYN: Synchronism-check or synchronizing YES
C: Logical Nodes For Control
CALH: Alarm handling -
CCGR: Cooling group control -

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CILO: Interlocking -
CPOW: Point-on-wave switching -
CSWI: Switch controller -
G: Logical Nodes For Generic References
GAPC: Generic automatic process control YES
GGIO: Generic process I/O YES
GSAL: Generic security application -
I: Logical Nodes For Interfacing And Archiving
IARC: Archiving -
IHMI: Human machine interface -
ITCI: Telecontrol interface -
ITMI: Telemonitoring interface -
A: Logical Nodes For Automatic Control
ANCR: Neutral current regulator -
ARCO: Reactive power control -
ATCC: Automatic tap changer controller -
AVCO: Voltage control -
M: Logical Nodes For Metering And Measurement
MDIF: Differential measurements -
MHAI: Harmonics or interharmonics -
MHAN: Non phase related harmonics or interharmonic -
MMTR: Metering -
MMXN: Non phase related measurement -
MMXU: Measurement YES
MSQI: Sequence and imbalance -
MSTA: Metering statistics -
S: Logical Nodes For Sensors And Monitoring
SARC: Monitoring and diagnostics for arcs -
SIMG: Insulation medium supervision (gas) -
SIML: Insulation medium supervision (liquid) -
SPDC: Monitoring and diagnostics for partial discharges -
X: Logical Nodes For Switchgear
TCTR: Current transformer YES
TVTR: Voltage transformer YES
Y: Logical Nodes For Power Transformers
YEFN: Earth fault neutralizer (Peterson coil) -
YLTC: Tap changer -
YPSH: Power shunt -
YPTR: Power transformer -
Z: Logical Nodes For Further Power System Equipment
ZAXN: Auxiliary network -
ZBAT: Battery -

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ZBSH: Bushing -
ZCAB: Power cable -
ZCAP: Capacitor bank -
ZCON: Converter -
ZGEN: Generator -
ZGIL: Gas insulated line -
ZLIN: Power overhead line -
ZMOT: Motor -
ZREA: Reactor -
ZRRC: Rotating reactive component -
ZSAR: Surge arrestor -
ZTCF: Thyristor controlled frequency converter -
ZTRC: Thyristor controlled reactive component -

10.5 DNP3.0 Interface

10.5.1 Overview
The descriptions given here are intended to accompany this relay. The DNP3.0 protocol is not
described here; please refer to the DNP3.0 protocol standard for the details about the DNP3.0
implementation. This manual only specifies which objects, variations and qualifiers are supported
in this relay, and also specifies what data is available from this relay via DNP3.0.

The relay operates as a DNP3.0 slave and supports subset level 2 of the protocol, plus some of
the features from level 3. The DNP3.0 communication uses the Ethernet ports at the rear side of
this relay. The Ethernet ports are optional: electrical or optical.

10.5.2 Link Layer Functions


Please see the DNP3.0 protocol standard for the details about the linker layer functions.

10.5.3 Transport Functions


Please see the DNP3.0 protocol standard for the details about the transport functions.

10.5.4 Application Layer Functions


10.5.4.1 Time Synchronization

1. Time delay measurement

Master/Slave Function Code Object Variation Qualifier


Master 0x17 - - -
Slave 0x81 0x34 0x02 0x07

2. Read time of device

Master/Slave Function Code Object Variation Qualifier


Master 0x01 0x34 0x00, 0x01 0x07-

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Slave 0x81 0x32 0x01 0x07

3. Write time of device

Master/Slave Function Code Object Variation Qualifier


Master 0x02 0x32 0x01 0x00, 0x01, 0x07, 0x08
Slave 0x81 - - -

10.5.4.2 Supported Writing Functions

1. Write time of device

See Section 10.5.4.1 for the details.

2. Reset the CU (Reset IIN bit7)

Master/Slave Function Code Object Variation Qualifier


Master 0x02 0x50 0x01 0x00, 0x01
Slave 0x81 - - -

10.5.4.3 Supported Reading Functions

1. Supported qualifiers

Master Qualifier 0x00 0x01 0x06 0x07 0x08


Slave Qualifier 0x00 0x01 0x01 0x07 0x08

2. Supported objects and variations

 Object 1, Binary inputs

Master Variation 0x00 0x01 0x02


Slave Variation 0x02 0x01 0x02

The protection operation signals, alarm signals and binary input state change signals are
transported respectively according to the variation sequence in above table.

 Object 2, SOE

Master Variation 0x00 0x01 0x02 0x03


Slave Variation 0x02 0x01 0x02 0x03

If the master qualifier is “0x07”, the slave responsive qualifier is “0x27”; and if the master
qualifier is “0x01”, “0x06” or “0x08”, the slave responsive qualifier is “0x28”.

 Object 30, Analog inputs

Master Variation 0x00 0x01 0x02 0x03 0x04


Slave Variation 0x01 0x01 0x02 0x03 0x04

The measurement values are transported firstly, and then the measurement values are
transported.

 Object 40, Analog outputs

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Master Variation 0x00 0x01 0x02


Slave Variation 0x01 0x01 0x02

The protection settings are transported in this object.

 Object 50, Time Synchronization

See Section 10.5.4.1 for the details.

3. Class 0 data request

The master adopts the “Object 60” for the Class 0 data request and the variation is “0x01”.

The slave responds with the above mentioned “Object 1”, “Object 30” and “Object 40” (see
“Supported objects and variations” in Section 10.5.4.3).

4. Class 1 data request

The master adopts the “Object 60” for the Class 1 data request and the variation is “0x02”.

The slave responds with the above mentioned “Object 2” (see “Supported objects and
variations” in Section 10.5.4.3).

5. Multiple object request

The master adopts the “Object 60” for the multiple object request and the variation is “0x01”,
“0x02”, “0x03” and “0x04”.

The slave responds with the above mentioned “Object 1”, “Object 2”, “Object 30” and “Object
40” (see “Supported objects and variations” in Section 10.5.4.3).

10.5.4.4 Remote Control Functions

The function code 0x03 and 0x04 are supported in this relay. The function code 0x03 is for the
remote control with selection; and the function code 0x04 is for the remote control with execution.

The selection operation must be executed before the execution operation, and the single point
control object can be supported to this relay.

Master Qualifier 0x17 0x27 0x18 0x28


Slave Qualifier 0x17 0x27 0x18 0x28

The “Object 12” is for the remote control functions.

Master Variation 0x01 0x01: closing


Control Code
Slave Variation 0x01 0x10: tripping

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11 Installation

Table of Contents
11 Installation ...................................................................................... 11-a
11.1 Overview ....................................................................................................... 11-1
11.2 Safety Information ........................................................................................ 11-1
11.3 Checking Shipment ...................................................................................... 11-2
11.4 Material and Tools Required ........................................................................ 11-2
11.5 Device Location and Ambient Conditions .................................................. 11-2
11.6 Mechanical Installation ................................................................................ 11-3
11.7 Electrical Installation and Wiring ................................................................ 11-4
11.7.1 Grounding Guidelines .......................................................................................................11-4

11.7.2 Cubicle Grounding ............................................................................................................11-4

11.7.3 Ground Connection on the Device ...................................................................................11-5

11.7.4 Grounding Strips and their Installation ..............................................................................11-6

11.7.5 Guidelines for Wiring.........................................................................................................11-6

11.7.6 Wiring for Electrical Cables ...............................................................................................11-7

List of Figures
Figure 11.6-1 Dimensions and panel cut-out of PCS-902 ..................................................... 11-3

Figure 11.6-2 Demonstration of plugging a board into its corresponding slot .................. 11-4

Figure 11.7-1 Cubicle grounding system ................................................................................ 11-5

Figure 11.7-2 Ground terminal of this relay ............................................................................ 11-6

Figure 11.7-3 Ground strip and termination ........................................................................... 11-6

Figure 11.7-4 Glancing demo about the wiring for electrical cables ................................... 11-7

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11.1 Overview
The device must be shipped, stored and installed with the greatest care. Choose the place of
installation such that the communication interface and the controls on the front of the device are
easily accessible.

Air must circulate freely around the equipment. Observe all the requirements regarding place of
installation and ambient conditions given in this instruction manual.

Take care that the external wiring is properly brought into the equipment and terminated correctly
and pay special attention to grounding. Strictly observe the corresponding guidelines contained in
this section.

11.2 Safety Information


Modules and units may only be replaced by correspondingly trained personnel. Always observe
the basic precautions to avoid damage due to electrostatic discharge when handling the
equipment.

In certain cases, the settings have to be configured according to the demands of the engineering
configuration after replacement. It is therefore assumed that the personnel who replace modules
and units are familiar with the use of the operator program on the service PC.

DANGER!

Only insert or withdraw the PWR module while the power supply is switched off. To this end,
disconnect the power supply cable that connects with the PWR module.

WARNING!

Only insert or withdraw other modules while the power supply is switched off.

WARNING!

The modules may only be inserted in the slots designated in Section 6.2. Components can
be damaged or destroyed by inserting boards in the wrong slots.

DANGER!

Improper handling of the equipment can cause damage or an incorrect response of the
equipment itself or the primary plant.

WARNING!

Industry packs and ribbon cables may only be replaced or the positions of jumpers be
changed on a workbench appropriately designed for working on electronic equipment. The

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modules, bus backplanes are sensitive to electrostatic discharge when not in the unit's
housing.

The basic precautions to guard against electrostatic discharge are as follows:

1. Should boards have to be removed from this relay installed in a grounded cubicle in an HV
switchgear installation, please discharge yourself by touching station ground (the cubicle)
beforehand.

2. Only hold electronic boards at the edges, taking care not to touch the components.

3. Only works on boards that have been removed from the cubicle on a workbench designed for
electronic equipment and wear a grounded wristband. Do not wear a grounded wristband,
however, while inserting or withdrawing units.

4. Always store and ship the electronic boards in their original packing. Place electronic parts in
electrostatic screened packing materials.

11.3 Checking Shipment


Check that the consignment is complete immediately upon receipt. Notify the nearest NR
Company or agent, should departures from the delivery note, the shipping papers or the order be
found.

Visually inspect all the material when unpacking it. When there is evidence of transport damage,
lodge a claim immediately in writing with the last carrier and notify the nearest NR Company or
agent.

If the equipment is not going to be installed immediately, store all the parts in their original packing
in a clean dry place at a moderate temperature. The humidity at a maximum temperature and the
permissible storage temperature range in dry air are listed in Chapter “Technical Data”.

11.4 Material and Tools Required


The necessary mounting kits will be provided, including screws, pincers and assembly
instructions.

A suitable drill and spanners are required to secure the cubicles to the floor using the plugs
provided (if this relay is mounted in cubicles).

11.5 Device Location and Ambient Conditions


The place of installation should permit easy access especially to front of the device, i.e. to the
human machine interface of the equipment.

There should also be free access at the rear of the equipment for additions and replacement of
electronic boards.

Since every piece of technical equipment can be damaged or destroyed by inadmissible ambient
conditions, such as:

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1. The location should not be exposed to excessive air pollution (dust, aggressive substances).

2. Severe vibration, extreme changes of temperature, high levels of humidity, surge voltages of
high amplitude and short rise time and strong induced magnetic fields should be avoided as
far as possible.

3. Air must not be allowed to circulate freely around the equipment.

The equipment can in principle be mounted in any attitude, but it is normally mounted vertically
(visibility of markings).

WARNING!

Excessively high temperature can appreciably reduce the operating life of this relay.

11.6 Mechanical Installation


The device adopts IEC standard chassis and is rack with modular structure. It uses an integral
faceplate and plug terminal block on backboard for external connections. PCS-902 series is IEC
4U high, and Figure 11.6-1 shows its dimensions and panel cut-out.

Front Side

Cut-Out

Figure 11.6-1 Dimensions and panel cut-out of PCS-902

Note!

It is necessary to leave enough space top and bottom of the cut-out in the cubicle for heat
emission of this relay.

The safety instructions must be abided by when installing the boards, please see Section 11.2 for
the details.

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Following figure shows the installation way of a module being plugged into a corresponding slot.

Figure 11.6-2 Demonstration of plugging a board into its corresponding slot

In the case of equipment supplied in cubicles, place the cubicles on the foundations that have
been prepared. Take care while doing so not to jam or otherwise damage any of the cables that
have already been installed. Secure the cubicles to the foundations.

11.7 Electrical Installation and Wiring


11.7.1 Grounding Guidelines
Switching operations in HV installations generate transient over voltages on control signal cables.
There is also a background of electromagnetic RF fields in electrical installations that can induce
spurious currents in the devices themselves or the leads connected to them.

All these influences can influence the operation of electronic apparatus.

On the other hand, electronic apparatus can transmit interference that can disrupt the operation of
other apparatus.

In order to minimize these influences as far as possible, certain standards have to be observed
with respect to grounding, wiring and screening.

Note!

All these precautions can only be effective if the station ground is of good quality.

11.7.2 Cubicle Grounding


The cubicle must be designed and fitted out such that the impedance for RF interference of the
ground path from the electronic device to the cubicle ground terminal is as low as possible.

Metal accessories such as side plates, blanking plates etc., must be effectively connected
surface-to-surface to the grounded frame to ensure a low-impedance path to ground for RF
interference. The contact surfaces must not only conduct well, they must also be non-corroding.

Note!

If the above conditions are not fulfilled, there is a possibility of the cubicle or parts of it

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forming a resonant circuit at certain frequencies that would amplify the transmission of
interference by the devices installed and also reduce their immunity to induced interference.

Movable parts of the cubicle such as doors (front and back) or hinged equipment frames must be
effectively grounded to the frame by three braided copper strips (see Figure 11.7-1).

The metal parts of the cubicle housing and the ground rail are interconnected electrically
conducting and corrosion proof. The contact surfaces shall be as large as possible.

Note!

For metallic connections please observe the voltage difference of both materials according
to the electrochemical code.

The cubicle ground rail must be effectively connected to the station ground rail by a grounding strip
(braided copper).

Door or hinged
equipment frame

Cubicle ground
rail close to floor

Braided
copper strip
Station
ground

Conducting
connection

Figure 11.7-1 Cubicle grounding system

11.7.3 Ground Connection on the Device


There is a ground terminal on the rear panel, and the ground braided copper strip can be
connected with it. Take care that the grounding strip is always as short as possible. The main thing
is that the device is only grounded at one point. Grounding loops from unit to unit are not allowed.

There are some ground terminals on some connectors of this relay, and the sign is “GND”. All the
ground terminals are connected in the cabinet of this relay. So, the ground terminal on the rear
panel (see Figure 11.7-2) is the only ground terminal of this device.

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Figure 11.7-2 Ground terminal of this relay

11.7.4 Grounding Strips and their Installation


High frequency currents are produced by interference in the ground connections and because of
skin effect at these frequencies, only the surface region of the grounding strips is of consequence.

The grounding strips must therefore be of (preferably tinned) braided copper and not round copper
conductors, as the cross-section of round copper would have to be too large.

Proper terminations must be fitted to both ends (press/pinch fit and tinned) with a hole for bolting
them firmly to the items to be connected.

The surfaces to which the grounding strips are bolted must be electrically conducting and
non-corroding.

The following figure shows the ground strip and termination.

Press/pinch fit
cable terminal

Braided
copper strip Terminal bolt

Contact surface

Figure 11.7-3 Ground strip and termination

11.7.5 Guidelines for Wiring


There are several types of cables that are used in the connection of this relay: braided copper
cable, serial communication cable etc. Recommendation of each cable:

 Grounding: braided copper cable, 2.5mm2 ~ 6.0mm 2

 Power supply, binary inputs & outputs: brained copper cable, 1.0mm 2 ~ 2.5mm 2

 AC voltage inputs: brained copper cable, 1.0mm 2 ~ 2.5mm 2

 AC current inputs: brained copper cable, 1.5mm2 ~ 4.0mm 2

 Serial communication: 4-core shielded braided cable

 Ethernet communication: 4-pair screened twisted category 5E cable

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11.7.6 Wiring for Electrical Cables


A female connector is used for connecting the wires with it, and then a female connector plugs into
a corresponding male connector that is in the front of one board. See Chapter “Hardware” for
further details about the pin defines of these connectors.

The following figure shows the glancing demo about the wiring for the electrical cables.

01 02

03 04

Tighten 05 06

07 08

09 10

11 12
01

13 14

15 16

17 18

19 20

21 22

23 24

Figure 11.7-4 Glancing demo about the wiring for electrical cables

DANGER!

Never allow the current transformer (CT) secondary circuit connected to this equipment to
be opened while the primary system is live. Opening the CT circuit will produce a
dangerously high voltage.

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12 Commissioning

Table of Contents
12 Commissioning ............................................................................. 12-a
12.1 Overview ...................................................................................................... 12-1
12.2 Safety Instructions ...................................................................................... 12-1
12.3 Commission Tools ...................................................................................... 12-2
12.3.1 Minimum Equipment Required ........................................................................................ 12-2

12.3.2 Optional Equipment ......................................................................................................... 12-2

12.4 Setting Familiarization ................................................................................ 12-2


12.5 Product Checks ........................................................................................... 12-3
12.5.1 With the Relay De-energized........................................................................................... 12-3

12.5.2 With the Relay Energized ................................................................................................ 12-5

12.5.3 Print Fault Report............................................................................................................. 12-8

12.5.4 On-load Checks ............................................................................................................... 12-9

12.6 Final Checks ................................................................................................ 12-9

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12.1 Overview
This device is fully numerical in their design, implementing all protection and non-protection
functions in software. The relay employs a high degree of self-checking and in the unlikely event of
a failure, will give an alarm. As a result of this, the commissioning test does not need to be as
extensive as with non-numeric electronic or electro-mechanical relays.

To commission numerical relays, it is only necessary to verify that the hardware is functioning
correctly and the application-specific software settings have been applied to the relay.

Blank commissioning test and setting records are provided at the end of this manual for
completion as required.

Before carrying out any work on the equipment, the user should be familiar with the contents of the
safety and technical data sections and the ratings on the equipment’s rating label.

12.2 Safety Instructions

WARNING!

Hazardous voltages are present in this electrical equipment during operation.


Non-observance of the safety rules can result in severe personal injury or property damage.

WARNING!

Only the qualified personnel shall work on and around this equipment after becoming
thoroughly familiar with all warnings and safety notices of this manual as well as with the
applicable safety regulations.

Particular attention must be drawn to the following:

1. The earthing screw of the device must be connected solidly to the protective earth conductor
before any other electrical connection is made.

2. Hazardous voltages can be present on all circuits and components connected to the supply
voltage or to the measuring and test quantities.

3. Hazardous voltages can be present in the device even after disconnection of the supply
voltage (storage capacitors!)

4. The limit values stated in the Chapter “Technical Data” must not be exceeded at all, not even
during testing and commissioning.

5. When testing the device with secondary test equipment, make sure that no other
measurement quantities are connected. Take also into consideration that the trip circuits and
maybe also close commands to the circuit breakers and other primary switches are
disconnected from the device unless expressly stated.

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DANGER!

Current transformer secondary circuits must have been short-circuited before the current
leads to the device are disconnected.

WARNING!

Primary test may only be carried out by qualified personnel, who are familiar with the
commissioning of protection system, the operation of the plant and safety rules and
regulations (switching, earthing, etc.).

12.3 Commission Tools

12.3.1 Minimum Equipment Required


1. Multifunctional dynamic current and voltage injection test set with interval timer.

2. Multimeter with suitable AC current range and AC/DC voltage ranges of 0~440Vac and
0~250Vdc respectively.

3. Continuity tester (if not included in the multimeter).

4. Phase angle meter.

5. Phase rotation meter.

Note!

Modern test set may contain many of the above features in one unit.

12.3.2 Optional Equipment


1. An electronic or brushless insulation tester with a DC output not exceeding 500V (for
insulation resistance test when required).

2. A portable PC, with appropriate software (this enables the rear communications port to be
tested, if this is to be used, and will also save considerable time during commissioning).

3. EIA RS-485 to EIA RS-232 converter (if EIA RS-485 IEC60870-5-103 port is being tested).

4. PCS-900 serials dedicated protection tester HELP-9000.

12.4 Setting Familiarization


When commissioning this device for the first time, sufficient time should be allowed to become
familiar with the method by which the settings are applied. A detailed description of the menu
structure of this relay is contained in Chapter “Operation Theory” and Chapter “Settings”.

With the front cover in place all keys are accessible. All menu cells can be read. The LED
indicators and alarms can be reset. Protection or configuration settings can be changed, or fault

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and event records cleared. However, menu cells will require the appropriate password to be
entered before changes can be made.

Alternatively, if a portable PC is available together with suitable setting software (such as


PCS-9700 HMI software), the menu can be viewed one page at a time to display a full column of
data and text. This PC software also allows settings to be entered more easily, saved to a file on
disk for future reference or printed to produce a setting record. Refer to the PC software user
manual for details. If the software is being used for the first time, allow sufficient time to become
familiar with its operation.

12.5 Product Checks

These product checks cover all aspects of the relay which should be checked to ensure that it has
not been physically damaged prior to commissioning, is functioning correctly and all input quantity
measurements are within the stated tolerances.

If the application-specific settings have been applied to the relay prior to commissioning, it is
advisable to make a copy of the settings so as to allow them restoration later. This could be done
by extracting the settings from the relay itself via printer or manually creating a setting record.

12.5.1 With the Relay De-energized

This relay is fully numerical and the hardware is continuously monitored. Commissioning tests can
be kept to a minimum and need only include hardware tests and conjunctive tests. The function
tests are carried out according to user’s correlative regulations.

The following tests are necessary to ensure the normal operation of the equipment before it is first
put into service.

1. Hardware tests

These tests are performed for the following hardware to ensure that there is no hardware defect.
Defects of hardware circuits other than the following can be detected by self-monitoring when the
DC power is supplied.

2. User interfaces test

3. Binary input circuits and output circuits test

4. AC input circuits test

5. Function tests

These tests are performed for the following functions that are fully software-based. Tests of the
protection schemes and fault locator require a dynamic test set.

6. Measuring elements test

7. Timers test

8. Measurement and recording test

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9. Conjunctive tests

The tests are performed after the relay is connected with the primary equipment and other external
equipment.

10. On load test

11. Phase sequence check and polarity check

12.5.1.1 Visual Inspection

After unpacking the product, check for any damage to the relay case. If there is any damage, the
internal module might also have been affected, contact the vendor. The following items listed is
necessary.

1. Protection panel

Carefully examine the protection panel, protection equipment inside and other parts inside to see
that no physical damage has occurred since installation.

The rated information of other auxiliary protections should be checked to ensure it is correct for the
particular installation.

2. Panel wiring

Check the conducting wire which is used in the panel to assure that their cross section meeting the
requirement.

Carefully examine the wiring to see that they are no connection failure exists.

3. Label

Check all the isolator binary inputs, terminal blocks, indicators, switches and push buttons to make
sure that their labels meet the requirements of this project.

4. Device plug-in modules

Check each plug-in module of the device on the panel to make sure that they are well installed into
the equipment without any screw loosened.

5. Earthing cable

Check whether the earthing cable from the panel terminal block is safely screwed to the panel
steel sheet.

6. Switch, keypad, isolator binary inputs and push button

Check whether all the switches, equipment keypad, isolator binary inputs and push buttons work
normally and smoothly.

12.5.1.2 Insulation Test

Insulation resistance tests are only necessary during commissioning if it is required for them to be
done and they have not been performed during installation.

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12 Commissioning

Isolate all wiring from the earth and test the isolation with an electronic or brushless insulation
tester at a DC voltage not exceeding 500V, The circuits need to be tested should include:

 Voltage transformer circuits

 Current transformer circuits

 DC power supply

 Optic-isolated control inputs

 Output contacts

 Communication ports

The insulation resistance should be greater than 100MΩ at 500V.

Test method:

To unplug all the terminals sockets of this relay, and do the Insulation resistance test for each
circuit above with an electronic or brushless insulation tester.

On completion of the insulation resistance tests, ensure all external wiring is correctly reconnected
to the protection.

12.5.1.3 External Wiring

Check that the external wiring is correct to the relevant relay diagram and scheme diagram.
Ensure as far as practical that phasing/phase rotation appears to be as expected.

Check the wiring against the schematic diagram for the installation to ensure compliance with the
customer’s normal practice.

12.5.1.4 Auxiliary Power Supply

The relay only can be operated under the auxiliary power supply depending on the relay’s nominal
power supply rating.

The incoming voltage must be within the operating range specified in Chapter “Technical Data”,
before energizing the relay, measure the auxiliary supply to ensure it within the operating range.

Other requirements to the auxiliary power supply are specified in Chapter “Technical Data”. See
this section for further details about the parameters of the power supply.

WARNING!

Energize this relay only if the power supply is within the specified operating ranges in
Chapter “Technical Data”.

12.5.2 With the Relay Energized


The following groups of checks verify that the relay hardware and software is functioning correctly
and should be carried out with the auxiliary supply applied to the relay.

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12 Commissioning

The current and voltage transformer connections must remain isolated from the relay for these
checks. The trip circuit should also remain isolated to prevent accidental operation of the
associated circuit breaker.

12.5.2.1 Front Panel LCD Display

Connect the relay to DC power supply correctly and turn the relay on. Check program version and
forming time displayed in command menu to ensure that are corresponding to what ordered.

12.5.2.2 Date and Time

If the time and date is not being maintained by substation automation system, the date and time
should be set manually.

Set the date and time to the correct local time and date using menu item “Clock”.

In the event of the auxiliary supply failing, with a super capacitor fitted on MON board, the time and
date will be maintained. Therefore when the auxiliary supply is restored the time and date will be
correct and not need to set again.

To test this, remove the auxiliary supply from the relay for approximately 30s. After being
re-energized, the time and date should be correct.

12.5.2.3 Light Emitting Diodes (LEDs)

On power up, the green LED “HEALTHY” should have illuminated and stayed on indicating that
the relay is healthy.

The relay has latched signal relays which remember the state of the trip, auto-reclose when the
relay was last energized from an auxiliary supply. Therefore these indicators may also illuminate
when the auxiliary supply is applied. If any of these LEDs are on then they should be reset before
proceeding with further testing. If the LED successfully reset, the LED goes out. There is no testing
required for that that LED because it is known to be operational.

It is likely that alarms related to voltage transformer supervision will not reset at this stage.

12.5.2.4 Testing HEALTHY and ALARM LEDs

Apply the rated DC power supply and check that the “HEALTHY” LED is lighting in green. We
need to emphasize that the “HEALTHY” LED is always lighting in operation course except that the
equipment find serious errors in it.

Produce one of the abnormal conditions listed in Chapter “Supervision”, the “ALARM” LED will
light in yellow. When abnormal condition reset, the “ALARM” LED extinguishes.

12.5.2.5 Testing AC Current Inputs

This test verified that the accuracy of current measurement is within the acceptable tolerances.

Apply rated current to each current transformer input in turn; checking its magnitude using a
multimeter/test set readout. The corresponding reading can then be checked in the relays menu.

The measurement accuracy of the protection is 2.5% or 0.02In. However, an additional allowance

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12 Commissioning

must be made for the accuracy of the test equipment being used.

Note!

The closing circuit should remain isolated during these checks to prevent accidental
operation of the associated circuit breaker.

Group No. Item Input Value Input Angle Display Value Display Angle

Ia

Three-phase current 1 Ib

Ic

Ia

Three-phase current 2 Ib

Ic

Ia

Three-phase current 3 Ib

Ic

Ia

Three-phase current …… Ib

Ic

Residual current 1 3I0

Residual current 2 3I0

Residual current 3 3I0

Residual current …… 3I0

12.5.2.6 Testing AC Voltage Inputs

This test verified that the accuracy of voltage measurement is within the acceptable tolerances.

Apply rated voltage to each voltage transformer input in turn; checking its magnitude using a
multimeter/test set readout. The corresponding reading can then be checked in the relays menu.

The measurement accuracy of the relay is 2.5% or 0.1V. However an additional allowance must be
made for the accuracy of the test equipment being used.

Note!

The closing circuit should remain isolated during these checks to prevent accidental
operation of the associated circuit breaker.

Group No. Item Input Value Input Angle Display Value Display Angle
Ua
Three-phase voltage 1
Ub

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12 Commissioning

Group No. Item Input Value Input Angle Display Value Display Angle
Uc
Ua
Three-phase voltage 2 Ub
Uc
Ua
Three-phase voltage 3 Ub
Uc
Ua
Three-phase voltage…… Ub
Uc
Residual voltage 1 3U0
Residual voltage 2 3U0
Residual voltage 3 3U0
Residual voltage …… 3U0

12.5.2.7 Testing Binary Inputs

This test checks that all the binary inputs on the device are functioning correctly. The binary inputs
should be energized one at a time, see external connection diagrams for terminal numbers.

Ensure that the voltage applied on the binary input must be within the operating range. The status
of each binary input can be viewed using relay menu. Sign “1” denotes an energized input and
sign “0” denotes a de-energized input.

Terminal No. Signal Name BI Status on LCD Correct?

12.5.3 Print Fault Report

In order to acquire the details of protection operation, it is convenient to print the fault report of
protection device. The printing work can be easily finished when operator presses the print button
on panel of protection device to energize binary input [BI_Print] or operate control menu. What
should be noticed is that only the latest fault report can be printed if operator presses the print
button. A complete fault report includes the content shown as follows.

1. Trip event report

2. Binary input when protection devices start

3. Self-check and the transition of binary input in the process of devices start

4. Fault wave forms compatible with COMTRADE

5. The setting value when the protection device trips

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12 Commissioning

12.5.4 On-load Checks


The objectives of the on-load checks are:

1. Confirm the external wiring to the current and voltage inputs is correct.

2. Measure the magnitude of on-load current and voltage (if applicable).

3. Check the polarity of each current transformer.

However, these checks can only be carried out if there are no restrictions preventing the
tenderization of the plant being protected.

Remove all test leads, temporary shorting leads, etc. and replace any external wiring that has
been removed to allow testing.

If it has been necessary to disconnect any of the external wiring from the protection in order to
perform any of the foregoing tests, it should be ensured that all connections are replaced in
accordance with the relevant external connection or scheme diagram. Confirm current and voltage
transformer wiring.

12.6 Final Checks

After the above tests are completed, remove all test or temporary shorting leads, etc. If it has been
necessary to disconnect any of the external wiring from the protection in order to perform the
wiring verification tests, it should be ensured that all connections are replaced in accordance with
the relevant external connection or scheme diagram.

Ensure that the protection has been restored to service.

If the protection is in a new installation or the circuit breaker has just been maintained, the circuit
breaker maintenance and current counters should be zero. If a test block is installed, remove the
test plug and replace the cover so that the protection is put into service.

Ensure that all event records, fault records, disturbance records and alarms have been cleared
and LED’s has been reset before leaving the protection.

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12 Commissioning

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13 Maintenance

13 Maintenance

Table of Contents
13 Maintenance .................................................................................. 13-a
13.1 Appearance Check ...................................................................................... 13-1
13.2 Failure Tracing and Repair ......................................................................... 13-1
13.3 Replace Failed Modules ............................................................................. 13-1
13.3.1 Preparation for Replace Module ...................................................................................... 13-2

13.3.2 Replace HMI Module of Front Panel ............................................................................... 13-2

13.3.3 Replace Module ............................................................................................................... 13-2

13.4 Cleaning ....................................................................................................... 13-3


13.5 Storage ......................................................................................................... 13-3

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13 Maintenance

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13 Maintenance

The device is designed to require no special maintenance. All measurement and signal processing
circuit are fully solid state. All input modules are also fully solid state. The output relays are
hermetically sealed.

Since the device is almost completely self-monitored, from the measuring inputs to the output
relays, hardware and software defects are automatically detected and reported. The
self-monitoring ensures the high availability of the device and generally allows for a corrective
rather than preventive maintenance strategy. Therefore, maintenance checks in short intervals are
not required.

Operation of the device is automatically blocked when a hardware failure is detected. If a problem
is detected in the external measuring circuits, the device normally only provides alarm messages.

13.1 Appearance Check


1. The relay case should be clean without any dust stratification. Case cover should be sealed
well. No component has any mechanical damage and distortion, and they should be firmly fixed in
the case. Relay terminals should be in good condition. The keys on the front panel with very good
feeling can be operated flexibly.

2. It is only allowed to plug or withdraw relay board when the supply is reliably switched off.
Never allow the CT secondary circuit connected to this equipment to be opened while the primary
system is live when withdrawing an AC module. Never try to insert or withdraw the relay board
when it is unnecessary.

3. Check weld spots on PCB whether they are well soldered without any rosin joint. All dual
inline components must be well plugged.

13.2 Failure Tracing and Repair


Failures will be detected by automatic supervision or regular testing.

When a failure is detected by supervision, a remote alarm is issued and the failure is indicated on
the front panel with LED indicators and LCD display. It is also recorded in the event record.
Failures detected by supervision are traced by checking the “Superv Events” screen on the LCD.

When a failure is detected during regular testing, confirm the following:

1. Test circuit connections are correct

2. Modules are securely inserted in position

3. Correct DC power voltage is applied

4. Correct AC inputs are applied

5. Test procedures comply with those stated in the manual

13.3 Replace Failed Modules


If the failure is identified to be in the relay module and the user has spare modules, the user can

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Date: 2015-01-15
13 Maintenance

recover the protection by replacing the failed modules.

Repair at the site should be limited to module replacement. Maintenance at the component level is
not recommended.

Check that the replacement module has an identical module name (AI, PWR, MON, DSP, BI, BO,
etc.) and hardware type-form as the removed module. Furthermore, MON module replaced should
have the same software version. In addition, the AI and PWR module replaced should have the
same ratings.

The module name is indicated on the top front of the module. The software version is indicated in
LCD menu “Version Info”.

Caution!

When handling a module, take anti-static measures such as wearing an earthed wrist band
and placing modules on an earthed conductive mat. Otherwise, many of the electronic
components could suffer damage. After replacing the MON or DSP module, check the
settings.

13.3.1 Preparation for Replace Module


1. Switch off the DC power supply

2. Disconnect the trip outputs

3. Short circuit all AC current inputs and disconnect all AC voltage inputs

Warning!

Hazardous voltage can be present in the DC circuit just after switching off the DC power
supply. It takes approximately 30 seconds for the voltage to discharge.

13.3.2 Replace HMI Module of Front Panel


1. Open the relay front panel

2. Unplug the ribbon cable on the front panel by pushing the catch outside.

3. Detach the HMI module from the relay

4. Attach the replacement module in the reverse procedure.

13.3.3 Replace Module


1. Unscrew the module connector

2. Unplug the connector from the target module.

3. Unscrew the module.

4. Pull out the module

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13 Maintenance

5. Inset the replacement module in the reverser procedure.

6. After replacing the MON or DSP module, input the application-specific setting values again.

Warning!

Units and modules may only be replaced while the supply is switched off and only by
appropriately trained and qualified personnel. Strictly observe the basic precautions to
guard against electrostatic discharge.

Warning!

When handling a module, take anti-static measures such as wearing an earthed wrist band
and placing modules on an earthed conductive mat. Otherwise, many of the electronic
components could suffer damage. After replacing the MON or DSP module, check the
settings.

Danger!

After replacing modules, be sure to check that the same configuration is set as before the
replacement. If this is not the case, there is a danger of the unintended operation of
switchgear taking place or of protections not functioning correctly. Persons may also be
put in danger.

13.4 Cleaning
Before cleaning the relay, ensure that all AC/DC supplies, current transformer connections are
isolated to prevent any chance of an electric shock whilst cleaning. Use a smooth cloth to clean
the front panel. Do not use abrasive material or detergent chemicals.

13.5 Storage
The spare relay or module should be stored in a dry and clean room. Based on IEC standard
60255-1 the storage temperature should be from -40°C to +70°C, but the temperature of from 0°C
to +40°C is recommended for long-term storage.

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13 Maintenance

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14 Decommissioning and Disposal

14 Decommissioning and Disposal

Table of Contents
14 Decommissioning and Disposal................................................. 14-a
14.1 Decommissioning ....................................................................................... 14-1
14.2 Disposal ....................................................................................................... 14-1

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14 Decommissioning and Disposal

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14 Decommissioning and Disposal

14.1 Decommissioning
1. Switching off

To switch off the PCS-902, switch off the external miniature circuit breaker of the power supply.

2. Disconnecting Cables

Disconnect the cables in accordance with the rules and recommendations made by relational
department.

Danger!

Before disconnecting the power supply cables that connected with the PWR module of the
PCS-902, make sure that the external miniature circuit breaker of the power supply is
switched off.

Danger!

Before disconnecting the cables that are used to connect analog input module with the
primary CTs and VTs, make sure that the circuit breaker for the primary CTs and VTs is
switched off.

3. Dismantling

The PCS-902 rack may now be removed from the system cubicle, after which the cubicles may
also be removed.

Danger!

When the station is in operation, make sure that there is an adequate safety distance to
live parts, especially as dismantling is often performed by unskilled personnel.

14.2 Disposal
In every country there are companies specialized in the proper disposal of electronic waste.

Note!

Strictly observe all local and national regulations when disposing of the device.

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14 Decommissioning and Disposal

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15 Manual Version History

15 Manual Version History


In the latest version of the instruction manual, several descriptions on existing features have been
modified.

Manual version and modification history records

Manual Version Software


Date Description of change
Source New Version
R1.00 R1.00 2015-04-16  Form the original manual

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15 Manual Version History

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