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1 2 3 4 5 6 7 8

PCB STACK UP
LAYER 1 : TOP
LAYER 2 : GND1
LAYER 3 : IN1
TE4 Block Diagram
LAYER 4 : VCC
A LAYER 5 : IN2 A

LAYER 6 : IN3
LAYER 7 : GND2 USB-0
LCD/CCD Con. P26
LAYER 8 : BOT
DDRIII-SODIMM1
DDRIII-SODIMM2 Arrandale (UMA+VGA) INT_LVDS
P14,15 CRT Con.

DDR SYSTEM MEMORY


PCI-E
INT_CRT daughter board
Dual Channel DDR III P26

Graphics Interfaces
800/1066/1333 MHZ INT_HDMI

rPGA 989 HDMI Con.


P25
SATA - HDD Re-Driver P4, 5, 6,7
P29 P29
FDI
DMI

DMI(x4)
SATA - ODD
P29 SATA 0
B FDI B
DMI
SATA 1
SATA
PCI-Express
PCI-E

PCIE-3 CK505
P3
USB-10 3G
USB Con.(Right) daughter board P27
USB-8 POWER SYSTEM
P26 Ibex Peak-M ISL88731C P36
USB 2.0 (Port0~13) PM6686TR P37
USB-3 PCIE-5
USB RT8207L P38
Cardreader PCH USB-5 WLAN G5602R41U P39
USB-4
SIM CARD. P27 RT8152C P40
P27 P9, 10, 11,12,13
P32 ISL62882HRTZ-T P41
PCIE-6 G966A P42
RTC Giga/10/100 Lan
USB Con.(Left) USB-13
P31
Cardreader Con. P28
C
3 IN 1 P32 BATTERY +VCC_CORE C

USB Con.(Left) USB-9


P9
P28
+1.5V
Azalia +1.5VSUS
IHDA
NVRAM
LPC
+VTT
+1.05V
LPC

+1.8V

Audio Codec EC +1.5V_S5


P30 P33 +3VPCU
+3V_S5
Port-B

Port-A

+3V
FAN K/B Con. HALL Sensor SPI Flash Touch Pad /B Power /B +5VPCU
MIC JACK HP SPK Con. Con. Con. +5V_S5
D MDC Con. D
P30 P30 P30 P30 P4 P34 P4 P33 P34 P34 +5V
+SMDDR_VTERM
+SMDDR_VREF

Quanta Computer Inc.


PROJECT : TE4
Size Document Number Rev
1A
Block Diagram
Date: Friday, November 12, 2010 Sheet 1 of 46
1 2 3 4 5 6 7 8

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1 2 3 4 5 6 7 8

CONTROL Power States


02
Table of Contents POWER PLANE VOLTAGE SIGNAL ACTIVE IN
PAGE DESCRIPTION
VIN 10V~+19V S0~S5

1 Schematic Block Diagram +VCCRTC +3.0V~+3.3V S0~S5


A 2 Front Page A
+3V +3.3V MAIN_ON S0
3 Clock Gen
4-7 Processor +3V_S5 +3.3V S5_ON S0~S5
8 S3 Power Reduction
+3V_HDP +3.3V MAIN_ON S0
9-13 PCH
9 RTC +3VPCU +3.3V AC/DC Insert enable S0
14-15 DDRIII SO-DIMM
+5V +5V MAIN_ON S0
25 HDMI comm part
26 LCD Panel +5V_S5 +5V S5_ON S0~S5
CRT & CRT BUS SWITCH
+5VPCU +5V AC/DC Insert enable S0~S5
CCD
HALL SENSOR&BACK LIGHT SWITCH WIMAX_P +3.3V WMAX_P for WLAN
27 MINI Card (Wi-Fi & WIMAX)
+1.8V +1.8V MAIN_ON S0
MINI Card 2nd
MINI Card 3nd +1.5V +1.5V MAIN_ON S0
28 USB 2.0
+1.5V_SUS +1.5V SUSON S0~S3
29 SATA ODD
Main SATA HDD & 2nd SATA HDD +VCC_CORE VRON S0
30 Codec (CX20587)
+VTT +1.05V MAIN_ON S0
31 Atheros LAN
B 32 3 IN 1 Card reader +1.05V +1.05V MAIN_ON S0 B

33 EC NPCE791L
+VAXG MPWROK S0
34 INT KeyBoard & K/B LED Power
TP board
Power SW
HOLE
35 LED / EMI
36 Charger (ISL88731C) GND PLANE PAGE
37 System 5V/3V (PM6686TR)
8769AGND
38 DDR1.5V(RT8207L)/1.05VSUS 33
39 +VTT/+1.05V (G5602R41U) Audio_GND
30
40 VAXG_CORE RT8152C FOR UMA
Shield_GND
41 +VCC_CORE(ISL62882HRTZ-T) 30
42 +1.8V (G966A)/Discharge
GND ALL

ISL95870A_AGND 30

C C

D D

Quanta Computer Inc.


PROJECT : TE4
Size Document Number Rev
1A
POWER STAGE AND BOI-FUNCTION
Date: Friday, November 12, 2010 Sheet 2 of 46
1 2 3 4 5 6 7 8

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5 4 3 2 1

03
CLOCK Gen [CLK] Pin1/17/24
Sligo595 =>1.5V (AL000595000)
+3V Sligo590 =>3.3V (AL8SP590000)
+1.05V
+VDDIO_CLK 80mA(20mils)
L17 PBY160808T-601Y-N_1A 250mA(20mils) +3V_CK505_VDD L8 PBY160808T-601Y-N_1A

D C249 C246 C7354 C240 D


C435 C239 C229
10U/6.3V_8X 0.1U/10V_4X 0.1U/10V_4X U9 *10U/6.3V_8X 10U/6.3V_8X 0.1U/10V_4X 0.1U/10V_4X
R397
+1.5V *590@0_6 5 VDD_27
29 VDD_REF VDD_SRC_I/O 15
VDD_CPU_I/O 18

L7 595@PBY160808T-601Y-N_1A 150mA(20mils) +1.5V_CK505_VDD 1 VDD_DOT_1.5 DOT_96 3 DREFCLK_R RP3


2 1 *short_4P2R
CLK_BUF_DREFCLKP {10}
17 4 DREFCLK#_R 4 3
VDD_SRC_1.5 DOT_96# CLK_BUF_DREFCLKN {10}
24 VDD_CPU_1.5
6 CLK_VGA_27M_R R186 *EV@33_4
27M PCH_CLK_27M
C233 C7335 C234 C243 XTAL_OUT 27 7 CLK_VGA_27M#_R R190 EV@33_4
595@10U/6.3V_8X *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X XTAL_IN XTAL_OUT 27M_SS R197 *33_4 TP35
28 XTAL_IN
10 DREFSSCLK_R RP4 2 1 *short_4P2R
SRC_1/SATA CLK_BUF_DREFSSCLKP {10}
CPU_SEL 30 11 DREFSSCLK#_R 4 3
REF_0/CPU_SEL SRC_1#/SATA# CLK_BUF_DREFSSCLKN {10}
13 PCIE_3GPLL_R RP5 2 1 *short_4P2R
SRC_2 CLK_BUF_PCIE_3GPLLP {10}
14 PCIE_3GPLL#_R 4 3
SRC_2# CLK_BUF_PCIE_3GPLLN {10}
CGDAT_SMB 31
CGCLK_SMB SDA ICS_CPU_STOP# R411 10K_4
32 SCL *CPU_STOP# 16 +3V
C CLK_PCH_14M R133 33_4 2 C
{10} CLK_PCH_14M VSS_DOT
8 20 CLK_BUF_BCLK1_P_R TP31
VSS_27 CPU_1 CLK_BUF_BCLK1_N_R TP30
9 VSS_SATA CPU_1# 19
C225 12 23 CLK_BUF_BCLK0_P_R RP2 4 3 *short_4P2R
VSS_SRC CPU_0 CLK_BUF_BCLKP {10}
21 22 CLK_BUF_BCLK0_N_R 2 1
VSS_CPU CPU_0# CLK_BUF_BCLKN {10}
*15P/50V_4C 26 VSS_REF VR_PWRGD_CLKEN
CKPWRGD/PD# 25
33 GND
SLG8LV595VTR

CLK CRYSTAL CLK CPU_SEL CLK I2C CLK POWERGOOD

+3V

B B

+3V

R378
+3VPCU R138 10K_4 VR_PWRGD_CLKEN

2
R134 10K_4

3
*10K_4 3 1 CGDAT_SMB
{10,31} SDATA CGDAT_SMB {14,15,27}
R137
2 Q12 100K/F_4
{41} VR_PWRGD_CK505#
Y2 CPU_SEL 2N7002_200MA
XTAL_IN XTAL_OUT 2N7002_200MA
1 2 Q32
14.318MHZ_30 R136

1
C230 C231
10K_4
33P/50V_4N 33P/50V_4N R398

+3V 10K_4

2
A A

0 1 3 1 CGCLK_SMB
{10,31} SCLK CGCLK_SMB {14,15,27}

2N7002_200MA
Quanta Computer Inc.
CPU =133MHz CPU=100MHz
CPU_SEL (default)
Q34 PROJECT : TE4
Size Document Number Rev
A1A
CLOCK GENERATOR
Date: Monday, January 24, 2011 Sheet 3 of 46
5 4 3 2 1

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1 2 3 4 5 6 7 8

U19A
B26 PEG_COMP R7350 49.9/F_4 R83 20/F_4 H_COMP3 AT23
U19B
A16 CLK_CPU_BCLKP {12}
04
PEG_ICOMPI R87 20/F_4 H_COMP2 AT24 COMP3 BCLK
A26 B16 CLK_CPU_BCLKN {12}
PEG_ICOMPO R55 49.9/F_4 H_COMP1 G16 COMP2 BCLK#
{11} DMI_TXN0 A24
C23
DMI_RX#[0] PEG_RCOMPO
B27
A25 PEG_RBIAS R7351 750/F_4 R89 49.9/F_4 H_COMP0 AT26 COMP1 MISC AR30
{11} DMI_TXN1 DMI_RX#[1] PEG_RBIAS COMP0 BCLK_ITP TP17
{11} DMI_TXN2 B22 AH24 AT30 TP19
DMI_RX#[2] TP7 SKTOCC# BCLK_ITP#
{11} DMI_TXN3 A21 K35 CLK_PCIE_3GPLLP {10}
DMI_RX#[3] PEG_RX#[0] del in UMA
J34 E16
{11} DMI_TXP0 B24
PEG_RX#[1]
J33 H_CATERR# AK14
CLOCKS PEG_CLK D16 R326 EV@0_4
CLK_PCIE_3GPLLN {10}
DMI_RX[0] PEG_RX#[2] CATERR# PEG_CLK#
{11} DMI_TXP1 D23 G35 {12} H_PECI AT15
DMI_RX[1] PEG_RX#[3] H_PROCHOT#_D PECI
{11} DMI_TXP2 B23 G32 AN26 THERMAL A18 CLK_DREFSSCLKP_R R323 3 4 *IV@0X2 CLK_DREFSSCLKP {10}
DMI_RX[2] PEG_RX#[4] CPU_PM_THRMTRIP# AK15 PROCHOT# DPLL_REF_SSCLK
{11} DMI_TXP3 A22 F34 A17 CLK_DREFSSCLKN_R 1 2 CLK_DREFSSCLKN {10} For EDP
DMI_RX[3] PEG_RX#[5] THERMTRIP# DPLL_REF_SSCLK#
F31
A PEG_RX#[6] R325 EV@0_4 A
D24 D35
{11}
{11}
DMI_RXN0
DMI_RXN1 G24
F23
DMI_TX#[0]
DMI_TX#[1]
DMI PEG_RX#[7]
PEG_RX#[8]
E33
C33
H_CPURST#_R AP26
AL15
RESET_OBS# SM_DRAMRST#
F6 DDR3_DRAMRST#_C DDR3_DRAMRST#_C {8}
{11} DMI_RXN2 DMI_TX#[2] PEG_RX#[9] {11} PM_SYNC PM_SYNC
{11} DMI_RXN3 H23
DMI_TX#[3] PEG_RX#[10]
D32 AN14
VCCPWRGOOD_1 DDR3 SM_RCOMP[0] AL1 SM_RCOMP_0 R353 100/F_4
B32 {12} H_PWRGOOD AN27 AM1 SM_RCOMP_1 R354 24.9/F_4
PEG_RX#[11] VCCPWRGOOD_0
{11} DMI_RXP0 D25
F24
DMI_TX[0] PEG_RX#[12]
C31
B28
{8,11} PM_DRAM_PWRGD PM_DRAM_PWRGD AK13
SM_DRAMPWROK MISC SM_RCOMP[1]
SM_RCOMP[2]
AN1 SM_RCOMP_2 R355
R92
130/F_4
10K_4
{11} DMI_RXP1 DMI_TX[1] PEG_RX#[13] +VTT
{11} DMI_RXP2 E23 B30 TP11 AM26 AN15 PM_EXT_TS#0 R95 *short_4 PM_EXTTS#0 {14}
DMI_TX[2] PEG_RX#[14] TAPPWRGOOD PM_EXT_TS#[0]
{11} DMI_RXP3 G23 A31 AP15 PM_EXT_TS#1 R88 *short_4 PM_EXTTS#1 {15}
DMI_TX[3] PEG_RX#[15] H_VTTPWRGD PM_EXT_TS#[1] R90 10K_4
AM15 +VTT
R7135 1.5K/F_4 CPU_PLTRST# VTTPWRGOOD
J35 {11,27,31,33} PLTRST# AL14
PEG_RX[0] RSTIN# XDP_PRDY#
2.7GT/s data rate PEG_RX[1]
H34
PRDY#
AT28 TP20
H33 AP27 XDP_PREQ# TP14
{11} FDI_TXN[7:0] PEG_RX[2] PREQ#
FDI_TXN0 R66 750/F_4 XDP_TCLK
FDI_TXN1
E22
D21
FDI_TX#[0] PEG_RX[3]
F35
G33
PWR MANAGEMENT TCK
AN28 TP16
FDI_TXN2 FDI_TX#[1] PEG_RX[4] XDP_TMS
D19 E34 AP28 TP18
FDI_TXN3 FDI_TX#[2] PEG_RX[5] TMS
D18 F32
FDI_TXN4 FDI_TX#[3] PEG_RX[6] XDP_TRST#
G21 D34 AT27
FDI_TXN5 E19
FDI_TX#[4] PEG_RX[7]
F33 XDP_OBS0 AJ22
JTAG & BPM TRST# TP21
Intel(R) FDI
FDI_TX#[5] PEG_RX[8] TP10 BPM#[0]
FDI_TXN6 F21 B33 TP13 XDP_OBS1 AK22 AT29 XDP_TDI_R
FDI_TXN7 G18
FDI_TX#[6]
FDI_TX#[7]
PCI EXPRESS -- GRAPHICS PEG_RX[9]
PEG_RX[10]
D31 TP9 XDP_OBS2 AK24
XDP_OBS3 AJ24
BPM#[1]
BPM#[2]
TDI
TDO
AR27 XDP_TDO_R
XDP_TDI_M
A32 TP8 AR29
PEG_RX[11] XDP_OBS4 AJ25 BPM#[3] TDI_M XDP_TDO_M
{11} FDI_TXP[7:0] C30 TP5 AP29
FDI_TXP0 PEG_RX[12] XDP_OBS5 AH22 BPM#[4] TDO_M
D22 A28 TP4
FDI_TXP1 FDI_TX[0] PEG_RX[13] XDP_OBS6 AK23 BPM#[5]
C21 B29 TP12
FDI_TXP2 FDI_TX[1] PEG_RX[14] XDP_OBS7 AH23 BPM#[6]
D20 A30 TP6 AN25 SYS_RESET# {11}
FDI_TXP3 FDI_TX[2] PEG_RX[15] BPM#[7] DBR#
C18
FDI_TXP4 FDI_TX[3] ACA-ZIF-069-K01
G22 L33
FDI_TXP5 FDI_TX[4] PEG_TX#[0]
E20 M35
FDI_TXP6 FDI_TX[5] PEG_TX#[1]
F20 M33
FDI_TXP7 FDI_TX[6] PEG_TX#[2]
G19 M30
FDI_TX[7] PEG_TX#[3]
L31
PEG_TX#[4]
{11} FDI_FSYNC0 F17 K32
FDI_FSYNC[0] PEG_TX#[5]
{11} FDI_FSYNC1 E17 M29
FDI_FSYNC[1] PEG_TX#[6]
J31
PEG_TX#[7]
{11} FDI_INT C17 K29
FDI_INT PEG_TX#[8]
H30
PEG_TX#[9]
{11} FDI_LSYNC0 F18 H29
FDI_LSYNC[0] PEG_TX#[10]
{11} FDI_LSYNC1 D17 F29
FDI_LSYNC[1] PEG_TX#[11]
B E28 B
PEG_TX#[12]
D29
PEG_TX#[13]
D27
PEG_TX#[14]
C26
PEG_TX#[15]
L34
PEG_TX[0]
M34
PEG_TX[1]
M32
PEG_TX[2]
L30
PEG_TX[3]
M31
PEG_TX[4]
K31
PEG_TX[5]
M28
PEG_TX[6]
H31
JTAG MAPPING Processor hot
PEG_TX[7] +VTT
K28
PEG_TX[8]
G30
PEG_TX[9]
PEG_TX[10]
G29
F28
throttle
PEG_TX[11] XDP_TDI_R
PEG_TX[12]
E27 Ra R115 *short_4
XDP_TDI Rb R109
D28 XDP_TDO_M Rb R101 *0_4
PEG_TX[13] XDP_TDO
C27 68_4
PEG_TX[14] XDP_TRST#
PEG_TX[15]
C25 Rc
R103
ACA-ZIF-069-K01 *short_4
Ra
R99 R114 *short_4 H_PROCHOT#_D
{41} H_PROCHOT#
51_4
XDP_TDI_M Rd R102 *0_4
XDP_TDO_R Re R100 *short_4 If Ra no stuff must change Rb to 50 ohm

Scan Chain STUFF -> Ra, Rc, Re


(Default) NO STUFF -> Rb, Rd
Thermal Trip
CPU Only STUFF -> Ra, Rb
NO STUFF -> Rc, Rd, Re
+VTT
C C
GMCH Only STUFF -> Rd, Re
NO STUFF -> Ra, Rb, Rc

3
2 Q31
{11,41} DELAY_VR_PWRGOOD
VTT Power Good FDI Disable (Discrete only) 2N7002_200MA

1
+3V Cost Down Study
+VTT
{33} HWPG R113 *short_4 +VTT R365 R364
5

R52 EV@1K_4 FDI_INT


2 H_CATERR# R70 49.9/F_4 1K_4 100K_4
4 HWPG_1 R105 2K/F_4 H_VTTPWRGD H_CPURST#_R R360 *68_4 R49 EV@1K_4 FDI_FSYNC0
1 R359 Q30

2
XDP_TMS R107 *51_4 R50 EV@1K_4 FDI_FSYNC1
R112 TC7SH08FU(F) XDP_TDI_R R110 *51_4 *56.2/F_4 MMBT3904-7-F_200MA
3

*short_4 U5 R104 XDP_PREQ# R106 *51_4 R48 EV@1K_4 FDI_LSYNC0 CPU_PM_THRMTRIP# 1 3 SYS_SHDN#
SYS_SHDN# {37}
1K/F_4
XDP_TCLK R94 *51_4 R51 EV@1K_4 FDI_LSYNC1
{11,33} MPWROK
R116 *0_4 R111 *0_4 R84 *short_4 PM_THRMTRIP#
PM_THRMTRIP# {12}

Local Temperature CPU FAN CTRL

+3V
VL +3VPCU
+3VPCU +3VPCU
D +3V D
R301
R310 R313 3mA(40mils)
150_4 10K_4
*150_4 C3A R312 R311
+5V CN7
U16 U1 40mils {33} FANSIG1 FANSIG1
2

+3VPCU_HW_SD 5 1 R315 *10K_4 *330_4 C33 2.2U/6.3V_6X 2 3 TH_FAN_POWER1


VCC SET THM@22K/F_4 VIN VO 1
5
C367 TEMP_ALERT# CPUFAN#_ON_R_1 GND 2
2 1 3 1 6
2

GND {12,33} TEMP_ALERT# Q3 *2N7002_200MA /FON GND 3


7
0.1U/10V_4X GND C30 C31 C348
{33} VFAN1
4 8
R488 0_4 THER_SHD# VSET GND
4 3 1 3
HYST
G708T1U
OT# Q25 *MMBT3904-7-F_200MA
SYS_SHDN# {37}
G991P11U 10U/6.3V_8X 0.01U/25V_4X *0.01U/25V_4X 85205-0300L Quanta Computer Inc.
VL FANPWR = 1.6*VSET
R489 *0_4 R316 *short_4 PROJECT : TE4
Size Document Number Rev
A1A
C3A #Shut down on 86 degree# D3B PROCESSER 1/4(HOST&PEX)
Date: Monday, January 24, 2011 Sheet 4 of 46
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AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)


05
A A

{15} M_B_DQ[63:0]
{14} M_A_DQ[63:0] U19C U19D
M_A_DQ0 A10 AA6 M_A_CLKP0 {14} M_B_DQ0 B5 W8 M_B_CLKP0 {15}
M_A_DQ1 C10 SA_DQ[0] SA_CK[0] M_B_DQ1 SB_DQ[0] SB_CK[0]
SA_DQ[1] SA_CK#[0] AA7 M_A_CLKN0 {14} A5 SB_DQ[1] SB_CK#[0] W9 M_B_CLKN0 {15}
M_A_DQ2 C7 P7 M_A_CKE0 {14} M_B_DQ2 C3 M3 M_B_CKE0 {15}
M_A_DQ3 SA_DQ[2] SA_CKE[0] M_B_DQ3 SB_DQ[2] SB_CKE[0]
A7 SA_DQ[3] B3 SB_DQ[3]
M_A_DQ4 B10 Y6 M_A_CLKP1 {14} M_B_DQ4 E4 V7 M_B_CLKP1 {15}
M_A_DQ5 D10 SA_DQ[4] SA_CK[1] M_B_DQ5 SB_DQ[4] SB_CK[1]
SA_DQ[5] SA_CK#[1] Y5 M_A_CLKN1 {14} A6 SB_DQ[5] SB_CK#[1] V6 M_B_CLKN1 {15}
M_A_DQ6 E10 P6 M_A_CKE1 {14} M_B_DQ6 A4 M2 M_B_CKE1 {15}
M_A_DQ7 SA_DQ[6] SA_CKE[1] M_B_DQ7 SB_DQ[6] SB_CKE[1]
A8 SA_DQ[7] C4 SB_DQ[7]
M_A_DQ8 D8 AE2 M_A_CS#0 {14} M_B_DQ8 D1 AB8 M_B_CS#0 {15}
M_A_DQ9 SA_DQ[8] SA_CS#[0] M_B_DQ9 SB_DQ[8] SB_CS#[0]
F10 SA_DQ[9] SA_CS#[1] AE8 M_A_CS#1 {14} D2 SB_DQ[9] SB_CS#[1] AD6 M_B_CS#1 {15}
M_A_DQ10 E6 M_B_DQ10 F2
M_A_DQ11 SA_DQ[10] M_B_DQ11 SB_DQ[10]
F7 SA_DQ[11] SA_ODT[0] AD8 M_A_ODT0 {14} F1 SB_DQ[11] SB_ODT[0] AC7 M_B_ODT0 {15}
M_A_DQ12 E9 AF9 M_A_ODT1 {14} M_B_DQ12 C2 AD1 M_B_ODT1 {15}
M_A_DQ13 SA_DQ[12] SA_ODT[1] M_B_DQ13 SB_DQ[12] SB_ODT[1]
B7 SA_DQ[13] M_A_DM[7:0] {14} F5 SB_DQ[13] M_B_DM[7:0] {15}
M_A_DQ14 E7 B9 M_A_DM0 M_B_DQ14 F3 D4 M_B_DM0
M_A_DQ15 C6 SA_DQ[14] SA_DM[0] SB_DQ[14] SB_DM[0]
SA_DQ[15] SA_DM[1] D7 M_A_DM1 DM signals are not present on Clarkfield M_B_DQ15 G4 SB_DQ[15] SB_DM[1] E1 M_B_DM1 DM signals are not present on Clarkfield
M_A_DQ16 H10 H7 M_A_DM2 processor. All DM signal can be left as M_B_DQ16 H6 H3 M_B_DM2 processor. All DM signal can be left as
M_A_DQ17 G8 SA_DQ[16] SA_DM[2] SB_DQ[16] SB_DM[2]
SA_DQ[17] SA_DM[3] M7 M_A_DM3 NC on Clarkfield and connect directly to M_B_DQ17 G2 SB_DQ[17] SB_DM[3] K1 M_B_DM3 NC on Clarkfield and connect directly to
M_A_DQ18 K7 AG6 M_A_DM4 M_B_DQ18 J6 AH1 M_B_DM4
M_A_DQ19 SA_DQ[18] SA_DM[4] GND on So-DIMM side for Clarkfield SB_DQ[18] SB_DM[4] GND on So-DIMM side for Clarkfield
J8 SA_DQ[19] SA_DM[5] AM7 M_A_DM5 M_B_DQ19 J3 SB_DQ[19] SB_DM[5] AL2 M_B_DM5
B
M_A_DQ20 G7 AN10 M_A_DM6
design only M_B_DQ20 G1 AR4 M_B_DM6 design only B
SA_DQ[20] SA_DM[6] SB_DQ[20] SB_DM[6]

DDR SYSTEM MEMORY A


M_A_DQ21 G10 AN13 M_A_DM7 M_B_DQ21 G5 AT8 M_B_DM7
SA_DQ[21] SA_DM[7] SB_DQ[21] SB_DM[7]

DDR SYSTEM MEMORY B


M_A_DQ22 J7 M_A_DQSN[7:0] {14} M_B_DQ22 J2 M_B_DQSN[7:0] {15}
M_A_DQ23 J10 SA_DQ[22] M_A_DQSN0 M_B_DQ23 SB_DQ[22] M_B_DQSN0
SA_DQ[23] SA_DQS#[0] C9 J1 SB_DQ[23] SB_DQS#[0] D5
M_A_DQ24 L7 F8 M_A_DQSN1 M_B_DQ24 J5 F4 M_B_DQSN1
M_A_DQ25 M6 SA_DQ[24] SA_DQS#[1] M_A_DQSN2 M_B_DQ25 SB_DQ[24] SB_DQS#[1] M_B_DQSN2
SA_DQ[25] SA_DQS#[2] J9 K2 SB_DQ[25] SB_DQS#[2] J4
M_A_DQ26 M8 N9 M_A_DQSN3 M_B_DQ26 L3 L4 M_B_DQSN3
M_A_DQ27 SA_DQ[26] SA_DQS#[3] SB_DQ[26] SB_DQS#[3]
L9 SA_DQ[27] SA_DQS#[4] AH7 M_A_DQSN4 M_B_DQ27 M1 SB_DQ[27] SB_DQS#[4] AH2 M_B_DQSN4
M_A_DQ28 L6 AK9 M_A_DQSN5 M_B_DQ28 K5 AL4 M_B_DQSN5
M_A_DQ29 SA_DQ[28] SA_DQS#[5] SB_DQ[28] SB_DQS#[5]
K8 SA_DQ[29] SA_DQS#[6] AP11 M_A_DQSN6 M_B_DQ29 K4 SB_DQ[29] SB_DQS#[6] AR5 M_B_DQSN6
M_A_DQ30 N8 AT13 M_A_DQSN7 M_B_DQ30 M4 AR8 M_B_DQSN7
M_A_DQ31 SA_DQ[30] SA_DQS#[7] M_B_DQ31 SB_DQ[30] SB_DQS#[7]
P9 SA_DQ[31] M_A_DQSP[7:0] {14} N5 SB_DQ[31] M_B_DQSP[7:0] {15}
M_A_DQ32 AH5 C8 M_A_DQSP0 M_B_DQ32 AF3 C5 M_B_DQSP0
M_A_DQ33 AF5 SA_DQ[32] SA_DQS[0] M_A_DQSP1 M_B_DQ33 SB_DQ[32] SB_DQS[0] M_B_DQSP1
SA_DQ[33] SA_DQS[1] F9 AG1 SB_DQ[33] SB_DQS[1] E3
M_A_DQ34 AK6 H9 M_A_DQSP2 M_B_DQ34 AJ3 H4 M_B_DQSP2
M_A_DQ35 AK7 SA_DQ[34] SA_DQS[2] SB_DQ[34] SB_DQS[2]
SA_DQ[35] SA_DQS[3] M9 M_A_DQSP3 M_B_DQ35 AK1 SB_DQ[35] SB_DQS[3] M5 M_B_DQSP3
M_A_DQ36 AF6 AH8 M_A_DQSP4 M_B_DQ36 AG4 AG2 M_B_DQSP4
M_A_DQ37 AG5 SA_DQ[36] SA_DQS[4] SB_DQ[36] SB_DQS[4]
SA_DQ[37] SA_DQS[5] AK10 M_A_DQSP5 M_B_DQ37 AG3 SB_DQ[37] SB_DQS[5] AL5 M_B_DQSP5
M_A_DQ38 AJ7 AN11 M_A_DQSP6 M_B_DQ38 AJ4 AP5 M_B_DQSP6
M_A_DQ39 AJ6 SA_DQ[38] SA_DQS[6] SB_DQ[38] SB_DQS[6]
SA_DQ[39] SA_DQS[7] AR13 M_A_DQSP7 M_B_DQ39 AH4 SB_DQ[39] SB_DQS[7] AR7 M_B_DQSP7
M_A_DQ40 AJ10 M_A_A[15:0] {14} M_B_DQ40 AK3 M_B_A[15:0] {15}
M_A_DQ41 AJ9 SA_DQ[40] M_A_A0 M_B_DQ41 SB_DQ[40] M_B_A0
SA_DQ[41] SA_MA[0] Y3 AK4 SB_DQ[41] SB_MA[0] U5
M_A_DQ42 AL10 W1 M_A_A1 M_B_DQ42 AM6 V2 M_B_A1
M_A_DQ43 AK12 SA_DQ[42] SA_MA[1] M_A_A2 M_B_DQ43 SB_DQ[42] SB_MA[1] M_B_A2
SA_DQ[43] SA_MA[2] AA8 AN2 SB_DQ[43] SB_MA[2] T5
C M_A_DQ44 AK8 AA3 M_A_A3 M_B_DQ44 AK5 V3 M_B_A3 C
M_A_DQ45 AL7 SA_DQ[44] SA_MA[3] M_A_A4 M_B_DQ45 SB_DQ[44] SB_MA[3] M_B_A4
SA_DQ[45] SA_MA[4] V1 AK2 SB_DQ[45] SB_MA[4] R1
M_A_DQ46 AK11 AA9 M_A_A5 M_B_DQ46 AM4 T8 M_B_A5
M_A_DQ47 AL8 SA_DQ[46] SA_MA[5] M_A_A6 M_B_DQ47 SB_DQ[46] SB_MA[5] M_B_A6
SA_DQ[47] SA_MA[6] V8 AM3 SB_DQ[47] SB_MA[6] R2
M_A_DQ48 AN8 T1 M_A_A7 M_B_DQ48 AP3 R6 M_B_A7
M_A_DQ49 AM10 SA_DQ[48] SA_MA[7] M_A_A8 M_B_DQ49 SB_DQ[48] SB_MA[7] M_B_A8
SA_DQ[49] SA_MA[8] Y9 AN5 SB_DQ[49] SB_MA[8] R4
M_A_DQ50 AR11 U6 M_A_A9 M_B_DQ50 AT4 R5 M_B_A9
M_A_DQ51 AL11 SA_DQ[50] SA_MA[9] M_A_A10 M_B_DQ51 SB_DQ[50] SB_MA[9] M_B_A10
SA_DQ[51] SA_MA[10] AD4 AN6 SB_DQ[51] SB_MA[10] AB5
M_A_DQ52 AM9 T2 M_A_A11 M_B_DQ52 AN4 P3 M_B_A11
M_A_DQ53 AN9 SA_DQ[52] SA_MA[11] M_A_A12 M_B_DQ53 SB_DQ[52] SB_MA[11] M_B_A12
SA_DQ[53] SA_MA[12] U3 AN3 SB_DQ[53] SB_MA[12] R3
M_A_DQ54 AT11 AG8 M_A_A13 M_B_DQ54 AT5 AF7 M_B_A13
M_A_DQ55 AP12 SA_DQ[54] SA_MA[13] M_A_A14 M_B_DQ55 SB_DQ[54] SB_MA[13] M_B_A14
SA_DQ[55] SA_MA[14] T3 AT6 SB_DQ[55] SB_MA[14] P5
M_A_DQ56 AM12 V9 M_A_A15 M_B_DQ56 AN7 N1 M_B_A15
M_A_DQ57 AN12 SA_DQ[56] SA_MA[15] M_B_DQ57 SB_DQ[56] SB_MA[15]
SA_DQ[57] AP6 SB_DQ[57]
M_A_DQ58 AM13 M_B_DQ58 AP8
M_A_DQ59 AT14 SA_DQ[58] M_B_DQ59 SB_DQ[58]
SA_DQ[59] AT9 SB_DQ[59]
M_A_DQ60 AT12 M_B_DQ60 AT7
M_A_DQ61 AL13 SA_DQ[60] M_B_DQ61 SB_DQ[60]
SA_DQ[61] AP9 SB_DQ[61]
M_A_DQ62 AR14 M_B_DQ62 AR10
M_A_DQ63 AP14 SA_DQ[62] M_B_DQ63 SB_DQ[62]
SA_DQ[63] AT10 SB_DQ[63]

{14} M_A_BS#0 AC3 SA_BS[0] {15} M_B_BS#0 AB1 SB_BS[0]


{14} M_A_BS#1 AB2 SA_BS[1] {15} M_B_BS#1 W5 SB_BS[1]
{14} M_A_BS#2 U7 SA_BS[2] {15} M_B_BS#2 R7 SB_BS[2]
D D
{14} M_A_CAS# AE1 SA_CAS# {15} M_B_CAS# AC5 SB_CAS#
{14} M_A_RAS# AB3 SA_RAS# {15} M_B_RAS# Y7 SB_RAS#
{14} M_A_WE# AE9 SA_WE# {15} M_B_WE# AC6 SB_WE#
ACA-ZIF-069-K01 ACA-ZIF-069-K01 Quanta Computer Inc.
PROJECT :TE4
Size Document Number Rev
A1A
PROCESSER 2/4(DDR)
Date: Monday, January 24, 2011 Sheet 5 of 46
1 2 3 4 5 6 7 8

HTTP://FAQP.RU/
1 2 3 4 5 6 7 8

+VCC_CORE

C193 10U/6.3V_8X
AG35
AG34
AG33
U19F
VCC1
VCC2
VCC3
VTT0_1
VTT0_2
VTT0_3
AH14
AH12
AH11 C418
18A
+VTT
10U/6.3V_8X
+VAXG

AT21
U19G

VAXG1
del in VGA 06

SENSE
LINES
AG32 VCC4 VTT0_4 AH10 AT19 VAXG2 VAXG_SENSE AR22 VCC_AXG_SENSE {40}
AG31 J14 C416 10U/6.3V_8X AT18 AT22 VSS_AXG_SENSE {40}
C162 10U/6.3V_8X VCC5 VTT0_5 VAXG3 VSSAXG_SENSE
AG30 VCC6 VTT0_6 J13 AT16 VAXG4
AG29 H14 C397 10U/6.3V_8X C431 C432 AR21
C190 10U/6.3V_8X VCC7 VTT0_7 + + VAXG5
AG28 VCC8 VTT0_8 H12 AR19 VAXG6
AG27 G14 C171 10U/6.3V_8X *IV@330U/2V_7343P_E6b *IV@330U/2V_7343P_E6b AR18
A VCC9 VTT0_9 VAXG7 A

GRAPHICS VIDs
C159 10U/6.3V_8X AG26 G13 AR16 AM22 GFXVR_VID_0 {40}
VCC10 VTT0_10 C151 10U/6.3V_8X VAXG8 GFX_VID[0]
AF35 VCC11 VTT0_11 G12 AP21 VAXG9 GFX_VID[1] AP22 GFXVR_VID_1 {40}
C160 10U/6.3V_8X AF34 G11 AP19 AN22 GFXVR_VID_2 {40}
VCC12 VTT0_12 C403 10U/6.3V_8X VAXG10 GFX_VID[2]
AF33 VCC13 VTT0_13 F14 AP18 VAXG11 GFX_VID[3] AP23 GFXVR_VID_3 {40}
C192 10U/6.3V_8X AF32 F13 AP16 AM23 GFXVR_VID_4 {40}
VCC14 VTT0_14 C163 10U/6.3V_8X VAXG12 GFX_VID[4]
AF31 VCC15 VTT0_15 F12 AN21 VAXG13 GFX_VID[5] AP24 GFXVR_VID_5 {40}
C181 10U/6.3V_8X AF30 F11 AN19 AN24 GFXVR_VID_6 {40}
VCC16 VTT0_16 VAXG14 GFX_VID[6]

GRAPHICS
AF29 E14 +VAXG AN18 TP15
C191 10U/6.3V_8X VCC17 VTT0_17 VAXG15

+
AF28 VCC18 VTT0_18 E12 AN16 VAXG16
AF27 D14 C369 *330U/2V_7343P_E6b AM21 AR25 GFXVR_EN GFXVR_EN {40}
C179 10U/6.3V_8X VCC19 VTT0_19 C213 IV@10U/6.3V_8X VAXG17 GFX_VR_EN
AF26 VCC20 VTT0_20 D13 AM19 VAXG18 GFX_DPRSLPVR AT25 GFXVR_DPRSLPVR {40}
AD35 VCC21 VTT0_21 D12 AM18 VAXG19 GFX_IMON AM24 GFXVR_IMON {40} del in VGA
C182 10U/6.3V_8X AD34 D11 C429 IV@10U/6.3V_8X AM16

1.1V RAIL POWER


VCC22 VTT0_22 VAXG20 R362 EV@1K_4
AD33 VCC23 VTT0_23 C14 AL21 VAXG21
C417 10U/6.3V_8X AD32 C13 C216 IV@10U/6.3V_8X AL19
VCC24 VTT0_24 VAXG22
AD31 VCC25 VTT0_25 C12 AL18 VAXG23
C157 10U/6.3V_8X AD30 C11 C430 IV@10U/6.3V_8X AL16
VCC26 VTT0_26 VAXG24
AD29 VCC27 VTT0_27 B14 AK21 VAXG25 VDDQ1 AJ1 +1.5V_CPUVDDQ
C180 10U/6.3V_8X AD28 B12 C422 IV@10U/6.3V_8X AK19 AF1

- 1.5V RAILS
VCC28 VTT0_28 VAXG26 VDDQ2 C154 1U/6.3V_4X
AD27 VCC29 VTT0_29 A14 AK18 VAXG27 VDDQ3 AE7
C424 10U/6.3V_8X AD26 A13 C214 IV@10U/6.3V_8X AK16 AE4
VCC30 VTT0_30 VAXG28 VDDQ4 C169 1U/6.3V_4X

POWER
AC35 VCC31 VTT0_31 A12 AJ21 VAXG29 VDDQ5 AC1
C161 10U/6.3V_8X AC34 A11 C215 IV@10U/6.3V_8X AJ19 AB7
VCC32 VTT0_32 VAXG30 VDDQ6 C172 1U/6.3V_4X
AC33 VCC33 VTT Rail Values are AJ18 VAXG31 VDDQ7 AB4
C194 0.1U/10V_4X AC32 C421 IV@10U/6.3V_8X AJ16 Y1
VCC34 Auburndal VTT=1.05V VAXG32 VDDQ8 C166 1U/6.3V_4X
AC31 VCC35 AH21 VAXG33 VDDQ9 W7
C419 0.1U/10V_4X AC30 AF10 +VTT AH19 W4
VCC36 VTT0_33 VAXG34 VDDQ10 C148 1U/6.3V_4X
AC29 VCC37 VTT0_34 AE10 AH18 VAXG35 VDDQ11 U1
C175 *0.047U/10V_4X AC28 AC10 C103 10U/6.3V_8X R91 EV@0_8 AH16 T7
VCC38 VTT0_35 VAXG36 VDDQ12
CPU CORE SUPPLY

B AC27 AB10 C100 10U/6.3V_8X T4 C178 10U/6.3V_8X B


C185 *0.047U/10V_4X VCC39 VTT0_36 VDDQ13
AC26 VCC40 VTT0_37 Y10 VDDQ14 P1
AA35 W10 N7 C187 10U/6.3V_8X

DDR3
C423 *0.047U/10V_4X VCC41 VTT0_38 VDDQ15
AA34 VCC42 VTT0_39 U10 VDDQ16 N4
AA33 VCC43 VTT0_40 T10 +VTT VDDQ17 L1

FDI
C184 *330U/2V_7343P_E6b

+
AA32 J12 J24 H1
VCC44 VTT0_41 (15mils) C138 10U/6.3V_8X VTT1_45 VDDQ18
POWER

AA31 VCC45 VTT0_42 J11 J23 VTT1_46


AA30 VCC46 VTT0_43 J16 +VTT_43 R54 *short_6 H25 VTT1_47
AA29 VCC47 VTT0_44 J15 +VTT_44 R56 *short_6 C400 10U/6.3V_8X
AA28 VCC48
AA27 VCC49 VTT0_59 P10 +VTT
AA26 AN33 PSI# PSI# {41} +VTT K26 N10
VCC50 PSI# VTT1_48 VTT0_60

PEG & DMI


Y35 VCC51 J27 VTT1_49 VTT0_61 L10
Y34 J26 K10 C407 10U/6.3V_8X
VCC52 VID0 VTT1_50 VTT0_62
Y33 AK35 H_VID0 {41} J25 J22

1.1V
VCC53 VID[0] VID1 C375 10U/6.3V_8X VTT1_51 VTT1_63 C412 10U/6.3V_8X
Y32 VCC54 VID[1] AK33 H_VID1 {41} H27 VTT1_52 VTT1_64 J20
Y31 AK34 VID2 G28 J18
VCC55 VID[2] H_VID2 {41} VTT1_53 VTT1_65
Y30 AL35 VID3 C370 10U/6.3V_8X G27 H21 C399 10U/6.3V_8X
VCC56 VID[3] H_VID3 {41} VTT1_54 VTT1_66
Y29 AL33 VID4 G26 H20
CPU VIDS

VCC57 VID[4] H_VID4 {41} VTT1_55 VTT1_67


Y28 AM33 VID5 C186 10U/6.3V_8X F26 H19 C398 10U/6.3V_8X
VCC58 VID[5] H_VID5 {41} VTT1_56 VTT1_68
Y27 AM35 VID6 E26
VCC59 VID[6] H_VID6 {41} VTT1_57
Y26 AM34 ICH_DPRSTP# ICH_DPRSTP# {41} C177 10U/6.3V_8X E25
VCC60 PROC_DPRSLPVR VTT1_58
V35 L26 +1.8V

1.8V
VCC61 VCCPLL1
V34 VCC62 VCCPLL2 L27
V33 VCC63 VCCPLL3 M26
V32 G15 C137 10U/6.3V_8X
VCC64 VTT_SELECT TP2
V31 VCC65
V30 H_VTTVID1=Low, 1.1V ACA-ZIF-069-K01 C141 4.7U/6.3V_6X
VCC66
V29 VCC67
V28 H_VTTVID1=High, 1.05V C140 2.2U/6.3V_6X
C VCC68 C
V27 VCC69
V26 C142 1U/6.3V_4X
VCC70
U35 VCC71
U34 C402 1U/6.3V_4X
VCC72 ISENSE
U33 AN35
SENSE LINES

VCC73 ISENSE ISENSE {41}


U32 VCC74
U31 B15 VTT_SENSE TP72
VCC75 VTT_SENSE
U30 VCC76 VSS_SENSE_VTT A15 TP_VSS_SENSE_VTT TP73
U29
VCC77
U28
C189 10U/6.3V_8X VCC78 R75 100/F_4
U27 VCC79 +VCC_CORE
U26 AJ34 VCCSENSE {41}
C420 10U/6.3V_8X VCC80 VCC_SENSE
R35 AJ35 VSSSENSE {41}
VCC81 VSS_SENSE R77 100/F_4
R34
C153 10U/6.3V_8X VCC82
R33 VCC83
R32 VID0 R343 1K_4 +VTT
C425 10U/6.3V_8X VCC84 R342 *1K_4
R31 VCC85
R30
C174 10U/6.3V_8X VCC86 VID1 R341 1K_4
R29
VCC87 R340 *1K_4
R28
C167 10U/6.3V_8X VCC88
R27
VCC89 VID2 R345 1K_4
R26
C183 *10U/6.3V_8X VCC90 R344 *1K_4
P35
VCC91
P34 VCC92
C188 *10U/6.3V_8X P33 VID3 R347 *1K_4
VCC93 +VCC_CORE R346 1K_4
P32
VCC94
P31 VCC95
P30 VID4 R349 *1K_4
VCC96 R348 1K_4
P29
VCC97
D P28 VCC98
D
P27 C414 C415 VID5 R351 1K_4
VCC99 + + R350 *1K_4
P26
VCC100 *330U/2V_7343P_E6b *330U/2V_7343P_E6b
ACA-ZIF-069-K01 VID6 R352 *1K_4
R356 1K_4

ICH_DPRSTP# R7435
R357
1K_4
*1K_4
Quanta Computer Inc.
HFM_VID : Max 1.4V
LFM_VID : Min 0.65V PSI# R361 *1K_4 PROJECT : TE4
R363 1K_4 Size Document Number Rev
A1A
PROCESSER 3/4(POWER)
Date: Monday, January 24, 2011 Sheet 6 of 46
1 2 3 4 5 6 7 8

HTTP://FAQP.RU/
1 2 3 4 5 6 7 8

AUBURNDALE/CLARKSFIELD PROCESSOR (GND)


U19H K27
U19I
AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)
U19E
07
VSS161
K9 VSS162
AT20 VSS1 VSS81 AE34 K6 VSS163 {14} DDR_VREF_DQ0 J17 SA_DIMM_VREF RSVD_NCTF_41 AT2
AT17 VSS2 VSS82 AE33 K3 VSS164 {15} DDR_VREF_DQ1 H17 SB_DIMM_VREF RSVD_NCTF_42 AT3
AR31 VSS3 VSS83 AE32 J32 VSS165 RSVD_NCTF_43 AR1
AR28 AE31 J30 CFG0 AM30 AL28
A VSS4 VSS84 VSS166 CFG[0] RSVD45 A
AR26 VSS5 VSS85 AE30 J21 VSS167 AM28 CFG[1] RSVD46 AL29
AR24 VSS6 VSS86 AE29 J19 VSS168 AP31 CFG[2] RSVD47 AP30
AR23 AE28 H35 CFG3 AL32 AP32
VSS7 VSS87 VSS169 CFG4 CFG[3] RSVD48
AR20 VSS8 VSS88 AE27 H32 VSS170 AL30 CFG[4] RSVD49 AL27
AR17 VSS9 VSS89 AE26 H28 VSS171 AM31 CFG[5] RSVD50 AT31
AR15 VSS10 VSS90 AE6 H26 VSS172 AN29 CFG[6]
AR12 AD10 H24 CFG7 AM32 AT32
VSS11 VSS91 VSS173 CFG[7] RSVD51
AR9 VSS12 VSS92 AC8 H22 VSS174 AK32 CFG[8] RSVD52 AP33
AR6 VSS13 VSS93 AC4 H18 VSS175 AK31 CFG[9] RSVD53 AR33
AR3 VSS14 VSS94 AC2 H15 VSS176 AK28 CFG[10] RSVD_NCTF_54 AT33
AP20 VSS15 VSS95 AB35 H13 VSS177 AJ28 CFG[11] RSVD_NCTF_55 AT34
AP17 VSS16 VSS96 AB34 H11 VSS178 AN30 CFG[12] RSVD_NCTF_56 AP35
AP13 VSS17 VSS97 AB33 H8 VSS179 AN32 CFG[13] RSVD_NCTF_57 AR35
AP10 VSS18 VSS98 AB32 H5 VSS180 AJ32 CFG[14] RSVD58 AR32
AP7 VSS19 VSS99 AB31 H2 VSS181 AJ29 CFG[15] RSVD_TP_59 E15
AP4 VSS20 VSS100 AB30 G34 VSS182 AJ30 CFG[16] RSVD_TP_60 F15
AP2 VSS21 VSS101 AB29 G31 VSS183 AK30 CFG[17]
AN34 AB28 G20 TP3 H16 A2
VSS22 VSS102 VSS184 RSVD_TP_86 KEY
AN31 VSS23 VSS103 AB27 G9 VSS185 RSVD62 D15
AN23 VSS24 VSS104 AB26 G6 VSS186 AP25 RSVD1 RSVD63 C15
AN20 VSS25 VSS105 AB6 G3 VSS187 AL25 RSVD2 RSVD64 AJ15 RSVD64_R R69 *0_4
AN17 AA10 F30 AL24 AH15 RSVD65_R R68 *0_4

RESERVED
VSS26 VSS106 VSS188 RSVD3 RSVD65
AM29 VSS27 VSS107 Y8 F27 VSS189 AL22 RSVD4 RSVD_TP_66 AA5
AM27 VSS28 VSS108 Y4 F25 VSS190 AJ33 RSVD5 RSVD_TP_67 AA4
AM25 VSS29 VSS109 Y2 F22 VSS191 AG9 RSVD6 RSVD_TP_68 R8
AM20 VSS30 VSS110 W35 F19 VSS192 M27 RSVD7 RSVD_TP_69 AD3
AM17 VSS31 VSS111 W34 F16 VSS193 L28 RSVD8 RSVD_TP_70 AD2
AM14 VSS32 VSS112 W33 E35 VSS194
AM11 VSS33 VSS113 W32 E32 VSS195 G25 RSVD11 RSVD_TP_71 AA2
B AM8 VSS34 VSS114 W31 E29 VSS196 G17 RSVD12 RSVD_TP_72 AA1 B
AM5 VSS35 VSS115 W30 E24 VSS197 E31 RSVD13 RSVD_TP_73 R9
AM2 W29 E21 E30 AG7
AL34
AL31
VSS36
VSS37
VSS38 VSS
VSS116
VSS117
VSS118
W28
W27
E18
E13
VSS198
VSS199
VSS200
VSS B19
A19
RSVD14
RSVD15
RSVD16
RSVD_TP_74
RSVD_TP_75
RSVD_TP_76
AE3
V4
AL23 W26 E11 R7352 *0_4 TP_RSVD17_R A20 V5
VSS39 VSS119 VSS201 R7353 *0_4 TP_RSVD18_R RSVD17 RSVD_TP_77
AL20 VSS40 VSS120 W6 E8 VSS202 B20 RSVD18 RSVD_TP_78 N2
AL17 VSS41 VSS121 V10 E5 VSS203 U9 RSVD19 RSVD_TP_79 AD5
AL12 VSS42 VSS122 U8 E2 VSS204 T9 RSVD20 RSVD_TP_80 AD7
AL9 VSS43 VSS123 U4 D33 VSS205
AL6 VSS44 VSS124 U2 D30 VSS206 AC9 RSVD21 RSVD_TP_81 W3
AL3 VSS45 VSS125 T35 D26 VSS207 AB9 RSVD22 RSVD_TP_82 W2
AK29 VSS46 VSS126 T34 D9 VSS208 C1 RSVD_NCTF_23 RSVD_TP_83 N3
AK27 VSS47 VSS127 T33 D6 VSS209 A3 RSVD_NCTF_24 RSVD_TP_84 AE5
AK25 VSS48 VSS128 T32 D3 VSS210 J29 RSVD26 RSVD_TP_85 AD9
AK20 VSS49 VSS129 T31 C34 VSS211 J28 RSVD27
AK17 VSS50 VSS130 T30 C32 VSS212 A34 RSVD_NCTF_28
AJ31 VSS51 VSS131 T29 C29 VSS213 A33 RSVD_NCTF_29
AJ23 T28 C28 C35 AP34 TP74
VSS52 VSS132 VSS214 RSVD_NCTF_30 VSS
AJ20 VSS53 VSS133 T27 C24 VSS215
AJ17 VSS54 VSS134 T26 C22 VSS216 B35 RSVD_NCTF_31
AJ14 VSS55 VSS135 T6 C20 VSS217 AJ13 RSVD32
AJ11 VSS56 VSS136 R10 C19 VSS218 AJ12 RSVD33
AJ8 VSS57 VSS137 P8 C16 VSS219 AH25 RSVD34
AJ5 VSS58 VSS138 P4 B31 VSS220 AK26 RSVD35
AJ2 VSS59 VSS139 P2 B25 VSS221 AL26 RSVD36
AH35 VSS60 VSS140 N35 B21 VSS222 AR2 RSVD_NCTF_37
AH34 VSS61 VSS141 N34 B18 VSS223 AJ26 RSVD38
AH33 VSS62 VSS142 N33 B17 VSS224 AJ27 RSVD39
C
AH32 VSS63 VSS143 N32 B13 VSS225 AP1 RSVD_NCTF_40 C
AH31 VSS64 VSS144 N31 B11 VSS226
AH30 N30 B8 ACA-ZIF-069-K01
VSS65 VSS145 VSS227
AH29 VSS66 VSS146 N29 B6 VSS228
AH28 VSS67 VSS147 N28 B4 VSS229
AH27 VSS68 VSS148 N27 A29 VSS230
AH26 VSS69 VSS149 N26 A27 VSS231
AH20 VSS70 VSS150 N6 A23 VSS232
AH17 VSS71 VSS151 M10 A9 VSS233
AH13 VSS72 VSS152 L35
AH9 VSS73 VSS153 L32 AT35 VSS_NCTF1
AH6 VSS74 VSS154 L29 AT1 VSS_NCTF2
AH3 L8 R358 *short_4 AR34
NCTF

VSS75 VSS155 R327 *short_4 VSS_NCTF3


AG10 VSS76 VSS156 L5 B34 VSS_NCTF4
AF8 L2 R53 *short_4 B2
VSS77 VSS157 VSS_NCTF5
AF4 VSS78 VSS158 K34 B1 VSS_NCTF6
AF2 VSS79 VSS159 K33 A35 VSS_NCTF7
AE35 VSS80 VSS160 K30

ACA-ZIF-069-K01 ACA-ZIF-069-K01
CFG[ 1:0 ] - PCI_Epress Configuration Select
* 11= 1 x 16 PEG For Discrete only
* 10= 2 x 8 PEG
CFG0 R97 *3.01K/F_4

1 0 CFG3 R96 3.01K/F_4

CFG4 Enabled; An external Display port CFG4 R93 *3.01K/F_4


D
(Display Port Disabled; No Physical Display Port device is connected to the Embedded CFG7 R98
D
*3.01K/F_4
The Clarkfield processor's PCI Express interface may Presence) attached to Embedded Diplay Port Display port
not meet PCI Express 2.0 jitter specifications. Intel
recommends placing a 3.01K +/- 5% pull down resistor to CFG0
VSS on CFG[7] pin for both rPGA and BGA components. (PCI-Epress Single PEG Bifurcation enabled
This pull down resistor should be removed when this Configuration Select) Quanta Computer Inc.
issue is fixed.
CFG3 PROJECT : TE4
(PCI-Epress Static Normal Operation Lane Numbers Reversed
Size Document Number Rev
Lane Reversal) 15 -> 0 , 14 -> 1 A1A
PROCESSER 4/4 (GND)
Date: Monday, January 24, 2011 Sheet 7 of 46
1 2 3 4 5 6 7 8

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5 4 3 2 1

08
S3 Power Enable DRAM Reset

+1.5VSUS

S3_1.5V PR60 *0/F_6


{38} S3_1.5V
R27
{12} DDR3_DRAMRST#_PCH 1K_4
D +3V_S5 D

DDR3_DRAMRST# {14,15}
R37 C76

3
PU4
2 *100K_4 0.1U/10V_4X Q6
MAINON {13,33,39,42}
PR54 1 2 100K_4 4
1 +1.5V_CPUVDDQ_PG 2
R25
TC7SH08FU(F) *0_4

3
BSS138-7-F_0.2MA
3

1
PR49 PR53 *0_6
S3_Reduce {33}
{4} DDR3_DRAMRST#_C DDR3_DRAMRST#_C
2 MAINON_ON_G {14,42}
PQ3 *Short_6 R30
2N7002K_300MA
100K_4
1

C C

VDDQ Power Good VDDQ Power Switch VDDQ Discharge

+1.5V_CPUVDDQ +3V_S5 +15V +1.5VSUS

+1.5VSUS
+1.5V_CPUVDDQ

R314

5
6
7
8
R45 *100K_4
10K/F_4 R322
R39 +1.5V_CPUVDDQ_PG C131 C136 C143 C127 220_8
10K/F_4 {37,38,42} MAIND MAIND 4
3

0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X

Q26

3
2 AO4466_9.4A
3

C368

3
2
1
B Q8 0.01U/25V_4X {14,42} MAINON_ON_G 2 B
R33 5.1K/F_4 2 2N7002_200MA +1.5V_CPUVDDQ
1

Q27
Q7 2N7002K_300MA
C82 FDV301N_200MA

1
1

0.1U/10V_4X
C3A +1.5V_CPUVDDQ 6A/maximum
Q7044可換AO6402A,cost down.

DRAM Power Good


+3V_S5 +3V_S5 PM_DRAM_PWRGD:
+1.5VSUS
Never drive hight before DDR3 voltage ramp to stable
R324

10K/F_4
5

U18 R321
2 *1.1K/F_4
+1.5V_CPUVDDQ_PG
A 4 R317 1.5K/F_4 R320 *short_4 PM_DRAM_PWRGD {4,11}
A
1 PM_DRAM_PWRGD

TC7SH08FU(F)
Quanta Computer Inc.
3

R318 R319
*3K/F_4
750/F_4
PROJECT : TE4
Size Document Number Rev
A1A
S3 Power Reduction
Date: Monday, January 24, 2011 Sheet 8 of 46
5 4 3 2 1

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1 2 3 4 5 6 7 8

09
INTVRMEN - Integrated SUS 1.1V VRM Enable
High - Enable Internal VRs

C447 12P/50V_4C
IBEX PEAK-M (LVDS,DDI)
2
IBEX PEAK-M (HDA,JTAG,SATA)
1
U22D
Y4 R414 del in VGA
+3V
U22A LAD0 {27,33} {26} INT_LVDS_BRIGHT T48
L_BKLTEN Ibex-M SDVO_TVCLKINN
BJ46
32.768KHZ_20 10M_4 T47 4 OF 10 BG46
LAD1 {27,33} {26} INT_LVDS_DIGON L_VDD_EN SDVO_TVCLKINP
3
4

RTC_X1 B13 LAD2 {27,33}


A RTCX1 Ibex-M FWH0 / LAD0
D33 LAD3 {27,33} {26} INT_LVDS_PWM Y48
L_BKLTCTL SDVO_STALLN
BJ48
A
C446 12P/50V_4C RTC_X2 D13 1 OF 10 B33 R209 BG48
RTCX2 FWH1 / LAD1 SDVO_STALLP
C32 AB48
LPC FWH2 / LAD2
FWH3 / LAD3
A32
LFRAME# {27,33} 10K_4 {26} INT_LCD_EDIDCLK
{26} INT_LCD_EDIDDATA Y45
L_DDC_CLK
L_DDC_DATA SDVO_INTN
BF45
RTC_RST# C14 C34 BH45
RTCRST# FWH4 / LFRAME#
A34 R274 IV@10K_4 L_CTRL_CLK AB46
SDVO SDVO_INTP
LDRQ0# +3V L_CTRL_CLK
SRTC_RST# D17 F34 R273 IV@10K_4 L_CTRL_DATA V48 T51
SRTCRST# RTC (+3V) LDRQ1# / GPIO23
SERIRQ
AB9
LDRQ#1 {27}
SERIRQ {27,33}
L_CTRL_DATA SDVO_CTRLCLK
SDVO_CTRLDATA
T53
R422 1M_4 SM_INTRUDER# A16 B2A LVDS_IBG AP39
+RTC_CELL INTRUDER# LVD_IBG
AK7 TP57 LVDS_VBG AP41 BG44
SATA0RXN SATA_RXN0 {29} LVD_VBG DDPB_AUXN
R415 330K_6 PCH_INVRMEN A14 AK6 BJ44
+RTC_CELL INTVRMEN SATA0RXP SATA_RXP0 {29} DDPB_AUXP

DISPLAY PORT B
AK11 LVDS_VREFH AT43 AU38
SATA0TXN
AK9
SATA_TXN0 {29} HDD LVDS_VREFL AT42
LVD_VREFH DDPB_HPD
SATA0TXP SATA_TXP0 {29} LVD_VREFL
ACZ_BITCLK A30 AH6
del in VGA DDPB_0N
BD42
BC42
LVDS--A

Digital Display Interface


HDA_BCLK SATA1RXN SATA_RXN1 {29} DDPB_0P
ACZ_SYNC D29 AH5 AV53 BJ42
P1
HDA_SYNC SATA1RXP
AH9
SATA_RXP1 {29} ODD {26} INT_LCD_TXLCLKOUT-
AV51
LVDSA_CLK# DDPB_1N
BG42
{12,30} PCBEEP SPKR SATA1TXN SATA_TXN1 {29} {26} INT_LCD_TXLCLKOUT+ LVDSA_CLK DDPB_1P
ACZ_RST# C30 AH8 BB40
HDA_RST# SATA1TXP SATA_TXP1 {29} DDPB_2N
{30} ACZ_SDIN0_AUDIO G30 {26} INT_LCD_TXLOUT0- BB47 BA40
HDA_SDIN0 LVDSA_DATA#0 DDPB_2P
F30 AF11 BA52 AW38
TP45 E32
HDA_SDIN1
HDA_SDIN2
IHDA SATA2RXN
SATA2RXP
AF9
{26} INT_LCD_TXLOUT1-
{26} INT_LCD_TXLOUT2- AY48
LVDSA_DATA#1
LVDSA_DATA#2
DDPB_3N
DDPB_3P
BA38
TP50 F32 AF7 AV47
TP53 ACZ_SDOUT HDA_SDIN3 SATA2TXN TP7047 LVDSA_DATA#3 TP64
B29 AF6 Y49
HDA_SDO SATA2TXP DDPC_CTRLCLK TP65
{12,33} PCH_GPIO33 H32 {26} INT_LCD_TXLOUT0+ BB48 AB49
J30
HDA_DOCK_EN# / GPIO33 (+3V) AH3 BA50
LVDSA_DATA0 DDPC_CTRLDATA
HDA_DOCK_RST# / GPIO13 (+3V_S5) SATA3RXN SATA2/SATA3 HM55 not support {26} INT_LCD_TXLOUT1+ LVDSA_DATA1

DISPLAY PORT C
TP44 AH1 AY49 BE44
SATA SATA3RXP
SATA3TXN
AF3
{26} INT_LCD_TXLOUT2+
AV48
LVDSA_DATA2
LVDSA_DATA3
DDPC_AUXN
DDPC_AUXP
BD44
AF1 TP7046 AV40
PCH_JTAG_TCK SATA3TXP DDPC_HPD
M3 LVDS--B
JTAG_TCK
AD9 AP48 BE40
PCH_JTAG_TMS SATA4RXN LVDSB_CLK# DDPC_0N
K3 AD8 AP47 BD40
JTAG_TMS SATA4RXP LVDSB_CLK DDPC_0P
AD6 BF41
PCH_JTAG_TDI SATA4TXN DDPC_1N
K1 AD5 AY53 BH41
JTAG_TDI JTAG SATA4TXP
AT49
LVDSB_DATA#0
LVDSB_DATA#1
DDPC_1P
DDPC_2N
BD38
PCH_JTAG_TDO J2 AD3 AU52 BC38
JTAG_TDO SATA5RXN TP81 LVDSB_DATA#2 DDPC_2P
AD1 TP77 AT53 BB36
PCH_JTAG_RST# SATA5RXP LVDSB_DATA#3 DDPC_3N
J4 AB3 TP76 BA36
TRST# SATA5TXN DDPC_3P
SATA5TXP
AB1 TP75 AY51
AT48
LVDSB_DATA0
U50
del in VGA
B LVDSB_DATA1 DDPD_CTRLCLK INT_HDMI_SCL {23} B
AU50 U52 INT_HDMI_SDA {23}
SPI_CLK_R LVDSB_DATA2 DDPD_CTRLDATA
BA2 AF16 AT51
SPI_CLK SATAICOMPO LVDSB_DATA3

DISPLAY PORT D
BC46 DDPD_AUXN R265 IV@10K_4
DDPD_AUXN +3V
SPI_CS0#_R AV3 AF15 SATA_COMP R211 37.4/F_4 CRT_BLU AA52 BD46 DDPD_AUXP R266 IV@10K_4
SPI_CS0# SATAICOMPI +1.05V {26} INT_CRT_BLU CRT_BLUE DDPD_AUXP
CRT_GRE AB53 AT38
SPI_CS1# SATA_LED# {26} INT_CRT_GRE CRT_RED CRT_GREEN DDPD_HPD Port-D_HPD {23}
AY3 T3 AD53
TP82 SPI_CS1# SPI SATALED# SATA_LED# {35} {26} INT_CRT_RED CRT_RED
CRT DDPD_0N
BJ40 C_TMDSD_DATA2# del in VGA
V51 BG40 C_TMDSD_DATA2
SPI_SI_R {26} INT_CRT_DDCCLK CRT_DDC_CLK DDPD_0P C_TMDSD_DATA1#
{12} SPI_SI_R AY1
SPI_MOSI
Y9 R216 10K_4
del in VGA {26} INT_CRT_DDCDAT V53
CRT_DDC_DATA DDPD_1N
BJ38
BG38 C_TMDSD_DATA1
(+3V) SATA0GP / GPIO21 +3V DDPD_1P
SPI_SO AV1 V1 R7356 10K_4 R457 IV@0_4 CRT_HSYNC_R Y53 BF37 C_TMDSD_DATA0#
SPI_MISO (+3V_S5) SATA1GP / GPIO19 +3V {26} INT_CRT_HSYNC CRT_HSYNC DDPD_2N
R456 IV@0_4 CRT_VSYNC_R Y51 BH37 C_TMDSD_DATA0
{26} INT_CRT_VSYNC CRT_VSYNC DDPD_2P C_TMDSD_CLK#
IbexPeak-M_Rev1_0 BE36
R267 1K/D_4 DAC_IREF AD48 DDPD_3N C_TMDSD_CLK
BD36
TP107 DAC_IREF DDPD_3P
AB51
CRT_IRTN
TP106 IbexPeak-M_Rev1_0

[RTC] DDP Setting


R250 IV@0_4 LVDS_VREFH
RTC BATTERY LVDS_VREFL

R243 IV@2.37K/F_4 LVDS_IBG


D24
+3VPCU +RTC_CELL
(20mils) SDM10K45-7-F_100MA
(30mils) R463 IV@150/F_4 CRT_BLU
C
(20mils) Port Strap How to enable Port? How to disable Port? R462 IV@150/F_4 CRT_GRE
CRT_RED
C
R461 IV@150/F_4
R_3VRTC
LVDS L_DDC_DATA PU to 3.3V with 2.2k+/- 5% NC
D23 C460

SDM10K45-7-F_100MA 1U/10V_6X
R432 Port B SDVO_CTRLDATA PU to 3.3V with 2.2k+/- 5% NC HDMI
1K_4 TP102
C_TMDSD_DATA2 C484 IHM@0.1U/10V_4X
Port C DDPC_CTRLDATA PU to 3.3V with 2.2k+/- 5% NC TMDSD_DATA2 {23}
RTC_N02

C_TMDSD_DATA2# C483 IHM@0.1U/10V_4X


TMDSD_DATA2# {23}
TP101
TP100
C_TMDSD_DATA1 C475 IHM@0.1U/10V_4X
Port D DDPD_CTRLDATA PU to 3.3V with 2.2k+/- 5% NC C_TMDSD_DATA1# C473 IHM@0.1U/10V_4X
TMDSD_DATA1 {23}
TMDSD_DATA1# {23}
1

TP99
CN14 TP7135
C_TMDSD_DATA0 C471 IHM@0.1U/10V_4X
eDP CFG[4] PD to GND directly NC C_TMDSD_DATA0# C472 IHM@0.1U/10V_4X
TMDSD_DATA0 {23}
TMDSD_DATA0# {23}
TP98
AAA-BAT-054-K01 TP59
C_TMDSD_CLK C314 IHM@0.1U/10V_4X
2

C_TMDSD_CLK# TMDSD_CLK {23}


C308 IHM@0.1U/10V_4X
TMDSD_CLK# {23}
TP58

Alzia {30} ACZ_RST#_AUDIO R444 33_4 ACZ_RST#


RESET JUMP
{30} ACZ_SDOUT_AUDIO R440
C463
33_4 ACZ_SDOUT
*10P/50V_4C +RTC_CELL
An RC delay circuit with a time delay in the range
of 18 ms to 25 ms should be provided 4M byte SPI ROM PCH 2MB 4MB 8MB
{30} ACZ_SYNC_AUDIO R439 33_4 ACZ_SYNC PM55
C462 *10P/50V_4C R418 20K_6 RTC_RST#

D
{30} BIT_CLK_AUDIO R443 33_4 ACZ_BITCLK C451 G2 U21 HM55 D
C464 22P/50V_4N SPI_SO R381 *short_4 SPI_SO_R 2 8
SO VDD +3V
1U/6.3V_4X *SHORT_ PAD
SPI_SI_R R7358 *short_4 SPI_SI 5
SI HOLD
7 SPI_HOLD# R376 3.3K/F_4 HM57/PM57
+1.05V SPI_CLK_R R395 *short_4 SPI_CLK 6 3 SPI_WP# R377 3.3K/F_4
SCK WP QM57/QS57
R373 *51_4 PCH_JTAG_TMS +RTC_CELL SPI_CS0#_R R380 *short_4 SPI_CS0# 1 4
CE VSS C434
R374 *51_4 PCH_JTAG_RST# W25Q32BVSSIG 0.1U/10V_4X
R421 20K_6 SRTC_RST#
R391 *51_4 PCH_JTAG_TDI
C454 G1
Quanta Computer Inc.
R392 *51_4 PCH_JTAG_TDO
1U/6.3V_4X *SHORT_ PAD
PROJECT :TE4
R390 51_4 PCH_JTAG_TCK Size Document Number Rev
A1A
PCH 1/5 (SATA,HDA,LPC)
Date: Monday, January 24, 2011 Sheet 9 of 46
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5 4 3 2 1

IBEX PEAK-M (GND)


AY7
B11
B15
U22I
VSS[159]
VSS[160]
VSS[259]
VSS[260]
H49
H5
J24
IBEX PEAK-M (PCI-E,SMBUS,CLK)
U22B
10
VSS[161] VSS[261]
B19 VSS[162] VSS[262] K11
B23 K43 Ibex-M
B31
VSS[163]
VSS[164]
VSS[263]
VSS[264] K47 TP93 BG30 PERN1 2 OF 10 SMBus SMBALERT#
B35 K7 TP92 BJ30 B9
B39
VSS[165] VSS[265]
L14 TP90 BF29
PERP1 (+3V_S5) SMBALERT# / GPIO11
H14 SCLK
D VSS[166] VSS[266] PETN1 SMBCLK SDATA SCLK {3,31} D
B43 L18 TP91 BH29 C8
VSS[167] VSS[267] PETP1 SMBDATA SDATA {3,31}
B47 L2 J14 SMBL0ALERT#
VSS[168] VSS[268] TP56
(+3V_S5) SML0ALERT# / GPIO60 SMB_CLK_ME0
B7 VSS[169] VSS[269] L22 AW30 PERN2 SML0CLK C6
BG12 L32 TP52 BA30 G8 SMB_DATA_ME0
VSS[170] VSS[270] TP46 PERP2 SML0DATA SML1ALERT#
BB12 VSS[171] VSS[271] L36 BC30 PETN2 (+3V_S5) SML1ALERT# / GPIO74 M14
BB16 L40 TP47 BD30 E10 MBCLK2
BB20
VSS[172] VSS[272]
L52
PETP2 (+3V_S5) SML1CLK / GPIO58
G12 MBDATA2
VSS[173] VSS[273] PCIE_RXN3 (+3V_S5) SML1DATA / GPIO75
BB24 VSS[174] VSS[274] M12 {27} PCIE_RXN3 AU30 PERN3
BB30 M16 {27} PCIE_RXP3 PCIE_RXP3 AT30
VSS[175] VSS[275] C304 3G@0.1U/10V_4X PCIE_TXN3_C AU32 PERP3
BB34 VSS[176] VSS[276] M20 3G {27} PCIE_TXN3 PETN3
BB38 N38 C302 3G@0.1U/10V_4X PCIE_TXP3_C AV32
VSS[177] VSS[277] {27} PCIE_TXP3 PETP3
BB42 M34 T13 T3
VSS[178] VSS[278] TP55 CL_CLK1
BB49
BB5
VSS[179] VSS[279] M38
M42 TP54
BA32
BB32
PERN4 Controller T11 T2
VSS[180] VSS[280] TP49 PERP4 CL_DATA1
BC10
BC14
VSS[181] VSS[281] M46
M49 TP48
BD32
BE32
PETN4 Link T9 T1
VSS[182] VSS[282] PETP4 CL_RST1#
BC18 VSS[183] VSS[283] M5
BC2 M8 {27} PCIE_RXN5 PCIE_RXN5 BF33
VSS[184] VSS[284] PCIE_RXP5 PERN5
BC22 VSS[185] VSS[285] N24 {27} PCIE_RXP5 BH33 PERP5
BC32 P11 WLAN C467 0.1U/10V_4X PCIE_TXN5_C BG32
VSS[186] VSS[286] {27} PCIE_TXN5 PETN5
BC36 AD15 {27} PCIE_TXP5 C470 0.1U/10V_4X PCIE_TXP5_C BJ32
VSS[187] VSS[287] PETP5
BC40 VSS[188] VSS[288] P22
PCIE_RXN6 PCI-E* PEG
BC44 VSS[189] VSS[289] P30 {31} PCIE_RXN6 BA34 PERN6
BC52 P32 PCIE_RXP6 AW34 H1 CLK_PEGA_REQ#
VSS[190] VSS[290] {31} PCIE_RXP6 PERP6 (+3V_S5)PEG_A_CLKRQ# / GPIO47 CLK_PEGA_REQ#
BH9 P34 LAN {31} PCIE_TXN6 C298 0.1U/10V_4X PCIE_TXN6_C BC34 AD43
VSS[191] VSS[291] C291 0.1U/10V_4X PCIE_TXP6_C BD34 PETN6 CLKOUT_PEG_A_N del in UMA
BD48 VSS[192] VSS[292] P42 {31} PCIE_TXP6 PETP6 CLKOUT_PEG_A_P AD45
BD49 VSS[193] VSS[293] P45 CLKOUT_DMI_N AN4 CLK_PCIE_3GPLLN {4}
BD5 VSS[194] VSS[294] P47 AT34 PERN7 CLKOUT_DMI_P AN2 CLK_PCIE_3GPLLP {4}
BE12 VSS[195] VSS[295] R2 AU34 PERP7
C BE16 VSS[196] VSS[296] R52 AU36 PETN7
C
BE20 VSS[197] VSS[297] T12 AV36 PETP7 CLKOUT_DP_N / CLKOUT_BCLK1_N AT1 CLK_DREFSSCLKN {4}
BE24 VSS[198] VSS[298] T41 CLKOUT_DP_P / CLKOUT_BCLK1_P AT3 CLK_DREFSSCLKP {4}
BE30 T46 TP96 BG34
VSS[199] VSS[299] TP95 PERN8
BE34 VSS[200] VSS[300] T49 BJ34 PERP8
BE38 T5 TP7035 BG36 AW24 CLK_BUF_PCIE_3GPLLN {3}
VSS[201] VSS[301] TP97 PETN8 CLKIN_DMI_N
BE42 VSS[202] VSS[302] T8 BJ36 PETP8 CLKIN_DMI_P BA24 CLK_BUF_PCIE_3GPLLP {3}
BE46 VSS[203] VSS[303] U30 AK48 CLKOUT_PCIE0N
BE48 VSS[204] VSS[304] U31 AK47 CLKOUT_PCIE0P
BE50 VSS[205] VSS[305] U32 CLKIN_BCLK_N AP3 CLK_BUF_BCLKN {3}
BE6 U34 PCIE_CLK_REQ0# P9 AP1 CLK_BUF_BCLKP {3}
VSS[206] VSS[306] TP60 PCIECLKRQ0# / GPIO73 (+3V_S5) CLKIN_BCLK_P
BE8 P38 AM43

From CLK BUFFER


VSS[207] VSS[307] TP68 CLKOUT_PCIE1N
BF3 VSS[208] VSS[308] V11 AM45 CLKOUT_PCIE1P
BF49 VSS[209] VSS[309] P16 CLKIN_DOT_96N F18 CLK_BUF_DREFCLKN {3}
BF51 V19 PCIE_CLK_REQ1# U4 E18
VSS[210] VSS[310] PCIECLKRQ1# / GPIO18 (+3V) CLKIN_DOT_96P CLK_BUF_DREFCLKP {3}
BG18 VSS[211] VSS[311] V20
BG24 V22 TP63 AM47
VSS[212] VSS[312] TP67 CLKOUT_PCIE2N
BG4 VSS[213] VSS[313] V30 AM48 CLKOUT_PCIE2P CLKIN_SATA_N / CKSSCD_N AH13 CLK_BUF_DREFSSCLKN {3}
BG50 VSS[214] VSS[314] V31 CLKIN_SATA_P / CKSSCD_P AH12 CLK_BUF_DREFSSCLKP {3}
BH11 V32 PCIE_CLK_REQ2# N4
BH15
VSS[215] VSS[315]
V34
PCIECLKRQ2# / GPIO20 (+3V)
VSS[216] VSS[316] R256 *short_4
BH19 VSS[217] VSS[317] V35 {31} CLK_PCIE_LAN# AH42 CLKOUT_PCIE3N REFCLK14IN P41 CLK_PCH_14M {3}
BH23 VSS[218] VSS[318] V38 {31} CLK_PCIE_LAN AH41 CLKOUT_PCIE3P
BH31 V43 LAN C317 *22P/50V_4N
VSS[219] VSS[319] PCIE_CLK_REQ3# CLK_PCI_FB
BH35 VSS[220] VSS[320] V45 {31} PCIE_CLK_REQ3# A8 PCIECLKRQ3# / GPIO25 CLKIN_PCILOOPBACK J42 CLK_PCI_FB {11}
BH39 V46 (+3V_S5)
VSS[221] VSS[321]
BH43 VSS[222] VSS[322] V47 {27} CLK_PCIE_3G# AM51 CLKOUT_PCIE4N
BH47 V49 AM53 AH51 XTAL25_IN
VSS[223] VSS[323] {27} CLK_PCIE_3G CLKOUT_PCIE4P XTAL25_IN XTAL25_OUT +3V
BH7 VSS[224] VSS[324] V5 3G XTAL25_OUT AH53
C12 V7 PCIE_CLK_REQ4# M9
B VSS[225] VSS[325] {27} PCIE_CLK_REQ4# PCIECLKRQ4# / GPIO26 (+3V_S5) B
C50 V8 AF38 XCLK_RCOMP R254 90.9/F_4 +1.05V
VSS[226] VSS[326] XCLK_RCOMP PCIE_CLK_REQ1# R385 10K_4
D51 VSS[227] VSS[327] W2
E12 W52 {27} CLK_PCIE_MINI# AJ50 PCIE_CLK_REQ2# R389 10K_4
VSS[228] VSS[328] CLKOUT_PCIE5N CLK_FLEX0 R272 10K_4
E16 Y11 {27} CLK_PCIE_MINI AJ52 T45 +3V
VSS[229] VSS[329] CLKOUT_PCIE5P (+3V) CLKOUTFLEX0 / GPIO64 CLK_FLEX1 T18
E20 VSS[230] VSS[330] Y12 WLAN (+3V_S5) (+3V) CLKOUTFLEX1 / GPIO65 P43
E24 Y15 PCIE_CLK_RQ5# H6 T42 CLK_FLEX2 T13
VSS[231] VSS[331] {27} PCIE_CLK_RQ5# PCIECLKRQ5# / GPIO44 (+3V) CLKOUTFLEX2 / GPIO66
E30 Y19 N50 CLK_CARD_5159
VSS[232] VSS[332] (+3V) CLKOUTFLEX3 / GPIO67 CLK_CARD_5159 {32}
E34 VSS[233] VSS[333] Y23
E38 Y28 TP104 AK53
VSS[234] VSS[334] TP103 CLKOUT_PEG_B_N
E42
E46
VSS[235] VSS[335] Y30
Y31
AK51 CLKOUT_PEG_B_P Clock Flex C493 22P/50V_4N +3V_S5
VSS[236] VSS[336] PCIE_CLK_REQB#
E48 VSS[237] VSS[337] Y32 P13 PEG_B_CLKRQ# / GPIO56(+3V_S5)
E6 Y38 PCIE_CLK_REQ0# R124 10K_4
VSS[238] VSS[338] PCIE_CLK_REQ3# R404 *10K_4
E8 VSS[239] VSS[339] Y43
F49 Y46 IbexPeak-M_Rev1_0 PCIE_CLK_REQ4# R173 10K_4
VSS[240] VSS[340] PCIE_CLK_REQB# R144 10K_4
F5 VSS[241] VSS[341] P49
G10 Y5 PCIE_CLK_RQ5# R172 10K_4
VSS[242] VSS[342] SMBALERT# R406 10K_4
G14 VSS[243] VSS[343] Y6
G18 Y8 SMBL0ALERT# R198 10K_4
VSS[244] VSS[344] SMB_CLK_ME0 R399 2.2K_4
G2 VSS[245] VSS[345] P24
G22 T43 SMB_DATA_ME0 R170 2.2K_4
VSS[246] VSS[346] SML1ALERT# R125 10K_4
G32 VSS[247] VSS[347] AD51
MBCLK2 R188 4.7K_4
G36
G40
VSS[248] VSS[348] AT8
AD47
SMBUS CRYSTAL MBDATA2 R189 4.7K_4
VSS[249] VSS[349] SCLK R156 2.2K_4
G44 Y47
G52
VSS[250]
VSS[251]
VSS[350]
VSS[351] AT12 Placement close SDATA R401 2.2K_4
AF39 VSS[252] VSS[352] AM6
H16 AT13 CLK_PEGA_REQ# R393 IV@10K_4
VSS[253] VSS[353] Q15 2N7002_200MA R464 EV@0_4
H20 VSS[254] VSS[354] AM5
A H30 AK45 MBCLK2 1 3 R367 *EV@10K_4 A
VSS[255] VSS[355] 2ND_MBCLK {33}
H34 VSS[256] VSS[356] AK39
H38 VSS[257] VSS[366] AV14
H42 XTAL25_IN C491 IV@27P/50V_4N
2

VSS[258]
+3V_S5
IbexPeak-M_Rev1_0 2
2

Y5

MBDATA2
R455
IV@1M/F_4 IV@25MHZ_30
Quanta Computer Inc.
1 3
1

2ND_MBDATA {33}
Q13 2N7002_200MA XTAL25_OUT C495 IV@27P/50V_4N PROJECT : TE4
Size Document Number Rev
A1A
PCH 2/5 (PCIE, SMBUS, CK)
Date: Monday, January 24, 2011 Sheet 10 of 46
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IBEX PEAK-M (PCI,USB,NVRAM)


H40
U22E
Ibex-M AY9 {4} DMI_RXN0
IBEX PEAK-M (DMI,FDI,GPIO)

BC24
U22C

Ibex-M
FDI_RXN0 BA18
BH17
FDI_TXN0
FDI_TXN1
{4}
{4}
11
AD0 NV_CE#0 DMI0RXN FDI_RXN1
N34 AD1 5 OF 10 NV_CE#1 BD1 {4} DMI_RXN1 BJ22 DMI1RXN 3 OF 10 FDI_RXN2 BD16 FDI_TXN2 {4}
C44 AD2 NV_CE#2 AP15 {4} DMI_RXN2 AW20 DMI2RXN FDI_RXN3 BJ16 FDI_TXN3 {4}
A38 AD3 NV_CE#3 BD8 {4} DMI_RXN3 BJ20 DMI3RXN FDI_RXN4 BA16 FDI_TXN4 {4}
C36 AD4 FDI_RXN5 BE14 FDI_TXN5 {4}
J34 AD5 NV_DQS0 AV9 {4} DMI_RXP0 BD24 DMI0RXP FDI_RXN6 BA14 FDI_TXN6 {4}
A40 BG8 BG22 BC12
A D45
E36
AD6
AD7
NVRAM NV_DQS1
AP7
{4}
{4}
DMI_RXP1
DMI_RXP2 BA20
BG20
DMI1RXP
DMI2RXP
FDI_RXN7
BB18
FDI_TXN7 {4} A

AD8 NV_DQ0 / NV_IO0 {4} DMI_RXP3 DMI3RXP FDI_RXP0 FDI_TXP0 {4}


H48 AD9 NV_DQ1 / NV_IO1 AP6 FDI_RXP1 BF17 FDI_TXP1 {4}
E40 AD10 NV_DQ2 / NV_IO2 AT6 {4} DMI_TXN0 BE22 DMI0TXN FDI_RXP2 BC16 FDI_TXP2 {4}
C40 AT9 BF21 BG16
M48
AD11
AD12
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4 BB1
{4}
{4}
DMI_TXN1
DMI_TXN2 BD20
DMI1TXN
DMI2TXN
DMI FDI FDI_RXP3
FDI_RXP4 AW16
FDI_TXP3
FDI_TXP4
{4}
{4}
M45 AD13 NV_DQ5 / NV_IO5 AV6 {4} DMI_TXN3 BE18 DMI3TXN FDI_RXP5 BD14 FDI_TXP5 {4}
F53 AD14 NV_DQ6 / NV_IO6 BB3 FDI_RXP6 BB14 FDI_TXP6 {4}
M40 AD15 NV_DQ7 / NV_IO7 BA4 {4} DMI_TXP0 BD22 DMI0TXP FDI_RXP7 BD12 FDI_TXP7 {4}
M43 AD16 NV_DQ8 / NV_IO8 BE4 {4} DMI_TXP1 BH21 DMI1TXP
J36 AD17 NV_DQ9 / NV_IO9 BB6 {4} DMI_TXP2 BC20 DMI2TXP
K48 AD18 NV_DQ10 / NV_IO10 BD6 {4} DMI_TXP3 BD18 DMI3TXP FDI_INT BJ14 FDI_INT {4}
F40 AD19 NV_DQ11 / NV_IO11 BB7 FDI_FSYNC0 BF13 FDI_FSYNC0 {4}
C42 AD20 NV_DQ12 / NV_IO12 BC8 FDI_FSYNC1 BH13 FDI_FSYNC1 {4}
K46 AD21 NV_DQ13 / NV_IO13 BJ8 BH25 DMI_ZCOMP FDI_LSYNC0 BJ12 FDI_LSYNC0 {4}
M51 BJ6 +1.05V R424 49.9/F_4 DMI_COMP BF25 BG14 FDI_LSYNC1 {4}
AD22 NV_DQ14 / NV_IO14 DMI_IRCOMP FDI_LSYNC1
J52 AD23 NV_DQ15 / NV_IO15 BG6
K51 AD24
L34 BD3 NV_ALE {4} SYS_RESET# System Power Management
AD25 NV_ALE NV_ALE {12}
F42 AY6 SYS_RESET# T6 P12 SUSB# {33}
AD26 NV_CLE SYS_PWROK R123 *short_4 SYS_RESET# SLP_S3#
J40 AD27 M6 SYS_PWROK SLP_S4# H7 SUSC# {33}
G46 R428 *short_4 B17
AD28 NV_RCOMP R382 *32.4/F_4 R153 *short_4 PWROK SLP_M#
F44 AD29 NV_RCOMP AU2 K5 MEPWROK SLP_M# K8 TP34
M47 N2
H36
AD30
AD31
PCI NV_RB# AV7 RSV_ICH_LAN_RST# A10
D9
LAN_RST#
TP23
M1 SUS_PWR_ACK_R
TP78
{4,8} PM_DRAM_PWRGD DRAMPWROK (+3V_S5) SUS_PWR_DN_ACK / GPIO30
J50 AY8 {33} RSMRST# RSMRST# C16 P7 AC_PRESENT
C/BE0# NV_WR#0_RE# RSMRST# (+3V_S5) ACPRESENT / GPIO31 CLKRUN#
G42 C/BE1# NV_WR#1_RE# AY5 Y1 CLKRUN# {33}
H47 DNBSWON# P5
(+3V) CLKRUN# / GPIO32 P8 RSV_SUS_SATA# TP37
C/BE2# {33} DNBSWON# PWRBTN# (+3V_S5) SUS_STAT# / GPIO61
G34 AV11 F3
C/BE3# NV_WE#_CK0
BF5
(+3V_S5) SUSCLK / GPIO62
E4 SLP_S5# TP79
PCI_PIRQA# NV_WE#_CK1 PM_RI#
(+3V_S5) SLP_S5# / GPIO63 PM_BATLOW# TP33
G38 PIRQA# F14 RI# A6
B PCI_PIRQB# H51 PCIE_WAKE# J12
(+3V_S5) BATLOW# / GPIO72 B
PIRQB# {31} PCIE_WAKE# WAKE#
PCI_PIRQC#
PCI_PIRQD#
B37
A44
PIRQC# USBP0N H18
J18
USBP0- {26} CCD {4} PM_SYNC BJ10 PMSYNCH (+3V_S5) SLP_LAN# / GPIO29 F6
TP32
PIRQD# USBP0P USBP0+ {26}
USBP1N A18 TP84
REQ0# F51 C18 IbexPeak-M_Rev1_0
REQ0# USBP1P TP83
REQ1# A46 N20 TP36
REQ2# REQ1# / GPIO50 (+5V) USBP2N
B45 REQ2# / GPIO52 USBP2P P20 TP38
REQ3# M53
(+5V) J20
REQ3# / GPIO54 (+5V) USBP3N
USBP3P L20
USBP3-
USBP3+
{32}
{32} Card Reader
F48 F20
{12}
{12}
GNT0#
GNT1# K45
GNT0#
GNT1# / GPIO51 (+3V)
USBP4N
USBP4P G20
USBP4-
USBP4+
{27}
{27} SIM
TP94 F36 A20
{12} GNT3# H53
GNT2# / GPIO53
GNT3# / GPIO55
(+3V)
(+3V)
USBP5N
USBP5P C20
USBP5-
USBP5+
{27}
{27} WLAN
USBP6N M22 TP40
PIRQE#
PIRQF#
B41
K53
PIRQE# / GPIO2 (+5V) USBP6P N22
B21
TP39
TP86
USB6/USB7 HM55 not support
PIRQG# PIRQF# / GPIO3 (+5V) USBP7N
A36 PIRQG# / GPIO4 USBP7P D21 TP88
(+5V)
INTH# A48 PIRQH# / GPIO5 (+5V) USBP8N H22
J22
USBP8- {26} USB for daughter board
USBP8P USBP8+ {26}
+3V R174 8.2K_4 K6 PCIRST# USBP9N E22
F22
USBP9- {28} USB for left side 1
USBP9P USBP9+ {28}
PCI_SERR# E44 A22
PCI_PERR# E50
SERR#
PERR#
USB USBP10N
USBP10P C22
G24
USBP10-
USBP10+
{27}
{27} 3G
USBP11N TP42
USBP11P H24 TP89
PCI_IRDY# A42 L24 TP43
IRDY# USBP12N
PCI_DEVSEL#
H44
F46
PAR USBP12P M24
A24
TP41 EMI SUS_PWR_ACK
DEVSEL# USBP13N USBP13- {28}
PCI_FRAME# C46 FRAME# USBP13P C24 USBP13+ {28} USB for left side 2
PCI_PLOCK# D49 +3V_S5
PLOCK# USB_BIAS R427 22.6/F_4
USBRBIAS# B25
C PCI_STOP# D41 C
STOP#

2
PCI_TRDY# C48 D25 Q33 2N7002_200MA
TRDY# USBRBIAS PCLK_DEBUG
TP29
C3A SUS_PWR_ACK_R
M7 PME#
N16 USB_OC0#
B2A R5837
B2A
*0_4 CLK_PCI_FB
{33} SUS_PWR_ACK 3 1
(+3V_S5)OC0# / GPIO59 USB_BUS_SW0 {28}
PLT_RST-R# D5 J16 USB_OC1# R475 *0_4
PLTRST# (+3V_S5)OC1# / GPIO40 SC_CB {28,33}
F16 USB_OC2# PCLK_591
R458 22_4 CLK_33M_LPC_R N52
(+3V_S5)OC2# / GPIO41 L16 USB_OC3# R476 *0_4
{27} PCLK_DEBUG CLKOUT_PCI0 (+3V_S5)OC3# / GPIO42 SC_CB1 {28,33}
TP105 P53 E14 USBOC#8
CLKOUT_PCI1 (+3V_S5)OC4# / GPIO43 USBOC#8 {26,33}
TP69 P46 G16 USB_OC5# R7354 *0_4
R276 22_4 CLK_PCI_FB_R CLKOUT_PCI2 (+3V_S5) OC5# / GPIO9 USBOC#13_9 C492 C327 C323
{10} CLK_PCI_FB P51 F12 USBOC#13_9 {28,33}
R268 22_4 CLK_PCI_EC P48
CLKOUT_PCI3 (+3V_S5)OC6# / GPIO10 T15 SCI#
{33} PCLK_591 CLKOUT_PCI4 (+3V_S5)OC7# / GPIO14 SCI# {33}
*E@22P/50V_4N *E@22P/50V_4N *E@22P/50V_4N

IbexPeak-M_Rev1_0

B2A EMI PWROK


+3V_S5

C259 0.1U/10V_4X
Study Cost Down
RESET
R217 *0_4
+3V +3V_S5 +3V
RP8 +3V_S5

5
5 6 PCI_SERR# PM_RI# R203 10K_4 REQ2# R260 8.2K_4 1
{4,41} DELAY_VR_PWRGOOD
PCI_IRDY# 4 7 PCI_PIRQD# PM_BATLOW# R396 10K_4 PIRQE# R252 8.2K_4 4 SYS_PWROK
PCI_STOP# 3 8 PCI_FRAME# PCIE_WAKE# R148 10K_4 PIRQF# R459 8.2K_4 2
{4,33} MPWROK
PCI_PIRQA# 2 9 REQ1# SUS_PWR_ACK_R R372 10K_4 CLKRUN# R7357 8.2K_4 U8 C236 U13

3
PCI_PIRQC# 1 10 +3V AC_PRESENT R154 10K_4 PIRQG# R446 8.2K_4 *TC7SH08FU(F) *0.1U/10V_4X TC7SH08FU(F) R210
5

DNBSWON# R129 *10K_4 SYS_RESET# R128 1K_4


D 8.2KX8 PLT_RST-R# 2 R218 100K_4 10K_4 D

1
4 PLTRST# {4,27,31,33} D3B
R180 R150 D27 2 1 *LCP0G050M0R2R SYS_PWROK
3

+3V_S5 +3V *100K/F_4 C232


RP6 RP9 100K_4 0.1U/10V_4X
SCI# PCI_PLOCK#
USBOC#13_9
5
4
6
7 USB_OC0#
B2A REQ3#
5
4
6
7 PCI_PERR# RSMRST# R419 10K_4 R167 *SHORT_4 Quanta Computer Inc.
USB_OC5# 3 8 USB_OC1# PCI_DEVSEL# 3 8 REQ0# RSV_ICH_LAN_RST# R407 10K_4
USB_OC2# USBOC#8 INTH# PCI_PIRQB# TP24
USB_OC3#
2
1
9
10 PCI_TRDY#
2
1
9
10
D3B PROJECT : TE4
+3V_S5 +3V
R131 EV@0_4 Size Document Number Rev
VGA_PLTRST#
8.2KX8 8.2KX8 A1A
PCH 3/5 (PCI,ONFI,USB,DMI)
Date: Monday, January 24, 2011 Sheet 11 of 46
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BOARD_ID1
IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)
Y3
U22F

BMBUSY# / GPIO0(+3V)
Ibex-M
6 OF 10 CLKOUT_PCIE6N AH45 TP62
IBEX PEAK-M (GND)
AB16
U22H

VSS[0] VSS[80] AK30


12
PCH Strap Pin Configuration Table
AH46 TP66 AA19 AK31
BOARD_ID6 CLKOUT_PCIE6P VSS[1] VSS[81]
C38 AA20 AK32
TACH1 / GPIO1 (+3V) AA22
VSS[2] VSS[82]
AK34
GPIO6 VSS[3] VSS[83]
D37 TACH2 / GPIO6 (+3V) AM19 VSS[4] VSS[84] AK35
AF48 TP70 AA24 AK38
BOARD_ID4 CLKOUT_PCIE7N TP61 VSS[5] VSS[85]
J32 AF47 AA26 AK43

GPIO8
TACH3 / GPIO7 (+3V) GPIO CLKOUT_PCIE7P
AA28
VSS[6]
VSS[7]
VSS[86]
VSS[87] AK46
F10 GPIO8(+3V_S5) MISC AA30 VSS[8] VSS[88] AK49 SPKR
AA31 VSS[9] VSS[89] AK5
GPIO12 K9 U2 GATEA20 GATEA20 {33} AA32 AK8
LAN_PHY_PWR_CTRL / GPIO12 (+3V_S5) A20GATE VSS[10] VSS[90]
A AB11 VSS[11] VSS[91] AL2 A
GPIO15 T7 AB15 AL52 *1K/F_4 R388
GPIO15 (+3V_S5) VSS[12] VSS[92] {9,30} PCBEEP +3V
AB23 VSS[13] VSS[93] AM11
GPIO16 AA2 AM3 AB30 BB44
SATA4GP / GPIO16 (+3V) CLKOUT_BCLK0_N/CLKOUT_PCIE8N CLK_CPU_BCLKN {4} VSS[14] VSS[94]
AB31 VSS[15] VSS[95] AD24 0 = Default Mode (Internal weak Pull-down)
GPIO17 F38 AM1 AB32 AM20
TACH0 / GPIO17(+3V) CLKOUT_BCLK0_P/CLKOUT_PCIE8P CLK_CPU_BCLKP {4}
AB39
VSS[16] VSS[96]
AM22
1 = No Reboot Mode with TCO Disabled
GPIO22 PCH_PECI_R VSS[17] VSS[97]
Y7 SCLOCK / GPIO22(+3V) PECI BG10 H_PECI {4} AB43 VSS[18] VSS[98] AM24
AB47 VSS[19] VSS[99] AM26
GPIO27 AB12 T1 RCIN# RCIN# {33} AB5 AM28 GNT3#/
GPIO27 (+3V_S5) RCIN# VSS[20] VSS[100]
AB8 BA42
GPIO28 V13 GPIO28 (+3V_S5)
CPU PROCPWRGD BE10 H_PWRGOOD {4} AC2
VSS[21]
VSS[22]
VSS[101]
VSS[102] AM30 GPIO55
AC52 VSS[23] VSS[103] AM31
ESATA_DN# AB7 BD10 PCH_THRMTRIP#_R R185 56.2/F_4 AD11 AM32
SATA2GP / GPIO36 (+3V) THRMTRIP# PM_THRMTRIP# {4} VSS[24] VSS[104]
AD12 AM34 {11} GNT3# R460 *10K/F_4
GPIO37 VSS[25] VSS[105]
AB13 SATA3GP / GPIO37 TP1 BA22 AD16 VSS[26] VSS[106] AM35
(+3V) AW22 R181 56.2/F_4 AD23 AM38
TP2 +VTT VSS[27] VSS[107]
GPIO39 P3 BB22 AD30 AM39
SDATAOUT0 / GPIO39 (+3V) TP3 VSS[28] VSS[108]
TP4 AY45 AD31 VSS[29] VSS[109] AM42
TP5 AY46 AD32 VSS[30] VSS[110] AU20 0 = Default Mode (Internal weak Pull-down)
GPIO46 F1 AV43 AD34 AM46
{8} DDR3_DRAMRST#_PCH PCIECLKRQ7# / GPIO46(+3V_S5) TP6
AV45 AU22
VSS[31] VSS[111]
AV22
1 = No Reboot Mode with TCO Disabled
BOARD_ID5 TP7 VSS[32] VSS[112]
AB6 SDATAOUT1 / GPIO48 (+3V) TP8 AF13 AD42 VSS[33] VSS[113] AM49
TP9 M18 AD46 VSS[34] VSS[114] AM7
TEMP_ALERT# AA4 N18 AD49 AA50
{4,33} TEMP_ALERT# SATA5GP / GPIO49 (+3V) TP10 VSS[35] VSS[115]
RSVD TP11 AJ24 AD7 VSS[36] VSS[116] BB10 HDA_DOCK_EN
AK41 AE2 AN32
TP12
AK42 AE4
VSS[37] VSS[117]
AN50 #/GPIO33
TP13 VSS[38] VSS[118]
TP14 M32 AF12 VSS[39] VSS[119] AN52
C3A GPIO24 H10 N32 Y13 AP12 JP1 *SHORT PAD
{28,33} USB_BUS_SW1 GPIO45 GPIO24 (+3V_S5) TP15 VSS[40] VSS[120]
H3 M30 AH49 AP42 R237 1K/F_4 2 1
PCIECLKRQ6# / GPIO45 (+3V_S5) TP16 VSS[41] VSS[121] {9,33} PCH_GPIO33
GPIO57 F8 N30 AU4 AP46
BOARD_ID2 GPIO57 (+3V_S5) TP17 VSS[42] VSS[122]
M11 STP_PCI# / GPIO34 TP18 H12 AF35 VSS[43] VSS[123] AP49
BOARD_ID3 V6 (+3V) AA23 AP13 AP5
GPIO38 SATACLKREQ# / GPIO35(+3V) TP19 VSS[44] VSS[124]
V3 SLOAD / GPIO38 (+3V) NC_1 AB45 AN34 VSS[45] VSS[125] AP8 0 = Top Block Swap Mode
AB38 AF45 AR2
NC_2
AB42 AF46
VSS[46] VSS[126]
AR52
1 = Default Mode (Internal pull-up)
NC_3 VSS[47] VSS[127]
B NC_4 AB41 AF49 VSS[48] VSS[128] AT11 B
NC_5 T39 AF5 VSS[49] VSS[129] BA12
P6 TP28 AF8 AH48 GNT0#,
INIT3_3V# VSS[50] VSS[130] GNT0# R270 *1K/F_4
TP24 C10 AG2 VSS[51] VSS[131] AT32 {11} GNT0#
AG52 AT36 GNT1# {11} GNT1#
GNT1# R271 *1K/F_4
VSS[52] VSS[132]
A4 VSS_NCTF_1 VSS_NCTF_16 BH2 AH11 VSS[53] VSS[133] AT41
A49 VSS_NCTF_2 VSS_NCTF_17 BH52 AH15 VSS[54] VSS[134] AT47
A5 VSS_NCTF_3 VSS_NCTF_18 BH53 AH16 VSS[55] VSS[135] AT7
A50 VSS_NCTF_4 NCTF VSS_NCTF_19 BJ1 AH24 VSS[56] VSS[136] AV12
A52 VSS_NCTF_5 VSS_NCTF_20 BJ2 AH32 VSS[57] VSS[137] AV16 Boot BIOS Strap
A53 VSS_NCTF_6 VSS_NCTF_21 BJ4 AV18 VSS[58] VSS[138] AV20
B2 VSS_NCTF_7 VSS_NCTF_22 BJ49 AH43 VSS[59] VSS[139] AV24 PCI_GNT0# GNT#1 Boot BIOS Location
B4 VSS_NCTF_8 VSS_NCTF_23 BJ5 AH47 VSS[60] VSS[140] AV30
B52 VSS_NCTF_9 VSS_NCTF_24 BJ50 AH7 VSS[61] VSS[141] AV34 0 0 LPC
B53 VSS_NCTF_10 VSS_NCTF_25 BJ52 AJ19 VSS[62] VSS[142] AV38
BE1 BJ53 AJ2 AV42 0 1 Reserved (NAND)
VSS_NCTF_11 VSS_NCTF_26 VSS[63] VSS[143]
BE53 VSS_NCTF_12 VSS_NCTF_27 D1 AJ20 VSS[64] VSS[144] AV46
BF1 D2 AJ22 AV49 1 0 PCI
VSS_NCTF_13 VSS_NCTF_28 VSS[65] VSS[145]
BF53 VSS_NCTF_14 VSS_NCTF_29 D53 AJ23 VSS[66] VSS[146] AV5
BH1 E1 AJ26 AV8 1 1 SPI
VSS_NCTF_15 VSS_NCTF_30 VSS[67] VSS[147]
VSS_NCTF_31 E53 AJ28 VSS[68] VSS[148] AW14
AJ32 VSS[69] VSS[149] AW18
IbexPeak-M_Rev1_0 AJ34 AW2
VSS[70] VSS[150]
AT5 VSS[71] VSS[151] BF9 SPI_MOSI
AJ4 VSS[72] VSS[152] AW32
AK12 VSS[73] VSS[153] AW36
AM41 VSS[74] VSS[154] AW40
AN19 AW52 R7355 *1K_4 +3V
VSS[75] VSS[155] {9} SPI_SI_R
AK26 VSS[76] VSS[156] AY11
AK22 VSS[77] VSS[157] AY43
AK23 VSS[78] VSS[158] AY47
AK28 VSS[79] NV_ALE
IbexPeak-M_Rev1_0 R403 *10K_4 +1.8V
{11} NV_ALE

1 = Enabled
C C
0 = Disabled (Default)
+3V_S5 +3V
GPIO8 GPIO8 R149 10K_4 +3V_S5
GPIO46 R394 10K_4 GPIO16 R368 10K_4 +3V

GPIO45 R375 *10K_4 GPIO17 R239 10K_4


RCIN# R386 10K_4 This signal has a weak internal pull up.
GPIO24 R178 *10K_4 GPIO22 R118 10K_4
GATEA20 R371 10K_4 NOTE: This signal should not be pulled low
GPIO57 R192 10K_4 ESATA_DN# R202 10K_4
TEMP_ALERT# R383 10K_4 GPIO15
GPIO27 R169 *10K_4 GPIO37 R146 10K_4
GPIO6 R447 10K_4 GPIO15 R126 1K_4 +3V_S5
GPIO12 R171 10K_4 GPIO39 R387 10K_4

0 = Intel ME Crypto Transport Layer Security (TLS) cipher


suite with no confidentiality
1 = Intel ME Crypto Transport Layer Security (TLS) cipher
suite with confidentiality
BOARD ID SETTING GPIO27
Board ID ID1 ID2 ID3 ID4 ID5 ID6 GPIO28 GPIO38 GPIO27 R182 *10K_4

UMA SKU H +3V +3V +3V


+3V_S5 +3V +3V 0 = Disables the VccVRM. Need to use
VGA SKU L
on-board filter circuits for analog rails.
W/ MDC H
W/O MDC L R244 R263 R127 R122 R369 1 = Enables the internal VccVRM to have a clean supply for analog rails.
R157 10K_4 10K_4 No need to use on-board filter circuit.
W/ HDMI H 10K_4 HM@10K_4 10K_4 IV@10K_4
W/O HDMI L This signal has a weak internal pull-up.
GPIO28 BOARD_ID6 BT_Detect# BOARD_ID4 CPUSB# {27} BOARD_ID3 BOARD_ID2 BOARD_ID1
W/O 3G H BOARD_ID5
D W/ 3G L GPIO38 D

15" H R384 R145 R152 R370


14" L 10K_4 R191
NHM@10K_4 *10K_4 EV@10K_4
W/O BT H 10K_4
W/ BT L
14 or 15 H
13 L
Old HW(2010) H Quanta Computer Inc.
New HW(2011) L
PROJECT : TE4D
Size Document Number Rev
A1A
PCH 4/5 (GPIO & Strap)
Date: Monday, January 24, 2011 Sheet 12 of 46
1 2 3 4 5 6 7 8

HTTP://FAQP.RU/
1 2 3 4 5 6 7 8

13
+VCCA_DAC_1_2=69mA(15mils)

+VCCA_DAC_1_2 R465 HCB1608KF-181T15_1.5A +3V


+1.05V R467 *0_6 +3V_LDO
U22J POWER
Ibex-M
C498 10U/6.3V_8X TP71 VCCACLK AP51 10 OF 10VCCIO[5] V24 +1.05V_VCCUSBCORE R238 *short_6 +1.05V
VCCACLK[1]
*short_8 VCCIO[6] V26
VCCCORE = 1.432A(80mils) C496 *10U/6.3V_8X AP53 Y24 C278 1U/6.3V_4X
R257
+1.05V_VCCCORE_ICH
U22G POWER C489 0.1U/10V_4X C267
DCPSUSBYP
0.1U/10V_4X
Y20
VCCACLK[2]
DCPSUSBYP
VCCIO[7]
VCCIO[8] Y26
A
C286 1U/6.3V_4X
AB24 VCCCORE[1] VCCADAC[1] AE50 USB +3V_S5_VCCPUSB R431 *short_6
A
AB26 VCCCORE[2] Ibex-M VCCSUS3_3[1] V28 +3V_S5
AB28 7 OF 10 AE52 C488 0.01U/25V_4X VCCLAN = 0.32A(30mils) U28
C7235 4.7U/6.3V_6X VCCCORE[3] VCCADAC[2] VCCSUS3_3[2] C277 0.1U/10V_4X
AD26 VCCCORE[4] VCCSUS3_3[3] U26
R412 *short_6 +1.05V_VCCAUX
AD28
AF26
VCCCORE[5] CRT VSSA_DAC[1] AF53 +1.05V AF23 VCCLAN[1] VCCSUS3_3[4] U24
P28 C274 0.1U/10V_4X
VCCCORE[6] VCCSUS3_3[5]
AF28 VCCCORE[7] VSSA_DAC[2] AF51 VCCALVDS= 59mA(15mils) AF24 VCCLAN[2] VCCSUS3_3[6] P26
AF30 N28 C282 *0.047U/10V_4X
VCCCORE[8] R240 EV@0_6 VCCSUS3_3[7]
AF31 VCCCORE[9] VCCSUS3_3[8] N26
AH26 AH38 VCCALVDS R251 IV@0_6 +3V VCCME = 1.849A(100mils) AD38 M28
+1.05V VCCCORE[10] VCCALVDS VCCME[1] VCCSUS3_3[9]
AH28 VCCCORE[11] VSSA_LVDS AH39 VCCSUS3_3[10] M26
R261 EV@0_6 R258 *short_8 +1.05V_VCCEPW
AH30
AH31
VCCCORE[12] LVDS AP43 VCCTX_LVDS R262 IV@0.1uh_8_250MA
+1.05V AD39 VCCME[2] VCCSUS3_3[11] L28
L26
VCCCORE[13] VCCTX_LVDS[1] +1.8V VCCSUS3_3[12]
AJ30 AP45 C319 IV@4.7U/6.3V_6X AD41 J28
VCCCORE[14] VCCTX_LVDS[2] C316 IV@0.1U/10V_4X VCCME[3] VCCSUS3_3[13]
*short_6 AJ31 VCCCORE[15] VCCTX_LVDS[3] AT46 VCCSUS3_3[14] J26
+1.05V AT45 C313 IV@0.01U/25V_4X AF43 H28
R423 VCCTX_LVDS[4] VCCME[4] VCCSUS3_3[15]
40mA(15mils) VCC CORE VCCSUS3_3[16] H26
C311 10U/6.3V_8X AF41 G28
+1.05V_PCH_VCCDPLL_EXP +3V_VCC_GIO R245 *short_6 VCCME[5] VCCSUS3_3[17]
AK24 VCCIO[24] VCC3_3[2] AB34 +3V VCCSUS3_3[18] G26
R441 R430 C312 10U/6.3V_8X AF42 F28
TP87 +V1.1LAN_VCCAPLL_EXP C303 0.1U/10V_4X VCCME[6] VCCSUS3_3[19]

Clock and Miscellaneous


BJ24 VCCAPLLEXP VCC3_3[3] AB35 VCCSUS3_3[20] F26
C301 1U/6.3V_4X
*short_1206 *short_1206
HVCMOS V39 VCCME[7] VCCSUS3_3[21] E28
AN20 VCCIO[25] VCC3_3[4] AD35 VCC3_3 = 0.357A(30mils) VCCSUS3_3[22] E26
AN22 C307 1U/6.3V_4X V41 C28
+V1.1S_VCC_EXP VCCIO[26] VCCME[8] VCCSUS3_3[23]
AN23 VCCIO[27] VCCSUS3_3[24] C26
C290 4.7U/6.3V_6X AN24 VCCVRM= 196mA(15mils) C299 1U/6.3V_4X V42 B27
VCCIO[28] VCCME[9] VCCSUS3_3[25]
AN26 VCCIO[29] VCCSUS3_3[26] A28
B C474 C458 1U/6.3V_4X AN28 AT24 +1.8S_VCCADMI_VRM R420 *short_6 +1.8V Y39 A26 B
+ VCCIO[30] VCCVRM[2] VCCME[10] VCCSUS3_3[27]
BJ26 VCCIO[31]
C275 1U/6.3V_4X BJ28 AT16 VCCDMI R207 *short_6 +VTT Y41 U23 +1.05V_VCCUSBCORE
*330U/2V_7343P_E6b VCCIO[32] VCCDMI[1] VCCME[11] VCCSUS3_3[28]
C456 1U/6.3V_4X
AT26 VCCIO[33] DMI C252 1U/6.3V_4X
AT28 VCCIO[34] VCCDMI[2] AU16 Y42 VCCME[12] VCCIO[56] V23 V5REF_SUS< 1mA
AU26 VCCIO[35]
C276 1U/6.3V_4X AU28 VCCDMI= 61mA(15mils) +VCCRTCEXT V9 F24 V5REF_SUS R225 100/F_4 +5V_S5
VCCIO[36] C248 0.1U/10V_4X DCPRTC V5REF_SUS
AV26 VCCIO[37]
C457 0.1U/10V_4X D13 SDM10K45-7-F_100MA
AV28 VCCIO[38] PCI E* VCCPNAND[1] AM16 +3V_S5
AW26 VCCIO[39] VCCPNAND[2] AK16 VCCPNAND= 156mA(15mils) +1.8V AU24 VCCVRM[3]
C283 0.1U/10V_4X AW28 AK20 C281 1U/6.3V_4X
VCCIO[40] VCCPNAND[3] +V_NVRAM_VCCQ R409 *short_8
BA26 VCCIO[41] VCCPNAND[4] AK19 +1.8V
C271 0.1U/10V_4X BA28 AK15 +V1.1LAN_VCCA_A_DPL BB51 V5REF< 1mA
VCCIO[42] VCCPNAND[5] C263 0.1U/10V_4X VCCADPLLA[1]
BB26 VCCIO[43] VCCPNAND[6] AK13 BB53 VCCADPLLA[2]
BB28 AM12 K49 V5REF R253 100/F_4 +5V
VCCIO[44] VCCPNAND[7] V5REF
VCCIO = 3.062A(150mils) BC26 VCCIO[45] VCCPNAND[8] AM13
BC28 AM15 +V1.1LAN_VCCA_B_DPL BD51 D15 SDM10K45-7-F_100MA +3V
VCCIO[46] VCCPNAND[9] VCCADPLLB[1]
BD26 VCCIO[47] BD53 VCCADPLLB[2] PCI/GPIO/LPC
BD28 VCCIO = 3.062A(150mils) C321 1U/6.3V_4X
VCCIO[48]
BE26 VCCIO[49] NAND / SPI R454 *short_6 +1.05V_SSCVCC
AH23 VCCIO[21] +3V_VCCPPCI R249 *short_6
BE28 VCCIO[50] VCCME3_3= 85mA(15mils) +1.05V AJ35 VCCIO[22] VCC3_3[8] J38 +3V
BG26 VCCIO[51] VCCME3_3[1] AM8 AH35 VCCIO[23] VCC3_3[9] L38
BG28 AM9 +3.3V_VCCME_SPI R195 *short_6 +3V C273 1U/6.3V_4X AF34 M36
VCCIO[52] VCCME3_3[2] C296 1U/6.3V_4X VCCIO[2] VCC3_3[10] C294 0.1U/10V_4X
BH27 VCCIO[53] VCCME3_3[3] AP11 AH34 VCCIO[3] VCC3_3[11] N36
C322 *0.1U/10V_4X AN30 AP9 C247 0.1U/10V_4X C289 1U/6.3V_4X AF32 P36 C306 0.1U/10V_4X
VCCIO[54] VCCME3_3[4] VCCIO[4] VCC3_3[12]
AN31 VCCIO[55] VCC3_3[13] U35
VCC3_3[14] AD13
C +3V R275 *short_6 +3V_VCCA3GBG AN35 C250 0.1U/10V_4X +VCCSST V12 C
VCC3_3[1] DCPSST
+V1.1LAN_INT_VCCSUS Y22
R417 *short_6 +VCCAFDI_VRM C268 0.1U/10V_4X DCPSUS
+1.8V AT22 VCCVRM[1]
FDI VCCSUS3_3 = 0.163A(20mils) PCI/GPIO/LPC VCCSATAPLL[1] AK3
TP85 +V1.1LAN_VCCAPLL_FDI BJ18 P18 AK1 +V1.1LAN_VCCAPLL TP80
VCCFDIPLL R226 *short_6 +3V_S5_VCCPSUS VCCSUS3_3[29] VCCSATAPLL[2]
+3V_S5 U19 VCCSUS3_3[30]
+1.05V R413 *short_6 +1.05V_VCCDPLL_FDI AM23 VCCIO[1] U20 VCCSUS3_3[31]
C257 0.1U/10V_4X U22 AT20 R215 *short_6 +1.8V
IbexPeak-M_Rev1_0 VCCSUS3_3[32] VCCVRM[4]
37mA(15mils)
VCC3_3 = 0.357A(30mils) V15 VCC3_3[5] VCCIO[9] AH22 VCCIO = 3.062A(150mils)
V16 VCC3_3[6] VCCIO[10] AH19
+3V R7359 *short_6 +3V_VCCPCORE Y16 AD20 +VCC_SATA R379 *short_8 +1.05V
C258 0.1U/10V_4X VCC3_3[7] VCCIO[11]
VCCIO[12] AF22
AD19 C269 1U/6.3V_4X
VCCIO[13]
V_CPU >1mA(15mils) AT18 V_CPU_IO[1] VCCIO[14] AF20

R416 *short_6 +VTT_VCCPCPU


AU18 V_CPU_IO[2] SATA VCCIO[15] AF19
+VTT
C450 4.7U/6.3V_6X
CPU VCCIO[16] AH20
CRT POWER C261 0.1U/10V_4X VCCIO[17] AB19
AB20
+3V_LDO +1.05V C452 0.1U/10V_4X VCCIO[18]
A12 VCCRTC VCCIO[19] AB22
RTC VCCIO[20] AD22
L22 10uh_8_100MA +V1.1LAN_VCCA_A_DPL VCCRTC= 2mA(15mils) VCCME = 1.849A(100mils)
+RTC_CELL
U23 C499 C441 0.1U/10V_4X L30 AA34 +1.05V_VCCEPW
{8,33,39,42} MAINON + VCCSUSHDA VCCME[13]
1 5 R468 C336 C490 C443 0.1U/10V_4X Y34
SHDN VO *10U/6.3V_8X R453 VCCME[14]
+5V
*52.3K/F_4 *220U/2.5V_3528P_E35b 1U/6.3V_4X HDA VCCME[15] Y35
D 2 GND *short_8 VCCSUSHDA= 6mA(15mils) VCCME[16] AA35 D

3 4 +3V_S5 R236 *short_6 +V3.3A_1.5A_HDA_IO


VIN SET IbexPeak-M_Rev1_0
*G913C R469 +V1.1LAN_VCCA_B_DPL C287 1U/6.3V_4X
C494

*0.1U/10V_4X
*0_4 C486 Quanta Computer Inc.
1U/6.3V_4X
PROJECT : TE4
Size Document Number Rev
A1A
PCH 5/5 (POWER)
Date: Monday, January 24, 2011 Sheet 13 of 46
1 2 3 4 5 6 7 8

HTTP://FAQP.RU/
1 2 3 4 5 6 7 8

H=4 14
JDIM2A M_A_DQ[63:0] {5}
{5} M_A_A[15:0]
M_A_A0 98 5 M_A_DQ0
A
M_A_A1 A0 DQ0 M_A_DQ1 +1.5VSUS A
97 A1 DQ1 7
M_A_A2 96 15 M_A_DQ2
M_A_A3 A2 DQ2 M_A_DQ3
95 A3 DQ3 17
M_A_A4 92 4 M_A_DQ4
M_A_A5 A4 DQ4 M_A_DQ5 JDIM2B
91 A5 DQ5 6
M_A_A6 90 16 M_A_DQ6 75 44
M_A_A7 A6 DQ6 M_A_DQ7 VDD1 VSS16
86 A7 DQ7 18 76 VDD2 VSS17 48
M_A_A8 89 21 M_A_DQ8 81 49
M_A_A9 A8 DQ8 M_A_DQ9 VDD3 VSS18
85 A9 DQ9 23 82 VDD4 VSS19 54
M_A_A10 107 33 M_A_DQ10 87 55
M_A_A11 A10/AP DQ10 M_A_DQ11 VDD5 VSS20
84 A11 DQ11 35 88 VDD6 VSS21 60
M_A_A12 83 22 M_A_DQ12 93 61
SO-DIMMA SPD Address is 0XA0 M_A_A13 A12/BC# DQ12 M_A_DQ13 VDD7 VSS22
119 A13 DQ13 24 94 VDD8 VSS23 65
SO-DIMMA TS Address is 0X30 M_A_A14 80 34 M_A_DQ15 99 66
M_A_A15 A14 DQ14 M_A_DQ14 VDD9 VSS24
78 A15 DQ15 36 100 VDD10 VSS25 71
39 M_A_DQ16 105 72
DQ16 VDD11 VSS26

PC2100 DDR3 SDRAM SO-DIMM


109 41 M_A_DQ17 106 127
{5} M_A_BS#0 BA0 DQ17 VDD12 VSS27

PC2100 DDR3 SDRAM SO-DIMM


{5} M_A_BS#1 108 51 M_A_DQ18 111 128
BA1 DQ18 M_A_DQ23 VDD13 VSS28
{5} M_A_BS#2 79 BA2 DQ19 53 112 VDD14 VSS29 133
114 40 M_A_DQ21 117 134
{5} M_A_CS#0 S0# DQ20 VDD15 VSS30
{5} M_A_CS#1 121 42 M_A_DQ20 118 138
S1# DQ21 M_A_DQ22 VDD16 VSS31
{5} M_A_CLKP0 101 CK0 DQ22 50 123 VDD17 VSS32 139
103 52 M_A_DQ19 124 144
{5} M_A_CLKN0 CK0# DQ23 VDD18 VSS33
102 57 M_A_DQ28 145
{5} M_A_CLKP1 CK1 DQ24 VSS34
{5} M_A_CLKN1 104 59 M_A_DQ25 +3V 199 150
CK1# DQ25 M_A_DQ26 VDDSPD VSS35
{5} M_A_CKE0 73 CKE0 DQ26 67 VSS36 151
74 69 M_A_DQ27 77 155
{5} M_A_CKE1 CKE1 DQ27 NC1 VSS37
115 56 M_A_DQ29 122 156
{5} M_A_CAS# CAS# DQ28 NC2 VSS38
{5} M_A_RAS# 110 58 M_A_DQ24 125 161
RAS# DQ29 M_A_DQ30 NCTEST VSS39
B
{5} M_A_WE# 113 WE# DQ30 68 VSS40 162 B
R78 10K/F_4 DIMM0_SA0 197 70 M_A_DQ31 PM_EXTTS#0 198 167
SA0 DQ31 {4} PM_EXTTS#0 EVENT# VSS41
R79 10K/F_4 DIMM0_SA1 201 129 M_A_DQ36 30 168
SA1 DQ32 {8,15} DDR3_DRAMRST# RESET# VSS42
202 131 M_A_DQ37 R41 *1K/F_4 172
{3,15,27} CGCLK_SMB SCL DQ33 +1.5VSUS VSS43
{3,15,27} CGDAT_SMB 200 141 M_A_DQ35 173
SDA DQ34 M_A_DQ34 R26 *0_4 SMDDR_VREF_DQ0 VSS44
DQ35 143 1 VREF_DQ VSS45 178
M_A_DQ32 {7} DDR_VREF_DQ0 SMDDR_VREF_DIMM
{5} M_A_ODT0 116 ODT0 DQ36 130 126 VREF_CA VSS46 179
{5} M_A_ODT1 120 132 M_A_DQ33 184
ODT1 DQ37 M_A_DQ39 VSS47
{5} M_A_DM[7:0] DQ38 140 VSS48 185
M_A_DM0 11 142 M_A_DQ38 R22 2 189
M_A_DM1 DM0 DQ39 M_A_DQ45 VSS1 VSS49
28 DM1 DQ40 147 3 VSS2 VSS50 190
M_A_DM2 46 149 M_A_DQ44 *100K/F_4 8 195
M_A_DM3 DM2 DQ41 M_A_DQ47 VSS3 VSS51

(204P)
63 B2A
(204P)

DM3 DQ42 157 9 VSS4 VSS52 196


M_A_DM4 136 159 M_A_DQ46 13
M_A_DM5 DM4 DQ43 M_A_DQ40 VSS5
153 DM5 DQ44 146 14 VSS6
M_A_DM6 170 148 M_A_DQ41 19
M_A_DM7 DM6 DQ45 M_A_DQ42 VSS7
187 DM7 DQ46 158 20 VSS8
160 M_A_DQ43 25
{5} M_A_DQSP[7:0] DQ47 VSS9
M_A_DQSP0 12 163 M_A_DQ48 26 203
DQS0 DQ48 VSS10 VTT1 +SMDDR_VTERM
M_A_DQSP1 29 165 M_A_DQ53 31 204
M_A_DQSP2 DQS1 DQ49 M_A_DQ55 VSS11 VTT2
47 DQS2 DQ50 175 32 VSS12
M_A_DQSP3 64 177 M_A_DQ54 37
M_A_DQSP4 DQS3 DQ51 M_A_DQ52 VSS13
137 DQS4 DQ52 164 38 VSS14
M_A_DQSP5 154 166 M_A_DQ49 43

GND

GND
M_A_DQSP6 DQS5 DQ53 M_A_DQ51 VSS15
171 DQS6 DQ54 174
{5} M_A_DQSN[7:0] M_A_DQSP7 188 176 M_A_DQ50
M_A_DQSN0 DQS7 DQ55 M_A_DQ61 DDRSK-20401-TP4B
10 181

205

206
M_A_DQSN1 DQS#0 DQ56 M_A_DQ60
27 DQS#1 DQ57 183
M_A_DQSN2 45 191 M_A_DQ58
M_A_DQSN3 DQS#2 DQ58 M_A_DQ59
C
62 DQS#3 DQ59 193 C
M_A_DQSN4 135 180 M_A_DQ57
M_A_DQSN5 DQS#4 DQ60 M_A_DQ56
152 DQS#5 DQ61 182
M_A_DQSN6 169 192 M_A_DQ62
M_A_DQSN7 DQS#6 DQ62 M_A_DQ63
186 DQS#7 DQ63 194

DDRSK-20401-TP4B

Place these Caps near So-Dimm0.


Some Projects replace 10UF 0805 by 4.7UF 0603
It can cost down 30% SMDDR_VREF_DIMM {15} +SMDDR_VTERM
C170 470P/50V_4X R62 *short_4 +SMDDR_VREF
+1.5VSUS SMDDR_VREF_DQ0 +SMDDR_VTERM
R60 *10K/F_4 R59 *10K/F_4 +1.5VSUS
C62 0.1U/10V_4X R82
C116 4.7U/6.3V_6X C210 1U/6.3V_4X 22_4
C66 2.2U/6.3V_6X
C115 4.7U/6.3V_6X C209 1U/6.3V_4X

3
C132 4.7U/6.3V_6X C203 1U/6.3V_4X
Q11
C110 4.7U/6.3V_6X SMDDR_VREF_DIMM C211 1U/6.3V_4X 2N7002_200MA
{8,42} MAINON_ON_G 2
C128 4.7U/6.3V_6X C152 0.1U/10V_4X C207 4.7U/6.3V_6X +1.5VSUS

C149 4.7U/6.3V_6X C158 2.2U/6.3V_6X

1
D C124 0.1U/10V_4X C155 *0.047U/10V_4X +1.5VSUS D
R36
C125 0.1U/10V_4X 1K/F_4

C123 0.1U/10V_4X +3V SMDDR_VREF_DQ0

C114 0.1U/10V_4X C198 2.2U/6.3V_6X + C112

C139 0.1U/10V_4X C197 *0.1U/10V_4X R32 C70 C72 *330U/2.5V_7343P_E9a


Quanta Computer Inc.
1K/F_4 0.1U/10V_4X
C120 *0.047U/10V_4X C196 *0.047U/10V_4X
*0.047U/10V_4X PROJECT : TE4
Size Document Number Rev
C119 *0.047U/10V_4X A1A
DDR3 DIMM-0
Date: Monday, January 24, 2011 Sheet 14 of 46
1 2 3 4 5 6 7 8

HTTP://FAQP.RU/
1 2 3 4 5 6 7 8

H=8
15
JDIM1A M_B_DQ[63:0] {5}
{5} M_B_A[15:0]
M_B_A0 98 5 M_B_DQ4
M_B_A1 A0 DQ0 M_B_DQ5 +1.5VSUS
A
97 A1 DQ1 7 A
M_B_A2 96 15 M_B_DQ7
M_B_A3 A2 DQ2 M_B_DQ6
95 A3 DQ3 17
M_B_A4 92 4 M_B_DQ0
M_B_A5 A4 DQ4 M_B_DQ1 JDIM1B
91 A5 DQ5 6
M_B_A6 90 16 M_B_DQ3 75 44
M_B_A7 A6 DQ6 M_B_DQ2 VDD1 VSS16
86 A7 DQ7 18 76 VDD2 VSS17 48
M_B_A8 89 21 M_B_DQ12 81 49
M_B_A9 A8 DQ8 M_B_DQ13 VDD3 VSS18
85 A9 DQ9 23 82 VDD4 VSS19 54
M_B_A10 107 33 M_B_DQ11 87 55
M_B_A11 A10/AP DQ10 M_B_DQ15 VDD5 VSS20
84 A11 DQ11 35 88 VDD6 VSS21 60
M_B_A12 83 22 M_B_DQ9 93 61
M_B_A13 A12/BC# DQ12 M_B_DQ8 VDD7 VSS22
119 A13 DQ13 24 94 VDD8 VSS23 65
M_B_A14 80 34 M_B_DQ14 99 66
M_B_A15 A14 DQ14 M_B_DQ10 VDD9 VSS24
78 A15 DQ15 36 100 VDD10 VSS25 71
39 M_B_DQ20 105 72
DQ16 VDD11 VSS26

PC2100 DDR3 SDRAM SO-DIMM


{5} M_B_BS#0 109 41 M_B_DQ21 106 127
BA0 DQ17 VDD12 VSS27

PC2100 DDR3 SDRAM SO-DIMM


108 51 M_B_DQ23 111 128
{5} M_B_BS#1 BA1 DQ18 VDD13 VSS28
{5} M_B_BS#2 79 53 M_B_DQ22 112 133
BA2 DQ19 M_B_DQ17 VDD14 VSS29
{5} M_B_CS#0 114 S0# DQ20 40 117 VDD15 VSS30 134
121 42 M_B_DQ16 118 138
{5} M_B_CS#1 S1# DQ21 VDD16 VSS31
{5} M_B_CLKP0 101 50 M_B_DQ19 123 139
CK0 DQ22 M_B_DQ18 VDD17 VSS32
{5} M_B_CLKN0 103 CK0# DQ23 52 124 VDD18 VSS33 144
102 57 M_B_DQ29 145
{5} M_B_CLKP1 CK1 DQ24 VSS34
104 59 M_B_DQ28 199 150
{5} M_B_CLKN1 CK1# DQ25 +3V VDDSPD VSS35
{5} M_B_CKE0 73 67 M_B_DQ26 151
CKE0 DQ26 M_B_DQ27 VSS36
{5} M_B_CKE1 74 CKE1 DQ27 69 77 NC1 VSS37 155
115 56 M_B_DQ24 122 156
{5} M_B_CAS# CAS# DQ28 NC2 VSS38
110 58 M_B_DQ25 125 161
{5} M_B_RAS# RAS# DQ29 NCTEST VSS39
{5} M_B_WE# 113 68 M_B_DQ30 162
R86 10K/F_4 DIMM1_SA0 197 WE# DQ30 M_B_DQ31 VSS40
B
SA0 DQ31 70 {4} PM_EXTTS#1 198 EVENT# VSS41 167 B
+3V R80 10K/F_4 DIMM1_SA1 201 129 M_B_DQ36
{8,14} DDR3_DRAMRST# 30 168
SA1 DQ32 M_B_DQ32 RESET# VSS42
{3,14,27} CGCLK_SMB 202 SCL DQ33 131 VSS43 172
200 141 M_B_DQ34 173
{3,14,27} CGDAT_SMB SDA DQ34 VSS44
143 M_B_DQ35 {7} DDR_VREF_DQ1 R24 *0_4 SMDDR_VREF_DQ1 1 178
DQ35 M_B_DQ33 VREF_DQ VSS45
{5} M_B_ODT0 116 ODT0 DQ36 130 {14} SMDDR_VREF_DIMM 126 VREF_CA VSS46 179
120 132 M_B_DQ37 184
{5} M_B_ODT1 ODT1 DQ37 VSS47
{5} M_B_DM[7:0] 140 M_B_DQ38 185
M_B_DM0 DQ38 M_B_DQ39 R23 VSS48
11 DM0 DQ39 142 2 VSS1 VSS49 189
SO-DIMMB SPD Address is 0XA4 M_B_DM1 28 147 M_B_DQ40 3 190
M_B_DM2 DM1 DQ40 M_B_DQ41 *100K/F_4 VSS2 VSS50
SO-DIMMB TS Address is 0X34 46 DM2 DQ41 149 8 VSS3 VSS51 195
M_B_DM3 M_B_DQ42

(204P)
63 B2A
(204P)

DM3 DQ42 157 9 VSS4 VSS52 196


M_B_DM4 136 159 M_B_DQ43 13
M_B_DM5 DM4 DQ43 M_B_DQ45 VSS5
153 DM5 DQ44 146 14 VSS6
M_B_DM6 170 148 M_B_DQ44 19
M_B_DM7 DM6 DQ45 M_B_DQ46 VSS7
187 DM7 DQ46 158 20 VSS8
{5} M_B_DQSP[7:0] 160 M_B_DQ47 25
M_B_DQSP0 DQ47 M_B_DQ48 VSS9
12 DQS0 DQ48 163 26 VSS10 VTT1 203 +SMDDR_VTERM
M_B_DQSP1 29 165 M_B_DQ49 31 204
M_B_DQSP2 DQS1 DQ49 M_B_DQ55 VSS11 VTT2
47 DQS2 DQ50 175 32 VSS12
M_B_DQSP3 64 177 M_B_DQ51 37
M_B_DQSP4 DQS3 DQ51 M_B_DQ52 VSS13
137 DQS4 DQ52 164 38 VSS14
M_B_DQSP5 154 166 M_B_DQ53 43

GND

GND
M_B_DQSP6 DQS5 DQ53 M_B_DQ54 VSS15
171 DQS6 DQ54 174
M_B_DQSP7 188 176 M_B_DQ50
{5} M_B_DQSN[7:0] DQS7 DQ55
M_B_DQSN0 10 181 M_B_DQ61 DDRSK-20401-TP8D

205

206
M_B_DQSN1 DQS#0 DQ56 M_B_DQ60
27 DQS#1 DQ57 183
M_B_DQSN2 45 191 M_B_DQ58
M_B_DQSN3 DQS#2 DQ58 M_B_DQ62
62 DQS#3 DQ59 193
M_B_DQSN4 135 180 M_B_DQ56
C
M_B_DQSN5 DQS#4 DQ60 M_B_DQ57 C
152 DQS#5 DQ61 182
M_B_DQSN6 169 192 M_B_DQ63
M_B_DQSN7 DQS#6 DQ62 M_B_DQ59
186 DQS#7 DQ63 194

DDRSK-20401-TP8D

Place these Caps near So-Dimm1.


Some Projects replace 10UF 0805 by 4.7UF 0603
It can cost down 30%
+1.5VSUS SMDDR_VREF_DIMM +SMDDR_VTERM

C129 4.7U/6.3V_6X C164 0.1U/10V_4X C204 1U/6.3V_4X

C111 4.7U/6.3V_6X C168 2.2U/6.3V_6X C205 1U/6.3V_4X


+1.5VSUS
C147 4.7U/6.3V_6X C156 *0.047U/10V_4X C208 1U/6.3V_4X

C133 4.7U/6.3V_6X C206 1U/6.3V_4X

C146 4.7U/6.3V_6X SMDDR_VREF_DQ1 C212 4.7U/6.3V_6X R31 +1.5VSUS


1K/F_4
C117 4.7U/6.3V_6X C60 0.1U/10V_4X
SMDDR_VREF_DQ1
C121 0.1U/10V_4X C57 2.2U/6.3V_6X

D C122 0.1U/10V_4X + C108 D


R7035 C64 C67
C113 0.1U/10V_4X +3V 1K/F_4 0.1U/10V_4X *0.047U/10V_4X *330U/2.5V_7343P_E9a

C118 0.1U/10V_4X C199 2.2U/6.3V_6X

C134 0.1U/10V_4X C202 *0.1U/10V_4X

C126 *0.047U/10V_4X C201 *0.047U/10V_4X


Quanta Computer Inc.
C130 *0.047U/10V_4X PROJECT : TE4
Size Document Number Rev
A1A
DDR3 DIMM-1
Date: Monday, January 24, 2011 Sheet 15 of 46
1 2 3 4 5 6 7 8

HTTP://FAQP.RU/
5 4 3 2 1

23
Display Port Enable I2C PU LEVEL SHIFT ENABLE HDMI LEVEL SHIFT (UMA)
+3V
[HDM]
+3V R7452 U7008
+3V
IHM@10K_4 {9} TMDSD_DATA1 TMDSD_DATA1 39 22 HDMITX1P
IN_D+ OUT_D1+ HDMITX1P {25}
{9} TMDSD_DATA1# TMDSD_DATA1# 38 23 HDMITX1N
IN_D1- OUT_D1- HDMITX1N {25}
R7130 R7131 OE# {9} TMDSD_DATA2 TMDSD_DATA2 42 19 HDMITX2P
IN_D2+ OUT_D2+ HDMITX2P {25}
D R7163 R7166 {9} TMDSD_DATA2# TMDSD_DATA2# 41 20 HDMITX2N D
IN_D2- OUT_D2- HDMITX2N {25}

3
IHM@2.2K_4 IHM@2.2K_4
IHM@1.5K/F_4 *IHM@1.5K/F_4 {9} TMDSD_DATA0 TMDSD_DATA0 45 16 HDMITX0P
IN_D3+ OUT_D3+ HDMITX0P {25}
R7187 {9} TMDSD_DATA0# TMDSD_DATA0# 44 17 HDMITX0N
IN_D3- OUT_D3- HDMITX0N {25}
HDMI_LF_HPOUT 2 Q7047
*IHM@10K_4 {9} TMDSD_CLK TMDSD_CLK 48 13 HDMICLK+
IHM@2N7002_200MA IN_D4+ OUT_D4+ HDMICLK+ {25}
{9} TMDSD_CLK# TMDSD_CLK# 47 14 HDMICLK-
IN_D4- OUT_D4- HDMICLK- {25}
TMDSD_CLK INT_HDMI_SCL
TMDSD_CLK# INT_HDMI_SDA INT_HDMI_SCL 9 28 HDMI_DDCCLK

1
{9} INT_HDMI_SCL SCL SCL_SINK HDMI_DDCCLK {25}
INT_HDMI_SDA 8 29 HDM_DDCDATA
{9} INT_HDMI_SDA SDA SDA_SINK HDM_DDCDATA {25}
HDMI_LF_HPOUT 7 30 HDMI_CON_HP HDMI_CON_HP {25}
HPD HPD_SINK

VCC[1] 2 +3V
LEVEL SHIFT SETTING OE# 25
VCC[2] 11
15
OE# VCC[3]
VCC[4] 21 0.1A(20mils)
DDC_EN 32 26
DDC_EN VCC[5]
+3V +3V Hot Plug Detector (UMA) OC_3 10
VCC[6] 33
40
NC(OC_3) VCC[7]
VCC[8] 46

R7151 *IHM@4.7K_4 SR0 R7190 IHM@4.7K_4 DDC_EN SR0 3


SR1 SR0
4 SR1 GND[1] 1
R7152 *short_4 R7195 *IHM@0_4 5
OC_2 GND[2]
6 NC(OC_2) GND[3] 12
R7149 *IHM@4.7K_4 SR1 18
R7443 IHM@10K_4 OE# GND[4]
C 27 GND GND[5] 24 C
R7150 *short_4 31
GND[6]
GND[7] 36
R7184 *IHM@4.7K_4 *IHM@0_4 R7421 EQ_0 34 37
EQ_1 NC(EQ_0) GND[8]
35 NC(EQ_1) GND[9] 43
GND[10] 49
+3V IHM@PI3VDP411LSRZBE

2
Slew Rate Control Function Q7046 IHM@2N7002_200MA

HDMI_LF_HPOUT +3V
SR1 SR0 Rise/Fall Time Reserve {9} Port-D_HPD 1 3

1 1 140ps OC_2
R7137 *IHM@0_4 R7148
1 0 130ps R7407
R7147 *IHM@0_4 OC_3 C7488 C7491 C7288 C7271 +5V R7333 IHM@2.2K_4 HDMI_DDCCLK
0 1 120ps IHM@100K_4 IHM@100K_4
R7196 *IHM@0_4 EQ_0 IHM@0.1U/10V_4X IHM@0.01U/25V_4X IHM@0.1U/10V_4X IHM@0.01U/25V_4X +5V R7334 IHM@2.2K_4 HDM_DDCDATA
0 0 110ps EQ_1
R7191 *IHM@0_4
C3A

LVDS (UMA) CRT (UMA)


B B

{9,26} INT_LVDS_BRIGHT LVDS_BRIGHT {9,26} {9,26} INT_LCD_TXLCLKOUT+ LCD_TXLCLKOUT+ {9,26}


{9,26} INT_LCD_TXLCLKOUT- LCD_TXLCLKOUT- {9,26}
{9,26} INT_CRT_RED CRT_RED {9,26}
{9,26} INT_CRT_GRE CRT_GRE {9,26}
{9,26} INT_LVDS_DIGON LVDS_DIGON {9,26} {9,26} INT_LCD_TXLOUT0+ LCD_TXLOUT0+ {9,26} {9,26} INT_CRT_BLU CRT_BLU {9,26}
{9,26} INT_LCD_TXLOUT0- LCD_TXLOUT0- {9,26}

{9,26} INT_LVDS_PWM LVDS_PWM {9,26} {9,26} INT_LCD_TXLOUT1+ LCD_TXLOUT1+ {9,26}


{9,26} INT_LCD_TXLOUT1- LCD_TXLOUT1- {9,26} {9,26} INT_CRT_DDCCLK CRT_DDCCLK {9,26}
{9,26} INT_CRT_DDCDAT CRT_DDCDAT {9,26}

{9,26} INT_LCD_TXLOUT2+ LCD_TXLOUT2+ {9,26}


{9,26} INT_LCD_EDIDCLK LCD_EDIDCLK {9,26} {9,26} INT_LCD_TXLOUT2- LCD_TXLOUT2- {9,26} {9,26} INT_CRT_HSYNC CRT_HSYNC {9,26}
{9,26} INT_LCD_EDIDDATA LCD_EDIDDATA {9,26} {9,26} INT_CRT_VSYNC CRT_VSYNC {9,26}

A A

Quanta Computer Inc.


PROJECT : TE4
Size Document Number Rev
A1A
UMA
Date: Monday, January 24, 2011 Sheet 23 of 46
5 4 3 2 1

HTTP://FAQP.RU/
5 4 3 2 1

25
HDMI Conn [HDM] CN11
20
HDMITX2P_R SHELL1
1 D2+
2 D2 Shield
HDMITX2N_R 3
HDMITX1P_R D2-
4 D1+
5 D1 Shield
+5V HDMITX1N_R 6
D
HDMITX0P_R D1- D
7 D0+
8 D0 Shield
HDMITX0N_R 9 23
HDMICLK+_R D0- GND
10 CK+
F1 11 22
HDMICLK-_R CK Shield GND
HM@NANOSMDC110F-2 12 CK-
13 CE Remote
14 NC
HDMI_DDCCLK 15
HDM_DDCDATA DDC CLK
16 DDC DATA
17 GND
DDC5V D21 2 1 HM@RSX101M-30_1A DDC5V_2 18
HDMI_CON_HP +5V
19 HP DET
SHELL2 21

C405 C144 HM@C12826-11905-L


*E@0.1U/16V_4Y HM@0.1U/16V_4Y

C C

{23} HDMITX0P HDMITX0P RN5 2 1 HM@0X2 HDMITX0P_R


HDMITX0P_R
{23} HDMITX0N HDMITX0N 4 3 HDMITX0N_R
HDMITX0N_R

{23} HDMITX1P HDMITX1P RN35 2 1 HM@0X2 HDMITX1P_R


HDMITX1P_R
{23} HDMITX1N HDMITX1N 4 3 HDMITX1N_R
HDMITX1N_R

{23} HDMITX2P HDMITX2P RN7 2 1 HM@0X2 HDMITX2P_R


HDMITX2P_R
{23} HDMITX2N HDMITX2N 4 3 HDMITX2N_R
HDMITX2N_R

{23} HDMICLK+ HDMICLK+ RN6 1 3 HDMICLK+_R


HDMICLK+_R
{23} HDMICLK- HDMICLK- 2 4 HDMICLK-_R near to CN13
B HDMICLK-_R B
HM@DLP11SN900HL2L
RN38: footprint is choke model HDMITX0P_R R58 *E@100_4 HDMITX0N_R
HDMITX1P_R R64 *E@100_4 HDMITX1N_R
B2A HDMITX2P_R R65 *E@100_4 HDMITX2N_R
HDMI_DDCCLK HDMICLK+_R R63 *E@100_4 HDMICLK-_R
{23} HDMI_DDCCLK
HDM_DDCDATA
{23} HDM_DDCDATA

HDMI_CON_HP
{23} HDMI_CON_HP

此組之後可以刪掉,重覆到了
B2A
EMI
HDMI_DDCCLK

HDM_DDCDATA

A A
C409 C408
*E@56P/50V_4N *E@56P/50V_4N Quanta Computer Inc.
PROJECT : TE4
Size Document Number Rev
A1A
HDMI CONN
Date: Monday, January 24, 2011 Sheet 25 of 46
5 4 3 2 1

HTTP://FAQP.RU/
5 4 3 2 1

LCD POWER SWITCH HALL Sensor


<LDS> <HSR> +3VPCU R466 100K_4
26
+3V
1 2
+15V
MR1
+3V R450 C497
AH9249NTR-G1

3
D R10 1K_4 0.1U/10V_4X D

3
330K_6 1.5A(65mils) DISPON {33} C3A
Q1
+3VPCU LCDONG 2 LCDVCC
ME2306_4A
DISPON D25 SDM10K45-7-F_100MA LID591#
LID591# {33}
R13 C36 LCDVCC1 L3 *SHORT_6

1
3
100K_4 0.01U/25V_4X D26 IV@SDM10K45-7-F_100MA
LVDS_BRIGHT {9}
R9 C20 C23 C28
Q5
B2A
2
75/F_8
C3A C@0.1U/16V_4Y C@0.01U/25V_4X C@10U/6.3V_8X +3V
2N7002_200MA

3
LCDDISCHG
Q4 R451

3
{9} LVDS_DIGON 2

3
EV@10K_4
LCDON# 2 Q2 2 R452
EC_FPBACK# {33}
1

DTC143TKAT146_100MA 2

3
2N7002_200MA Q39 100K_4
R12 Q38

1
DTC144EUBTL_30MA

1
100K_4 EV@2N7002_200MA 2

1
Q37

EV@2N7002_200MA

1
C B2A C

LCD Panel Module CRT


[LDS] <CRT> L16 BLM18BA470SN1D_300MA RED_L
{9} CRT_RED +5V +3V
CN3
0.3A (20mils) LCDVCC LCDVCC 1 1 {9} CRT_GRE
L15 BLM18BA470SN1D_300MA GREEN_L
2 2
+3V R299 2.2K_4 LCD_EDIDCLK +3V 3 L14 BLM18BA470SN1D_300MA BULE_L C53 C366
3 {9} CRT_BLU
LCD_EDIDCLK 4
{9} LCD_EDIDCLK 4
LCD_EDIDDATA 5 C@0.1U/10V_4X C@0.1U/10V_4X
{9} LCD_EDIDDATA 5
R6 2.2K_4 LCD_EDIDDATA 6
LCD_TXLOUT0- 6 C365 C362 C360 C349 C361 C364
{9} LCD_TXLOUT0- 7 7
LCD_TXLOUT0+ 8
{9} LCD_TXLOUT0+ 8
9 6.8P/50V_4N 6.8P/50V_4N 6.8P/50V_4N 6.8P/50V_4N 6.8P/50V_4N 6.8P/50V_4N
LCD_TXLOUT1- 9
{9} LCD_TXLOUT1- 10 10
LCD_TXLOUT1+ 11
{9} LCD_TXLOUT1+ 11
C3A LCD_TXLOUT2-
12
13
12
{9} LCD_TXLOUT2- 13
D20 *LCP0G050M0R2R DISPON_O_R LCD_TXLOUT2+ 14
{9} LCD_TXLOUT2+ 14
15 15
LCD_TXLCLKOUT- 16
{9} LCD_TXLCLKOUT- 16
LCD_TXLCLKOUT+ 17
{9} LCD_TXLCLKOUT+ 17
18 18
USB for CRT BOARD (Right) <USB>
LVDS_PWM 19
{9} LVDS_PWM 19
VIN R8 *SHORT_6 LCD_BK_POWER DISPON R516 DISPON_O_R 20 CN4
2.2/F_4 20
C3A LCD_BK_POWER
21
22
21 +5V 1
B 22 {9} CRT_DDCCLK 2 B
+ C27 23 23 {9} CRT_DDCDAT 3
+3V 4
C@10U/25V_1206X
{9} CRT_VSYNC 5
{9} CRT_HSYNC 6
+5VPCU 7
RED_L
8
24 24 34 34 9
CCD_POWER 25 C363 GREEN_L
USBP0-_LCD 25 10
26 26 33 33 11
USBP0+_LCD 27 1U/16V_6X BULE_L
LCD_EDIDCLK LCD_EDIDDATA +3V LCDVCC 27 U15 12
28 28 32 32 13
L2 SBY100505T-221Y-N_300MA 29 G545A2P8U
{30} DMIC_CLK 29 14
{30} DMIC_IN L1 SBY100505T-221Y-N_300MA 30 31 2 8 USBPWR3
30 31 IN1 OUT3 15
3 IN2 OUT2 7 16
C345 C26 C24 C342 50373-03001-001 6
C22 C21 OUT1 USBP8+_L 17
{33} USB_EN#1 4 EN# 18
*E@22P/50V_4N *E@0.1U/25V_4X *E@0.1U/25V_4X 1 C347 USBP8-_L
*E@22P/50V_4N *E@10P/50V_4N *E@10P/50V_4N GND *10U/6.3V_8X 19
9 GND-C OC# 5 20

87213-2000G

L3512

L3511 B2A 1 3

CCD {11,33} USBOC#8 2 4


change footprint
B2A 1
2
3
4
EMI CO-LAY E@DLP11SN900HL2L
change footprint USBP8+_L
[CCD] *E@DLP11SN900HL2L USBP8-_L
USBP8+
USBP8-
{11}
{11}
A USBP0+_LCD
C3A D3B A
USBP0+ {11}
USBP0-_LCD EMI
USBP0- {11}
C3A

0.2A(20mils)
R7 *SHORT_6 CCD_POWER
Quanta Computer Inc.
+3V
C25 C@10U/6.3V_8X PROJECT : TE4
+

Size Document Number Rev


A1A
LCD/LED Panel/CCD
Date: Monday, January 24, 2011 Sheet 26 of 46
5 4 3 2 1

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5 4 3 2 1

MINI Card Slot#1(WiFi / Wimax / Combo) <MNW>


27
+1.5V WIMAX_P
+3V

0.5A(30mils) 2.75A(120mils)
R366 0_8

C264 C251 C227 C459 C468 C455 C469

*0.01U/25V_4X *0.1U/16V_4Y *10U/6.3V_8X 0.1U/16V_4Y C@0.1U/16V_4Y C@0.1U/16V_4Y C@10U/6.3V_8X


R470 0_4
{33} BT_RFCTRL

2
WIMAX_P R434 10K_4 R433 *0_4 BT_RFCTRL_BT5

Q36 1 3 *DTC144EUBTL_30MA BT_RFCTRL_BT R437 0_4 SERIRQ_debug


D D
B2A
CN15
R442 *NMP@0_4 SERIRQ_debug 51 52
{9,33} SERIRQ NC +3.3V
RN8 4 3 NMP@0X2 LDRQ#1__debug 49 50
{9} LDRQ#1 C-Link_RST GND
PLTRST# 2 1 PLTRST#_debug 47 48
R438 NMP@0_4 PCLK__debug C-Link_DAT +1.5V
{11} PCLK_DEBUG 45 46
C-Link_CLK LED_WPAN#
43 44
GND LED_WLAN#
41 42
NC NC
39 40
NC NC
37 38 USBP5+ {11}
GND USB_D+
35 36 USBP5- {11}
GND USB_D-
{10} PCIE_TXP5 33 34
PETp0 GND
{10} PCIE_TXN5 31 32 CGDAT_SMB {3,14,15}
PETn0 SMB_DATA
29 30 CGCLK_SMB {3,14,15}
GND SMB_CLK
27 28
GND +1.5V
{10} PCIE_RXP5 25 26
PERp0 GND
{10} PCIE_RXN5 23 24
PERn0 +3.3Vaux PLTRST#
21 22
GND PERST# RF_EN
19 20 RF_EN {33}
NC W_DISABLE#
17 18
NC GND
15 16 LFRAME#_PCIE R168 NMP@0_4
R166 *0_4 GND NC LAD3_PCIE R163 NMP@0_4 LFRAME# {9,33}
{10} CLK_PCIE_MINI 13 14
REFCLK+ NC LAD2_PCIE R158 NMP@0_4 LAD3 {9,33}
{10} CLK_PCIE_MINI# 11 12
REFCLK- NC LAD1_PCIE R151 NMP@0_4 LAD2 {9,33}
9 10
GND NC LAD0_PCIE R142 NMP@0_4 LAD1 {9,33}
{10} PCIE_CLK_RQ5# 3 1 7 8
BT_RFCTRL_BT5 CLKREQ# NC LAD0 {9,33}
5 6
Q14 *2N7002_200MA BT_CHCLK +1.5V
3 4
BT_DATA GND
1 2
2

R735 *10K_4 WAKE# +3.3V


WIMAX_P
80003-5121

C C

MINI Card Slot#2-3G <MNT> +1.5V +3V_3G

+3V_3G
2.75A(120mils)
CN20
C487 C480 C477 C339 51 52
NC +3.3V C481 C478 C482
49 50
3G@0.1U/16V_4Y C@0.1U/16V_4Y C@0.1U/16V_4Y C@10U/6.3V_8X C-Link_RST GND
47 48
C-Link_DAT +1.5V *3G@0.01U/25V_4X *3G@0.1U/10V_4X *3G@10U/6.3V_8X
45 46
C-Link_CLK LED_WPAN#
43 44
GND LED_WLAN#
41 42
+3.3V LED_WWAN#
39 40 CPUSB# {12}
+3.3V CPUSB#
37 38 USBP10+ {11}
CPEE# USB_D+
35 36 USBP10- {11}
GND USB_D-
{10} PCIE_TXP3 33 34
PETp0 GND
{10} PCIE_TXN3 31 32 CGDAT_SMB {3,14,15}
PETn0 SMB_DATA
29 30 CGCLK_SMB {3,14,15}
GND SMB_CLK
27 28
B GND +1.5V B
{10} PCIE_RXP3 25 26
PERp0 GND
{10} PCIE_RXN3 23 24
+3V +3V_3G RERn0 +3.3Vaux PLTRST#
21 22 PLTRST# {4,11,31,33}
GND RESET# 3G_EN
19 20 3G_EN {33}
MMC_DAT W_DISABLE# +3V_3G +3V_3G
17 18
0.5A(30mils) MMC_CMD GND
15 16 UIM_VPP
GND UIM_VPP UIM_RST
R281 3G@0_8
{10} CLK_PCIE_3G 13
11
REFCLK+ UIM_RST
14
12 UIM_CLK
+3V R298
+3V_S5
{10} CLK_PCIE_3G# REFCLK- UIM_CLK
9 10 UIM_DATA 3G@10K/F_4
PCIE_CLK_3G_REQ#_C GND UIM_DATA UIM_PWR
7 8
CLKREQ# UIM_PWR C479
5 6

2
BT_CHCLK +1.5V
3 4
BT_DATA GND
1 2 *3G@100P/50V_4N
54
53

WAKE# +3.3V PCIE_CLK_3G_REQ#_C 1 3 PCIE_CLK_REQ4# {10}


3G@80003-5121
54
53

Q19
3G@2N7002_200MA

R288 *3G@0_4

B2A

SIM CARD
JSIM1

1 UIM_CLK
A
2 A
3 UIM_DATA
4
5 UIM_RST
6 UIM_VPP
7 UIM_PWR C218 3G@0.1U/10V_4X
8
9
10 USBP4+ {11}
1411 USBP4- {11}
1312

3G@88511-120N Quanta Computer Inc.


PROJECT : TE4D
Size Document Number Rev
A1A
MINI CARD(WLAN/3G/SIM Card)
Date: Monday, January 24, 2011 Sheet 27 of 46
5 4 3 2 1

HTTP://FAQP.RU/
5 4 3 2 1

USB2.0 MB SIDE (Left) 1 <USB>

+5VPCU

C335
020173MR004S55PZR
28
CN13
1U/16V_6X
U10

6
G545A2P8U
2 8 USBPWR2
IN1 OUT3 USBP9-_C 1
3 7
IN2 OUT2 USBP9+_C 2
6
OUT1 3
{33} USB_EN0# 4
EN# + 4
1
9
GND
5 C436 C433 C440
C3A
GND-C OC#

5
10U/6.3V_8X *10U/6.3V_8X C@100U/6.3V_3528P_E45b

D D

{11,33} USBOC#13_9

D5 2 1 *LCP0G050M0R2R USBP9-_C

D9 2 1 *LCP0G050M0R2R USBP9+_C
L3513
USBP9+_C 1 3
USBP9-_C USBP9+ {11}
2 4 USBP9- {11}
E@DLP11SN900HL2L

change footprint
B2A C3A

USB2.0 MB SIDE (Left) 2 <USB>


+5VPCU
020173MR004S55PZR

C428
CN12
1U/16V_6X
U20

6
G545A2P8U
2 8 USBPWR1
IN1 OUT3 USBP13-_R 1
3 7
IN2 OUT2 USBP13+_R 2
6
OUT1 3
{33} USB_EN2# 4
EN# 4
1
9
GND
5 C427 C426 R1015
+
C200
C3A
GND-C OC#

5
10U/6.3V_8X *10U/6.3V_8X C@100U/6.3V_3528P_E45b
*470/F_4

{11,33} USBOC#13_9

3
B2A
C
D2 2 1 *LCP0G050M0R2R USBP13-_R C

2
D3 2 1 *LCP0G050M0R2R USBP13+_R
Q1100
*2N7002_200MA

B2A
L3514
USB w S&C MAXIM solution <SLC> USBP13+_R
USBP13-_R
1
2
3
4
USBP13+_C
USBP13-_C

E@DLP11SN900HL2L
B2A
+5VPCU C3A B2A change footprint

C217

0.1U/10V_4X U4
MAX14566BEETA+T

5 6 USBP13+
VCC TDP USBP13+ {11}
USBP13-
D3B TDM
7 USBP13- {11}
R490 0_4 1
{11,33} SC_CB1 CB1(CEN#)
{11,33} SC_CB 8
CB USBP13+_C
3
DP USBP13-_C
2
DM

9 4
GND GND

B
CB0 CB1 Status B

0 0 Auto mode
0 1 Force dedicated charger mode
1 X Pass-Through(USB) mode:
Connect DP/DM to TDP/TDM

USB w S&C TI solution <SLC>

+5VPCU +5VPCU +5VPCU

U30 +3V_S5
*TS3USB221DRCR
USB_SW+ 1 10 R481 R480
1D+ VCC U24 *75K/F_4 *43K_4
USB_SW- 2 9 USB_BUS_SW0 C549 14 7
1D- S USB_BUS_SW0 {11} VCC GND
USBP13+ RN10 4 3 *0X2 USB_S&C_1 3 8 USB_S&C_R1 RN9 4 3 *0X2 USBP13+_C *0.1U/10V_4X USB_SW+ 2 3
USBP13- 2D+ D+ USBP13-_C C538 1A 1B
2 1 2 1
USB_S&C#_1 4 7 USB_S&C#_R1 USB_SW- 5 6
2D- D- 2A 2B
*0.1U/10V_4X
5 6 USB_BUS_SW1 USB_BUS_SW1 {12,33} 9 11
GND OE 3A 4B R484 R483
15 14
GND GND R486 *100_4
12 8 *51K_4 *51K_4
GND
GND
GND
GND

4A 3B

{11,33} SC_CB1 1 10 SC_CB {11,33}


1OE 3OE
16
13
12
11

4 13
2OE 4OE
S OE# Function
X H Disconnect *SN74CBT3125CPWR

L L D=1D
R482 *10K_4 USB_BUS_SW0 H L D=2D
+3V_S5
OE# 1OE# 2OE# 3OE# 4OE#
R485 *10K_4 USB_BUS_SW1
A A
Mode3 High High Low Low
OE# Function
Mode4 Low Low High High
H Disconnect
L A port= B port
C3A

Quanta Computer Inc.


PROJECT : TE4
Size Document Number Rev
A1A
USB 2.0
Date: Monday, January 24, 2011 Sheet 28 of 46
5 4 3 2 1

HTTP://FAQP.RU/
5 4 3 2 1

SATA ODD
[ODD]
29
ODD Zero power . (Only for Intel) <OZP>
+5V_ODD +5V
D
D3B D
R408
*SHORT_8
CN18
GND14 14

GND1 1
2 SATA_TXP1_C C309 0.01U/25V_4X
RXP SATA_TXP1 {9}
3 SATA_TXN1_C C305 0.01U/25V_4X
RXN SATA_TXN1 {9}
GND2 4
5 SATA_RXN1_C C295 0.01U/25V_4X SATA_RXN1 {9}
TXN SATA_RXP1_C C358 0.01U/25V_4X
TXP 6 SATA_RXP1 {9}
GND3 7

DP 8
+5V 9
10 +5V_ODD +5V_ODD
+5V
MD 11
GND 12
13 C453 C449 + C445
GND
15 C@0.1U/10V_4X C@10U/6.3V_8X C@100U/6.3V_3528P_E45b
GND15
205901-1
C C
B2A

HDD_VCC
HDD_VCC

SATA HDD SATA HDD Re-driver IC


C41 C34
HDR@0.01U/25V_4X HDR@0.1U/16V_4Y
[HDD]
+3V R335 HDR@0_6 HDD_VCC
CN9

20

10

16
GND23 23

6
U2
B 1 B

VCC

VCC

VCC

VCC
GND1 BSATA_TXP0
RXP 2
3 BSATA_TXN0 SATA_TXP0 C37 HDR@0.01U/25V_4X SATA_TXP0_C 1 15 BSATA_TXP0_C C45 0.01U/25V_4X BSATA_TXP0
RXN {9} SATA_TXP0 AI+ AO+
GND2 4
5 BSATA_RXN0 SATA_TXN0 C38 HDR@0.01U/25V_4X SATA_TXN0_C 2 14 BSATA_TXN0_C C44 0.01U/25V_4X BSATA_TXN0
TXN {9} SATA_TXN0 AI- AO-
6 BSATA_RXP0
TXP SATA_RXN0 C39 HDR@0.01U/25V_4X SATA_RXN0_C BSATA_RXN0_C C43 0.01U/25V_4X BSATA_RXN0
GND3 7 {9} SATA_RXN0 4 BO- BI- 12

SATA_RXP0 C40 HDR@0.01U/25V_4X SATA_RXP0_C 5 11 BSATA_RXP0_C C42 0.01U/25V_4X BSATA_RXP0


{9} SATA_RXP0 BO+ BI+
3.3V 8
9 7 9 R17 *HDR@100_4

GND_P
3.3V HDD_VCC EN A_EM HDD_VCC

Mode
10

GND
GND
GND
GND
3.3V R14 *HDR@100_4
GND 11 B_EM 8 HDD_VCC
GND 12
13 HDR@SN75LVCP412ARTJR

17

3
19
18
13

21
GND R16 R15
5V 14
15
D3B
5V +5V_HDD1 R300 *SHORT_8 R11 HDR@0_4 HDR@10K_4 HDR@10K_4
5V 16 +5V
GND 17
RSVD 18
19 C343 C344 + C346
GND
12V 20
21 C@0.1U/10V_4X C@10U/6.3V_8X C@100U/6.3V_3528P_E45b
12V
12V 22 SATA Re-driver Bypass
A
GND24 24 Colay with Redriver IC A

19C201-1 SATA_TXP0 R306 HDO@0_4 R302 HDO@0_4 BSATA_TXP0_C


B2A SATA_TXN0 R305 HDO@0_4 R303 HDO@0_4 BSATA_TXN0_C Quanta Computer Inc.
SATA_RXN0 R309 HDO@0_4 R304 HDO@0_4 BSATA_RXN0_C
PROJECT : TE4
SATA_RXP0 R308 HDO@0_4 R307 HDO@0_4 BSATA_RXP0_C Size Document Number Rev
A1A
HDD/ODD/MDC
Date: Monday, January 24, 2011 Sheet 29 of 46
5 4 3 2 1

HTTP://FAQP.RU/
5 4 3 2 1

Codec(CX20587-11Z) <ADO/MDC/AMP> EXT MIC <ADO/AMP>

C350 C351
FILT_1.65V AVDD_3.3

C266 C354
MIC1-VREFO

R223 R212
C262
*4.7U/6.3V_6X
30
1U/10V_6Y 0.1U/16V_4Y 10U/6.3V_8X 0.1U/16V_4Y 3.3K/F_4 3.3K/F_4

GND

GND GND CN17


+3V R224 *SHORT_6 +3AVDD 1
MIC1_L1 R425 100/F_6 MIC1_L2 L18 0_6 MIC1_L3 2
C272 C300 C352
D3B MIC1_R1 R429 100/F_6 MIC1_R2 L19 0_6 MIC1_R3
6
3
10
7
10U/6.3V_8X 0.1U/16V_4Y 0.1U/16V_4Y 4 8
D
9 D
Port_B# 5

C461 C448 C465 2SJ1012-023111


GND GND
B2A:change value *100P/50V_4N *100P/50V_4N *0.1U/25V_6X
B2A GND Shield_GND

+3V_S5 R285 *SHORT_6 +5AVDD L9 TI160808U300_1A +5V


C334 C330 C265 C353
D3B
*10U/6.3V_8X 0.1U/16V_4Y 10U/6.3V_8X 0.1U/16V_4Y
R213 GND
0.1/F_1206

GND GND

+3AVDD_S5

C325 C328 CLASSD_5V

10U/6.3V_8X 0.1U/16V_4Y FILT_1.8V


C297 C315 C310 C254 C255
C338 C324
0.1U/10V_4X 0.1U/16V_4Y 0.1U/16V_4Y 10U/6.3V_8X 10U/6.3V_8X
Note: GND 10U/6.3V_8X 0.1U/16V_4Y R277
10K_4
In order for the audio codec to Wake on Jack, the CODEC
VAUX pin (VAUX_3.3, pin 4) must be powered by a rail
GND

11
24
34

37

35

36

17

20

22
that is not removed unless AC power is removed.

7
2
6
U14
GND

AVDD_HP

AVDD_5V
VDD_IO

AVDD_3.3

LPWR_5.0

CLASSDREF
DVDD_3.3
FILT_1.8

FILT_1.65

RPWR_5.0
VAUX_3.3
VAUX_3.3
GND C329 *0.1U/16V_4Y

{9} ACZ_RST#_AUDIO R280 33_4 ACZ_RST#_AUDIO_R 13


RESET#
R241 5.11K/F_4 +3AVDD_S5 EXT H.P / Beats <ADO/AMP>
R248 39.2K/F_4 Port_A#
R278 0_4 BIT_CLK_AUDIO_R 9 50 SENSE_A R445 20K/F_4 Port_B#
{9} BIT_CLK_AUDIO BIT_CLK SENSE_A
12 49 SENSE_B R242 5.11K/F_4 +3AVDD_S5
{9} ACZ_SYNC_AUDIO SYNC SENSE_B
{9} ACZ_SDIN0_AUDIO R279 33_4 SDATA_IN 10
SDATA_IN T12 CN19
C
{9} ACZ_SDOUT_AUDIO 8 48 C
SDATA_OUT PORTF_R T11
47 1
PORTF_L HPOUT-L R448 5.1/F_6 HPOUT-L2 L20 HCB1608KF-121T20_2A HPOUT-L3 2
DIB_P_R 56 46 MIC1-RR C292 2.2U/6.3V_6X MIC1_R1 6 10
DIB_N_R DIB_P PORTB_R MIC1-LL C288 2.2U/6.3V_6X MIC1_L1 HPOUT-R R449 5.1/F_6 HPOUT-R2 L21 HCB1608KF-121T20_2A HPOUT-R3
55 45 3 7
DIB_N PORTB_L MIC1-VREFO_B R235 0_4 MIC1-VREFO
44 4 8
B_BIAS
9
C326 0.1U/16V_4Y PCBEEP_C 15 42 T4 Port_A# 5
{9,12} PCBEEP PC_BEEP C_BIAS
41 T7
T14 PORTC_R T9 C476 C466 C485 2SJ1012-023111
54 40
SPDIF PORTC_L
T15 53 CX20587-11Z 39 T6 *100P/50V_4N *100P/50V_4N *0.1U/25V_6X
B2A
T17 GPIO0/EAPD# PORTE_R T10
52 38
T16 GPIO1/SPK_MUTE# PORTE_L
51
GPIO2/SPDIF2 T5
33
PORTD_R T8
32
PORTD_L
3
R284 100_4 DMIC_IN_CLK DMIC_3/4 HPOUT-R GND GND GND Shield_GND
{26} DMIC_CLK 4 31
DMIC_IN DMIC_CLK0 PORTA_R HPOUT-L
{26} DMIC_IN 5 30
DMIC_1/2 PORTA_L
23 27 AVEE
AUXENABLE AVEE FLY_N
1 26
AUX_CLK FLY_N
EXT_MUTE#

25 FLY_P C359 1U/10V_6Y


FLY_P C356 C355
EP_GND
RIGHT+
HPFILT

RIGHT-
LEFT+

LEFT-

GND 0.1U/16V_4Y 10U/6.3V_8X


GND
GND
43

16

18

19

21

29
28

57
14

GND

R220
R221
0_4
*0_4
INT SPK <ADO/AMP>
{33} AMP_MUTE#
R269 0_4
GND GND GND
R473 E@0_4 GND

SPK_R+ R474 E@0_4


B
SPK_R-
EMI B
SPK_L-
B2A C3AD3B CN5
SPK_L+ SPK_R+ R246 0.1/F_8 R73 *SHORT_6 INSPKR+N
SPK_R- R255 0.1/F_8 R72 *SHORT_6 INSPKR-N 4
C3A SPK_L- R259 0.1/F_8 R71 *SHORT_6 INSPKL-N 35
SPK_L+ R264 0.1/F_8 R67 *SHORT_6 INSPKL+N 26
1
88266-04001-06
INSPKL-N C106 E@1000P/50V_4X GND
INSPKL+N C107 E@1000P/50V_4X GND GND
DIB_P L13 MDC@0_6 DIB_P_R
DIB_N L12 MDC@0_6 DIB_N_R INSPKR-N C105 E@1000P/50V_4X GND
INSPKR+N C104 E@1000P/50V_4X
B2A GND

B2A

MDC <MDC>
C320 C318

*E@100P/50V_4N *E@100P/50V_4N

GND GND

EMI part

CN8
1 2
SB_GPIO7 +3V
3 4
SB_GPIO27 GND
5 6
DIB_P FM_INT AGND
A 7 8 A
DIB_N DIB_P FM_L
9 10
BIT_CLK_AUDIO DMIC_IN_CLK DIB_N FM_R
11 12
DMIC_IN FM_DET# AGND
ACZ_SDOUT_AUDIO MDC@88023-12101
GND
ACZ_RST#_AUDIO C32 C29
C357 C337
E@150P/50V_4N E@150P/50V_4N
C333 C331 C332 *0.47U/6.3V_4X *0.47U/6.3V_4X
D3B
*10P/50V_4C *10P/50V_4C *10P/50V_4C
C3A Quanta Computer Inc.
GND GND
GND
PROJECT : TE4
Size Document Number Rev
A1A
Codec (CX20587)
Date: Monday, January 24, 2011 Sheet 30 of 46
5 4 3 2 1

HTTP://FAQP.RU/
5 4 3 2 1

Atheros Lan

R40 *SHORT_6
<LAN/LN1/LNG>

LAN_VDD33
U3

LAN_LINKLED#
31
+3V_S5 1 39
VDD33 LED_LINK10/100n LAN_ACTLED
38
C90 C89 C86 C81 C75 LED_ACTn CKREQ#
D3B CLKREQn/LED2
23

C@10U/6.3V_8X *10U/6.3V_8X 51@1000P/50V_4X 1U/10V_6Y 0.1U/16V_4Y C63 1U/10V_6Y +3V_S5 R18 4.7K_4

37 DVDDL C58 0.1U/16V_4Y R35 51@0_4 CKREQ_G# R42 52@0_6 AVDD_CEN


D DVDD_REG DVDDL {10} PCIE_CLK_REQ3# D
24 C47 0.1U/16V_4Y
DVDDL

Atheros
PLTRST# 2 31 AVDDL C48 0.1U/16V_4Y R19 52@0_4 CKREQ# C92 *52@1U/10V_6Y
{4,11,27,33} PLTRST# PCIE_WAKE# PERSTn AVDDL AVDDL C55 0.1U/16V_4Y
3 34
CKREQ_G# WAKEn AVDDL C93 52@0.1U/16V_4Y
4
VDDCT_REG/CKRn CLK_PCIE_LAN
33
C84 0.1U/16V_4Y AVDD_CEN REFCLKP CLK_PCIE_LAN# CLK_PCIE_LAN {10} C94 *52@10U/10V_8Y
5 32
VDDCT REFCLKN CLK_PCIE_LAN# {10}
36
RX_N PCIE_TXN6 {10}
35
AVDDL RX_P PCIE_RXP7_C C46 0.1U/10V_4X PCIE_TXP6 {10}
6 30 PCIE_RXP6 {10}
AVDDL_REG TX_P
AR8151/AR8152 TX_N
29 PCIE_RXN7_C C49 0.1U/10V_4X
PCIE_RXN6 {10}
C83
C85
C95 33P/50V_4N XTLO_LAN_C 7
XTLO TEST_RST
28
27
LAN-Wake up function <LAN>
TESTMODE

2
0.1U/16V_4Y Y1
1U/10V_6Y XTLI_LAN_C 8 26 SB_SMBDATA1_LAN
XTLI SMDATA SB_SMBCLK1_LAN
25
25MHZ_30 SMCLK PCIE_WAKE#
1 LX AVDD_CEN PCIE_WAKE# {11}
C87 33P/50V_4N 40 L4 51@4.7uh_C_1A
AVDDH LX
9
AVDDH_REG C78 C77 C73
R34 2.37K/F_4 RBIAS 10 41
C80 RBIAS GND1 51@1000P/50V_4X 51@10U/6.3V_8X 51@0.1U/16V_4Y
C79 TX0P 11
0.1U/16V_4Y TX0N TRXP0
12
1U/10V_6Y TRXN0 AVDDH C50 0.1U/16V_4Y
22
TX1P AVDDH
14
TX1N TRXP1
15
TRXN1 AVDDH C61 51@0.1U/16V_4Y
16
TX2P AVDDH AVDDL C54 51@0.1U/16V_4Y
17 19
TRXP2 AVDDL
LAN-SM-Bus <LAN>
TX2N 18 13 AVDDL C69 51@0.1U/16V_4Y
TRXN2 AVDDL
TX3P 20

GND10
TRXP3

GND2

GND3

GND4

GND5

GND6

GND7

GND8

GND9
C TX3N 21 C
TRXN3

51_52@AR8151-BL1A-R

42

43

44

45

46

47

48

49

50
SB_SMBDATA1_LAN R28 *0_4
SDATA {3,10}

SB_SMBCLK1_LAN R29 *0_4


SCLK {3,10}

GIGA:AR8151-BL1A-R = AL008151005
10/100:AR8152-BL1A-R = AL008152009

LAN-terminator <LAN/LN1/LNG>
PLACE NEAR LAN IC SIDE LAN-Transformer <LAN/LN1/LNG> LAN-Strap function <LAN/LN1/LNG> LAN(RJ45)-CONN Interface
<LAN>
C88 *1U/10V_6Y AVDD_CEN_T L5 PBY160808T-601Y-N_1A AVDD_CEN CN10
TX3N

TX2N
TX3P

TX2P

B B
U17
C98 0.1U/16V_4Y AVDD_CEN_T 1 24 TERM4 LAN_ACTLED R38 5.1K/F_6
TX3P TCT1 MCT1 X-TX3P X-TX3N
2 23 8
TD1+ MX1+ NC4/3-
2
4

2
4

TX3N 3 22 X-TX3N R20 51@5.1K/F_6 LAN_LINKLED# R21 52@5.1K/F_6


TD1- MX1- +3V_S5
RN1 RN2 X-TX3P 7
C97 *0.1U/16V_4Y AVDD_CEN_T TERM3 NC/3+
4 21
51@49.9X2 51@49.9X2 TX2P TCT2 MCT2 X-TX2P X-TX1N
5 20 6
1
3

1
3

TX2N TD2+ MX2+ X-TX2N RX-/1-


6 19
TD2- MX2- X-TX2N 5
C102 *0.1U/16V_4Y AVDD_CEN_T TERM2 NC2/2-
7 18
TX1P TCT3 MCT3 X-TX1P X-TX2P
8
TD3+ MX3+
17
1 Over-clocking enable (default = 1) 4
NC1/2+
C51 C52 C56 C59 TX1N 9 16 X-TX1N LED0 = LAN_ACTLED
TD3- MX3- X-TX1P
0 Over-clocking disable 3
RX+/1+
51@1000P/50V_4X 51@0.1U/16V_4Y 51@1000P/50V_4X 51@0.1U/16V_4Y C135 *0.1U/16V_4Y AVDD_CEN_T 10 15 TERM1
TX0P TCT4 MCT4 X-TX0P X-TX0N
11 14 2
TX0N TD4+ MX4+ X-TX0N TX-/0-
12
TD4- MX4-
13 SWR switch-mode regulator select
X-TX0P 1
EMI
51_52@TRANSFORMER 1 Giga LAN pull High (default = 1) TX+/0+
GND
10 R328 VPORT 0603 220K-V05
C101 C99 C96 C91 LED1 = LAN_LINKLED# GND
9 R329 VPORT 0603 220K-V05

0.01U/100V_6X 0.01U/100V_6X 0.01U/100V_6X 0.01U/100V_6X LDO linear regulator select B2A D3B
0 10/100M LAN pull Low 100073FR012M22RZL
TERM1_C

TERM2_C

TERM3_C

TERM4_C
B2A
1 Normal function
TX1N

TX0N
TX1P

TX0P

CKREQ# or CKREQ_G#
R47 R46 R44 R43 ATE test mode
2
4

2
4

A RN3 RN4 75/F_8 75/F_8 51_52@75/F_8 51_52@75/F_8 0 A

49.9X2 49.9X2 C3A


1
3

1
3

C109 51_52@47P/3KV_1808C TERM9

C65 C68 C71 C74 1G(47p): CH047GJ0I00 Quanta Computer Inc.


1000P/50V_4X 0.1U/16V_4Y 1000P/50V_4X 0.1U/16V_4Y 10/100(220p): CH122GK1I10
EMI
PROJECT : TE4
Size Document Number Rev
B2A A1A
Atheros Lan
If support 10/100 , R44,R43 change to 0-ohm(0805)(CS00004JA40),and C91,C96 stuff Date: Monday, January 24, 2011 Sheet 31 of 46
5
If support 1G , R44,R43 change
4
to 75-ohm(0805)(CS07504FA11),and C91,C963 stuff 2 1

HTTP://FAQP.RU/
5 4 3 2 1

3 IN 1 CARD READER VCC_XD

3 IN 1 CARD READER
Card reader controller <MMC> <MMC> C238
1U/10V_6Y
C438

0.1U/16V_4Y
C439

0.1U/16V_4Y
C437

C@0.1U/16V_4Y
32
VCC_XD

D CN16 D
10 SD-VCC
SD_DAT0 R143 0_4 SD_DAT0_R 3
SD_D1 R139 0_4 SD_D1_R SD-DAT0
2 SD-DAT1
SD_D2 R402 0_4 SD_D2_R 20
SD_D3/MS_D1 R132 0_4 SD_D3/MS_D1_R SD-DAT2
18 SD-DAT3
SD_CLK/MS_D2 R160 0_4 SD_CLK/MS_D2_R 7
SD_CMD R161 0_4 SD_CMD_R SD-CLK
15 SD-CMD
SD_CD# R159 0_4 SD_CD#_R 21 5
SD_WP/MS_CLK R119 0_4 SD_WP/MS_CLK_R SD-C/D MS-GND
1 SD-WP
22 GND SD-GND 4

{10} CLK_CARD_5159

SD_D3/MS_D1
MS_BS
48M_CARD
17 MS-VCC
MS_D0 9 MS-DATA0

SD_D2
SD_D3/MS_D1_R
D3B SD_CLK/MS_D2_R
8
11
MS-DATA1
TP25 TP26 MS_D3 MS-DATA2
14 MS-DATA3
SD_WP/MS_CLK R121 *SHORT_4 SD_WP/MS_CLK_RMS 16
MS_INS# MS-SCLK
13 MS-INS
MS_BS 6 MS-BS
23 GND

24

23

22

21

20

19
19 MS-GND
U7 12 SD-GND

CLK_IN

XD_D7

SP14

SP13

SP12

SP11
SD_CLK/MS_D2_R
CM35-5
VCC_XD
R117 6.2K/F_4 RREF 1 C235
RREF E@22P/50V_4N
18 SD_CMD
C SP10 C

2
{11} USBP3- 2 SD_WP/MS_CLK_RMS
DM
17 1 3

RTS5138-GRT GPIO0 TP_XD_LED# {35}


Q40 2N7002_200MA C224
E@22P/50V_4N
3
B2A
{11} USBP3+ DP
MS_D0
+3V
D3B 0.035A(30mils) SP9 16
MS_INS#

R108 *SHORT_8 +3V_Card 4 3V3_IN C226

C219
4.7U/6.3V_6X
C220
0.1U/16V_4Y
QFN24 SP8 15 SD_CLK/MS_D2 E@270P/50V_4X

VCC_XD 5
C3A
CARD_3V3

SP7 14 TP27

VREG 6 V18
13 SD_CD#
C221 SP6
1U/10V_6Y
25 GND

B B
XD_CD#

SP1

SP2

SP3

SP4

SP5
7

10

11

12
SD_WP/MS_CLK

TP22
SD_DAT0
MS_INS#

MS_D3
SD_D1

A A

Quanta Computer Inc.


PROJECT : TE4D
Size Document Number Rev
A1A
RTS5138 (Card Reader)
Date: Monday, January 24, 2011 Sheet 32 of 46
5 4 3 2 1

HTTP://FAQP.RU/
5 4 3 2 1

33
SM BUS PU
EC<KBC> D14 *VPORT 0603 220K-V05 +3VPCU +3VPCU

MBCLK R175 4.7K_4


MBDATA R165 4.7K_4
+3VPCU +3VPCU_EC 2ND_MBCLK R155 4.7K_4 +3V_GFX
2ND_MBDATA R162 4.7K_4
0.03A(30mils) 0.03A(30mils) 0.01A(20mils) +3V 3ND_MBCLK R231 4.7K_4
3ND_MBDATA R232 4.7K_4
R247 2.2_6 L11 PBY160808T-601Y-N_1A +A3VPCU +3V_VDD_EC R208 *SHORT_6

C279 C293 C253 C260

0.1U/16V_4Y 10U/6.3V_8X 0.1U/16V_4Y 10U/6.3V_8X I/O Base Address


I/O Address
C245 C280 C444 C244 C223 C442 8769AGND

115

102
BADDR1-0 Index Data

19
46
76
88

4
D 10U/6.3V_8X 0.1U/16V_4Y 0.1U/16V_4Y 0.1U/16V_4Y 0.1U/16V_4Y 0.1U/16V_4Y U11 D
3 cell protect 00 XOR TREE TEST MODE

AVCC

VDD
VCC1
VCC2
VCC3
VCC4
VCC5
R222 *100K/F_4
H=1.6mm +3VPCU for VGA SKU 01 CORE DEFINED
TEMP_MBAT {36}
{9,27} LFRAME# 3
LFRAME AD0/GPI90
97 10 2Eh 2Fh
126 98 ICMNT +3VPCU
{9,27} LAD0 LAD0 AD1/GPI91 ICMNT {36}
127 99 AC SET_EC 11 164Eh 164Fh
{9,27} LAD1 LAD1 AD2/GPI92 AC SET_EC {36}
{9,27} LAD2 128
LAD2 A/D AD3/GPI93
100 USBOC#8 {11,26} SHBM=0: Enable shared memory with host BIOS
{9,27} LAD3 1 108
LAD3 AD4/GPIO05 R435
{11} PCLK_591 2 96 GFX_MAINON {39}
LCLK AD5/GPIO04 NBSWON#
for 14"/15" AD6/GPIO03
95 NBSWON# {34}
8 94 IV@10K_4 BADDR0 BADDR0 R229 *10K_4
option {11} CLKRUN# CLKRUN/GPIO11 AD7/GPIO07 SUSB# {11}
121 BADDR1 BADDR1 R228 10K_4
+3VPCU {12} GATEA20 GA20
101 Cell_separate
DA0/GPI94 RF_EN R194 10K_4
{12} RCIN# 122
KBRST DA1/GPI95
105 VFAN1 {4} SHBM
D/A 106 TP51
D7 SW1010CPT_100MA SCI#_uR DA2/GPI96 R436
{11} SCI# 29
ECSCI/GPIO54 LPC DA3/GPI97
107 SUSLED_EC {35}
R234
10K_4 6 EV@10K_4
{26} EC_FPBACK# LDRQ/GPIO24
80 BAT_SAT0 Disabled ('1') if using FWH device on LPC.
GPIO41(VBAT) BAT_SAT0 {35} Enabled ('0') if using SPI flash for both system BIOS and EC firmware
ECGPIO10 124
LPCPD/GPIO10
GPIO GPIO42/TCK
17 RF_LED {35}
R233 7 20
{4,11,27,31} PLTRST# LRESET GPIO43/TMS AMP_MUTE# {30}
*10K_4 wake-up GPIO44/TDI
21 ID {36}
{28} USB_EN0# 123
PWUREQ/GPIO67 capability GPIO50/TDO
CIRTX2/GPIO52/RDY
25
27
D/C# {36}
DISPON {26}
ID
125 +3VPCU
{9,27} SERIRQ SERIRQ U6
no wake-up GPO82/TRIS
110
BAT_SAT1 9 capability GPO84/BADDR0 112 BADDR0 2ND_MBCLK 6 1
{35} BAT_SAT1 SMI/GPIO65 2ND_MBDATA 5
SCL
SDA
A0
A1
2 0.003A(20mils)
111 BADDR1 3
SOUT_CR/GPO83/BADDR1 A2
{34} MX0 54 113 TP_ON_OFF {34}
KBSIN0 SIN_CR/CIRRX/GPIO87
{34} MX1 55
KBSIN1 SER GPIO06
93 LID591# {26} 7
WP VCC
8
{34} MX2 56 4
KBSIN2 GND C228
{34} MX3 57
58
KBSIN3 A_PWM/GPIO15
32
118 HWPG_VGA
C3A M24C08-WMN6TP
{34} MX4 KBSIN4 B_PWM/GPIO21
59 62 R487 *0_4 USB_BUS_SW1 {12,28} 0.1U/16V_4Y
{34} MX5 KBSIN5 C_PWM/GPIO13
{34} MX6 60 65 USBOC#13_9 {11,28}
C KBSIN6 D_PWM/GPIO32 C
{34} MX7 61
KBSIN7 PWM E_PWM/GPIO45
22 SUSON {38} ADDRESS: A0H
16 MAINON {8,13,39,42}
F_PWM/GPIO40/CLKIN48
{34} MY0 53 81 USB_EN2# {28}
KBSOUT0/JENK G_PWM/GPIO66 PWRLED# +3V
{34} MY1 52
KBSOUT1/TCK H_PWM/GPIO33
66 PWRLED# {35} B2A
SPI FLASH
51 Q16
{34} MY2 KBSOUT2/TMS
{34} MY3 50
KBSOUT3/TDI

2
49 KB 31 2N7002_200MA
{34} MY4 KBSOUT4/JEN0 TA1/GPIO56
{34} MY5 48 63 FANSIG1 {4}
KBSOUT5/TDO TB1/GPIO14
{34} MY6 47 117 3 1 TEMP_ALERT# {4,12}
KBSOUT6/RDY TA2/GPIO20
{34} MY7 43
KBSOUT7 TIMER TB2/GPIO01
64 ACIN {35,36}
{34} MY8 42 26 S5_ON {42}
KBSOUT8 TA3/GPIO51 R230 *0_4
{34} MY9 41 15 VRON {41}
KBSOUT9 TB3/GPIO36 +3VPCU
{34} MY10 40
KBSOUT10
39
{34}
{34}
MY11
MY12 38
KBSOUT11
KBSOUT12/GPIO64 SPI_DI/GPIO77
84 U12 0.025A(20mils)
37 SPI 83 RF_EN RF_EN {27} SPI_SDI_uR R199 33_4 SPI_SDI 2 8
{34} MY13 KBSOUT13/GPIO63 SPI_DO/GPO76/SHBM SO VDD
{34} MY14 36 82
KBSOUT14/GPIO62 SPI_SCK/GPIO75
{34} MY15 35 91 DNBSWON#_uR D11 SW1010CPT_100MA
DNBSWON# {11}
SPI_SDO_uR R205 33_4 SPI_SDO 5 7 C242
KBSOUT15/GPIO61/XOR_OUT GPIO81 SI HOLD
{34} MY16 34
KBSOUT16/GPIO60 RSMRST# R177 *10K_4 SPI_SCK_uR R214 33_4 SPI_SCK 6 0.1U/16V_4Y
{34} MY17 33 75 RSMRST# {11} +3VPCU 3
KBSOUT17/GPIO57 IRRX1/GPIO72/SIN2 SCK WP
FIR IRRX2_IRSL0/GPIO70
73
MPWROK
SUSC# {11}
SPI_CS0#_uR
74 MPWROK {4,11} 1 4
MBCLK IRTX/GPIO71/SOUT2 R176 CE VSS
{36} MBCLK 70 23 PCH_GPIO33 {9,12}
MBDATA SCL1/GPIO17 CIRRXM/GPIO46/TRST *short_4 R204 10K_4 W25X40BVSSIG
{36} MBDATA 69 14 +3VPCU
2ND_MBCLK SDA1/GPIO22 GPIO34/CIRRXL
{10} 2ND_MBCLK
2ND_MBDATA
67
68
SCL2/GPIO73 SMB CIR CIRTX1/GPIO16
114
109
NUMLED {34} D3B
{10} 2ND_MBDATA SDA2/GPIO74 CIRTX2/GPIO30 CAPSLED {34}
3ND_MBCLK 119
3ND_MBCLK SCL3/GPIO23
3ND_MBDATA 120 Intel 512KB W25X40BVSSIG
3ND_MBDATA SDA3/GPIO31
24 86 SPI_SDI_uR R200 100K_4
{27} 3G_EN SCL4/GPO47 F_SDI/F_SDIO1 BT_RFCTRL {27}
HWPG 28 87 SPI_SDO_uR
SDA4/GPIO53 F_SDO/SDIO0 SPI_CS0#_uR
FIU F_CS0
90
SPI_SCK_uR
AMD 2MB W25Q16BVSSIG
92
F_SCK
{34} TPCLK 72
PSCLK1/GPIO37
{34} TPDATA 71
PSDAT1/GPIO35
{8} S3_Reduce 10
PSCLK2/GPIO26

B2A
{26}
{11,28}
USB_EN#1
SC_CB1
R201 0_4
11
12
PSDAT2/GPIO27
PSCLK3/GPIO25
PS/2 CLKOUT/GPIO55
30 SUS_PWR_ACK {11} INTERNAL KEYBOARD STRIP SET
R196 0_4 13 85 VCC_POR# R193 4.7K_4 +3VPCU +3VPCU
{11,28} SC_CB PSDAT3/GPIO12 VCC_POR
8768_32KX1 R183 *SHORT_4 8768_32KX1_R 77 104 VREF_uR R227 0_4 +A3VPCU MY0 R120 10K_4
VCORF

32KX1/32KCLKIN VREF
AGND
GND1
GND2
GND3
GND4
GND5
GND6

B B
R184 20M_6 8768_32KX2 R187 *SHORT_4 8768_32KX2_R 79
32KX2
WPCE775LA0DG
5
18
45
78
89

44
116

103

R179

HWPG
+3V
VCORF_uR

Y3 33K/F_4
1 4
2 3
L10 0_6 R426
C237 32.768KHZ_20 C241
C222 TP1 10K_6
18P/50V_4C 18P/50V_4C D3B
1U/10V_6X

8769AGND 8769AGND GFX_PG


D22 *EV@SW1010CPT_100MA HWPG_VGA

R491 *EV@0_4

+3VPCU +3V

R492 R164

TP23 10K_6 *10K_6

SMBUS Table LED PU/PD


+5V D4 *IV@SW1010CPT_100MA
{40} HWPG_VAXG
SMBUS Devices Address R405 10K_4 TPCLK R493 IV@0_4
1 Battery R400 10K_4 TPDATA
+3VPCU
PCLK_591 D6 *SW1010CPT_100MA HWPG
{37} SYS_HWPG HWPG {4}

Close to U16
PCH SML1 PWRLED# R147 10K_4 R494 0_4
2 DNBSWON#_uR C256 *0.1U/16V_4Y R219 R140 *10K_4
AMD SMBus 98H
D8 *SW1010CPT_100MA
{38} HWPG_1.5V
EC EEPROM A0H *22_4 AC SET_EC ICMNT
R495 0_4
A VGA Board Thermal Sensor 98H NBSWON# SW1 *SHORT_ PAD A
C270 C285 C284 BAT_SAT0 R410 10K_4
3 BAT_SAT1 R206 10K_4 D10 *SW1010CPT_100MA
{39} HWPG_VTT
*10P/50V_4C *10U/6.3V_8X *10U/6.3V_8X
D12 R496 0_4
*LCP0G050M0R2R 8769AGND
8769AGND
D3B

Quanta Computer Inc.


PROJECT : TE4
Size Document Number Rev
A1A
EC-WPC8763LDG/WPC8769L(O)
Date: Monday, January 24, 2011 Sheet 33 of 46
5 4 3 2 1

HTTP://FAQP.RU/
5 4 3 2 1

INT KeyBoard <KBC>


TP board <TPD> +5V

34
+3VPCU

RP7
10 1 10KX8 MX7
MX1 9 2 MX2
MX6 MX3 CN1 L6
MX5
8
7
3
4 MX4 *SHORT_6
D3B
MX0 36 TPCLK_L CN6
6 5 EMI
+5V_TP 1
K_LED_P TPDATA_L TPCLK_L R61 E@0_6 1
1 {33} TPCLK 2 2
MY16 TPDATA_L R57 E@0_6 3
2 MY16 {33} {33} TPDATA 3
3 4 4
C12 *220P/50V_4X MX7 MY17 5
4 MY17 {33} {33} TP_ON_OFF 5
D C13 *220P/50V_4X MX2 C165 C150 C173 C176 6 D
C14 *220P/50V_4X MX3 5 K_LED_P 6
6 *E@10P/50V_4C *E@10P/50V_4C E@0.1U/16V_4Y C@4.7U/6.3V_6X
C15 *220P/50V_4X MX4 MY2
7 MY2 {33}
MY1 88513-064N
8 MY1 {33} Near to CN7
MY0 EMI
9 MY4
MY0 {33} C3A C145
10 MY4 {33}
C16 *220P/50V_4X MX0 MY3 EMI *E@0.1U/10V_4X
11 MY3 {33}
C17 *220P/50V_4X MX5 MY5
12 MY5 {33}
C18 *220P/50V_4X MX6 MY14
13 MY14 {33}
C19 *220P/50V_4X MX1 MY6
14 MY6 {33}
MY7
15 MY7 {33}
MY13
16 MY13 {33}
MY8
17 MY8 {33}
C8 *220P/50V_4X MY7 MY9
18 MY9 {33}
C9 *220P/50V_4X MY13 MY10
19 MY10 {33}
Power board <PSW> K/B LED power <KBP>
C10 *220P/50V_4X MY12 MY11
20 MY11 {33}
C11 *220P/50V_4X MY15 MY12
21 MY12 {33}
MY15
22 MY15 {33}
MX7
23 MX7 {33}
MX2
24 MX2 {33}
MX3
25 MX3 {33}
C4 *220P/50V_4X MY3 MX4
C5 *220P/50V_4X MY5 26 MX0
MX4 {33} Only for Huron River
27 MX0 {33}
C6 *220P/50V_4X MY14 MX5
28 MX5 {33}
C7 *220P/50V_4X MY6 MX6 CN2
29 MX6 {33}
MX1
30 MX1 {33} 1
K_LED_P
31 {33} NBSWON# 2
CAPSLED
32 CAPSLED {33} 3
C2 *220P/50V_4X MY2
C341 *220P/50V_4X MY1 33 NUMLED 4
34 NUMLED {33}
C3 *220P/50V_4X MY0 88513-044N
C35 *220P/50V_4X MY4
C 35 C
91504-344N
C340 *100P/50V_4N MY17
B2A
C1 *100P/50V_4N MY16

(10mils)
+3V R1 150_4 K_LED_P

HOLE
CPU HDD&ODD
HOLE7 HOLE23 HOLE4 HOLE21 HOLE10
HOLE13
1

1
1
2

3
4

*H-C131D91P2 *H-C131D91P2 *H-C131D91P2 *H-C131D91P2 *H-TC276I150BC197D150P2


*INTEL-CPU-BRACKET

B B

HOLE6
MDC 7 6
8 5
MINI CARD 3G Card(上一顆就好) 9 4
debug Card(上一顆就好) HOLE24
1
2
3

HOLE20 HOLE17 HOLE18 HOLE22 HOLE5


7 6 7 6 7 6 7 6 *HG-C197D118P2
8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4

1
R130
1
2
3

1
2
3

1
2
3

1
2
3

1
*E@0_6 R85
E@1000P/50V_6X *H-TC276I150BC197D150P2
*HG-C236D157P2 *HG-C236D157P2 *HG-C236D157P2 *HG-C236D157P2 *H-TC276I150BC197D150P2

C3A D3B
HOLE19
HOLE2 HOLE1 HOLE3 HOLE8 HOLE9 7 6
7 6 6 7 6 7 6 7 6 8 5
8 5 5 8 5 8 5 8 5 9 4
9 4 4 9 4 9 4 9 4
1
2
3
1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

*HG-C276D98P2
*HG-C236D98P2 *HG-TE315X228D98P2 *HG-TE315X315D98P2 *hg-tsbsd98p2-1 *HG-C315D98P2
A A

HOLE31
HOLE30
HOLE12 HOLE16 HOLE25 HOLE26 HOLE27 HOLE28
7 6 7 6 7 6 7 6 7 6
8 5 8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4 9 4 1 Quanta Computer Inc.
1

PROJECT : TE4
1

1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

*EMIPAD
*SPAD2
B2A Size Document Number Rev
*HG-TSBSI138D98P2 *HG-C315D98P2 *HG-C315D98P2 *HG-C299D98P2 *HG-C299D98P2 *HG-C236D98P2 A1A
KB/TP&TP/PB/FL/LEB/MMB/B-CAS
Date: Monday, January 24, 2011 Sheet 34 of 46
5 4 3 2 1

HTTP://FAQP.RU/
5 4 3 2 1

35
LED
BATERRY
AC-IN Full Charge = White BAT_SAT0
2mA

2
BAT_SAT0 {33}

ACIN_R R283 10K_4 2 -BATLED0 R287 1.5K/F_4 BATLED0_R 3 1


+5VPCU
Q20 ME2N7002DW_250MA

3
+5VPCU 3 LED6
3

LED3 12-12/S2ST3D-C30/2C
1 2 ACIN_C R296 1K_4 ACIN_A 2 ACIN
D +5VPCU ACIN {33,36} D
12-11/T3D-CP1Q2B12Y/2C 1 -BATLED1 R289 1.2K/F_4 BATLED1_R 3 1
Q35 MMBT3906-7-F_200MA Q18 Q21 ME2N7002DW_250MA
DTC144EUBTL_30MA

1
2mA

2
BAT_SAT1
Charging = Orange BAT_SAT1 {33}

POWER CARDREADER

+5VPCU DC IN = White
2 -PWRLED R293 1.5K/F_4 PWRLED#_Q

3 LED2

3
12-12/S2ST3D-C30/2C R292

3
0_4
1 -SUSLED R294 1.2K/F_4 -SUSLED_R {32} TP_XD_LED# TP_XD_LED LED5 1 2 TP_XD_LED_A R295 1K_4 +5V
Q23 2 PWRLED# 12-11/T3D-CP1Q2B12Y/2C
PWRLED# {33}

S3 Mode = Orange *2N7002W_115MA


3

B2A

1
C 2 SUSLED_EC
SUSLED_EC {33} HDD/ODD C

Q22
DTC144EUBTL_30MA
1

+5V

R290
RF LED *10K_4
Amber
3

+5V LED4 2 1 12-11/T3D-CP1Q2B12Y/2C -SATA_LED R291 1.5K/F_4 SATA_LED#_C HDDLED# Q17 MMBT3906-7-F_200MA
1 2 RF_LED_R R297 560_4
LED1 12-21/S2C-AL1M2VY/2C RF_LED {33}

3
+3V R282 10K_4
SATA_LED# {9}

B B
ESD Protect
FOR POWER LED FOR BATTERY LED FOR HDD/RF LED FOR CARDREADER LED
D18 D16 D19 D17
-PWRLED -BATLED1 RF_LED_R
+3V +3V +5V +5V 1 1 1 1

D3B 3 3 3 3
-SUSLED -BATLED0 -SATA_LED TP_XD_LED
C500 C501 C502 C503 2 *PJMBZ5V6 2 *PJMBZ5V6 2 *PJMBZ5V6 2 *PJMBZ5V6
E@68P/50V_4C *E@0.1U/10V_4X *E@0.1U/10V_4X *E@0.1U/10V_4X
C3A

C3A
+5VPCU +5VPCU VIN VIN

C504 C505 C506 C507


*E@0.1U/10V_4X *E@0.1U/10V_4X *E@0.1U/10V_4X *E@0.1U/10V_4X

A B2A +3V A

D3B
EMI C508
E@82P/50V_4N

Quanta Computer Inc.


EMI
PROJECT : TE4
Size Document Number Rev
A1A
LED
Date: Monday, January 24, 2011 Sheet 35 of 46
5 4 3 2 1

HTTP://FAQP.RU/
5 4 3 2 1

PCN2

4 DC_JACK
PF2
F1206HA15V024TM
1 2VA0
PL5
*short/UPB201209T-800Y-N

PL4
*short/UPB201209T-800Y-N
VA1 PD6

1
3 VA2 1
0.01_3720
PR147
R1
2 VA3 3
PQ27
AOD403
4
VIN

3
PQ21
AOD403
4
P1
BAT-V

E@2200P/50V_4X
2
3

E@0.1U/25V_4X

*4.7U/25V_8X
PC99
PC158
SBR1045SP5-13

1
1
PC27
PC129 PC31 PR32 PC14
2 *0.1U/25V_4X 0.1U/25V_4X 220K/F_4 *0.1U/25V_4X PR19
PD4 33K_6
D
1 D
PR37 PR41

2
PD5 TVS_SMAJ20A 10/F_6 10/F_6
PC16 PR22
20277-044L
B2A SW1010CPT_100MA ( Near by sense R side) *2200P/50V_4X 10K_6
1 6

PR34 2 5

3
220K/F_4
3 4
PQ1
PR149 CSIN PQ2 2 2N7002K_300MA
{33} D/C#
82.5K/F_6 IMD2AT108
+3VPCU
CSIP
{33} AC SET_EC C3A

1
VIN

PR118
10U/6.3V_8X

10/10/01 change Value and FP (EMI)


PC131

PR153 10K/F_4 PC15 1U/10V_4X


10K/F_4 1 2 10/10/05 change Value and FP (EMI)
10/10/06 PC71 and PC76 預留

10U/25V_8X

10U/25V_8X
E@2200P/50V_4X
E@0.1U/25V_4X

*E@10U/25V_8X

*E@10U/25V_8X
PC95

PC96

PC97

PC98

PC10

PC11
PR20
( Near by IC side) PC107 4.7_6
0.1U/25V_4X PC12 1U/10V_4X
1 2

ACIN

33
32
31
30
28

27

26

21
C C
{33,35} ACIN

5
+3VPCU
PC105 0.1U/25V_4X

CSSP

VDDP
NC
GND
GND
GND
GND

CSSN

VCC
PQ25
PR117 PC100
2.7_6 0.1U/50V_6X 4 AON7410
{33} MBDATA 11 25
VDDSMB BOOT
0.01_3720

3
2
1
{33} MBCLK 88731A_U_GATE
9
SDA UGATE
24 C3A PR107

PU11 PL1
CM1213A-04SO 10 23 88731A_PHASE 1 2 BAT-V
ID M-DATA SCL PHASE 3.3UH_7X7
1 6
CH1 CH4

10U/25V_8X

10U/25V_8X
2 5 +3VPCU 13 20 88731A_L_GATE PR16
VN VP ACOK LGATE

PC84

PC82
PQ22
TEMP_MBAT_C 3 4 M-CLOCK PC13 E@2.2/F_6
CH2 CH3 PR18 AON7410
0.1U/25V_4X 19 4
49.9/F_6 PU7 PGND PR112 PR113
DCIN 22 ISL88731CHRTZ-T 10/F_6 10/F_6
DCIN PC8

3
2
1
PR130 E@1000P/50V_4X
B2A 82.5K/F_6 3.2V
C3A 88731ACIN CSOP
18
( Near by sense R side)
D3B 2
ACIN PC101
0.1U/25V_4X CSOP
PR131 3 ( Near by IC side)
22K/F_6 VREF CSON
+3VPCU 17
CSON
B B
4
ICOMP
16
PR11 NC
*100K_4 PR10 5
PCN1 10K/F_4 NC
PF1 15 PR115 100_4 BAT-V
F1206HA15V024TM VBF
6
11 MBAT+ BAT-V VCOMP
9
1 2
GND
29 (Please place this R near by battery pack side)

GND
8

ICM
NC

NC
ID
7 ID {33}
6 TEMP_MBAT_C
7

14

12
5 M-DATA
4 M-CLOCK PR21
3 2.21K/F_6
2 PC2 +3VPCU
1 PC18
10
2

PC1 47P/50V_4N
PR6 PR7 *1U/10V_4X PC21
BTJ-09HZ0B 100/F_4 PR8 0.01U/50V_4X PR120
1

100/F_4 ICMNT {33}


100K_4
47P/50V_4N MBDATA {33} PC17 100_4
1K_4 0.01U/50V_4X
10U/6.3V_8X
PC110
MBCLK {33}
TEMP_MBAT {33}
1

PR9
1

PD1 PD2
A *UDZSTE-175.6B *UDZSTE-175.6B PC3 A
0.01U/50V_4X
2

D3B
Quanta Computer Inc.
PROJECT : TE4
Size Document Number Rev
CHARGER-ISL88731C 1A
Date: Monday, January 24, 2011 Sheet 36 of 46
5 4 3 2 1

HTTP://FAQP.RU/
5 4 3 2 1

MAIND

P2
MAIND {8,38,42} PR159 39K/F_4

{4} SYS_SHDN# VL
S5D
S5D {42} *0_4/S PR162

VIN VIN
PR164 PR161

10U/25V_8X

10U/25V_8X
*0_4/S *0_4/S VL

1
10.10.06 add

PC145

PC154
PC70 PC77
*0.1U/25V_4X PD3 *0.1U/25V_4X

2
D D

5V_EN

3V_EN
UDZSTE-175.6B
PC68 f : 500k Hz

2
4.7U/10V_6X

1
ESR : 17mΩ
B2A Total capacitor : 330uF

1U/16V_6X
PC146
0.1U/25V_4X
PC35
PC71 PR169 0.1U/50V_6X PC78 (Peak 9.073A, AVG 6.351A)
*2200P/50V_4X 150K/F_4 *2200P/50V_4X

PC72
10.10.06 add
10.10.20 change Value 10.10.20 stuff
OCP:12.1A

5
f : 400k Hz REF PR175 +3VPCU
0_4 PQ44
ESR : 17mΩ 10.10.06 add
PR171 10.10.20 change Value 4 AON7410
B2A

1
5
Total capacitor : 330 uF 147K/F_4

8
7
6
5
4
3
2
1
+5VPCU
(Peak 8.421A , AVG 5.895A) PQ36
B2A
B2A

LDO

ONLDO
LDOREFIN

VIN

TON
REF
NC

VCC

3
2
1
AON7410 10.10.20 change value PL9
OCP:12.1A 4
PR101 1.5UH_7X7
B2A +5VPCU 9 32 REFIN2 300K/F_6
BYP REFIN2

5
PR35 287K/F_6 10 31

1
2
3
PL8 OUT1 ILIM2
11 FB1 OUT2 30
+5VPCU 12 PU10 29 SKIP PR177 *6.8K/F_4
1.5UH_7X7 DDPWRGD_R 13 ILIM1 PM6686TR SKIP# DDPWRGD_R PQ42 PR173

*10U/6.3V_8X
28 +
PGOOD1 PGOOD2

PC155
5V_EN 3V_EN *2.2/F_6
PR96 PR176
B2A 5V_DH
14
15
EN1 EN2 27
26 3V_DH
4
AON7702 PC156
5V_LX DH1 DH2 3V_LX
C 16 LX1 LX2 25 C
*15.8K/F_4 *2.2/F_6 PQ39 37 PC149

3
2
1
AON7702 5V_DL PAD 10.10.20 no stuff
*10U/6.3V_8X

+ 4 36 PAD

PGND
PVCC
PC136

10.10.20 no stuff *1000P/50V_4X

BST1

BST2
GND
PAD
PAD
PAD

DL1

DL2
PC139 PC140 PC147

NC
0.1U/50V_6X 0.1U/50V_6X RDSon=14m ohm

REFIN2
1
2
3

PR165 PC150 PR172

35
34
33

17
18
19
20
21
22
23
24

PR102
0_4 *1000P/50V_4X PR167 1/F_6

*10K/F_4
1/F_6 1 2
1 2 3V_DL 330U/6.3V_105CS_E17f
10.10.20 change Value RDSon=14m ohm
10.10.20 no stuff
VL PR100
330U/6.3V_105CS_E17f 0_6
PC152
2 0.1U/50V_6X PC144
PD8 1U/16V_6X
BAV99W-7-F 3 +3VPCU
1
0.1U/25V_4X
PC151

2 U:C2A
PR174
3
*100K_4
PC153
1 PD9 0.1U/50V_6X
PR178
BAV99W-7-F
+15V_ALWP DDPWRGD_R
B +15V SYS_HWPG {33} B
0.1U/25V_4X
PC157

22_8

+3VPCU
+5VPCU
+5VPCU

+3VPCU

1
2
5
6
S5D 3 PQ40
1
2
5
6

1
2
5
6
AO6402A
1
2
5
6

MAIND 3 PQ37 MAIND 3 PQ38


S5D 3 PQ34 AO6402A 4 AO6402A
AO6402A
4

4
4

+3V_S5 +3V

(Peak 0.35A, AVG 0.25A) (Peak 6A, AVG 4.2A)


A A

+5V_S5 +5V
(Peak 1A, AVG 0.7A) (Peak 3.5A, AVG 2.4A)

Quanta Computer Inc.


PROJECT : TE4
Size Document Number Rev
System 5V/3V (PM6686TR) 1A
Date: Monday, January 24, 2011 Sheet 37 of 46
5 4 3 2 1

HTTP://FAQP.RU/
5 4 3 2 1

(Peak 0.5A, AVG 0.35A)


PC29 10U/10V_8X

PR33
PC30
P3
0.1U/50V_6X
D +SMDDR_VTERM VIN D

2.2/F_6 1.5SUS_HG
PC34

10U/25V_8X

10U/25V_8X
10U/10V_8X 1.5SUS_PHASE

PC102

PC103
PC92
1.5SUS_LG *0.1U/25V_4X

5
PQ26
B2A

25

24

23

22

21

20

19
4 RMW130N03FUBTB
PC93

LL

DRVL
VLDOIN
GND

DRVH
VBST
VTT
PL3 *2200P/50V_4X

1
2
3
1.5UH_10X10 +1.5VSUS
1 18 +1.5VSUS_SRC
VTTGND PGND

5
2 VTTSNS CS_GND 17 B2A
PR116
PR42
B2A +
3 RT8207LGQW 16
B2A 4 4 *2.2/F_6
GND CS PC133
PU1 9.76K/F_4
C3A

1
2
3

1
2
3
4 MODE V5IN 15 +5VPCU
(Peak 0.1A, AVG 0.07A) PQ28 PQ35 PC104 10.10.20 change Value and FP
PR148 5.1/F_6 *RMW200N03FUBTB RMW200N03FUBTB
C 5 14 *1000P/50V_4X PC44 PC135 C
+SMDDR_VREF VTTREF V5FILT *0.1U/25V_4X

1
10U/10V_8X
VDDQSNS

VDDQSET

+5VPCU 6 13 PC127 PC124 390U/2.5V_105CS_E10f


COMP PGOOD 1U/10V_4X 1U/10V_4X

2
RDSon=2.3m ohm
NC

NC
S5
S3

PC126 PR46 *100K_4 +3VPCU


0.033U/50V_6X
10

11

12
7

FOR DDR III


HWPG_1.5V {33}
OCP:18.47A
PR45 For RT8207A 400KHZ (Peak 9.061A, AVG 6.342A)
VIN
620K/F_4
ESR : 9mΩ
S5_1.5V PR47 *0_4/S
SUSON {33}
f : 400k Hz
PR48 *0_4/S
S3_1.5V {8}
Be careful to this two net name.
+1.5VSUS

PC132 PR151
Vout = (R1/R2) X 0.75 + 0.75
*33P/50V_4N 10K/F_4
B R1 B

1
2
5
6
MAIND 3 PQ33
{8,37,42} MAIND AO6402A

4
PR150
PR38 10K/F_4
*0_6/S
R2

+1.5V
(Peak 0.16A, AVG 0.11A)

A A

Quanta Computer Inc.


PROJECT : TE4
Size Document Number Rev
DDR 1.5V(RT8207L)/1.05VSUS 1A

Date: Monday, January 24, 2011 Sheet 38 of 46


5 4 3 2 1

HTTP://FAQP.RU/
5 4 3 2 1

D
Total capacitor : 390uF
F: 320k Hz
(Peak 24.390A , AVG 17.073A)
P4 D

VIN
+5VPCU OCP:20.104A

*2200P/50V_4X

10U/25V_8X

10U/25V_8X
PR92

*0.1U/25V_4X
PC74

PC73

PC76

PC75
10/F_6 PD7

5
SDM10K45-7-F_100MA PC143
PC142 4.7U/10V_6X
PR93
U:C2A
*0_4/S PR91 0.1U/25V_4X 4 +1.05V
{33} GFX_MAINON 1M/F_6

1
PQ41

1
2
3
10.10.20 change Value PR99 RMW130N03FUBTB
PU9 2.2_6 10/10/01 change Value and FP
PR168 G5602R41U
C *0_4 PC69 10.10.20 change Value U:C2A C

2
15 13 0.1U/25V_6X
{8,13,33,42} MAINON EN/DEM BOOT +VTT
+3VPCU PC66 16 12 UGATE-VTT
TON UGATE PL10
0.1U/25V_4X PHASE-VTT
1 VOUT PHASE 11 C3A 1.0UH_7X7
PR170
PR95 2 VDD OC 10 U:C2A

5
10K_4 UP6111 5.1K/F_4 PR103
3 9 PR98 2.2/F_6 +5VPCU
FB VDDP

1
*2.2/F_6
4 8 LGATE-VTT 4 + PC79 PC80
{33} HWPG_VTT PGOOD LGATE

2
6 7 PQ43 PC81

1
2
3
GND PGND

1
PC67 RMW200N03FUBTB PC148
5 17 1U/10V_4X *1000P/50V_4X
NC TPAD

2
1U/10V_4X

*1000P/50V_4X

100K/F_6
0.01U/50V_4X

14 NC
1

1
PC138

PR97
PC141

PC65

390U/2.5V_105CS_E10f 0.01U/50V_6X 10U/6.3V_8X


B B
2

UP6111 UP6111
B2A
UP6111 UP6111
UP6111
PC137

*33P/50V_4N
PR160

PR166 4.02K/F_6

*0_6/S PR163
R1
10K/F_6
UP6111
R2

A
VOUT=(1+R1/R2)*0.75 A

UP6111
Quanta Computer Inc.
PROJECT : TE4
Size Document Number Rev
+VTT/+1.05V (G5602R41U) 1A

Date: Monday, January 24, 2011 Sheet 39 of 46


5 4 3 2 1

HTTP://FAQP.RU/
1 2 3 4 5

VIN

PR7118 +5VPCU
8152VCCGFX
PR7183
*IV@short_4
A VIN A
IV@10/F_6
PC7156
IV@1U/10V_4X PC7155

IV@2200P/50V_4X
IV@1U/10V_4X

IV@10U/25V_8X
IV@0.1U/25V_4X

*IV@10U/25V_8X
PR7126

19
IV@10/F_6

7
OCP 20A

PC7074

PC7136

PC7068

PC7140
VCC

PVDD
17 8152TONGFX (Peak 19A, AVG 15.4A)
TON PR7123IV@120K/F_4
PR7108 *IV@short_4 PC7083

5
GFXVR_VID_0_R 31 IV@0.1U/25V_4X
{6} GFXVR_VID_0 VID0
PR7107 *IV@short_4 PQ7041 Total capacitor : 330 uF
GFXVR_VID_1_R 30 IV@RMW130N03FUBTB +VAXG
{6} GFXVR_VID_1 VID1
PR7106 *IV@short_4 23 8152UGATEGFX 4 ESR : 4.5mΩ
UGATE
{6} GFXVR_VID_2
PR7105 *IV@short_4
GFXVR_VID_2_R 29 VID2 8152BOOTGFX IV@0.56UH_10X10-O
修正程沒有-smt f : 300k Hz
24 1 2 B2A

1
2
3
GFXVR_VID_3_R BOOT PR7174 IV@2.2_6 PL7009
28
{6} GFXVR_VID_3
PR7104 *IV@short_4 VID3
1 2
800 mils
GFXVR_VID_4_R 27 PC7153
{6} GFXVR_VID_4 VID4

2
PR7103 *IV@short_4 IV@0.1U/25V_4X

1
GFXVR_VID_5_R 26 PU7009 22 8152PHASEGFX PR7125 PC7137
{6} GFXVR_VID_5 VID5 PHASE + +
PR7111 *IV@short_4 IV@RT8152EGQW PQ7044 *IV@2.2/F_6 +
GFXVR_VID_6_R 8152LGATEGFX PR7186 PC7154 PC7148 PC7135

IV@330U/2V_7343P_E9c
{6} GFXVR_VID_6 25 VID6 LGATE 20 4

IV@0.1U/25V_4X
IV@3.74K/F_4

IV@330U/2V_7343P_E9c

*IV@330U/2V_7343P_E9c
1

2
IV@RMW200N03FUBTB

1
2
3
PC7082 PC7084

*IV@1500P/50V_4X
PR7113 *IV@short_4
8152DPRSLPVRGFX 3
{6} GFXVR_DPRSLPVR DPRSLPVR
B PR7177 *IV@short_4 IV@0.1U/25V_4X B
GFXVR_EN_R 4
{6} GFXVR_EN VRON PR7124
6 16 8152ISENGFX RDSon=5m ohm *IV@6.65K/F_4
PR7180 IV@10K/F_4 CLKEN ISEN 8152ISEN_NGFX
+3VPCU ISEN_N 15

PR7182 *IV@short_4 PC7163


8152PGOODGFX 5 IV@0.1U/25V_4X
{33} HWPG_VAXG PGOOD
PR7109 IV@10K/F_4 8152VRTTGFX 32 PC7164 *IV@56P/50V_4N
+1.05V VRTT
11 8152CMSETGFX
8152NTCGFX CMSET PR7187 IV@12K/F_4
1 NTC
12 8152VSENGFX
VSEN PC7162 PC7085
PR7173 PR7175 PR7176
8152VCCGFX 8152OCSETGFX 2 13 8152FBGFX
OCSET FB
IV@10K/F_4 IV@2.21K/F_4 IV@5.76K/F_4
*IV@0.1U/25V_4X IV@56P/50V_4N
PR7192 PR7194 PR7196
PR7195 IV@10K/F_4 +VAXG
IV@NTC_10K_6 PR7178 PC7161 IV@14K/F_4 IV@10_4
IV@6.34K/F_4
PR7193
VCC_AXG_SENSE {6}
IV@82P/50V_4N IV@NTC_10K_6
VSS_AXG_SENSE {6}
14 8152COMPGFX
COMP PR7128 IV@47.5K/F_4
PR7188
RGND 9
IV@10_4
PC7158
C PR7179 C
GFXVR_EN_R 8 8152SOFTGFX 1 2
SOFT
IV@470/F_4
IV@5600P/25V_4X
10 8152CMGFX GFXVR_IMON {6}
CM
PR7115
1

8152DPRSLPVRGFX
1

IV@10K/F_4 PR7189
PGND

IV@43K/F_4 PC7159
GND
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD

IV@0.022U/25V_4X
2
2

+VTT
18
33
35
34
36
37
38
39
40
41
42
21

PR7120 PR7116 PR7099


*IV@0_6 *IV@0_6 *IV@0_6
VIN +VAXG +VTT

GFXVR_VID_2_R GFXVR_VID_1_R GFXVR_VID_0_R

1
*IV@1M/F_6 PR7121 PR7127
*IV@22_8 PR7112 PR7114 PR7117 PR7119 PC7145 PC7146 PC7147
*IV@0_6 *IV@0_6 *IV@0_6 *IV@0_6

2
IV@270P/50V_4X IV@270P/50V_4X
IV@270P/50V_4X
3

D GFXVR_VID_6_R GFXVR_VID_5_R GFXVR_VID_4_R GFXVR_VID_3_R D


1

1
1

GFXVR_EN 2 PC7142 PC7143 PC7144 12/5 add 12/5 add 12/5 add
2 PC7141
2

2
IV@270P/50V_4X IV@270P/50V_4X IV@270P/50V_4X
2

PR7122 PQ7020 IV@270P/50V_4X


1

PQ7019 *IV@1M/F_6 *IV@2N7002K_300MA


PR7110 *IV@DTC144EUBTL_30MA Quanta Computer Inc.
1

*IV@100K/F_4
PROJECT : TE4
12/5 add 12/5 add Size Document Number Rev
12/5 add 12/5 add UMA GPU CORE (RT8152C) 1A

Date: Monday, January 24, 2011 Sheet 40 of 46


1 2 3 4 5

HTTP://FAQP.RU/
5 4 3 2 1

C3A
VR_PWRGD_CK505# {3} VIN

DELAY_VR_PWRGOOD {4,11}

1
1
PC42

PC37

PC38
+

10U/25V_8X
0.1U/50V_6X

*10U/25V_8X
PC125
100U/25V_105CE_f

2
PQ32

5
RMW130N03FUBTB

4
B2A:change footprint(no smt)

1
2
3
+VCC_CORE
D VIN +3VPCU 0.36UH_10X10-O D
PL6
CORE-PHASE1 1 2

2
PR143 PC53
OCP 58.5~60A

4
5
2.2/F_6 PR152 PC52
2.2/F_4 + + Total capactor : 1450uF
PR137 PR133 PQ29
+5VPCU 1.91K/F_4 4 ESR:2.25mΩ

1
1.91K/F_4 f:400k Hz
PC118 RMW200N03FUBTB

1
2
3
PR142 PC130 (Peak 58A,AVG 48A)
10/F_6 0.22U/25V_6X 2200P/50V_4X
PR25

PR155 PR156 330U/2V_7343P_E9c

16

17

40

1
*Short_8 PU8 *Short_4 *Short_4

1
PC119

CLK_EN#
VIN
VDD

PGOOD
Load Line=1.9mV/A
1U/16V_6X

2
41 330U/2V_7343P_E9c 1.1m/2*0.763=419.65u
+VTT PAD
20 UGATE1 419.65u/1.24k=338p
UGATE1 PR138 10K/F_4
BOOT1
19 1 2 338p*2*2.8k=1.895m
PR125
{6} PSI# PSI# PR128 10K/F_4 2 PR146 VSUM+ PR145 3.65K/F_6
68_4 PSI# 2.2_6 PC120 40u/2*1.24k=24.8m , 24.8m/0.768=32.29m
PR119 147K/F_6 3 0.22U/25V_6X
RBIAS VSUM- PR132 1/F_4
PHASE1
21 32.29m/(1.1m/2)=58.7
{4} H_PROCHOT# 4
VR_TT# LGATE1a
23
PR7135 PR123 LGATE1a PR127 10K/F_4 VIN
*NTC_470K_4 *4.02K/F_4
C3A
Close to Phase 1 Inductor
5
PC109 NTC
C C
*0.01U/25V_4X 24
LGATE1b

1
1 2

1
PC36

PC39

PC41
+

10U/25V_8X
0.1U/50V_6X

*10U/25V_8X
22
VSSP1 PC128
11 100U/25V_105CE_f

2
H_VID0 ISEN1
{6} H_VID0 31
VID0

1
H_VID1 32
{6} H_VID1 VID1 PC114

5
H_VID2 33 0.22U/10V_4X PQ31
{6} H_VID2

2
VID2
H_VID3 34 VSUM-
{6} H_VID3 VID3 PR36 *Short_6 4
H_VID4 35 25 +5VPCU RMW130N03FUBTB
{6} H_VID4 VID4 VCCP
PC122

1
2
3
H_VID5 36 B2A:change footprint(no smt) +VCC_CORE
{6} H_VID5 VID5 ISL62882HRTZ-TR5390 1 2
H_VID6 37 1U/10V_4X 0.36UH_10X10-O
{6} H_VID6 VID6 PC123 PL7
VR_ON 38 1 21U/16V_6X 1 2
{33} VRON VR_ON

5
DPRSLPVR UGATE2
{6} ICH_DPRSTP# 39 29 48A

4
DPRSLPVR UGATE2
2

2
PC47 PC46
PR140 30 1 2 PQ30 PR154 + +
PR144 499/F_4 BOOT2
4 2.2/F_4
OCP 60A
100K/F_4 PR7035
2.2_6 PC121
1

1
2
3

1
8 0.22U/25V_6X RMW200N03FUBTB
FB CORE-PHASE2
28
PHASE2
PR121 PC19 26 LGATE2 PR158 PR157
*10K/F_4 22P/50V_4N LGATE2 PC134 *Short_4 *Short_4 330U/2V_7343P_E9c
9 27 12/5 change 330U/2V_7343P_E9c
FB2 VSSP2 2200P/50V_4X
PR122 10
412K/F_4 PC106 ISEN2
B B
2 1
1

150P/50V_4N 7 PC113
COMP 0.22U/6.3V_4X
2

VSUM-
PC108
10P/50V_4N PR124 6
8.06K/F_4 VW
18 ISENSE {6}
IMON
PR134 10K/F_4
1

PR31 PC28
PC111 10.2K/F_4 0.033U/10V_4X
1000P/50V_4X VSUM+ PR141 3.65K/F_6
2
ISUM+
ISUM-
VSEN

VSSSENSE
RTN

PR129 VSUM- PR136 1/F_4


12

13

14

15

2.8K/F_4 PR139 10K/F_4

Close to Pin 14,15


PR126 PC112
562/F_4 390P/50V_4X VSUM+
0.33U/6.3V_4X
1

+VCC_CORE 1 2 PR30 PC25 PC26 PR29


PR65 10_4 82.5/F_4 *0.1U/25V_4X 2.61K/F_4
2

PC115
*Short_4 PR43 PC24 PR28
330P/50V_4X 11K/F_4
{6} VCCSENSE
Parallel PC117 PR26
2700P/50V_4X
2

PC116 330P/50V_4X NTC_10K_6 Panasonic


{6} VSSSENSE
PC23 PR27
A *Short_4 PR44 0.01U/25V_4X *Short_4
ERT-J1VR103J A
1

1 2 1000P/50V_4X
PR64 10_4
VSUM-
10/10/01 change AGND to GND
PR24 E3A
1.24K/F_4 PC20
0.1U/25V_4X Close to Phase 1 Inductor

PC22 PR23 Load Line setting to 2mV/A Quanta Computer Inc.


*1000P/50V_4X *100/F_4
PROJECT : TE4
Size Document Number Rev
1A
+VCC_CORE(ISL62882HRTZ-T)
Date: Monday, January 24, 2011 Sheet 41 of 46
5 4 3 2 1

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5 4 3 2 1

+3VPCU

+5VPCU
PR39
*100K_4
P7
PU2
G9661-25ADJF12U
PC43 0.1U/25V_4X 4
{8,13,33,39} MAINON VPP PGOOD 1 HWPG_1.8V
D D
2 1 2 VEN VO 6 +1.8V
PR40 *0_4/S
+3VPCU 3 VIN (Peak 1.45A, AVG 1A)

10U/6.3V_8X
8 GND

ADJ

PC45
9 GND NC 5

10U/6.3V_8X
PC32

7
PC40 PC33 PR51
0.1U/25V_4X *0.1U/25V_4X
R1
12.7K/F_4

PR50
Vout =0.8(1+R1/R2) 10K/F_4
R2

C C
VIN +3V_S5 +5V_S5 +15V

PR79 PR71 PR72 PR76


1M/F_6 *22_8 *22_8 1M/F_6

S5D
S5D {37}
3

3
{33} S5_ON 2
2 2 2
PC63
PQ13 PR80
1

1M/F_6 PQ10 PQ11 PQ12


PR77
1

1
100K_4 2200P/50V_4X

DTC144EUBTL_30MA *2N7002K_300MA *2N7002K_300MA 2N7002K_300MA

B B

VIN +3V +5V +1.5V +15V

PR88 PR82 PR83 PR81 PR84


1M/F_6 22_8 22_8 22_8 C3A 499K/F_6

MAINON_ON_G MAIND {8,37,38}


3

3
3

PQ15
PR87
2 1M/F_6 2 2 2 2
{8,13,33,39} MAINON PC64
*2200P/50V_4X
PQ18 PQ16 PQ17 PQ14
1

C3A
1

PR85
100K_4

DTC144EUBTL_30MA 2N7002K_300MA
A 2N7002K_300MA 2N7002K_300MA 2N7002K_300MA A

D3B
{8,14} MAINON_ON_G
Quanta Computer Inc.
PROJECT : TE4
Size Document Number Rev
1A
+1.8V (G966A)/Discharge
Date: Monday, January 24, 2011 Sheet 42 of 46
5 4 3 2 1

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5 4 3 2 1

AO6402A S5D enable


OCP:12.1A P.37 +5V_S5 (peak 1A, Avg 0.7A)
+5VPCU
AC/DC Insert enable
(Peak 8.421A , AVG 5.895A)
AO6402A MAIND enable
D
PM6686TR P.37 +5V (peak 3.5A, Avg 2.4A) D

AC P.37
System
Charger
DC ISL88731C
P.36 OCP:12.1A
AO6402A MAIND enable
+3VPCU +3V (peak 6A, Avg 4.2A)
AC/DC Insert enable P.37
(Peak 9.073A, AVG 6.351A)

AO6402A S5D enable


+3V_S5 (peak 0.35A, Avg 0.25A)
P.37
+SMDDR_VTERM
SUSON enable
C
G9661-25ADJ MAINON enable C

+1.8V
RT8207LGQW P.42 (peak 1.45A, Avg 1A)

P.38
+SMDDR_VREF
SUSON enable

OCP:18.47A
AO6402A
+1.5VSUS MAIND enable
SUSON enable P.38 +1.5V (peak 0.16A, Avg 0.11A)
(Peak 9.061A, AVG 6.342A)

RT8202AGQW OCP:20.104A
+1.05V,+VTT
P.39
B
GFX_MAINON enable B

(Peak 24.390A , AVG 17.073A)

OCP 20A
+VAXG
RT8152CGQW
P.40 VRON enable
(Peak 33A , AVG 23A)

OCP 58.5~60A
ISL62882HRTZ VCC_CORE
P.41 VRON enable
(Peak 58A,AVG 48A)

A
Discharge A

P.42
Quanta Computer Inc.
PROJECT : TE4
Size Document Number Rev
1A
POWER TREE TABLE
Date: Thursday, January 20, 2011 Sheet 44 of 46
5 4 3 2 1

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5 4 3 2 1

MODEL TE4
Model REV CHANGE LIST PAGE FROM To

1 1A
PAGE 14: R22 no stuff 2 1A
2A PAGE 15: R23 no stuff 3 1A
TE4 MB PAGE 27: add R470 4 1A
PAGE 28: add Q1100/R1015 and no stuff 5 1A
D
PAGE 32: add Q40 6 1A D

7 1A
8 1A
9 1A
10 1A
11 1A
12 1A
13 1A
14 1A
15 1A
16 1A
17 1A
18 1A
19 1A
20 1A
21 1A
22 1A
23 1A
24 1A
C
25 1A C

26 1A
27 1A
28 1A
29 1A
30 1A

B B

A A

PROJECT MODEL : TE4 APPROVED BY: Kent Su DATE: 2010/11/12 Quanta Computer Inc.
DOC NO. 204 PROJECT : TE4
PART NUMBER: DRAWING BY: Kent Su REVISON: 1A Size Document Number Rev
1A
Block Diagram
Date: Thursday, December 02, 2010 Sheet 45 of 46
5 4 3 2 1

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5 4 3 2 1

MODEL TE2
Model REV CHANGE LIST PAGE FROM To

1 1A
PAGE 38: PC212 change value and FP to 0.1U/25V_6X ; add PD9 (10.10.06) 2 1A
1A PAGE 35: add PC71 and PC76 for EMI Sol. (10.10.06) 3 1A
TE4 MB PAGE 36: add PD12 , PR142 and PR139 (10.10.06) 4 1A
Rename 5 1A
PAGE 36: PR169 , PR171, PR165 , PU10 , PR101 change Value ; PR173 , PR102 , PR96 no stuff ; PR175 stuff (10.10.20) 6 1A
PAGE 37: PC133 change Value and FP (10.10.20) 7 1A
D D
PAGE 38: PU9 , PQ41 , PQ43 change Value (10.10.20) 8 1A
9 1A
PAGE 35: add PC158 and PC99 for EMI sol. (10.11.5) 10 1A
PAGE 35: add PU11 (10.11.5) 11 1A
PAGE 36: delete PJP5 , PJP6 (10.11.5) 12 1A
PAGE 36: change PL8 , PL9 , PR35 Value (10.11.5) 13 1A
PAGE 37: delete PJP4 , PC135 stuff , PR42 change Value (10.11.5) 14 1A
PAGE 38: PU9 change Value (10.11.5) 15 1A
16 1A
17 1A
18 1A
19 1A
20 1A
21 1A
22 1A
23 1A
24 1A
25 1A
26 1A
27 1A
C
28 1A
C
29 1A
30 1A

B B

Quanta Computer Inc.


PROJECT MODEL : TE2 APPROVED BY: Mosy Li DATE: 2009/11/13
PROJECT : TE4
DOC NO. 204 Size Document Number Rev
PART NUMBER: DRAWING BY: Mosy Li REVISON: 1A GPU 1A
Date: Thursday, December 02, 2010 Sheet 46 of 46
A A

5 4 3 2 1

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