S E M I C O N D U C T O R HA5024

Quad 125MHz Video Current

November 1996 Feedback Amplifier with Disable

Features
• Quad Version of HA-5020
• Individual Output Enable/Disable
• Input Offset Voltage . . . . . . . . . . . . . . . . . . . . . . . 800µV
• Wide Unity Gain Bandwidth . . . . . . . . . . . . . . . 125MHz
• Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 475V/µs
• Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . 0.03%
• Differential Phase. . . . . . . . . . . . . . . . . . . 0.03 Degrees
• Supply Current (per Amplifier) . . . . . . . . . . . . . . 7.5mA
• ESD Protection. . . . . . . . . . . . . . . . . . . . . . . . . . . 4000V
• Guaranteed Specifications at ±5V Supplies
Applications
• Video Multiplexers; Video Switching and Routing
• Video Gain Block
• Video Distribution Amplifier/RGB Amplifier
• Flash A/D Driver
• Current to Voltage Converter
• Medical Imaging
Description
The HA5024 is a quad version of the popular Harris
HA5020. It features wide bandwidth and high slew rate, and
is optimized for video applications and gains between 1 and
10. It is a current feedback amplifier and thus yields less
bandwidth degradation at high closed loop gains than volt-
age feedback amplifiers.
The low differential gain and phase, 0.1dB gain flatness, and
ability to drive two back terminated 75Ω cables, make this
amplifier ideal for demanding video applications.
The HA5024 also features a disable function that signifi-
cantly reduces supply current while forcing the output to a
true high impedance state. This functionality allows 2:1 and
4:1 video multiplexers to be implemented with a single IC.
The current feedback design allows the user to take advan-
tage of the amplifier’s bandwidth dependency on the feed-
back resistor. By reducing RF , the bandwidth can be
increased to compensate for decreases at higher closed
loop gains or heavy output loads.
Ordering Information
TEMP. PKG.
PART NUMBER RANGE (oC) PACKAGE NO.
HA5024IP -40 to 85 20 Ld PDIP E20.3

• Radar and Imaging Systems HA5024IB -40 to 85 20 Ld SOIC M20.3

HA5024EVAL High Speed Op Amp DIP Evaluation Board

Pinout
HA5024
(PDIP, SOIC)
TOP VIEW

OUT1 1 20 OUT4
-IN1 2 - - 19 -IN4
+ +
+IN1 3 18 +IN4
DIS1 4 17 DIS4
NC 5 16 NC
V+ 6 15 V-
DIS2 7 14 DIS3
+IN2 8 13 +IN3
+ +
9
- - 12 -IN3
-IN2
OUT2 10 11 OUT3

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. File Number 3550.3
Copyright © Harris Corporation 1996
3-370
 HA5024

Absolute Maximum Ratings Thermal Information

Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . . . 36V Thermal Resistance (Typical, Note 2) θJA (oC/W)
DC Input Voltage (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . ±VSUPPLY PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Differential Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10V SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Output Current (Note 4) . . . . . . . . . . . . . . . . Short Circuit Protected Maximum Junction Temperature (Note 1) . . . . . . . . . . . . . . . . . 175oC
ESD Rating (Note 3) Maximum Junction Temperature (Plastic Package, Note 1) . . . . 150oC
Human Body Model (Per MIL-STD-883 Method 3015.7) . . 2000V Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
Operating Conditions (SOIC - Lead Tips Only)
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
Supply Voltage Range (Typical) . . . . . . . . . . . . . . . . . ±4.5V to ±15V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:
1. Maximum power dissipation, including output load, must be designed to maintain junction temperature below 175oC for die, and below
150oC for plastic packages. See Application Information section for safe operating area information.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
3. The non-inverting input of unused amplifiers must be connected to GND.
4. Output is protected for short circuits to ground. Brief short circuits to ground will not degrade reliability, however, continuous (100% duty
cycle) output current should not exceed 15mA for maximum reliability.

Electrical Specifications VSUPPLY = ±5V, RF = 1kΩ, AV = +1, RL = 400Ω, CL ≤ 10pF,Unless Otherwise Specified

(NOTE 11)
TEST TEMP.
PARAMETER TEST CONDITIONS LEVEL (oC) MIN TYP MAX UNITS
INPUT CHARACTERISTICS
Input Offset Voltage (VIO) A 25 - 0.8 3 mV
A Full - - 5 mV
Delta VIO Between Channels A Full - 1.2 3.5 mV
Average Input Offset Voltage Drift B Full - 5 - µV/oC
VIO Common Mode Rejection Ratio Note 5 A 25 53 - - dB
A Full 50 - - dB
VIO Power Supply Rejection Ratio ±3.5V ≤ VS ≤ ±6.5V A 25 60 - - dB
A Full 55 - - dB
Input Common Mode Range Note 5 A Full ±2.5 - - V
Non-Inverting Input (+IN) Current A 25 - 3 8 µA
A Full - - 20 µA
+IN Common Mode Rejection Note 5 A 25 - - 0.15 µA/V
1 )
(+IBCMR =---------
- A Full - - 0.5 µA/V
R IN
+IN Power Supply Rejection ±3.5V ≤ VS ≤ ±6.5V A 25 - - 0.1 µA/V
A Full - - 0.3 µA/V
Inverting Input (-IN) Current A 25,85 - 4 12 µA
A -40 - 10 30 µA
Delta -IN BIAS Current Between Channels A 25,85 - 6 15 µA
A -40 - 10 30 µA
-IN Common Mode Rejection Note 5 A 25 - - 0.4 µA/V
A Full - - 1.0 µA/V
-IN Power Supply Rejection ±3.5V ≤ VS ≤ ±6.5V A 25 - - 0.2 µA/V
A Full - - 0.5 µA/V

3-371
 HA5024

Electrical Specifications VSUPPLY = ±5V, RF = 1kΩ, AV = +1, RL = 400Ω, CL ≤ 10pF,Unless Otherwise Specified (Continued)

(NOTE 11)
TEST TEMP.
PARAMETER TEST CONDITIONS LEVEL (oC) MIN TYP MAX UNITS
Input Noise Voltage f = 1kHz B 25 - 4.5 - nV/√Hz
+Input Noise Current f = 1kHz B 25 - 2.5 - pA/√Hz
-Input Noise Current f = 1kHz B 25 - 25.0 - pA/√Hz
TRANSFER CHARACTERISTICS
Transimpedence Note 16 A 25 1.0 - - MΩ
A Full 0.85 - - MΩ
Open Loop DC Voltage Gain RL = 400Ω, VOUT = ±2.5V 25A 25 70 - - dB
A Full 65 - - dB
Open Loop DC Voltage Gain RL = 100Ω, VOUT = ±2.5V A 25 50 - - dB
A Full 45 - - dB
OUTPUT CHARACTERISTICS
Output Voltage Swing RL = 150Ω A 25 ±2.5 ±3.0 - V
A Full ±2.5 ±3.0 - V
Output Current RL = 150Ω B Full ±16.6 ±20.0 - mA
Output Current, Short Circuit VIN = ±2.5V, VOUT = 0V A Full ±40 ±60 - mA
Output Current, Disabled (Note 5) DISABLE = 0V, A Full - - 2 µA
VOUT = ±2.5V, VIN = 0V
Output Disable Time Note 12 B 25 - 40 - µs
Output Enable Time Note 13 B 25 - 40 - ns
Output Capacitance Disabled Note 14 B 25 - 15 - pF
POWER SUPPLY CHARACTERISTICS
Supply Voltage Range A 25 5 - 15 V
Quiescent Supply Current A Full - 7.5 10 mA/Op Amp
Supply Current, Disabled DISABLE = 0V A Full - 5 7.5 mA/Op Amp

Disable Pin Input Current DISABLE = 0V A Full - 1.0 1.5 mA

Minimum Pin 8 Current to Disable Note 6 A Full 350 - - µA

Maximum Pin 8 Current to Enable Note 7 A Full - - 20 µA
AC CHARACTERISTICS (AV = +1)
Slew Rate Note 8 B 25 275 350 - V/µs
Full Power Bandwidth Note 9 B 25 22 28 - MHz
Rise Time Note 10 B 25 - 6 - ns
Fall Time Note 10 B 25 - 6 - ns
Propagation Delay Note 10 B 25 - 6 - ns
Overshoot B 25 - 4.5 - %
-3dB Bandwidth VOUT = 100mV B 25 - 125 - MHz
Settling Time to 1% 2V Output Step B 25 - 50 - ns
Settling Time to 0.25% 2V Output Step B 25 - 75 - ns
AC CHARACTERISTICS (AV = +2, RF = 681Ω)
Slew Rate Note 8 B 25 - 475 - V/µs
Full Power Bandwidth Note 9 B 25 - 26 - MHz

3-372
 HA5024

Electrical Specifications VSUPPLY = ±5V, RF = 1kΩ, AV = +1, RL = 400Ω, CL ≤ 10pF,Unless Otherwise Specified (Continued)

(NOTE 11)
TEST TEMP.
PARAMETER TEST CONDITIONS LEVEL (oC) MIN TYP MAX UNITS
Rise Time Note 10 B 25 - 6 - ns
Fall Time Note 10 B 25 - 6 - ns
Propagation Delay Note 10 B 25 - 6 - ns
Overshoot B 25 - 12 - %
-3dB Bandwidth VOUT = 100mV B 25 - 95 - MHz
Settling Time to 1% 2V Output Step B 25 - 50 - ns
Settling Time to 0.25% 2V Output Step B 25 - 100 - ns
Gain Flatness 5MHz B 25 - 0.02 - dB
20MHz B 25 - 0.07 - dB
AC CHARACTERISTICS (AV = +10, RF = 383Ω)
Slew Rate Note 8 B 25 350 475 - V/µs
Full Power Bandwidth Note 9 B 25 28 38 - MHz
Rise Time Note 10 B 25 - 8 - ns
Fall Time Note 10 B 25 - 9 - ns
Propagation Delay Note 10 B 25 - 9 - ns
Overshoot B 25 - 1.8 - %
-3dB Bandwidth VOUT = 100mV B 25 - 65 - MHz
Settling Time to 1% 2V Output Step B 25 - 75 - ns
Settling Time to 0.1% 2V Output Step B 25 - 130 - ns
VIDEO CHARACTERISTICS
Differential Gain (Note 15) RL = 150Ω B 25 - 0.03 - %
Differential Phase (Note 15) RL = 150Ω B 25 - 0.03 - Degrees
NOTES:
5. VCM = ±2.5V. At -40oC Product is tested at VCM = ±2.25V because short test duration does not allow self heating.
6. RL = 100Ω, VIN = 2.5V. This is the minimum current which must be pulled out of the Disable pin in order to disable the output. The output
is considered disabled when -10mV ≤ VOUT ≤ +10mV.
7. VIN = 0V. This is the maximum current that can be pulled out of the Disable pin with the HA5024 remaining enabled. The HA5024 is
considered disabled when the supply current has decreased by at least 0.5mA.
8. VOUT switches from -2V to +2V, or from +2V to -2V. Specification is from the 25% to 75% points.

Slew Rate
9. FPBW = ----------------------------
-; V = 2V .
2πV PEAK PEAK

10. RL = 100Ω, VOUT = 1V. Measured from 10% to 90% points for rise/fall times; from 50% points of input and output for propagation delay.
11. A. Production Tested; B. Typical or Guaranteed Limit based on characterization; C. Design Typical for information only.
12. VIN = +2V, DISABLE = +5V to 0V. Measured from the 50% point of DISABLE to VOUT = 0V.
13. VIN = +2V, DISABLE = 0V to +5V. Measured from the 50% point of DISABLE to VOUT = 2V.
14. VIN = 0V, Force VOUT from 0V to ±2.5V, tR = tF = 50ns, DISABLE = 0V.
15. Measured with a VM700A video tester using an NTC-7 composite VITS.
16. VOUT = ±2.5V. At -40oC Product is tested at VOUT = ±2.25V because short test duration does not allow self heating.

3-373
 HA5024

Test Circuits and Waveforms

+
-
DUT

50Ω

HP4195
NETWORK 50Ω
ANALYZER

FIGURE 1. TEST CIRCUIT FOR TRANSIMPEDANCE MEASUREMENTS

DUT
VIN + VOUT
-
DUT 50Ω RL
VIN + 400Ω
VOUT
-
RF , 681Ω
50Ω RL
RI
100Ω 681Ω
RF , 1kΩ

FIGURE 2. SMALL SIGNAL PULSE RESPONSE CIRCUIT FIGURE 3. LARGE SIGNAL PULSE RESPONSE CIRCUIT

Vertical Scale: VIN = 100mV/Div., VOUT = 100mV/Div. Vertical Scale: VIN = 1V/Div., VOUT = 1V/Div.
Horizontal Scale: 20ns/Div. Horizontal Scale: 50ns/Div.

FIGURE 4. SMALL SIGNAL RESPONSE FIGURE 5. LARGE SIGNAL RESPONSE

3-374
 Schematic (One Amplifier of Four)

V+
R2 R5 R6 R10 R15 R19 R33 R29
D2 QP8 QP9
800 2.5K 15K 820 400 400 R27 2K 9.5
200 QP19
QP11 QP14
QP18
QP1 QP5 R31
R11 5
1K R17 R18
R24
280 280 QP16
QN5 140
QP20
QP10
R20
140
QN12 QP15
R8
1.25K C1
QN8
1.4pF
QP2
QP12
QP3 R28
R1 QP6 20
60K QN6 -IN
R7 R12
QN1 15K QP17
280 QN13
QP4 +IN QN17
DIS
QP13 R25
R3 C2 20
6K 1.4pF

3-375
HA5024

QN15
QN2
R21
QN10 140
QN21

D1 QP7 R14 R22 R25

QN4
280 280 140 R32
QN16 QN18 5
R13 QN14 QN20 QN19
QN3 QN7 1K
R30
R16 R23 R26 R26 7
400 400 200 200
OUT

R4 R33 R9
800 800 820 QN9 QN11

V-
 HA5024

Application Information Driving Capacitive Loads

Optimum Feedback Resistor Capacitive loads will degrade the amplifier’s phase margin
resulting in frequency response peaking and possible oscil-
The plots of inverting and non-inverting frequency response, lations. In most cases the oscillation can be avoided by plac-
see Figure 11 and Figure 12 in the Typical Performance ing an isolation resistor (R) in series with the output as
Curves section, illustrate the performance of the HA5024 in shown in Figure 6.
various closed loop gain configurations. Although the band-
width dependency on closed loop gain isn’t as severe as that VIN R
+ VOUT
of a voltage feedback amplifier, there can be an appreciable -
decrease in bandwidth at higher gains. This decrease may RT
CL
be minimized by taking advantage of the current feedback
amplifier’s unique relationship between bandwidth and RF. RF
All current feedback amplifiers require a feedback resistor, RI
even for unity gain applications, and RF , in conjunction with
the internal compensation capacitor, sets the dominant pole
of the frequency response. Thus, the amplifier’s bandwidth is
FIGURE 6. PLACEMENT OF THE OUTPUT ISOLATION
inversely proportional to RF . The HA5024 design is opti- RESISTOR, R
mized for a 1000Ω RF at a gain of +1. Decreasing RF in a
unity gain application decreases stability, resulting in exces- The selection criteria for the isolation resister is highly
sive peaking and overshoot. At higher gains the amplifier is dependent on the load, but 27Ω has been determined to be
more stable, so RF can be decreased in a trade-off of stabil- a good starting value.
ity for bandwidth.
The table below lists recommended RF values for various
Power Dissipation Considerations
gains, and the expected bandwidth. Due to the high supply current inherent in quad amplifiers,
care must be taken to insure that the maximum junction tem-
GAIN BANDWIDTH
(ACL) RF (Ω) (MHz)
perature (TJ, see Absolute Maximum Ratings) is not
exceeded. Figure 7 shows the maximum ambient temperature
-1 750 100 versus supply voltage for the available package styles (Plastic
+1 1000 125 DIP, SOIC). At ±5VDC quiescent operation both package
styles may be operated over the full industrial range of -40oC
+2 681 95 to 85oC. It is recommended that thermal calculations, which
+5 1000 52 take into account output power, be performed by the designer.
130
+10 383 65

-10 750 22 120

MAX. AMBIENT TEMPERATURE

110
PC Board Layout PDIP
100
The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The 90
use of low inductance components such as chip resistors
and chip capacitors is strongly recommended. If leaded 80
components are used the leads must be kept short espe-
70 SOIC
cially for the power supply decoupling components and
those components connected to the inverting input. 60

Attention must be given to decoupling the power supplies. A 50

large value (10µF) tantalum or electrolytic capacitor in paral- 5 7 9 11 13 15
lel with a small value (0.1µF) chip capacitor works well in SUPPLY VOLTAGE (±V)
most cases.
FIGURE 7. MAXIMUM OPERATING AMBIENT TEMPERATURE
A ground plane is strongly recommended to control noise. vs SUPPLY VOLTAGE
Care must also be taken to minimize the capacitance to
ground seen by the amplifier’s inverting input (-IN). The Enable/Disable Function
larger this capacitance, the worse the gain peaking, resulting
in pulse overshoot and possible instability. It is When enabled the amplifier functions as a normal current
recommended that the ground plane be removed under feedback amplifier with all of the data in the electrical specifi-
traces connected to -IN, and that connections to -IN be kept cations table being valid and applicable. When disabled the
as short as possible to minimize the capacitance from this amplifier output assumes a true high impedance state and
node to ground. the supply current is reduced significantly.

3-376
 HA5024

The circuit shown in Figure 8 is a simplified schematic of the
enable/disable function. The large value resistors in series with
the DISABLE pin makes it appear as a current source to the
driver. When the driver pulls this pin low current flows out of the
pin and into the driver. This current, which may be as large as
350µA when external circuit and process variables are at their
extremes, is required to insure that point “A” achieves the
proper potential to disable the output.The driver must have the
compliance and capability of sinking all of this current.
When VCC is +5V the DISABLE pin may be driven with a
dedicated TTL gate. The maximum low level output voltage
of the TTL gate, 0.4V, has enough compliance to insure that
the amplifier will always be disabled even though D1 will not
turn on, and the TTL gate will sink enough current to keep
point “A” at its proper voltage. When VCC is greater than +5V
the DISABLE pin should be driven with an open collector
device that has a breakdown rating greater than VCC .
its equivalent is used to select channels its logic must be break
before make. When these conditions are satisfied the
HA5024IP is often used as a remote video multiplexer, and the
multiplexer may be extended by adding more amplifier ICs.
Low Impedance Multiplexer
Two common problems surface when you try to multiplex
multiple high speed signals into a low impedance source
such as an A/D converter. The first problem is the low source
impedance which tends to make amplifiers oscillate and
causes gain errors. The second problem is the multiplexer
which supplies no gain, introduces all kinds of distortion and
limits the frequency response. Using op amps which have an
enable/disable function, such as the HA5024, eliminates the
multiplexer problems because the external mux chip is not
needed, and the HA5024 can drive low impedance (large
capacitance) loads if a series isolation resistor is used.

Referring to Figure 8, it can be seen that R6 will act as a pull-up VIDEO R4 VIDEO OUTPUT
INPUT 3 75 TO 75Ω LOAD
resistor to +VCC if the DISABLE pin is left open. In those cases #1 + 1
2 -
where the enable/disable function is not required on all circuits R1 U1A 4
some circuits can be permanently enabled by letting the DIS- 75
R5
ABLE pin float. If a driver is used to set the enable/disable level, R3 R2
2000
be sure that the driver does not sink more than 20µA when the 681
681
DISABLE pin is at a high level. TTL gates, especially CMOS 1 R21
versions, do not violate this criteria so it is permissible to control R9 100
8 75 +5V
the enable/disable function with TTL. + 10
9 - 2
S1
+VCC R6 U1B 3
7
75 4
R6 R10 ALL
R33 R7 OFF
15K R10 2000
R8 681
QP18 681
D1 -5V
R7 R8 VIDEO R14
A INPUT 15
15K 13 75
#3 11
QP3 12 +-
ENABLE/DISABLE INPUT R11 U1C 14
75
R12 R15
FIGURE 8. SIMPLIFIED SCHEMATIC OF ENABLE/DISABLE R13 2000
681
FUNCTION 681
+5V
Typical Applications VIDEO R19
INPUT 18 6 75
#4 + 20
Four Channel Video Multiplexer 19 -
R16 U1D 17
Referring to the amplifier U1A in Figure 9, R1 terminates the 75
R20
cable in its characteristic impedance of 75Ω, and R4 back R17
R18 2000
681
terminates the cable in its characteristic impedance. The 681
amplifier is set up in a gain configuration of +2 to yield an
overall network gain of +1 when driving a double terminated
+5V IN +5V -5V IN -5V
cable. The value of R3 can be changed if a different network
gain is desired. R5 holds the disable pin at ground thus 0.1µF 10µF 0.1µF 10µF
inhibiting the amplifier until the switch, S1, is thrown to posi-
tion 1. At position 1 the switch pulls the disable pin up to the
plus supply rail thereby enabling the amplifier. Since all of NOTES:
the actual signal switching takes place within the amplifier, 17. U1 is HA5024IP.
its differential gain and phase parameters, which are 0.03% 18. All resistors in Ω.
and 0.03 degrees respectively, determine the circuit’s perfor- 19. S1 is break before make.
mance. The other three circuits, U1B through U1D, operate in
20. Use ground plane.
a similar manner.
When the plus supply rail is 5V the disable pin can be driven by FIGURE 9. FOUR CHANNEL VIDEO MULTIPLEXER
a dedicated TTL gate as discussed earlier. If a multiplexer IC or

3-377
 HA5024

Referring to Figure 10, both inputs are terminated in their
characteristic impedance; 75Ω is typical for video applica-
tions. Since the drivers usually are terminated in their charac-
teristic impedance the input gain is 0.5, thus the amplifiers, U2,
are configured in a gain of +2 to set the circuit gain equal to
one. Resistors R2 and R3 determine the amplifier gain, and if a
different gain is desired R2 should be changed according to the
equation G = (1 + R3/R2). R3 sets the frequency response of
the amplifier so you should refer to the manufacturers data
sheet before changing its value. R5, C1 and D1 are an asym-
metrical charge/discharge time circuit which configures U1 as a
break before make switch to prevent both amplifiers from being
active simultaneously. If this design is extended to more chan-
nels the drive logic must be designed to be break before
make. R4 is enclosed in the feedback loop of the amplifier so
that the large open loop amplifier gain of U2 will present the
load with a small closed loop output impedance while keep-
ing the amplifier stable for all values of load capacitance.
The circuit shown in Figure 10 was tested for the full range of
capacitor values with no oscillations being observed; thus,
problem one has been solved.The frequency and gain char-
acteristics of the circuit are now those of the amplifier indepen-
dent of any multiplexing action; thus, problem two has been
solved. The multiplexer transition time is approximately 15µs
with the component values shown.

R3A
681
INPUT B
R1A
R1A 681 R4A
U2A
75 16 27
1 +
-
INPUT A 4
2 -5V
R1B D1A 3
0.01µF
75 1N4148

R5A
2000 R3B
U1C
681
C1A
R2B
0.047µF R4B
681
CHANNEL 7 U2B 27
SWITCH - 10 OUTPUT
6 + 13
5 +5V
R5B 0.01µF
2000
U1D
U1B
U1A C1B NOTES:
INHIBIT
0.047µF 1. U2: HA5022/24.
R6 D1B
100K 1N4148 2. U1: CD4011.

FIGURE 9. LOW IMPEDANCE MULTIPLEXER

Typical Performance Curves VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC,

Unless Otherwise Specified

5 5
VOUT = 0.2VP-P VOUT = 0.2VP-P
4 CL = 10pF AV = +1, RF = 1kΩ 4
CL = 10pF
3 AV = 2, RF = 681Ω 3 RF = 750Ω
NORMALIZED GAIN (dB)

AV = -1
NORMALIZED GAIN (dB)

2 AV = 5, RF = 1kΩ 2

1 1
AV = -2
0 0

-1 -1

-2 -2 AV = -10
-3 AV = 10, RF = 383Ω -3
AV = -5
-4 -4

-5 -5
2 10 100 200 2 10 100 200
FREQUENCY (MHz) FREQUENCY (MHz)

FIGURE 9. NON-INVERTING FREQUENCY RESPONSE FIGURE 10. INVERTING FREQUENCY RESPONSE

3-378
 HA5024

Typical Performance Curves VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC,

Unless Otherwise Specified (Continued)

140

-3dB BANDWIDTH (MHz)

VOUT = 0.2VP-P
NONINVERTING PHASE (DEGREES)

0 180
AV = +1, RF = 1kΩ

INVERTING PHASE (DEGREES)

CL = 10pF
-45 135 AV = +1
130
-90 90
AV = -1, RF = 750Ω
-135 45
AV = +10, RF = 383Ω
-100 0 -3dB BANDWIDTH
120 10

GAIN PEAKING (dB)

-225 -45

-270 -90
AV = -10, RF = 750Ω 5
-315 -135
VOUT = 0.2VP-P
-360 -180
CL = 10pF GAIN PEAKING
0
2 10 100 200 500 700 900 1100 1300 1500
FREQUENCY (MHz) FEEDBACK RESISTOR (Ω)

FIGURE 11. PHASE RESPONSE AS A FUNCTION OF FIGURE 12. BANDWIDTH AND GAIN PEAKING vs FEEDBACK
FREQUENCY RESISTANCE

100 130
-3dB BANDWIDTH (MHz)

-3dB BANDWIDTH (MHz)

VOUT = 0.2VP-P
CL = 10pF
AV = +2 120
-3dB BANDWIDTH
95

110 6
-3dB BANDWIDTH
90 10

GAIN PEAKING (dB)

GAIN PEAKING (dB)

100 4
GAIN PEAKING

5 90 VOUT = 0.2VP-P 2
CL = 10pF
GAIN PEAKING AV = +1
80 0
0
0 200 400 600 800 1000
350 500 650 800 950 1100
FEEDBACK RESISTOR (Ω) LOAD RESISTOR (Ω)

FIGURE 13. BANDWIDTH AND GAIN PEAKING vs FEEDBACK FIGURE 14. BANDWIDTH AND GAIN PEAKING vs LOAD
RESISTANCE RESISTANCE

80 16
VOUT = 0.2VP-P VOUT = 0.1VP-P
CL = 10pF CL = 10pF
AV = +10 VSUPPLY = ±5V, AV = +2
60
-3dB BANDWIDTH (MHz)

12
OVERSHOOT (%)

40

6 VSUPPLY = ±15V, AV = +2

20
VSUPPLY = ±5V, AV = +1

VSUPPLY = ±15V, AV = +1
0 0
200 350 500 650 800 950 0 200 400 600 800 1000
FEEDBACK RESISTOR (Ω) LOAD RESISTANCE (Ω)
FIGURE 15. BANDWIDTH vs FEEDBACK RESISTANCE FIGURE 16. SMALL SIGNAL OVERSHOOT vs LOAD
RESISTANCE

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 HA5024

Typical Performance Curves VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC,

Unless Otherwise Specified (Continued)

0.10 0.08
FREQUENCY = 3.58MHz
FREQUENCY = 3.58MHz

DIFFERENTIAL PHASE (DEGREES)

0.08 RL = 75Ω
0.06
DIFFERENTIAL GAIN (%)

0.06
0.04
RL = 150Ω RL = 150Ω
0.04 RL = 75Ω

0.02
0.02
RL = 1kΩ
RL = 1kΩ
0.00 0.00
3 5 7 9 11 13 15 3 5 7 9 11 13 15
SUPPLY VOLTAGE (±V) SUPPLY VOLTAGE (±V)

FIGURE 17. DIFFERENTIAL GAIN vs SUPPLY VOLTAGE FIGURE 18. DIFFERENTIAL PHASE vs SUPPLY VOLTAGE

-40
VOUT = 2.0VP-P AV = +1
0
CL = 30pF
-50 -10

HD2
REJECTION RATIO (dB)

-20
DISTORTION (dBc)

-60 -30

3RD ORDER IMD -40

-70 -50 CMRR

HD2
HD3
-60

-80 -70 NEGATIVE PSRR

-80
HD3 POSITIVE PSRR
-90
0.3 1 10 0.001 0.01 0.1 1 10 30
FREQUENCY (MHz)
FREQUENCY (MHz)

FIGURE 19. DISTORTION vs FREQUENCY FIGURE 20. REJECTION RATIOS vs FREQUENCY

8.0 12
RL = 100Ω RLOAD = 100Ω
VOUT = 1.0VP-P VOUT = 1.0VP-P
AV = +1
PROPAGATION DELAY (ns)
PROPAGATION DELAY (ns)

7.5 10
AV = +10, RF = 383Ω

7.0 8

AV = +2, RF = 681Ω

6.5 6
AV = +1, RF = 1kΩ

6.0 4
-50 -25 0 25 50 75 100 125 3 5 7 9 11 13 15
TEMPERATURE (oC) SUPPLY VOLTAGE (±V)
FIGURE 21. PROPAGATION DELAY vs TEMPERATURE FIGURE 22. PROPAGATION DELAY vs SUPPLY VOLTAGE

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 HA5024

Typical Performance Curves VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC,

Unless Otherwise Specified (Continued)

500 0.8
VOUT = 20VP-P
0.6 VOUT = 0.2VP-P
450 CL = 10pF
0.4
400 + SLEW RATE

NORMALIZED GAIN (dB)

0.2
SLEW RATE (V/µs)

350
0 AV= +2, RF = 681Ω

300 - SLEW RATE

-0.2

250 -0.4
AV= +5, RF = 1kΩ
-0.6
200 AV = +1, RF = 1kΩ
-0.8
150
-1.0
AV = +10, RF = 383Ω
100 -1.2
-50 -25 0 25 50 75 100 125 5 10 15 20 25 30
TEMPERATURE (oC) FREQUENCY (MHz)

FIGURE 23. SLEW RATE vs TEMPERATURE FIGURE 24. NON-INVERTING GAIN FLATNESS vs FREQUENCY

0.8
VOUT = 0.2VP-P 100 1000
0.6 CL = 10pF
AV = +10, RF = 383Ω
RF = 750Ω
0.4
NORMALIZED GAIN (dB)

80 -INPUT NOISE CURRENT 800

CURRENT NOISE (pA/√Hz)

VOLTAGE NOISE (nV/√Hz)

0.2
AV = -1
0
60 600
-0.2
+INPUT NOISE CURRENT
-0.4
40 400
-0.6 AV = -5
INPUT NOISE VOLTAGE
-0.8
20 200
-1.0 AV = -10 AV = -2

-1.2 0 0
5 10 15 20 25 30 0.01 0.1 1 10 100
FREQUENCY (MHz) FREQUENCY (kHz)

FIGURE 25. INVERTING GAIN FLATNESS vs FREQUENCY FIGURE 26. INPUT NOISE CHARACTERISTICS

1.5 2
BIAS CURRENT (µA)

1.0 0
VIO (mV)

0.5 -2

0.0 -4
-60 -40 -20 0 20 40 60 80 100 120 140 -60 -40 -20 0 20 40 60 80 100 120 140
TEMPERATURE (oC) TEMPERATURE (oC)

FIGURE 27. INPUT OFFSET VOLTAGE vs TEMPERATURE FIGURE 28. +INPUT BIAS CURRENT vs TEMPERATURE

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 HA5024

Typical Performance Curves VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC,

Unless Otherwise Specified (Continued)

4000
22

TRANSIMPEDANCE (kΩ)
BIAS CURRENT (µA)

3000
20

2000
18

16 1000
-60 -40 -20 0 20 40 60 80 100 120 140 -60 -40 -20 0 20 40 60 80 100 120 140
TEMPERATURE (oC) TEMPERATURE (oC)

FIGURE 29. -INPUT BIAS CURRENT vs TEMPERATURE FIGURE 30. TRANSIMPEDANCE vs TEMPERATURE

25 74

72 +PSRR
55oC
REJECTION RATIO (dB)

20 70
125oC
68
-PSRR
ICC (mA)

15 66

64

10 62

25oC 60 CMRR

5 58
3 4 5 6 7 8 9 10 11 12 13 14 15 -100 -50 0 50 100 150 200 250
SUPPLY VOLTAGE (±V) TEMPERATURE (oC)

FIGURE 31. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 32. REJECTION RATIO vs TEMPERATURE

40 4.0

+10V +15V
SUPPLY CURRENT (mA)

30 +5V
OUTPUT SWING (V)

20 3.8

10

0 3.6
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 -60 -40 -20 0 20 40 60 80 100 120 140
DISABLE INPUT VOLTAGE (V) TEMPERATURE (oC)

FIGURE 33. SUPPLY CURRENT vs DISABLE INPUT VOLTAGE FIGURE 34. OUTPUT SWING vs TEMPERATURE

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 HA5024

Typical Performance Curves VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC,

Unless Otherwise Specified (Continued)

30 1.2

VS = ±15V

1.1
20
VOUT (VP-P)

VIO (mV)
VS = ±10V
1.0

10
0.9
VS = ±4.5V

0 0.8
0.01 0.10 1.00 10.00 -60 -40 -20 0 20 40 60 80 100 120 140
LOAD RESISTANCE (kΩ) TEMPERATURE (oC)

FIGURE 35. OUTPUT SWING vs LOAD RESISTANCE FIGURE 36. INPUT OFFSET VOLTAGE CHANGE BETWEEN
CHANNELS vs TEMPERATURE

1.5 30

25 -55oC
∆BIAS CURRENT (µA)

1.0
20 25oC
ICC (mA)

15
0.5

10 125oC

0.0 5
-60 -40 -20 0 20 40 60 80 100 120 140 3 4 5 6 7 8 9 10 11 12 13 14 15
TEMPERATURE (oC) SUPPLY VOLTAGE (±V)

FIGURE 37. INPUT BIAS CURRENT CHANGE BETWEEN FIGURE 38. DISABLE SUPPLY CURRENT vs SUPPLY VOLTAGE
CHANNELS vs TEMPERATURE

-30 32 20
AV = +1 30 18
VOUT = 2VP-P ENABLE
-40 28 16
DISABLE TIME (µs)
ENABLE TIME (ns)
SEPARATION (dBc)

26 14
ENABLE
-50 24 12
22 10

-60 20 8

18 DISABLE 6

-70 16 4
14 DISABLE 2
12 0
-80 -2.5 -2.0 -1.5 -1.0 -0.5 0 0.5 1.0 1.5 2.0 2.5
0.1 1 10 30
FREQUENCY (MHz) OUTPUT VOLTAGE (V)

FIGURE 39. CHANNEL SEPARATION vs FREQUENCY FIGURE 40. ENABLE/DISABLE TIME vs OUTPUT VOLTAGE

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 HA5024

Typical Performance Curves VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC,

Unless Otherwise Specified (Continued)

10

TRANSIMPEDANCE (MΩ)
DISABLE = 0V
0 VIN = 5VP-P 1 RL = 100Ω
RF = 750Ω
-10 0.1
FEEDTHROUGH (dB)

-20 0.01 180

PHASE ANGLE (DEGREES)

-30 0.001 135
-40 90
-50 45
-60 0
-70 -45
-80 -90
-135
0.1 1 10 20 0.001 0.01 0.1 1 10 100
FREQUENCY (MHz) FREQUENCY (MHz)

FIGURE 41. DISABLE FEEDTHROUGH vs FREQUENCY FIGURE 42. TRANSIMPEDANCE vs FREQUENCY

10
TRANSIMPEDANCE (MΩ)

1 RL = 400Ω

0.1
0.01 180

PHASE ANGLE (DEGREES)

0.001 135

90

45

-45

-90

-135
0.001 0.01 0.1 1 10 100
FREQUENCY (MHz)

FIGURE 43. TRANSIMPEDENCE vs FREQUENCY

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 HA5024

Die Characteristics
DIE DIMENSIONS: PASSIVATION:
2680µm x 2600µm x 483µm Type: Nitride
Thickness: 4kÅ ±0.4kÅ
METALLIZATION:
TRANSISTOR COUNT:
Type: Metal 1: AlCu (1%)
Thickness: Metal 1: 8kÅ ±0.4kÅ 248
Type: Metal 2: AlCu (1%) PROCESS:
Thickness: Metal 2: 16kÅ ±0.8kÅ
High Frequency Bipolar Dielectric Isolation
SUBSTRATE POTENTIAL (Powered Up):
V-

Metallization Mask Layout

HA5024

-IN1 OUT1 OUT4 -IN4

2 1 20 19

+IN1 3 18 +IN4

DIS1 4 17 DIS4

V+ 6 15 V-

DIS2 7 14 DIS3

+IN2 8 13 +IN3

9 10 11 12

-IN2 OUT2 OUT3 -IN3

3-385