1

Modelling and Simulation of Interline Power

Flow Controller
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SANTOSH BHARADWAJ REDDY
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more SSSC with a common dc link ,so,each SSSC contains a

Abstract—An Interline power flow controller is VSC based
FACTS controller for series compensation with unique
capability of power flow management among multi lines within
same corridor of a transmission line. FACTS controllers can
control series impedance, shunt impedance, current, voltage
and phase angle. Real power can be transferred via common dc-
link between the VSC’S and each VSC is capable of exchanging
reactive power with its own transmission system .In this paper,
the different controller circuit models of IPFC is modeled and
simulated in PSPICE software package and the power balance
between two transmission lines is clearly analyzed.
Index Terms—flexible ac transmission, static synchronous
series compensator ,interline power flow controller
VSC that is in series with the transmission line through a
coupling transformer and injects a voltage with controllable
magnitude and phase angle. IPFC provide independent
control of reactive power of each individual line , while
active power could be transferred via dc link between
compensated lines. An IPFC used to equalize active/reactive
power between transmission lines and transfer power from
overloaded lines to under loaded lines.[10]
2.BASIC CHARACTERISTICS OF IPFC
The interline power flow controller employs a number of dc to ac
inverters each providing series compensation for a different
line. and the compensating inverters is shown in fig 1.

I. INTRODUCTION

T HE ac transmissible power can be approximated as

P=(Vs*Vr*sin δ)/X .Suitable adjustments of any of these
parameters can achieve power flow control. Mechanical
switches based traditional approaches cannot realize full
utilization of transmission system due to large stability
margin. FACTS controllers can be grouped into two types—
Thyristor controlled FACTS controllers and VSC based
FACTS controllers .Power electronic based FACTS
controllers can internally generate both real power and
reactive power without the use of ac capacitors or reactors
and facilitate both real power and reactive power flow.[1,2]

VSC based FACTS controllers include static synchronous(

compensator(STATCOM),for shunt reactive power
compensation static synchronous series compensator
(SSSC)for series reactive power compensation, unified power
flow controller (UPFC) with unique capability of
independently both the active and reactive power flow in the Fig1.interline power flow controller (ipfc) comprising n
line and interline power flow controller.[2,3,4] converters

The interline power flow controller(IPFC) Concept

compensates the problem of compensating a number of
transmission lines at sub station .the IPFC consists of two or


D.Ravi Shankar and K.Udayakumar are with the Department of Electrical
and Electronics Engineering, Division of High Voltage Engineering, College
of Engineering, Anna University, Chennai-600025, Tamil Nadu, India (e-
mail: Shankar.hve@gmail.com).
 2

.fig 4 phasor diagram of system1

Fig.2.Schematic diagram of two-converter IPFC.
Consider an IPFC scheme consisting of two back to back
dc to ac inverters, each compensating a transmission line
transmission systems employ self commutated inverters as
synchronous voltage sources .the power electronic based
voltage sources can internally generate and absorb reactive
power without the use of capacitors and inductors .they can
facilitate both real and reactive power compensation and can
independently control real and reactive power flow.
. fig4 is phasor diagram defining relationship between
V1s,Vx1and inserted phasor V1pq.the inserted voltage is
added to fixed end voltage phasor v1s to produce the
effective sending end voltage .as r1 is varied over 360 range
the locus moves along a circle with its centre at end of v1s.
3. MODELLING OF IPFC
A SSSC is VSC based FACTS controller for series power
injection and IPFC is a combination of two SSSCs. Coupled
with common DC link for two identical transmission lines.
So here a VSC based FACTS controller SSSC which is apart
of IPFC with a transmission line is modeled. The power
control and Receiving end voltage varies with the variation
of firing angle is analyzed. A transmission line is modeled as
series R,L and it is terminated with a load .the VSC based
FACTS controller is modeled and connected to transmission
line. the voltage variations are clearly analyzed.
S 2
S 1 + +
+ + V 2 - -
D 6
V 5 - -
D 5
S
S
0
0

1 00 0 V d cV 7

S 4 S 3 D 7
+ +
D 8 + +
V 4 - - V 3 - -

0 0
Fig.3.basic two inverter interline power flow controller 0

Consider an IPFC scheme consisting of two back to back

inverters each compensating a transmission line by series
-
+

E 1
L4
voltage injection. the arrangement is shown in FIG.3where R 2 L2
-+

1 2 1 2 1 2 E
30m H
two synchronous voltage sources V1pq &V2pq,in series with .0 0 1 30mH

transmission lines 1 and 2represent to back to back 1

R 5
inverters .the common dc link is represented by directional 42

link for real power exchange between voltage sources. the 2

sending and receiving voltages are assumed to be V A M P L = 1 1 0 0 V0 6

FR E Q = 50
1

L3
equal.V1s=V2s=V1r=V2r=1.0p.u. with fixed angles resulting 100m H

in identical transmission lines with fixed angles δ1= δ2=30.for 2

two systems.[2]
0

fig5. a transmission line model with SSSC (a part of IPFC)

The System 1is selected to be prime system for which A transmission line shows improved receiving end voltage
controllability is real power and reactive power is stipulated. and power handling capability is increased.
the reason for stipulation is free controllability of system
1imposes on power control of system 2.[2]

4..SIMULATION RESULTS
The interline power flow controller two identical
transmission lines(impedance, torque angle, voltage).upper
 3

line operating at 11Kv(overloaded) and lower line under 1 0K V

loaded 10kv.when it is uncompensated IPFC is disabled and

it is enabled when two transmission lines are connected diode
bridge and VSC based converter .coupled with DC link and
connected with current controllers and voltage controllers.
R 3 L1 L5
1 2 1 2 1 2
.0 0 1
H 1
30m H 30m H 0 V
-
2
H
+

R 1
10
1

1
V 1
V O FF = 0 L6

FR E Q = 50 100m H

V A M P L = 11000
2

0
-1 0K V
S 2
S 1
+ V 2
+ + 2 . 9 0 2 s . 9 1 2 s . 9 2 2 s . 9 3 2 s . 9 4 2 s . 9 5 2 s . 9 6 2 s . 9 7 2 s . 9 8 2 s . 93 9. s0 0 s
+ - -
V 5 - -
S V ( V 6 : +V ,( 0L )4 : 2 , 0 )
D 1 D 3 S
0 T im e
1
0
C 1

fig6b.receiving end voltages with IPFC enabled

2 50m

S 4 S 3

D 2 D 4 V 4
+
-
+
- V 3
+
-
+
- delayed by 90 degrees
S

0 0 Influence of the Compensation voltage depends on two

factors (i) Magnitude of DC link voltage, (ii) Vector
position of the compensation voltage with respect to the
0
line current.
-
+

E 1
-
+

E
L4
1
R 2
2 1
L2
2 1 2 2 0 K V
.0 0 1 30 m H
30m H

R 5
10
2

1
V 6
V O FF = 0 L3
V A M P L = 10000
FR E Q = 50 100m H

2 0 V

fig.6.two compensated lines i.e. with IPFC enabled

20KV

- 2 0 K V
2 . 9 02 s. 9 12 s. 9 22 s. 9 32 s. 9 42 s. 9 52 s. 9 62 s. 9 72 s. 9 82 s. 93 9. s0 0 s
0V V ( R 2 : V2 (, L0 2) : 1 ,V (E 1L 2: 4: 1) , 0 )
T i m e

Fig6c.lower end sending end voltage compensation voltage

and resultant voltage
-20KV
2 . 9 0 s2 . 9 1 s2 . 9 2 s2 . 9 3 s2 . 9 4 s2 . 9 5 s2 . 9 6 s2 . 9 7 s2 . 9 8 s2 . 9 93 s. 0 0 s
V ( V 1 : + ,V0() L 5 : 2 , 0 ) For easy simulation vector position of injected
Time
compensation voltage is referred with respect to the sending
end voltage. Four cases considered. (i) -90° (ii) -180° (iii)
Fig.6.receiving end voltages with IPFC disabled
-270° (iv) 0°Cases ..so, in this paper the firing angles are
varied from 0 to 360° and it was observed that variation of
Under uncompensated IPFC disabled condition firing angles from 0° to -180° on line-2 (under loaded)P2
for the two lines upper and lower sending end 2(under loaded)P2 and Q2 increases. Attains a maximum
voltage, receiving end voltage, load power across value between -270° and 0°line -2 power transfer capability
resistor and inductor recorded. It is observed that increases due to IPFC dc link. both real and reactive power
the lower line delivers lower power to the load. increases and voltage levels of line-2 increases.
To correct the under loaded condition power is
tapped from the upper line to enable lower line TABLE.1. results for various firing angles.
to deliver normal power to load comp V1s V2s V1r V2r P1 P2
-90° 11 10 8.5 8.5 1.1 0.9
-180° 11 10 8.5 6.5 1.1 0.6
-270° 11 10 8.5 9 1.1 0.9
0 11 10 8.5 9 1.0 1.2

5. SIMULATION OF CLOSED LOOP IPFC SYSTEM

 4

4.0MW

In the control circuit the ac voltages are rectified using diode

bridge rectifiers. The outputs of rectifiers are attenuated
using potential dividers .The outputs of lines 1&2 are applied 3.0MW

to the
2.0MW

R 12 L4 R 13 L5
1 2 1 2
2 .5 1 1 .5 m 2 .5 1 1 .5 m 1.0MW
F2
D 13 D 15
F
R 14
M U R 150 M U R 150
10 0W
V 3 0.814s
W(R14)
0.850s 0.900s 0.950s 1.000s 1.050s 1.100s 1.150s 1.191s

V O FF = 0 Time

V A M P L = 10000 2
FR E Q = 50
L9 Fig7c.real power of the 1st line
D 14 D 16
15m
1 49.7MW
M U R 150 M U R 150
S 6
V 1 1 0 C 2
+ +
V O FF = 0 - -
V A M P L = 2000
4000u
FR E Q = 50 S R 19
V O F F = 0 .0 V R 1
TD = 1 V O N = 2
R 2 5 0 .0 9 k 9 9 .1 k 1 00.0MW
1000k

30000
U 2
0 R 2 12 k
0 -
E 6
O U T R 23 50.0M W
+
+
R 26
-
- +
1 k 1k
R 24
H 6 E O P A M P
R 17 L6 R 16 L7 0 0 30k
+-

1 2 H 1 2
0
1 1 .5 m 1 1 .5 m
D 17 D 18 0W
0.8496s 0.8800s 0. 9200s 0.9600s 1.0000s 1.0400s 1 .0800s 1.1200s
2 .5 2 .5 R 15 W(R15)

--
Time
10 M U R 150 M U R 150

V O FF = 0 V 4
2
D 19 D 20
fig7d.real power of the 2nd line
1. 0MW
V A M P L = 10000 L8
FR E Q = 50
15m M U R 150 M U R 150
C 3
1 0
4000u
0. 5MW
R 20 R 21

0 .1 k 9 9 .9 k
0
.
Fig7a.closed loop IPFC system. 0W

differential amplifier. IPFC is enabled when the voltages are

different .The circuit model of closed loop system is shown in fig
7a .The voltage across the switch S is shown in fig 7b. - 0. 5MW

40MW

- 1. 0MW
20MW 0 .8 61 s 0. 900s 0 .95 0s 1 .00 0s 1.050s 1. 10 0s 1. 15 0s 1. 20 0s
W( L9 )
Ti m e

0W
Fig7e.reactive power of line1
39.7MW

-20MW

20.0MW

-40MW
0s 0.5s 1.0s 1.5s 2.0s
W(L8)
Time
0W

Fig7b.voltage across switch

Real powers in lines 1&2 are shown in Figures7c&7d.The -20.0M W

reactive power through lines 1&2 are shown inFigures 7e & 7f

respectively. From the above Figures, Itcan be observed that the
real power increases when theIPFC is enabled -40.0M W
0. 90s 0.95s 1. 00s 1.0 5s 1.10s 1.15s 1.20s
W(L 8)
Tim e

fig7e.reactive power of line 2

VI.CONCLUSION
 5

SANTOSH BHARADWAJ REDDY

The FACTS controller IPFC to be located at the sub- Email: help@matlabcodes.com
station for a transmission system with more than one line can
corrects the imbalance on account of line over-loading and
Engineeringpapers.blogspot.com
under-loading to enable transmission lines to be operated up More Papers and Presentations
to its thermal limits without compromising the stability
Circuit model with various firing angles and various voltages available on above site
were simulated to study the real and reactive power flows. The
circuit model for open loop and closed loop systems are
presented..It is observed that the real and reactive powers are
increased by the presence of IPFC.

References
[1].L.Gyugyi, “Application Characteristics of Converter-Based
FACTS Controllers”, International Conference on PowerCon 2000,
Vol.1, pp.391~396

[2] L.Gyugyi, K.K.Sen, C.D.Schauder, “The Interline Power Flow

Controller Concept: A New Approach to Power Flow Management
in Transmission Systems”, IEEE/PES Summer Meeting, Paper No.
PE-316-PWRD-0-07-1998, San Diego, July 1998

[3] L.Gyugyi, K.K.Sen, C.D.Schauder, “The Interline Power Flow

Controller Concept: A New Approach to Power Flow Management
in Transmission Systems”, IEEE Transactions on Power Delivery,
Vol. 14, No. 3, pp.1115~1123, July 1999.

[4] I.Papic, P.Zunko, D.Povh, M.Weinhold, “Basic Control of

Unified Power Flow Controller”, IEEE Transactions on Power
Systems, Vol. 12, No. 4, pp.1734~1739, Nove
[5]Jianhong Chen, Tjing T.Lie.D.M.Vilathgamua. “Basic Control
Interline Power Flow Controller:, IEEE Trans, 2002.

[6] I.Papic, P.Zunko, D.Povh, M.Weinhold, “Basic Control of

Unified Power Flow Controller”, IEEE Transactions on ower
Systems, Vol. 12, No. 4, pp.1734~1739, November 1997.

[7] I.J.Nagrath and D.P.Kothari, “Modern Power System Analysis”,

Second Edition, Tata McGraw-Hill Publishing Company Limited,
NewDelhi.

[8] G.K.Dubey, S.R.Doradla, A.Joshi and R.M.K.Sinha,” Thyristor

Power Controllers”, New Age International(P) Limited, Publishers,
New Delhi-110002.

[9] Jianhong Chen, Tjing T.Lie.D.M.Vilathgamua. “Basic Control

Interline Power Flow Controller:, IEEE Trans, 2002.

[10] salem.k.sood v.k.sood.”simulaton and controller design

for IPFC”IPST’2007

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