CS37 Summer 2002, Homework 2

Due on Friday, July 12th, at the beginning of class. Note that each problem herein must be turned in as a separate deliverable, each one clearly labeled with your name.
LogicWorks
One problem in this assignment requires the use of LogicWorks. The solution to this problem must be submitted in two different ways: 1. A printout of your circuit, to be labeled with the problem number and your name, delivered separately from other parts of this assignment. On this printout you are asked to indicate whether, to the best of your knowledge, the circuit performs to specification or not. The accuracy of this information will help our graders in evaluating your work. In the case where full credit is not due, your indication that the circuit is not totally correct will save us time and thus may win you some leniency in the assignment of partial credit. 2. The LogicWorks file correspondent to the circuit printout handed in for item (1) above. This file must be copied to the CS37 folder in the Dartmouth PUBLIC directory structure.

Before you do anything serious with LogicWorks, allow yourself time to play around with different devices and options. At this point, the devices youll be interested in can be found in libraries Simulation Gates (logic gates such as NOT, AND, OR, etc) and Simulation IO (the binary probe lets you see the bit-value of a signal and the binary switch allows you to provide input to your circuits: double-clicking on the switch toggles the value it produces). Make sure you know how to draw, rotate, select, move and delete devices and wires. Use the pencil tool (Edit->Name) and click on the wire you want to name, double-click on the textbox that appears, type a string and press enter: this will label a signal and allow you to identify it in the timing window. These labels can also be used to connect components far away from each other, what can greatly decrease the visual clutter when your circuits get complex.

PROBLEM I (30 points)

In this problem, you are asked to design a modulo-8 counter, similar to the controllable sequence generator presented in class, but which must count either up or down depending on the value of a one-bit control line. That is, the counter will produce sequences such as {0,1,2,3,4,5,6,7,0,1,2,3,} when told to count up, or {7,6,5,4,3,2,1,0,7,6,} when told to count down. A second one-bit control line is used to make the counter run or stop. The two one-bit control inputs are defined as: U (up or down) U = 0 (down) makes the counter issue numbers in descending order. U = 1 (up) makes the counter issue numbers in ascending order.

S (stop or run)

S = 0 (run) makes the counter run. S = 1 (stop) makes the counter stop.

The circuit must have three output lines [Out 2 Out1Out 0 ] , which give the 3-bit binary representation of numbers between 0 and 7, inclusively, where Out 2 is the most significant bit and Out 0 is the least significant bit. You are asked to produce a solution to this problem in two parts. (1) A written part:

a. Identify the states of the counter and represent it as a Moore finite state machine. Note that since there are 4 possible combinations of the two control inputs, you must specify 4 different transitions from every possible state.

b. Write the truth table for the state transition function and the corresponding logic equation.

c. Write the truth table for the output function and the corresponding logic equation. Note that if you label the states carefully, the output function is trivial. d. Design your circuit in LogicWorks using whatever types of gates you see fit and submit a printout of your circuit with the rest of this part of the problem.

(2) A file containing your LogicWorks implementation that must be deposited in the CS37->HW1 folder under PUBLIC. The file must be named according to the following scheme: CS37-X02-HW2-1-lastname-firstname where lastname and firstname are your last and first names, of course.

PROBLEM II (25 points)

In C, C++ or Java, write a function that takes two arguments of type unsigned int (in C/C++) or int (in Java) and computes the unsigned product of these numbers (the data type of the output must be the same as that of the inputs). Use can use any of the algorithms presented in class or found in out Patterson and Henessy textbook. You may use the built-in addition operator as well as bitwise operators (shift, and, or), however, you must not use the built-in multiplication operator () . Do not worry about overflow or signed arithmetic. Turn in a small amount of test code and printed sample output to show that your solution is probably correct. Your sample input should include, at least the following two cases: a. 337 * 455 b. 100 * 10 Please turn in a printout of your C/C++/Java code, along with the sample output. In addition, attach your source code file to an e-mail and send it to cs37@cs.dartmouth.edu, with the following subject: CS37-X02-HW2-2-lastname-firstname where lastname and firstname are your last and first names, of course. The body of the email should be empty, since we mechanically extract the attachments without actually reading the email.

PROBLEM III (25 points)

Give short and straight-to-the-point answers to the following: a) Name an advantage and a disadvantage of DRAM as compared to SRAM. b) How is the SDRAM different from the DRAM? Does it offer any advantage when compared to DRAM?

c) What are setup time and hold time? To what kind of devices are these values relevant? d) What is the difference between a latch and a flip-flop? Why arent the former used as the memory elements in finite state machine implementations? e) If the height of a memory chip is 1024 and its width is 8 bits: (i) How many bits can this chip hold? (ii) How many lines are used to address a word in this chip? (iii) How many lines come out of the read port in this chip?

PROBLEM IV (20 points)

a) Give the 5-bit binary representation of -16 in twos complement, in ones complement and in excess (B=16). b) What is the range of integers (from most negative to most positive) that can be represented with 5-bit twos complement, ones complement and excess (B=16)? c) The sign extension operation on a binary number is a requirement when we take its n-bit representation and transform it to an m-bit representation where m>n. The point is that you want to represent the same exact value, but using more bits and you need to preserve its sign information. (i) Describe how we can define the sign extension operation for the twos complement representation. To figure out how this can be achieved, pick a few numbers (both positive and negative), represent them in twos complement with a certain number n of bits and then also in (n+1) bits, (n+2) bits, (n+3) bits, etc. (ii) Design the circuit for twos complement sign extension from 3-bits to 5-bits using AND, OR and NOT gates.