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A

Huron Block Diagram


IDTCV125PAG 71.00125.A0W
RTM865T-433 71.00865.B0W

Yonah 478
Celeron M
FSB

TV Out

20

CRT

400/533/667MHz

LCD

533/667MHz

13,14

DDR2

DVI

VCC

71.CALIS.00U

13,14

DMI

Codec

AZALIA

ALC268
28

6,7,8,9,10

1D8V_S3

Cardreader BD

25

40
2D5V_S0

MODEM Card

INPUTS

25

TXFM

New card27

P2231NFC1

BCM5787MKMLG

1D5V_S0

41

OUTPUTS
BT+

RJ11

RJ45

23

Intersil CHARGER

DCBATOUT

Giga LAN 22

39

MAX8731

PCB P/N:07517
MS/MS Pro/xD/
MMC/SD 5 in 1

AZALIA

18V
5V

23

4.0A

UP+5V
100mA

CPU DC/DC
PCI Express

LPC I/F

40

DDR_VREF

APL5308

High Definition Audio


Serial Peripheral I/F

Mini Card

29

Kedron a/b/g/n

ISL6262

28

INPUTS

35

OUTPUTS

DCBATOUT

27

VCC_CORE
0~1.3V
48A

LPC BUS

OP AMP
G1442

71.ICH7M.00U

15,16,17,18

USB

29

SUBWF

HDD20
1

1D8V_S3

3D3V_S0

24

ETHERNET (10/100/1000MbE)

OP AMP
G1412

29

1394
CONN

OZ129
1394
CardReader

8 USB 2.0/1.1 ports

INT.SPKR

Line Out
(SPDIF)

PCI BUS

1 PATA 66/100

G1431Q 29

1D05V_S0

TPS51100

GND

2 SATA

OP AMP

1D8V_S3

APL5912

ACPI 2.0

INT.MIC

OUTPUTS

26

PCI/PCI BRIDGE

29

SYSTEM DC/DC
TPS51124 38

42

100MHz

ICH7M

3V_S5

DCBATOUT

VGA Borad

4 PCIe ports

MIC In

5V_S5
DCBATOUT

BOTTOM

LVDS, CRT I/F

37

OUTPUTS

DDR Memory I/F

533/667MHz

INPUTS

INPUTS

TOP

Line In

PCB STACKUP

INTEGRATED GRAHPICS

533/667 MHz

29

14

14

Calistoga
AGTL+ CPU I/F

TPS51120

13

533/667 MHz

G792

4, 5

62.10079.001

DDR2

Project code: 91.4V301.001


PCB P/N
: 07205
REVISION
: SD

Mobile CPU

CLK GEN.

SYSTEM DC/DC

SATA

CDROM

KBC

MINI USB
BlueTooth

WPC8768L

BIOS

SPI I/F

Winbond

W25X80-VSS

32

30

22

Touch
Pad 31

PATA

INT.
KB 31

Volvi

Wistron Corporation

20

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

USB BD

PCB : 07521
21

USB
2 Port21

CAMERA

13

MEDIA BD

PWM BD

LAUNCH BD

e-Key BD

56.41004.031

PCB : 07520

PCB : 07519

PCB : 07518

31

31

31

31

Title

BLOCK DIAGRAM
Size
A3

Document Number

Date: Monday, March 12, 2007

Rev

SD

HURON
Sheet

of

44

ICH7M Integrated Pull-up


and Pull-down Resistors

ICH7-M EDS 17837

C
1.5V1

EE_DIN, EE_DOUT, GNT[3:0], GPIO[25],


GNT[4]#/GPIO48, GNT[5]#/GPO17, PME#,

ICH7 internal 20K pull-ups

LAD[3:0]#/FHW[3:0]#, LAN_RXD[2:0]

SS3
Byte9
bit 7
0

SS2
bit6

SS1
bit5

SS0
bit4

0.8% Down

Pin Name

Strap Description

CFG[2:0]

FSB Frequency Select

1.0% Down

1.25% Down

CFG[4:3]

Reserved

PWRBTN#, TP[3]

1.50% Down

CFG5

DMI x2 Select

DD[7], DDREQ

ICH7 internal 11.5K pull-downs

ACZ_BIT_CLK, ACZ_RST#, ACZ_SDIN[2:0],

ICH7 internal 20K pull-downs

ICH7 internal 15K pull-downs

SATALED#

ICH7 internal 15K pull-up

LAN_CLK

ICH7 internal 100K pull-down

IORDY, DA[2:0], DCS1#,

1.75% Down

CFG6

2.0% Down

CFG7

2.5% Down

3.0% Down

+-0.3% Center

+-0.4% Center

+-0.5% Center

+-0.6% Center

+-0.8% Center

+-1.0% Center

+-1.25% Center

+-1.5% Center

PCI Routing
IDSEL
OZ129TZ

Signal

ACZ_SYNC

XOR Chain Entrance/


PCIE Port Config bit1,
Rising Edge of PWROK

Allows entrance to XOR Chain testing when TP3


pulled low.When TP3 not pulled low at rising edge
of PWROK,sets bit1 of RPC.PC(Config Registers:
offset 224h)

PCIE bit0,
Rising Edge of PWROK.

Sets bit0 of RPC.PC(Config Registers:Offset 224h)

Reserved

This signal should not be pull high.

EE_DOUT

Reserved

This signal should not be pull low.

GNT2#

Reserved

This signal should not be pull low.

GNT3#

Top-Block
Swap Override.
Rising Edge of PWROK.

Sampled low:Top-Block Swap mode(inverts A16 for


all cycles targeting FWH BIOS space).
Note: Software will not be able to clear the
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.

GNT5#/
GPIO17#,
GNT4#/
GPIO48

Boot BIOS Destination


Selection.
Rising Edge of PWROK.

Controllable via Boot BIOS Destination bit


(Config Registers:Offset 3410h:bit 11:10).
GNT5# is MSB, 01-SPI, 10-PCI, 11-LPC.

DPRSLPVR

Reserved

This signal should not be pull high.

INTVRMEN

Reserved.
Rising Edge of RSMRST#.

AG

REQ/GNT

PCIE Routing
LANE1

Reserved

CFG[15:14]

Reserved

CFG16

FSB Dynamic ODT

0 = Dynamic ODT Disabled


1 = Dynamic ODT Enabled (Default)

CFG17

Global R-comp Disable


(All R-comps)

0 = All R-comp Disable


1 = Normal Operation (Default)

CFG18

VCC Select

0 = 1.05V (Default)
1 = 1.5V

CFG19

DMI Lane Reversal

0 = Normal operation (Default):lane


Numbered in order
1 =Reverse Lane,4->0,3->1 ect...

REQ0# ->REQ0#

CFG20

SDVO/PCIE
Concurrent

SDVOCRTL
_DATA

SDVO Present

0 = Only SDVO or PCIE x1 is


operational (Default)
1 =SDVO and PCIE x1 are operating
simultaneously via the PEG port
0 = No SDVO Card present
(Default)
1= SDVO Card present

LAN BCM5787M

LANE2

MiniCard WLAN

LANE3

NewCard WLAN

USB Table
USB ports definition
Pair

Device

USB1

USB3

USB2

USB4

This signal should not be pull low.

MINICARD

Enables integrated VccSus1_05 VRM when


sampled high

BlueTooth

CCD

NewCard

XOR Chain Selection.


Rising Edge of PWROK.

TBD, Chapter 8.

SATALED#

Reserved

This signal should not be pull low.

SPKR

No Reboot.
Rising Edge of PWROK.

If sampled high, the system is strapped to the


"No Reboot" mode(ICH7 will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.

Title

XOR Chain Entrance.


Rising Edge of PWROK.

This signal should not be pull low unless using


XOR Chain testing.

Size

TP3

NOTE: All strap signals are sampled with respect to the leading
edge of the Calistoga GMCH PWORK in signal.

Requires an external pull-up resistor.

REQ[4:1]#

00 = Reserved
01 = XOR mode enabled
10 = All Z mode enabled
11 = Normal Operation
(Default)
Reserved

Integrated VccSus1_05
VRM Enable/Disable.
Always sampled.
Reserved

LINKALERT#

0 = Reverse Lanes,15->0,14->1 ect..


1= Normal operation(Default):Lane
Numbered in order

CFG[13:12]

page 16

EE_CS

GPIO25

AD22

INT -> PIRQ

PCI Express Graphics


Lane Reversal

XOR/ALL Z test
straps

page 16

Comment

Usage/When Sampled

0 = Reserved
1 =Mobile CPU(Default)

CFG8

CFG[11:10]

DCS3#, IDEIRQ

ACZ_SDOUT

Reserved

(Default)

Reserved

approximately 33 ohm

ICH7M Functional Strap Definitions

4
0 = DMI x2
1 = DMI x4

CPU Strap

ICH7M IDE Integrated Series


Termination Resistors
DDACK#,

CFG9

USB[7:0][P,N]

Configuration
001 = FSB533
011 = FSB667
others = Reserved

DD[15:0], DIOW#, DIOR#, DREQ,

page 3

Calistoga Strapping Signals and


EDS 17050 0.71
Configuration
page 7

EE_CS,SPI_ARB, SPI_CLK, SPKR,

Spread Amount%

LDRQ[0], LDRQ[1]/GPIO[41],

ACZ_SDOUT, ACZ_SYNC, DPRSLPVR/GPIO16,

RTM865T-433 100Mhz/LCDCLK Spread


and Frequency Selection Table

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Reference
Document Number

Date: Monday, March 12, 2007

Rev

HURON
Sheet

SD
2

of

44

2
1

RN9
SRN33J-5-GP-U
3
UMA 4

DREFSSCLK 7
DREFSSCLK# 7

CLK_MCH_3GPLL_1 2
CLK_MCH_3GPLL_1# 1

RN10
SRN33J-5-GP-U
3
4

CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7

CLK_PCIE_ICH_1 2
CLK_PCIE_ICH_1# 1

RN11
SRN33J-5-GP-U
3
4

CLK_PCIE_ICH 16
CLK_PCIE_ICH# 16

CLK_PCIE_NEW_R 2
CLK_PCIE_NEW#_R 1

RN12
SRN33J-5-GP-U
3
NEW 4

CLK_PCIE_NEW 27
CLK_PCIE_NEW# 27

CLK_PCIE_SATA_1 2
CLK_PCIE_SATA_1#1

RN13
SRN33J-5-GP-U
3
4

CLK_PCIE_SATA 15
CLK_PCIE_SATA# 15

CLK_PCIE_LAN#_R 2
CLK_PCIE_LAN_R 1

RN6
SRN33J-5-GP-U
3
4

CLK_PCIE_LAN# 22
CLK_PCIE_LAN 22

CLK_PCIE_MINI_1# 2
CLK_PCIE_MINI_1 1

RN5
SRN33J-5-GP-U
3
4

CLK_PCIE_MINI1# 27
CLK_PCIE_MINI1 27

DREFSSCLK_1
DREFSSCLK#_1

C397

1
2

1
2

1
2

1
2

1
2

C96

SCD1U16V2ZY-2GP

C100

SCD1U16V2ZY-2GP

C63

SCD1U16V2ZY-2GP

C71

SCD1U16V2ZY-2GP

C92

SCD1U16V2ZY-2GP

C107

3D3V_S0
R252
0R0603-PAD
1
2

3D3V_CLKGEN_S0
SC4D7U6D3V3KX-GP

C106

DY

SC1U16V3ZY-GP

C66

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

C382

3D3V_48MPWR_S0

SCD1U16V2ZY-2GP

C383

DY

SC1U16V3ZY-GP

3D3V_CLKPLL_S0

3D3V_S0
R75
0R0603-PAD
1
2

3D3V_S0
R244
0R0603-PAD
1
2

3D3V_S0

H/L: 100/96MHz
1

U11
30

PCLK_KBC

1 R49

2 33R2J-2-GP

PCLKKBC

24

PCLK_PCM

1 R64

2 33R2J-2-GP

PCLKPCM

2 33R2J-2-GP

SS_SEL
PCLKICH

R72
10KR2J-3-GP

SS_SEL

1 R65

CLK_ICHPCI

9
8

PCI_2/REQ_SEL
PCI_3
PCI_4
PCI_5

16 PM_STPPCI#

R66
10KR2J-3-GP

11,18 SMBC_ICH
11,18 SMBD_ICH
RN8
SRN33J-5-GP-U
DREFCLK_1
3
2
DREFCLK#_1
4
UMA 1

DY

PCIF_1/DOT96SS_SEL#
PCIF_0/ITP_EN

CL=20pF0.2pF
C70

SC33P50V2JN-3GP

DREFCLK
DREFCLK#

R58

7
7

ENG

X2

2
2

PCI_STOP#

46
47

SCLK
SDATA

14
15

DOT96
DOT96#

50
49

X1
X2

52
39

REF_0
IREF

10

VTT_POWER_GOOD#/PWRDWN

X-14D31818M-44GP

82.30005.951
1

GEN_XTAL_IN
GEN_XTAL_OUT

1 0R2J-2-GP

55

16

CLK_ICH14

GEN_XTAL_OUT_R

C79
SC27P50V2JN-2-GP

35

CLK_EN#

GEN_REF
1 R51
2
33R2J-2-GP
GEN_IREF
2 R53
1
475R2F-L1-GP
R254 2
1 0R2J-2-GP

3D3V_S0

DY

R255
10KR2J-3-GP

DREFSSCLK#
DREFSSCLK

RN61
SRN49D9F-GP
1
4
2
3

DREFCLK#
DREFCLK

RN62
SRN49D9F-GP
1
4
2
3

CLK_CPU_BCLK
CLK_CPU_BCLK#

1
2

CLK_MCH_BCLK#
CLK_MCH_BCLK

RN46
SRN49D9F-GP
1
4
2
3

2
6
51
45
38
13
29

17
18

DREFSSCLK_1
DREFSSCLK#_1

SRC_1
SRC_1#
SRC_2
SRC_2#
SRC_3
SRC_3#
SRC_4_SATA
SRC_4_SATA#
SRC_5
SRC_5#
SRC_6/PCIE_REQ_1#
SRC_6#/PCIE_REQ_2#

19
20
22
23
24
25
26
27
31
30
33
32

CLK_MCH_3GPLL_1
CLK_MCH_3GPLL_1#
CLK_PCIE_ICH_1
CLK_PCIE_ICH_1#
CLK_PCIE_NEW_R
CLK_PCIE_NEW#_R
CLK_PCIE_SATA_1
CLK_PCIE_SATA_1#
CLK_PCIE_LAN_R
CLK_PCIE_LAN#_R
CLK_PCIE_MINI_1
CLK_PCIE_MINI_1#

CPU_2_ITP/SRC_7
CPU_2_ITP#/SRC_7#

36
35

CLK_PCIE_PEG_1
CLK_PCIE_PEG_1#

CPU_0
CPU_0#
CPU_1
CPU1_#

44
43
41
40

CLK_CPU_BCLK_1
CLK_CPU_BCLK_1#
CLK_MCH_BCLK_1
CLK_MCH_BCLK_1#

CPU_STOP#
FSC/TEST_SEL/REF_1
FSB/TEST_MODE
USB48MHZ/FSA

54
53
16
12

VDD_3.3_SRC
VDD_3.3_SRC

34
21

VDD_3.3_PCI
VDD_3.3_PCI

7
1

SRC_0/DOT96SS
SRC_0#/DOT96SS#

16

56
3
4
5

GND_PCI
GND_PCI
GND_REF
GND_CPU
GND_CORE
GND_48
GND_SRC

VDD_3.3_REF
VDD_3.3_CPU
VDD_3.3_CORE
VDD_3.3_48M
VDD_3.3_SRC

48
42
37
11
28

RN4
SRN33J-5-GP-U
CLK_PCIE_PEG_1# 2
3
CLK_PCIE_PEG_1 1
MXM 4

CLK_PCIE_PEG# 26
CLK_PCIE_PEG 26

CLK_CPU_BCLK_1# 2
CLK_CPU_BCLK_1 1

RN2
SRN33J-5-GP-U
3
4

CLK_CPU_BCLK# 4
CLK_CPU_BCLK 4

CLK_MCH_BCLK_1# 2
CLK_MCH_BCLK_1 1

RN3
SRN33J-5-GP-U
3
4

CLK_MCH_BCLK# 6
CLK_MCH_BCLK 6

PM_STPCPU# 16

CPU_SEL2_R
CPU_SEL1_R
CLK48

2 R50
1
2K2R2J-2-GP
2 R61
1
2K2R2J-2-GP
1 R67
2
33R2J-2-GP
2 R253
1
2K2R2J-2-GP

CPU_SEL2 4,7
CPU_SEL1 4,7
CLK48_ICH 16
2

CPU_SEL0 4,7

3D3V_CLKPLL_S0
3D3V_48MPWR_S0
3D3V_CLKGEN_S0

RTM865T-433-GP

2
1

CLK_PCIE_MINI1
CLK_PCIE_MINI1#

RN44
SRN49D9F-GP
1
4
2
3

DY

EMI
1

CLK_ICH14
PCLK_KBC

EC16 1
EC97 1

DY 2 SC10P50V2JN-4GP
DY 2 SC10P50V2JN-4GP

CLK_ICHPCI

EC21 1

DY 2 SC10P50V2JN-4GP

CLK48_ICH

EC22 1

DY 2 SC10P50V2JN-4GP

CLK_MCH_3GPLL 2
CLK_MCH_3GPLL# 1

CLK_PCIE_PEG#
CLK_PCIE_PEG

RN60
SRN49D9F-GP
3
4

RN45
SRN49D9F-GP
1
4
2
MXM 3

RN59
SRN49D9F-GP
3
4

EC19

CLK_PCIE_ICH
CLK_PCIE_ICH#

3D3V_CLKGEN_S0

DY
2

CLK_PCIE_SATA
CLK_PCIE_SATA#

RN57
SRN49D9F-GP
2
3
1
4

RN43
SRN49D9F-GP
3
4

FSC

FSB

FSA

CPU

FSB

0
0
0
0
1
1
1
1

0
0
1
1
0
0
1
1

0
1
0
1
0
1
0
1

266M
133M
200M
166M
333M
100M
400M
Reserved

X
533M
X
667M
X
X
X
X

EC20
SCD1U16V2ZY-2GP

2
1

SCD1U16V2ZY-2GP

CLK_PCIE_LAN#
CLK_PCIE_LAN

71.00865.B0W

RN47
SRN49D9F-GP
4
3

CLK_PCIE_NEW
CLK_PCIE_NEW#

RN58
SRN49D9F-GP
2
3
1
NEW 4

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Clock Generator
Size

Document Number

Rev

HURON
Date: Monday, March 12, 2007
A

Sheet
E

SD
3

of

44

H_DINV#[3..0]
TP29 TPAD30
U36A

G6
E4

PROCHOT#
THERMDA
THERMDC

D21
A24
A25

THERMTRIP#

H_TRDY# 6

A22
A21

RSVD[12]

T22

RSVD[13]
RSVD[14]
RSVD[15]
RSVD[16]
RSVD[17]
RSVD[18]
RSVD[19]
RSVD[20]

D2
F6
D3
C1
AF1
D22
C23
C24

6
6

1D05V_S0
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#

TP1
TP5
TP4
TP2
TP3
TP19

TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30

CPU_PROCHOT#_1

6
6
6

R70
56R2J-4-GP

H_THERMDA 19
H_THERMDC 19

C7

BCLK[0]
BCLK[1]

U36B
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#

Place testpoint on
H_IERR# with a GND
0.1" away

R288
1DY
2
0R2J-2-GP
H_THERMDA

H_THERMDC

C127
SC2200P50V2KX-2GP

1D05V_S0

RSVD[11]

PM_THRMTRIP#
should connect to
ICH7 and Calistoga
without T-ing
( No stub)

R227
1KR2J-1-GP

6
6
6

R228
2KR2F-3-GP

2nd source: 62.10053.401

D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#

N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
M24
N25
M26

D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#

AD26

GTLREF

C376

62.10079.001

H_DSTBN#1
H_DSTBP#1
H_DINV#1

CPU_GTLREF0

BGA479-SKT6-GPU3

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

CPU_PROCHOT# 35

PM_THRMTRIP-A# 7,15,33

CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3

H_DSTBN#0
H_DSTBP#0
H_DINV#0

E22
F24
E26
H22
F23
G25
E25
E23
K24
G24
J24
J23
H26
F26
K22
H25
H23
G22
J26

Layout Note:
0.5" max length.

1
R279
1
R274
3,7
3,7
3,7

DY

2
2

TEST1
C26
1KR2J-1-GP
TEST2
D25
51R2F-2-GP

CPU_SEL0
CPU_SEL1
CPU_SEL2

B22
B23
C21

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#

AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
AD23
AE24
AC20

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

R26
U26
U1
V1

DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#

E5
B5
D24
D6
D7
AE6

TEST1

BSEL[0]
BSEL[1]
BSEL[2]

AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
W24
Y25
V23

COMP[0]
COMP[1]
COMP[2]
COMP[3]

MISC

TEST2

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#

DATA GRP 2

HIT#
HITM#

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

1
2

CONTROL

B1
F3
F4
G3
G2

H_INIT# 15

SC1KP50V2KX-1GP

B25

RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#

H_LOCK# 6
H_CPURST# 6,31
H_RS#[2..0]

DATA GRP 3

RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]
RSVD[10]

H4

AA1
AA4
AB2
AA3
M4
N5
T2
V3
B2
C3

LOCK#

H_HIT#
H_HITM#

STPCLK#
LINT0
LINT1
SMI#

H_IERR#

D5
C6
B4
A3

IERR#
INIT#

D20
B3

H_RS#0
H_RS#1
H_RS#2

R69
56R2J-4-GP

15 H_STPCLK#
15 H_INTR
15 H_NMI
15 H_SMI#

H_BREQ#0 6

A20M#
FERR#
IGNNE#

F1

A6
A5
C4

H_DEFER# 6
H_DRDY# 6
H_DBSY# 6

H_DSTBP#[3..0]
H_D#[63..0]

1D05V_S0

DATA GRP 1

15 H_A20M#
15 H_FERR#
15 H_IGNNE#

H5
F21
E1

6
6
6

6 H_ADSTB#1

A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
ADSTB[1]#

H_ADS#
H_BNR#
H_BPRI#

Y2
U5
R3
W6
U4
Y5
U2
R4
T5
T3
W3
W5
Y4
W2
Y1
V4

REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#

ADDR GROUP 1

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

BR0#

H1
E2
G5

DATA GRP 0

H_REQ#0 K3
H_REQ#1 H2
H_REQ#2 K2
H_REQ#3 J3
H_REQ#4 L5

DEFER#
DRDY#
DBSY#

XDP/ITP SIGNALS

H_ADSTB#0
H_REQ#[4..0]

ADS#
BNR#
BPRI#

THERM

6
6

A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#

H CLK

J4
L4
M3
K5
M1
N2
J1
N3
P5
P2
L1
P4
P1
R1
L2

ADDR GROUP 0

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

H_A#[31..3]

RESERVED

H_DSTBN#[3..0]

H_DSTBN#2 6
H_DSTBP#2 6
H_DINV#2 6
3

H_DSTBN#3 6
H_DSTBP#3 6
H_DINV#3 6
COMP0
COMP1
COMP2
COMP3

R240
R238
R55
R52

1
1
1
1

2
2
2
2

27D4R2F-L1-GP
54D9R2F-L1-GP
27D4R2F-L1-GP
54D9R2F-L1-GP

H_DPRSTP# 15,35
H_DPSLP# 15
H_DPWR# 6
H_PWRGD 15,31,33
H_CPUSLP# 6,15
PSI#
35

BGA479-SKT6-GPU3
Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5" .
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .

62.10079.001

2nd source: 62.10053.401


1D05V_S0

2 150R2F-1-GP

2 39D2R3F-2-GP

XDP_TDO

R56

DY

2 54D9R2F-L1-GP

H_CPURST#

R60

DY

2 54D9R2F-L1-GP

XDP_DBRESET# R85

DY

2 150R2F-1-GP

XDP_TCK

R45

2 27D4R2F-L1-GP

XDP_TRST#

R46

2 680R3F-GP

3D3V_S0

H_INIT#

R48

DY
2

R57

XDP_TMS

C136
SC4700P50V2KX

XDP_TDI

<Core Design>

All place within 2" to CPU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU (1 of 2)
Size

Document Number

Rev

SD

HURON
Date: Monday, March 12, 2007
A

Sheet
E

of

44

U36D

A4
A8
A11
A14
A16
A19
A23
A26
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3

VCC_CORE_S0

VCC_CORE_S0
U36C

V6
G21
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

VCCA

B26

1D05V_CPU_V6

1 R54
2
0R0402-PAD
1

VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]

Layout Note
1D05V_S0

C68
SCD1U10V2KX-4GP

1D5V_VCCA_S0

1D5V_S0
L9
HCB1608KF121T30-GP

1
2

C72

C67

C52

SC4D7U6D3V3KX-GP

VCC_CORE_S0

1
2

1
2

C366

C65
SC10U10V5ZY-1GP

C53

SC10U10V5ZY-1GP

C56

SC10U10V5ZY-1GP

C113

SCD1U10V2KX-4GP

C57

SCD1U10V2KX-4GP

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

Layout Note:
Provide a test point (with
no stub) to connect a
differential probe
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.

C112

VCCSENSE and VSSSENSE lines


should be of equal length.

R40
100R2F-L1-GP-U

Layout Note:

62.10079.001

C75

SC4D7U6D3V3KX-GP

VSS_SENSE 35

C82

SCD1U10V2KX-4GP

AE7

C81

SCD1U10V2KX-4GP

VSSSENSE

C90

SCD1U10V2KX-4GP

VCC_SENSE 35

C91

SCD1U10V2KX-4GP

AF7

35 VCC_CORE_S0
35
35
35
35
R41
35
100R2F-L1-GP-U
35

SCD1U10V2KX-4GP

VCCSENSE

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

SCD1U10V2KX-4GP

AD6
AF5
AE5
AF4
AE3
AF2
AE2

C415

C412

1
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

BGA479-SKT6-GPU3

1D05V_S0

68.00230.041

SC4D7U6D3V3KX-GP

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]

VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]

SCD01U16V2KX-3GP

A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18

VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
AF3
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF24

BGA479-SKT6-GPU3

62.10079.001

C59

DY
2

DY
2

1
2

C116

C60
SC10U10V5ZY-1GP

DY

SC10U10V5ZY-1GP

C108

SC10U10V5ZY-1GP

DY

SC10U10V5ZY-1GP

C115
SC10U10V5ZY-1GP

C97
SC10U10V5ZY-1GP

C85
SC10U10V5ZY-1GP

C73
SC10U10V5ZY-1GP

C64
SC10U10V5ZY-1GP

C54
SC10U10V5ZY-1GP

C365
SC10U10V5ZY-1GP

C109
SC10U10V5ZY-1GP

C98
SC10U10V5ZY-1GP

C86
SC10U10V5ZY-1GP

C74
SC10U10V5ZY-1GP

VCC_CORE_S0

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU (2 of 2)
Size

Document Number

Rev

SD

HURON
Date: Monday, March 12, 2007
A

Sheet
E

of

44

H_XRCOMP

R303
24D9R2F-L-GP

C159
SCD1U16V2ZY-2GP

H_XSWING
R120
100R2F-L1-GP-U

H_YRCOMP

R301
24D9R2F-L-GP

1D05V_S0

R302
54D9R2F-L1-GP

H_YSCOMP

1D05V_S0

H_XRCOMP
H_XSCOMP
H_XSWING

H_YRCOMP
H_YSCOMP
H_YSWING

Y1
U1
W1

H_YRCOMP
H_YSCOMP
H_YSWING

AG2
AG1

3 CLK_MCH_BCLK
3 CLK_MCH_BCLK#

H_CLKIN
H_CLKIN#

C154
SCD1U16V2ZY-2GP

E8
B9
C13
J13
C6
F6
C7
B7
A7
C3
J9
H8
K13

1D05V_S0

H_VREF

H_BNR# 4
H_BPRI# 4
H_BREQ#0 4
H_CPURST# 4,31
H_DBSY# 4
H_DEFER# 4
H_DPWR# 4
H_DRDY# 4

J7
W8
U3
AB10

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

K4
T7
Y5
AC4

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

K3
T6
AA5
AC5

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

R127
100R2F-L1-GP-U

H_ADS#
4
H_ADSTB#0 4
H_ADSTB#1 4

H_HIT#
H_HITM#
H_LOCK#

D3
D4
B3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

D8
G8
B8
F8
A8

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#_0
H_RS#_1
H_RS#_2

B4
E6
D6

H_RS#0
H_RS#1
H_RS#2

H_SLPCPU#
H_TRDY#

E3
E7

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

C167

R126
200R2F-L-GP

H_HIT#
4
H_HITM# 4
H_LOCK# 4

H_REQ#[4..0]

H_RS#[2..0]

H_CPUSLP# 4,15
H_TRDY# 4

71.CALIS.00U

R116
100R2F-L1-GP-U

DIS : 945PN P/N is KI.94501.006


UMA : 945GM P/N is KI.94501.005

2
1

E1
E2
E4

H_YSWING

R108
221R2F-2-GP

H_XRCOMP
H_XSCOMP
H_XSWING

H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_VREF_0
H_BNR#
H_BPRI#
H_BREQ#0
H_CPURST#
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#
H_VREF_1

R119
221R2F-2-GP

1D05V_S0

H_A#[31..3]

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_XSCOMP

H9
C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14

R114
54D9R2F-L1-GP

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31

1D05V_S0

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

F1
J1
H1
J6
H3
K2
G1
G2
K9
K1
K7
J8
H4
J3
K11
G4
T10
W11
T3
U7
U9
U11
T11
W9
T1
T8
T4
W7
U5
T9
W6
T5
AB7
AA9
W4
W3
Y3
Y7
W5
Y10
AB8
W2
AA4
AA7
AA2
AA6
AA10
Y8
AA1
AB4
AC9
AB11
AC11
AB3
AC2
AD1
AD9
AC1
AD7
AC6
AB5
AD10
AD4
AC8

SCD1U16V2ZY-2GP

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

HOST

U40A

H_D#[63..0]

Place them near to the chip ( < 0.5")

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

Document Number

GMCH (1 of 5)

Date: Monday, March 12, 2007


A

Rev

SD

HURON

Sheet
E

of

44

U40B

AU20
AT20
BA29
AY29

SM_CKE_0
SM_CKE_1
SM_CKE_2
SM_CKE_3

11,12
11,12
11,12
11,12

M_CS0#
M_CS1#
M_CS2#
M_CS3#

AW13
AW12
AY21
AW21

SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3

BA13
BA12
AY20
AU21

SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3

SM_OCDCOMP_0
SM_OCDCOMP_1

DY

DY

R139
R128
40D2R2F-GP 40D2R2F-GP

11,12
11,12
11,12
11,12

M_ODT0
M_ODT1
M_ODT2
M_ODT3
M_RCOMPN
M_RCOMPP

C429
3 CLK_MCH_3GPLL#
3 CLK_MCH_3GPLL
3
DREFCLK#
3
DREFCLK
3
DREFSSCLK#
3
DREFSSCLK

SM_RCOMP#
SM_RCOMP

AK1
AK41

SM_VREF_0
SM_VREF_1

AF33
AG33
A27
A26
C40
D41

G_CLKIN#
G_CLKIN
D_REFCLKIN#
D_REFCLKIN
D_REFSSCLKIN#
D_REFSSCLKIN

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

16
16
16
16

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

AE37
AF41
AG37
AH41

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

16
16
16
16

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

AC37
AE41
AF37
AG41

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

SDVO_CTRLCLK
SDVO_CTRLDATA
LT_RESET#
NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18

DMI

AC35
AE39
AF35
AG39

71.CALIS.00U

LIBG
L_LVBG

TPAD30 TP42
13 GMCH_LCDVDD_ON
CPU_SEL0 3,4
CPU_SEL1 3,4
CPU_SEL2 3,4

GMCH_CFG_9

G28
F25 PM_EXTTS#0
H26 PM_EXTTS#1
G6
AH33 PWROK_GD
AH34 RSTIN#

2
1

ENG

13
13
13
13

UMA

3
4 RN80
SRN0J-6-GP

GMCH_TXACLKGMCH_TXACLK+
GMCH_TXBCLKGMCH_TXBCLK+

13 GMCH_TXAOUT013 GMCH_TXAOUT113 GMCH_TXAOUT2-

TP158 TPAD30

R158 0R2J-2-GP

LA_CLK#
LA_CLK
LB_CLK#
LB_CLK

C37
B35
A37

LA_DATA#_0
LA_DATA#_1
LA_DATA#_2

13 GMCH_TXAOUT0+
13 GMCH_TXAOUT1+
13 GMCH_TXAOUT2+

B37
B34
A36

LA_DATA_0
LA_DATA_1
LA_DATA_2

13 GMCH_TXBOUT013 GMCH_TXBOUT113 GMCH_TXBOUT2-

G30
D30
F29

LB_DATA#_0
LB_DATA#_1
LB_DATA#_2

13 GMCH_TXBOUT0+
13 GMCH_TXBOUT1+
13 GMCH_TXBOUT2+
VGATE_PWRGD 16,35

F30
D29
F28

LB_DATA_0
LB_DATA_1
LB_DATA_2

PM_BMBUSY# 16
PM_THRMTRIP-A# 4,15,33
1
DY 2

A33
A32
E27
E26

R162 1
0R0402-PAD
2
PWROK
16,19
R159
1
2
PLT_RST1# 16,20,26,30
TP38 TPAD30 100R2J-2-GP
H28 CTRLCLK
14 TV_DACA
TP37 TPAD30
H27 CTRLDATA
14 TV_DACB
C254
K28
MCH_ICH_SYNC# 16
14 TV_DACC
SC180P50V2JN-1GP
R136 1UMA
2 TV_IREF
4K99R2F-L-GP
D1
ENG
C41
1
8TV_IRTNA
C1
2
UMA 7TV_IRTNB
BA41
3
6TV_IRTNC
BA40
4
5
BA39
3D3V_S0
RN17 SRN0J-7-GP
BA3
BA2
BA1
14 GMCH_BLUE
B41
B2
14 GMCH_GREEN
AY41
RN69
AY1
14 GMCH_RED
SRN10KJ-5-GP
GMCH_RGB#
AW41
2
1
1D05V_S0
AW1
MXM
R143
A40
0R2J-2-GP
A4
14 GMCH_DDCCLK
A39
14 GMCH_DDCDATA
R345 1UMA
GMCH_HS
A3
2 39R2J-L-GP
14 GMCH_HSYNC
CRT_IREF
GMCH_VS
R351 1UMA
2 39R2J-L-GP
14 GMCH_VSYNC

A16
C18
A19

TV_DACA_OUT
TV_DACB_OUT
TV_DACC_OUT

J20
B16
B18
B19

TV_IREF
TV_IRTNA
TV_IRTNB
TV_IRTNC

E23
D23
C22
B22
A21
B21

CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#

C26
C25
G23
J22
H23

CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_IREF
CRT_VSYNC

3D3V_S0
RN68
SRN10KJ-5-GP
1
4
2
3
1D8V_S3

PM_EXTTS#0
PM_EXTTS#1
GMCH_BLUE

1
2

GMCH_GREEN

R148
150R2F-1-GP
1

UMA

RN31
SRN100KJ-6-GP
GMCH_BL_ON
GMCH_LCDVDD_ON

UMA

GMCH_RED

UMA

TV_DACA

UMA

GMCH_GREEN
GMCH_BLUE

3
4

UMA

LIBG

GMCH_RGB#

R146
0R2J-2-GP
1 UMA 2

CRT_IREF

R140
255R2F-L-GP
1 UMA 2

R129
150R2F-1-GP

R125
80D6R2F-L-GP

2
1

R359
1K5R2F-2-GP

R145
150R2F-1-GP

M_RCOMPN
M_RCOMPP

1D5V_PCIE_S0
R163
24D9R2F-L-GP
2
1

EXP_A_COMPI
EXP_A_COMPO

D40
D38

1D5V_PCIE_S0_R

EXP_A_RXN_0
EXP_A_RXN_1
EXP_A_RXN_2
EXP_A_RXN_3
EXP_A_RXN_4
EXP_A_RXN_5
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXN_9
EXP_A_RXN_10
EXP_A_RXN_11
EXP_A_RXN_12
EXP_A_RXN_13
EXP_A_RXN_14
EXP_A_RXN_15

F34
G38
H34
J38
L34
M38
N34
P38
R34
T38
V34
W38
Y34
AA38
AB34
AC38

PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15

EXP_A_RXP_0
EXP_A_RXP_1
EXP_A_RXP_2
EXP_A_RXP_3
EXP_A_RXP_4
EXP_A_RXP_5
EXP_A_RXP_6
EXP_A_RXP_7
EXP_A_RXP_8
EXP_A_RXP_9
EXP_A_RXP_10
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXP_13
EXP_A_RXP_14
EXP_A_RXP_15

D34
F38
G34
H38
J34
L38
M34
N38
P34
R38
T34
V38
W34
Y38
AA34
AB38

PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15

EXP_A_TXN_0
EXP_A_TXN_1
EXP_A_TXN_2
EXP_A_TXN_3
EXP_A_TXN_4
EXP_A_TXN_5
EXP_A_TXN_6
EXP_A_TXN_7
EXP_A_TXN_8
EXP_A_TXN_9
EXP_A_TXN_10
EXP_A_TXN_11
EXP_A_TXN_12
EXP_A_TXN_13
EXP_A_TXN_14
EXP_A_TXN_15

F36
G40
H36
J40
L36
M40
N36
P40
R36
T40
V36
W40
Y36
AA40
AB36
AC40

GTXN0
GTXN1
GTXN2
GTXN3
GTXN4
GTXN5
GTXN6
GTXN7
GTXN8
GTXN9
GTXN10
GTXN11
GTXN12
GTXN13
GTXN14
GTXN15

1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

C275
C277
C258
C279
C260
C281
C261
C283
C263
C284
C269
C286
C265
C289
C268
C291

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15

EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
EXP_A_TXP_3
EXP_A_TXP_4
EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8
EXP_A_TXP_9
EXP_A_TXP_10
EXP_A_TXP_11
EXP_A_TXP_12
EXP_A_TXP_13
EXP_A_TXP_14
EXP_A_TXP_15

D36
F40
G36
H40
J36
L40
M36
N40
P36
R40
T36
V40
W36
Y40
AA36
AB40

GTXP0
GTXP1
GTXP2
GTXP3
GTXP4
GTXP5
GTXP6
GTXP7
GTXP8
GTXP9
GTXP10
GTXP11
GTXP12
GTXP13
GTXP14
GTXP15

1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM
1
MXM

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

C274
C276
C257
C278
C259
C280
C262
C282
C264
C285
C270
C287
C266
C288
C267
C290

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15

PEG_RXN[15..0]

26
4

PEG_RXP[15..0] 26

PEG_TXN[15..0] 26

PEG_TXP[15..0] 26

71.CALIS.00U

R151
150R2F-1-GP
R122
80D6R2F-L-GP

VGA

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

13 CLK_DDC_EDID
13 DAT_DDC_EDID

L_BKLTCTL
L_BKLTEN
L_CLKCTLA
L_CLKCTLB
L_DDC_CLK
L_DDC_DATA
L_IBG
L_VBG
L_VDDEN
L_VREFH
L_VREFL

TV

16
16
16
16

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

PM_BMBUSY#
PM_EXTTS#_0
PM_EXTTS#_1
PM_THRMTRIP#
PWROK
RSTIN#

NC

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

MISC

16
16
16
16

AE35
AF39
AG35
AH39

PM

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C509

DDR_VREF_S3

AV9
AT9

CFG

AL20
AF10

LCTLA_CLK
LCTLB_DATA

LVDS

M_OCDCOMP0
M_OCDCOMP1

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

K16
K18
J18
F18
E15
F15
E18
D19
D16
G16
E16
D15
G15
K15
C15
H16
G18
H15
J25
K27
J26

GMCH_BL_ON

D32
J30
H30
H29
G26
G25
B38
C35
F32
C33
C32

GRAPHICS

M_CKE0
M_CKE1
M_CKE2
M_CKE3

30

L_BKLTCTL

PCI-EXPRESS

11,12
11,12
11,12
11,12

U40C
TPAD30 TP39

3
4

SM_CK#_0
SM_CK#_1
SM_CK#_2
SM_CK#_3

2
1

AW35
AT1
AY7
AY40

for calistoga configuration

M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3

H32
T32
R32
F3
F7
AG11
AF11
H7
J19
K30
J29
A41
A35
A34
D28
D27

11
11
11
11

RSVD_0
RSVD_1
RSVD_2
RSVD_3
RSVD_4
RSVD_5
RSVD_6
RSVD_7
RSVD_8
RSVD_9
RSVD_10
RSVD_11
RSVD_12
RSVD_13
RSVD_14
RSVD_15

MUXING

SM_CK_0
SM_CK_1
SM_CK_2
SM_CK_3

DDR

AY35
AR1
AW7
AW40

CLK

M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3

RSVD

11
11
11
11

UMA

GMCH_RED

CRT_IREF

R132
150R2F-1-GP

RN21
SRN0J-6-GP
2
3
1
MXM 4

1D05V_S0

R144
0R2J-2-GP
1 MXM 2
R141
0R2J-2-GP
1 MXM 2
RN67
SRN0J-6-GP
4
MXM 3

TV_DACA
TV_DACB

1
2

TV_IREF
TV_DACC

RN66
SRN0J-6-GP
1
4
2
MXM 3

LCTLA_CLK
LCTLB_DATA

1
2

RN71
SRN10KJ-5-GP
4
UMA 3

GMCH_HS
GMCH_VS

1
2

RN70
SRN0J-6-GP
4
MXM 3

3D3V_S0

1D5V_S0

TV_DACB

TV_DACC

UMA

R135
150R2F-1-GP

UMA

RN18
TV_IRTNA
TV_IRTNB
TV_IRTNC

1
2
3
4

MXM

Wistron Corporation

8
7
6
5

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

SRN0J-7-GP

GMCH (2 of 5)
Size

Document Number

Rev

SD

HURON
Date: Thursday, March 15, 2007
A

Sheet
E

of

44

AY13
AJ33
AM35
AL26
AN22
AM14
AL9
AR3
AH4

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

AK33
AT33
AN28
AM22
AN12
AN8
AP3
AG5
AK32
AU33
AN27
AM21
AM12
AL8
AN3
AH5

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13

AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13

SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#

AW14
AK23
AK24
AY14

SA_RCVENIN#
SA_RCVENOUT#

M_A_DQS[7..0] 11

M_A_DQS#[7..0] 11

M_A_A[13..0] 11,12

M_A_RAS# 11,12

TP32 TPAD30
TP36 TPAD30

M_A_WE# 11,12

Place Test PAD Near to Chip


as could as possible

SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63

SA_CAS#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

M_A_BS#0 11,12
M_A_BS#1 11,12
M_A_BS#2 11,12
M_A_CAS# 11,12
M_A_DM[7..0] 11

MEMORY

SA_BS_0
SA_BS_1
SA_BS_2

AU12
AV14
BA20

AK39
AJ37
AP39
AR41
AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40
AW38
AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31
AW31
AV29
AW29
AM19
AL19
AP14
AN14
AN17
AM16
AP15
AL15
AJ11
AH10
AJ9
AN10
AK13
AH11
AK10
AJ8
BA10
AW10
BA4
AW4
AY10
AY9
AW5
AY5
AV4
AR5
AK4
AK3
AT4
AK5
AJ5
AJ3

SYSTEM

MEMORY

SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

SYSTEM

AJ35
AJ34
AM31
AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AK9
AN7
AK8
AK7
AP9
AN9
AT5
AL5
AY2
AW2
AP1
AN2
AV2
AT3
AN1
AL2
AG7
AF9
AG4
AF6
AG9
AH6
AF4
AF8

DDR

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

U40D

11 M_A_DQ[63..0]

U40E
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

DDR

11 M_B_DQ[63..0]

SB_BS_0
SB_BS_1
SB_BS_2

AT24
AV23
AY28

SB_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

AR24
AK36
AR38
AT36
BA31
AL17
AH8
BA5
AN4

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

AM39
AT39
AU35
AR29
AR16
AR10
AR7
AN5
AM40
AU39
AT35
AP29
AP16
AT10
AT7
AP5

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13

AY23
AW24
AY24
AR28
AT27
AT28
AU27
AV28
AV27
AW27
AV24
BA27
AY27
AR23

SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#

AU23
AK16
AK18
AR27

M_B_BS#0 11,12
M_B_BS#1 11,12
M_B_BS#2 11,12
M_B_CAS# 11,12
M_B_DM[7..0] 11

M_B_DQS[7..0] 11

M_B_DQS#[7..0] 11

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
SB_RCVENIN#
SB_RCVENOUT#

M_B_A[13..0] 11,12

M_B_RAS# 11,12

TP30 TPAD30
TP31 TPAD30

M_B_WE# 11,12

Place Test PAD Near to Chip


ascould as possible

71.CALIS.00U

71.CALIS.00U
1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

GMCH (3 of 5)
Size

Document Number

Rev

SD

HURON
Date: Monday, March 12, 2007
A

Sheet
E

of

44

UMA
2

C164

C220

1
2

C169

C195

1
2

VCCP_GMCH_CAP2
VCCP_GMCH_CAP1
C428

1
2

2
1
2
1

UMA

C175

C170

1
2

1
V_DACC

1
2

SC10U10V5ZY-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C183

UMA

UMA

C443

C153
SCD22U16V3ZY-GP

V_DACB

C172

VCCP_GMCH_CAP3

SCD47U10V3ZY-GP

1D5V_S0

R124 0R3-0-U-GP
V_TVBG
2 UMA 1

UMA C213

C203

C163

SCD1U10V2KX-4GP

C209

VCCAUX0
VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8
VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31
VCCAUX32
VCCAUX33
VCCAUX34
VCCAUX35
VCCAUX36
VCCAUX37
VCCAUX38
VCCAUX39
VCCAUX40

VCCD_QTVDAC

1D5V_QTVDAC_S0

SCD1U10V2KX-4GP

R138
0R3-0-U-GP
2 UMA 1

L4
HCB1608KF121T30-GP
68.00230.041

Divide by Trace (Layout Rule approve)

V_DACA

SCD1U10V2KX-4GP

UMA

R134
0R3-0-U-GP
UMA 1

2
1
R123
0R0603-PAD

1D5V_S0
1D05V_S0

C168

VCCA_CRTDAC R133
0R3-0-U-GP
1 MXM 2

R142
0R3-0-U-GP
2 UMA 1

R153
10R2J-2-GP

H19
AK31
AF31
AE31
AC31
AL30
AK30
AJ30
AH30
AG30
AF30
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE28
AH22
AJ21
AH21
AJ20
AH20
AH19
P19
P16
AH15
P15
AH14
AG14
AF14
AE14
Y14
AF13
AE13
AF12
AE12
AD12

1
1

SCD1U10V2KX-4GP

3D3V_S0

VCC_HV0
VCC_HV1
VCC_HV2

2
2

UMA

R325
0R5J-6-GP

1D5V_3D3V_S0

UMA

VCCD_TVDAC

A23
B23
B25

SCD47U10V3ZY-GP

BAT54-7-F-GP

D21

1D5V_TVDAC_S0
C198
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

3D3V_S0_VCC_HV

3D3V_S0

3D3V_TVDAC

A28
B28
C28

VCCD_LVDS
1 R349
0R3-0-U-GP

POWER

C162

UMA

R147 0R0603-PAD
2
1
1D5V_S0

D14

UMA

VCCD_HMPLL0
VCCD_HMPLL1

C157

1
1D5V_MPLL_S0

L14
HCB1608KF121T30-GP
68.00230.041

1D5V_S0

AH1
AH2

SCD1U10V2KX-4GP

2D5V_S0
BAT54-7-F-GP

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

C158

2
1
2

R352
0R3-0-U-GP
MXM 1

C150

UMA

E19
F19
C20
D20
E20
F20

V_DACC
V_DACB

SC10U10V5ZY-1GP

VCCA_TVBG
VSSA_TVBG

1
1

1
2
1

2D5V_CRTDAC

UMA

VCCA_MPLL

H20
G20

1D5V_S0

2
3

2
1
2

1
2
1
2
1
2
1
2

1
2
1

1
2
1
2
1
2
1
2

MXM

R331
10R2J-2-GP

UMA
BAT54-7-F-GP

VCCA_LVDS
VSSA_LVDS

1D5V_MPLL_S0 AF2

V_TVBG
V_DACA
V_DACB
V_DACC

1D5V_2D5V_S0

3
D27

A38
B39

SRN0J-7-GP

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

1D05V_S0

VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL

AC14
AB14
W14
V14
T14
R14
P14
N14
M14
L14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
T13
R13
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
D2
AB1
R1
P1
N1
M1

SC4D7U10V5ZY-3GP

1D5V_HPLL_S0

8
7
6
5

DY

B26
C39
AF1

RN19

1
2
3
4

1D5V_S0

R150
0R0603-PAD

UMA

VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
VCCA_3GPLL
VCCA_3GBG
VSSA_3GBG
VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC

UMA 1 VSSA_LVDS

VTT_0
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VTT_29
VTT_30
VTT_31
VTT_32
VTT_33
VTT_34
VTT_35
VTT_36
VTT_37
VTT_38
VTT_39
VTT_40
VTT_41
VTT_42
VTT_43
VTT_44
VTT_45
VTT_46
VTT_47
VTT_48
VTT_49
VTT_50
VTT_51
VTT_52
VTT_53
VTT_54
VTT_55
VTT_56
VTT_57
VTT_58
VTT_59
VTT_60
VTT_61
VTT_62
VTT_63
VTT_64
VTT_65
VTT_66
VTT_67
VTT_68
VTT_69
VTT_70
VTT_71
VTT_72
VTT_73
VTT_74
VTT_75
VTT_76

VCC_TXLVDS0
VCC_TXLVDS1
VCC_TXLVDS2

F21
E21
G21

VCCA_CRTDAC

R364 2
C501
0R2J-2-GP
SCD1U10V2KX-4GP

D28
1D5V_S0

2D5V_3GBG_S0

2D5V_S0_LVDS

C149
SCD1U10V2KX-4GP

C146

C292

AJ41
AB41
Y41
V41
R41
N41
L41
AC33
G41
H41

VCCSYNC

SC2D2U6D3V3MX-1-GP

C145
SC10U10V5ZY-1GP

R100
0R0603-PAD
1
2

UMA

C30
B30
A30

2D5V_VCC

1D5V_DPLLA
1D5V_DPLLB
1D5V_HPLL_S0

R361
0R2J-2-GP
2 MXM 1

C505

C295

1D05V_S0

U40H

H22

SCD1U10V2KX-4GP

R99
0R0603-PAD
1
2

1D5V_DPLLB

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

UMA
3

VCCSYNC
C166
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C506

SC4D7U6D3V3KX-GP

UMA

2D5V_S0

R362
0R3-0-U-GP
1 UMA 2

C294
SC4D7U6D3V3KX-GP

R365
0R3-0-U-GP
1
2

UMA

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

UMA

C212

C223

SC4D7U6D3V3KX-GP

C227

R156

UMA 0R3-0-U-GP

1 MXM
R155
0R2J-2-GP

C293

SCD1U10V2KX-4GP

1D5V_DPLLA

C216
SC4D7U6D3V3KX-GP

R154
0R3-0-U-GP
1
2

R130

UMA 0R3-0-U-GP

UMA

1D5V_3GPLL_S0
R152
0R0603-PAD
2
1

1D5V_S0

UMA

R131
0R2J-2-GP
1 MXM

1D5V_PCIE_S0
R171 0R0805-PAD
1
2

1D5V_S0

1D5V_S0

C494
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C255

C495
SC4D7U6D3V3KX-GP

2D5V_3GBG_S0
R165
0R0603-PAD
2
1

2D5V_VCC
2D5V_S0

2D5V_S0

2D5V_S0

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

SCD1U10V2KX-4GP

GMCH (4 of 5)

SCD1U10V2KX-4GP

Size

71.CALIS.00U

Document Number

Rev

SD

HURON
Date: Monday, March 12, 2007
A

Sheet
E

of

44

U40F

AD27
AC27
AB27
AA27
Y27
W27
V27
U27
T27
R27
AD26
AC26
AB26
AA26
Y26
W26
V26
U26
T26
R26
AD25
AC25
AB25
AA25
Y25
W25
V25
U25
T25
R25
AD24
AC24
AB24
AA24
Y24
W24
V24
U24
T24
R24
AD23
V23
U23
T23
R23
AD22
V22
U22
T22
R22
AD21
V21
U21
T21
R21
AD20
V20
U20
T20
R20
AD19
V19
U19
T19
AD18
AC18
AB18
AA18
Y18
W18
V18
U18
T18

VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72

U40I

NCTF

VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12

AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17

VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8
VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57

AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15

1D5V_S0

TC3
ST220U2VBM-3GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C199

C215

C200
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C165

C179
SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

C176

C222

Place these Caps close VCC_0 ~ VCC_110

AC41
AA41
W41
T41
P41
M41
J41
F41
AV40
AP40
AN40
AK40
AJ40
AH40
AG40
AF40
AE40
B40
AY39
AW39
AV39
AR39
AN39
AJ39
AC39
AB39
AA39
Y39
W39
V39
T39
R39
P39
N39
M39
L39
J39
H39
G39
F39
D39
AT38
AM38
AH38
AG38
AF38
AE38
C38
AK37
AH37
AB37
AA37
Y37
W37
V37
T37
R37
P37
N37
M37
L37
J37
H37
G37
F37
D37
AY36
AW36
AN36
AH36
AG36
AF36
AE36
AC36
C36
B36
BA35
AV35
AR35
AH35
AB35
AA35
Y35
W35
V35
T35
R35
P35
N35
M35
L35
J35
H35
G35
F35
D35
AN34

VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96

U40J

VSS

VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179

AK34
AG34
AF34
AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23

AT23
AN23
AM23
AH23
AC23
W23
K23
J23
F23
C23
AA22
K22
G22
F22
E22
D22
A22
BA21
AV21
AR21
AN21
AL21
AB21
Y21
P21
K21
J21
H21
C21
AW20
AR20
AM20
AA20
K20
B20
A20
AN19
AC19
W19
K19
G19
C19
AH18
P18
H18
D18
A18
AY17
AR17
AP17
AM17
AK17
AV16
AN16
AL16
J16
F16
C16
AN15
AM15
AK15
N15
M15
L15
B15
A15
BA14
AT14
AK14
AD14
AA14
U14
K14
H14
E14
AV13
AR13
AN13
AM13
AL13
AG13
P13
F13
D13
B13
AY12
AC12
K12
H12
E12
AD11
AA11
Y11

VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272

VSS

VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360

J11
D11
B11
AV10
AP10
AL10
AJ10
AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1

71.CALIS.00U

C151
SCD1U16V2ZY-2GP

C201
SCD1U16V2ZY-2GP

C221
SCD1U16V2ZY-2GP

C237
SCD1U16V2ZY-2GP

DY
2

C185
SCD1U10V2KX-4GP

C204
SCD1U10V2KX-4GP

C173
SCD1U10V2KX-4GP

C171
SCD1U10V2KX-4GP

C178
SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

ST220U2VBM-3GP

DY

C253

TC10

1D8V_S3

VCC

AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6
AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1

SC10U10V5ZY-1GP

71.CALIS.00U
VCC_SM_0
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_SM_37
VCC_SM_38
VCC_SM_39
VCC_SM_40
VCC_SM_41
VCC_SM_42
VCC_SM_43
VCC_SM_44
VCC_SM_45
VCC_SM_46
VCC_SM_47
VCC_SM_48
VCC_SM_49
VCC_SM_50
VCC_SM_51
VCC_SM_52
VCC_SM_53
VCC_SM_54
VCC_SM_55
VCC_SM_56
VCC_SM_57
VCC_SM_58
VCC_SM_59
VCC_SM_60
VCC_SM_61
VCC_SM_62
VCC_SM_63
VCC_SM_64
VCC_SM_65
VCC_SM_66
VCC_SM_67
VCC_SM_68
VCC_SM_69
VCC_SM_70
VCC_SM_71
VCC_SM_72
VCC_SM_73
VCC_SM_74
VCC_SM_75
VCC_SM_76
VCC_SM_77
VCC_SM_78
VCC_SM_79
VCC_SM_80
VCC_SM_81
VCC_SM_82
VCC_SM_83
VCC_SM_84
VCC_SM_85
VCC_SM_86
VCC_SM_87
VCC_SM_88
VCC_SM_89
VCC_SM_90
VCC_SM_91
VCC_SM_92
VCC_SM_93
VCC_SM_94
VCC_SM_95
VCC_SM_96
VCC_SM_97
VCC_SM_98
VCC_SM_99
VCC_SM_100
VCC_SM_101
VCC_SM_102
VCC_SM_103
VCC_SM_104
VCC_SM_105
VCC_SM_106
VCC_SM_107

1D05V_S0

VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86
VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_92
VCC_93
VCC_94
VCC_95
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100
VCC_101
VCC_102
VCC_103
VCC_104
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109
VCC_110

U40G
AA33
W33
P33
N33
L33
J33
AA32
Y32
W32
V32
P32
N32
M32
L32
J32
AA31
W31
V31
T31
R31
P31
N31
M31
AA30
Y30
W30
V30
U30
T30
R30
P30
N30
M30
L30
AA29
Y29
W29
V29
U29
R29
P29
M29
L29
AB28
AA28
Y28
V28
U28
T28
R28
P28
N28
M28
L28
P27
N27
M27
L27
P26
N26
L26
N25
M25
L25
P24
N24
M24
AB23
AA23
Y23
P23
N23
M23
L23
AC22
AB22
Y22
W22
P22
N22
M22
L22
AC21
AA21
W21
N21
M21
L21
AC20
AB20
Y20
W20
P20
N20
M20
L20
AB19
AA19
Y19
N19
M19
L19
N18
M18
L18
P17
N17
M17
N16
M16
L16

1D05V_S0

71.CALIS.00U

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

71.CALIS.00U

Title

GMCH (5 of 5)
Size

Document Number

Rev

SD

HURON
Date: Monday, March 12, 2007
A

Sheet
E

10

of

44

DM2

8 M_B_DQS#[7..0]

8 M_B_DQS[7..0]

DDR_VREF_S3

DY

C308

114
119

M_ODT2
M_ODT3

C307

1
2

NC#50
NC#69
NC#83
NC#120
NC#163/TEST

50
69
83
120
163

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

81
82
87
88
95
96
103
104
111
112
117
118

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

OTD0
OTD1
VREF
VSS
GND

GND

201

MH1

MH1

MH2

MH2

8,12
8,12

M_CLK_DDR#2

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

50
69
83
120
163

NC#50
NC#69
NC#83
NC#120
NC#163/TEST

110
115
79
80
108
113
109

CS0#
CS1#
CKE0
CKE1
RAS#
CAS#
WE#

197
195

SCL
SDA

114
119

ODT0
ODT1

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

8 M_A_DQ[63..0]
SMBD_ICH 3,18
SMBC_ICH 3,18

DDRB_SA02
R103
10KR2J-3-GP

3D3V_S0

C148
SCD1U16V2ZY-2GP

1D8V_S3

7,12
7,12
7,12
7,12
8,12
8,12
8,12

M_CS0#
M_CS1#
M_CKE0
M_CKE1
M_A_RAS#
M_A_CAS#
M_A_WE#
SMBC_ICH
SMBD_ICH

DDR_VREF_S3
7,12
7,12

DY

C305

DDR2-200P-23-GP-U1

62.10017.A71

High 9.2mm

M_ODT0
M_ODT1

C306
SCD1U16V2ZY-2GP

202

C161
SC10P50V2JN-4GP

SC4D7U6D3V3KX-GP

SCD1U16V2ZY-2GP

SC4D7U6D3V3KX-GP

7,12
7,12

SA0
SA1

198
200

DY

8,12

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

10
26
52
67
130
147
170
185

CK0
CK0#
CK1
CK1#

30
32
164
166

SA0
SA1

198
200

VDD_SPD

199

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

81
82
87
88
95
96
103
104
111
112
117
118

VREF

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

2
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

GND

GND

202

Place near DM1


M_A_DQS#[7..0]

201

High 5.2mm

M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR1
M_CLK_DDR#1

C160
SC10P50V2JN-4GP

DY

M_CLK_DDR#1

7
7
7
7

3D3V_S0

C147
SCD1U16V2ZY-2GP

1D8V_S3

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

M_CLK_DDR#0
M_CLK_DDR1

M_A_DM[7..0] 8

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

Document Number

Date: Monday, March 12, 2007


A

C299
SC10P50V2JN-4GP

DY

SKT-SODIMM20022U2GP

62.10017.691

M_CLK_DDR0

8
1

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

195
197
199

BA0
BA1

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

TPAD30 TP40
TPAD30 TP41

M_CLK_DDR2

M_A_DQS[7..0]

13
31
51
70
131
148
169
188

SDA
SCL
VDDSPD

M_A_BS#0
M_A_BS#1

M_CLK_DDR#3

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

10
26
52
67
130
147
170
185

M_CLK_DDR2 7
M_CLK_DDR#2 7
M_B_DM[7..0] 8

13
31
51
70
131
148
169
188
11
29
49
68
129
146
167
186

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

164
166

C300
SC10P50V2JN-4GP

MH2

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

11
29
49
68
129
146
167
186

CK1
CK1#

DY

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16_BA2

REVERSE TYPE

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

8 M_B_DQ[63..0]

M_CLK_DDR3 7
M_CLK_DDR#3 7

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

107
106

M_CLK_DDR3

30
32

MH2

M_A_BS#2

Place near DM2

CK0
CK0#

MH1

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_CKE2 7,12
M_CKE3 7,12

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

79
80

BA0
BA1

CKE0
CKE1

M_B_BS#0
M_B_BS#1

M_CS2# 7,12
M_CS3# 7,12

8,12
8,12

CS0#
CS1#

110
115

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

TPAD30 TP43
TPAD30 TP44
M_B_BS#2

M_B_RAS# 8,12
M_B_WE# 8,12
M_B_CAS# 8,12

8,12

108
109
113

107
106

MH1
8,12 M_A_A[13..0]

RAS#
WE#
CAS#

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

REVERSE TYPE

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

DM1
8,12 M_B_A[13..0]

DDR2 Socket
HURON

Sheet

Rev

SD
11

of

44

PARALLEL TERMINATION

DDR_VREF_S0

M_A_A12

M_CKE0 7,11
M_A_BS#2 8,11

1
2

1
2

1
2

SCD1U16V2ZY-2GP

C205

SCD1U16V2ZY-2GP

DY

C245

SCD1U16V2ZY-2GP

C188

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C238

C197
SCD1U16V2ZY-2GP

DY

C218
SCD1U16V2ZY-2GP

DY

C182

C206

SCD1U16V2ZY-2GP

C234

SCD1U16V2ZY-2GP

C232

SCD1U16V2ZY-2GP

DY

C187

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C244

C249

C226

M_B_A[13..0] 8,11
SCD1U16V2ZY-2GP

SRN56J-5-GP

C236

M_A_A[13..0] 8,11

C233

M_ODT2 7,11
M_ODT3 7,11
M_B_RAS# 8,11

C191
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

M_B_A0

M_B_A[13..0]

M_B_BS#0 8,11

C214

SCD1U16V2ZY-2GP

8
7
6
5

SRN56J-5-GP
RN24
1 M_B_A13
2
3
4

M_A_A[13..0]
M_B_A10

DY

C235

SCD1U16V2ZY-2GP

SRN56J-5-GP
RN26
1
2
3
4

M_B_BS#2 8,11

C243

SCD1U16V2ZY-2GP

8
7
6
5

DY

M_CKE2 7,11

C174

SCD1U16V2ZY-2GP

SRN56J-5-GP
RN35
1
2
3
4 M_B_A12

C190

SCD1U16V2ZY-2GP

8
7
6
5

Put decap near power(0.9V)


and pull-up resistor

DDR_VREF_S0
M_B_A9
M_B_A8
M_B_A3
M_B_A5

SCD1U16V2ZY-2GP

SRN56J-5-GP
RN30
1
2
3
4

SCD1U16V2ZY-2GP

8
7
6
5

1
2
3
4

8
7
6
5

Decoupling Capacitor

Put decap near power(0.9V) and pull-up resistor

RN34

RN28
M_B_BS#1 8,11

2
1

DY

2
SRN56J-5-GP

DY

DY

SCD1U16V2ZY-2GP

DY
M_ODT0 7,11
M_CS0# 7,11
M_A_RAS# 8,11

C228

SCD1U16V2ZY-2GP

M_A_A13

C194

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

RN23

1
2
3
4

C219

C189

SRN56J-5-GP

8
7
6
5

2
1

M_B_CAS# 8,11
M_CS3# 7,11
M_B_WE# 8,11
M_CS2# 7,11

SC2D2U6D3V3MX-1-GP

1
2
3
4

C180

SC2D2U6D3V3MX-1-GP

RN22

8
7
6
5

C239

SC2D2U6D3V3MX-1-GP

M_CKE3 7,11

SRN56J-5-GP

C242

SC2D2U6D3V3MX-1-GP

M_B_A6
M_B_A7
M_B_A11

C207

SC2D2U6D3V3MX-1-GP

1
2
3
4

C177

RN33

8
7
6
5

SRN56J-5-GP

Place these Caps near DM1

1D8V_S3

M_B_A2
M_B_A1
M_B_A4

1
2
3
4

8
7
6
5

RN27

8
7
6
5

1
2
3
4

M_A_A0
M_A_A2
M_A_A4

M_A_BS#1 8,11

Place these Caps near DM2

1D8V_S3

M_CKE1 7,11

SRN56J-5-GP

DY

1
2

1
2
1

1
2
1

DY

DY

C192

DY

SCD1U16V2ZY-2GP

M_A_A6
M_A_A7
M_A_A11

C208
SCD1U16V2ZY-2GP

1
2
3
4

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

RN32

8
7
6
5

C217

C231

SRN56J-5-GP

2
1

M_A_A9
M_A_A8
M_A_A5
M_A_A1

C250
SC2D2U6D3V3MX-1-GP

1
2
3
4

C240
SC2D2U6D3V3MX-1-GP

RN29

8
7
6
5

C241
SC2D2U6D3V3MX-1-GP

M_CS1# 7,11
M_ODT1 7,11

SRN56J-5-GP

C184
SC2D2U6D3V3MX-1-GP

M_A_CAS# 8,11

SC2D2U6D3V3MX-1-GP

1
2
3
4

C181

RN20

8
7
6
5

SRN56J-5-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

RN25

8
7
6
5

1
2
3
4

M_A_A3
M_A_A10
Title

M_A_WE# 8,11
M_A_BS#0 8,11

DDR2 Termination Resistor


Size

SRN56J-5-GP

Document Number

Rev

SD

HURON
Date: Monday, March 12, 2007
A

Sheet
E

12

of

44

LCDVDD

3D3V_S0
Q27
GND 2

U2

2
1

MXM

3 OUT

R2

30

IN

PWR_G_LED

G5281RC1U-GP

74.05281.093

R1

C9

5V_S0

CHDTC143ZUPT-GP

84.00143.B1K

SC1U16V3ZY-GP

R243
0R2J-2-GP

GND
IN#8
IN#7
IN#6
IN#5

C4
SCD1U16V2ZY-2GP

SC1U16V3ZY-GP

C5

IN#1
OUT
EN
GND

9
8
7
6
5

R242
0R2J-2-GP

2LCDVDD_ON_1

UMA

7 GMCH_LCDVDD_ON

1
2
3
4

31

LED2

1
2FRONT_PWRLED#_R
R489 100R2J-2-GP

PWRLED#_DB

1
R488

31 STDBY_LED#_DB

STDBY_LED#_R
2
100R2J-2-GP

5V_S5

1
LED-OB-2-GP

Q26

ENG

GND 2

26 NV_LCDVDD_ON

83.19223.A70
3 OUT

R2
30

IN

PWR_O_LED

R1

CHDTC143ZUPT-GP

84.00143.B1K

R248
1

27 WLAN_LED#_MC
D4
DY
BAV99-5-GP

5V_S0

R249
1

WLAN_LED#_1

33R2J-2-GP

WLAN_LED# 31

75R2J-1-GP

3
1

LCD/INVERTER CONN

Q2
2N7002-11-GP

84.27002.W31

G
S

30 WLAN_TEST_LED

LCDVDD

LCD1

SCD1U50V3ZY-GP

SC10U35V0ZY-GP

DY

1
2
3
4

8
7
6
5

GMCH_TXBOUT1GMCH_TXBOUT1+
GMCH_TXBOUT0GMCH_TXBOUT0+

30

BT_LED#

RN54

1
2
3
4

EVEN CHANNEL

CHDTC143ZUPT-GP

3D3V_S5

84.00143.B1K
GND 2

8
7
6
5

RN50
LCD_TXACLKLCD_TXACLK+
LCD_TXAOUT2LCD_TXAOUT2+

1
2
3
4

GMCH_TXBCLK- 7
GMCH_TXBCLK+ 7
GMCH_TXBOUT2- 7
GMCH_TXBOUT2+ 7

IN

30 CHARGE_LED

RN48
LCD_TXAOUT1LCD_TXAOUT1+
LCD_TXAOUT0LCD_TXAOUT0+

1
2
3
4

R486
CHARGE_LED#_R
1
2
100R2J-2-GP

83.00195.I70

Q25

7
7
7
7

GND 2

R487

3 OUT

R2
IN

30 DC_BATFULL

R1

RN56
SRN2K2J-1-GP

84.00143.B1K

7
7
7
7

UMA

R250

2
0R2J-2-GP
1 R251
2
0R2J-2-GP

26 NV_EDID_CLK_1
RN53
LCD_TXBOUT0+
LCD_TXBOUT0LCD_TXBOUT1+
LCD_TXBOUT1-

U1

1
2
3
4

MXM
8
7
6
5

LVDS_TXBOUT0+
LVDS_TXBOUT0LVDS_TXBOUT1+
LVDS_TXBOUT1-

26 NV_EDID_DAT_1

RN51

RN1
SRN0J-6-GP
2
3
1
4

USB_6USB_6+

LVDS_TXBOUT2+ 26
LVDS_TXBOUT2- 26
LVDS_TXBCLK+ 26
LVDS_TXBCLK- 26

EMI
LCD_TXBCLK+

8
7
6
5

LVDS_TXAOUT2+
LVDS_TXAOUT2LVDS_TXACLK+
LVDS_TXACLK-

26
26
26
26

16
16

RN49
LCD_TXAOUT0+
LCD_TXAOUT0LCD_TXAOUT1+
LCD_TXAOUT1-

1
2
3
4

LCD_TXBCLKLCD_TXBOUT2+

DY

LVDS_TXAOUT0+
LVDS_TXAOUT0LVDS_TXAOUT1+
LVDS_TXAOUT1-

26
26
26
26

LCD_TXBOUT2LCD_TXBOUT1+

DY

DY
2 1

LCD_TXBOUT1LCD_TXBOUT0+

R1
10KR2J-3-GP

LCD_TXBOUT0-

DY
1

C1
SC100P50V2JN-3GP

LCD_TXAOUT2LCD_TXAOUT1+

DY

R4
330R2J-3-GP
LCD_TXAOUT1LCD_TXAOUT0+

<Core Design>

DY

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

R5
330R2J-3-GP
LCD_TXAOUT0-

DY

Title

LCD CONN & LED

1
2

C2
SC100P50V2JN-3GP

R3
330R2J-3-GP

R9
330R2J-3-GP

BRIGHTNESS 30
BLON_OUT 30

DY

R8
330R2J-3-GP

SRN0J-7-GP
BRIGHTNESS
BLON_OUT

R6
330R2J-3-GP
LCD_TXACLKLCD_TXAOUT2+

R7
330R2J-3-GP

MXM
8
7
6
5

LCD_TXACLK+
R10
330R2J-3-GP

MXM

SRN0J-7-GP
USBPN6
USBPP6

EC84
SC470P50V2KX-3GP

8
7
6
5

1
2
3
4

EC87
SC470P50V2KX-3GP

DY

MXM

SRN0J-7-GP
LCD_TXAOUT2+
LCD_TXAOUT2LCD_TXACLK+
LCD_TXACLK-

NV_EDID_DAT

DY

2 1

1
2
3
4

MXM

2 1

LCD_TXBOUT2+
LCD_TXBOUT2LCD_TXBCLK+
LCD_TXBCLK-

UMA

2 1

30

2
0R2J-2-GP

CCD_ON

C12
SCD1U10V2KX-4GP

RT9711-APBG-GP
74.09711.A7F

RN55

2 1

4
1

VOUT
VIN
GND DY
NC#3 EN/EN#

MXM

1 R263
2
0R2J-2-GP

7 DAT_DDC_EDID

2 1

1
2
3

1
2

1
2

C8
SCD1U16V2ZY-2GP

NV_EDID_CLK

UMA

R262

26
26
26
26

SRN0J-7-GP
CCD_PWR
C7
SC4D7U10V5ZY-3GP

3D3V_S0

2 DC_BATFULL#_R
100R2J-2-GP

CHDTC143ZUPT-GP
GMCH_TXAOUT1GMCH_TXAOUT1+
GMCH_TXAOUT0GMCH_TXAOUT0+

7 CLK_DDC_EDID

FUSE-1A6V-2-GP
2

LED-GY-14-GP

84.00143.B1K
GMCH_TXACLKGMCH_TXACLK+
GMCH_TXAOUT2GMCH_TXAOUT2+

SRN0J-7-GP

CHDTC143ZUPT-GP

UMA
8
7
6
5

R1

UMA
8
7
6
5

3 OUT

R2

SRN0J-7-GP

20.F0993.040

LED1

UMA

SRN0J-7-GP

ACES-CONN40A-2GP

F1

31

R1

Q24
LCD_TXBCLKLCD_TXBCLK+
LCD_TXBOUT2LCD_TXBOUT2+

3D3V_S0

IN

BT_LED

SRN0J-7-GP

ODD CHANNEL

3 OUT

R2

7
7
7
7

EC67

LCD_TXBOUT1LCD_TXBOUT1+
LCD_TXBOUT0LCD_TXBOUT0+

LCD_TXAOUT2LCD_TXAOUT2+
LCD_TXAOUT1LCD_TXAOUT1+
LCD_TXAOUT0LCD_TXAOUT0+
LCD_TXACLKLCD_TXACLK+
LCD_TXBOUT2LCD_TXBOUT2+
LCD_TXBOUT1LCD_TXBOUT1+
LCD_TXBOUT0LCD_TXBOUT0+
LCD_TXBCLKLCD_TXBCLK+

UMA

F2
1
2
FUSE-3A32V-8-GP
69.43001.111

2
2

1
1

DCBATOUT

RN52

2
1

BRIGHTNESS
BLON_OUT

Q22
GND 2

C6
SCD1U25V3ZY-1GP

3
4

CCD_PWR

3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

3D3V_S0
NV_EDID_CLK
NV_EDID_DAT

C346

4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42

41
2
USB_6USB_6+

Size

Document Number

Rev

SD

HURON
Date:

Tuesday, March 13, 2007

Sheet

13

of

44

L8

Layout Note:
* Must be a ground return path between this ground and the ground on
the VGA connector.
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.

SC100P50V2JN-3GP CRT_B

CRT_VSYNC1

14

C417

CRT_HSYNC1

5V_CRT_S0
C414

C425

10

CLK_DDC1_5

15

SC18P50V2JN-1-GP

5
MH2
16

C413
SC100P50V2JN-3GP

DY
D24
CRT_DEC_R

5V_S0

1
5V_S0

CDS2C16GTH-GP

C394

Hsync & Vsync level shift

SC100P50V2JN-3GP

5V_CRT_S0

C156
SCD1U16V2ZY-2GP

73.74125.L13

DY

DY
7

C155
SC18P50V2JN-1-GP

14
CRT_VSYNC
0R2J-2-GP

1
R300

NV_VSYNC

MXM
26

R299
CRT_HSYNC1_R 1
2CRT_HSYNC1
0R2J-2-GP
U39A
26 NV_DDCDAT
TSAHCT125PW-GP

UMA

R297 1
2
0R2J-2-GP

7 GMCH_VSYNC

14
CRT_HSYNC
0R2J-2-GP

CRT_VSYNC1_R

R104 1

U39B
TSAHCT125PW-GP

C152
SC18P50V2JN-1-GP

8
7
6
5
RN63
SRN10KJ-6-GP

Q14

2 0R2J-2-GP
2 0R2J-2-GP

NV_DDCDAT_1

CRT_DEC#

DAT_DDC1_5

UMA

R109 1

26 NV_DDCCLK

73.74125.L13

MXM

R105 1

7 GMCH_DDCDATA

R298
1
2CRT_VSYNC1
0R2J-2-GP

3D3V_S0
RN64
SRN2K2J-1-GP

3
4

MXM
1
R304

NV_HSYNC

UMA

1
2
3
4

UMA

26

CH751H-40PT
D23
3D3V_S0

DDC_CLK & DATA level shift


2
1

3D3V_S0

CRT_DEC#

470R2J-2-GP

7 GMCH_HSYNC

SC18P50V2JN-1-GP

SCD01U16V2KX-3GP

20.20334.015

30

R306 1
2
0R2J-2-GP

C426

VIDEO-15-21-U4-GP

R261

CRT_G

13

C419

2
8

MXM

CRT_B
C422

MXM

68.00230.021

12

C410

SC6D8P50V2DN-GP

MXM

2
FCB1608CF-GP

SC6D8P50V2DN-GP

R284

C416

SC6D8P50V2DN-GP

R289

C418

SC22P50V2JN-4GP

150R2F-1-GP

R292

1
C421

SC22P50V2JN-4GP

0R2J-2-GP

CRT_B_1
0R2J-2-GP

SC22P50V2JN-4GP

150R2F-1-GP

GMCH_BLUE

UMA

150R2F-1-GP

1
R101
1
R102

NV_BLUE

26

68.00230.021

0R2J-2-GP

MXM

7
DAT_DDC1_5

UMA

7 GMCH_GREEN

0R2J-2-GP

CRT_G

2
FCB1608CF-GP

NV_GREEN

11

CRT_R

L10
CRT_G_1

0R2J-2-GP

26
4

MH1
6

68.00230.021

MXM
1
R106
1
R107

17

CRT_R

2
FCB1608CF-GP

0R2J-2-GP

UMA

GMCH_RED

CRT1

L11

CRT_R_1

Ferrite bead impedance: 10 ohm@100MHz

MXM
1
R111
1
R112

NV_RED

CRT I/F & CONNECTOR

Layout Note:
Place these resistors
close to the CRT-out
connector
26

MXM

R110 1

7 GMCH_DDCCLK

2 0R2J-2-GP
2 0R2J-2-GP

2N7002DW-1-GP

NV_DDCCLK_1

UMA

CLK_DDC1_5

C478

R338
150R2F-1-GP

1
2
IND-1D2UH-5-GP

LUMA_1

LUMA_1_1

C481

C474
SC150P50V2JN-3GP

TV_DACB

TVOUT1

L15

4
6
7

LUMA
CRMA
COMP

SC270P50V2JN-2GP

NC#5

NC#2

GND
GND
GND
GND

1
3
8
9

R337 UMA
0R2J-2-GP
1
2

2 SC33P50V2JN-3GP

26 NV_TV_LUMA

R329 MXM
0R2J-2-GP
1
2

TV CONN

MINDIN7-19-GP-U2

C450

CRMA_1
C453

C448
SC150P50V2JN-3GP

R321
150R2F-1-GP

1
2
IND-1D2UH-5-GP

CRMA_1_1

TV_DACC

22.10021.H61

L12

SC270P50V2JN-2GP

R320 UMA
0R2J-2-GP
1
2

2 SC33P50V2JN-3GP

26 NV_TV_CRMA

R319 MXM
0R2J-2-GP
1
2

C466

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

COMP_1
C469
Title

C463
SC150P50V2JN-3GP

R327
150R2F-1-GP

L13
1
2
IND-1D2UH-5-GP

TV_DACA

R326 UMA
0R2J-2-GP
1
2

COMP_1_1

SC270P50V2JN-2GP
Size

R322 MXM
0R2J-2-GP
1
2

26 NV_TV_COMP

2 SC33P50V2JN-3GP

CRT/TV Connector

Document Number

Date: Monday, March 12, 2007


A

Rev

SD

HURON

Sheet
E

14

of

44

2 SC12P50V2JN-3GP

1
2

C210 1

2 SC12P50V2JN-3GP

U14A
RCT_X1
RCT_X2

AA6
AB5
AC4
Y6

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LDRQ0# 30

RTC_RST#

AA3

R330 1

2 1MR2J-1-GP

INTRUDER#
INTVRMEN

Y5
W4

INTRUDER#
INTVRMEN

W1
Y1
Y2
W3

EE_CS
EE_SHCLK
EE_DOUT
EE_DIN

LFRAME#

AC3
2
AA5 3D3V_LDRQ1_S0 1 R328
10KR2J-3-GP
AB3
LPC_LFRAME# 30

A20GATE
A20M#

AE22
AH28

V3

LAN_CLK

CPUSLP#

AG27

U3

LAN_RSTSYNC

TP1/DPRSTP#
TP2/DPSLP#

AF24
AH25

U5
V4
T5

LAN_RXD0
LAN_RXD1
LAN_RXD2

28 ACZ_SDATAIN0
25 ACZ_SDATAIN1

ACZ_SDIN2
R334 1
39R2J-L-GP

25,28 ACZ_SDATAOUT

SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0

C193
C186
C202
C196

1
1
1
1

2
2
2
2

SC3900P50V3KX-GP
SC3900P50V3KX-GP
SC3900P50V3KX-GP
SC3900P50V3KX-GP

SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C

SATARBIAS
1 R324
2
24D9R2F-L-GP
R335
300KR2J-GP

P.H. for internal VCCSUS1_05


INTVRMEN

ACZ_RST#

T2
T3
T1

ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2

20
20
20
20
20
20

IDE_PDIOR#
IDE_PDIOW#
IDE_PDDACK#
INT_IRQ14
IDE_PDIORDY
IDE_PDDREQ

LAN
CPU

H_DPRSTP# 4,35
H_DPSLP# 4

FERR#

AG26

GPIO49/CPUPWRGD

AG24

H_PWRGD 4,31,33

IGNNE#
INIT3_3V#
INIT#
INTR

AG22
AG21
AF22
AF25

H_IGNNE# 4

RCIN#

AG23

KBRCIN# 30

NMI
SMI#

AH24
AF23

H_NMI 4
H_SMI# 4

STPCLK#

AH22

H_STPCLK# 4

THERMTRIP#

AF26

H_THERMTRIP_R

ACZ_SDOUT

H_FERR# 4

H_INIT# 4
H_INTR 4

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

AF7
AE7
AG6
AH6

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

AF1
AE1

SATA_CLKN
SATA_CLKP

AH10
AG10

SATARBIASN
SATARBIASP

AF15
AH15
AF16
AH16
AG16
AE15

DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ

R293
200R2F-L-GP
1 DY
2

H_PWRGD
1D05V_S0

1D05V_S0

R294
56R2J-4-GP

SATALED#

AF3
AE3
AG2
AH2

R296
56R2J-4-GP

H_CPUSLP# 4,6

R290
1
DY

PM_THRMTRIP-A# 4,7,33

0R2J-2-GP

IDE

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15

AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15

IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

DA0
DA1
DA2

AH17
AE17
AF17

IDE_PDA0 20
IDE_PDA1 20
IDE_PDA2 20

DCS1#
DCS3#

AE16
AD16

IDE_PDCS1# 20
IDE_PDCS3# 20

20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20

Layout Note: R568 needs to placed


within 2" of ICH7, R568 must be placed
within 2" of R169 w/o stub.

1D05V_S0

R490
2K2R2J-2-GP
C606

Place within 500 mils


of ICH7ball

R5

AF18

3 CLK_PCIE_SATA#
3 CLK_PCIE_SATA

RTC_AUX_S5

ACZ_BIT_CLK
ACZ_SYNC

TPAD30 TP35
ACZ_SDATAOUT_R T4
2
31 SATA_LED#

20
20
20
20

U1
R6

1D05V_S0

R291
0R2J-2-GP
1
DY 2

25,28 ACZ_RST#

ACZ_BIT_CLK
ACZ_SYNC_R
2
39R2J-L-GP
ACZ_RST#_R
2
33R2J-2-GP

3D3V_S0

2 R348
1
22R2J-2-GP1
R333
1
R339

ACZ_BITCLK
25,28 ACZ_SYNC

LAN_TXD0
LAN_TXD1
LAN_TXD2

H_CPUSLP#_2

Open
R
for Dothan A step
Shunt for Dothan B step
& all Yonah

28

U7
V6
V7

KA20GATE 30
H_A20M# 4

30
30
30
30

2 R347
1
22R2J-2-GP

25 ACZ_BTCLK_MDC

LDRQ0#
LDRQ1#/GPIO23

AC-97/AZALIA

INTRUDER#

C484
SC1U10V3ZY-6GP

R342
0R2J-2-GP
2
DY 1 LAN_RSTYNC

RTCRST#

LAD0
LAD1
LAD2
LAD3

2 20KR2J-L2-GP

RTXC1
RTCX2

R344 1

19

DY

AB1
AB2

C490
SC1U10V3ZY-6GP

SATA

C496

RTC
LPC

BAT-CON2-U2-GP

BAT_D

DY

3
1

R357
1KR2J-1-GP
1
2

BAT

1
2
MH1
MH2

SCD1U16V2ZY-2GP

PWR
GND
MH1
MH2

RTC1

R149
10MR2J-L-GP

82.30001.691

RTC_AUX_S5

RTC circuitry

X3
X-32D768KHZ-38GPU

D30
BAS40CW-GP

3D3V_AUX_S5

C211 1

ENG

R340
0R2J-2-GP

INTVRMEN

Enable

Disable

SCD1U16V2KX-3GP

71.ICH7M.00U

PM_THRMTRIP-A#

PN:KI.80101.017

C
MMBT2222A-3-GP
Q28

THRMTRIP#_KBC 33

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Placement Note:
Diatance between the ICH-7 M and cap on the "P" signal
should be identical distance between the ICH-7 M and cap
on the "N" signal for same pair.

Title
Size

Document Number

ICH7-M (1 of 4)

Date: Monday, March 12, 2007


A

Rev

SD

HURON

Sheet
E

15

of

44

RSVD[1]
RSVD[2]
RSVD[3]
RSVD[4]
RSVD[5]

TP76

TPAD30

RP5

1
2
3
4
5

3D3V_S0

SPKR
SUS_STAT#
SYS_RST#

AB18

PM_BMBUSY#

3
3

AC20
AF21

PM_STPPCI#
PM_STPCPU#

A21
PCIRST1# 22,24,27

PSW_CLR#

PCB_VER0
PCB_VER1

R98 1
0R2J-2-GP

PLT_RST1# 7,20,26,30
CLK_ICHPCI 3

TP26 TPAD30

B21
E23
AG18

24,30 PM_CLKRUN#

PCI_STOP# 24
PCI_TRDY# 24
PCI_FRAME# 24

INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#

A19
A27
A22

AC19
U2

GPIO0/BM_BUSY#
GPIO11/SMBALERT#
GPIO18/STPPCI#
GPIO20/STPCPU#
GPIO26
GPIO27
GPIO28

WAKE#
SERIRQ
THRM#

7,35 VGATE_PWRGD

AD22

VRMPWRGD

30

ECSCI#_1
TPAD30 TP25

GPIO6
GPIO7
GPIO8

MCH_ICH_SYNC#

1
1

TXN2
TXP2

H26
H25
G28
G27

PERn2
PERp2
PETn2
PETp2

1
1

TXN3
TXP3

K26
K25
J28
J27

PERn3
PERp3
PETn3
PETp3

M26
M25
L28
L27

PERn4
PERp4
PETn4
PETp4

P26
P25
N28
N27

PERn5
PERp5
PETn5
PETp5

T25
T24
R28
R27

PERn6
PERp6
PETn6
PETp6

C121 SCD1U10V2KX-5GP 2
C120 SCD1U10V2KX-5GP 2

1
1

27
27
27
27

PCIE_RXN2
PCIE_RXP2
PCIE_TXN2
PCIE_TXP2

C123 SCD1U10V2KX-5GP 2
C122 SCD1U10V2KX-5GP 2

27
27
27
27

PCIE_RXN3
PCIE_RXP3
PCIE_TXN3
PCIE_TXP3

C129 SCD1U10V2KX-5GP 2
C130 SCD1U10V2KX-5GP 2

LAN

MINI CARD

3D3V_S0

TXN1
TXP1

PERn1
PERp1
PETn1
PETp1

PCIE_RXN1
PCIE_RXP1
PCIE_TXN1
PCIE_TXP1

NEW CARD

ACZ_SPKR

R117 1

3D3V_S5

1
2
3
4
5

3D3V_S5
USB_OC#7
USB_OC#6
USB_OC#5
USB_OC#3

ECSCI#_1

R317 1

2 10KR2J-3-GP

PWROK

R341 2

1 10KR2J-3-GP

2 1KR2J-1-GP

1
PCB_VER0
PCB_VER1

R313
10KR2J-3-GP

DY

DY R350

TPAD30 TP34
10KR2J-3-GP

3D3V_S5

2 8K2R2J-3-GP

DY

ECSWI#_1
ECSMI#

SMLINK0
SMLINK1

3
4

RN16 SRN100KJ-6-GP
2
1

RN14 SRN10KJ-5-GP
3
2
4
1

21
21

USB_OC#0
USB_OC#1

PlanarID
(1,0)
SA: 0,0
SB: 0,1
SC: 1,0
SD: 1,1

PCI

SPI

LAN_RST#

C19

RSMRST#

Y4
E20
A20
F19
E19
R4
E22
R3
D20
AD21
AD20
AE20

PWRBTN#_ICH 1
R118
10KR2J-3-GP
LAN_RST# 1
2
2
RSMRST#_SB

D13
BAT54PT-GP
1

GAPDimm Door

D8
BAS16-1-GP
3

3D3V_S0
R312
10KR2J-3-GP

PSW_CLR#

GAP-OPEN

DISUMA_SEL

V26
V25
U28
U27

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

7
7
7
7

DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP

Y26
Y25
W28
W27

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

7
7
7
7

DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP

AB26
AB25
AA28
AA27

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

7
7
7
7

DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

AD25
AD24
AC28
AC27

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

7
7
7
7

DMI_CLKN
DMI_CLKP

AE28
AE27

CLK_PCIE_ICH# 3
CLK_PCIE_ICH 3

C25
D25

DMI_IRCOMP_R

SPI_CLK
SPI_CS#
SPI_ARB

P5
P2

SPI_MOSI
SPI_MISO

D3
C4
D5
D4
E5
C3
A2
B3

OC0#
OC1#
OC2#
OC3#
OC4#
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P

F1
F2
G4
G3
H1
H2
J4
J3
K1
K2
L4
L5
M1
M2
N4
N3

USBRBIAS#
USBRBIAS

D2
D1

USBPN0
USBPP0
USBPN1
USBPP1
USBPN2
USBPP2
USBPN3
USBPP3
USBPN4
USBPP4
USBPN5
USBPP5
USBPN6
USBPP6
USBPN7
USBPP7

R316

RTL 10KR2J-3-GP

1D5V_S0
Place within 500 mils of ICH
R295
24D9R2F-L-GP
2

21
21
21
21
21
21
21
21
27
27
21
21
13
13
27
27

USB ports definition


Pair

Device

USB1

USB3

USB2

USB_RBIAS_PN

USB4

MINICARD

BlueTooth

CCD

NewCard

R343
22D6R2F-L1-GP

71.ICH7M.00U

<Core Design>

Wistron Corporation

RSMRST#_SB

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

Document Number

ICH7-M (2 of 4)

Rev

SD

HURON

IDT 10KR2J-3-GP

Layout Note:
PCIE AC coupling caps
need to be within 250 mils of the driver.

Date: Wednesday, March 14, 2007


A

R315

UMA

10KR2J-3-GP
CLKGNT_SEL

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP

DMI_ZCOMP
DMI_IRCOMP

R336
100KR2D-1-GP

DY

MXM R308

L:RTM865-433

R332
2K2R2F-GP

30 RSMRST#_KBC

G55

PM_PWRBTN# 30,31

3D3V_S0

ECSWI#_1 30
ICH7_GPI12

C23

TP71 TPAD30
7,19 R305
100R2J-2-GP
2
1
PM_DPRSLPVR 35
1
2 R307
PM_BATLOW#_R
100KR2J-1-GP
DY
PWROK

PM_DPRSLPVR_R

H:IDTCV125

R2
P6
P1

3D3V_S5

Default:H
GNT5# GNT4#

SPI_ARB

USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7

R137 0R2J-2-GP
1
2

LPC

C21

PWRBTN#

GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25
GPIO35
GPIO38
GPIO39

R310 1

AC22

TP0/BATLOW#

USB_OC#2
USB_OC#1
USB_OC#4
USB_OC#0

3D3V_S0
PM_CLKRUN#

AA4

3D3V_S0

SRN10KJ-L3-GP
10
9
8
7
6

R355
10KR2J-3-GP

RP2

R314
10KR2J-3-GP

3D3V_S0

1
2
3
4
5

3D3V_S5

1
2
3
4
5

INT_PIRQF#
PCI_SERR#
INT_SERIRQ
MCH_ICH_SYNC#

SRN8K2J-2-GP-U
10
INT_PIRQA#
9
INT_PIRQD#
8
INT_PIRQC#
7
INT_PIRQB#
6

PCIE_WAKE#
ICH7_GPI12
PM_BATLOW#_R
DBRESET#

RP1

3D3V_S0

SRN10KJ-L3-GP
3D3V_S5
10
SMB_ALERT#
9
PSW_CLR#
8
7 SMB_LINK_ALERT#
PM_RI#
6

3D3V_S0

RP3

1
2
3
4
5

PM_SLP_S3# 19,26,27,30,33,38,39,40
PM_SLP_S4# 27,30,38,40

GPIO16/DPRSLPVR

GPIO

F26
F25
E28
E27

22
22
22
22

PCI_STOP#
PCI_REQ#3
PCI_TRDY#
PCI_LOCK#

SRN8K2J-2-GP-U
10
PCI_REQ#4
9
PCI_FRAME#
8
PCI_REQ#2
7
PCI_REQ#1
6

PM_SUS_CLK 19

U14D

AE9
AG8
AH8
F21
AH20

3D3V_S0
RP4

C20
B24
D23
F22 SLPS5#

PWROK

GPIO33/AZ_DOCK_EN#
GPIO34/AZ_DOCK_RST#

F20
AH21
AF20

INT_PIRQG# 24

SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#

GPIO32/CLKRUN#

22,27 PCIE_WAKE#
30 INT_SERIRQ
19
THRM#

AC21
AC18
ECSMI# E21

CLK_ICH14 3
CLK48_ICH 3

71.ICH7M.00U

RSVD[6]
RSVD[7]
RSVD[8]
RSVD[9]
MCH_SYNC#

SRN8K2J-2-GP-U
10
INT_PIRQH#
9
PCI_REQ#0
8
PCI_REQ#5
7
PCI_IRDY#
6

DBRESET#

SMB_ALERT# B23

24
24
24
24

71.ICH7M.00U

INT_PIRQE#
INT_PIRQG#
PCI_PERR#
PCI_DEVSEL#

ACZ_SPKR

AC1
B2

CLK14
CLK48

TPAD30 TP23

RI#

3D3V_S0
RN65
SRN10KJ-6-GP
8
7
6
5

C26 PLTRST# 2
A9
B19 ICH_PME#

MISC

TPAD30

A28

1
2
3
4

AE5
AD5
AG4
AH4
AD9

28

TP28

PM_RI#

PLTRST#
PCICLK
PME#

G8
F7
F8
G7

TPAD30

SATA0_R2
SATA0_R0
SATA0_R3
SATA0_R1

A7
E10
B18
A12
C9
E11
B10
F15
F14
F16

GPIO2/PIRQE#
GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#

TPAD30

TP74

SATA0_R0
SATA0_R1
SATA0_R2
SATA0_R3

PIRQA#
PIRQB#
PIRQC#
PIRQD#

TPAD30

TP73

R121
PCI_IRDY# 24
47R2J-2-GP
PCI_PAR 24
PCIRST# 1
2
PCI_DEVSEL# 24
PCI_PERR#
PCI_LOCK#
PCI_SERR#

IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#

Interrupt I/F

A3
B4
C5
B5

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

TP27

AF19
AH18
AH19
AE19

C/BE0#
C/BE1#
C/BE2#
C/BE3#

B15
C12
D12
C15

PCI_REQ#0 24
PCI_GNT#0 24

PCI_REQ#1
PCI_GNT#1
PCI_REQ#2
PCI_GNT#2
PCI_REQ#3
PCI_GNT#3
PCI_REQ#4
PCI_GNT#4
PCI_REQ#5
PCI_GNT#5

GPIO21/SATA0GP
GPIO19/SATA1GP
GPIO36/SATA2GP
GPIO37/SATA3GP

Clocks

D7
E7
C16
D16
C17
D17
E13
F13
A13
A14
C8
D8

SMB

REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#
REQ4#/GPIO22
GNT4#/GPIO48
GPIO1/REQ5#
GPIO17/GNT5#

Direct Media Interface

PCI

USB

INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

PCI-Express

E18
C18
A16
F18
E16
A18
E17
A17
A15
C14
E14
D14
B12
C13
G15
G13
E12
C11
D11
A11
A10
F11
F10
E9
D9
B9
A8
A6
C7
B6
E6
D6

SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1

SPI

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

C22
B22
SMB_LINK_ALERT# A26
SMLINK0
B25
SMLINK1
A25

18,27 SMB_CLK
18,27 SMB_DATA

SYS
GPIO
Power MGT

U14B

SATA
GPIO

U14C

24 PCI_AD[31..0]

Sheet
E

16

of

44

Layout Note:
Place near pin AA19

1D05V_S0

1
2

1
2

1
2

2
1
2

1
2

1
2

1
2

3D3V_S5
R346
0R0603-PAD
1
2
C476

DY

1D5V_S0

1
TP75
TPAD28
TP18
TPAD28
TP72
TPAD28

Layout Note:
Place near AB3
C480

C487

2
VccSus1_05[1]

1
2

1
2

1
2
1

1
2

1
2

CORE
IDE
PCI

C473

1D5V_S0

SCD1U10V2KX-4GP

1D5V_S0

71.ICH7M.00U

RTC_AUX_S5

C472

C433

C28 VccSus1_05[2]
G20 VccSus1_05[3]
A1
H6
H7
J6
J7

C440

DY

K7

1
2

1
2

2
1
2

VccSus1_05[2]
VccSus1_05[3]
VccSus1_05/VccLAN1_05[1]
VccSus1_05/VccLAN1_05[2]Vcc1_5_A[26]
Vcc1_5_A[27]
Vcc1_5_A[28]
Vcc1_5_A[29]
Vcc1_5_A[30]

1
2

1
2

1
2

USB

1
2
1
2

VccSus1_05[1]

USB CORE

1
2

1
2

1
2

1
2

1
2

2
1
1
2
2
1
1
2

AB8
AC8

C439

DY

SC10U10V5ZY-1GP

VccLan1_05[1] AA2
Y7

Vcc1_5_A[24]
Vcc1_5_A[25]

C449
SC10U10V5ZY-1GP

VccUSBPLL

T7
F17
G17

SCD1U10V2KX-4GP

VccSus3_3[19]

Vcc1_5_A[21]
Vcc1_5_A[22]
Vcc1_5_A[23]

C485

C452

SCD1U10V2KX-4GP

E3
C1

Vcc1_5_A[19]
Vcc1_5_A[20]

C471
SCD1U10V2KX-4GP

Vcc1_5_A[10]
Vcc1_5_A[11]
Vcc1_5_A[12]
Vcc1_5_A[13]
Vcc1_5_A[14]
Vcc1_5_A[15]
Vcc1_5_A[16]
Vcc1_5_A[17]
Vcc1_5_A[18]

AB17
AC17

C446

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

C482
SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

TP33
TPAD28

Vcc3_3[2]

K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7

C479

3D3V_S5
V3D3A_VCCPSUS R309
0R0603-PAD
2
1

3D3V_ICH_S5

3D3V_S0

SCD1U10V2KX-4GP

C420

AB10
AB9
AC10
AD10
AE10
AF10
AF9
AG9
AH9

VccSus3_3[7]
VccSus3_3[8]
VccSus3_3[9]
VccSus3_3[10]
VccSus3_3[11]
VccSus3_3[12]
VccSus3_3[13]
VccSus3_3[14]
VccSus3_3[15]
VccSus3_3[16]
VccSus3_3[17]
VccSus3_3[18]

C444

SCD1U10V2KX-4GP

1D5V_S0
SCD1U10V2KX-4GP

VccSATAPLL

A24
C24
D19
D22
G19

C447

C451

3D3V_S0

SCD1U10V2KX-4GP

C462
SCD1U10V2KX-4GP SCD1U10V2KX-4GP

C483

AD2

ATX

SCD1U10V2KX-4GP

DY

3D3V_ICH_S5

Vcc1_5_A[1]
Vcc1_5_A[2]
Vcc1_5_A[3]
Vcc1_5_A[4]
Vcc1_5_A[5]
Vcc1_5_A[6]
Vcc1_5_A[7]
Vcc1_5_A[8]
Vcc1_5_A[9]

AH11

C434
C467

AB7
AC6
AC7
AD6
AE6
AF5
AF6
AG5
AH5

VccSus3_3[2]
VccSus3_3[3]
VccSus3_3[4]
VccSus3_3[5]
VccSus3_3[6]

C461

SCD1U10V2KX-4GP

1D5V_S0

VccDMIPLL

P7

C454

SCD1U10V2KX-4GP

3D3V_S0

AG28

ARX

C486
SCD1U10V2KX-4GP

R354
0R0603-PAD

C423
SCD1U10V2KX-4GP

C427

Vcc3_3[1]

VccSus3_3[1]

C438

SCD1U10V2KX-4GP

1D5V_S0

B27

VccRTC

W5

C435

SC4D7U10V5ZY-3GP

C125

Vcc3_3[12]
Vcc3_3[13]
Vcc3_3[14]
Vcc3_3[15]
Vcc3_3[16]
Vcc3_3[17]
Vcc3_3[18]
Vcc3_3[19]
Vcc3_3[20]
Vcc3_3[21]

A5
B13
B16
B7
C10
D15
F9
G11
G12
G16

3D3V_S0

SCD1U10V2KX-4GP

68.1R220.10A

AA7
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19

SCD1U10V2KX-4GP

2
IND-1D2UH-5-GP

SCD1U10V2KX-4GP

1
C124

SCD01U16V2KX-3GP

1D5V_ICH_S0

1D5V_GPLL_ICH_S0

L3

SC10U10V5ZY-1GP

1D5V_S0

SCD1U10V2KX-4GP

1D5V_S0

SCD1U10V2KX-4GP

C424

Vcc3_3[3]
Vcc3_3[4]
Vcc3_3[5]
Vcc3_3[6]
Vcc3_3[7]
Vcc3_3[8]
Vcc3_3[9]
Vcc3_3[10]
Vcc3_3[11]

1D05V_S0

R7
AE23
AE26
AH26

C442

SCD1U10V2KX-4GP SCD1U10V2KX-4GP

3D3V_S5

U6

V_CPU_IO[1]
V_CPU_IO[2]
V_CPU_IO[3]

C459

3D3V_S5

C488

3D3V_S0

SCD1U10V2KX-4GP

C477
SCD1U16V2ZY-2GP

3D3V_S0

C458

C460

DY

SCD1U10V2KX-4GP

V5REF_S5

R353
100R2J-2-GP

C445

SCD1U10V2KX-4GP

D29
CH751H-40PT

C457

SCD1U10V2KX-4GP

5V_S5

C441

SCD1U10V2KX-4GP

3D3V_S5

Vcc3_3/VccHDA
VccSus3_3/VccSusHDA

VCCA3GP

SCD1U16V2ZY-2GP

Layout Note:
Place near ICH7

C465

VccSus3_3/VccLAN3_3[1]
VccSus3_3/VccLAN3_3[2]
VccSus3_3/VccLAN3_3[3]
VccSus3_3/VccLAN3_3[4]

V5
V1
W2
W7

C456

SCD1U10V2KX-4GP

V5REF_S0

R323
100R2J-2-GP

Vcc1_5_B[1]
Vcc1_5_B[2]
Vcc1_5_B[3]
Vcc1_5_B[4]
Vcc1_5_B[5]
Vcc1_5_B[6]
Vcc1_5_B[7]
Vcc1_5_B[8]
Vcc1_5_B[9]
Vcc1_5_B[10]
Vcc1_5_B[11]
Vcc1_5_B[12]
Vcc1_5_B[13]
Vcc1_5_B[14]
Vcc1_5_B[15]
Vcc1_5_B[16]
Vcc1_5_B[17]
Vcc1_5_B[18]
Vcc1_5_B[19]
Vcc1_5_B[20]
Vcc1_5_B[21]
Vcc1_5_B[22]
Vcc1_5_B[23]
Vcc1_5_B[24]
Vcc1_5_B[25]
Vcc1_5_B[26]
Vcc1_5_B[27]
Vcc1_5_B[28]
Vcc1_5_B[29]
Vcc1_5_B[30]
Vcc1_5_B[31]
Vcc1_5_B[32]
Vcc1_5_B[33]
Vcc1_5_B[34]
Vcc1_5_B[35]
Vcc1_5_B[36]
Vcc1_5_B[37]
Vcc1_5_B[38]
Vcc1_5_B[39]
Vcc1_5_B[40]
Vcc1_5_B[41]
Vcc1_5_B[42]
Vcc1_5_B[43]
Vcc1_5_B[44]
Vcc1_5_B[45]
Vcc1_5_B[46]
Vcc1_5_B[47]
Vcc1_5_B[48]
Vcc1_5_B[49]
Vcc1_5_B[50]
Vcc1_5_B[51]
Vcc1_5_B[52]
Vcc1_5_B[53]

SCD1U10V2KX-4GP

5V_S0

D26
CH751H-40PT

C468
SCD1U10V2KX-4GP

3D3V_S0

C430
SCD1U10V2KX-4GP

*Within a given well, 5VREF needs to be up before the


corresponding 3.3V rail

C464
SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

C475

C455

SC10U10V5ZY-1GP

C432

AA22
AA23
AB22
AB23
AC23
AC24
AC25
AC26
AD26
AD27
AD28
D26
D27
D28
E24
E25
E26
F23
F24
G22
G23
H22
H23
J22
J23
K22
K23
L22
L23
M22
M23
N22
N23
P22
P23
R22
R23
R24
R25
R26
T22
T23
T26
T27
T28
U22
U23
V22
V23
W22
W23
Y22
Y23

V5REF_Sus

SCD1U10V2KX-4GP

C431

V5REF[2]

F6

SCD1U10V2KX-4GP

C470

AD17

V5REF_S5

L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

SCD1U10V2KX-4GP

C489

V5REF_S0

Vcc1_05[1]
Vcc1_05[2]
Vcc1_05[3]
Vcc1_05[4]
Vcc1_05[5]
Vcc1_05[6]
Vcc1_05[7]
Vcc1_05[8]
Vcc1_05[9]
Vcc1_05[10]
Vcc1_05[11]
Vcc1_05[12]
Vcc1_05[13]
Vcc1_05[14]
Vcc1_05[15]
Vcc1_05[16]
Vcc1_05[17]
Vcc1_05[18]
Vcc1_05[19]
VCC PAUX Vcc1_05[20]

SCD1U10V2KX-4GP

1D5V_S0

V5REF[1]

SCD1U10V2KX-4GP

G10

U14F

Title

ICH7-M (3 of 4)
Size

Document Number

Rev

SD

HURON
Date: Monday, March 12, 2007

Sheet
E

17

of

44

U14E

VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]

P28
R1
R11
R12
R13
R14
R15
R16
R17
R18
T6
T12
T13
T14
T15
T16
T17
U4
U12
U13
U14
U15
U16
U17
U24
U25
U26
V2
V13
V15
V24
V27
V28
W6
W24
W25
W26
Y3
Y24
Y27
Y28
AA1
AA24
AA25
AA26
AB4
AB6
AB11
AB14
AB16
AB19
AB21
AB24
AB27
AB28
AC2
AC5
AC9
AC11
AD1
AD3
AD4
AD7
AD8
AD11
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
AE21
AE24
AE25
AF2
AF4
AF8
AF11
AF27
AF28
AG1
AG3
AG7
AG11
AG14
AG17
AG20
AG25
AH1
AH3
AH7
AH12
AH23
AH27

3D3V_S5

3D3V_S0

8
7
6
5

VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]

RN15
SRN4K7J-10-GP

1
2
3
4

A4
A23
B1
B8
B11
B14
B17
B20
B26
B28
C2
C6
C27
D10
D13
D18
D21
D24
E1
E2
E4
E8
E15
F3
F4
F5
F12
F27
F28
G1
G2
G5
G6
G9
G14
G18
G21
G24
G25
G26
H3
H4
H5
H24
H27
H28
J1
J2
J5
J24
J25
J26
K24
K27
K28
L13
L15
L24
L25
L26
M3
M4
M5
M12
M13
M14
M15
M16
M17
M24
M27
M28
N1
N2
N5
N6
N11
N12
N13
N14
N15
N16
N17
N18
N24
N25
N26
P3
P4
P12
P13
P14
P15
P16
P17
P24
P27

5V_S0

Q3
16,27

SMB_CLK

6 2N7002DW-1-GP

SMBC_ICH 3,11
2

84.27002.D3F
16,27 SMB_DATA
SMBD_ICH 3,11

Q14 connect SMLINK and


SMBUS in S) for SMBus 2.0
compliance

SMBUS

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

71.ICH7M.00U
Title

ICH7-M (4 of 4)
Size

Document Number

Rev

SD

HURON
Date: Monday, March 12, 2007
A

Sheet
E

18

of

44

Digital Output Data Bits

TEMP.

Sign

MSB

LSB

EXT

+127.875

111

1111

111

+126.375

111

1110

011

+25.5

001

1001

100

+1.75

000

0001

110

+0.5

000

0000

100

+0.125

000

0000

001

-0.125

111

1111

111

-1.125

111

1110

111

-25.5

110

0110

100

TPAD28
TPAD28
TPAD28

5V_S0

110

1000

011

FAN1
4

000

1111

C367
SC4D7U6D3V3KX-GP

D20

C362
SCD1U16V2ZY-2GP

-65.000

100

FAN1_VCC
FAN1_FG1
PURE_HW_SHUTDOWN#

R233
10KR2J-3-GP

FAN1_VCC

*Layout* 15 mil

-55.25

TP85
TP84
TP86

FAN1_VCC

C357
SC2200P50V2KX-2GP
FAN1_FG1
1

BAS16-1-GP

*Layout* 15 mil

C381
SC1KP50V2KX-1GP

2
3

MLX-CON3-10-GP

20.F1000.003
U6

SGND1
SGND2
SGND3

8
10
12

G792_DXP2
G792_DXP3

G49

33 PURE_HW_SHUTDOWN#

G48

Q1
MMBT3904-3-GP
Q15
B
C78
B
C437
MMBT3904-3-GP SC470P50V3JN-2GP
SC470P50V3JN-2GP

SC2200P50V2KX-2GP
SC2200P50V2KX-2GP

3.System Sensor,
Put between CPU and NB.

H_THERMDA 4

Place near chip as close


as possible

DXP1:108 Degree (CPU)


DXP2:H/W Setting 100(System)
DXP3:105 Degree (SYSTEM)

C368
368 C373
373

GAP-CLOSE

74.00792.A79

G792_DXN2
G792_DXN3
GAP-CLOSE

G792SFUF-GP

5
17

V_DEGREE

R221
49K9R2F-L-GP

V_DEGREE
=(((Degree-72)*0.02)+0.34)*VCC

DGND
DGND

ALERT#
THERM#
THERM_SET
RESET#

DY

ALERT#

R230 2
0R2J-2-GP

THRM#

2
16

2.HW T8 sensor

SMBD_G792 26,30
SMBC_G792 26,30

15
13
3
2

G792_32K

2C

DXP1
DXP2
DXP3

1
4
14
16
18
19

2C

7
9
11

FAN1
FG1
CLK
SDA
SCL
NC#19

C372
C370
C371
SC4D7U10V5ZY-3GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2

R229
10KR2J-3-GP

1
1

1
R222
21KR2F-GP

VCC
DVCC

DY

Setting T8 as
90 Degree

SC1U16V3ZY-GP

C364

6
20

5V_G792_S0

*Layout* 30 mil

R224
1
2
10R3J-3-GP

5V_S0

5V_S0

3D3V_S0

C126
SC2200P50V2KX-2GP
H_THERMDC 4

1.For CPU Sensor

1 R219
2 G792_RESET#
4K7R2F-GP

7,16 PWROK

R218
10KR2F-2-GP

PURE_HW_SHUTDOWN#

D22
R231
0R2J-2-GP

Tahoe

DY
BAW56PT-U

R232 DY
0R2J-2-GP
2
1

INTRUDER# 15

3D3V_AUX_S5

DY

RSMRST# 30

D21
BAT54-7-F-GP

R234
10KR2J-3-GP

2004/11/10 CHANGE

DY

(dummy, KBC already delay)


C378 DY
SCD1U16V2ZY-2GP

3D3V_S5

32K suspend clock output


U31
1
2
3

DY VCC

R236
10R2J-2-GP
1
2

32KHZ

G792_32K

OE
A
GND

NC7SZ126P5X-GP

R237
100KR2F-L1-GP

RUN_POWER_ON

Wistron Corporation

73.7S126.AAH

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
G

16,26,27,30,33,38,39,40 PM_SLP_S3#
16 PM_SUS_CLK

Q13
S

Title
Size

Thermal/Fan Controllor

Document Number

2N7002-11-GP
Date: Monday, March 12, 2007

HURON

Sheet

Rev

SD
19

of

44

ODD Connector

SATA HD Connector

5V_S0

1
2

38
39
40

+5V(MOTOR)
+5V(MOTOR)
+5V(MOTOR)

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15

21
19
17
15
13
11
9
7
6
8
10
12
14
16
18
20

IDE_PDIORDY
15 INT_IRQ14

31

ODD_LED#
PDIAG

15

VENDER_UNIQUE#50
VENDER_UNIQUE#49

50
49

AUDIO_GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND

3
4
23
26
43
44
45
46
48

GND
GND

51
52

47

DEVICE_CONFIG(CSEL)

15
15

IDE_PDCS1#
IDE_PDCS3#

35
36

CSIFX#
CS3FX#

15
15
15

IDE_PDA0
IDE_PDA1
IDE_PDA2

33
31
34

DA0
DA1
DA2

4
3
2
1

R170
0R2J-2-GP

ALP-CON22-GP

15

IDE_PDDREQ

27
29
22

IORDY
INTRQ
DMARQ

15
15

IDE_PDIOR#
IDE_PDIOW#

24
25

DIOR#
DIOW#

37
32
28
5
30

DASP#
PDIAG#
DMACK#
RESET#
IOCS16#

ODD_LED#
15 IDE_PDDACK#
3D3V_S0

R363 1
10KR2J-3-GP

PDIAG
IDE_PDDACK#
HDDDRV#_5

DY

1
2

AUDIO_L_CH
AUDIO_R_CH

IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15

SPD-CONN50-4R-20GPU

20.80355.050

5V_S0

12

R179
0R0402-PAD
1
2

11

HDDDRV#_5

TSAHCT125PW-GP

73.74125.L13

7,16,26,30 PLT_RST1#

13

14

U39D

20.F0754.022

+5V(LOGIC)
+5V(LOGIC)

R311
10KR2J-3-GP

2
SATA_TXN0 15
SATA_TXP0 15

ODD1

41
42

SRN10KJ-6-GP

D15
SSM24PT-GP

SATA_RXP0 15
SATA_RXN0 15

C316
SCD1U16V2ZY-2GP

TC4

RN72

DY

5
6
7
8

5V_S0

C301
SCD1U16V2ZY-2GP

5V_S0

3D3V_S0

SC10U10V5ZY-1GP

16
17
18
19
20
21
22
NP2
24

SC10U10V5ZY-1GP

2
3
4
5
6
7
8
9
10
11
12
13
14
15

C298

C296

SCD1U16V2ZY-2GP

23
NP1
1

SATA1

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

HDD and CDROM

Document Number

Rev

SD

HURON
Date: Monday, March 12, 2007

Sheet

20

of

44

USBCN1

16
1

SCD1U16V2ZY-2GP

74.00545.073

1
2

DY

DY

17
JST-CON15-1-GP

21.D0214.115

ENG

ENG

0R0402-PAD
2

TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28

USB_OC#1 16

USB_PWR_EN# 30

EC75

DY

TP88
TP87
TP89
TP90
TP92
TP91

USBPN1
USBPP1
USBPN3
USBPP3
USB_OC#1
USB_PWR_EN#

5V_S5

DY

1
9

USBPN3 16
USBPP3 16
R35

SC1U16V3ZY-GP

EC49

GND
GND

OC#

G545B2RD1U-GP

EC89

16
16

C363

USB_OC#0

EC88

16

TC11

EN/EN#

SC1000P50V3JN-GP

USB_PWR_EN#

SCD1U16V2ZY-2GP

C229

OUT#6
OUT#7
OUT#8

100 mil

SE150U10VM-2GP

SCD1U16V3KX-3GP

IN#2
IN#3

6
7
8

5V_USB1_S0
U42

2
3

5V_S5

USBPN1
USBPP1

SCD1U16V2ZY-2GP

2
3
4
5
6
7
8
9
10
11
12
13
14
15

5V_USB1_S0

5V_USB1_S0

USB2

6
1

BLUETOOTH MODULE
3D3V_BT_S0

16
16

1
2
R374 0R3-0-U-GP

SKT-USB-97-UGP
3D3V_S0

U45

EC90 DY
SCD1U16V2ZY-2GP

3D3V_BT_S0

1
2
3

2
3
4
5

USBPN2
USBPP2

DY

OUT
GND
NC#3

IN

EN

22.10218.H01

C523
SC4D7U10V5ZY-3GP
2
5V_USB1_S0

BLUETOOTH_EN 30

G5240B1T1U-GP

USB1

74.05240.A7F
6
1

EC21 put near


BLUE1 / all
USB put one
choke near
connector by
EMI request

ACES-CON4-GP

16
16

6
4
3
2
1

2
3
4
5

USBPN0
USBPP0

3D3V_BT_S0

SKT-USB-97-UGP
USB_5+

R183 1

0R0402-PAD
2

USBPP5

16

USB_5-

R182 1

0R0402-PAD
2

USBPN5

16

22.10218.H01

5
BLUE1

20.F0714.004

TPAD28
TPAD28

TP93
TP94

USB_5+
USB_5-

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

USB / BLUETOOTH

Document Number

HURON

Date: Tuesday, March 13, 2007

Rev

SD
Sheet

21

of

44

2D5V_LAN_S5
1D2V_LAN_S5

2
1
67
66

Q11
BCP69T1-1-GP

69

C355

1
2
1
2

1
2

1
2

SCD1U10V2KX-4GP

SC4D7U10V5ZY-3GP

C26
SCD1U10V2KX-4GP

C35

PCIE_PLLVDD
SC4D7U10V5ZY-3GP
C32

R27
0R0603-PAD
1
2

SCD1U10V2KX-4GP

PCIE_SDSVDD
C31

SC4D7U10V5ZY-3GP

R606 change to Bead


for Transmitter Distortion

C45

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

LAN BCM5787
Size
A3

Document Number

Rev

SD

HURON

Date: Monday, March 19, 2007


5

GPHY_PLLVDD

R24
C24
FCM1608K-601T03GP
R31
0R0603-PAD
1
2

C374

1
2

2
C43

SC4D7U10V5ZY-3GP
C25

2
1

C22

DY

C379

SCD1U10V2KX-4GP

2D5V_LAN_S5

1D2V_LAN_S5

SC10U10V5ZY-1GP

AVDDL_G

R25
0R0603-PAD

C62

R225
0R0402-PAD

16

C46

1D2V_LAN_S5

3
REG_GND

REGCTL12

C377

C51

C58

Q12
BCP69T1-1-GP

REGCTL25

C380

ENERGY_DET 30

SCD1U10V2KX-4GP

NC#11(CLK_REQ#)

C55

1
R30
4K7R2J-2-GP

3D3V_LAN_S5
14

3D3V_LAN_S5

SCLK
SI
SO
CS#

RDAC
REGCTL12

TP70 TPAD30
R33
4K7R2J-2-GP
2
1

SC4D7U10V5ZY-3GP

11

2
2

TP69 TPAD30

XTALO
XTALI

R21
C37
1K24R2F-GP
SC15P50V2JN-2-GP

1
R214

DY 10KR2J-3-GP

18

2
1

TP68 TPAD30

VAUXPRSNT
VMAINPRSNT
LOW_PWR
SMB_CLK
SMB_DATA

3D3V_LAN_S5

RDAC 37

9
7
4

59

ENERGY_DET

LAN_ACT_LED# 23

UART_MODE
EE_WP
GPIO0

NC#59/(ENERGY_DET)

R215

DY 10KR2J-3-GP

GPIO2

65
63
64
62

3D3V_AUX_S5

10M/100M/1G_LED# 23

SCLK
SI
SO
CS#

23
23

MDI0MDI0+

22
21

41
40

1
LAN_X0

TRD0TRD0+

23
23

REGCTL25

ENG

MDI1MDI1+

C27

Place PLLVDD/AVDDL
CKT as close to chip as
possible

42
43

2
1

82.30020.571

C38
SC15P50V2JN-2-GP

XTAL-25MHZ-67GP

TRD1TRD1+

UART_MODE
GPIO1_SERIALDI
GPIO0_SERIALDO

2
LAN_XI

23
23

SCD1U10V2KX-4GP

1
2
R34
200R2J-L1-GP

TRD2TRD2+

SC10U10V5ZY-1GP

X1

PCIE_TXDP
PCIE_TXDN
PCIE_RXDP
PCIE_RXDN
WAKE#
PERST#
REFCLK+
REFCLK-

GND

VAUX_PRESENT54
VMAINPRSNT 53
LOW_PWR
3

58
57
LAN_XO_R

23
23

MDI2MDI2+

SC4D7U10V5ZY-3GP

1 1KR2J-1-GP
LOW_PWR
2 R37
1DY
0R2J-2-GP

MDI3MDI3+

48
47

LAN_AVDD

C21

SCD1U10V2KX-4GP

26
25
31
32
12
10
29
28

R42
0R0603-PAD
1
2

SCD1U10V2KX-4GP

C354
SCD1U10V2KX-4GP

R212 2
30

R210
0R0603-PAD

49
50

GPIO2

LAN_RST

R213
1KR2J-1-GP
2
1

TRD3TRD3+

PCIE_GND

3 CLK_PCIE_LAN
C369 3 CLK_PCIE_LAN#

3D3V_LAN_S5

52

SCD1U10V2KX-4GP

R220
4K7R2J-2-GP

SC4D7U10V5ZY-3GP

3D3V_LAN_S0

45

AVDD

SCD1U10V2KX-4GP

3D3V_LAN_S0

16,27 PCIE_WAKE#

2
SC47P50V2JN-3GP

3D3V_S0

R223 1
0R2J-2-GP

AVDD

24

PCIE_RXDP
PCIE_RXDN

LAN_AVDD

BIASVDD_G
C23

3D3V_LAN_S5

DY DY
38

PCIE_VDD
PCIE_VDD

EE_WP
SCLK
SO

R216
4K7R2J-2-GP

AVDD

27
33

8
7
6
5

R43
0R0603-PAD
1
2

SC4D7U10V5ZY-3GP

16,24,27 PCIRST1#

PCIE_RXP1
PCIE_RXN1
PCIE_TXP1
PCIE_TXN1

XTALVDD_G

LINKLED#
SPD100LED#
SPD1000LED#
TRAFFICLED#

C30
SCD1U10V2KX-4GP

17
68

PCIE_PLLVDD

PCIE_SDSVDD

16
16
16
16

23

GPHY_PLLVDD

1 C33
1 C34

XTALVDD

VCC
WP
SCL
SDA

30

BIASVDD_G

PCIE_PLLVDD

35

36

GPHY_PLLVDD

AVDDL
AVDDL
AVDDL
AVDDL

BIASVDD

A0
A1
A2
GND

39
44
46
51

72.24C64.D01
1
2
3
4

3 1

AVDDL_G

R39
10KR2J-3-GP
1
2

C36

SCD1U10V2KX-4GP

C361
SCD1U10V2KX-4GP
2
1

SCD1U10V2KX-4GP

part change to 71.05787.M02

VDDC
VDDC
VDDC
VDDC
VDDC
VDDC

3D3V_LAN_S5
U5
AT24C64AN-10SU-1GP

XTALVDD_G

1
2
R44
0R0603-PAD

SCD1U10V2KX-4GP

5
13
20
34
55
60

VDDP
VDDP

71.05787.A03

6
15
19
56
61

U4
BCM5787MKMLG-GP

VDDP 1

1
2
R47
0R0603-PAD

1D2V_LAN_S5

SCD1U10V2KX-5GP 2
SCD1U10V2KX-5GP 2

1
2

R36
0R0603-PAD

3D3V_LAN_S5

3D3V_S5

VDDIO
VDDIO
VDDIO
VDDIO
VDDIO

1
2

1
2

1
2

C44
SCD1U10V2KX-4GP

C47
SCD1U10V2KX-4GP

C41
SCD1U10V2KX-4GP

C42
SCD1U10V2KX-4GP

C358
SCD1U10V2KX-4GP

C356
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C28

C40
SCD1U10V2KX-4GP

C29
SCD1U10V2KX-4GP

SC4D7U10V5ZY-3GP

C359

SCD1U10V2KX-4GP

2D5V_LAN_S5
C39

Sheet
1

22

of

44

Voltage
Rail

4401E
3D3V_LAN_S5

VDDC

1D8V_LAN_S5

1D2V_LAN_S5

VDDIO

3D3V_LAN_S5

3D3V_LAN_S5

VESD

3D3V_LAN_S5

VDDP

Don't Care

3D3V_S0

3D3V_S0

3D3V_S5

1D8V_1D2V_S5 1D8V_LAN_S5

LAN Connector

5787

5789

VDDIO_PCI

3D3V_2D5V_S5

Don't Care

RJ1

9
A1
A2
A3
1

CONN_PWR_1
10M/100M/1G_LED# 22

RJ45_1

2
3
4
5
6
7
8
B1

Don't Care

2D5V_S5
2D5V_S5

RJ45_2
RJ45_3
RJ45_4
RJ45_5
RJ45_6
RJ45_7
RJ45_8
CONN_PWR_2

B2

1D2V_S5

LAN_ACT_LED# 22

10

A3:Green
B2:YELLOW

RJ45-124-GP-U1

LAN Link: Green(A3), behavior is the


same for 10/100/1000 bits

GIGA Lan Transformer


2D5V_LAN_S5

22
22

MDI1+
MDI1-

22
22

MDI0+
MDI0-

1
C347
SCD1U16V2ZY-2GP

C348
SCD1U16V2ZY-2GP

XF1

1
2
3
4
5
6

RD+
RDRDCT
TDCT
TD+
TD-

RX+
RXRXCT
TXCT
TX+
TX-

LAN Data: Yellow(B2), when LAN is


transfering data.

RJ45_3
RJ45_6

12
11
10
9
8
7

MCT2
MCT1

12
11
10
9
8
7

MCT4
MCT3

RJ45_1
RJ45_2

XFORM-208-GP

68.68161.30A

XF2
22
22

MDI3+
MDI3-

22
22

MDI2+
MDI2-

1
2
3
4
5
6

RD+
RDRDCT
TDCT
TD+
TD-

RX+
RXRXCT
TXCT
TX+
TX-

RJ45_7
RJ45_8
RJ45_4
RJ45_5

XFORM-208-GP

1.route on bottom as differential pairs.


2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.

1
2

SCD1U16V2ZY-2GP

C352

SCD1U16V2ZY-2GP

68.68161.30A
C351

10M/100M/1G_LED#
LAN_ACT_LED#
3D3V_LAN_S5
3D3V_LAN_S5

R204
1

1 R202

CONN_PWR_1
2
470R2J-2-GP

CONN_PWR_2

470R2J-2-GP

TD+ --> TX+

RJ45-1

TD- --> TX-

RJ45-2

RD+ --> RX+

RJ45-3

RD- --> RX-

RJ45-6

1
2

4
3
2
1
5
6
7
8

C349
LAN_TERMINAL 1

DY

SC100P50V2JN-3GP

RJ45 PIN

DY

SC100P50V2JN-3GP

RN41
SRN75J-1-GP

DY

SC100P50V2JN-3GP

10/100 LAN Transformer

SC100P50V2JN-3GP

DOC_TIP,DOC_RING,TIP,RING:
W/S : 10/100 @ Surface layers
10/20 @ Inner layers
1

DY

MCT1
MCT2
MCT4
MCT3

EC69 EC71 EC68 EC70

RJ11 signal must leave the other signal


or power plane 100mil.

<Core Design>

Wistron Corporation

SC1KP2KV8KX-GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

LAN Connector
Size
A3

Document Number

Rev

SD

HURON

Date: Monday, March 19, 2007

Sheet
E

23

of

44

1D8V_S0

1
2

2
83
84

OZ129_XI
OZ129_XO

C273
1

76
75
74
72
71

MC_3V#
SD/MS_CLK
SD_D3
SD_D2
SD_D1
SD_D0
SD_CMD
SM_WPI#/SD_WP
SD_CD#

4
113
111
112
107
108
110
117
114

CARD_EN#
SD/XD/MS_CLK

MS_D1/XD_D7
XD_D6
XD_D5
XD_D4
MS_BS/XD_D3
MS_D0/XD_D2
MS_D2/XD_D1
MS_D3/XD_D0
XD_CE#
XD_RB#
XD_CLE
XD_ALE
XD_WE#
XD_RE#
XD_WPO#
MS_CD#
XD_CD#

95
93
89
87
88
90
94
96
119
100
118
109
105
101
98
99
97

NC#2
NC#8
NC#9
NC#19
NC#13
NC#126
NC#127
NC#128

2
8
9
10
13
126
127
128

TEST0
TEST1

85
86

R161
56R2J-4-GP

1
2
R157
56R2J-4-GP
1
2

CARD_EN#
25
SD/XD/MS_CLK 25
SD_D3
25
SD_D2
25
SD_D1
25
SD_D0
25
SD_CMD
25
SM_WPI#/SD_WP 25
SD_CD#
25
MS_D1/XD_D7
XD_D6
XD_D5
XD_D4
MS_BS/XD_D3
MS_D0/XD_D2
MS_D2/XD_D1
MS_D3/XD_D0
XD_CE#
XD_R/B#
XD_CLE
XD_ALE
XD_WE#
XD_RE#
XD_WPO#
MS_CD#
XD_CD#

R166 R164

TPBIAS0
TPA0P
TPA0N
TPB0P
TPB0N

TPA0P
TPA0N
TPB0P
TPB0N

25
25
25
25

1
2 R160
5K11R2F-L1-GP
1394_TPB1_R
1
2
C252
SC820P50V2KX-1GP
3

25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25

12
16
33
66
68
104
115
116
121
123
124

AGND
AGND
AGND
AGND
AGND
AGND

71.OZ129.00G

MEDIA_LED

65
69
70
77
80
82

DY

DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND

IDSEL
PCI_CLK
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PCI_REQ#
PCI_GNT#
PCI_RST#
INTA#
PME#
CLKRUN#

SC6D8P50V2DN-GP

TPBIAS0
TPA0P
TPA0N
TPB0P
TPB0N

TPBIAS
TPA+
TPATPB+
TPB-

78

XI
XO

C271

82.30023.391

2
REF

X4
X-24D576MHZ-44GP

14
15
91
92
120
125

OZ129_IDSEL

16 PCI_DEVSEL#
16 PCI_FRAME#
16
PCI_IRDY#
16
PCI_TRDY#
16
PCI_STOP#
16
PCI_PAR
16
PCI_REQ#0
16
PCI_GNT#0

1.8VCCD
1.8VCCD
1.8VCCD
1.8VCCD
1.8VCCD
1.8VCCD

26
56
7
102
103
122
67
73
79
81

C/BE3#
C/BE2#
C/BE1#
C/BE0#

PCI_VCC
PCI_VCC
3.3VCCD
3.3VCCD
3.3VCCD
3.3VCCD
3.3VCCA
3.3VCCA
3.3VCCA
3.3VCCA

1
2

1
2

1
2

1
2

1
2

1
2
1
2

28
38
46
55

56R2J-4-GP

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

NOTE 2:
These 1394 signals are high
speed differential pairs and
must be kept equal length
with a differential impedance
(Zo) of 110ohms.

SC8P250V2CC-GP

1
C272

56R2J-4-GP

16,22,27 PCIRST1#

SCD01U16V2KX-3GP

PCI_AD22 R169
1
PCLK_PCM_1
100R2J-2-GP

SCD1U10V2KX-4GP

PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0

19
20
21
22
23
24
25
27
29
30
31
32
34
35
36
37
47
48
49
50
51
52
53
54
57
58
59
60
61
62
63
64

5
45
42
39
C493 DY
40
SC10P50V2JN-4GP
41
43
44
17
18
1
11
16
INT_PIRQG#
R172 1 DY
2 CBUS_PME# 3
3D3V_S0
PM_CLKRUN#_OZ129 10KR2J-3-GP
1 R168
2
6
16,30 PM_CLKRUN#
0R0402-PAD
106
R167
1KR2J-1-GP

1 R356
10R2J-2-GP

3 PCLK_PCM

PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0

PCI_AD[31..0]

C256

R366
5K9R2F-GP
U15

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

C510

ENG

C248
SC4D7U10V5ZY-3GP

16
16
16
16

C512
SC4D7U10V5ZY-3GP

C251
SCD1U10V2KX-4GP

16

ENG

SCD1U10V2KX-4GP

3D3V_S0

C607
SC12P50V2JN-3GP

C297

C511

SCD1U10V2KX-4GP

3D3V_S0

SC4D7U10V5ZY-3GP

C503
SCD1U10V2KX-4GP

NOTE 1:
The Ferrite beads, FB1 & FB2,
are shown for referrence.
The actual value, or even the
requirement, must be based on
post-layout testing.

C504
SCD1U10V2KX-4GP

C225
SC4D7U10V5ZY-3GP

MLB-160808-4-GP

+3VRUN

L16

SC

3D3V_S0

OZ129TN-GP
L17
OZ129_AGND 1

MLB-160808-4-GP

68.00108.031

IDSEL:AD22
INTA-->:INT_PIRQG#
GNT:PCI_GNT#0
REQ:PCI_REQ#0

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

OZ129T

Document Number

Date: Monday, March 19, 2007


A

Rev

SD

HURON

Sheet
E

24

of

44

1394 Connector
R369

DY

2
0R3-0-U-GP

L19

1394

DY

22.10218.H21

1394 SKT-1394-4P-10GP-U

R367 1

TPA0P
TPA0N
TPB0P
TPB0N

24
24
24
24

L18

2
0R3-0-U-GP

check with EMI, can change to 0 ohm


R368

1394

DY

NCMS20C900-GP

DY

2
0R3-0-U-GP

68.20900.201

R370

TPA0P
TPA0N
TPB0P
TPB0N

TPA0+
TPA0TPB0+
TPB0-

68.20900.201

6
5
4
3
2
1

NCMS20C900-GP

GND
GND
TPA0+
TPA0TPB0+
TPB0-

1394

2
0R3-0-U-GP

CARDREADER1

24
24
24
24

MS_D3/XD_D0
MS_D2/XD_D1
MS_D0/XD_D2
MS_BS/XD_D3
24
XD_D4
24
XD_D5
24
XD_D6
24
MS_D1/XD_D7
24
XD_R/B#
24 XD_RE#
24 XD_CE#
24 XD_CLE
24
XD_ALE
24
XD_WE#
24
XD_WPO#
24
XD_CD#
3D3V_S5

MS_D3/XD_D0
MS_D2/XD_D1
MS_D0/XD_D2
MS_BS/XD_D3
XD_D4
XD_D5
XD_D6
MS_D1/XD_D7
XD_CE#
XD_CLE
XD_ALE

4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

ACZ_BTCLK_MDC
ACZ_SYNC
ACZ_SDATAIN1
ACZ_RST#
ACZ_SDATAOUT
CARD_EN#

SD/XD/MS_CLK
SD_CD#

ACZ_BTCLK_MDC

15

ACZ_SYNC
15,28
ACZ_SDATAIN1
15
ACZ_RST#
15,28
ACZ_SDATAOUT
15,28
CARD_EN#
24
SD_D0
24
SD_D1
24
SD_D2
24
SD_D3
24
SD_CMD
24
SD/XD/MS_CLK
24
SD_CD#
24
SM_WPI#/SD_WP
24
MS_CD#
24
3D3V_S0

MLX-CONN40D-6GP

20.F0673.040

CONN on Bottom side

<Core Design>
1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

1394 / CARD READER BD


Size

Document Number

Date: Tuesday, March 13, 2007


A

Rev

SD

HURON

Sheet
E

25

of

44

NV SMBus
A(pin143&145) : VGA(CRT) / DOCK
B(pin218&220) : DVI
C(pin208&210) : HDMI / TPI / LVDS

Put near graphic connector

13
13
13
13
13
13

7 PEG_TXP[15..0]
D

7 PEG_TXN[15..0]

LVDS_TXACLK- 13
LVDS_TXACLK+ 13
LVDS_TXAOUT2- 13
LVDS_TXAOUT2+ 13
LVDS_TXAOUT1- 13
LVDS_TXAOUT1+ 13
LVDS_TXAOUT0- 13
LVDS_TXAOUT0+ 13

LVDS_TXBOUT0+
LVDS_TXBOUT0LVDS_TXBOUT1+
LVDS_TXBOUT1LVDS_TXBOUT2+
LVDS_TXBOUT2-

7 PEG_RXP[15..0]
NV_EDID_DAT_1 13
NV_EDID_CLK_1 13

13 LVDS_TXBCLK+
13 LVDS_TXBCLK-

SCD1U25V3KX-GP
14
14
14

NV_LCDVDD_ON
NV_BLON 30

NV_BLUE
NV_GREEN
NV_RED

NV_DVI_DAT 43
NV_DVI_CLK 43

14
NV_TV_COMP
14
NV_TV_LUMA
1 14
NV_TV_CRMA
R360 0R2J-2-GP
5V_S0
2
1
R358 0R2J-2-GP
C230

DY

PM_SLP_S3#

1
1

PEG_TXN0
PEG_TXP0

1
2

PEG_TXN1
PEG_TXP1

PEG_TXN2
PEG_TXP2

PEG_TXN3
PEG_TXP3

PEG_TXN4
PEG_TXP4

PEG_TXN5
PEG_TXP5

PEG_TXN6
PEG_TXP6

PEG_TXN7
PEG_TXP7

PEG_TXN8
PEG_TXP8

PEG_TXN9
PEG_TXP9

PEG_TXN10
PEG_TXP10

PEG_TXN11
PEG_TXP11

PEG_TXN12
PEG_TXP12

26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
MH2
232

4
6
8
10
12
14
16
18
20
22
24

231
MH1
2

3D3V_S0
C388

MXM

SC10U10V5ZY-1GP

PEG_TXN13
PEG_TXP13

1D8V_S0

R247
0R3-0-U-GP

NV
PEG_TXN14
PEG_TXP14

1
2

DY

TPAD30TP77
TPAD30TP77
PEG_TXN15
PEG_TXP15

MXM

C389
SCD1U25V3KX-GP

DY

16,19,27,30,33,38,39,40

NV_3D3V_S0

35,38,39 CPUCORE_ON

13

7 PEG_RXN[15..0]

MXM1
AMP-CONN230A-GP-U2

20.F0623.230
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
207
209
211
213
215
217
219
221
223
225
227
229

3
5
7
9
11
13
15
17
19
21
23

MXM

PEG_RXN0
PEG_RXP0

PEG_RXN1
PEG_RXP1

PEG_RXN2
PEG_RXP2

PEG_RXN3
PEG_RXP3

PEG_RXN4
PEG_RXP4

PEG_RXN5
PEG_RXP5

PEG_RXN6
PEG_RXP6

PEG_RXN7
PEG_RXP7

PEG_RXN8
PEG_RXP8

PEG_RXN9
PEG_RXP9

PEG_RXN10
PEG_RXP10

PEG_RXN11
PEG_RXP11

PEG_RXN12
PEG_RXP12

PEG_RXN13
PEG_RXP13

PEG_RXN14
PEG_RXP14

DCBATOUT

PEG_RXN15
PEG_RXP15

DY

SC4D7U25V6KX-1GP

EMI REQUEST
C502

MXM_TMDS_TX0+ 43
MXM_TMDS_TX0- 43
MXM_TMDS_TX1+ 43
MXM_TMDS_TX1- 43

3 CLK_PCIE_PEG#
3 CLK_PCIE_PEG

MXM_TMDS_TX2+ 43
MXM_TMDS_TX2- 43
MXM_TMDS_TXC+ 43
MXM_TMDS_TXC- 43

PLT_RST1#_MXM
1 0R2J-2-GP
R115 2MXM
1
19,30 SMBD_G792
0R2J-2-GP
R113 2 MXM
1
19,30 SMBC_G792
SC100P50V2JN-3GP
0R2J-2-GP

MXM

NV_DVI_HPD

C436

2 R318

7,16,20,30 PLT_RST1#
B

DY
33

14
14
14
14

TMDS_B_TX0+
TMDS_B_TX0TMDS_B_TX1+
TMDS_B_TX1TMDS_B_TX2+
TMDS_B_TX2-

MXM_THER
NV_HSYNC
NV_VSYNC

NV_DDCCLK
NV_DDCDAT

G72_27MHZ
G72_27MHZSS

DVI_B_HPD
TMDS_B_TXC+
TMDS_B_TXC-

ENG

43
TP9
TP10
TP11
TP12
TP14
TP15
TP17
TP16

TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30

TP21 TPAD30
TP20 TPAD30
TP22 TPAD30

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3

Graphic MXM CONN

Document Number

Rev

SD

HURON

Date: Tuesday, March 13, 2007

Sheet
1

26

of

44

NEWCARD Connector

Mini Card Connector

NEW1

TPAD30

TP6

MINI_WAKE#

16
16

PCIE_RXN2
PCIE_RXP2

E51_RxD
E51_TxD

16
16

3D3V_S0
R71

1 R77
25V_AUX_S5_MINI_1
0R0603-PAD

1D5V_NEW_S0

2
2

1 0R2J-2-GP
1

SMB_CLK 16,18
SMB_DATA 16,18

DY R246 0R2J-2-GP

USBPN4
USBPP4
LED_WWAN#

TP7

16
16

TPAD30

WLAN_LED#_MC 13

LED_WPAN#

TP8

TPAD30

1D5V_S0
1D5V_NEW_S0
1D5V_S0

11
12
13
14
15

3D3V_NEW_LAN_S5

1D5V_S0

3D3V_S0

5
4
3
2
1

DY

1
C61

C95

C69

C395

C103

C392

1
C401

DY

C375

DY

PM_SLP_S4# 16,30,38,40

C77

16
17
18
19
20
21

NC#16
AUXIN
RCLKEN
OC#
SHDN#
GND

NEW

3D3V_S0

1_5VOUT
1_5VIN
NC#13
NC#14
AUXOUT

3D3V_S5

DY

Place near MINIC1

3D3V_NEW_S0
3D3V_S0

SMB_CLK_MINI
SMB_DATA_MINI

ENG

2
C608 SC4D7P50V2CN-1GP

SC10U6D3V5MX-3GP

DY R245

SCD1U16V2ZY-2GP

3D3V_S0

0R2J-2-GP

WIRELESS_EN 30
PCIRST1# 16,22,24

SCD1U16V2ZY-2GP

ENG

DY R491

R241
1
DY 2
10KR2J-3-GP

SC1U16V3ZY-GP

CPPE#
CPUSB#
PERST#
GND
SYSRST#

W83L351YG-GP
C525
SC4D7P50V2CN-1GP

R492
0R2J-2-GP

SC10U6D3V5MX-3GP

R379
1
2
0R2J-2-GP

16,22,24 PCIRST1#

62.10043.331

SCD1U16V2ZY-2GP

NEW_PCIRST1#

10
9
8
7
6

ENG

NEW

SC1U16V3ZY-GP

CPPE#
CPUTSB#
TPS2231_PERST#

3D3V_S5

MINIPCI52P-1-GP-U2

SC10U6D3V5MX-3GP

2100KR2J-1-GP
2100KR2J-1-GP

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

ENG

SC10U6D3V5MX-3GP

DY
DY

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
NP2
54

62.10081.011

NC#5
NC#4
3_3VOUT
3_3VIN
STBY#

3D3V_S5
2

R3861
R3851

15V_AUX_S5_MINI
0R2J-2-GP

DY

5V_S5

FCI-CON26-4-GP-U

U46

PCIE_TXN2
PCIE_TXP2

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

4
6
8
10
12
14
16

3 CLK_PCIE_MINI1#
3 CLK_PCIE_MINI1

30
30

3
5
7
9
11
13
15

EC60

DY

NP2
26
25
16 PCIE_TXP3
24
16 PCIE_TXN3
23
22
16 PCIE_RXP3
21
16 PCIE_RXN3
20
19
3 CLK_PCIE_NEW
3D3V_NEW_S0
18
3 CLK_PCIE_NEW#
CPPE#
17
TP55
NEWCARD_TEST
16
15
14
3D3V_NEW_LAN_S5
TPS2231_PERST#
13
12
PCIE_WAKE#_R
1DY
2
11
16,22 PCIE_WAKE#
R178 0R2J-2-GP
10
1D5V_NEW_S0
RN38
9
DY
EC59
SMB_DATA_NEW 8
1
4
DY
16,18 SMB_DATA
SMB_CLK_NEW
2
3
7
16,18 SMB_CLK
SRN33J-5-GP-U
CONN_TP1 6
TP46
CONN_TP2 5
TP45
CPUTSB#
4
3
16 USBPP7
2
16 USBPN7
1
NP1

3D3V_S0
1D5V_S0

53
NP1
1

21.H0129.001

3D3V_S0

MINI1

CARDBUS2P-3-GP

Reserve the symbol


for bottom side
connector

NEW

SK1

PM_SLP_S3# 16,19,26,30,33,38,39,40
3D3V_S0
3D3V_NEW_S0

3D3V_NEW_S0

1D5V_NEW_S0

3D3V_NEW_LAN_S5

1
2

1
2

1
2

NEW

NEW

C312
SCD1U16V2ZY-2GP

Place them Near to Chip

C531
SC1U16V3ZY-GP

NEW

NEW

C313
SCD1U16V2ZY-2GP

NEW

C314
SC1U16V3ZY-GP

SCD1U16V2ZY-2GP

C522

<Core Design>
1

Wistron Corporation

C524
SCD1U16V2ZY-2GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

NEW
Title

MINI CARD / NEW CARD

Place them Near to Connector


Size

Document Number

Rev

Date: Wednesday, March 14, 2007


A

SD

HURON

Sheet
E

27

of

44

5VA_S0

3D3V_S0

"VAUX" Pull high to enable standby mode

16

ACZ_SPKR

1
SCD47U16V3ZY-3GP

C582
2

1
2

R473
10KR2J-3-GP

DY

SPKR_SB_1

C592
SC100P50V2JN-3GP

C345
SC10U10V5ZY-1GP C326
C331
SCD1U10V2KX-4GP
SC10U10V5ZY-1GP

C342

1
2

2AUDIP_PC_BEEP

SC1U10V3KX-3GP

SRN47KJ-1-GP

C581
1
SCD47U16V3ZY-3GP

KBC_BEEP

C593
1

AUDIO_BEEP

DY C586
1

SCD1U10V2KX-4GP

2
4

SC22P50V2JN-4GP
R4641
2
0R2J-2-GP
R4581
2
C573
0R2J-2-GP
2
DY 1

RESET#

30

5
6
7
8

4
3
KBC_BEEP_1 2
1

RN79

BCLK

ACZ_RST# 15,25
ACZ_SYNC 15,25
ACZ_BITCLK 15

SC22P50V2JN-4GP

ALC268_SENSE

2
R480
5K1R2F-2-GP

LINEOUT_JD# 29

1 R478
2
10KR2F-2-GP

LINEIN_JD#

MIC_JD# 29

29

29
31

SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
SC1U16V3ZY-GP
SC1U16V3ZY-GP

29 AUD_MICIN_L
29 AUD_MICIN_R
29 INT_MIC1_CN
29 INT_MIC2_CN

2 C587 MIC1-L_PORT-B 21
2 C590 MIC1-R_PORT-B 22
2C574 MIC2-L_PORT-F 16
2C580 MIC2-R_PORT-F 17

1
1
1
1

34
13
SENSE_B
SENSE_A

44
43

LINE1-L_PORT-C
LINE1-R_PORT-C
NC#14
NC#15

SDATA-OUT
SDATA-IN

45
46

HP-OUT-L_PORT-A
HP-OUT-R_PORT-A

39
41

SOUNDL 29
SOUNDR 29

LINE-OUT-L_PORT-D
LINE-OUT-R_PORT-D

35
36

FRONTL 29
FRONTR 29

2ND = 83.00056.G11

R181

2 3D3V_S0

DY10KR2J-3-GP

18
20
19

CD-L
CD-R
CD-G

DMIC-12/GPIO0
DMIC-34/GPIO3
2
3

VREF

JDREF
MONO-OUT
40
37

27

SPDIF_ON
ALC_GPIO0

JDREF

DY

MONO-OUT

TP65
R186
TPAD30
20KR2F-L-GP

C341
SCD47U16V3ZY-3GP

R457
10KR2J-3-GP

DY

C595
SC10U10V5ZY-1GP

SPDIF_ON 29

D16
BAW56-7-F-GP

R180
0R2J-2-GP

71.00268.00G

VREF

DY

29

29 G1410_SHDN#

AVSS1
AVSS2
DVSS
DVSS

ALC268-GR-GP

SPDIF

AMP_SHUTDOWN# 29,30

DY

MIC1-VREFO-R
MIC1-VREFO-L
MIC2-VREFO

C605
SC4D7U10V5ZY-3GP

C594
SC4D7U10V5ZY-3GP

83.00056.E11

SC4D7U10V5ZY-3GP

BAW56PT-U

C604

3
1

SRN2K2J-2-GP

ENG

32
28
30

SPDIF
ALC_EAPD

NC#45
DMIC-CLK

ALC268

26
42
4
7

MIC1V_R
MIC1V_L
MIC2-VREFO

D35

8
7
6
5

ACZ_SDATAOUT 15,25
ACZ_SDATAIN0 15

2
39R2J-L-GP

SPDIFO
EAPD

RN78

1
2
3
4

AC97_DATIN 1
R463

48
47

LINE1-VREFO
GPIO1
MIC1-L_PORT-B
MIC1-R_PORT-B
MIC2-L_PORT-F
MIC2-R_PORT-F

5
8

23
24
14
15

ALC861_LINE_IN_L
ALC861_LINE_IN_R

2C603
2C602

1
1

2
R479
20KR2F-L-GP

SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP

LINE_IN_L
LINE_IN_R

SC22P50V2JN-4GP

29
29

NC#44
NC#43

DVDD
DVDD-IO
AVDD1
AVDD2

U26

PCBEEP
RESET#
SYNC
BCLK
NC#33

1
9
25
38

12
11
10
6
33

DY C588

5VA_S0

SHDN#
GND
IN

SET

OUT

C579

R460
28K7R2F-GP
SC22P50V2JN-4GP
5VA_SET

1
2

C569
SC1U10V3ZY-6GP

74.00913.A3F

C584
SC1U10V3KX-3GP

C565
R469
10KR2F-2-GP
SC2D2U6D3V3MX-1-GP

G913CF-GP

1
2
3

U56

5V_S0

<Core Design>
1

2nd:74.09198.A7F
(RT9198-4GPBG)

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

AZALIA CODEC - ALC268


Document Number

Date: Wednesday, March 14, 2007


A

Rev

HURON
Sheet
E

SD
28

of

44

3D3V_S0
5V_S0
G47

1
GAP-CLOSE-PWR

R19
L_LINE_IN_1

L_LINE_IN

28

FRONTR

SC1U10V3ZY-6GP

SOUND_L1

SC1U10V3ZY-6GP

SOUND_R1

SOUNDL

FRONTL

C332

15KR2J-1-GP

SCD22U10V3KX-GP

R190
20KR2F-L-GP
2 HP_L
HP_R

20KR2F-L-GP
R188

R17
0R2J-2-GP

SPKR_R+1

2
R187
10KR2J-3-GP

C333
SC47P50V2JN-3GP

SPKR_L+1

DY

10KR2J-3-GP
1 R191
2

C335

DY
2

5VA_OP_S0

1410_VSS

2
28

28

C329
SC22P50V2JN-4GP

1
C336
C19

C325
SC1U16V3ZY-GP

SC47P50V2JN-3GP
C337

SC2D2U10V3KX-1GP

C14
SC4D7U10V5ZY-3GP

C328

GAP-CLOSE-PWR

KBC_MUTE_GPIO8

3D3V_S0_AU

G42

AUDIO OP AMPLIFIER

5VA_OP_S0

C1P

SC2D2U10V3KX-1GP

ROUT+
ROUTLOUT+
LOUT-

18
14
4
8

GND
GND
GND
GND
GND

1
11
13
20
21

BYPASS

1
C17

AMP_SHUTDOWN# 28,30

2
SC1U16V3ZY-GP

C324
1
2

GAIN0
GAIN1

12

NC#12

3D3V_S0_AU
3D3V_S0_AU

PGND
NC#14
PVDD
SHDNL#
GND

INR
OUTR
SVSS
OUTL

SPKR_L+1

G1412R41U-GP

HP_L
3D3V_S0_AU

28 G1410_SHDN#

HP_R
SPKR_R+1

74.01412.0E3

C338

R185
10KR2J-3-GP

2
2

R16
0R2J-2-GP

SB:U30 trace modify

R18
0R2J-2-GP

8
7
6
5

0R2J-2-GP

GAIN0

R15
0R2J-2-GP

15KR2J-1-GP

R14
10KR2J-3-GP

DY

SCD22U10V3KX-GP

R_LINE_IN

G1410_SHDN#

1 R184

28,30 AMP_SHUTDOWN#

U25

SC2D2U10V3KX-1GP

R13
10KR2J-3-GP

DY

R20

2R_LINE_IN_1

6
5
4

C1+
SHDN#
GND

74.05930.07P

GAIN1

C20

OUT
IN
C1-

G5930TBU-GP

74.01431.A1G

SOUNDR

1
2
3

5VA_OP_S0

G1431F2U-GP

28

13
14
15
16
17

1
2
3
4

2
3

C1N

GAIN0
GAIN1

U24
1410_VSS

C16

LINLIN+
RINRIN+

SPKR_R+
SPKR_RSPKR_L+
SPKR_L-

2
SC1U16V3ZY-GP

5
9
17
7

2
SC1U16V3ZY-GP

L_LINE_IN
LIN+
R_LINE_IN
RIN+

1
C18

SC1U16V3ZY-GP

SC4D7U10V5ZY-3GP

C13

SC4D7U10V5ZY-3GP
C15

11410_VSS

19
10

SHUTDOWN#
BYPASS

NC#12
NC#11
NVDD
NC#9

VDD
PVDD
PVDD

SHDNR#
SGND
SVDD
INL

16
6
15

12
11
10
9

U3

DY
3

R,L 2W Speaker

DY

22.10133.C81

DY

ENG

SUBWOOFER CONN.

DY

SHUTDOWN#
BYPASS
IN+
INGND

C330
SC4D7U6D3V3MX-2GP

1
2
3
4

2
SOUND_WOF
5V_S0

2
VO2
GND
VDD
VO1

C575
SCD015U25V2KX-GP

WOOFER+

8
7
6
5

U55

SC3300P50V2KX-1GP 6

R456DY
1

SOUND_WOF_INSOUND_WOF_IN+

WOOFER-

DY

G1442RD1U-GP

4
3

10KR2F-2-GP
WOOFERWOOFER+

DY

TVL2462_1N-

2D5V_S0

C596
SC1U10V2KX-1GP

1
2
3
4

8
5

VDD
ININ+
VOVO+

SHUTDOWN

AMP_SHUTDOWN#

BYPASS

SOUND_WOF_IN+

GND
GND

7
9

DY

APA3010XAI-TRLGP
C591
SC2D2U10V3KX-1GP

5V_S0

8
7
6
5

SOUND_WOF_1 1
TVL2462_2N+DY
R472
1 DY
2
1KR2J-1-GP

DY

TLV2462CDGK-GP

DY

C585
SC1U10V2KX-1GP

C576
SCD1U10V2KX-4GP

1OUT DY VDD+
1IN2OUT
1IN+
2INGND
2IN+

C577
SCD1U16V2KX-3GP

2SOUND_WOF

SOUND_WOF 1

ENG

U58

1DY

C339 SC3300P50V2KX-1GP

5V_S0

DY

R475
100KR2F-L1-GP
C597
SCD047U10V2KX-2GP

SC4D7U6D3V3MX-2GP U27

R189
1
2 G1442_IN+
18KR2F-GP SOUND_WOF

DY
1

AMP_SHUTDOWN#
C344
1

C570
SC10U6D3V5MX-3GP

<Core Design>

C589
SC1D5U25V5KX-5GP

100R2J-2-GP

DY

5V_S0
C564

DY

TVL2462_1O
R485
100KR2F-L1-GP

TVL2462_R1

DY

G1442_IN+

R482
100KR2F-L1-GP
C600
SCD047U10V2KX-2GP

R452
30KR2F-GP

C334 SC3300P50V2KX-1GP

R476
SOUNDR

WOOFER+
WOOFER-

EC92

1
2

DY

2 R466
1
0R0402-PAD

SC680P50V2KX-2GP

100R2J-2-GP

DY

SUBWOOFER AMP.

WOOFER-_1

SC680P50V2KX-2GP

TVL2462_L1

22.10205.251

WOOFER+_1

ETY-CON2-5-GP-U EC91

18KR2F-GP

TVL2462_1N-_1

DY

PHONE-JK237-GP-U4

R483

SPKR_LSPKR_L+
SPKR_RSPKR_R+

TP97
TP98
TP99
TP100

LINE OUT

WOOFER+

0R0402-PAD
2 R455
1

20.D0196.102

SOUNDL

C343

SCD47U10V3KX-3GP 18KR2F-GP
R484
2 LINE_W_L 1
2
SCD47U10V3KX-3GP

TPAD28
TPAD28
TPAD28
TPAD28

SOUND_WOF

C601
1

LINE_W_R

ENG

GND
VCC
VIN

WOOFER+_1
WOOFER-_1

TPAD28 TP101
TPAD28 TP102

20.F0714.004

SPKR2

SOUNDL

R477
1

SOUNDR

C598
1

2
1

EC64
SC1KP50V2KX-1GP

EC63
SC1KP50V2KX-1GP

DY

ACES-CON4-GP

2
2

C340
SRN1KJ-7-GP
RN40

PHONE-JK273-GP-U

3
4

AUD_MIC_L

2 1KR2F-3-GP

1
1

1 R194
10KR2J-3-GP R193
10KR2J-3-GP R196

28 AUD_MICIN_L

LINEOUT_JD#
SPKR_L_A1
SPKR_R_A1

2 22R2J-2-GP
2 22R2J-2-GP

EC3

CDS2C16GTH-GP

AUD_MIC_R

R192 1
R201 1

SC680P50V2KX-2GP

2 1KR2F-3-GP

SPKR_L+1
SPKR_R+1

SC680P50V2KX-2GP

1 R195

SPDIF
28

NP2
NP1
5
4
3
6
2
1

EC4

CDS2C16GTH-GP

MIC_JD#

28 AUD_MICIN_R

DYDY

28

MICIN1
28

LOUT1

9
8
7
16
6
5
4
2
3
1
NP1
NP2

EC5

CDS2C16GTH-GP

MIC IN

5
EC6

Tahoe

C327
1
2

ENG

ENG

SC680P50V2KX-2GP

SPKR_R+

R459
0R2J-2-GP

DY

4
3
2

20.F0714.004

AAT4250IGV-T1-GP

74.04250.A3F
2

SPKR_LSPKR_L+
SPKR_R-

INTMIC1

SPKR1

6
EC98

CDS2C16GTH-GP

ENG

EC1

SCD1U16V2ZY-2GP

C578

5V_S0

3
2
1

ON/OFF# NC#3
GND
IN
OUT

DY

4
3
2

22.10133.C91

1
1
2
2

EC66
SC1KP50V2KX-1GP

EC2

SCD1U16V2ZY-2GP

10KR2J-3-GP

PHONE-JK274-GP-U

EC65

DYDY R200 SC1KP50V2KX-1GP


DY

INT_MIC2_CN

SCD1U16V2ZY-2GP

R197
10KR2J-3-GP

INT_MIC1_CN

28

Internal Speaker

U57
28
SPDIF_ON

5V_SPDIF_S0

LINE_IN_L

LINEIN_JD#

AUD_LINE_L

28

28

AUD_LINE_R

INT_MIC1_CN
INT_MIC2_CN

SCD1U16V2ZY-2GP

28

1
2
1KR2F-3-GP
1 R198
2
1KR2F-3-GP

LINE_IN_R

NP2
NP1
5
4
3
6
2
1

TP96
TP95

LIN1

R199
28

ENG

ACES-CON4-GP
TPAD28
TPAD28

Internal Microphone

LINE IN

DY

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

TVL2462_1O

R481
1KR2J-1-GP

Title

AUDIO AMP AND JACK


Size

Document Number

Rev

Date: Thursday, March 15, 2007


A

SD

HURON

2D5V_S0
C

Sheet
E

29

of

44

3D3V_S0

3D3V_AUX_S5

3D3V_AUX_S5

1
2

1
2

1
2

1
2

Small KB (Biwa)

AD_IA

AD_IA
41
MAIL#
31
INTERNET# 31

MAIL#
INTERNET#
DVR_1
DVR_0
KBC_MATRIX0#

R38
10KR2J-3-GP

101
105
106
107

GPIO01
GPIO03
GPIO06/HGPIO06
GPIO07/HGPIO07
GPIO23
LDRQ#/GPIO24/HGPIO01
GPIO30
GPIO31
GPIO32
GPIO33
GPIO40
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO45
GPIO46/TRST#
GPIO47/JEN0#
GPIO50/TDO
GPIO51
GPIO52/RDY#
GPIO53
IRRX2_IRSL0/GPIO70
IRTX/GPIO71
IRRX1/GPIO72
GPIO82/HGPIO00/TRIS#

64
95
93
94
119
6
109
120
65
66
16
17
20
21
22
23
24
25
26
27
28
73
74
75
110

27
27
13

R405
10KR2J-3-GP
1

5V_AUX_S5

TP66
TP67

E51_TxD 111
E51_RxD 113
112

E51_TxD
E51_RxD
CCD_ON

DC_BATFULL
KBC_CIR

13 DC_BATFULL
31,33,37 S5_ENABLE

114
14
15

VCORF

CIRTX/GPIO16/HGPIO04
GPIO34/CIRRX2
GPIO36

SER/IR

GND
GND
GND
GND
GND
GND
5
18
45
78
89
116

AGND

DY

79
30

32KX2
CLKOUT/GPIO55

TPAD28

TP58

42

BAT_IN#

EC94
1DY
32

TPAD28

2
R395

GMCH_BL_ON

13
12
11
10
71
72

TB1/GPIO14/HGPIO04
TA2/GPIO20
TA1/GPIO56
A_PWM0
A_PWM1/GPIO21
B_PWM0/GPIO13

PSDAT3/GPIO12
PSCLK3/GPIO25
PSDAT2/GPIO27
PSCLK2/GPIO26
PSDAT1
PSCLK1

KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL18

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

54
55
56
57
58
59
60
61

KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8

VCC_POR#

85

ECRST#

KBC

PS/2

1 R394
2
150R2J-L1-GP-U
32
SPICLK

SPIDO

63
117
31
32
118
62

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

SCD1U16V2KX-3GP
32

SPIDI

86
87
90
SPICLK_1 92

SPIDO_1

SPICS#
R402 1
EC96

CHG_ON#

31 Media_DATA
31 Media_CLK
31 TPDATA
31 TPCLK

32

TP56

KBC_CIR_1
CHG_3S_4S#

KBSOUT0/JENK#
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KBSOUT4
KBSOUT5/TDO
KBSOUT6/RDY#
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
KBSOUT16/GPIO60
KBSOUT17/GPIO57/HGPIO03

F_SDI
F_SDO
F_CS0#
F_SCK

FIU

150R2J-L1-GP-U

WPC8768LDG-GP

71.08768.00G
RN77
3D3V_AUX_S5

UMA

NV_BLON
1
0R2J-2-GP

3D3V_S0

5
6
7
8

4
3
2
1

ECRST#
KA20GATE
KBRCIN#

SRN10KJ-6-GP

WPC8768LDG-GP

19

71.08768.00G

Q4
B

RSMRST#

MMBT3906-3-GP

ECSCI#_1

R377
10KR2J-3-GP

D33
BAS16-1-GP

R378
10KR2J-3-GP

KBC_MATRIX0#

5
100R2F-L1-GP-U
VR-10M-GP-U

17.10131.106

10KR2J-3-GP

DVR_1
DVR_0

<Core Design>
SC100P50V2JN-3GP
C572

100R2F-L1-GP-U
R462
1
2
1 R461
2

C571
SC100P50V2JN-3GP

1
NP1
DVR_1_C
2
DVR_0_C
3

NP2

10KR2J-3-GP

VR1
4

10KR2J-3-GP

2N7002DW-1-GP

3D3V_S0

R410

R467

R468

3D3V_S0

ECSWI#

3
2

SMBC_G792 19,26
SMBD_G792 19,26

ECSWI#_1

16

1394_DETECT

NO_1394

D34
BAS16-1-GP

THER_SCL
THER_SDA

2
3

DY
10KR2J-3-GP

1394

3ECSCI#_KBC

Q16
4

R421

16

3D3V_S0

SRN10KJ-6-GP

3D3V_AUX_S5

4
3
2
1

5
6
7
8

3D3V_S0

RN76
BLUETOOTH_EN
S5_ENABLE

C317
SC1U10V3KX-3GP

103

DY

32KX1/32KCLKIN

CHG_I_PWM

R380

10KR2J-3-GP

KBC_BEEP
TPAD28
TP60

USB_PWR_EN# 21
R396

KBC_XI 77

13 BRIGHTNESS

BT_LED
13
WIRELESS_BTN# 31
BLON_OUT 13
NV_BLON 26

1394_DETECT
IRTX
IRRX1

10KR2J-3-GP

VCORF

C521
SCD1U16V2ZY-2GP

CHG_VCTL0

R415
10KR2J-3-GP

44

SOUT_CR/GPIO83/BADDR1
SIN_CR/CIRRX/GPIO87
GPIO84/HGPIO01/BADDR0

GPIO

TP83

FOR KBC DEBUG

SPI

10MR2J-L-GP

TP62
TP78

SPI_DI/GPIO77
SPI_DO/GPIO76/SHBM
SPI_SCK/GPIO75
GPIO81

1 R384

1 10KR2J-3-GP

DY
U47B 2 OF 2

82.30001.691
1 R390

84
83
82
91

NUM_LED#
CAP_LED#

31
E-BUTTON#
21 BLUETOOTH_EN
Tahoe
27 WIRELESS_EN
5V_AUX_S528,29 AMP_SHUTDOWN#

SP

TPAD28
TPAD28

2 R373

1
X-32D768KHZ-38GPU

TPAD28

28

SWD/GPIO66

E51_TxD

LOW_PWR

PM_SLP_S3# 16,19,26,27,33,38,39,40
KBC_PWRBTN# 31
AC_IN#
41
LID_CLOSE# 31
PM_PWRBTN# 16,31
LDRQ0# 15
NUM_LED# 31
CAP_LED# 31
PWR_G_LED 13
Tahoe
PWR_O_LED 13
RSMRST#_KBC 16
AD_OFF 42
L-line_LED 31
CHARGE_LED 13
BT_BTN# 31
WLAN_TEST_LED 13
TP57 TPAD28

KBC_PWRBTN#

KBC_XO_1
R391

KBC_XO
22

ENERGY_DET 22
CRT_DEC# 14

81

SMB

SDA2
SCL2
SDA1
SCL1

2
X5

10MR2J-L-GP

THRMTRIP#_KBC 33
ENERGY_DET

C527
3

SC4D7P50V2CN-1GP

DA0/GPI94
DA1/GPI95
DA2/GPI96
DA3/GPI97

D/A

68
67
69
70

33KR2J-3-GP
2
1

97
98
99
100
108
96

LPC

AD0/GPI90
AD1/GPI91
AD2/GPI92
AD3/GPI93
AD4/GPIO05
AD5/GPIO04

3D3V_AUX_S5
1

A/D

104

C528

VREF

U47A

VCC
VCC
VCC
VCC
VCC

102

19
46
76
88
115

4
VDD

AVCC

80

KCOL[1..18] 31
KROW[1..8] 31

Ver.SB
THER_SDA
THER_SCL
41,42 BAT_SDA
41,42 BAT_SCL

16,27,38,40 PM_SLP_S4#

TPAD28
TPAD28

Big KB(17")

TP59

LPCPD#/GPIO10/HGPIO00
LRESET#
LCLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
SERIRQ
CLKRUN#/GPIO11/HGPIO02
KBRST#
GA20
ECSCI#
SMI#
PWUREQ#

1 OF 2

KBRCIN#
KA20GATE
ECSCI#_KBC
CHG_VCTL1
ECSWI#

124
7
2
3
126
127
128
1
125
8
122
121
29
9
123

3D3V_AUX_S5

R444
0R0603-PAD
1
2

VBAT
TPAD28

BATTERY----->

R430 2

1
2

1
2

1
2

2PCLK_KBC_RC

15 LPC_LFRAME#
15 LPC_LAD0
15 LPC_LAD1
15 LPC_LAD2
15 LPC_LAD3
16 INT_SERIRQ
16,24 PM_CLKRUN#
15
KBRCIN#
15
KA20GATE

THERMAL----->

E51_TxD

DY
10KR2J-3-GP 1

1
2

8
7
6
5
1
2
3
4

2
R431 2

A_BTN#

E51_RxD

DY
10KR2J-3-GP 1

SC15P50V2JN-2-GP

DY
R416 2

C535,C536 colse to Pin102

SC15P50V2JN-2-GP

R427
0R2J-2-GP

DY

10KR2J-3-GP 1

C520

SCD1U16V2ZY-2GP

C541

C323

PCLK_KBC

C318

SCD1U16V2ZY-2GP

31

SC4D7P50V2CN-1GP
C555

C321

SCD1U16V2ZY-2GP

33R2F-3-GP
C547
SC39P50V2JN-1GP

3D3V_S0

C315

VBAT

2PLT_RST1#_1

SCD1U16V2ZY-2GP

SC1U16V3ZY-GP

R413

C548

3D3V_S0

ENG

7,16,20,26 PLT_RST1#

C542

DY

SCD1U16V2ZY-2GP

C533,C534 colse to Pin VDD

THER_SCL
THER_SDA

C559

DY

SC10U10V5ZY-1GP

C322

SCD1U16V2ZY-2GP

BAT_SCL
BAT_SDA

C558

SC10U10V5ZY-1GP

RN73

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

SRN4K7J-10-GP

VBAT

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

KBC WPC8768L

Size
Document Number
Custom

Rev

SD

HURON

Date: Wednesday, March 14, 2007


A

Sheet

30

of

44

3D3V_S0

DY

2
SC1U16V3ZY-GP

5V_S5

1
2

3
4
3D3V_S0

MEDIA1

GND 2

IN

30 L-line_LED

R1
CHDTC143ZUPT-GP

84.00143.B1K

INTERNET#

30

MAIL#

BT_LED#
WLAN_LED#
INTERNET#
WIRELESS_BTN#
BT_BTN#
MAIL#

VCC

GND

COVER_SW#

100R2F-L1-GP-U

MRS22L-GP

LID_CLOSE# 30
C3
SCD22U16V3KX-2-GP

Tahoe

TP_SCROLL_UP
1 SCRL1
2

20.K0174.012

SCROLL KEY

3
4
SW-TACT-45-U1-GP

62.40009.341
3D3V_S0

1 LEFT1

RN39

2
1

30 BT_BTN#
30 WIRELESS_BTN#

ACES-CON8-6-GP

20.K0238.008

74.00022.0BB

Media_DATA 30
Media_CLK 30

10

3D3V_AUX_S5

OUT

ACES-CON12-GP

2
3
4
5
6
7
8

3 OUT L-line_LED#

BT_LED#
WLAN_LED#

2
1

Q23

R2

2
2
3
4
5
6
7
8
9
10
11
12
14

SRN10KJ-5-GP

C84
1
2
SC1U16V3ZY-GP

RN7

R2

13
1

30

SC1U16V3ZY-GP

20.K0174.012

13
13

3D3V_S0

ENG

C76
ACES-CON12-GP

3D3V_AUX_S5

LAUNCHCN1

C385
1

5V_S0

2
SC1U16V3ZY-GP

5V_S0

Cover Up Switch
C384
SC1U16V3ZY-GP

LID1

RN75
C83

1
13

SCD1U16V2ZY-2GP
EC17

SRN10KJ-6-GP
8
7
6
5

CAP_LED# 30
NUM_LED# 30

1
2
3
4

MEDIA_LED#
CAP_LED#
NUM_LED#
KBC_PWRBTN#_CN
L-line_LED#

E-BUTTON#
INTERNET#
MAIL#

PWRLED#_DB 13
STDBY_LED#_DB 13

14
12
11
10
9
8
7
6
5
4
3
2

3D3V_S0

PWRCN1

TP_LEFT
2

3
4

SRN10KJ-5-GP

TP_SCROLL_LEFT
1 SCRL3
2

TP_SCROLL_RIGHT
1 SCRL2
2

TP_RIGHT
1 RIGHT1
2

3
4
SW-TACT-45-U1-GP

3
4
SW-TACT-45-U1-GP

3
4
SW-TACT-45-U1-GP

3
4
SW-TACT-45-U1-GP

3D3V_AUX_S5
R425
10KR2J-3-GP

62.40009.341

KBC_PWRBTN# 30

A_BTN#_CN

30

470R2J-2-GP
G94
GAP-OPEN

62.40009.341

ACES-CON2-GP-U

20.F0714.002

C543
SCD1U16V2ZY-2GP

BAW56PT-U

83.00056.E11

EMI Bypass cap.


27

28

ETY-CON26-2-GP

TPAD28
TPAD28
TPAD28
TPAD28

TP119
TP118
TP121
TP123

KCOL16
KCOL15
KCOL14
KCOL13

EC37
EC36
EC48
EC35

TPAD28
TPAD28
TPAD28
TPAD28

TP124
TP126
TP125
TP127

KCOL8
KCOL7
KCOL6
KCOL5

EC30
EC29
EC28
EC27

1
KROW8

KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7

26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2

KB1

2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP

1
1
1
1

2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP

TP136

KCOL17 EC38 1

2SC220P50V2JN-3GP

KCOL18 EC39 1

2SC220P50V2JN-3GP

Internal KeyBoard CONN


25

TPAD28
TPAD28
TPAD28
TPAD28
TPAD28

TP108
TP159
TP110
TP109
TP111

MEDIA_LED#
PWRLED#_DB
STDBY_LED#_DB
A_BTN#_CN
E-BUTTON#

SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP

1DY
1DY
1DY
1DY
1DY

2
2
2
2
2

EC18
EC77
EC76
EC8
EC7

TPAD28
TPAD28
TPAD28
TPAD28

TP113
TP112
TP115
TP114

L-line_LED#
KBC_PWRBTN#_CN
NUM_LED#
CAP_LED#

SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP

1DY
1DY
1DY
1DY

2
2
2
2

EC81
EC78
EC79
EC80

TPAD28
TPAD28
TPAD28
TPAD28

TP116
TP117
TP120
TP122

Media_DATA
Media_CLK
WIRELESS_BTN#
BT_BTN#

SC100P50V2JN-3GP
SC100P50V2JN-3GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP

1DY
1DY
1DY
1DY

2
2
2
2

EC100
EC99
EC93
EC95

ENG

TP_LEFT

TP128
TP132
TP131
TP133

KCOL4
KCOL3
KCOL2
KCOL1

EC26
EC25
EC24
EC23

1
1
1
1

2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP

RN37
SRN10KJ-5-GP

1
2

30 TPCLK
30 TPDATA

TPAD28
TPAD28
TPAD28
TPAD28

TP135
TP130
TP129
TP137

KROW8
KROW7
KROW6
KROW5

EC47
EC46
EC45
EC44

1
1
1
1

2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP

TPAD28
TPAD28
TPAD28
TPAD28

TP138
TP140
TP139
TP141

KROW4
KROW3
KROW2
KROW1

EC43
EC42
EC41
EC40

1
1
1
1

2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP

TPAD28
TPAD28
TPAD28
TPAD28

TP142
TP146
TP151
TP150

KCOL12
KCOL11
KCOL10
KCOL9

EC34
EC33
EC32
EC31

1
1
1
1

2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP

CHECK KB SPEC. AND PIN DEFINE

TP_SCROLL_DOWN
TP_SCROLL_LEFT
TP_SCROLL_UP
TP_SCROLL_RIGHT
TP_RIGHT

2
3
4
5
6
7
8
9
10
11
12
14

TP_CLK
TP_DATA

4
3
5V_S0
EC50 DY
SCD1U16V2ZY-2GP

Check test point

13
1

RN36

C224
SC1U16V3ZY-GP

3D3V_S5

TP64 TPAD30

5V_S5

TP82 TPAD30
TP61 TPAD30

16,30 PM_PWRBTN#

TP24 TPAD30

4,15,33 H_PWRGD

TP63 TPAD30

30,33,37 S5_ENABLE

TP13 TPAD30

4,6 H_CPURST#
ACES-CON12-GP

Test PointDimm Door


<Core Design>

KROW[1..8]
KCOL[1..18]

KROW[1..8]

30

KCOL[1..18]

30

TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28

TP143
TP147
TP144
TP145
TP149
TP148
TP153
TP152

TP_DATA
TP_CLK
TP_RIGHT
TP_SCROLL_RIGHT
TP_SCROLL_UP
TP_SCROLL_LEFT
TP_SCROLL_DOWN
TP_LEFT

EC51
EC52
EC56
EC53
EC57
EC54
EC55
EC58

1DY
1DY
1DY
1DY
1DY
1DY
1DY
1DY

2 SC47P50V2JN-3GP
2 SC47P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

BUTTONs / KB / TOUCHPAD

Document Number

Rev

SD

HURON

Date: Wednesday, March 14, 2007


A

TP79 TPAD30

3D3V_AUX_S5

20.K0174.012

1
........

EC86
EC85
EC82
EC83

TPAD28

TP134

2
2
2
2

5V_S0

SRN100J-3-GP
TPAD28

1DY
1DY
1DY
1DY

TPAD1

TPAD28
TPAD28
TPAD28
TPAD28

KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL18

1
1
1
1

SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP

4
3

20.K0127.026

MAIL#
INTERNET#
WLAN_LED#
BT_LED#

1
2

TP103
TP105
TP104
TP106

MEDIA_LED#

TPAD28
TPAD28
TPAD28
TPAD28

3
4
SW-TACT-45-U1-GP

E-BUTTON# 30

SATA_LED#

A_BTN#

R59
10KR2J-3-GP

62.40009.341

4
2

ODD_LED#

15

R417
1

ENG
D25
20

E-BUTTON#
A_BTN#_CN

1
2

5V_S0

C540
SCD1U16V2ZY-2GP

G96
GAP-OPEN

62.40009.341

TP_SCROLL_DOWN
1 SCRL4
2

R418
10KR2J-3-GP

470R2J-2-GP

62.40009.341

E_KEY1

KBC_PWRBTN#_CN

R420

Sheet
E

31

of

44

5
6
7
8

3D3V_AUX_S5

SRN10KJ-6-GP
RN74

4
3
2
1

SPI FLASH ROM


8M Bits
R424

SPI_HOLD#
R397
0R0402-PAD
1
2

U52

1
2
R393
150R2J-L1-GP-U

DY

SC47P50V2JN-3GP

EC62

SPICS#
30
SPIDI

30

SPICS#_1
SPIDI_1
SPI_WP#

1
2
3
4

CS#
DO
WP#
GND

VCC
HOLD#
CLK
DIO

EC61
SCD1U16V2KX-3GP

W25X80-VSSI-GP

DY

72.25X80.001

8
7
6
5

0R0402-PAD
1
2

3D3V_AUX_S5

SPI_HOLD#
SPICLK
SPIDO

30
30

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

BIOS
Size
A3

Document Number

Rev

SD

HURON

Date: Monday, March 12, 2007

Sheet

32

of

44

Aux Power

3D3V_AUX_S5

3D3V_AUX_S5

I max = 120 mA

R446

G913CF-GP
BC2

1 2

74.00913.A3F

2nd:74.09198.07F
(RT9198-33PBG)

DY 0R2J-2-GP R2

SET
OUT

DY

BC3

Vout = 1.25*(1+ R1/R2)

SHDN#
GND
DY
IN

G913_SET

SC1U16V3ZY-GP

SC1U16V3ZY-GP

DY

1
2
3

R448
DY
36K5R3F-2-GP
BC1
SC22P50V2JN-4GP
R1

DY

U54

5V_AUX_S5

check

1D05V_S0

R392
56R2J-4-GP
PM_THRMTRIP-A# 4,7,15

C526
1

Q17
RUN_POWER_ON

DY
2

1
2
3
4

SCD1U25V3KX-GP

30,31,37 S5_ENABLE

PURE_HW_SHUTDOWN#

19

R388

210KR2J-3-GP

MMGZ5242BPT-GP

DY

MXM_THER 26

2
D32
BAS16-1-GP

8
7
6
5

3D3V_S0

3D3V_S5

1
2
3
4

U16
S
S
S
G

D
D
D
D

8
7
6
5

AO4468-GP

Q18

D
D
D
D

AO4468-GP

2
Z_12V_D3

Z_12V_D3

U43
S
S
S
G

84.04468.037

RUN_POWER_ON_1

2N7002-11-GP

1
3D3V_runpwr 2

R376
47KR2J-2-GP

R375
100KR2J-1-GP

200KR3F-GP

84.00610.D31

Z_12V_G3
1
330KR2F-L-GP

Q19
2N7002-11-GP

R389

D31
SCD1U25V3KX-GP

2
R383

C529

TP0610T-T1-E3-GP

2 Z_12V
20KR2J-L2-GP

1
R382
3D3V_S0

THRMTRIP#_KBC 30

DCBATOUT

DY

R429
10KR2J-3-GP

DY

5V_S5

5V_S0

DY

3D3V_S5
MMBT2222A-3-GP
Q21

C530
SCD1U16V2ZY-2GP

Run Power

R381
100R5J-3-GP

1KR2J-1-GP

DY

2H_PWRGD# B

4,15,31 H_PWRGD

DY

R387

84.04468.037
1D8V_S0

1D8V_S3

1
2
3
4

U17
S
S
S
G

D
D
D
D

8
7
6
5

AO4468-GP

84.04468.037
Q20

16,19,26,27,30,38,39,40

PM_SLP_S3#

R1
R2

E
<Core Design>

PDTC124EU-1-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

RUN POWER
Document Number

Date: Thursday, March 15, 2007

Rev

HURON

Sheet

SD
33

of

44

CPU_CORE
ISL6262
VID Setting

H_VID0

VID0(I / 1.05V)

H_VID1
D

VID1(I / 1.05V)

H_VID2

TPS51124
1D8V_S3 / 1D05V_S0

Output Signal
PWRG(OD / 3.3V)

VGATE_PWRGD

VID2(I / 1.05V)

H_VID3

VID3(I / 1.05V)

H_VID4

Input Power

5V_S0

VDD
1D8V (O)

VID4(I / 1.05V)

H_VID5

VID5(I / 1.05V)

H_VID6

VID6(I / 1.05V)
Input Signal

PSI#

Output Power
VCC_CORE_PWR(O)

DCBATOUT

VCC

VCC_CORE_S0(Imax=44A)

1D05V(O)

SHDN#(I / 3.3V)

PM_DPRSLPVR

PM_SLP_S4#

DPRSLPVR (I / 3.3V)

H_DPRSTP#

1D8V_S3 (8A)

1D05V_S0 (8A)

Input Signal

PSI# (I / 3.3V)

CPUCORE_ON

Output Power

PM_SLP_S3#

DPRSTP# (I / 3.3V)

TPS51100
DDR_VREF_S0

EN1

VIN

EN2

VLDOIN
Voltage Sense
VCC_SENSE
C

Output Signal
CPUCORE_ON

CCI(I / Vcore)

VSS_SENSE

PM_SLP_S3#

PGOOD1

PM_SLP_S4#

GNDS(I / Vcore)
Input Power

DCBATOUT_6262

VCC(I)

5V_S0

1D8V_S3

VIN

1D5V(O)

EN

S5

CPUCORE_ON

POK

5V_S5
1D8V_S3

APL5308
2D5V_S0

Input Signal

Output Signal
PGOOD1(OD / 5V)

S5_ENABLE

DDR_VREF_S3

1D5V_S0 (3.6A)

TPS51120
5V_S5 / 3D3V_S5

S5_ENABLE

VTTREF

VDD(I)
PM_SLP_S3#

51120_SHDN#

S3

DDR_VREF_S0 (1.2A)

APl5912
1D5V_S0

VCC(I)

5V_S0

VTT

SHDN#

PGOOD2(OD / 5V)

CPUCORE_ON

3D3V_S0

VIN

2D5V_S0 (300mA)

VOUT

CPUCORE_ON

ON3
Output Power

Charger MAX8731A

ON5
PGOOD5(O)

5V_S5 (6A)

Input Signal
CHGON#/OFF

Input Power
DCBATOUT

PGOOD3(O)

3D3V_S5 (8A)
BT_TH

ICTL

BATT

PKPRES

ACOK

BT+SENSE
AC_IN
<Core Design>

VIN

Output Signal

Input Power
AD+

ACIN

Output Power
VOUT (O)

Wistron Corporation

BT+

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

VOUT (O)

DCBATOUT

Power Block Diagram


Size
A3

Document Number

Date: Monday, March 12, 2007


5

Rev

SD

Huron
Sheet
1

34

of

44

DCBATOUT_6262_2

DCBATOUT

G50

1
2

VDD

6262_AGND

2
3
4
5
6
7

PSI#
PMON
RBIAS
VR_TT#
NTC
SOFT

PHASE1

34

LGATE1

32

PGND1

33

ISEN1

24

37
38
39
40
41
42
43
44

VID0
VID1
VID2
VID3
VID4
VID5
VID6
VR_ON
DPRSLPVR
DPRSTP#
CLK_EN#

6262_VDIFF
2
SC2200P50V2KX-2GP

13

VDIFF

6262_FB2

12

FB2

11

FB

UGATE2

27

BOOT2

26

PHASE2
LGATE2
PGND2
ISEN2

28
30
29
23

2
C94

6262_UGATE2
6262_BOOT2

6262_LGATE2

36

1
R265

1R3F-GP

DY

6262_ISENN1

36

2
10KR3J-L1-GP

6262_VSUM

1 R256
2
3K65R3F-GP
1
2
R259
10KR3J-L1-GP

36

6262_ISENP2

36

6262_VSUM

VO

18
2

DROOP
16

VSEN

VW

6262_DFB

R80
1KR3F-GP

C405

1R3F-GP
R268
1

R272
2K61R3F-GP
R276
11KR2F-L-GP

6262_ISENN1

1
R264

DY

6262_ISENN2

36

10KR3J-L1-GP

R277
NTC-10K-9-GP

C409
SCD22U10V2KX-1GP

ENG
6262_DROOP

C134

6262_AGND

C406

C128
SCD01U25V2KX-3GP
6262_VSEN

C398
SCD22U16V3KX-1-GP

19

R282
1
2
12K7R3F-GP

6262_OCSET

1 2

25

VSUM

R78
1

6262_ISENN2

6262_AGND

6262_RTN

1
6262_AGND

C104
SCD22U16V3ZY-GP
6262_PHASE2 36

COMP

RTN

C119

36

6262_BOOT2_1

6262_ISENN2

6262_VO

R89
0R0603-PAD
1
2

1 R63
2
0R0603-PAD

6262_ISENP1

10

6262_VW

SCD01U25V2KX-3GP

5 VCC_SENSE

2
10KR3J-L1-GP

C111
SCD22U16V3KX-1-GP

2
SC4D7U10V5ZY-3GP

NC#25
OCSET8

2
SC1KP50V2KX-1GP

SCD01U25V2KX-3GP

5 VSS_SENSE

PVCC

31

6262_FB
2
SC470P50V2KX
6262_COMP

ISL6262ACRZ-T-GP-U
R86
0R0603-PAD
1
2

5V_S0

ENG

14

C141 1

3K65R3F-GP

R73

45
46
47

2
6K81R2F-1-GP

R68

ENG

6262_ISENN1

6262_VSUM_2

ENG

36

6262_VSUM 1

SCD033U25V3KX-GP

R95

SCD22U16V3ZY-GP

6262_PHASE1

6262_LGATE1 36

SCD22U10V3KX-2GP

C143
SC180P50V2JN-1GP

36

6262_BOOT1_1

6262_DPRSLP
6262_DPRSTP#
6262_CLKEN#

1
2
R91 1KR2F-3-GP
6262_COMP_1
1
C142
2

1 R62
2
0R0603-PAD

C101

0R0402-PAD
0R0402-PAD
0R0402-PAD
1KR3F-GP

C139 1

6262_UGATE1
6262_BOOT1

2
2
2
2

ENG

36

15

1 R93
2
1K4R3F-1-GP

1 R96
2
97K6R2F-GP
1

35

BOOT1

R84 1
R283 1
R87 1
1R97

16 PM_DPRSLPVR
4,15 H_DPRSTP#
3
CLK_EN#

UGATE1

GND_T

R287 0R0402-PAD
1
2

6262_PSI#
6262_PMON
6262_RBIAS
1
2
6262_AGND
R239
4K02R3F-GP
R94
147KR2F-GP
6262_NTC_1
6262_NTC
1
2
1
2
C140 1
R235
NTC-470K-1-GP 6262_AGND
6262_SOFT
2
1
2
6262_AGND
SCD01U16V2KX-3GP
C144
SCD015U25V3KX-GP
5
H_VID[6..0]
H_VID0
6262_VID0
1 R74
2 0R2J-2-GP
H_VID1
6262_VID1
1 R269
2 0R2J-2-GP
H_VID2
6262_VID2
1 R79
2 0R2J-2-GP
H_VID3
6262_VID3
1 R273
2 0R2J-2-GP
H_VID4
R81
0R2J-2-GP
6262_VID4
1
2
H_VID5
6262_VID5
1 R278
2 0R2J-2-GP
H_VID6
6262_VID6
1 R83
2 0R2J-2-GP
CPUCORE_ON
R281 1
2 0R0402-PAD 6262_CORE_ON
26,38,39 CPUCORE_ON
PSI#

GND

49

6262_AGND
4

4 CPU_PROCHOT#

21

U13

C399
SC1U10V3ZY-6GP

VGATE_PWRGD 7,16

C411
SC1U25V3KX-GP

R286 0R0402-PAD
1
2
6262_PWRGOOD

2
6262_PMON

4K99R3F-GP

1
2

DY

R285
1K91R3F-GP

6262_VIN

C402

6262_5VS0_VCC

1DY

26,38,39 CPUCORE_ON

R270
10R3J-3-GP

48

R267
10R3J-3-GP

3V3

GAP-CLOSE-PWR

3D3V_S0

PGOOD

GAP-CLOSE-PWR

DCBATOUT_6262_1
5V_S0

DFB

GAP-CLOSE-PWR
G51
2

17

GAP-CLOSE-PWR
G12
2

GAP-CLOSE-PWR
G14
2

22

20
6262_AGND

GAP-CLOSE-PWR
G9
2

SCD1U25V3ZY-1GP

R280

2
GAP-CLOSE-PWR
G53
2

1
2

ENG

ST15U25VDM-3-GP

GAP-CLOSE-PWR
G52
2

TC21

G11

VIN

DCBATOUT_6262_1

DCBATOUT

R82
2K61R2F-1-GP
1
2

1
C118

2
SC180P-GP

6262_AGND

6262_VO

<Core Design>

G54

Wistron Corporation

GAP-CLOSE-PWR

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

6262_AGND
Title
Size

CPU Vcore Power_1


Document Number

Date: Thursday, March 15, 2007


5

Rev

Huron

SD
Sheet
1

35

of

44

1
2

1
2

4
3
2
1

4
3
2
1

G5
GAP-CLOSE-PWR

6262_ISENN1

35

6262_ISENP1

35

4
3
2
1

4
3
2
1

S
S
S
G

S
S
S
G

5
6
7
8

G7
GAP-CLOSE-PWR

SE330U2VDM-L-GP

TC6
SE330U2VDM-L-GP

U8
AO4456-GP

D
D
D
D

D
D
D
D

U34
AO4456-GP

TC7
SE330U2VDM-L-GP

5
6
7
8

TC8

L6
1
2
IND-D36UH-9-GP

6262_LGATE1

Iomax=44A

VCC_CORE_S0

35

6262_PHASE1

5
6
7
8

5
6
7
8
6262_UGATE1

35

C391
SC10U25V6KX-1GP

S
S
S
G

35

U7
AO4474-GP

S
S
S
G

Id=13A
Qg=10~14nC
Rdson=9.4~12mohm

C387
SC10U25V6KX-1GP

D
D
D
D

U35
AO4474-GP

D
D
D
D

C102
SC10U25V6KX-1GP

C88
SC10U25V6KX-1GP

DCBATOUT_6262_2

DY

C93
SCD1U50V3ZY-GP

PANASONIC
330uF / 2V / V size
ESR=9mohm / Iripple=3.7A

Id=14.5A
Qg=25~35nC
Rdson=5.9~7.25mohm

6262_LGATE2

1
2

1
2

1
2

C390
SC10U25V6KX-1GP

4
3
2
1

4
3
2
1

L5
1
2
IND-D36UH-9-GP

4
3
2
1

4
3
2
1

S
S
S
G

S
S
S
G

Id=14.5A
Qg=25~35nC
Rdson=5.9~7.25mohm

35

6262_ISENP2

35

6262_ISENN2

5
6
7
8

G4
GAP-CLOSE-PWR

TC1
SE330U2VDM-L-GP

G6
GAP-CLOSE-PWR

TC5
SE330U2VDM-L-GP

U33
AO4456-GP

D
D
D
D

D
D
D
D

U9
AO4456-GP

SE330U2VDM-L-GP

5
6
7
8

TC9

35

C386
SC10U25V6KX-1GP

6262_PHASE2

C99
SC10U25V6KX-1GP

6262_UGATE2

35

C87
SC10U25V6KX-1GP

S
S
S
G

35

S
S
S
G

Id=13A
Qg=10~14nC
Rdson=9.4~12mohm

U32
AO4474-GP

D
D
D
D

D
D
D
D

U10
AO4474-GP

5
6
7
8

5
6
7
8

DCBATOUT_6262_1

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

CPU Vcore Power_2


Document Number

Date: Monday, March 12, 2007


5

Rev

Huron

SD
Sheet
1

36

of

44

DCBATOUT

DCBATOUT_51120

DCBATOUT_51120

G65

G91

51120_VREG3

GAP-CLOSE-PWR
G62
2

GAP-CLOSE-PWR
G63
2

GAP-CLOSE-PWR
G64
2

ADJ.

N/A

not use

ADJ.
Swithchr ON

EN3,EN5

not use

LDO ON

LDO OFF

Switcher ON

VREG3 on

5V
Fixed Output
3.3V
Fixed Output

1
1

3D3V Iomax=8A
OCP>12A(12.7A)
3D3V_PWR

IND-4D7UH-104-GP

DY
R426

DY

GAP-CLOSE-PWR
G68
2

GAP-CLOSE-PWR
G69
2

GAP-CLOSE-PWR
G81
2

GAP-CLOSE-PWR
G82
2

GAP-CLOSE-PWR
G83
2

GAP-CLOSE-PWR
G84
2

GAP-CLOSE-PWR
G85
2

TC13
ST220U6D3VDM-LGP

30K9R3F-GP

2
51120_GND

DY
G43

51120_GND

GAP-CLOSE-PWR
C549
51120_GND

DY

For TPS51120,
Vout=5V
1. If you use
2. If you use
3. If you use
Vout=3.3V
1. If you use
2. If you use
3. If you use

Vout=1V*(R1+R2)/R2
<Core Design>
A

a 6.8uH inductor, the minimum ESR is 70m ohm.


a 4.7uH inductor, the minimum ESR is 48m ohm.
a 3.3uH inductor, the minimum ESR is 34m ohm.
a 4.7uH inductor, the minimum ESR is 51m ohm.
a 3.3uH inductor, the minimum ESR is 36m ohm.
a 2.5uH inductor, the minimum ESR is 27m ohm.

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

3D3V_S5 & 5V_S5

Document Number

Date: Thursday, March 15, 2007

Huron

Rev

SD
Sheet

37

of
44

GAP-CLOSE-PWR

not use

R435
22KR2F-GP

N/A

51120_GND

C546

180k/CH1
280k/CH2

DY

R419
13KR2F-GP

220k/CH1
330k/CH2

280k/CH1
430k/CH2

380k/CH1
590k/CH2

D-Cap
MODE

GAP-CLOSE-PWR
G67
2

3D3V_S5

DY

SC680P50V3JN-GP

CURRENT
MODE

C550

51120_COMP2_PL

N/A

DY
SC390P50V3JN-GP

N/A

PWM

C556
SC33P50V3JN-GP
S
S
S
G

Id=13.2A
Qg=27nC,
Rdson=6.8~8.2mohm

L20
1

C535

51120_COMP2

SC1000P50V3JN-GP

PWM

C554

GAP-CLOSE-PWR
G66
2

D
D
D
D

U48
AO4706-GP
84.04706.037

R443
0R3-0-U-GP

51120_GND

R423
30KR2F-GP

DY

DY
SC390P50V3JN-GP

AUTOSKIP
/FAULTS
OFF

not use

2
2

0R0603-PAD

DY
2

51120_DRVH2
51120_LL2

251120_VREF2

R437
51120_TONSEL 1

R436
0R0603-PAD

51120_CS2

151120_SKIPSEL 32
31

23
18

U49
Id=9.2A
AO4468-GP
Qg=9~12nC, 84.04468.037
Rdson=17.4~22mohm

C537

51120_DRVH1
51120_DRVH2

S
S
S
G

51120_GND
51120_CS1

51120_COMP1_PL

V5FILT

AUTOSKIP

EN1,EN2 Switcher OFF

2
5
6
7
8

7
2
COMP2
COMP1

V5FILT
VIN
CS1
CS2

PGND1
PGND2
GND
GND
24
17
5
33

27
14

SC10U25V6KX-1GP

DRVH1
DRVH2

SC10U25V6KX-1GP

TPS51120RHBR-GPU1

25
16

D
D
D
D

U53

DRVL1
DRVL2

2
GAP-CLOSE-PWR
G57
2

DCBATOUT_51120

VREF2

30
11

3D3V_PWR

VO1
VO2

51120_VREF2

1
8

51120_COMP1

VFB2

GAP-CLOSE-PWR

R439
100KR2J-1-GP

R447 0R0402-PAD
51120_PGD1
51120_PGD
1
2
51120_PGD2
1
2
R440
0R0402-PAD
51120_DRVL1
51120_DRVL2

51120_DRVL2

FLOAT

TC15
ST220U6D3VDM-LGP

28
13

PGOOD1
PGOOD2

51120_LL2
51120_LL1

15
26

51120_VFB2

VFB1

5V_S5

G56

VFB2
VFB1

51120_GND

VREF2

R428
30KR2F-GP

51120_GND

5
6
7
8

6
3

LL2
LL1

ENG

GAP-CLOSE-PWR
G61
2

51120_VFB1

4
3
2
1

51120_VFB2
51120_VFB1

R454
1
2
5K9R2F-GP
R453
1
2
8K87R3-GP

GND

DY

R432
7K5R2F-1-GP

5
6
7
8

EN1
EN2
EN3
EN5

51120_V5FILT

DY
C557
SC33P50V3JN-GP

4
3
2
1

29
12
10
9

5V_PWR
3D3V_PWR

51120_GND

TONSEL

GAP-CLOSE-PWR
G60
2

51120_EN1
51120_EN2
51120_EN3
51120_EN4

R406 0R0603-PAD
1
2
1
2
R414 0R0603-PAD

C551
SC1000P50V3JN-GP

COMP

IND-4D7UH-104-GP

3D3V_S5

TP80 TPAD30
TP81 TPAD30

5V Iomax=6A
OCP>9A(10A)
5V_PWR

51120_DRVL1

SKIPSEL
TONSEL

30,31,33 S5_ENABLE

R449 0R0603-PAD
1
2
1
2
R445 0R0603-PAD

20
22

C567
SC10U10V5ZY-1GP

51120_GND

SKIPSEL

GAP-CLOSE-PWR
G59
2

DY
VBST1
VBST2

GAP-CLOSE-PWR-2U

19
21

G44

5V_PWR

TC22
ST15U25VDM-3-GP

51120_V5FILT

Id=13.2A
Qg=27nC,
Rdson=6.8~8.2mohm

R422 0R0603-PAD
51120_COMP2 1
2
R407 0R0603-PAD
51120_COMP1
1
2

1
1
2

C566
SCD1U50V3ZY-GP

SCD1U50V3ZY-GP
51120_VREG5
3D3V_AUX_S5

5
6
7
8
4
3
2
1

1
2

R451
C563
0R0603-PAD
51120_LL1 1
251120_LL1_1 1
251120_VBST1

51120_GND

51120_V5FILT

U51
AO4706-GP
84.04706.037

S
S
S
G

C568
SC10U10V5ZY-1GP

DCBATOUT_51120

251120_VBST2

SCD1U50V3ZY-GP

GAP-CLOSE-PWR
G86
1
2
5V_AUX_S5
GAP-CLOSE-PWR
G97
1
2
GAP-CLOSE-PWR-2U

51120_GND

L21
1

4
3
2
1

R450
0R0603-PAD
C561
51120_LL2 1
251120_LL2_1 1

VREG3
VREG5

GAP-CLOSE-PWR
G87
2

51120_DRVH1
51120_LL1

C583
SC1U10V3KX-3GP

C536
SC10U25V6KX-1GP

GAP-CLOSE-PWR
G88
2

R465
51120_VREG5 1
2
5D1R3F-GP

C534
SC10U25V6KX-1GP

GAP-CLOSE-PWR
G89
2

U50
AO4468-GP
Id=9.2A
84.04468.037
Qg=9~12nC,
Rdson=17.4~22mohm

D
D
D
D

51120_V5FILT

S
S
S
G

GAP-CLOSE-PWR
G90
2

D
D
D
D

GAP-CLOSE-PWR
G58
2

DCBATOUT_51124

1D8V_PWR

1D8V_S3
G78

2 C553

51124_DRVL1

1D05V_PWR

240k/CH1
300k/CH2

300k/CH1
360k/CH2

360k/CH1
420k/CH2

1D05V_S0

GAP-CLOSE-PWR
G23
2

GAP-CLOSE-PWR
G24
2

GAP-CLOSE-PWR
G25
2

GAP-CLOSE-PWR
G26
2

GAP-CLOSE-PWR
G27
2

GAP-CLOSE-PWR
G28
2

GAP-CLOSE-PWR
G29
2

GAP-CLOSE-PWR
G30
2

GAP-CLOSE-PWR
G21
2

GAP-CLOSE-PWR
G31
2

IND-1D5UH-18-GP-U

51124_VBST2

51124_DRVL2

51124_VFB2

DY

C539
SC33P50V3JN-GP

DYC513
R399
29K4R2F-GP

51124_GND

TC18
ST330U2D5VDM-LGP

R401
75KR3F-GP

Kemet
220uF/ 4V
ESR=15mohm

Voutsetting=1.05V

51124_VBST1

Netswap
DCR=7.5m ohm
Irms=12A,Isat=20A

TONSEL

V5FILT

GAP-CLOSE-PWR
G70
2

1D05V Iomax=8A
OCP>12A

AO4706-GP
Id=13.2A
84.04706.037
Qg=27nC,
Rdson=6.8~8.2mohm

L23

51124_DRVH2

C320

51124_DRVL2

C532

Vtrip(mV)=Rtrip(Kohm)*10(uA)
Iocp=(Vtrip/Rdson)+((1/(2*L*f))*((Vin-Vout)*Vout)/Vin))
OPEN

TC20
ST15U25VDM-3-GP

SCD1U50V3ZY-GP

GND

GAP-CLOSE-PWR
G71
2

1
2

1
2

1
2
1
2

Id=9.2A
Qg=9~12nC,
Rdson=17.4~22mohm

5
6
7
8

U20
AO4468-GP
84.04468.037

GAP-CLOSE-PWR

1
51124_GND

G95

51124_LL2_1

GAP-CLOSE-PWR
G72
2

DCBATOUT_51124

U19

2C552

51124_V5FILT

SC10U25V6KX-1GP

51124_GND

51124_GND

SCD1U50V3ZY-GP

GAP-CLOSE-PWR
G73
2

GAP-CLOSE-PWR

51124_LL1_1

DY

R40810KR2J-3-GP
0R2J-2-GP

DRVL1
DRVL2

DY

19
12

18
13
25
3

1
1

1
6
VBST1
VBST2

PGND1
PGND2
GND
GND

51124_DRVH1
51124_DRVH2

51124_GND

GAP-CLOSE-PWR

SCD1U50V3ZY-GP

51124_LL2

R434
0R0603-PAD
1
2

21
10

S
S
S
G

51124_LL1

R433
0R0603-PAD
1
2

GAP-CLOSE-PWR
G79
2

D
D
D
D

2007.1.19 ENG

51124_TONSEL

DRVH1
DRVH2

51124_LL2
R438
8K2R3F-GP

G22

R441
9K76R3F-GP

51124_TRIP1
51124_TRIP2

GAP-CLOSE-PWR
G74
2

5
6
7
8

OCP

22
9

TRIP1
TRIP2
TPS51124RGER-GPU1

51124_GND

17
14

SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

DY

C545

1D05V_PWR

S
S
S
G

51124_GND

C544

GAP-CLOSE-PWR
G75
2

R409

4
3
2
1

LL1
LL2

Vout=0.758V*(R1+R2)/R2

TONSEL

1
2

DY

EN1
EN2

20
11

51124_GND

D
D
D
D

51124_LL1
51124_LL2

23
8

Kemet
220uF/ 4V
ESR=15mohm

4
3
2
1

51124_EN1_1
51124_EN2_1

GAP-CLOSE-PWR
G76
2

G80

16,27,30,40 PM_SLP_S4#
9,26,27,30,33,39,40 PM_SLP_S3#

0R0402-PAD
2
0R0402-PAD
2

V5FILT
V5IN

R411 1
R412 1

15
16

51124_V5FILT

26,35,39

TC17
ST330U2D5VDM-LGP

GAP-CLOSE

PGOOD1
PGOOD2

51124_GND

VO1
VO2

VFB1
VFB2

U23

2
5

1
2

C560
SC1U10V3ZY-6GP

CPUCORE_ON

GAP-CLOSE-PWR
G77
2

DY

GAP-CLOSE
G93
1
2

24
7

51124_PGD1
51124_PGD2

1
2

1
2

1D05V_PWR
1D8V_PWR
51124_VFB2
51124_VFB1

C518

R400
47KR3F-GP

10KR2J-3-GP

P/H CPU CORE PAGE


G92
1
2

R442
3D3R3J-L-GP

51124_VFB1

5V_S5

C562
SC4D7U10V5ZY-3GP

DY

51124_DRVL1

10KR2J-3-GP

R398
64K9R2F-1-GP

4
3
2
1

1
2

R404

C538

Id=13.2A
Qg=27nC,
Rdson=6.8~8.2mohm

DY

IND-1D5UH-18-GP-U

1D8V_PWR

Voutsetting=1.8046V

S
S
S
G

DY

5
6
7
8

U22
AO4706-GP
84.04706.037

3D3V_S5

R403

D
D
D
D

3D3V_S5

GAP-CLOSE-PWR

2
4
3
2
1

51124_LL1

GAP-CLOSE-PWR
G36
2

L22

GAP-CLOSE-PWR
G37
2

Netswap
DCR=7.5m ohm
Irms=12A,Isat=20A

SC10U25V6KX-1GP

GAP-CLOSE-PWR
G38
2

1D8V Iomax=10A
OCP>15

SCD1U50V3ZY-GP

51124_DRVH1

TC19
ST15U25VDM-3-GP

SC33P50V3JN-GP

GAP-CLOSE-PWR
G39
2

S
S
S
G

1
D

C319
SC10U25V6KX-1GP

Id=9.2A
Qg=9~12nC,
Rdson=17.4~22mohm

2
GAP-CLOSE-PWR
G40
2

C533
SC10U25V6KX-1GP

D
D
D
D

U21
AO4468-GP
84.04468.037

DCBATOUT_51124
G41

5
6
7
8

DCBATOUT

51124_GND

GAP-CLOSE-PWR

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

TPS51124_1D8V_1D05V
Size
A3

Document Number

Date: Monday, March 19, 2007


5

Rev

SD

Huron
Sheet
1

38

of

44

1D5V_S0
Iomax=3.6A
1D8V_S3

G19

C310
C311
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP

VOUT
VOUT

3
4

FB

1D5V_LDO

GAP-CLOSE-PWR
G20
2

GAP-CLOSE-PWR
G17
2

GAP-CLOSE-PWR
G18
2

2
1

C302

Iomax=3.6A
1D5V_S0

GAP-CLOSE-PWR
TC2
ST100U4VBM-U

DY

SANYO
100uF, 4V, B2 Size
Iripple=1.1A, ESR=70mohm

R177
30K1R3F-GP

C304

SC10U10V5ZY-1GP

SO-8-P

C309

SC10U10V5ZY-1GP

GND

R176
26K7R3F-GP

SC82P50V2JN-3GP

APL5912-KAC-GP

5912_FB

EN

5
9

VIN
VIN

POK

5912_EN_U74

5912_POK_U74

R173
0R0402-PAD
1
2

PM_SLP_S3#

Vo(cal.)=1.5096V

16,19,26,27,30,33,38,40

PM_SLP_S3#

VCNTL

26,35,38 CPUCORE_ON

U18

R175
10KR2F-2-GP
R174
0R0402-PAD
1
2

C303
SC1U16V3ZY-GP

3D3V_S0

5V_S5

Vo=0.8*(1+(R1/R2))
B

<Core Design>
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3

APL5912_1D5V
Document Number

Date: Wednesday, March 14, 2007


5

Rev

SD

Huron
Sheet
1

39

of

44

0D9V_S3
Iomax=1.2A

1D8V_S3

C515
SC10U10V5ZY-1GP C514
SC10U10V5ZY-1GP

OCP=3A

5V_S5

DDR_VREF_PWR

R371
0R0402-PAD
1
2

16,27,30,38 PM_SLP_S4#

1 R372
2
0R0402-PAD

GAP-CLOSE-PWR
G32
2

GAP-CLOSE-PWR
G34
2

GAP-CLOSE-PWR
G33
2

1
2

2
2

C517
SC10U10V5ZY-1GP

C516
SC10U10V5ZY-1GP

TPS51100DGQ-1-GP

DDR_VREF_S3

C519
SCD1U16V2ZY-2GP

1
2
3
4
5

GND

PM_SLP_S3#

VIN
VDDQSNS
S5
VLDOIN
GND
VTT
S3
PGND
VTTREF VTTSNS

11

16,19,26,27,30,33,38,39

10
51100_S5 9
8
51100_S3
7
6

DDR_VREF_S0
G35

U44

GAP-CLOSE-PWR
C

Iomax=300mA
3D3V_S0

C500

C492

1
1

GND

VIN

C497

APL5308-25AC-1GPU

DY
SC10U10V5ZY-1GP

DY

SC1U10V3ZY-6GP

C491

VOUT

SC10U10V5ZY-1GP

2D5V_S0

U41

SC2D2U16V5ZY-2GP
B

<Core Design>
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3

0D9V/2D5V
Document Number

Date: Monday, March 12, 2007


5

Rev

SD

Huron
Sheet
1

40

of

44

MAX8731_LDO

R258
10KR2F-2-GP

ACAV_IN
R260

15K4R2F-GP

NEAR

5V_AUX_S5

R217
100KR2J-1-GP

Adaptor In Soft-Start Circuit

2
AC_IN#

AD+_TO_SYS

1
2
3
4

24

Near KBC

23

DLO

20

PGND

19

SDA

GAP-CLOSE-PWR

G13

GAP-CLOSE-PWR
G8
1
2

R257
1R3F-GP
1
2
MAX8731_LX 1
C110
2
SCD1U25V3KX-GP
1
2
C396
SC220P50V2JN-3GP
MAX8731_DLO

CHG_PWR

L7
MAX8731_LX1

Layout Trace 300mil

1
2
R226
D01R2512F-4-GP

IND-5D6UH-19GP

C49

C48

C50

MAX8731ETI-GP

C393
SCD01U50V2ZY-1GP

74.08731.073

4
3
2
1
1

BAT_SENSE

15

FBSA

SB
R29
1
2 BATT_SENSE
100R2F-L1-GP-U

16

G2
GAP-CLOSE-PWR

U37
SI4800BDY-T1

FBSB

CCV
CCI
CCS
REF
DAC
GND

MAX8731_CSIN

G
S
S
S

MAX8731_CSIP

INP

GND

1
2

SCD1U16V2ZY-2GP

C132

MAX8731_CCV
6
MAX8731_CCI
5
MAX8731_CCS
4
MAX8731_REF
3
MAX8731_DAC 7
12
C135
C133
SC1U10V3KX-3GP

C137

SCD01U50V2ZY-1GP

2
4K7R2F-GP

SCD01U50V2ZY-1GP

C138
SCD01U50V2ZY-1GP

SCD1U16V2ZY-2GP

1MAX8731_CCV1

C404

10KR2F-2-GP

1
R275

R88

18
17

29

AD_IA

30

CSIP
CSIN

BATT_SENSE 42

<Core Design>

Wistron Corporation

1
2
G16
GAP-CLOSE-PWR

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

CHG_AGND
Title

Need Check MAXIM Sming Use MAX8731 or MAX8731A

CHARGER MAX8731
Size
A3

Document Number

Rev

SD

HURON

Date: Monday, March 12, 2007

Sheet

41

of

44

SC10U25V6KX-1GP

CHG_AGND

DY

SC10U25V0KX-3GP

BATSEL

SC10U25V0KX-3GP

14

G3
GAP-CLOSE-PWR

D
D
D
D

30,42 BAT_SDA

LX

BT+

MAX8731_DHI

BAT_SDA

DHI

1
2
C117
SC1U10V3KX-3GP

SCL

U38
SI4800BDY-T1

10

25
21

CHG_AGND

C80
SCD1U25V3KX-GP

BAT_SCL

BST
LDO

R266
0R0603-PAD
MAX8731_BST 1
2MAX8731_BST1 1
MAX8731_LDO
D5
1SS400PT

ACOK

MAX8731_VCC

C105

DY

13

27
26

ACAV_IN

CSSN
VCC

VDD

C89

5
6
7
8

11

R271
33R2J-2-GP

D
D
D
D

ACIN

28

C407
SC1U10V3KX-3GP

G
S
S
S

CSSP

CHG_AGND

DCIN

CHG_AGND
30,42 BAT_SCL

2nd:A04407(84.04407.A37)

PWR_MAX8731

22

MAX8731_ACIN

SCD1U25V3KX-GP

1
2

C131
SCD01U50V2ZY-1GP

2
CHG_AGND

MAX8731_DCIN

3D3V_AUX_S5
C114

BT+

8
7
6
5

R211
470KR2J-2-GP

SC10U25V0KX-3GP

49K9R2F-L-GP

D
D
D
D

AO4433-GP

SC10U25V0KX-3GP

365KR3F-GP

U12

ASNS

C400
SC1U25V5KX-1GP

C403
SCD1U25V3KX-GP

CHG_AGNDCHG_AGND

R92

AD+

U30
S
S
S
G

SCD1U25V3KX-GP

R76
0R0402-PAD
1
2

R90

C408

MAX8731_CSSN

ACAV_IN

AD+

1
2
3
4

Q9
2N7002-11-GP

R206
1
2
100KR2J-1-GP

DCIN_GATE2

DCIN_GATE1

Q8
2N7002-11-GP

R205
49K9R2F-L-GP
1
2

DC_IN_D

2nd:A04433(84.04433.A37)

P2003EVG-GP

R209
10KR2J-3-GP

GAP-CLOSE-PWR
G10
1
2

1
2
R208
D01R2512F-4-GP

G46
GAP-CLOSE-PWR

ACAV_IN

Layout Trace 300mil

DCBATOUT

Layout Trace 250mil

U29
S
S
S
G

4
3
2
1

D
Q10
2N7002-11-GP

D
D
D
D

5
6
7
8

8
7
6
5

GAP-CLOSE-PWR
G15
1
2

Trace 250mil

G45
GAP-CLOSE-PWR

AD+ Layout

C360
SC1U10V3KX-3GP

MAX8731_CSSP

AC_IN#

30

Adaptor in to generate DCBATOUT

AD+
DC1
4

K
D17
P4SSMJ24PT-GP
200KR2F-L-GP

R2
R1

EC9
SCD1U50V3ZY-GP

AD+_2

E
C

R12
100KR2F-L1-GP

R1

TPAD28

TP154

AD+_JK

R2

C350
SCD1U50V3ZY-GP

2nd:A04433(84.04433.A37)

AD_OFF

ID = -10A/70deg
Rds(ON) = 24mohm
SO-8

C10

Q6
30

Layout Trace 250mil

8
7
6
5

PDTA124EU-1-GP
Q5

D
D
D
D

P2003EVG-GP

SCD47U50V5ZY

20.F1002.005

R11

ACES-CON5-7-GP-U

DY

C11
SCD1U50V3ZY-GP

1
1
6

U28
S
S
S
G

1
2
3
4

Layout Trace 250mil

AD+_JK

5
4
3
2

PDTC124EU-1-GP
R203
1KR2J-1-GP

3D3V_AUX_S5

BATTERY CONNECTOR
2

D3
BAV99-5-GP

DY

DY
3

D2
BAV99-5-GP

DY

BAT1

D1
BAV99-5-GP

R26
470KR2F-GP

3D3V_AUX_S5

1
R32
1
R28

30,41 BAT_SDA
30,41 BAT_SCL
30 BAT_IN#
BT+

GND
GND
GND
GND

1
2
8
9

20.80701.007

EC15DY
SC100P50V2JN-3GP

SYN-CON7-17-GP-U1

1
EC14

DY

SC100P50V2JN-3GP

EC13

EC12

SC1000P50V3JN-GP

EC11

DY

SC1000P50V3JN-GP

SCD1U50V3ZY-GP

TP156
TP155
TP157

DY

SCD1U50V3ZY-GP

EC10

GAP-CLOSE-PWR

TPAD28
TPAD28
TPAD28

SCL
SDA
BAT_IN#
BT+#6
BT+#7

DY

41 BATT_SENSE

3
4
5
6
7

Layout Trace 320mil

G1

BATA_SDA_1
BATA_SCL_1

2
227R3F-GP
27R3F-GP

BATA_SDA_1
BATA_SCL_1
BAT_IN#

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

AD/BATT CONN
Size
A3

Document Number

Date: Monday, March 12, 2007


A

Rev

SD

HURON
Sheet
E

42

of

44

4
3

5V_S0_DVI

RN42
SRN4K7J-8-GP

MXM

1
2

R22

DY

1
0R2J-2-GP

TMDS_SCL
NV_DVI_CLK 26
Q7
2N7002DW-1-GP

MXM

5
TMDS_SDA

R23

NV_DVI_DAT 26

1
DY 0R2J-2-GP

3D3V_S0
C

26 MXM_TMDS_TX1-

MXM_TMDS_TX2- 26
26 MXM_TMDS_TX1+
26 MXM_TMDS_TX0-

DVI1

5V_S0_DVI
26 MXM_TMDS_TX0+

D19
SDM20U30-7-GP

EC73 2

MXM

C353 2

DY

1 SCD1U10V2KX-4GP
1 SC1U16V3ZY-GP

5V_S0_DVI

MXM
26 MXM_TMDS_TXC+

4
5
6

TMDS_SCL

TMDS_SDA
5V_S0

26
FOX-CONN24-3R-1GP-U

26 MXM_TMDS_TXC-

20.10172.024

EC72

EC74
SC220P50V3JN-GP

MXM

NP2

SC220P50V3JN-GP

MXM

MXM_TMDS_TX2+ 26

MXM

1
NP1

D18
BAV99-5-GP

DY
3

5V_S0

25
9
17
10
18
11
19
12
20
13
21
14
22
15
23
16
24

26

NV_DVI_HPD

R207
100KR2F-L1-GP

MXM

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

DVI CONNECTOR
Size
A3

Document Number

Date: Monday, March 12, 2007


5

Rev

SD

HURON
Sheet
1

43

of

44

10

14

5V_S0

8
U39C
TSAHCT125PW-GP

ENG

73.74125.L13

EC101
SCD1U25V2ZY-1GP

EC102
SCD1U25V2ZY-1GP

DCBATOUT

BT+

GND1
HOLE

GND2
HOLE

GND3
HOLE

GND4
HOLE

GND5
HOLE

GND6
HOLE

GND7
HOLE

GND8
HOLE

Spring

MINICard

H7

H8

H9

BD to BD

H10

34.4T901.001

34.4T901.001

H3

NB

H6

H5

34.4T902.001

H4

DY

CPU

H2

H1

MXM

DY

DY

GND12
SPRING-7

GND11
SPRING-7

GND10
SPRING-7

GND9
SPRING-7

34.4G502.001

34.4G501.001
<Core Design>

H11
HOLE

H12
HOLE

H13
HOLE

H14
HOLE

H15
HOLE

H16
HOLE

H17
HOLE

H18
HOLE

H19
HOLE

H20
HOLE

H21
HOLE

H22
HOLE

H23
HOLE

H24
HOLE

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Size
Date:
5

EMI/Spring/Boss

Document Number

HURONSheet
Thursday, March 15, 2007
1

Rev

SD
44

of

44

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