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Fig. 2. Configuration of a 48-pulse converter. (2-24 pulse circuit) Besides they are the most economical type of dc-ac converters. For digital simulation purposes, a two level, 48pulse converter was modeled. Fig. 2 shows the configuration of a 48-pulse dc-ac converter, using eight 6-pulse GTO converters with four separate transformers. The details can be found in [1] and [5]. The phase displacement of two consecutive 6-pulse converters is 15 . Fig. 3 shows the digital simulation of a 48-pulse converter using Power System Blockset (PSB) of Simulink software. The Total
where Vi is rms of the i th harmonic, Vh is rms of total harmonic content and V1 is rms of the fundamental frequency component. Therefore total rms of the voltage is Vrms = V12 +Vh2 = V12 +(0.075V1 ) 2 Thus, V1 =0.997 Vrms that shows the voltage harmonic content is very small. This 48-pulse, GTO converter will be used for deigital simulation of the STATCOM. Unlike the PWM and three level converters, two level converters do not have internal capability of voltage control and only the phase angle of the output ac voltage can be controlled by gating signals. Therefore the only way to control the magnitude of the ac voltage is by the input dc voltage. The process of dc capacitor voltage control is achieved by a small phase displacement, between the STATCOM voltage, Vs , and the transmission line voltage, Vt If Vs lags Vt , real power flows from the transmission system to the dc capacitor (charge) and if Vs leads Vt , real power flows from the dc capacitor to the transmission line (discharge). Besides, a small is always required to compensate switching and coupling transformer losses by real power flow from the transmission line to the STATCOM. Fig. 4 shows the basic control structure of the STATCOM, based on a decoupled, d-q controlled strategy and the two level, 48-pulse converter. The regulation slope is defined as [1] VVL max VV k = C max = (3) I C max I L max where VC max is the maximum line voltage drop at full capacitive and VL max is the maximum line overvoltage at
III. DYNAMIC REPRESENTATION OF THE STATCOM Fig. 5 shows a simple per unit power system representation as seen by the STATCOM (including coupling transformer). Is the equivalent Thevenin reactance of the power system as seen by the STATCOM, Vcq is the
Fig. 7. Single-line diagram of the simulated power system. A. Effect of the Power System Strength on the STATCOM Stability As shown in Fig. 6, the system reactance, X eq , is a part of the feedback loop and it is crucial to note that X eq varies as loads are added to or rejected from the power system or when a transmission line or generator outage occurs. Therefore the overall closed loop gain and the stability margin of the STATCOM are greatly affected by X eq or system strength [1], [6]. If the impedance of the power system increases (weak system) the amount of voltage change due to the STATCOM reactive current increases and the overall system tends to instability. If the power system impedance decreases (strong system), the system is more stable, although the response is slower than that of the weak system. Therefore the power system strength greatly affects the response time and stability of the STATCOM. If the voltage regulator is set to provide a fast response for a strong system, it may lead to instability for a weak power system, while if the voltage regulator is set to provide a stable response for a weak power system, the response for a strong power system will be very slowand sluggish, as the overall system closed loop gain decreases. Digital Simulation: To demonstrate the effect of the power system strength on the STATCOM stability, an exact digital simulation, using the 48-pulse converter of Fig. 2, was performed by PSB/Simulink. Fig. 7 shows the single line diagram of the simulated power system with the STATCOM. The voltage regulator parameters are K p =0.004 and K i =3 and the regulation slope, k , is 48.3 V/A. The control structure of Fig. 4 was employed. Power system and STATCOM parameters are given in Appendix. ( MVAbase =100)
Fig. 8. Effect of the power system strength on the STATCOM stability, digital simulation.
Fig.9. Effect of the PLL delay on the STATCOM operation, digital simulation.
sudden change in the power system, such as load rejection, it takes about half a cycle of voltage (8.3 ms for Hz) for the PLL to be synchronized with the new voltage phase angle,
system at t = 0.1 Sec with only load 1 in the system. At t = 0.5 Sec load 2 is switched in. The STATCOM is supposed to inject more reactive power, however due to PLL inherent delay, the STATCOM voltage leads the bus voltage for about half a cycle and the real power flows from the dc capacitor to the transmission line and Vde drops sharply. Therefore the STATCOM injected reactive power and hence B2 bus voltage drops sharply at first. At t = 1 Sec, load 3 is switched in and at t = 1.5 Sec loads 1 and 2 are rejected and only load 3 remains connected. When loads 1 and 2 are rejected, the STATCOM is supposed to operate in inductive mode (from capacitive to inductive mode), however due to PLL delay, the STATCOM voltage lags the bus voltage at first and the real power flows from the transmission line to the dc capacitor and it is charged. Thus the STATCOM injects more reactive power (capacitive) and the bus voltage jumps to higher level at t = 1.5 Sec. As the digital simulation shows, due to PLL delay, the STATCOM exhibits one or more strong oscillations when the loads are switched, specially when the STATCOM is operating at high current. Since the previous digital simulations have been performed based on Laplace domain functional model of the STATCOM, and not the actual GTO converter model, the effect of the PLL delay has not been demonstrated by digital simulation. Thanks to the exact modeling, it was possible to
computing the maximum and minimum of I q Ref in intervals of t .The difference between max I q and min I q Ref, I q Ref determines rate of the oscillations. A variable gain 0<k 1 is applied to the voltage regulator, based on I q Ref,. Since the voltage regulator input is the bus voltage error, delay time of the voltage measurement should be considered in selecting t . Besides, other delays such as voltage regulator and STATCOM delays should be considered. For the designed AGC, t was set to 40 ms to account for the above inherent delays. The PLL Oscillation Eliminator block eliminates the oscillation due to the PLL delay so that the AGC does not react to this oscillation. It ignores the first I q Ref, that is more than 1 A. Thus it is ensured that the AGC does not respond to the first PLL oscillation, as it is very large but of very short duration.
A. Digital Simulation With the AGC In order to verify the performance of the AGC in stabilization of the STATCOM, the system of Fig. 7 with the same illustrated loads and same step changes was again simulated, while the STATCOM was equipped with the AGC. The STATCOM is connected to the power system at t=0.1 Sec while both loads are in the system and at t=0.4 Sec, load 1 is rejected. The simulation results for I q Ref , , Vdc and VB 2 are shown in Fig. 11, along with the results of the same system without the AGC, to validate the advantage of the AGC. Fig. 11(a) shows that the voltage regulator is stabilized after a few oscillations and as the result, the STATCOM dc capacitor and B2 bus voltages are stabilized, while the system without the AGC is still oscillating at
As of the STATCOM, two-level, multipulse converters with practical and economical characteristics and low THD are widely used in SSSC applications. Therefore the same 48-pulse converter will be used to investigate the SSSC dynamic performance. The only way to control the magnitude of the converter ac voltage is by the input dc voltage. The dc capacitor voltage control is achieved by a small phase displacement, , beyond the required 90o , between Vs and I L . If Vs lags or leads I L by 90o plus , real power flows from the SSSC to the transmission line and the dc capacitor is discharged. Similarly, if lags or leads I L by 90o minus , real power flows from the transmission line to the SSSC and the dc capacitor is charged. Besides, a small amount of real power from the transmission line is required to compensate the converter switching and coupling transformer losses.
Fig. 15 shows the single line digram of the power transmission system with the SSSC compensation. The power system and SSSC parameters are given in Appendix. The SSSC operates in capacitive mode with X Ref = -0.1 pu. The PI controller parameters are: K p =20 and K i =4 . The simulation results for the SSSC voltage phase, , dc capacitor voltage, Vdc , SSSC reactive power, Qs and series injected reactance, X s , are shown in Fig. 16. The SSSC is switched at t=0.1 Sec, while only load 1 is in the system. The measured before Sec is the reactance of the series coupling transformer which is a small positive value and after the SSSC is switched, it is the reference value which is -01 pu. At t=0.3 Sec load 2 is switched to bus B3 0.6 Sec. Since the SSSC operates in and is rejected at t capacitive mode, the phase angle of Vs is almost o . The 90 0.1 SSSC injects a capacitive reactance of pu in series with
VII. AUXILIARY CONTROL DESIGN An auxiliary regulator, using the dc capacitor voltage,was developed to enhance the dynamic performance of the SSSC. One critical aspect is to select the appropriate control signal. Since the process of losing the synchronization and rapid variations of the dc capacitor voltage occurs very fast, the SSSC series injected voltage, Vs , or reactive power, Qs , can not be selected as the calculation time is long. However, the dc capacitor voltage is
Fig. 17. Block diagram of the auxiliary regulator for the SSSC.
and error it was found that the SSSC would be unstable for > 2.5o and for < 1o it has little effect on the SSSC k performance. Similarly if Vdc < <0 , the dc capacitor is discharging very fast and it shows that Vs lags I L by an amount of more than 90 o for capacitive operation, or leads by more than 90o for inductive operation. Thus the real power flows from the dc capacitor to the transmission line. In this case, if a small negative phase angle, - , is added to , the process of rapid dc capacitor discharging can become slower. Fig. 17 shows the block diagram of the auxiliary regulator for the SSSC dynamic enhancement. Vdc is measured in intervals of t and if | Vdc | >k the output of the Rate Detector becomes nonzero. Depending on the sign of Vdc a positive or negative constant phase angle, , is selected. The final sign of , is determined by the operating mode of the SSSC. The auxiliary regulator
Fig. 18. Dynamic performance of the SSSC with and without the auxiliary regulator, digital simulation
Fig. 19. SSSC performance with and without the auxiliary regulator (load switched in)
Fig. 20. SSSC performance with and without the auxiliary regulator (load switched out)
VIII. CONCLUSION Dynamic performance of the STATCOM and SSSC under various loads was investigated and two control schemes were proposed to enhance their operation. TheAGC is a powerful tool to ensure stable operation of the STATCOMas the power system conditions may change at any time. While the AGC ensures the stability of the STATCOM, it does not affect its normal operation. However, the AGC does not guarantee the optimum gain to obtain the fastest response of the STATCOM for a weak power system. The optimum gain is a function of the power system strength which varies as the loads are switched in or out of the power system or due to generator and transmission line outages. The auxiliary regulator, using the dc capacitor voltage, is an effective tool to improve the dynamic performance of the SSSC. Since it is based on the dc capacitor voltage, it can be easily implemented at the SSSC location and proves to be quite effective in reducing the transient variations of the power system, such as line current and bus voltage. However, the uncontrolled variations in dc capacitor voltage, as the main reason for the SSSC oscillatory operation, can not be fully eliminated. The main reason is the transmission line current transients at load switching instants which causes a quasi dynamic line current. This dynamics of the line current causes an uncontrolled real power exchange between the SSSC and the transmission system, even if they are exactly in phase. A
Transmission Line: Reactance, X l : 0.25 pu (230 kV, 300 MVA) Resistance, Rl : 0.05 pu. Power Transformer: (Y/) Rated Voltage: 230/33kV Rated Power: 300 MVA Leakage Reactance: 0.01 pu. SSSC: Type of Valves: GTO Number of Pulses: 48 Nominal ac Voltage: 6.6 kV Nominal dc Voltage: 1 kV Rated Power: 35 MVAR GTOs Forward Resistance: Capacitor Bank (dc): Total Capacitance: 10 mF Rated dc Voltage: 1 kV. Coupling Transformer: Rated Voltage: 6.6/36 kV Rated Power: 35 MVA Resistance: 0.001 p.u. Leakage Reactance: 0.02 p.u.
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