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ST7 ASM Directi ve Language Summar y

Directive
.BELL BYTE BYTES CEQU .CTRL DATE DC.B DC.W DC.L #DEFINE DS.B DS.W DS.L END EQU EXTERN #ELSE #ENDIF FCS .FORM GROUP #IF #IF1 #IF2 #IFB #IFIDN #IFDEF #IFLAB #INCLUDE INTEL .LALL .LIST #LOAD LOCAL

ST7 ASM Inst ruct ion Set


Syntax Mnemo
ADC d,s ADD d,s AND d,s BCP s,d BRES d,b BSET d,b BTJF d,b,rel BTJT d,b,rel CALL d CALLR d CLR d CP d,s CPL d DEC d HALT INC d IRET JP d JRA d JRT d JRF d JRIH d JRIL d JRH d

ST7 ASM Instruct ion Set (conti nued)


Operation Dest.
A A A A

Description
Ring bell on console Define byte in object code Label type definition: type = byte Equate pre-existing label to expression Send control codes to the printer .BELL

Description
Add with carry, s to d Add s to d Logical AND (d with s) Bit compare A, mem Bit reset d Bit set d Jump if bit is false (0) Jump if bit is true (1) Call subroutine Call subroutine relative Clear d Arithmetic Compare

Source
mem mem mem mem

Flags
H,N,Z,C H,N,Z,C N,Z N,Z

Addr. Modes
2,3,4,5,s,w 2,3,4,5,s,w 2,3,4,5,s,w 2,3,4,5,s,w 3,4,5,s 3,4,5,s

Mnemo
JRULE d LD d,s MUL d,s NEG d NOP OR d,s

Description
Jump if (C+Z = 1) Load s in d Multiply d by s Negate d (logical 2-complement) No operation OR d with s Pop from the Stack Push onto the Stack Reset carry flag Subroutine return Reset interrupt mask

Operation

Dest.

Source

Flags

Addr. Modes
3,5,6 1,2,3,4,5,s,w 1 1,3,4,5,s 1

BYTE <exp or string>, [,<exp or string>...] BYTES label CEQU <equ> .CTRL <ctrl>[,<ctrl>]...

dd+s+C dd+s d d AND s {N,Z} s AND d

Jmp if unsigned mem ds d:s d*s reg, mem mem,reg N,Z A,X,Y X,Y,A H=0,C=0 N,Z,C

d d AND (2**b) mem d d OR (2**b) PC=PC + rel IF (d AND (2**b))=0 PC=PC + rel IF (d AND (2**b))0 mem mem mem mem mem d 00 reg, mem mem N=0,Z=1 N,Z,C N,Z,C=1 N,Z I=0 dd+1 Pop CC, A, X, PC PC d PC PC + d PC PC + d condition false mem mem mem mem reg, mem N, Z H,I,N,Z,C C C

d (d XOR FF) + 1, reg, mem or 00 - d

Define 12-byte ASCII date into object DATE code Define byte(s) in object code. Define word(s) in object code Define long word(s) in object code Define manifest constant Define byte space in object code Define word space in object code Define long space in object code End of source code Equate the label to expression Declare external labels Conditional ELSE Conditional terminator Form constant string Set form length of the listing device Name area of source code Start conditional assembly IF condition that must be satisfied in pass #1 to be true IF condition that must be satisfied in pass #2 to be true DC.B <exp or string>, [,<exp or string>] DC.W <exp>[,<exp>...] DC.L <exp>[,<exp>...] #DEFINE <CONSTANT ID> <real characters> DS.B [optional number of bytes] DS.W [optional number of words] DS.L [optional number of long words] END label EQU <EXPRESSIONS> EXTERN #ELSE #ENDIF FCS <string> |<bytes> [<string> |<bytes>]... .FORM <exp> GROUP <exp> #IF <exp> #IF1 #IF2

d d OR s d (++SP) (SP--) d C=0 MSB(PC) = (++SP) LSB(PC) = (++SP) I=0 7

A reg, CC

mem

N,Z

2,3,4,5,6,s,w

3,4,5,s 3,4,5,s 3,4,5,s,w 3,5,6,s 1,3,4,5,s 2,3,4,5,s,w 1,3,4,5,s 1,3,4,5,s 1 1,3,4,5,s 1 3,4,5,s,w 3,5,6 3,5,6 3,5,6 3,5,6 3,5,6 3,5,6 3,5,6 3,5,6 3,5,6 3,5,6 3,5,6 3,5,6 3,5,6 3,5,6 3,5,6 3,5,6 3,5,6 3,5,6

POP d PUSH d RCF RET RIM RLC d

H, I,N,Z,C 1 reg,CC C=0 1 1 1 I=0 1 1,3,4,5,s

{N,Z,C} = Test(d-s) reg reg, mem reg, mem

Logical complement of d d d XOR FF Decrement d Halt Increment d Interrupt routine return Absolute jump Jump relative always Jump relative if true Never jump dd-1

Rotate left through carry C Rotate right through carry Reset Stack pointer Subtract s from d with carry Set carry flag Set interrupt mask Shift left arithmetic (equal to SLL d = 1) Shift left logical Shift right arithmetic (equal to SLL one) Shift right logical Subtract s from d Swap nibbles Test for Neg & Zero Software trap Wait for interrupt Exclusive OR (d with s)

0 reg, mem

N, Z,C

RRC d RSP SBC d,s SCF SIM SLA d SLL d

0 reg, mem

N, Z,C

1,3,4,5,s 1

SP = Reset Value dd-s-C C=1 I=1


C

mem

N, Z,C C=1 I=1

2,3,4,5,s,w 1 1 1,3,4,5,s 1,3,4,5,s

7 7

0 0

reg, mem

N,Z,C N,Z,C

Jump if Port INT pin = 1 (no port interrupts) mem Jump if Port INT pin = 0 (port interrupt) Jump if H = 1 Jump if H = 0 Jump if I = 1 Jump if I = 0 Jump if N = 1 Jump if N = 0 Jump if Z = 1 Jump if Z = 0 Jump if C = 1 Jump if C = 0 Jump if C = 1 Jump if C = 0 Jump if (C+Z = 0) H = 1? H = 0? I = 1? I = 0? N = 1? (minus) N = 0? (plus) Z = 1? (equal) mem mem mem mem mem mem mem mem

0 reg, mem

JRNH d JRM d JRNM d JRMI d JRPL d JREQ d JRNE d

SRA d

7
0

0 7

C reg, mem

N,Z,C

1,3,4,5,s

Conditional on argument being blank #IFB <arg> Conditional on arguments being iden#IFIDN <arg-1> <arg-2> tical Conditional on argument being defined Conditional on argument being a label Insert external source code file Force Intel-style radix specifier List whole body of macro cells Enable listing (default) Load named object file at link time Define labels as local to macro #IFDEF <exp> #IFLAB <arg> #INCLUDE <filename>

SRL d SUB d,s SWAP d TNZ d TRAP WFI XOR d,s

0 C reg, mem A reg, mem reg, mem mem

N=0,Z,C N,Z,C N,Z N,Z I=1 I=0

1,3,4,5,s 2,3,4,5,s,w 1,3,4,5,s 1,3,4,5,s 1 1 2,3,4,5,s,w

dd-s d(7:4) d(3:0) {N,Z} = Test(d)

Z = 0? (not equal) mem C = 1? C = 0? mem mem

JRC d INTEL .LALL .LIST #LOAD pathname\filename[.ext] LOCAL <arg> JRNC d JRULT d JRUGE d JRUGT d

d d XOR s

mem

N,Z

Jmp if unsigned < mem Jmp if unsigned mem Jmp if unsigned > mem

ST 7 AS M Di re ct iv e L an g ua ge Su mma r y (c on ti nu ed )
Directive
LONG LONGS MACRO MEND

Description
Define long word in object code Default new label length long Define macro template End of macro definition

Syntax
LONG <exp>[,<exp>...] LONGS <macro> MACRO [param-1] [,param-2]... MEND MOTOROLA .NOCHANGE .NOLIST %OUT string .PAGE PUBLIC <arg> REPEAT .SALL |<name>|SEGMENT <align> <combine> <class> [cod] .SETDP <base address>

ST7 ASM Quick Reference Guide

ST7 Addr essing Mode Syntax


Mode
Inherent Immediate Short Long No Offset Short Long Short Long Short Long Relative Relative Bit Bit Bit Bit Direct Direct Direct Direct Direct Indirect Indirect Indirect Indirect Direct Indirect Direct Indirect Direct Indirect Relative Relative Indexed Indexed Indexed Indexed Indexed nop ld A,#$55 ld A,$10 ld A,$1000 ld A,(X) ld A,($10,X) ld A,($1000,X) ld A,[$10] ld A,[$10.w] ld A,([$10],X) ld A,([$10.w],X) jrne loop jrne [$10] bset $10,#7 bset [$10],#7 btjt $10,#7,skip 00..FF 0000..FFFF 00..FF 00..1FE 0000..FFFF 00..FF 0000..FFFF 00..1FE 0000..FFFF PC 127 PC 127 00..FF 00..FF 00..FF 00..FF byte 00..FF byte 00..FF 00..FF 00..FF 00..FF byte word byte word

Syntax

Addressing Mode Range

Ptr Adr Ptr Size Length


+0 +1 +1 +2 +0 +1 +2 +2 +2 +2 +2 +1 +2 +1 +2 +2 +3

MOTOROLA Force Motorola-style radix specifier .NOCHANGE List original #DEFINE strings .NOLIST %OUT .PAGE PUBLIC REPEAT .SALL SEGMENT .SETDP SKIP STRING SUBTTL .TAB TEXAS TITLE UNTIL WORD WORDS .XALL ZILOG Turn off listing Output string to the console Perform a form feed Make labels public Assembly-time loop initiator Suppress all of the body of called macro Start of a new segment Set base address for direct page

A concise listing of the ST7 ASM Instruction Set and Directive Language This quick reference guide gives all the instructions, directives and command line options for the ST7 Assembler. For detailed references on the ST7 Assembler-Linker software and the ST7 Instruction Set, please refer to the ST7 Assembler-Linker User Manual and the ST7 Programming Manual, both available in PDF format on the MCU on CD CDROM.

Inserts given number of bytes with an SKIP <number of bytes>,<value to fill> initialization value Define a byte-level string Define a subtitle for listing heading Set listing field lengths Texas Instruments-style radix specifier Define main title for listing Assembly time loop terminator Define word in object code Default new label length word STRING <exp or string>,[,<exp or string>...] SUBTTL <Subtitle string> .TAB <label>, <Opcode>, <operand>, <comment> TEXAS TITLE <Title string> UNTIL <exp> WORD <exp>[, <exp>...] WORDS

btjt [$10],#7,skip 00..FF

Key t o ST7 ASM I nstructi on Set


Key/Field
d s SP PC CC Destination Source 16-bit Stack pointer Program counter Conditional code register Movement of contents of one location into another A X Y ndx reg mem ext. mem rel b H I N Z C 1 2 3 4 5 6 s w Accumulator register X index register Y index register index register, either X or Y A, X or Y register Memory location Extended memory Relative jump label Bit address within an 8 bit file register Half carry bit Interrupt mask Negative Zero Carry/Borrow Inherent Immediate Direct Indexed Indirect Relative Short Long Rev. 1.0, April 2001

Description

List only code producing macro lines .XALL Force Zilog-style radix specifiers ZILOG Destination/Source/ Other

ST7 Core Description


CPU Registers: Accumulator Increasing memory Addresses X Index Register Y Index Register Program 15 Counter Stack 15 Pointer Condition Code Register 7 7 7 7 0 0 0 0 7 6 5 4 3 2 1 0 1 1 1 H I N Z C Accumulator X Index Register PCH PCL 7 0 Stacking Order: STACK (PUSH) Flags INTERRUPT Decreasing memory Addresses
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics.

RETURN

Addressing Modes

7 6 5 4 3 2 1 0 1 1 1 H I N Z C

UNSTACK (POP)

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Ref.: DOC-ST7ASM-QKREF

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