Computers as Components Principles of Embedded Computing System Design

Wayne Wolf

Princeton University

AMSTERDAM BOSTON HEIDELBERG LONDON NEW YORK OXFORD PARIS SAN DIEGO SAN FRANCISCO SINGAPORE SYDNEY TOKYO ELSEVIER Morgan Kaufmann is an imprint of Elsevier MORGAN KAUFMANN PUBLISHERS

Contents

Foreword List of Examples Preface Chapter 1 1.1 1.2 Embedded Computing Introduction Complex Systems and Microprocessors 1.2.1 Embedding Computers 2 1.2.2 Characteristics of Embedded Computing Applications 5 1.2.3 Why Use Microprocessors? 6 1.2.4 Challenges in Embedded Computing System Design 8 The Embedded System Design Process 1.3.1 Requirements 12 1.3.2 Specification 17 1.3.3 Architecture Design 18 1.3.4 Designing Hardware and Software Components 20 1.3.5 System Integration 20 Formalisms for System Design 1.4.1 Structural Description 22 1.4.2 Behavioral Description 29

vii xix xxiii 1 1 2

1.3

10

1.4

21

ix

Contents

1.5

Design Example: Model Train Controller

32

1.5.1 1.5.2 1.5.3 1.5.4

1.6

Requirements 34 Conceptual Specification 34 Detailed Specification 39 Lessons Learned 47

47

A Guided Tour of This Book

1.6.1 1.6.2 1.6.3 1.6.4 1.6.5 1.6.6 1.6.7 1.6.8

1.7

Chapter 2: Instruction Sets 48 Chapter 3: CPUs 48 Chapter 4: The Embedded Computing Platform 49 Chapter 5: Program Design and Analysis 50 Chapter 6: Processes and Operating Systems 51 Chapter 7: CPU Accelerators 52 Chapter 8: Networks 52 Chapter 9: System Design Techniques 53

Summary What We Learned Further Reading Questions Lab Exercises

54 54 54 54 56 57
57 58

Chapter 2
2.1 2.2

Instruction Sets
Introduction Preliminaries

2.2.1 Computer Architecture Taxonomy 58 2.2.2 Assembly Language 60

2.3 ARM Processor

62

2.3.1 Processor and Memory Organization 63 2.3.2 Data Operations 63 2.3.3 Flow of Control 73
2.4 SHARC Processor

82

2.4.1 Memory Organization 83 2.4.2 Data Operations 83 2.4.3 Flow of Control 93 2.4.4 Parallelism within Instructions 99
2.5 Summary What We Learned

99 100

Contents x i 100 100 104 105 105 106

Further Reading Questions Lab Exercises

Chapter 3 | CPUs

3.1 3.2

Introduction Programming Input and Output

3.2.1 3.2.2 3.2.3 3.2.4 Input and Output Devices 106 Input and Output Primitives 108 Busy-Wait I/O 110 Interrupts 112

3.3

Supervisor Mode, Exceptions, and Traps

3.3.1 3.3.2 3.3.3 Supervisor Mode Exceptions 129 Traps 129 128

128

3.4 3.5

Co-Processors Memorv Svstem Mechanisms 3.5.1 Caches 131 3.5.2 Memory Management Units and Address Translation 139 CPU Performance 3.6.1 Pipelining 145 3.6.2 Superscalar Execution 149 3.6.3 Caching 151 CPU Power Consumption Design Example: Data Compressor 3.8.1 Requirements and Algorithm 158 3.8.2 Specification 161 3.8.3 Program Design 163 3.8.4 Testing 170 Summary What We Learned Further Reading Questions

130 131

3.6

144

3.7 3.8

152 158

3.9

171 172 172 173

XII

Contents

Lab Exercises

176 177 177 178

Chapter 4
4.1 4.2

The Embedded Computing Platfor Introduction The CPU Bus 4.2.1 4.2.2 4.2.3 4.2.4 4.2.5 Bus Protocols 178 DMA 186 System Bus Configurations ARM Bus 190 SHARCBus 191

187

4.3

Memory Devices 4.3.1 4.3.2 4.3.3 Memory Device Organization 194 Random-Access Memories 195 Read-Only Memories 201

193

4.4

I/OIDevices 4.4.1 4.4.2 4.4.3 4.4.4 4.4.5 4.4.6 Timers and Counters 202 A/D and D/A Converters 203 Keyboards 204 LEDs 206 Displays 206 Touchscreens 208

202

4.5

Component Interfacing 4.5.1 4.5.2 Memory Interfacing 209 Device Interfacing 211

209

4.6

Designing with Microprocessors 4.6.1 4.6.2 4.6.3 System Architecture 213 Hardware Design 214 The PC as a Platform 216

212

4.7

Development and Debugging 4.7.1 4.7.2 4.7.3 Development Environments 220 Debugging Techniques 221 Debugging Challenges 227

220

4.8 4.9

Manufacturing Testing Design Example: Alarm Clock 4.9.1 Requirements 233

228 233

Contents xiii

4.9.2 Specification 235 4.9.3 System Architecture 239 4.9.4 Component Design and Testing 240 4.9.5 4.10 System Integration and Testing 241 241 241 242 242 244 Summary What We Learned Further Reading Questions Lab Exercises Chapter 5 5.1
5.2

Program Design and Analysis Introduction Program Design 5.2.1 Design Patterns 246 5.2.2 Design Patterns for Embedded Systems 248 Models of Programs 5.3.1 Data Flow Graphs 252 5.3.2 Control/Data Flow Graphs 254 Assembly and Linking 5.4.1 Assemblers 259 5.4.2 Linking 264 Basic Compilation Techniques 5.5.1 Statement Translation 267 5.5.2 Procedures 273 5.5.3 Data Structures 274 5.5.4 Expression Simplification 275 5.5.5 Dead Code Elimination 277 5.5.6 Procedure Inlining 277 5.5.7 Loop Transformations 278 5.5.8 Register Allocation 280 5.5.9 Scheduling 285 5.5.10 Instruction Selection 287 5.5.11 Understanding and Using Your Compiler 288 5.5.12 Interpreters and IIT Compilers 289 Analysis and Optimization of Execution Time 5.6.1 Elements of Program Performance 292

245 245 246

5.3

252

5.4

258

5.5

265

5.6

290

xiv Contents 5.6.2 5.6.3 5.7 5.8 5.9 Trace-Driven Performance Analysis 296 Optimizing for Execution Speed 304 305 310 312

Analysis and Optimization of Energy and Power 5.7.1 Program Energy Consumption and Optimization 306 Analysis and Optimization of Program Size Program Validation and Testing 5.9.1 Clear-Box Testing 313 5.9.2 Black-Box Testing 322 5.9.3 Evaluating Function Tests 323 5.9.4 Performance Testing 324 Design Example: Software Modem 5.10.1 Theory of Operation and Requirements 325 5.10.2 Specification 328 5.10.3 System Architecture 328 5.10.4 Component Design and Testing 329 5.10.5 System Integration and Testing 329 Summary What We Learned Further Reading Questions Lab Exercises

5.10

325

5.11

330 330 331 331 339 341 341 343

346

Chapter 6 6.1 6.2

Processes and Operating Systems Introduction Multiple Tasks and Multiple Processes
6.2.1 6.2.2 Multirate Systems 345 Early Multitasking Technology: The Co-Routine

6.3 6.4

Processes Context Switchina 6.4.1 Cooperative Multitasking 351 6.4.2 Preemptive Multitasking 356 6.4.3 Processes and Object-Oriented Design 357 Operating Systems 6.5.1 Process State and Scheduling 358

347 351

6.5

358

Contents xv 6.5.2 6.5.3 6.5.4 6.5.5 6.6 Operating System Structure 361 Timing Requirements on Processes 362 Interprocess Communication 365 Other Operating System Functions 371
371

Scheduling Policies 6.6.1 Rate-Monotonic Scheduling 372 6.6.2 Earliest-Deadline-First Scheduling 377 6.6.3 RMS versus EDF 382 6.6.4 A Closer Look at Our Modeling Assumptions 383 6.6.5 Other POSIX Scheduling Policies 386 Interprocess Communication Mechanisms 6.7.1 Signals 387 6.7.2 Signals in UML 389 6.7.3 Shared Memory Communication 389 6.7.4 Message-Based Communication 392 Evaluating Operating System Performance Power Optimization Strategies for Processes Design Example: Telephone Answering Machine 6.10.1 Theory of Operation and Requirements 400 6.10.2 Specification 404 6.10.3 System Architecture 406 6.10.4 Component Design and Testing 408 6.10.5 System Integration and Testing 409 Summary What We Learned Further Reading Questions Lab Exercises

6.7

387

6.8 6.9 6.10

393 396 400

6.11

409 410 410 410 417 419 419 420

Chapter 7 7.1 7.2

Hardware Accelerators Introduction CPUs and Accelerators 7.2.1 Why Accelerators? 421 7.2.2 Accelerator Design 423 Accelerated System Design

7.3

424

xvi

Contents

7.3.1 7.3.2 7.3.3 7.3.4 7.3.5 7.4

Performance Analysis 424 System Architecture Framework 429 Partitioning 432 Scheduling and Allocation 434 System Integration and Debugging 437 437

Design Example: Video Accelerator 7.4.1 Algorithm and Requirements 437 7.4.2 Specification 441 7.4.3 Architecture 441 7.4.4 Component Design 443 7.4.5 System Testing 444 Summary What We Learned Further Reading Questions Lab Exercises

7.5

445 446 446 446 447 449 449 450

Chapter 8
8.1 8.2

Networks Introduction Distributed Embedded Architectures 8.2.1 Why Distributed? 451 8.2.2 Network Abstractions 452 8.2.3 Hardware and Software Architectures 453 8.2.4 Message Passing Programming 457 Networks for Embedded Systems 8.3.1 TheI2CBus 459 8.3.2 The CAN Bus 464 8.3.3 SHARC Link Ports 467 8.3.4 Ethernet 470 8.3.5 Myrinet 472 8.3.6 Internet 473 Network-Based Design 8.4.1 Communication Analysis 475 8.4.2 System Performance Analysis 481 8.4.3 Hardware Platform Design, Allocation, and Scheduling 482 Internet-Enabled Systems

8.3

458

8.4

475

8.5

484

Contents xvii 8.6 Design Example: Elevator Controller 8.6.1 Theory of Operation and Requirements 487 8.6.2 Specification 489 8.6.3 Architecture 491 8.6.4 Testing 492 Summary What We Learned Further Reading Questions Lab Exercises Chapter 9 9.1 9.2 System Design Techniques Introduction Design Methodologies
9.2.1 9.2.2 Why Design Methodologies? 498 Design Flows 500

486

8.7

493 493 493 494 496 497 497 498

9.3 9.4

Requirements Analysis Specifications

9.4.1 9.4.2 Control-Oriented Specification Languages Advanced Specifications 512 509

507 509

9.5 9.6

System Analysis and Architecture Design

9.5.1 CRC Cards 516

515 520

Quality Assurance 9.6.1 Quality Assurance Techniques 523 9.6.2 Verifying the Specification 525 9.6.3 Design Reviews 527 9.6.4 Measurement-Driven Quality Assurance 530 Design Example: Telephone PBX 9.7.1 Theory of Operation 535 9.7.2 System Architecture 537 Design Example: Ink jet Printer 9.8.1 Hardware Design 542 9.8.2 Software Design 546

9.7

534

9.8

539

xviii

Contents

9.9 9.10 9.11 9.12

Design Example: Personal Digital Assistants Design Example: Set-Top Boxes Systems-on-Silicon Summary What We Learned Further Reading Questions Lab Exercises

548 551 555 557 557 558 558 559 561 561 561 562

Appendix A A.I A.2 A.3

UML Notations Introduction Primitive Elements Diagram Types A.3.1 Class Diagram 563 A.3.2 State Diagram 564 A.3.3 Sequence and Collaboration Diagrams 565 Notes on Hardware Design Introduction Combinational Logic Sequential Logic B.3.1 Memory Elements 571 B.3.2 Synchronous Machines 573 B.3.3 Asynchronous Machines 576 Implementation Media Glossary References Index About the CDs

Appendix B B.I B.2 B.3

567 567 567 571

B.4

577 579 601 613 657