Working With Building Blocks/Function

Name: Sidhanta Baral Pham Huy Nguyen Pulak Bhushan Suresh Khadka Lab Instructor: Mr. Manh Date: 26/3/2012

Objectives: To learn about

Set/Reset, Reset/Set Counter-Up, Counter-Down On-Delay timer(SD), Retentive On-Delay timer(SS), Pulse timer (SP), Extended Pulse timer (SE), and Off-Delay timer (SF) by using PLC.

Circuit Diagram: Flip-flop:

Figure 1: The above figure is representing the circuit diagram of Flip-flop circuit.

Timer:

Figure 2: The above figure is representing the circuit diagram of Timer circuit.

Counter:

Figure 3: The above is representing the circuit diagram of counter circuit.

Test Cases:
The circuits below is representing different testes cases.

Test 1: SET-RESET and RESET-SET

SET-RESET
When we turn on I0.0, the function SET Q0.0 on, if you turn off I0.0 is still on Q0.0 will be off when you turn on I0.1 o If you turn on both I0.0 and I0.1, the output Q0.0 is off therefore this block has the property of RESET priority. o

1. Why does it happen that Q0.0 is reset when both I0.0 and I0.1 are turned on?
Ans: SR so reset has highest priority

RESET-SET
o o When turn on I0.3, the function set Q0.1 on, if you turn off I0.3 Q0.1 is still on Q0.1 will be off when you turn on I0.2 If you turn on both I0.2 and i0.3, the out output Q0.1 is on therefore this block has the property of set priority. Why does it happen that Q0.1 is set when both I0.2 and I0.3 are turned on? Ans : RS so set has highest priority.

2.

Figure: SR-RS Flip Flop

Test 2: UP-COUNTER (CU) and DOWN-COUNTER (CD)

UP-COUNTER (CU):
o If you turn on I1.0 then you will see that Q1.0 is on. The value at NW10 is 16#0001 and the value at MW12 is C#001. Both of these mean that the counter value is 1. Keeping I1.0 on will not make the counter value increased. The counter value is increased only when I1.0 is from off-on. If you turn it off and on again then you see the value of MW10 now 16#002 and value of MW22 now C#002. Both of them mean that the counter value is 2. Turn on I1.0 you will see that Q1.0 is on and the value MW10 is 16#0010. The value MW12 is C#010. When you turn on I1.1 then the counter value will be set with CV. Now if you turn on I1.0 the counter value will be increased to 16. Turn off both I1.1 and I1.0. I1.2 is rest. Counter value and output will be reset to 0. This has the highest priority. Once it is on, the other inputs could not affect the counter. You turn off I1.2 now.

What is the maximum number that one up-counter could count? Ans: Max number = 999 4. Please modify the value at CV to C#995, and then you set the counter value to 955 by turning on I1.1. You then make the counter work by ON-OFF I1.0 many times. Observe the value at MW10 and MW12, at which value MW10 and MW12 stay? Ans: MW12 = 999. MW10 = 03e7 5. What could we do if we want to count more than 999 (just general solution)? Ans: Add another counter (Counter 2) in another network that counts. Then read the memory location of the saved count from Counter 1. Add both values together. Basically I mean Cascading Counters to counter up higher

3.

DOWN-COUNTER (CD): o If you turn on I2.0 then you will see that Q2.0 is off. The value at Mw10 is 16#0000 and the value at MW12 is C#000. Both of these mean that the counter value now is 0. The default value in the counter word is zero and the CD could not count not count less than zero, that is why it seems that the counter is not active. The output is off when ever the counter value is zero. Turn off I2.0 o Turn on I2.1 you will see that Q2.0 is on and the value MW20 is 16#000F. The value MW22 is C#015. What we can see from here. When we turn on I2.1 then the counter value will be set with CV (15). Now if you turn on I2.0 the counter value will be increased to 16. 6. Could a counter count down less than zero or not? Ans: No it cannot count down to negative numbers.
7. When is the output of a counter ON and when it is off in general? Ans: It is on when the initial count number is set (Using I2.1). It is off before the initial count number is set and whenever a reset signal is sent.

Figure: Up and Down Counter

Test 3: TIMER

Figure: Timer

Case 1: we turned on I0.1 for more than 5 second, so in result we got that the timer is reached the maximum value. Case 2: If I0.1 is turned on and kept on for less than 5 secon then the timer gets turnoff before it counts second, 5 sec. Case 3: If we reset the timer during its run, the timer will get reset to its initial value regards less of the on itial status of I0.1. We repeated the same process for all kind of timer and we found the time diagram for them as follows.

Figure: S-Pulse Timing Diagram

Figure: Extended Pulse Timer

Figure: Delay Timers Timing Diagram

Figure: Latch Timer Timing Diagram

Figure: Off Timer Timing Diagram

Conclusion
From this lab, we learned about the SR, and RS Flip F Flop, Up and Down counters and different types of s timer. We used the different cases to see how they work and how can we use them in our real life.