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EEE 310 OPERATIONAL AMPLIFIERS

AND ACTIVE NETWORKS
LECTURE NOTES























By
Olawale B. Akinwale,
Department of Electronic & Electrical Engineering,
Obafemi Awolowo University, Ile-Ife,
Osun State, Nigeria.



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TABLE OF CONTENT
EEE 310 OPERATIONAL AMPLIFIERS AND ACTIVE NETWORKS ...................................................... 1
TABLE OF CONTENT ................................................................................................................................................. 2
1. INTRODUCTION ............................................................................................................................................. 1
1.1 Signals .................................................................................................................................................................... 1
1.2 Classification of Signals ....................................................................................................................................... 3
1.2.1 Digital vs. Analogue ............................................................................................................................................. 3
1.2.2 Continuous-time vs. Discrete-time ................................................................................................................... 4
1.2.3 Hazy Part of the Classification........................................................................................................................... 4
1.3 System Response .................................................................................................................................................. 5
1.4 Linearity vs Non-linearity ................................................................................................................................... 5
2. AMPLIFIERS ....................................................................................................................................................... 7
2.1 Types of Amplifiers ............................................................................................................................................. 7
2.1.1 Signal Amplifier .................................................................................................................................................... 7
2.1.2 Power Amplifier ................................................................................................................................................... 7
2.2 Amplifier Circuit Symbol .................................................................................................................................... 7
2.3 Amplifier Gain ...................................................................................................................................................... 8
2.3.1 Voltage Gain ......................................................................................................................................................... 8
2.3.2 Current Gain ......................................................................................................................................................... 9
2.3.3 Power Gain ........................................................................................................................................................... 9
2.3.4 Decibel values of Voltage, Current and Power Gains ................................................................................... 9
2.3.5 DC Supply to an Amplifier ............................................................................................................................... 10
2.3.6 Amplifier Saturation .......................................................................................................................................... 11
2.3.7 Other Non-linearities and Biasing ................................................................................................................... 13
2.4 Controlled Source Models ................................................................................................................................ 16
2.4.1 Voltage-Controlled Voltage Source (VCVS) ................................................................................................. 16
2.4.2 Voltage-Controlled Current Source (VCIS) ................................................................................................... 18
2.4.3 Current-Controlled Voltage Source (ICVS) ................................................................................................... 19
2.4.4 Current-Controlled Current Source (ICIS) .................................................................................................... 19
2.5 Cascading amplifiers .......................................................................................................................................... 20
2.6 Frequency Response Consideration ................................................................................................................ 21
2.7 Single-Time-Constant (STC) Network ........................................................................................................... 23
3. OPERATIONAL AMPLIFIERS ................................................................................................................... 30
3.1 The Ideal Op-Amp ............................................................................................................................................ 31
3.1.1 The Inverting Amplifier .................................................................................................................................... 33
3.1.2 The Non-inverting Amplifier ........................................................................................................................... 34


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3.2 Applications of Op-amps (Linear Circuits) ................................................................................................... 37
3.2.1 The Weighted Summer or Linear Combination Circuit .............................................................................. 37
3.2.2 The Difference Amplifier ................................................................................................................................. 40
3.2.3 The Instrumentation Amplifier ....................................................................................................................... 43
3.2.4 Voltage Controlled Current Sources ............................................................................................................... 47
3.2.5 Current Controlled Sources .............................................................................................................................. 49
3.3 The Practical (or Real) Op-Amp ..................................................................................................................... 50
3.3.1 Effect of Finite Open-Loop Gain ................................................................................................................... 51
3.3.2 Effect of Real Input Resistance ....................................................................................................................... 53
3.3.3 Effect of Non-zero Output Resistance .......................................................................................................... 54
3.3.4 Effect of Finite Bandwidth ............................................................................................................................... 56
3.4 Negative Feedback ............................................................................................................................................. 57
3.5 Noise Gain .......................................................................................................................................................... 59
3.6 Noise in Operational Amplifiers ..................................................................................................................... 60
3.6.1 Shot Noise or Schottky Noise ......................................................................................................................... 60
3.6.2 Thermal Noise .................................................................................................................................................... 60
3.6.3 Flicker Noise ....................................................................................................................................................... 61
3.6.4 Burst Noise ......................................................................................................................................................... 61
3.6.5 Avalanche Noise ................................................................................................................................................ 61
3.7 Other Issues with Real Op-Amps ................................................................................................................... 62
3.7.1 Slew rate. .............................................................................................................................................................. 62
3.7.2 Common Mode Rejection Ratio ...................................................................................................................... 62
3.7.3 Input Offset Voltage, Input Bias Current and Input Offset Current ........................................................ 62
3.7.4 Drift ...................................................................................................................................................................... 63
3.7.5 Power-supply rejection ratio ............................................................................................................................ 63
3.8 A Word on Op-Amp Ratings ........................................................................................................................... 64
3.8.1 Maximum Differential Supply Voltage ........................................................................................................... 64
3.8.2 Power dissipation, Pd ........................................................................................................................................ 64
3.8.3 Maximum Power Consumption ...................................................................................................................... 64
3.8.4 Maximum Input Voltage ................................................................................................................................... 64
3.8.5 Differential Input Voltage ................................................................................................................................ 64
3.8.6 Maximum Operating Temperature ................................................................................................................. 64
3.8.7 Minimum Operating Temperature .................................................................................................................. 64
3.8.8 Maximum Output Voltage Swing .................................................................................................................... 64
4. APPLICATIONS OF OPERATIONAL AMPLIFIERS .......................................................................... 65
4.1 Integrator ............................................................................................................................................................. 65
4.2 Differentiator ...................................................................................................................................................... 67
4.3 Phase Shift Circuit.............................................................................................................................................. 68


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4.3.1 All-Pass Phase Lag Circuit ................................................................................................................................ 68
4.3.2 All-Pass Phase Lead Circuit .............................................................................................................................. 69
4.4 Comparators ....................................................................................................................................................... 70
4.4.1 Simple Comparator ............................................................................................................................................ 70
4.4.2 Schmitt Trigger Circuit ...................................................................................................................................... 71
4.5 Signal Processing ................................................................................................................................................ 73
4.5.1 Half-wave Rectification ..................................................................................................................................... 73
4.5.2 Non-saturating Half-wave Rectifier ................................................................................................................ 74
4.5.3 Full-wave Rectification ...................................................................................................................................... 75
4.5.4 Voltage Regulator ............................................................................................................................................... 76
4.5.5 Clipping or Limiting Circuits ........................................................................................................................... 77
4.5.6 Clamping Circuits ............................................................................................................................................... 77
4.6 Logarithmic Amplifier ....................................................................................................................................... 78
4.7 Active Filters ....................................................................................................................................................... 79
4.7.1 Filter Transfer Function .................................................................................................................................... 82
4.7.2 Butterworth Filter Responses .......................................................................................................................... 83
4.7.3 Passive Filters ..................................................................................................................................................... 84
4.7.4 Active Filters ....................................................................................................................................................... 89
4.8 Holding Circuits ................................................................................................................................................. 95
4.8.1 Peak Detector ..................................................................................................................................................... 95
4.8.2 Envelope Detector ............................................................................................................................................. 95
4.8.3 Sample and Hold Circuit ................................................................................................................................... 96
4.9 Data Conversion ................................................................................................................................................ 97
4.9.1 Analogue-to-Digital Conversion...................................................................................................................... 97
4.9.2 Digital-to-Analogue Conversion...................................................................................................................... 99
BIBLIOGRAPHY ......................................................................................................................................................... 101



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1. INTRODUCTION
1.1 Signals
A signal can be defined as detectable transmitted energy that can be used to carry information. Put in
another way, a signal is a time-dependent variation of a characteristic of a physical phenomenon, used to
convey information. For example, a signal could be the current flowing through a light dependent resistor
(LDR), giving information about the amount of illumination in the LDRs environment. Another signal
could be the colour of a methyl orange solution indicating the pH of the solution. Signals discussed in this
course will be restricted simply to voltage signals and current signals. Hence, in this course, a signal will be
either a voltage or a current.
There are two common ways in which signals are represented:
i. Time-domain representation; and
ii. Frequency-domain representation.
The time-domain representation is the representation which you are more likely than not most familiar with.
Here, the signal is represented as a function of time. The plot of the signal is a plot of its magnitude against
time. Figure 1.1 shows a time-domain representation of a signal. The signal in figure 1.1 is ( )
( )
t
t
t y
sin
=

Figure 1.1: Time-domain representation of a signal
Mathematically, the signal is represented as ( ) t y to show that it is a time-domain signal. We may represent
this same signal in the frequency-domain. When it is represented in the frequency-domain as a function of
frequency f, it is represented mathematically as ( ) f Y . Representations in the frequency-domain are often
not represented in terms of f. Often times the representation is made in terms of the angular frequency, or
the complex Laplace variable, s.
The frequency-domain representation of a signal is a representation of the magnitudes of the individual
frequency components which the signal has in it. The Fourier series decomposition or Fourier transform of a
time-domain signal gives the frequency components of the signal. For example, a sine wave is a signal which
has only one frequency. Hence, the signal ( ) ( ) t A t y e sin = is a signal which has an angular frequency of
or a frequency of f ( f t e 2 = ). ( ) t y can be expressed in the frequency-domain as shown in figure 1.2.
0 5 10 15 20 25
-0.5
0
0.5
1
t
y
(
t
)


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Figure 1.2: Frequency-domain representation of ( ) ( ) t A t y e sin =
Every periodic signal can be represented as a sum of sinusoidal waves. For example, a square wave, ( ) t y
sq

whose peak-to-peak amplitude is 2A (i.e. A/+A) can be represented as
( )
|
.
|

\
|
+ + + + = t t t t
A
t y
sq
e e e e
t
7 sin
7
1
5 sin
5
1
3 sin
3
1
sin
4
Equation 1.1
Equation 1.1 is called the Fourier series expansion of the square wave. Figure 1.3 shows the time domain and
frequency-domain representation of ( ) t y
sq
.

Figure 1.3: Frequency-domain representation of the square wave signal
When the frequency-domain representation of a signal has discrete values only at discrete frequencies, the
plot is usually made with arrows as shown in figures 1.2 and 1.3. This is usually the case for periodic signals.
Non-periodic signals can often not be represented as a sum of sinusoids, but their frequency-domain
representation can be found by finding their Fourier transform. The frequency-domain representation for
non-periodic signals is often made with line plots. An example is the frequency-domain for a low-pass filter
shown in figure 1.4.
t
A 4
Freq (rad/sec)
t
A 4
3
1

t
A 4
5
1

t
A 4
7
1

e
e 3 e 5

e 7

.
A
A

Amplitude


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Figure 1.4: Frequency-domain representation of a Low-Pass Filter
We will leave the full discourse about Fourier series and Fourier transforms to EEE 306 and CHE 306
where they will be properly handled. This is mentioned here because the frequency-domain representation of
signals will be useful to us later in this course.
1.2 Classification of Signals
Signals can be classified in a number of ways.
1.2.1 Digital vs. Analogue
Most of the signals in the world around are analogue signals. An analogue signal is a signal whose magnitude
varies in a continuous way over its range of values. Figure 1.1 illustrates an analogue signal. The magnitude
of the signal can take an infinite number of values between its greatest peak, which is about 0.8, and its
lowest peak, about -0.45. Between these two values, the number of different values which the magnitude of
the signal assumes is only dependent on the resolution with which you are measuring it.
Digital signals, on the other hand are signals which can assume only one of a defined set of values. The
simplest form of digital signals is a binary signal which can assume only of two values: 0 or 1. With binary
signals, the 0 is called a low and 1 is called a high. If the binary signal is a voltage, more often than not
(though this is not nearly always the case), a low would represent 0 volts and a high would represent 5 volts.
Note that this is not strictly true in the sense that the low and the high are actually ranges which are
approximated as 0 V and 5 V. Note also that digital signals are not always binary signals. Figure 1.2
represents a digital signal whose value is limited to the set of decimal numbers.

Figure 1.5: A digital signal
0 2 4 6 8 10 12
0
1
2
3
4
5
6
7
8
Frequency
Amplitude


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Note also that a digital signal can also be defined, though with less accuracy, as a signal whose magnitude
varies in discrete steps over its range of values.
1.2.2 Continuous-time vs. Discrete-time
The classification which classes signals as being analogue or digital classifies them based on the continuity of
the values of their magnitudes. Another classification can be done which classifies signals according to how
continuous their time axes are. A discrete-time signal is one which is defined only at specific points in time,
called sampling intervals. For example, if the temperature in a room is measured every 30 mins, then the
representation of the temperature of room is a discrete-time representation. A continuous-time signal, on the
other hand, is one which is defined continuously in time. Note that a signal can be converted from being a
continuous-time one to a discrete-time one by sampling (or measuring the value of) the signal at specific time
intervals (called sampling intervals). Figure 1.6 shows a continuous time signal and figure 1.7 shows the
discrete-time representation of the signal in figure 1.6.

Figure 1.6: Continuous-time plot of sin(t)

Figure 1.7: Discrete-time plot of sin(t)
1.2.3 Hazy Part of the Classification
Often times, the classification of signals as discrete-time or digital becomes hazy. In the strictest sense of
things, an analogue signal may be continuous-time or discrete-time. However, generally, analogue signals are
assumed to be continuous-time i.e. their magnitudes and times vary continuously. Also, while in the strictest
sense, digital signals can be both continuous-time and discrete-time, generally, when a signal is said to be
digital, it implies that both its magnitude and time vary discretely. Unless otherwise stated, in this course,
well use this general usage of the words analogue and digital.
Hence, to convert a signal from being analogue to being digital, the following is done:
-6 -4 -2 0 2 4 6
-1
-0.5
0
0.5
1
t
sin(t)
A
m
p
l
i
t
u
d
e
-6 -4 -2 0 2 4 6
-1
-0.5
0
0.5
1
Discrete plot of sin(t)
t
A
m
p
l
i
t
u
d
e


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i. Discretize the signal: This is done by sampling the signal. By sampling is meant measuring
or finding the magnitude of the signal at certain discrete points in time. This process produces a
discrete-time signal from the originally continuous-time signal.
ii. Quantize the discrete-time signal: A mentioned earlier, in the strictest sense, after
discretizing the signal, its magnitude is still continuous. The process of quantization takes each
sample of the signal measured to the nearest value among the defined set of values which it can
take. The result of this process is a digital signal.
An electric circuit which takes in an analogue input and gives out a digital output is called an analogue-to-
digital converter or ADC. One which converts a digital signal into its analogue counterpart is called a
digital-to-analogue converter or DAC.
1.3 System Response
A system is an integrated assemblage of hardware and/or software elements operating together to
accomplish a prescribed end purpose. This course deals with systems more as an assemblage of hardware
components which are interconnected to perform a prescribed function. Generally, for every system, there is
a specified set of dynamics variables called inputs or excitations and another set of outputs or responses. The
outputs or responses of the system depend on the system parameters and the input variables. Hence, the
name responses (they are a response of the system to the inputs).
With systems, our interest often is in the relationship between the inputs and outputs the system. It is often
convenient to represent the system simply schematically as a black box. The word black box refers to a
concept of a box whose contents are unknown to the user. Hence, we are often interested in knowing the
relationship between the inputs and outputs of the system without any regard to the components and
interconnections of the components in the system. Figure 1.8 shows a system represented as a black box.

Figure 1.8: Black box representation of a system
The system shown in figure 1.8 can be represented mathematically as
( ) ( ) t Hx t y = Equation 1.2
In equation H is called the system characteristic of the system or the transfer characteristic of the system
or the transfer function of the system. In the time domain, the system characteristic is H(t) while in the
frequency-domain, the system characteristic is defined as H(s).
1.4 Linearity vs Non-linearity
A linear system is one which obeys the superposition theorem. The superposition theorem states that a
system is linear iff:
( ) ( ) ( )
2 1 2 1
x f x f x x f | o | o + = + Equation 1.3
where and are constants and
1
x and
2
x are the input signals.
H
Inputs
y(t)
x(t)
System Outputs


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The graph of the response of a linear system is a straight line. The response of a system is the plot of the
output of the system against the input of the system. The output of a linear system is equal to or directly
proportional to the value of input. Thus, the graph of the response function is a straight line over the range
of normal operating values.
An example of a linear system is a resistor. According to ohms law, the relationship between the current
through a resistor and the voltage across it is a linear one. The current is always given as
R
V
I = Equation 1.4
As you already know, the I-V characteristic of a resistor is linear in nature, simply a straight line whose slope
is the resistance of the resistor.
Most (if not all) devices in nature, however, exhibit both non-linearity and linearity. Whether the response is
linear or not is dependent on the value of the input signal. If the input lies within a specific range of inputs,
the response of the system to them would be linear but if it lies outside this range, the response of the
system would not be linear. For example, the I-V characteristic of an ideal diode is as shown in figure 1.9. As
can be seen, with the input voltage below 0.6 V, the output of the diode remains at zero. For values above
0.6, there is a linear relationship between the input and the output of the diode. Hence, the diode is linear for
values of voltage above 0.6 volts, but is non-linear over the range of voltages from 0 V to 10 V.

Figure 1.9: I-V characteristic of an ideal diode
This phenomenon exists in most devices. Most systems respond linearly to inputs within a defined range, but
non-linearly to any signals outside that range of signals. Figure 1.9 is actually not complete in the sense that
there exists a certain maximum value which can flow through the diode. Hence even increasing the voltage
across the diode beyond this point, the current flow will not increase. This phenomenon is called saturation
and all devices exhibit saturation. Hence, even the resistor which is largely a linear device will exhibit the
non-linearity of saturation if the voltage across it is increased beyond a certain limit. It is therefore very
important to know the response or behaviour of a system, its limit of non-linearity and the type of non-
linearity which it exhibits at which point.
Note that the diodes non-linearity of giving out zero current between 0 V and 0.6 V is a different type of
non-linearity from saturation. Other types of non-linearity exist also. The only other which would be useful
to us in this course and hence is worth mentioning here is the logarithmic response of a system. A
logarithmic system is one in which the relationship between the input and output of the system is logarithmic
in nature. The response of an amplifier is generally a logarithmic one. We will see this later in this course.

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5


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2. AMPLIFIERS
One of the most important applications in the field of linear electronics is the process of amplification. An
amplifier is a device which increases the magnitude of a signal. An ideal amplifier is characterized by the fact
that its output signal is directly proportional to its input signal, but with the magnitude of the signal changed
in the process. With an ideal amplifier, the output is an exact replica of the input signal, the only difference
being that the magnitude of the output is larger than that of the input.
( ) ( ) t Av t v
i o
= Equation 2.1
An ideal amplifier is a linear amplifier an amplifier with a linear response. If the response of an amplifier is
non-linear, distortion will occur. Distortion occurs when the information contained in a signal is changed
i.e. when new information is introduced into the signal or some information is removed from the signal.
When distortion occurs, the output of the amplifier is not a perfect replica of the input signal.
2.1 Types of Amplifiers
2.1.1 Signal Amplifier
Usually, this amplification is necessitated because of a very low (weak) signal generated by a transducer. It
becomes necessary to process these signals which on their own are too weak and contain very low energy to
be handled on their own.
A signal amplifier is a system that amplifies a weak signal to a reasonable magnitude required. In small signal
amplification, the aim is to amplify (increase the magnitude of) the signal and effort should be made so that
signal is not distorted.
Signal amplifiers are generally regarded to and thought of as voltage amplifiers because their purpose is to
increase the magnitude of signals.
2.1.2 Power Amplifier
The amplifier we have just considered is a voltage or signal amplifier. It is expected to be linear. A power
amplifier is an amplifier which provides substantial current gain with a modest amount of voltage
amplification. The main use of the power amplifier is to deliver large amount of power in its output while
absorbing the little power input from the input signal. Power amplifiers supply much larger currents than do
signal amplifiers and hence they are useful when one desires to use a low power signal to drive a large system
requiring an input signal with significant power. An example of a power amplifier is an amplifier used in a
public address system which takes the low powered signal coming from a microphone and amplify them to
drive loudspeakers.
Practical Application:
Have you ever noticed that during a public function, while the sound coming from the loudspeakers may be
good during a speech, often times, it sounds distorted once music starts playing? Why do you think this is
so? What do you think can be done in such a case to improve the sound coming from the loudspeakers?
2.2 Amplifier Circuit Symbol
An amplifier is a 2-port network. Figure 2.1 shows the circuit symbol of an amplifier. The symbol helps to
distinguish the input from the output and also indicate the direction of flow of signal. In figure 2.1 (b), the
common ground is used as a reference point and is called the circuit ground.


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Figure 2.1: (a) Circuit symbol for an amplifier (b) amplifier with a common ground between the
input and output ports.
2.3 Amplifier Gain
2.3.1 Voltage Gain
A signal amplifier increases the voltage of a signal. The gain in equation 2.1, a voltage gain, is often written as
v
A . Hence, the voltage gain is defined as
( )
( )
i
o
i
o
v
v
v
t v
t v
A = = Equation 2.2
Figure 2.2 shows a voltage amplifier. The voltage across the load
L
R is always
v
A times the input voltage
i
v . The transfer characteristic of this system is shown in figure 2.3.

Figure 2.2: A voltage amplifier

Figure 2.3: Transfer characteristic of a linear voltage amplifier
While voltage gain is obviously dimensionless, it is often given the unit V/V.
0
v
A
o
v

i
v
1
+


_
o
v

i
v
+
_
L
R
i
i
o
i
v
A
input
input
output
output
(a)
(b)


Page | 9
2.3.2 Current Gain
The current gain of an amplifier is given as
i
o
i
i
i
A = Equation 2.3
o
i is the current which the amplifier delivers to the load. As can be seen from figure 2.2,
L
o
o
R
v
i = . The
current which the amplifier draws from the signal source is called
i
i . Again, though current gain is
dimensionless, it is often given the unit A/A.
2.3.3 Power Gain
An important feature which distinguishes an amplifier from a transformer is that power is also amplified. In
an ideal transformer, the output power is equal to the input power and hence the turns ratio can be
calculated from a ratio of output and input voltages or from the output and input currents. The same result
would be obtained in both cases. In an amplifier however, the current gain and the voltage gain are two
distinct quantities. The output power is greater than the input power.
The power gain of a system is given as
( )
( )
i i
o o
i
o
p
i v
i v
P
P
A = =
power input
power output
Equation 2.4
Hence,
i v p
A A A = Equation 2.5
Power gain is often given the unit W/W though it also is a dimensionless quantity.
2.3.4 Decibel values of Voltage, Current and Power Gains
It is often more convenient to represent the three gains described above by their decibel values. The decibel
value of the power gain is defined as
( )
p
i
o
p
A
P
P
dB A
10 10
log 10 log 10 = = Equation 2.6
Now,
2
V P . Hence, in decibels, the voltage gain is
( )
v
i
o
i
o
v
A
v
v
v
v
dB A
10 10
2
2
10
log 20 log 20 log 10 = = = Equation 2.7
In the same vein, since
2
i P , the current gain in decibels is
( )
i
i
o
i
o
v
A
i
i
i
i
dB A
10 10
2
2
10
log 20 log 20 log 10 = = = Equation 2.8
Note from these decibel values that unity gain gives zero dB. Amplification gives positive values in decibels
and attenuation gives negative values in decibels. Note that the gain in V/V, A/A or W/W may be negative
particularly if the input and output signals are 180 out of phase. Hence, to find the decibel values of gain,
the absolute value of the dimensionless gain is used. This suggests one benefit of the decibel representation
of the gain of an amplifier:


Page | 10
The decibel value of the gain of an amplifier is immune to the phase shifts which may occur within the
amplifier.
Example 2.1
An amplifier has a voltage gain of 100 V/V and a current gain of 1000 A/A. Express the voltage and current
gains in decibels and find the power gain.
Solution:
Voltage Gain in dB = dB 40 100 log 20
10
=
Current Gain in dB = dB 60 1000 log 20
10
=
Power Gain in dB = dB A A A
i v p
50 000 , 100 log 10 log 10 log 10
10 10 10
= = =
2.3.5 DC Supply to an Amplifier
According to the law of conservation of energy if the power output of the amplifier is greater than the power
drawn from the input signal, then the extra power being added to the input power must come from
somewhere. Amplifiers need one or more dc power supplies for their operation. An amplifier with two dc
supplies is shown in figure 2.4.

Figure 2.4: An amplifier with two dc power supplies
For proper functioning, the terminal denoted +V must be connected to the positive terminal of a dc power
source while the one denoted V must be connected to the negative terminal of a dc power source.
From figure 2.4, the power supplied to the amplifier can be found as
2 2 1 1
v i v i P
dc
+ = Equation 2.9
If the power dissipated in the amplifier circuit is
diss
P , the power of the input signal is
signal
P and the power
supplied to the load is
L
P , then the power-balance equation is
diss L dc signal
P P P P + = + Equation 2.10
The efficiency of an amplifier is given as
% 100 % 100
input power
output power

+
= = =
signal dc
L
P P
P
efficiency q Equation 2.11
+


_
o
v

i
v
+
_
L
R
i
i
o
i
v
A
+V
-V
1
i
2
i
1
V
2
V


Page | 11
Because
signal
P is usually very small, equation 2.11 is often approximated as
% 100 =
dc
L
P
P
q Equation 2.12
Note that equation 2.12 gives a sufficiently accurate result only when 1 >>
p
A
For convenience, the circuit shown in figure 2.4 is often shown as in figure 2.5, a much simpler version.

Figure 2.5: The amplifier with two dc sources
Example 2.2
Consider an amplifier operating from 10 V power supplies. It is fed with a sinusoidal voltage having 1 V
peak and delivers a sinusoidal voltage output of 9 V peak to a 1 k load. The amplifier draws a current of 9.5
mA from each of its two power supplies. The input current of the amplifier is found to be sinusoidal with
0.1 mA peak. Find the voltage gain, the current gain, the power gain, the power drawn from the dc supplies,
the power dissipated in the amplifier and the amplifier efficiency.
[Ans. = 9 V/V; 90 A/A; 810 W/W; 190 mW; 149.55 mW; 21.31%]
2.3.6 Amplifier Saturation
Most devices in linear electronics are only linear over a limited range of input and output voltages. In
practical amplifiers the transfer characteristic may exhibit non-linearities of various magnitudes, depending
on how elaborate the amplifier circuit is and how much effort was put into the design to ensure linear
operation.
For an amplifier operated from two power supplies, the output voltage can neither exceed a specified
positive limit nor go below a specified negative limit. These upper and lower limits are called the saturating
voltages. Usually, these saturating voltages are within two volts of the corresponding power supplies. For
instance, if a dc power supply of 10 V is used, the output may saturate at 8 V.
Hence, to avoid distortion of the put signal, the input signal swing must be kept within the linear range of
operation of the amplifier i.e.
v
I
v
A
L
v
A
L
+
s s Equation 2.13
Figure 2.6 shows the transfer characteristic of a typical amplifier with its saturation. It also shows two input
signals and the corresponding output signals obtained from the amplifier. The peaks of the larger waveform
are clipped off because of the amplifiers saturation.
Figure 2.7 shows an operational amplifier circuit biased from 10 V and which saturates at 8 V. The
amplifier gain is 3 V/V. The amplifier is assumed to be ideal (this assumption, ideal op-amp, will be
+


_
o
v

i
v
+
_
L
R
i
i
o
i
v
A
+V
-V
1
i
2
i
1
V
2
V


Page | 12
explained later). Figure 2.8 shows the reading on the oscilloscope used to measure the output across the 10
k resistor (R3) which is taken as the load. Notice the clipping of the output signal at 8 V.
The diagram and simulation were done with CircuitMaker Student Version. I encourage that you try this
simulation out yourself and use different dc power supplies and see the response of the system to these
power supplies.

Figure 2.6: Typical amplifier characteristics showing clipping of signals which exceed saturation
voltages.


Page | 13

Figure 2.7: An op-amp circuit

Figure 2.8: Response of the op-amp circuit in figure 2.7
2.3.7 Other Non-linearities and Biasing
Apart from saturation, other non-linearities often exist in amplifiers. Hence, to use most amplifiers, it is
essential to know the transfer characteristic of the amplifier and find a region of the characteristic which is
sufficiently linear for ones purpose. Often times, this desired linear region is not centred about the origin.
This is particularly true if the amplifier is powered from only one power supply. In such cases, it becomes
necessary to shift the input signal by a process called biasing.
For instance, consider the amplifier characteristic curve shown in figure 2.9. The characteristic is non-linear
in some regions of the transfer curve and approximately linear in region B. The characteristic is not centred
about the origin. For linear amplification therefore, the input signal must be translated such that the swing of
the input signal is kept within the region B. To achieve this, we first note that the response of the amplifier is
centred about a point called Q. The input signal is then biased by a dc voltage such that it is centred about
the same point. Biasing is the addition of a dc signal to another signal such that the other signal is centred
about another point. Figure 2.10 shows a unit amplitude sinusoidal wave with an without a 5 V dc bias.


Page | 14

Figure 2.9: Non-linear characteristic of an amplifier

(a) (b)
Figure 2.10: Plot of a unit amplitude sinusoidal voltage with (a) no bias (b) a 5 V dc bias
Biasing is done by applying a dc voltage VI to move the input signal. Q is called the quiescent point or dc
bias point or operating point or simply the Q point. The output for this operating point is VO. The time
varying voltage, vi is super imposed on the dc bias voltage making the total instantaneous input voltage to be
( ) ( ) t v V t v
i I I
+ = Equation 2.14
The instantaneous output voltage, given this input of equation 2.14 is
( ) ( ) t v V t v
o O O
+ = Equation 2.15
From equation 2.2, we have that
( ) ( ) t v A t v
i v o
=
Hence, we can find the voltage gain for the instantaneous voltages of equations 2.14 and 2.15 as
( )
( )
Q
O
I
v
t dv
t dv
A
at
= Equation 2.16
This is the slope of the curve at the Q point.
0 1 2 3 4 5 6
-2
-1.5
-1
-0.5
0
0.5
1
1.5
2
x
Plot of V = sin(wt)
0 1 2 3 4 5 6
0
1
2
3
4
5
6
7
x
Plot of V = 5 + sin(wt)
B
i
v
o
v

Q
O
V
I
V


Page | 15
Example 2.3
A transistor amplifier has the transfer characteristic
I
v
O
e v
40 11
10 10

= Equation 2.17
which applies for 0 >
I
v V and 3 . 0 >
O
v V. Find the limits

L and
+
L and the corresponding values of
I
v .
Also, find the value of the dc bias voltage VI that results in VO = 5 V and the voltage gain at the
corresponding operating point.
Solution
The question defines the lowest possible voltage which the amplifier can output as 0.3 V. Hence,
V 3 . 0 =

L . We can now determine the input voltage which would correspond to this voltage.
I
v
e
40 11
10 10 3 . 0

=
( ) ( ) V 69 . 0 3 . 0 10 10 ln
40
1
11
= =
I
v
We are also given that the input voltage must be greater than or equal to 0 V. Hence, lets find the output
voltage when the input voltage is 0 V.
+

= ~ = L e v
O
V 10 10 10
0 11

We have found that V 3 . 0 =

L at V 69 . 0 =
I
v and V 10 =
+
L at V 0 =
O
v .
Next, we are told to find the VI.
( ) V 6734 . 0 5 10 ln
40
1
10 10 5
11
40 11
= =
=

I
V
V
e
I

The voltage gain at the Q point is
V/V 200 40 10 40 10
6734 . 0 40 11 40 11
= = = =

e e
dv
dv
A
I
v
I
O
v

The per unit voltage gain is negative. This is why the input voltage which saturates the amplifier in the
negative direction is less than the voltage which saturates the amplifier in the positive direction. Also, this
implies that the output and input voltages are 180 degrees out of phase. The plot of equation 2.17 is shown
in figure 2.11.
Note that even with appropriate biasing, there is often a range (often a small range) over which the input
signal can vary with the amplifier responding linearly to it. For instance, consider figure 2.11. While we have
the equation relating the output to the input for the input signal varying between 0 V and 0.69 V, as can be
seen from the plot, the response of the amplifier is only linear for input voltages between about 0.62 V and
0.69 V. Once an amplifier is correctly biased and the input signal is kept sufficiently small, however, the
response of the amplifier can be assumed to be linear.


Page | 16

Figure 2.11: The amplifiers response
2.4 Controlled Source Models
Consider a linear device or a 2-port network

Figure 2.12
Depending on the transfer characteristic either voltage or current at the input may be the controlling variable
and the controlled output may be either voltage or current too. Hence while the inputs to the device may be
a current or a voltage, the device can be looked at from the output as a voltage source or as a current source.
There are four possible combinations of input-output control and all of these occur in actual systems:
1. Voltage-controlled voltage source
2. Voltage-controlled current source
3. Current-controlled voltage source
4. Current-controlled current source
2.4.1 Voltage-Controlled Voltage Source (VCVS)
A VCVS is an example of a dependent source because its output voltage depends on the voltage at the input
to the circuit. This represents a voltage amplifier. The multiplier,
vo
A , is called the voltage gain. Figure 2.13
shows a model of the VCVS.

+


_
+


_
i
v

i vo
v A

+
_
i
R
o
v
o
R

Linear
Device
1
v

2
v

1
i

2
i


Page | 17
Figure 2.13: A voltage-controlled voltage source model
i
R is the input resistance of the VCVS;
o
R is the output resistance. In the ideal case, it is desired that the
input resistance be infinite and the output resistance be zero. The voltage gain of this amplifier is
( )
( ) t v
t v
A
i
o
vo
= Equation 2.18
This voltage gain,
vo
A is called the open-circuit voltage gain. This is because it is the gain of the amplifier in
open-circuit. Connecting a signal source and a load to the system shown in figure 2.13, we obtain figure 2.14.

Figure 2.14: VCVS with signal source and load
By voltage division, we have that
( ) ( ) t v
R R
R
t v
s
s i
i
i
+
= Equation 2.19
and
( ) ( ) t v A
R R
R
t v
i vo
L o
L
o
+
= Equation 2.20
From equation 2.19, we see that there is some of the source voltage is lost in the source resistance,
s
R . Note
that the amount of voltage lost is proportional to the source resistance. From equation 2.20, we see that
some of the output voltage of the amplifier (or VCVS) is lost in the output resistance of the amplifier. Again,
the amount of potential lost is dependent on the load resistance (since the output resistance of the amplifier
is constant under all loading condition, but the load resistance changes with the load.
The phenomenon discusses in the previous paragraph is that one circuit loading another. When the connection
of one circuit or system to the output of another causes the voltage or current at the output of the latter to
change, the former system is said to be loading the latter system. For example, in the loaded VCVS,
connection of the VCVS to the source changes the voltage at the terminal of the source. Hence, we say that
the VCVS is loading the source. Note that this is different from saying the VCVS is a load. A load does not
always load a system to which it is connected to.
The overall voltage amplification ratio of the system can be found as
( )
( )
vo
L o
L
s i
i
s
o
v
A
R R
R
R R
R
t v
t v
A
+

+
= = Equation 2.21
Hence, the voltage gain of the amplifier in circuit is less than the open-circuit voltage gain. While this is not
too much of a problem in itself, there is a problem. The problem is that the voltage gain when the amplifier
is in circuit is dependent on the source resistance and the load resistance. This is undesirable as it means that
any change in the source and / or load would result in a change in the response of the amplifier. It also
+


_
+


_
i
v

i vo
v A

+
_
i
R
o
i
i
i
o
v
o
R

s
v

+
_
s
R

L
R


Page | 18
means that the amplifier would respond to different sources and loads differently. In the ideal scenario, it is
desired that the amplifier does not load the source i.e. that ( ) ( ) t v t v
s i
= and that the load does not load the
amplifier i.e. that ( ) ( ) t v t v A
o i vo
= . If the amplifiers input resistance,
i
R , is infinitely large and the output
resistance,
L
R is negligibly small, then
vo v
A A = and there is no voltage loss or loss in gain. This is the ideal
situation. The ideal VCVS model is shown in figure 2.15.

Figure 2.15: Ideal VCVS
When the voltage gain is specified, the load at which it is measured should also be specified. This is because
in the real case, the voltage gain is dependent on the load and is different from the open-circuit voltage gain.
When the load is not specified, it is assumed that the voltage gain given is not specified, it is assumed that the
voltage gain given is the open-circuit voltage gain.
2.4.2 Voltage-Controlled Current Source (VCIS)
A VCIS is a dependent source whose output current depends on the voltage at the input to the circuit. The
gain of such a circuit is called transconductance. The word transconductance has the trans because it is the
conductance is a relationship between the input and the output. Hence it is the conductance across the
device. This is because the transfer function of the VCIS is the ratio of current to voltage, which has the unit
of conductance. Figure 2.16 shows a model of the VCIS.

Figure 2.16: Model of a Voltage Controlled Current Source
Figure 2.16 shows a real VCIS. In the ideal case, as with the VCVS, the input resistance is infinite. Unlike the
VCVS, however, since the output here is a current and the output resistance would be in parallel with the
load, the output resistance of the VCIS in the ideal case should be infinite also. The ideal model is shown in
figure 2.17.

+


_
i
v

i m
v G

o
i
+


_
i
v

i m
v G
i
R
o
R

o
i
+


_
+


_
i
v

i vo
v A

+
_
o
v


Page | 19
Figure 2.17: Ideal VCIS
The short-circuit transconductance gain (short circuit because the output is a current) is
m
G .
i
o
m
v
i
G = Equation 2.22
The transconductance gain in circuit can be calculated as was done for the VCVS using voltage division at
the input and current division at the output. Note that the transconductance gain when the transconductance
amplifier is in circuit is found using the model in figure 2.16.
i m
L o
o
s i
i
o
v G
R R
R
R R
R
i
+

+
= Equation 2.23
m
L o
o
s i
i
s
o
G
R R
R
R R
R
v
i

+
= Equation 2.24
2.4.3 Current-Controlled Voltage Source (ICVS)
This is a transresistance amplifier. An input current is used to control the voltage supplied to a load by this
amplifier. Figure 2.18 shows the transresistance amplifier.

(a) (b)
Figure 2.18: (a) The real ICVS (b) The ideal ICVS
This amplifier is called a transresistance amplifier because it has the unit of resistance. The open circuit
transresistance gain is given as
i
o
m
i
v
R = Equation 2.25
The transresistance gain when the amplifier is in circuit is obtained as
i m
o L
L
i s
s
o
i R
R R
R
R R
R
v
+

+
= Equation 2.26
m
o L
L
i s
s
s
o
R
R R
R
R R
R
i
v

+
= Equation 2.27
2.4.4 Current-Controlled Current Source (ICIS)
This is a current amplifier. An input current is used to control the output current of the amplifier. The ICIS
is shown in figure 2.19.
+


_
i m
i R

+
_
o
v
i
i
+


_
i m
i R

+
_
i
R
o
v
o
R

i
i


Page | 20

(a) (b)
Figure 2.19: (a) The real ICIS (b) The ideal ICIS
The short circuit current gain is given as
i
o
is
i
i
A =
The gain of the whole system when in circuit is
i is
i s
s
L o
o
o
i A
R R
R
R R
R
i
+

+
= Equation 2.28
is
i s
s
L o
o
s
o
A
R R
R
R R
R
i
i

+
= Equation 2.29
Example 2.4
A transconductance amplifier with an input resistance of 10 k, an output resistance of 10 k and a
transconductance of 1000 mA / V is connected between a 10 k voltage source and a 10 k load. Find the
voltage gain from the source to the load (i.e.
s o
v v ).
Ans. 2500 V/V
2.5 Cascading amplifiers
The section on controlled sources highlighted the fact that practical (or real) control sources are not ideal
and hence do not have the ideal input and output resistances. For instance, the voltage controlled voltage
source does not have infinite input impedance and a zero output impedance. Hence, the amplifier would
load the source unless its input impedance is much higher than the output impedance of the source. Also,
any load whose impedance is not much higher than the output impedance of the amplifier would load the
amplifier. The loading of one system by another is an undesirable and unwanted phenomenon and hence, we
try to prevent it. Note that one system loading another means attenuation of the signal entering the load
system. This is particularly a problem when the signal from the source is very weak.
A buffer amplifier is an amplifier which has a modest gain, but which has a very high input impedance
relative to all possible sources which the amplifier will be used with and a very low output impedance relative
to all possible loads which the amplifier will be used with. Hence, the amplifier never loads the source and is
never loaded by load. Often times, the buffer amplifier may have a 0 dB gain and hence, they are often just
called buffers instead of buffer amplifiers.
Buffer amplifiers are used more to buffer signals, than to amplify signals. In cases where the signal source
has a high output resistance relative to the amplifiers input resistance, connecting the amplifier directly to
the source would cause severe signal attenuation. What is done instead is to connect a buffer between the
source and the amplifier which one desires to use. The buffer presents a high input impedance to the source
i is
i A
o
i
i
i
i is
i A
i
R
o
R

o
i
i
i


Page | 21
and a low output impedance to the amplifier which can then do the amplification with little or no
attenuation. This procedure of connecting more than one amplifier in series is called cascading of amplifiers.
Amplifiers are cascaded when one cannot get all the amplifier features which one desires in one amplifier.
For example, one may wish to cascade amplifiers to obtain a much higher gain than one amplifier can give.
More often than not however, amplifiers are cascaded to enable one obtain specific input and output
impedance values. A typical scenario is to have a three amplifiers, the first to present a high input impedance
to the signal source, the second to do the main amplification and the third to present a low output
impedance to the load. Figure 2.20 illustrates this.

Figure 2.20: Three cascaded amplifiers
The overall gain of the circuit shown in figure 2.20 is
3
3
2
3 2
3
1
2 1
2
1
1
v
L o
L
v
i o
i
v
i o
i
s i
i
s
o
A
R R
R
A
R R
R
A
R R
R
R R
R
v
v

+
= Equation 2.30
The three amplifiers are selected such that:
1.
s i
R R >>
1

2.
2 1 i o
R R <<
3.
2 3 o i
R R >>
4.
L o
R R <<
3

2.6 Frequency Response Consideration
So far, we have assumed that all the impedance and gain values are constant and independent of frequency.
These assumptions may be valid over a reasonable frequency range, but it must be understood that all linear
circuits have frequency-limiting characteristics. Therefore, we will consider the frequency response analysis
of amplifiers.
When a sinusoidal signal passes through a linear circuit, the signals shape at the output is unchanged, though
its amplitude may have been attenuated and its phase shifted. Figure 2.21 illustrates this. The ratio of the
magnitude of the output sinusoid to that of the input sinusoid at a test frequency gives the amplifier gain at
that test frequency.

Figure 2.21
+


_
( ) | e + = t V v
o o
sin ( ) t V v
i i
e sin =
+
_
v
A
1. Large
Gain
2 v
A
2. Moderately
high
1 i
R
3. Moderately
low
2 o
R
1. Modest
Gain
3 v
A
2. Moderately
high
3 i
R
3.
L o
R R <<
3

+


_
o
i
o
v

L
R
s
v
+
_
s
R

+


_
i
v
+


_
1
v

+


_
2
v
i
i 1. Modest
gain
1 v
A
2.
s i
R R >>
1

3. Moderately
low
1 o
R


Page | 22
( )
i
o
v
V
V
A = e Equation 2.31
The ratio of the output signal from a system to its input signal is called the transfer function of the system.
The transfer function is also known as the transmission function. The transfer function of the system in
figure 2.21 is
( )
( ) | e
e
= Z
=
T
V
V
T
i
o
Equation 2.32
The transfer function of the system i.e. ( ) e T and ( ) e T Z , completely describe the response of the system
for different frequencies. The plot of ( ) e T against is called the magnitude plot or magnitude response,
while the plot of ( ) e T Z against is called the phase plot or phase response. These two plots together are
called the plot of frequency response of the system.
Just a note on nomenclature: while the instantaneous value of a signal is written in lower case, its value in the
frequency domain is written in upper case.
The band of frequencies over which the gain of an amplifier is relatively constant, usually to within 3dB, is
called the bandwidth of the amplifier. Figure 2.2 shows the magnitude response of an amplifier. The
bandwidth is the range of frequencies between points P and Q i.e. from
1
e to
2
e . Usually, the amplifier
response is designed to have a bandwidth greater than the spectrum of the signal it is required to amplify.

Figure 2.22
In evaluating the frequency response of an amplifier, all the reactive and non-reactive components are taken
into consideration. Thus the frequency-domain analysis deals with impedances and/or admittances and thin
results in transfer function which is frequency dependent.
( )
( )
( ) e
e
e
i
o
V
V
T = Equation 2.33
Since ( ) e T is generally a complex function, its algebraic manipulation can be simplified by using the
complex frequency variable s, where e j s = . Hence, the transfer function can now be written as
1
e
2
e e

( ) e T
10
log 20
Bandwidth


Page | 23
( )
( )
( ) s V
s V
s T
i
o
= Equation 2.34
In terms of s, the impedance of an inductor is sL .
sL L j jX
L
= = e
The impedance of a capacitor in terms of the complex variable s, in the same vein, is
sC
1
.
2.7 Single-Time-Constant (STC) Network
A single-time-constant network is one which is composed of or can be reduced to one reactive component
(capacitor or inductor) and one resistor. Figure 2.23 shows two STC networks. Both are RC networks. STC
networks can be broadly divided into low pass and high pass networks. A low-pass network is one which
passes signals of low frequency and attenuates high frequency signals. A high-pass network does the
converse, attenuating low frequency signals and passing high frequency signals. These two networks are
called filters (low-pass filter (LPF) and high-pass filter (HPF)). The name filter derives from the fact
that when a number of signals of different frequency are applied to their inputs, they pass some of these
signals and block others i.e. the output of these networks is filtered as it no longer contains some
unwanted signals. In telecommunication, since white noise is generally a high frequency signal, low pass
networks are used to filter out noise from information received via a communication channel. High pass
networks are often used to block dc voltages.

Figure 2.23: Two single-time constant networks
The time constant for an RC network is RC = t . The time constant for an RL network is R L/ = t .
Expressing the impedances in figure 2.24 in the complex frequency domain (s-domain), we have figure 2.25.

Figure 2.24: STC with impedances in s-domain
Hence, for the LPF, we can find the output voltage as
( ) ( ) ( ) s V
sRC
s V
sC
R
sC
s V
i i o

+
=
+
=
1
1
1
1

+


_
o
v

i
v
+
_
R

sC
1

+


_
o
v

i
v
+
_
sC
1

R

Low-pass network

High-pass network

+


_
o
v

i
v
+
_
R

C

+


_
o
v

i
v
+
_
C

R

Low-pass network

High-pass network



Page | 24
Thus, the transfer function is given as
( )
( )
( ) 1
1
1
1
+
=
+
= =
t s sRC s V
s V
s T
i
o
Equation 2.35
Now, remembering that e j s = , at zero frequency, i.e. when the input is a dc signal, the gain of the system
is
( ) 1
1
1
0 = = T
As the frequency increases, the value of et t j s = increases also and hence the ( ) s T reduces. When the
frequency is very high, ( ) s T becomes negligible. The magnitude response of this LPF is shown in figure
2.25. The plot was obtained using MATLAB, setting R = 1 k and C = 10 F. At a frequency of 100
rad/sec, we have
( )
( )
( )
i
o
V
V
j T
j
j T
s
s T
= =
+
=
+
=
2
1
100
1 1
1
100
1 01 . 0
1

Thus, we can find the dB value of the voltage gain at this frequency to be
dB dB
V
V
A
i
o
v
3 0103 . 3
2
1
log 20 log 20
10 10
~ = |
.
|

\
|
= =
Remember that the bandwidth of a system is generally taken to be the band of frequencies for which the gain
is generally constant to about 3dB. Hence, the bandwidth of the LPF with R = 1 k and C = 10 F is 100
rad/sec. Now,
100
1
01 . 0 10 10 1000
6
= = = =

RC t . Hence, the bandwidth of the network is
RC
1
.
The point at which the gain is -3dB is often referred to as the 3-dB point. The transfer function
corresponding to the 3-dB point is labelled
o
e .
Figure 2.25 also shows the phase response of the LPF. The phase plot was also obtained from the transfer
function by finding the phase at each value of frequency e.g. at a frequency of 100 rad/sec,
( )
( ) ( )
( ) =

= Z
=
+
=
+
=

45
1
1
tan
1
1 1
1
100
1 01 . 0
1
1
s T
j K
j
j T
s
s T




Page | 25

Figure 2.25: Frequency response of the LPF
Generally speaking, for a low-pass STC network, the transfer function can be given as
( )
( )
( )
1
1
+
=
+
= =
o
i
o
s
K
s
K
s V
s V
s T
e
t
Equation 2.36
where K is the gain of the LP network and
o
e is the frequency at the 3-dB point. The magnitude of this
transfer function, which is used to obtain the magnitude response, is
( )
2
1
|
|
.
|

\
|
+
=
o
K
j T
e
e
e Equation 2.37
The phase, as a function of frequency, is
( )
o
j T
e
e
e
1
tan

= Z Equation 2.38
The transfer function of the HPF can be obtained in like manner.
( )
( )
( )
o i
o
s
s
s
s
sRC
sRC
s V
s V
s T
e t
t
+
=
+
=
+
= =
1 1
Equation 2.39
At
RC
o
1
= e ,
-40
-30
-20
-10
0
M
a
g
n
i
t
u
d
e

(
d
B
)
10
0
10
1
10
2
10
3
10
4
-90
-45
0
P
h
a
s
e

(
d
e
g
)
Bode Diagram
Frequency (rad/sec)


Page | 26
( )
( )
( ) = Z
~ =
+
=
45
3
2
1
o
o
o o
o
o
T
dB T
j
j
T
e
e
e e
e
e

The frequency response of the HPF is shown in figure 2.26. The plot is obtained for an HPF with R = 1 k
and C = 10 F. The plot is also obtained with MATLAB. The 3-dB point also occurs at
sec / rad 100
1
= =
RC
o
e .

Figure 2.26: Frequency response of the HPF
Generally speaking, for a high-pass STC network, the transfer function can be given as
( )
( )
( )
o i
o
s
Ks
s
Ks
s V
s V
s T
e
t
+
=
+
= =
1
Equation 2.40
where K is the gain of the LP network and
o
e is the frequency at the 3-dB point. The magnitude of this
transfer function, which is used to obtain the magnitude response, is
( )
2
1 |
.
|

\
|
+
=
e
e
e
o
K
j T Equation 2.41
The phase, as a function of frequency, is
-50
-40
-30
-20
-10
0
M
a
g
n
i
t
u
d
e

(
d
B
)
10
0
10
1
10
2
10
3
10
4
0
45
90
P
h
a
s
e

(
d
e
g
)
Bode Diagram
Frequency (rad/sec)


Page | 27
( )
e
e
e
o
j T
1
tan

= Z Equation 2.42
The frequency response plots shown in figures 2.25 and 2.26 are called bode plots. Note that the horizontal
(frequency) axes of these plots are logarithmic, while the vertical axes are linear. A graph where one axis is
linear and the other is logarithmic is called a semi-log graph. A log-log graph is one which has both its axes
logarithmic.
An amplifier whose frequency response is shown in figure 2.27 can have its response divided into three
regions:
1. The low frequency region
2. The mid-band frequency region
3. The high frequency region

Figure 2.27
In the low frequency region, the amplifier behaves like a high pass filter. The response decreases with
decreasing frequency, approaching zero dB at dc ( 0 = e ).
In the mid-band region, the amplifier exhibits a constant amplification (= K) and the phase shift is
proportional to the frequency.
In the high frequency region, the amplifier behaves like a low pass filter. The response decreases with
increasing frequency.
The frequency where the gain of the amplifier has reduced to 2 / 1 of the mid-band gain is called the 3-dB
frequency. It is also known as the corner frequency of the bode plot. The 3-dB frequency point in the low
frequency region is called the lower 3-dB frequency while that in the high frequency region is called the
upper 3-dB frequency.
Example 2.5
The frequency response of a certain amplifier can be represented by a one-pole low-pass model. Some
analysis on the amplifier results in the following transfer function
( )
e
e
3
10 20
1200

+
=
j
j H
i. Determine the low-frequency gain and the 3-dB break frequency (or corner frequency) in radians /
sec and the corresponding value in hertz.
ii. Sketch the frequency response of the amplifier.
Solution
1
e
2
e e

dB
Mid-band region
Low
Freq
Region
High
Freq
Region


Page | 28
Writing the transfer function in the proper form, we have
( )
( )
o
o
o
j
A
j
K
j
j H
e
e
e
e
e
e
+
=
+
=
+
=

1 1
10 5 1
60
5

Hence, the low frequency gain is 60 or in dB, the gain is dB 563 . 35 60 log 20
10
= .
The corner frequency is
4
5
10 2
10 5
1
=

=

o
e rad/sec
Hz f
o
o
3183
14 . 3 2
10 2
2
4
=

= =
t
e


Figure 2.28
Broadly speaking, amplifiers can be classified into three based on their magnitude responses:
1. Capacitively Coupled Amplifiers: the magnitude response of this is shown in figure 2.29a. The
fall-off in amplifiers at high frequencies is usually caused by internal capacitance in the amplifiers.
The fall-off at low frequencies is usually caused by coupling capacitors used to connect one amplifier
stage to another. Coupling capacitors are often used to remove dc biases which may exist in a signal
or which may have been introduced by an amplifier stage (since capacitors block dc and pass high
frequencies).
2. Direct Coupled Amplifiers: this is the typical response when the amplifier stages are coupled directly
together. It is illustrated in figure 2.29b.
3. Tuned or Bandpass Amplifiers: these are amplifiers specially designed to amplify only a narrow band
of frequencies and attenuate all other frequencies. This is shown in figure 2.29c.
0
10
20
30
40
M
a
g
n
i
t
u
d
e

(
d
B
)
10
3
10
4
10
5
10
6
-90
-45
0
P
h
a
s
e

(
d
e
g
)
Bode Diagram
Frequency (rad/sec)


Page | 29

Figure 2.29: Frequency response for (a) a capacitively coupled amplifier, (b) a direct coupled
amplifier and (c) a bandpass or tuned amplifier.



Page | 30
3. OPERATIONAL AMPLIFIERS
The modern operational amplifier (op-amp) is a high gain, integrated circuit, direct-coupled amplifier capable
of performing a large number of linear and non-linear amplification and signal processing functions,
especially for mathematic operations of addition, subtraction, multiplication, division, integration and
differentiation. The name operational amplifier stems from the fact that the op-amp can be used to
perform many mathematical operations. Electronic analogue computers relied heavily on op-amps for their
operations.
Most op-amps are powered from dual power supplies of opposite polarities (commonly +15 V and -15 V)
which is usually symmetrical V
+
and V
-
. The positive terminal is terminal is connected to the positive
voltage and the negative terminal to the negative voltage. It must be noted that common ground is not
connected to the op-amp itself, rather, the centre point between the power supplies becomes the reference
ground point. All input and output signals have their common grounds connected to this point. The
connection of an op-amp is show in figure 3.1.

Figure 3.1: An op-amp with its power supplies
It will be assumed that our op-amps are powered from 15 V power supplies. The saturation voltages are
usually about 2 V below the magnitude of the dc supplies. Hence, for purely resistive op-amp circuits,
generally, the output will not go above 13 V or below -13 V because some transistor saturation and junction
drops appear between the supply and the output voltage terminals. For linear operation, the input signal
should not cause the output to enter saturation.
In order to simplify the circuit diagram, the power supply connections are often omitted. Figure 3.2 shows
the circuit symbol of the op-amp with and without the dc supply terminals.

Figure 3.2: Circuit symbol of the op-amp (a) with and (b) without the dc supply terminals
Terminals 1 and 2 of both symbols are the inputs to the op-amp. Terminal 3 is the output. Terminals 4 and 5
are the dc power supplies to the op-amp. Terminal 1 is called the inverting input and terminal 2 is called the
non-inverting input. In some cases, though rare, the symbol is drawn with the inverting input as terminal 2
and the non-inverting input as terminal 1. To indicate which of the terminals is the inverting terminal the
inverting terminal is labelled with a negative sign. The non-inverting terminal is labelled with a positive sign.
This is shown in figure 3.3.
(a) (b)
2
1
4
3
5
2
1
3
+
V

V
+15 V

+15 V



Page | 31

Figure 3.3: Symbol of the op-amp
3.1 The Ideal Op-Amp
Virtually all active circuits have potentials for instability and non-linear operation. However, throughout this
course, it will be assumed that the op-amp is linear and stable unless otherwise stated.
Setting the input voltage at the inverting terminal with respect to ground to be

v and the voltage at the

non-inverting terminal relative to ground to be
+
v , the potential difference between these two terminals is
obtained as
+
= v v v
d
Equation 3.1
The ideal op-amp can be modelled by an ideal VCVS amplifier. The differential voltage is amplified by a
factor A. Figure 3.4 shows the controlled source model of the ideal op-amp.

Figure 3.4: Controlled source model of the ideal op-amp
The gain, A, of the VCVS is called the open-loop gain. It is also called the differential gain because it
amplifies the differential voltage between the two input terminals of the op-amp.
The principal assumptions made in the model shown in figure 3.4 are:
1. The input impedance between the two 2 input terminals is infinite.
2. The output impedance as seen from the output terminal to ground is zero.
3. The gain (open-loop gain) approaches an infinite value ~ A .
The implications of these ideal assumptions are:
1. Infinite input impedance implies that no current flows into or out of the input terminals.
2. Zero output impedance implies that
o
v does not change with variation in the load.
3. Since ( )
+
= = v v A Av v
d o

A
v
v v v
o
d
= =
+

If A , then 0
A
v
o
, where
o
v is finite.
+
-

Inverting
terminal

+
-

+



_
+
v

d
Av
+
_
o
v

d
v

Non-inverting
terminal

v

-
2
1
3
+


Page | 32
0 =
+
v v and
+
= v v
This implies that the two input voltages are forced to be equal.
A corollary to this is that if
+
= v v , then 0 =
o
v . This is called common-mode rejection.
Common-mode is the condition when the same signal is applied to the inverting and non-inverting
terminals concurrently. The ideal op-amp is, hence, said to have zero common-mode gain.
Another important assumption of an ideal op-amp is that it has gain A that remains constant down to zero
frequency (dc) and up to infinite frequency i.e. it will amplify signals of any frequency (infinite bandwidth).
Table 3.1: Assumptions made in the ideal op-amp model and implications
Assumption Implication
=
in
R
Input current is zero
0 =
o
R
Output voltage is independent of load
= A
Differential input voltage is zero
Zero common-mode gain
OR
Infinite common-mode rejection
Op-amp can be used to eliminate
common-mode signals and amplify only
differential signals (more on this later).
Infinite bandwidth Op-amp has a flat frequency response

One last assumption is that the op-amp has zero slew rate. This means that the op-amp responds instantly to
signals applied to its input terminals.
These assumptions will now be used to analyse op-amps.

ASSIGNMENT 1
1. Given the following amplifier parameters, find
v
A ,
i
A and
p
A both as ratios and in decibels:
a. mV v
I
100 = , A i
I
100 = , V v
O
10 = , O =100
L
R
b. V v
I
1 = , mA i
I
1 = , V v
O
10 = , O =10
L
R
2. A linear amplifier is connected between a signal source and a load as shown below. (a) Determine
the net loaded voltage gain between the open circuit source voltage and voltage across the load
resistance. (b) given that the open-circuit source voltage is 0.2V, determine the amplifier input
voltage, output voltage with the output open-circuited and output voltage under loaded conditions.

3. The figure below shows a signal source connected to the input of an amplifier. Derive an expression
for the transfer function of the amplifier, ( ) ( ) ( ) s V s V s T
s o
= . Is the amplifier a low-pass type or a
high-pass type? Find the 3-dB frequency for the case F C k R k R
i s
5 , 80 , 10 = O = O = .
+


_
o
v
k
R
L
100

s
v
+
_
s
R
+



_
i
v

1. 50 =
v
A
2. 1500 =
i
R
3. 250 =
o
R
O 500



Page | 33

4. An amplifier designed using a single metal-oxide-semiconductor (MOS) transistor has the transfer
characteristic
( )
2
2 5 10 =
I O
v v
This transfer function characteristic applies for 2 2 + s s
O I
v v and
O
v positive. At the limits of
this region, the amplifier saturates.
a. Sketch and clearly label the transfer characteristic. What are the saturation levels
+
L and

L
and the corresponding values of
I
v ?
b. Bias the amplifier to obtain a dc output voltage of 5 V. What value of input dc voltage
I
V is
required?
c. Calculate the value of the small-signal voltage gain at the bias point.
3.1.1 The Inverting Amplifier
The op-amp is usually not used alone for amplification. It is generally always used in circuit with passive
components. Broadly speaking, there are two basic configurations in which the op-amp is connected: the
inverting configuration and the non-inverting configuration. Figure 3.5 shows a simple inverting amplifier.

Figure 3.5: The inverting amplifier
The inverting configuration comprises an op-amp and two resistors, Ri and Rf, with Rf connected from the
output terminal back to the inverting (or negative input) terminal. Rf is called the feedback resistor. Rf applies
negative feedback to the op-amp circuit because it is connected between the output and the inverting
terminal. If, however, Rf were connected between the output and the positive input terminal (non-inverting
terminal), it would apply positive feedback to the circuit.
Now, we will analyse the circuit to obtain the gain of the circuit. This gain is called the closed-loop gain
cl
A . A closed-loop system is one which has at least one feedback (positive or negative) from its output to
its input.
i
o
cl
v
v
A =
The inverting terminal of the op-amp is grounded. Hence,
0 =
+
v
From the third assumption of table 3.1,
+
= v v
-
+
i
R

f
R

i
v
i
i
f
i
o
v

v

+
v

+


_
o
v

s
v
+
_
s
R
C

i
R


Page | 34
Hence,
0 =

v is called a virtual ground. This means that the inverting terminal is not really connected to ground, but
acts as if it is connected to ground from a voltage point of view.
We can now find the input current flowing into the circuit
i
i
i
i
i
i
i
R
v
R
v
R
v v
i =

=

0

Now, from the first assumption of table 3.1, the current flowing into the op-amp is zero. Hence,
i
i
f i
R
v
i i = =
Since we know

v and we know
f
i , we can calculate the output voltage
o
v .
i
f
i
i
f i
f f o
R
R
v
R
R v
R i v = = = 0 0 Equation 3.2
Therefore, the closed loop gain of the circuit is
i
f
i
o
cl
R
R
v
v
A = = Equation 3.3
The closed-loop voltage gain is a simple ratio and is independent of the open-loop gain of the op-amp A.
The gain depends only on the degree of stability and precision of the resistors used.
The input resistance to this closed loop inverting circuit is
i
i
i
i
v
R = Equation 3.4
Note that this is the input resistance to the circuit as seen by the signal source and not the input resistance of
the op-amp (which is assumed to be infinite).
The output resistance of the inverting amplifier is zero since it is the output of an ideal voltage source.
Note also that there is a negative relationship between the input voltage and the output voltage. This
negative sign is what makes us call this amplifier an inverting amplifier (it invert the sign or polarity of the
signal it is operating on).
3.1.2 The Non-inverting Amplifier
Figure 3.6 shows the amplifier connected in a non-inverting configuration. While in the inverting amplifier,
the input voltage signal was applied to the inverting terminal, in this configuration, the input voltage signal is
applied to the non-inverting terminal.

-
+
i
R

f
R

i
v
f
i
o
v

v

+
v

i
i


Page | 35
Figure 3.6: The non-inverting amplifier
i
v v =
+

Once again, assuming that infinite open-loop gain,
i
v v v = =
+

Hence, we find
i
i
i
i
i
i
R
v
R
v
i =

=

0

Assuming infinite op-amp input resistance,
i
i
i f
R
v
i i = =
We can find the output voltage as the sum of

v and the voltage drop across

f
R .
|
|
.
|

\
|
+ = + = + =

i
f
i f
i
i
i f f o
R
R
v R
R
v
v R i v v 1 Equation 3.5
Hence, the closed loop gain of the non-inverting amplifier is
i
f
i
o
cl
R
R
v
v
A + = = 1 Equation 3.6
Two things to note from this closed loop gain are:
1. The polarity of the output voltage and that of the input voltage are the same and hence the name
non-inverting amplifier.
2. The closed-loop gain of the non-inverting amplifier is always greater than or equal to unity (one).
In the ideal case, the input resistance of a non-inverting amplifier is infinite and the output resistance is zero
(i.e. the same as that of the open loop op-amp).
A special case of the non-inverting amplifier is the voltage follower circuit. The voltage follower is obtained
by setting =
i
R and 0 =
f
R so that 1 =
cl
A and
i o
v v = (hence the name voltage follower. The voltage
follower circuit is shown in figure 3.7. the voltage follower is also called a unity-gain amplifier or a unity-
gain buffer or simply just a buffer.

Figure 3.7: The voltage follower
The input impedance of the voltage follower circuit is infinite and its output impedance is zero (for an ideal
case). This makes the voltage follower very useful in isolating a source from a load. With the use of a voltage
follower, a voltage level can be maintained irrelevant of the load connected to it.

-
+
i
v
o
v



Page | 36
Example 3.1
For the inverting amplifier circuit with an ideal op-amp shown below,

a. Determine the closed-loop gain.
b. Based on power supply voltages of 15 V and saturation voltages of Vsat = 13 V, determine the
peak input signal voltage
( ) peak i
v for which linear operation is possible.
c. Determine the output voltage
o
v for each of the following input voltages:
i
v = 0 V; -0.5 V; 0.5 V; 1.0 V; -2.0 V
d. A load resistance O = k R
L
2 is connected between the output terminal and ground. Determine the
op-amp current for 0 . 1 =
i
v V and 3 . 1 =
i
v V.
Solution:
a. For an inverting op-amp,
10
10
100
= =

=
k
k
R
R
A
i
f
cl

b. At
( ) peak i
v ,
sat o
v v =
Hence,
( )
( )
V
v
v
v
v
sat
peak i
peak i
sat
3 . 1
10
10 =

= =

c.
i
v
o
v
0.0 0.0
-0.5 5.0
0.5 -5.0
1.0 -10.0
-2.0 13.0 (note: amplifier has saturated)

d.

For 0 . 1 =
i
v V, 10 =
o
v V. Thus, we can find the current through the load
-
+
10k
100k
i
v
i
i
i
i
o
v

L
R
o
i

L
i
-
+
10k
100k
i
v
o
v



Page | 37
mA A
k
i
L
5 005 . 0
2
10
= = =
Now, the input current is
mA A
k k
v
i
i
i
1 . 0 0001 . 0
10
0 . 1
10
= =

= =
Hence, the op-amp output current is
mA mA i i i
i L o
1 . 5 1 . 0 5 = + = =
For 3 . 1 =
i
v V, 13 =
o
v V.
mA
k
i
L
5 . 6
2
13
=

=
mA
k
i
i
13 . 0
10
3 . 1
= =
Therefore,
mA mA mA i i i
i L o
63 . 6 13 . 0 5 . 6 = = =
Thus, the op-amp output current is 6.63 mA flowing into the output terminal of the op-amp.

3.2 Applications of Op-amps (Linear Circuits)
3.2.1 The Weighted Summer or Linear Combination Circuit
The weighted summer or summer for short, uses the inverting configuration. It is called a weighted summer
because it does not just sum all input signals together, but rather, it sums a weighted value of each input
signal. Hence, given a set of input signals
n
v v v v , , ,
3 2 1
, the output of the summer is
n n o
v A v A v A v A v + + + =
3 3 2 2 1 1
Equation 3.7
In equation 3.7, mathematically speaking,
o
v is said to be the linear combination of
n
v v v v , , ,
3 2 1
. Hence,
the weighted summer is also called a linear combination circuit. Figure 3.8 shows the summer.

Figure 3.8: The weighted summer
2
R
f
R

2
v
2
i

f
i
o
v

+
-
1
R
1
v
1
i
n
R
n
v

n
i

P
When designing a circuit take note of the following:
1. Make sure that the dynamic range (i.e. the output swing) of the op-amp will be sufficient for the
desired output signal. Hence, ensure that the op-amp will not saturate in attempting to provide
your desired output signal level.
2. Resistances in the range of 1k to 100k are preferred considering the thermal noise generated by
resistance and also the loading of the source (particularly for inverting amplifiers).
3. Check the maximum output current levels under the worst case.



Page | 38
Since there is a virtual ground at node P (the inverting terminal),
1
1
1
R
v
i = ,
2
2
2
R
v
i = , ...
n
n
n
R
v
i =
Now, by KCL,
n
n
n f
R
v
R
v
R
v
i i i i + + + = + + + =
2
2
1
1
2 1

But
f f o
R i v =
Thus, the output voltage is
|
|
.
|

\
|
+ + + =
n
n
f f f
o
v
R
R
v
R
R
v
R
R
v
2
2
1
1
Equation 3.8
This can also be written as
n n o
v A v A v A v + + =
2 2 1 1
where
k
f
k
R
R
A = Equation 3.9
Now, if R R R
k f
= = for k = 1, 2, ... n, then we have an inverting adding circuit
( )
n o
v v v v + + + =
2 1
Equation 3.10
If the weighted summer is connected in a non-inverting configuration, the input impedances interact with
each other such that it becomes rather difficult to control the individual weights being applied to the
individual input voltages. Hence, the weighted summer is generally always connected in the inverting
configuration. Example 3.2. illustrates this. If a non-inverted output is desired, an inverting amplifier with a
gain of -1 can be connected to the output of the weighted summer.
Example 3.2
Find the output voltage of the following circuit

Solution:
We find the Thevenins equivalent of the parallel combination of the signal sources.
i
R
f
R

o
v
+
-
1
R
1
v
2
R
2
v 3
R


Page | 39

We obtain the Thevenins equivalents to be
( ) ( )
1 3 2
2 1 3
2 3 1
1 2 3
//
//
//
//
R R R
v R R
R R R
v R R
v
TH
+
+
+
=
3 2 1
// // R R R R
TH
=

Since no current flows into the op-amp, there is no voltage drop across the Thevenins resistance hence,
TH
v v =
+

( ) ( )
1 3 2
2 1 3
2 3 1
1 2 3
//
//
//
//
R R R
v R R
R R R
v R R
v v
TH
+
+
+
= =
+

Hence, the output voltage of the circuit (from equation 3.5) is
( ) ( )
|
|
.
|

\
|
+
|
|
.
|

\
|
+
+
+
=
i
f
o
R
R
R R R
v R R
R R R
v R R
v 1
//
//
//
//
1 3 2
2 1 3
2 3 1
1 2 3

As was mentioned earlier, adjusting the value of any of the input resistances would adjust the weights
attached to each of the input voltages.
Example 3.3
Find the output voltage of the following system

Solution:
( )
5 1 4 5 1 4
4 2
1
4
4
4
2
4
v v v v v v v
o o o
+ + =
|
.
|

\
|
+ + =
|
.
|

\
|
+ + =
|
.
|

\
|
+ + =
3 2 1 3 2 1 1
3
1
2
1
3
1
2
1
1
1
v v v v v v v
o

Therefore
5 4 3 2 1
4 2
3
1
2
1
v v v v v v
o
+ + =
2k
1k
2
v
1 o
v
+
-
1k
1
v
3k
3
v
P
4k
4k
o
v
+
-
2k
4
v
1k
5
v
P
i
R
f
R

o
v
+
-
TH
R
TH
v


Page | 40
3.2.2 The Difference Amplifier
This amplifier is also called a closed-loop differential amplifier or differential amplifier for short. The
difference amplifier is one which amplifies the difference between two input signals applied to it and ideally
rejects signals which are common to both inputs. The difference amplifier is shown in figure 3.9.
To analyse the difference amplifier, we note that the op-amp is a linear system (or rather, we assume that we
are operating the op-amp within its linear region). Hence, the law of superpositioning holds true in the
analysis of the difference amplifier. We analyse the circuit by selecting one voltage source and grounding all
others and finding the output voltage for this voltage source. We then select another voltage source and once
again ground all others and so on till we have used each voltage source individually. The total output voltage
for the system is then computed as the sum of the individual output voltages calculated as the outputs due to
each of the individual voltage sources in the system. This is the law of superposition.

Figure 3.9: The difference amplifier
We first ground
1
v and find the output with only
2
v in the circuit.

2
4 3
4
v
R R
R
v
+
=
+

We obtain
2
4 3
4
1
2
21
1 v
R R
R
R
R
v
o
|
|
.
|

\
|
+
|
|
.
|

\
|
+ = where
2 o
v is the output voltage due to
2
v .
Next, we ground
2
v and find the output with only
1
v in the circuit.
1
R
2
R
2 o
v

+
-
3
R
2
v
4
R
1
R
2
R
o
v
+
-
3
R
2
v
4
R
1
v


Page | 41

Since there is no current in or out of the non-inverting terminal, there is no voltage drop across the parallel
combination of
3
R and
4
R . Hence, there is a virtual ground at

v . Hence, we have that

1
1
2
1
v
R
R
v
o
= where
1 o
v is the output voltage due to
1
v .
Hence, by the law of superposition, the output voltage of the system is
1
1
2
2
4 3
4
1
2
2 1
1 v
R
R
v
R R
R
R
R
v v v
o o o

|
|
.
|

\
|
+
|
|
.
|

\
|
+ = + = Equation 3.11
Equation 3.11 can be re-written as
1
1
2
2
4 3
4
1
2 1
v
R
R
v
R R
R
R
R R
v
o

|
|
.
|

\
|
+
|
|
.
|

\
| +
= Equation 3.12
If we set R R R = =
3 1
and AR R R = =
4 2
, we have
( )
1 2
1
1 Av v
A
A
A v
o

|
.
|

\
|
+
+ =
Thus,
( )
d o
Av v v A v = =
1 2
Equation 3.13
Thus, the differential gain of the amplifier is
1
2
R
R
A
v
v
A
d
o
d
= = = Equation 3.14

Next, well consider a common-mode signal applied to a difference amplifier. Consider figure 3.10.
1
R
2
R
1 o
v
+
-
3
R
4
R
1
v


Page | 42

Figure 3.10
cm i
v
R R
R
v
3 4
4
+
=
+

Now, since
+
= v v
( )
|
|
.
|

\
|
+
=
|
|
.
|

\
|
+
= =

3 4
3
1 3 4
4
1 1
1
1
1
R R
R
R
v
R R
R
R
v
v v
R
i
cm i cm i
cm i

We know that
2 1
i i = . Thus,
cm i cm i o
v
R R
R
R
R
v
R R
R
R i v v
|
|
.
|

\
|
+

+
= =

3 4
3
1
2
3 4
4
2 2

Therefore,
|
|
.
|

\
|
|
|
.
|

\
|

+
=
4 1
3 2
3 4
4
1
R R
R R
R R
R
v v
cm i o
Equation 3.15
Hence, the common-mode gain is
|
|
.
|

\
|

+
= =
4 1
3 2
3 4
4
1
R R
R R
R R
R
v
v
A
cm i
o
cm
Equation 3.16
From this, we can see that if, as we did earlier with the difference amplifier, we set R R R = =
3 1
and
AR R R = =
4 2
, we have the common-mode gain to be zero.
0 =
cm
A
As mentioned earlier, the difference amplifier is an amplifier configured such that it amplifies the difference
between the input signals at the terminals of the amplifier and rejects signals which are common to both
terminals. The need for difference amplifiers arises frequently in the design of electronic systems, especially
those employed in instrumentation. As a common example, consider a transducer providing a small signal
between its two output terminals(e.g. 1 mV) while each of the two wires leading from the transducer
terminals to the measuring instrument may have a large interference signal (e.g. 1 V) relative to circuit
ground. Since the transducer provides a potential difference between the two terminals while the interference
is common to both terminals, but employing a difference amplifier, the potential difference between the
terminals is amplified whereas the interference signal which is common to both terminals is eliminated
completely (ideally).
1
R
2
R
o
v
+
-
3
R
4
R
cm i
v
+
-
1
i

2
i



Page | 43
If there is a mismatch in the impedances of equation 3.16, the common-mode gain will not be zero. Since no
resistor is perfect, this is often the case. The efficacy of a difference amplifier is measured by the degree to
which it rejects common-mode signals in preference to differential signals. This is quantified by a measure
called the common-mode rejection ratio (CMRR), which is defined as
cm
d
A
A
10
log 20 CMRR= Equation 3.17
Ideally, if the common-mode gain is zero, the CMRR is infinite. The higher the CMRR, the better the
performance of the difference amplifier.
A second desirable characteristic of a difference amplifier is a high input impedance. We can compute the
input impedance of the amplifier by noting that since
+
= v v , there is a virtual short circuit between these
terminals such that we can compute the input current and hence, the input impedance. Consider figure 3.11.

Figure 3.11
With the virtual short circuit in figure 3.11,
1 1
1
R R
v
i
d i
+
=
Hence, the input impedance of the difference amplifier is
1
2R R
in
= Equation 3.18
Unfortunately, since the differential gain of the amplifier is given as
1 2
R R A
d
= ,there is a limit to how
large we can make
1
R and hence, the input impedance of the difference amplifier is limited. A second
drawback of the difference amplifier is the fact that varying the gain is not very easy. Varying the gain entails
changing at least two resistor values (both
1
R s or both
2
R s) and then one has to be concerned about
precision to enhance the CMRR. Both these limitations of the difference amplifier are overcome by use of an
instrumentation amplifier.
3.2.3 The Instrumentation Amplifier
In order to raise the input impedance of a system, as mentioned earlier, one can employ a buffer at the input
to the system. Hence, the solve the problem of modest input impedance to a difference amplifier, we can
simply employ one buffers at each of the input terminals of the difference amplifier. Also, as we have learnt
earlier, cascading amplifiers can be used to improve the gain. Hence, instead of using unity gain buffers, we
can employ non-inverting amplifiers as the buffers at the input of the difference amplifier. Thus, we obtain
the system shown in figure 3.12.
1
R
2
R
o
v
+
-
1
R
2
R
d i
v
-
+
1
i

1
i

Virtual short circuit


Page | 44
In figure 3.12, the amplification is done in two stages. The first stage provides an infinite input impedance
while amplifying signals by with gain of
1 2
1 R R + . The second stage does the common-mode rejection and
difference amplification. The overall differential gain obtained with the system is
|
|
.
|

\
|
+ =
1
2
3
4
1
R
R
R
R
A
d
Equation 3.19

Figure 3.12: Difference amplifier with modification
The common-mode gain, assuming perfect matching of the second stage, is zero. This system presented in
figure 3.12 however has three serious drawbacks:
1. The input common-mode signal is amplified by the first stage. Hence, the second stage has a much
larger common-mode signal to deal with. Hence, the CMRR of the entire system is lowered. Also,
this amplification of the common-mode signal may cause the saturation of the amplifier, thereby
making it impossible to obtain an intelligible output.
2. The two buffer amplifiers used in the first stage must be perfectly matched otherwise a spurious
signal would be introduced into the system by the imperfect match and this would be amplified by
the differential amplifier in the second stage.
3. Varying of the gain of this amplifier is just as tedious as varying the gain of the simple difference
amplifier of figure 3.9. At least two resistors have to be varied simultaneously and then matching
must be ensured.
These three drawbacks can be solved completely by a minor modification to the system of figure 3.12. The
connection to ground between the two
1
R resistors is removed and the two resistors are combined into one
resistor
G
R . This is shown in figure 3.13.
3
R
4
R
o
v
+
-
3
R
4
R
1
R
2
R
+
-
2
v
-
+
1
v
2
R
1
R
1
1
2
1 v
R
R
|
|
.
|

\
|
+

2
1
2
1 v
R
R
|
|
.
|

\
|
+



Page | 45

Figure 3.13: The Instrumentation Amplifier
The voltage at node A is
1
v v
A
= and the voltage at node B is
2
v v
B
= . Hence the potential difference
across resistor
G
R is
d i A B
v v v v v = =
1 2
which is the differential voltage input
Hence, the current flowing through resistor
G
R is
G
d i
R
v
.
Since no current flows into the inverting terminals of the two buffers, the current flowing through both
resistors
2
R is the same as the one flowing through
G
R . Hence, the voltage at node D is
G
d i
G
d i B D
R
R
v v
R
R
v v v
2
2
2
+ = + =
The voltage at node C is
G
d i
G
d i A C
R
R
v v
R
R
v v v
2
1
2
= =
Hence, the differential voltage at the input of the differential amplifier in the second stage is
G
d i d i
G
d i
G
d i C D
R
R
v v
R
R
v
R
R
v v v v v
2 2 2
1 2
2 + = + + =
|
|
.
|

\
|
+ =
G
d i C D
R
R
v v v
2
2
1
Hence, the overall differential gain of the instrumentation amplifier is
|
|
.
|

\
|
+ =
G
d
R
R
R
R
A
2
3
4
2
1 Equation 3.20
Now, in comparison to the system of figure 3.11,
1. When a common-mode signal is applied to this amplifier, the common-mode signal does not
generate any current through resistor
G
R since it is common to both nodes A and B. Hence, the
3
R
4
R
o
v
+
-
3
R
4
R
G
R

2
R
+
-
2
v
-
+
1
v
2
R
G
d i
R
v

G
d i
R
v

( )
G
d i
G
R
v
R
v v
=

1 2

D
C
A
B


Page | 46
common mode signal is transmitted without being amplified to nodes C and D. Hence, the CMRR
of the instrumentation amplifier is equal to the CMRR of the difference amplifier. It is not reduced
in anyway. Also, there is little fear of saturation as the common-mode signal is not amplified.
2. If the two buffer amplifiers are not matched, for instance, if the feedback resistors are
2
R and '
2
R ,
then the overall differential gain becomes
|
|
.
|

\
| +
+ =
G
d
R
R R
R
R
A
'
1
2 2
3
4
Equation 3.21
No spurious signal is introduced. The only effect is a change in the differential gain of the amplifier.
3. As can be seen from equation 3.20, the differential gain of the instrumentation amplifier can be set
and adjusted by changing the value of
G
R . No other resistor need be varied to vary the gain. Hence,
once
3
R and
4
R have been matched for acceptable CMRR, they need not be changed to improve
gain. A potentiometer is often used as resistor
G
R for variation of the gain.
So we see that the instrumentation amplifier is an excellent differential amplifier. It is used at the input of
several electronic instruments.
Example 3.4
Design an instrumentation amplifier whose gain (i.e. differential gain) can be varied over a range from 2 to
1000 using a 100k potentiometer if the resistances of the second stage of the amplifier are equal i.e.
4 3
R R =
.
Solution:
G G
d
R
R
R
R
R
R
A
2 2
3
4
2
1
2
1 + =
|
|
.
|

\
|
+ =
In order to vary the gain from 2 to 1000, we would have to replace
G
R with a series combination of a
constant resistor
c
R
1
and the 100k potentiometer
pot
R
1
. Note that if we do not place a series constant
resistor with the potentiometer, then when 0 =
G
R , the gain would be infinite. Hence,
pot c G
R R R
1 1
+ =
We desire to vary the gain over a range from 2 to 1000. When the gain is 1000,
1000
2
1
1
2
= +
c
R
R

c
R R
1 2
999 2 =
When the gain is 2,
2
100
2
1
1
2
=
+
+
k R
R
c

1
100
999
1
1
=
+ k R
R
c
c

k
k
R
c
2 . 100
998
100
1
= =
And


Page | 47
k R 0501 . 50
2
=

3.2.4 Voltage Controlled Current Sources
So far, we have used the op-amp only as a VCVS. This subsection presents the use of op-amps as VCIS.
3.2.4.1 Floating Load Inverting VCIS
This is presented in figure 3.14. In this circuit, the external load
L
R is connected as the feedback resistance.
Since the load is connected between two terminals of the op-amp, it is called a floating load. This limits the
application of this circuit.

Figure 3.14: The floating load inverting VCIS
The load current
L
i is independent of the load resistance
L
R .
R
v
i i
i
i L
= = Equation 3.22
The gain of this amplifier is a transconductance
R v
i
g
i
L
m
1
= = Equation 3.23
3.2.4.2 Floating Load Non-inverting VCIS
This circuit is shown in figure 3.15.

Figure 3.15: The floating load non-inverting VCIS
R
v
i
i
L
=
Once again, the transconductance of this amplifier is
R
g
m
1
=
The dynamic range of this circuit is less than that of the inverting circuit since the inverting terminal is not at
ground potential. Linear operation is constrained by the condition
-
+
R
L
R
i
v
L
i
o
v
i
i
-
+
R
L
R
i
v
i
i
L
i


Page | 48
sat i
L
v v
R
R
< |
.
|

\
|
+ 1 Equation 3.24
This circuit however, has a higher input impedance than the inverting circuit.
3.2.4.3 Grounded Load VCIS
This is shown in figure 3.16

Figure 3.16: The grounded load VCIS
Assuming an ideal op-amp,
2
o
v
v =

2
o
v
v v = =
+

Thus, we have
R
v
v
i
o
i
i
2

=
R
v
R
v
v
i
o
o
o
o
2
2
=

=
Therefore,
R
v
R
v
R
v v
i
i o o i
L
= +

=
2 2
2

R
g
m
1
=
3.2.4.4 Applications of VCIS
The circuit in figure 3.17 is a simplified version of a circuit that can be used to implement a precision, high
impedance electronic voltmeter. The meter is a 0 100 A microammeter having an internal resistance of
2k. The desired dc voltages are 0 0.1 V, 0 1 V and 0 10 V. The microammeter scale will be relabelled
as a voltage scale with maximum voltages corresponding to maximum current. We will need to determine the
values of the three resistances
1
R ,
2
R and
3
R .
R
R
o
v
+
-
R
i
v
L
R
R
i
i
L
i
o
i



Page | 49
The maximum current through the microammeter should be 100 A. Thus, the maximum voltage drop
across the meter is
V iR V 2 . 0 10 2 10 100
3 6
= = =


This voltage added to the maximum voltage of 10 V in the third scale makes the maximum output voltage to
be 10.2 V. This is still within the linear region of the op-amp (i.e the op-amp will not saturate to supply this
voltage).

Figure 3.17: An electronic voltmeter
Since the same current must pass through
i
R and the microammeter, then for:
1. 0 0.1 V range:
O =

= =

k
A
v
R
i
1
10 100
1 . 0
100
6
max
1

2. 0 1.0 V range:
O =

= =

k
A
v
R
i
10
10 100
1
100
6
max
1

3. 0 10 V range:
O =

= =

k
A
v
R
i
100
10 100
10
100
6
max
1

3.2.5 Current Controlled Sources
3.2.5.1 Current Controlled Voltage Source (ICVS)
The simplest implementation of this is shown in figure 3.18.

Figure 3.18: Simplest form of ICVS
The source driving this circuit sees effective ground as the input impedance of this circuit. The input
current flows through the feedback resistor and the output voltage is
R i v
i o
= Equation 3.25
-
+
R
i
i
o
v
2
R
2k
o
v
+
-
1
R
0 0.1 V
3
R
P
0 1 V
0 10 V
microammeter
i
v


Page | 50
The gain of this amplifier is a transresistance and it is
R R
m
= Equation 3.26
3.2.5.2 Current Controlled Current Source (ICIS)

Figure 3.19: ICIS
Since the current flows into the op-amp and the inverting terminal is a virtual ground, the voltage across
1
R
and
2
R is the same.
2 2 2 2
R i R i v
i
= =
1
2
1
2
1
R
R i
R
v
i
i
= =
1
2
2 1
R
R
i i i i i
i i L
+ = + =
Thus, the output current is
i L
i
R
R
i
|
|
.
|

\
|
+ =
2
1
1 Equation 3.27
The current gain of this amplifier is
2
1
1
R
R
+ = | Equation 3.28
Now, if we compute the output voltage, we obtain
(

|
|
.
|

\
|
+ + = =
2
1
2 2
1
R
R
R R i R i R i v
L i L L i o

Hence,
sat i L o
v i
R
R
R R v <
(

|
|
.
|

\
|
+ + =
2
1
2
1 for linear operation of the amplifier

3.3 The Practical (or Real) Op-Amp
Prior to this point, we based our analysis of the op-amp on the five assumptions stated in table 3.1. In reality,
the best op-amps only approximate these assumptions. The assumptions greatly simplify the circuit analysis
-
+
L
R
i
i
2
R
1
R
1
i

L
i
2
i

2
v
o
v


Page | 51
and in several cases are sufficient to determine op-amp behaviour and design systems. Considering the
limitations of each op-amp, however, one can follow design approaches that permit a near-ideal circuit
model to be developed.
The practical limitations of op-amps include finite open-loop gain, finite input impedance, non-zero output
impedance, finite bandwidth, slew rate, offset voltage bias and offset current, noise and finite common-mode
rejection ratio.

Figure 3.20: Controlled Source Model of the practical op-amp
3.3.1 Effect of Finite Open-Loop Gain
We will now find the closed loop gain of a real inverting amplifier. Let us assume that the input resistance is
infinite and the output resistance is zero, but that the open-loop gain, A, is finite.

Figure 3.21
Working backwards from the output of the op-amp to its input,
A
v
v v
o
=
+

0 =
+
v since it is grounded
Hence,
A
v
v
o
=

Thus, the input current
i
i is
i
o
i
i
i
i
R
A
v
v
R
v v
i
+
=

=


-
+
i
R
f
R

i
v
i
i
f
i
o
v

v

+
v

A
+



_
+
v
d
Av
+
_
o
v

v
d
r
o
r


Page | 52
Assuming infinite input impedance,
i f
i i =
Thus, we find the output voltage as
i
f
o
i
o
f f o
R
R
A
v
v
A
v
R i v v |
.
|

\
|
+ = =


i
f
i
i
f
o
R
R
v
AR
R
A
v =
|
|
.
|

\
|
+ +
1
1 Equation 3.29
Thus, the closed-loop gain G of this amplifier is
A R
R
R
R
v
v
G
i
f
i
f
i
o
1
1 1
|
|
.
|

\
|
+ +

= = Equation 3.30
Note that as A approaches infinity, G approaches
i
f
R
R
and

v approaches zero. Even if A does not

approach infinity, as long as A
R
R
i
f
<< + 1 , the response of this op-amp would approach the ideal case.
Hence, in design, we once we ensure that A
R
R
i
f
<< + 1 , we can analyse the circuit using the ideal op-amp
model.
In the same vein, we can find the closed loop gain for a non-inverting amplifier with finite open-loop gain
and all other conditions being ideal to be
A R
R
R
R
v
v
G
i
f
i
f
i
o
1
1 1
1
|
|
.
|

\
|
+ +
+
= = Equation 3.31
Once again, as with the inverting amplifier, we can use the ideal op-amp model for analysis by ensuring that
A
R
R
i
f
<< + 1 .
Example 3.5
For the inverting amplifier shown in figure 3.21, if O = k R
i
1 and O = k R
f
100 ,
a. Find the closed-loop gain when the open loop gain is 1000, 10,000 and 100,000. In each case,
determine the percentage error of the magnitude of G relative to the ideal value of
i f
R R obtained
with infinite open-loop gain.
b. If the open-loop gain changes from 100,000 to 50,000 (i.e. drops by 50 %), what is the
corresponding percentage change in the magnitude of the closed-loop gain?
Solution:


Page | 53
a. Substituting the given values into equation 3.30 we obtain the values given in the following table
where the percentage error is defined as
( )
( )
% 100

=
i f
i f
R R
R R G
c
A G
1000 90.83 -9.17 %
10,000 99.00 -1.00 %
100,000 99.90 -0.10 %

b. Using equation 3.30 again, we find that for A = 50,000, 80 . 99 = G . Thus, a 50 % change in the
open-loop gain results in a change of only -0.1 % in the closed loop gain.

3.3.2 Effect of Real Input Resistance
Now, we will obtain the response of the amplifiers with a finite input resistance. Consider the inverting
circuit in figure 3.22. The amplifier has a finite input resistance,
d
r and a finite gain A.

Figure 3.22
Since the input resistance is finite, a current flows into the inverting and non-inverting terminals. This
current causes there to be a potential difference between the inverting and non-inverting terminals.
+

=
=
i i
i 0

A
v
r i v
o
d
= =


Hence,
d
o
Ar
v
i =

i
o
i
i
i
o
i
i
i
i
AR
v
R
v
R
A
v
v
R
v v
i + =
+
=

=


-
+
i
R
f
R

i
v
i
i
f
i
o
v
A
d
r

i
+
i


Page | 54
d
o
i
o
i
i
f
Ar
v
AR
v
R
v
i + + =
Thus, we can compute the output voltage to be
d
f
o
i
f
o
i
f
i o f f o
Ar
R
v
AR
R
v
R
R
v
A
v v R i v = + =

1

Therefore, the closed loop voltage gain of the amplifier is
A r
R
R
R
R
R
v
v
G
d
f
i
f
i
f
i
o
1
1 1
|
|
.
|

\
|
+ + +

= = Equation 3.32
From this, we can see that if the open-loop gain tends to infinity, the closed-loop gain tends to the ideal case
i
f
R
R
G . We can also see that if the input impedance tends to infinity, the closed-loop gain becomes
equation 3.30. In a design, to minimize the effects of finite input resistance and finite open-loop gain, we
ensure that A
r
R
R
R
d
f
i
f
<< + + 1 .
If we run the same analysis for a non-inverting amplifier, we obtain the closed-loop gain to be
A r
R
R
R
R
R
v
v
G
d
f
i
f
i
f
i
o
1
1 1
1
|
|
.
|

\
|
+ + +
+
= = Equation 3.33
From which we see also that we can approximate the ideal case by ensuring that A
r
R
R
R
d
f
i
f
<< + + 1 .
3.3.3 Effect of Non-zero Output Resistance
Consider the circuit in figure 3.23

Figure 3.23
d
Av
+
_
o
v
d
r
o
r
i
R
i
i
-
f
R

f
i

i
i
v

+
+
i
-



+
d
v
o
i

L
R


Page | 55
Our goal is to find the closed loop transfer function of this system. The input is
i
v and the output is
o
v .
Hence, if we can express
o
v in terms of
i
v and all other known parameters (i.e.
L d f i
R r A R R and r , , , ,
o
, then
we can obtain the closed loop transfer function.
From the circuit, 0 =
+
v . Hence,
d
r
v
i

=
i
i
i
R
v v
i

= Equation 3.34
d i i
i
i f
r
v
R
v
R
v
i i i

= = Equation 3.35

|
|
.
|

\
|
+ + + = + + = = v
r
R
R
R
v
R
R
v
r
R
v v
R
R
v R i v v
d
f
i
f
i
i
f
d
f
i
i
f
f f o
1
R
R
i
f
Equation 3.36
Thus, we have gotten
o
v in terms of
i
v and

v but we do not know what

v is. Hence, we need to find this

in terms of known terms.
o o o d
r i v Av =
A
r i v
v v
o o o

=
+

Now,
+
v is grounded. Thus, we have that
A
r i
A
v
v
o o o
+ =

We have found

v in terms of
o
i but we dont know
o
i but we can find it from the circuit using KCL.
L
o
L
R
v
i =
L
o
d i i
i
L f o
R
v
r
v
R
v
R
v
i i i = =


Thus, we can now find

v
o
L
o
d
o
i
o
i
i
o o
v
AR
r
v
Ar
r
v
AR
r
v
AR
r
A
v
v + =


i
i
o
L
o
o
d
o
i
o
v
AR
r
AR
r
A
v
Ar
r
AR
r
v +
|
|
.
|

\
|
+ =
|
|
.
|

\
|
+ +

1
1
|
|
.
|

\
|
+ +
+
|
|
.
|

\
|
+
=

d
o
i
o
i
i
o
L
o
o
Ar
r
AR
r
v
AR
r
AR
r
A
v
v
1
1
Equation 3.37
So, we can compute the output voltage
o
v as


Page | 56
|
|
|
|
|
.
|

\
|
|
|
.
|

\
|
+ +
+
|
|
.
|

\
|
+
|
|
.
|

\
|
+ + + =
d
o
i
o
i
i
o
L
o
o
d
f
i
f
i
i
f
o
Ar
r
AR
r
v
AR
r
AR
r
A
v
r
R
R
R
v
R
R
v
1
1
1
i
d
o
i
o
i
o
d
f
i
f
i
i
f
d
o
i
o
L
o
d
f
i
f
o
v
Ar
r
AR
r
AR
r
r
R
R
R
v
R
R
Ar
r
AR
r
AR
r
A r
R
R
R
v
|
|
|
|
|
.
|

\
|
|
|
.
|

\
|
+ +
|
|
.
|

\
|
+ +
+ =
|
|
|
|
|
.
|

\
|
|
|
.
|

\
|
+ +
|
|
.
|

\
|
+
|
|
.
|

\
|
+ +
+
1
1
1
1
1
1
Thus, we obtain the transfer function as
|
|
.
|

\
|
+
|
|
.
|

\
|
+ + +
|
|
.
|

\
|
+ +
|
|
.
|

\
|
+ +
|
|
.
|

\
|
+ +
= =
L
o
d
f
i
f
d
o
i
o
i
f
d
o
i
o
i
o
d
f
i
f
i
o
AR
r
A r
R
R
R
Ar
r
AR
r
R
R
Ar
r
AR
r
AR
r
r
R
R
R
v
v
G
1
1 1
1 1
Equation 3.38
Now, if we compare equations 3.38, 3.30 and 3.32, we see the similarities between them. If the open-loop
gain is infinite, equation 3.38 becomes equation 3.3, the closed-loop gain for the ideal op-amp. If the output
impedance is zero, equation 3.38 becomes equation 3.32. If the input resistance is set to infinity and the
output resistance to zero, equation 3.38 becomes equation 3.30.
Note that in all these three cases considered above (subsections 3.3.1, 3.3.2 and 3.3.3), a very large open loop
gain offsets the resistance imperfections and the practical op-amp closely approximates the ideal op-amp.
Typically, the open loop gain of the op-amp is greater than 100,000 (i.e. 100 dB). With a gain of 100 dB, you
can use the ideal model in low precision applications. However, in high precision circuits the real model
should be used.
3.3.4 Effect of Finite Bandwidth
As mentioned earlier, the open-loop gain of an op-amp is finite. The open-loop gain is not only finite, but it
also decreases with frequency. At low frequencies and at dc, the gain is largest but as the frequency of the
input signal increases, the gain of the amplifier decreases. The open-loop gain is not flat for all frequencies as
was earlier assumed. A plot of the frequency response of a typical op-amp is shown in figure 3.24.



Page | 57
Figure 3.24: Typical op-amp frequency response
Please note that the frequency response plotted in figure 3.24 is typical for internally compensated op-amps
(op-amps coupled with a capacitor on their IC to make them a single-pole system) and is not general to all
op-amps. The 20 db/decade roll off is specific to single-pole systems. If it were a two-pole system, the roll-
off would have been 40 dB/decade, etc. But dont worry about all the things in this paragraph as I am sure
some of them (if not all) would sound like gibberish. The terminology used here will be treated in your 400
Level. For the mean time, this paragraph was simply included to let you know that this is a typical frequency
response, but the fine print of it is not uniform.
The implication of having a non-flat frequency response are that:
1. When the op-amp is to be used to amplify an ac signal, we need to know the frequency of the ac
signal to determine the gain of the system.
2. At very high frequencies, the gain becomes so small that it is completely impossible to use the ideal
op-amp model for analysis.
3. If an op-amp system is to be used to amplify signals over a range of frequencies, we must look for
an op-amp which has a sufficiently flat response over that range of frequencies otherwise, the gain
would vary for signals of different frequencies.
3.4 Negative Feedback
Negative feedback is a process whereby a fraction of the output voltage is returned to the input in a way to
subtract from the input signal. In op-amp circuits, this is done by returning a fraction of the output voltage
to the inverting input terminal of the op-amp. Figure 3.25 illustrates this.

Figure 3.25: A system with negative feedback
Feedback is necessary in op-amp circuits because with such a large open-loop gain, the output of the op-amp
would always saturate if there were no feedback. The open-loop op-amp amplifies the differential voltage
between its two terminals. With an infinite open-loop gain, if
+
> v v ,
sat o
v v + = (the output voltage
saturates). If
+
> v v ,
sat o
v v = . If
+
= v v , 0 =
o
v . Hence, it is not practical to use an op-amp in its
open loop configuration for linear amplifier applications.
With the feedback loop included in the circuit, lets say that

v is zero and then some positive voltage

i
v is
applied to
+
v .
i d
v v v v = =
+
and the output begins to rise towards
sat
v + . As
o
v rises, the feedback
voltage
o
v | also rises. This feedback voltage is subtracted from
i
v and the new
d
v which is amplified is the
difference between
i
v and
o
v | . If
i
v is larger than
o
v | , the output keeps rising and the new
o
v | is
feedback and subtracted from the input. If the
i
v is still larger than the new
o
v | , the output keeps on rising.
The output keeps on rising until
o i
v v | = , at which point the output stops rising. Now, when
o i
v v | = , the
output is to be zero. Hence, the output of the op-amp begins to fall towards zero, but once it falls below
i
v
o
v
A
|
d
v
o
v |
+
-


Page | 58
|
i
o
v
v = , the output rises once again to this point. This slight jitter keeps going on, but is so small that we
can say that the output has settled to
|
i
o
v
v = .
Now, let us analyse the system shown in figure 3.25.
o i d
v v v | =
( )
o i d o
v v A Av v | = =
i o o
Av Av v = + |
A
A
v
v
i
o
| +
=
1
Equation 3.39
is called the feedback gain or the gain of the feedback element. Note that in equation 3.39, if the open-
loop gain, A, is infinite,
|
i
o
v
v = which is what we arrived at in the paragraph before the derivation of
equation 3.39. Since the open-loop gain of the op-amp is always very large, we can approximate equation
3.39 as
|
|
1
1
1
~
+
=
A
v
v
i
o
Equation 3.40
Equation 3.40 holds as long as A << | .
For a non-inverting op-amp, we feed back a voltage which is divided between
i
R and the feedback resistor,
f
R so that the feedback gain is
i f
i
R R
R
+
= | . Hence, we can obtain the voltage gain of the non-inverting
amplifier as
i
f
i
i f
i
o
R
R
R
R R
v
v
+ =
+
= = 1
1
|

which is the same as was obtained earlier by mathematical analysis. You can also confirm that if we include
the finite open-loop gain in the equation, we obtain equation 3.31.
Note from equation 3.40 that by introducing negative feedback into the circuit, we minimize the dependence
of the circuit on the open-loop gain of the op-amp (If the open-loop gain is infinite, then the closed-loop
gain is completely independent of the open-loop gain). The implication of this is that if the open-loop gain
of the op-amp varies with time, the effect of this on the overall gain of the system is negligible. In practice,
the gain of the op-amp varies with temperature. This dependence on temperature is practically eliminated by
the use of feedback. In summary, when negative feedback is used, the resultant amplifier characteristic is less
dependent on the characteristics of the open-loop amplifier but more dependent on the properties of the
feedback network only.
Hence, we can summarize the benefits for the use of feedback in op-amps as:
1. It makes it possible to use op-amps as linear amplifiers with reasonable gains. By inference, it makes
it possible to adjust the gain of the op-amp to a desired value at will. Hence, it makes the output of
the amplifier predictable.


Page | 59
2. It stabilizes the output of the op-amp and reduces the varying in the output with temperature. It
makes the system immune to distortion and reduces nonlinearity.
3. It makes it possible to obtain a desired frequency response from the amplifier. We will see this when
we treat active filters.
Positive feedback occurs when we return a fraction of the output voltage is returned to the input in a way to
add from the input signal. We do this by returning a fraction of the output voltage to the non-inverting
terminal of the op-amp.
3.5 Noise Gain
The gain factor referred to as the noise gain describes the degree of imperfection of the op-amp. It is the
gain factor of the noise present at the non-inverting terminal of the op-amp assuming that all the signal
sources are de-energised (or grounded). It is called the noise gain because input errors and noise are amplified
by this non-inverting gain, even for an inverting amplifier. For example, take the inverting weighted summer
in figure 3.26.

Figure 3.26: An inverting weighted summer
We find the noise gain by grounding all input signals and assuming a noise signal is present at the non-
inverting terminal of the op-amp.

Figure 3.27: Computing the noise gain
Hence, we find the noise gain
n
K for this circuit to be
3 2 1
// //
1
R R R
R
K
f
n
+ = Equation 3.41
Different types of noise exist in op-amps (discussed in next section). When noise exists, the voltage obtained
at the output of the amplifier becomes
( )
2 2
n n noiseless o o
K e v v + = Equation 3.42
where
noiseless o
v =
o
v if there is no noise i.e. the
o
v we have been computing before this section
n
e is the noise
2
R
f
R

o
v
+
-
1
R
3
R
P
N
v
2
R
f
R

2
v
o
v
+
-
1
R
1
v
3
R
3
v
P


Page | 60
n
K is the noise gain
3.6 Noise in Operational Amplifiers
1

There are five types of noise in op amps and associated circuitry:
1. Shot noise
2. Thermal noise
3. Flicker noise
4. Burst noise
5. Avalanche noise
Some or all of these noises may be present in a design, presenting a noise spectrum unique to the system. It
is not possible in most cases to separate the effects, but knowing general causes may help the designer
optimize the design, minimizing noise in a particular bandwidth of interest. Proper design for low noise may
involve a balancing act between these sources of noise and external noise sources.
3.6.1 Shot Noise or Schottky Noise
This is sometimes also called quantum noise. It is caused by random fluctuations in the motion of charge
carriers in a conductor. Current flow is electrons, charged particles that move in accordance with an applied
potential. The flow of electronics in a conductor is not always smoothly continuous. When the electrons
encounter a barrier, potential energy builds until they have enough energy to cross that barrier. When they
have enough potential energy, it is abruptly transformed into kinetic energy as they cross the barrier. Each
electron contributes a little pop as its stored energy is released when it crosses the barrier. Barriers could be
pn junctions or imperfections and impurities in conductors.
Some characteristics of shot noise are:
1. Shot noise is always associated with current flow. It stops when the current flow stops.
2. Shot noise is independent of temperature.
3. Shot noise is spectrally flat or has a uniform power density, meaning that when plotted versus
frequency it has a constant value.
4. Shot noise is present in any conductor, though it is larger in semiconductors than in conductors.
3.6.2 Thermal Noise
Thermal noise is sometimes referred to as Johnson noise after its discoverer. It is generated by thermal
agitation of electrons in a conductor. Simply put, as a conductor is heated, it will become noisy. Heat disrupts
the electrons response to an applied potential. It adds a random component to their motion. Thermal noise
only stops at absolute zero. Figure 3.28 illustrates thermal noise.

Figure 3.28: Thermal noise




1
Much of this section is based on the write-up at http://focus.ti.com/lit/ml/sloa082/sloa082.pdf titled Op-amp noise
theory and applications, Bibliography [1].


Page | 61
Like shot noise, thermal noise is spectrally flat or has a uniform power density (it is white), but thermal noise
is independent of current flow.
The noise from a resistor is proportional to its resistance and temperature. It is important not to operate
resistors at elevated temperatures in high gain input stages. Lowering resistance values also reduces thermal
noise.
3.6.3 Flicker Noise
Flicker noise is also called 1/f noise. Its origin is one of the oldest unsolved problems in physics. It is present
in all active and many passive devices. It may be related to imperfections in crystalline structure of
semiconductors, as better processing can reduce it.
Some characteristics of flicker noise are:
1. It increases as the frequency decreases, hence the name 1/f
2. It is associated with a dc current in electronic devices
3. It has the same power content in each octave (or decade)
Flicker noise is found in carbon composition resistors, where it is often referred to as excess noise because it
appears in addition to the thermal noise that is there. Other types of resistors also exhibit flicker noise to
varying degrees, with wire wound showing the least. Since flicker noise is proportional to the dc current in
the device, if the current is kept low enough, thermal noise will predominate and the type of resistor used
will not change the noise in the circuit.
Reducing power consumption in an op amp circuit by scaling up resistors may reduce the 1/f noise, at the
expense of increased thermal noise.
3.6.4 Burst Noise
Burst noise, also called popcorn noise, is related to imperfections in semiconductor material and heavy ion
implants. It is characterized by discrete high-frequency pulses. The pulse rates may vary, but the amplitudes
remain constant at several times the thermal noise amplitude. Burst noise makes a popping sound at rates
below 100 Hz when played through a speaker it sounds like popcorn popping, hence the name. Low
burst noise is achieved by using clean device processing, and therefore is beyond the control of the designer.
3.6.5 Avalanche Noise
Avalanche noise is created when a pn junction is operated in the reverse breakdown mode. Under the
influence of a strong reverse electric field within the junctions depletion region, electrons have enough
kinetic energy that, when they collide with the atoms of the crystal lattice, additional electron-hole pairs are
formed. These collisions are purely random and produce random current pulses similar to shot noise, but
much more intense.

Figure 3.29: Avalanche Noise
When electrons and holes in the depletion region of a reversed-biased junction acquire enough energy to
cause the avalanche effect, a random series of large noise spikes will be generated. The magnitude of the
noise is difficult to predict due to its dependence on the materials.


Page | 62
Because the zener breakdown in a pn junction causes avalanche noise, it is an issue with op amp designs that
include zener diodes. The best way of eliminating avalanche noise is to redesign a circuit to use no zener
diodes.
3.7 Other Issues with Real Op-Amps
Apart from the issues mentioned in sections 3.3, 3.5 and 3.6, a number of other issues exist with real
(practical) op-amps. These are highlighted below:
3.7.1 Slew rate.
Within an op-amp there is inherent semiconductor and circuit capacitance, as well as those added for
frequency compensation. There is also load capacitance at the output. The rate of change of voltage at a
point in the circuit depends on the available current to charge the capacitance at that point:
C
i
dt
dv
o max
max
= Equation 3.43
This mechanism sets an upper limit to the rate at which the output voltage of an op-amp can change. This
maximum rate at which the output voltage of an op-amp can change is called the slew rate. Slew rate is
usually expressed in V/s. It typically varies from 0.5 V/s to 35 V/s.
Slew rate is usually measured in the unity gain non-inverting amplifier configuration. Ideally, the slew rate
should be infinite i.e. immediately an input is applied, the output should jump immediately to the
corresponding output. This however never happens in a real op-amp. Instead, the output rises (or falls) over
a period to the corresponding output. This is illustrated in figure 3.30.

Figure 3.30: Slew Rate
3.7.2 Common Mode Rejection Ratio
CMRR has been dealt with but is only mentioned here again for emphasis. The CMRR is usually expressed in
decibels, with common devices having ratings between 60 dB to 120 dB. The higher the CMRR is, the better
the device is deemed to be.
3.7.3 Input Offset Voltage, Input Bias Current and Input Offset Current
According to the ideal model for an op-amp, the dc output voltage should be zero when the dc input is zero.
However, a dc voltage exists at the output terminals even when the input voltage is zero. This dc voltage
measured at the output of an op-amp when the voltage at the input terminals of the op-amp is zero is called
the offset voltage. For example, if an op-amp with a gain of 100 has an input offset voltage of 1 mV, then if
Ideal Response
of op-amp
without slew
Real Response
with slew rate
Voltage
(V)
t (s)
Output voltage
o
v
Input voltage,
i
v


Page | 63
the input signal voltage is 1 mV, the voltage at the output would be 101 mV instead of 100 mV. This dc
voltage adds to all voltages at the output of the op-amp and hence the name offset voltage.
The offset voltage can be nullified by applying a dc voltage at the input such that it nullifies the dc offset at
the output. This dc voltage that must be applied at the input terminal to force the quiescent dc output
voltage to zero or other level, if specified, given that the input signal voltage is zero is called the input offset
voltage.
Offset effects are much more important in the amplification of dc signals than in the amplification of ac
signals. This is because an offset at the output would only offset an ac signal from the origin but has no
effect on the peak to peak value of the ac signal. Also, a coupling capacitor can be used to remove all dc
offset at the output. In dc applications, it is necessary to apply an input offset voltage to produce accurate
results at the output of the amplifier.
Note that offset voltage is dependent on temperature. Hence in a datasheet, the offset voltage is specified at
a specific temperature.
All op-amps require some small relatively constant current at their input terminals, called an input bias
current. In the case of a differential op-amp the input bias current is defined as the average value (half the
sum) of the currents at the two input terminals with the op-amp output voltage at zero. It too is specified at
a particular temperature. Ideally the currents taken by the two input terminals should be the same under
these conditions but in practice some degree of mismatch always exists.
The input offset current is defined as the difference in the input bias currents to the two input terminals, at
a particular temperature. With equal source impedances connected to the two input terminals, it is only this
mismatch, or difference current, which causes an offset error. The effects of bias and offset currents tend to
overshadow the effects of input offset voltage when the input source impedances are high.
Provision is normally made for balancing out the effects of initial op-amp offsets by means of a suitable
potentiometer.
3.7.4 Drift
After adjustment has been made to minimize the effects of the input offset voltages, currents and input bias
current, the output voltage of an op-amp is still found to change, even though the applied input signal is zero
or a constant DC value. This slow change in the output voltage of an op-amp is referred to as drift. Drift
problems do not arise in AC op-amps because any DC change in voltage level is effectively blocked off from
the output by a coupling capacitor. In op-amps, drift with temperature normally represents the largest single
source of drift. This causes the biggest errors in many applications. It arises because of the temperature
dependence of the characteristics of both active and passive components.
The use of feedback in op-amp circuits minimizes the amount of drift which occurs.
3.7.5 Power-supply rejection ratio
The power-supply rejection ratio PSRR is the ratio of the change in input offset voltage to the corresponding
change in one power-supply, with all remaining power voltages held constant. The PSRR is also called
"power supply insensitivity". Typical values are in V / V or mV/V.
Table 3.2 presents a summary of features of an ideal and a typical practical opamp.
Table 3.2: Comparison of an ideal and a typical practical op-amp
Property Ideal Op-Amp Practical (Typical) Op-Amp
Open-loop gain Infinite Very high (>10000 )
Open-loop bandwidth Infinite Dominant pole(10 Hz)


Page | 64
CMRR Infinite High (> 60 dB)
Input Resistance Infinite High (>1 M)
Output Resistance Zero Low(< 100 )
Input Bias Currents Zero Low (< 50 nA)
Offset Voltages Zero Low (< 10 mV)
Offset Currents Zero Low (< 50 nA)
Slew Rate Infinite A few V/s
Drift Zero Low

3.8 A Word on Op-Amp Ratings
The following are a couple of things which you should take note of when creating a design with an op-amp:
3.8.1 Maximum Differential Supply Voltage
This is the maximum difference signal that can be applied safely to the opamp power supply terminals. Often
this is not the same as the sum of the maximum supply voltage ratings. For example, the 741 op-amp (the
741 op-amp is a general purpose op-amp) has 18 V as the maximum power supply voltage, whereas the
maximum differential supply voltage is only 30 V. It means that if the positive supply is 18 V, the negative
supply can be only -12 V.
3.8.2 Power dissipation, Pd
This rating is the maximum power dissipation of the op-amp in the normal ambient temperature range. A
typical rating is 500 mW.
3.8.3 Maximum Power Consumption
The maximum power dissipation, usually under output short circuit conditions, that the device can survive.
This rating includes both internal power dissipation as well as device output power requirements.
3.8.4 Maximum Input Voltage
This is the maximum voltage that can be applied simultaneously to both inputs. Thus, it is also the maximum
common-mode voltage. In most bipolar op-amps, the maximum input voltage is nearly equal to the power
supply voltage.
3.8.5 Differential Input Voltage
This is the maximum differential-mode voltage that can be applied across the inverting and non-inverting
inputs.
3.8.6 Maximum Operating Temperature
The maximum temperature is the highest ambient temperature at which the device will operate according to
specifications with a specified level of reliability.
3.8.7 Minimum Operating Temperature
The lowest temperature at which the device operates within specification.
3.8.8 Maximum Output Voltage Swing
This is the maximum output swing that can be obtained without significant distortion(at a given load
resistance).


Page | 65

Figure 3.31: A model for a practical op amp illustrating non-ideal effects. (lifted from The Electrical
Engineering Handbook, chapter 27, CRC Press LLC)

4. APPLICATIONS OF OPERATIONAL AMPLIFIERS
4.1 Integrator
With an ideal integration operation, the output voltage ( ) t v
o
is expressed as
( ) ( )
}
= dt t v t v
i o
Equation 4.1
A simple passive circuit which performs integration is shown in figure 4.1.

Figure 4.1: A simple passive integrator
c
v

c
i
C



Page | 66
The instantaneous voltage (voltage at any instant) across the capacitor is related to the instantaneous current
flowing through the capacitor by
( ) ( )
}
= dt t i
C
t v
i c
1
Equation 4.2
Now, consider the system shown in figure 4.2

Figure 4.2: An integrator
In figure 4.2, assuming that the op-amp is an ideal op-amp,
R
v
i i
i
i c
= =
Hence, we obtain the output voltage of the system as
( ) ( )
}
= dt t i
C
t v
c o
1

( ) ( )
}
= dt t v
RC
t v
i o
1
Equation 4.3
This circuit is sometimes referred to as the true integrator
One problem with the circuit shown in figure 4.2 is that as the frequency of the input signal drops, the
impedance of the feedback element tends toward infinity such that the capacitor becomes like an open-
circuit. Now, we know that the transfer characteristic of an inverting amplifier is
i
f
i
o
Z
Z
v
v
=
Hence, the gain of the amplifier becomes infinite and it saturates and cannot behave like a linear amplifier. A
better integrator circuit is presented in figure 4.3

Figure 4.3
-
+
i
R
f
R

i
v
i
i
o
v
C

-
+
R
C

i
v
i
i
c
i
o
v


Page | 67
C R j
R
C j
R Z
f
f
f f
e e +
= =
1
1
//
i i
R Z =
Thus, the gain of the system in figure 4.3 is
C R j
R
R
v
v
f
i
f
i
o
e +

=
1
Equation 4.4
With this system of figure 4.3, the maximum possible gain is
i
f
R
R
and the minimum gain is zero. Zero gain
occurs when the frequency of the input signal is very high. This severe attenuation at high frequencies can be
solved by placing a second feedback resistor, this time in series with the feedback capacitor.

Figure 4.4
Limitation of the Integrator:
Because a true integrator changes a dc current into a linearly increasing ramp voltage, a small bias current or
offset current may make the output to move toward saturation. Therefore, an op-amp that will be used for
integration must have a very low (ultra low) offset current and bias current.
4.2 Differentiator
Consider the circuit in figure 4.5

Figure 4.5: A differentiator
Assuming that the op-amp in figure 4.5 is ideal, we have
f
i
c
i
dt
dv
C i = =
-
+
R
i
v
c
i
f
i
o
v
C

-
+
i
R
1
f
R
i
v
i
i
o
v
C

2
f
R


Page | 68
R i v
f o
=
( )
( )
dt
t dv
RC t v
i
o
= Equation 4.5
As with the true integrator, one problem with the true differentiator at low frequencies is that the gain is
extremely low as the input impedance
i
Z is much larger than the feedback impedance,
f
Z due to the
behaviour of the capacitor like an open circuit. This issue can be corrected, once again, by placing a resistor
in parallel with the capacitor. The second obvious problem with figure 4.5 is the fact that at very high
frequencies, the capacitor becomes a short circuit and hence, the gain of the amplifier becomes extremely
large causing saturation. The solution to this is to place a second input resistor in series with the input
capacitor.

Figure 4.6
Limitation:
Differentiators are not always used because noise present in electronic circuits is amplified by the
differentiation process. This is because noise normally tends to have sudden abrupt changes in amplitude and
these sudden changes result in pronounced output noise. Note that the greater the rate of change of the
input, the greater the value of the output signal. Hence, noise added to the input signal at the input can
saturate the amplifier even when the input signal is a low dc signal.
4.3 Phase Shift Circuit
4.3.1 All-Pass Phase Lag Circuit

Figure 4.7
By superposition we find the output voltage in terms of the input voltage as
i i i i o
v
RC j
v v
RC j R
R
v
R
R
v
e e +
+ =
|
|
.
|

\
|
+
|
|
.
|

\
|
+ + =
1
2
1
1
1
1
1
1
1

i o
v
RC j
RC j
v
e
e
+

=
1
1

1
R
1
R
i
v o
v
R
-
+
C
-
+
f
R
i
v
f
i
o
v
C

1 i
R
2 i
R


Page | 69
Hence the transfer characteristic of the is system is
RC j
RC j
v
v
i
o
e
e
+

=
1
1
Equation 4.6
Note that the transfer characteristic of a system is also called the transfer function of the system. Hence,
equation 4.6 can also be written as
( )
RC j
RC j
T
e
e
e
+

=
1
1
Equation 4.7
Now, if we find the magnitude of the gain, we obtain
( )
( )
( )
1
1
1
2 2
2 2
=
+
+
=
RC
RC
T
e
e
e Equation 4.8
Hence, no matter the frequency of the input signal, the gain of the system will always be unity, hence the
name all-pass. Equation 4.8 is called the magnitude response of the system. the magnitude respone of the
system is a representation of the magnitude of the response of a system at different frequencies.
Now, we will obtain the phase response of the system. If we eliminate the complex numbers from the
denominator of equation 4.7, we have
( )
( )
( )
2
2
1
2 1
1
1
1
1
RC
RC j RC
RC j
RC j
RC j
RC j
T
e
e e
e
e
e
e
e
+

=

=
Thus, we have that the phase response is
( )
( )
|
|
.
|

\
|

= Z

2
1
1
2
tan
RC
RC
w T
e
e
Equation 4.9
Hence, from this, we can see that as long as the frequency is not zero, the phase of the output signal will
always lag the phase of the input signal. Thus, by adjusting the values of R and C at a particular frequency,
we can shift the phase of an input signal voltage.
4.3.2 All-Pass Phase Lead Circuit

Figure 4.8
i i i i o
v
RC j
RC j
v v
RC j
RC j
R
R
v
R
R
v
e
e
e
e
+
+ =
|
|
.
|

\
|
+
|
|
.
|

\
|
+ + =
1
2
1
1
1
1
1
1

1
R
1
R
i
v o
v
R
-
+
C


Page | 70
i o
v
RC j
RC j
v
e
e
+

=
1
1

Hence, the transfer function of the system of figure 4.8 is
( )
RC j
RC j
v
v
T
i
o
e
e
e
+

= =
1
1
Equation 4.10
We see also that the magnitude response of this system also is a flat unity gain response. The phase response
of this system however is the negative of equation 4.9. Hence, this system leads the input signal.
4.4 Comparators
4.4.1 Simple Comparator
Up to this point, the op-amp has been presented as a device which is useless without feedback because of
saturation. This is however untrue. One case in which the op-amp is used in open-loop is in a comparator.
The output of a comparator is generally always
sat
v + or
sat
v . If the voltage at the inverting terminal of
the op-amp is higher than that at the non-inverting terminal, the output of the comparator saturates at
sat
v
and it saturates at
sat
v + if the converse is the case. Hence, by looking at the output of the comparator, we
can tell which of the two input terminals has a higher value, hence the name comparator.
A comparator is a circuit used to sense when a varying signal reaches some threshold value. Comparators
find application in many electronic systems. They may be used to sense when an electrical signal reaches or
exceeds some defined voltage level.
Consider the circuit in figure 4.9 (a). The output of the circuit remains high at
sat
v + until when
i
v becomes
larger than
ref
v . At this point, the output falls abruptly to
sat
v . The response of the circuit is shown in
figure 4.9 (b).

Figure 4.9
Consider the circuit of figure 4.10 (a). The output of the circuit remains high at
sat
v + until when
i
v
becomes larger than
2 1
R R v
ref
. At this point, the output falls abruptly to
sat
v . The response of the
circuit is shown in figure 4.10 (b).

Figure 4.10
i
v
o
v
-
+
ref
v
i
v
2
1
R
R
v
ref

o
v
sat
v +
sat
v
(a)

(b)

1
R
2
R
i
v
o
v
-
+
ref
v i
v
ref
v
o
v
sat
v +
sat
v
(a)

(b)



Page | 71
A comparator may be built using dedicated comparator ICs. These dedicated devices are like op-amps except
they usually have fast switching outputs designed for driving digital circuits. Alternatively, op-amps may be
used as comparators, and are able to drive digital circuits if suitable output voltage limiting is provided.
However, not all op-amp types are suitable. In addition to low offset and drift, rapid switching times are
normally essential.
4.4.2 Schmitt Trigger Circuit
Hysteresis is a phenomenon in which the transition point is different when switching from the low to the
high as compared with when switching from the high to the low state. It is used in to minimize the
possibility of false triggering produced by noise and other glitches in the vicinity of the transition point when
using a comparator. It is also used in waveform generators. A comparator with hysteresis is called a Schmitt
trigger circuit.
The Schmitt trigger circuit is one application in which positive feedback is used. Positive feedback is applied
to the op-amp via a resistor.

Figure 4.11: Inverting Schmitt trigger circuit
Note that in figure 4.11,
ref
v might be ground. The response of the circuit is shown in figure 4.12.

Figure 4.12: Hysteresis output of a Schmitt trigger circuit
When the output voltage is at
sat
v + , as
i
v is increased, as long as ( ) ( )
2 1 1
R R R v v v
ref sat i
+ + < , the
output remains saturated at
sat
v + since a fraction of
sat
v + is feedback to the input and added to the
voltage at the non-inverting terminal so that it remains higher than the voltage at the inverting terminal.
Once ( ) ( )
2 1 1
R R R v v v
ref sat i
+ + > , the output falls from
sat
v + to
sat
v . A fraction of this new
output voltage is feedback to the input and added to the voltage at the non-inverting terminal reducing the
voltage here further and keeping the voltage saturated at
sat
v . If we now begin to reduce the value of
i
v ,
the output of the amplifier remains saturated at
sat
v until ( ) ( )
2 1 1
R R R v v v
ref sat i
+ < , at which
point, the output once again jumps to
sat
v + .
The rectangle on the input/output characteristic curve of figure 4.12 is called a hysteresis loop.
i
v
( )
2 1
1
R R
R
v v
ref sat
+
+
o
v
sat
v +
sat
v
( )
2 1
1
R R
R
v v
ref sat
+


1
R
2
R
i
v
o
v
ref
v
-
+
1
i

2
i



Page | 72
The benefit of using a Schmitt trigger circuit is illustrated in figures 4.13 to 4.15. Figure 4.13 (a) shows a
circuit drawn and simulated with CircuitMaker Student Edition. Figure 4.13 (b) shows the response of the
circuit to a 1 Hz, 5 V peak input signal. Figure 4.14 (a) presents the same circuit of figure 4.13 (a), but this
time with a 10 Hz, 1 V peak signal added to the 1 Hz 5 V peak signal. The 10 Hz signal serves as noise to the
input signal. Figure 4.14 (b) shows the response of the circuit to this noisy signal. We see that there is no
spurious switching at the two reference voltages. Now, figure 4.15 (a) replaces the Schmitt trigger of figure
4.14 with a comparator. Figure 4.15 (b) shows the response of the circuit to the noisy signal. With a normal
comparator, we see that at the reference voltage, a lot of spurious switching goes on. Note that the 10 k
resistor in the figures simply serves as the load connected to the amplifier.

(a) (b)
Figure 4.13

(a) (b)
Figure 4.14

(a) (b)
Figure 4.15
The non-inverting Schmitt trigger circuit is presented in figure 4.16. The student is left to analyse the
operation of this circuit.
1 Hz
-5/5V
+
10V
+
10V
+
UA741
10k
1k
1k
10 Hz
-1/1V
SUM
1 Hz
-5/5V
+
10V
+
10V
+
UA741
10k
1k
1k
10 Hz
-1/1V
SUM
1 Hz
-5/5V
+
10V
+
10V
+
UA741
10k


Page | 73

Figure 4.16
A possible application of a Schmitt trigger circuit can be in a electric pressing iron. When the temperature
goes above a specified threshold, the power supply is turned off i.e. 0 =
sat
v . The pressing iron is however
not turned on again until the temperature has fallen below a different threshold which is lower than the first.
Note that in a pressing iron, if this system is to be used, the Schmitt trigger could be made to power a relay
which powers the pressing iron.
4.5 Signal Processing
4.5.1 Half-wave Rectification
A simple passive half-wave rectification circuit is shown in figure 4.17. The circuit is a shunt half-wave
rectification circuit. The peak of this circuit is the same as that of the input circuit, but a little of the negative
part of the input signal is allowed to pass through to the output.

Figure 4.17
Figure 4.18 presents a series half-wave rectifier with its response. From the response of this system, we can
see that no part of the negative going part of the input signal is passed on to the output. However, note that
because of the forward junction potential, the maximum voltage is less than the peak of the input signal.

Figure 4.18
To obtain a precision half-wave rectifier, we need to use an active network. Figure 4.19 presents an active
half-wave rectification circuit. Note that an active circuit is one which requires a power supply to operate.
Usually it has at least one transistor or op-amp in it. Note that the response of the active circuit is a lot more
precise than the passive circuits while the input signal is positive, the output signal tracks it perfectly; while
the input signal is negative, the output signal is exactly zero.
1
R
2
R
ref
v
o
v
i
v
-
+
1
i

2
i



Page | 74

Figure 4.19
Note that if the diode in figure 4.19 is reversed, the negative part of the input signal is passed to the output.

Figure 4.20
Note once again that the 10 k resistors in figures 4.19 and 4.20 are used as loads for the simulation.
4.5.2 Non-saturating Half-wave Rectifier

Figure 4.21
The major advantage of this circuit is that the feedback loop around the op-amp remains closed at all times,
hence, the op-amp remains in its linear operating region, reducing the possibility of saturation. This rectifying
circuit has an inverting gain of
i
f
R
R
so that we can set the gain by tweaking the resistors to ensure that the
rectifier never saturates. Once again, the 10 k resistor in figure 4.21 is simply a load.
If the diodes are reversed, the output voltage is reversed, to yield positive voltages all the time.
D1
1N4005
1 Hz
V3
-5/5V
+
V2
10V
+
V1
10V
+
U1
UA741
R3
10k
D1
1N4005
1 Hz
V3
-5/5V
+
V2
10V
+
V1
10V
+
U1
UA741
R3
10k


Page | 75

Figure 4.22
4.5.3 Full-wave Rectification

Figure 4.23
A note that the upper part of the circuit can simply be replaced with the diode. If this is done, peaks of both
parts of the rectified full-wave would not be equal. To prevent this, the buffer is used with the diode and
thus, we obtain a perfect full-wave rectified signal whose amplitude can be controlled by setting the values of
the input and feedback resistors.
Figure 4.24 presents an alternative full-wave rectification circuit. The output of this circuit is a negative full
wave rectified signal. Note that the first half of the circuit is the non-saturating half-wave precision rectifier.

Figure 4.24
1N4005
1N4005
1 Hz
-5/5V
+
10V
+
10V
+
UA741
1k
1k
10k
+
UA741
+
10V
+
10V
1N4005
+
UA741
+
10V
+
10V
1 Hz
-5/5V
1N4005
10k
1k
1k
+
10V
+
UA741
+
10V
1N4005
1N4005
1 Hz
-5/5V
+
10V
+
10V
+
UA741
1k
10k
1k
500
1k
1k


Page | 76
4.5.4 Voltage Regulator
A voltage regulator is a device which holds the voltage at its output to a constant value. They take in an
unregulated dc source voltage and give out a constant voltage value despite variations in the input voltage.

Figure 4.25: Non-inverting voltage regulator
The output of this voltage regulator is
z
i
f
o
v
R
R
v
|
|
.
|

\
|
+ = 1 Equation 4.11
The zener using in the simulator, 1N748, the zener voltage is 3.9 V and hence, we see the output is quite
steady at about 7.7 V (theoretically, it should be steady at 7.8 V). Note that the voltage swing in the input
voltage does not affect the output in any way. Note that the voltage regulation takes effect for voltages above
the output voltage specified in equation 4.12. For output voltages less than 7.8 V, the output follows the
input so that
i
i
f
o
v
R
R
v
|
|
.
|

\
|
+ = 1 Equation 4.12
Equation 4.12 comes into effect when
z i
v v > .
Thus, we can rewrite equations 4.12 and 4.13 as

|
|
.
|

\
|
+ >
|
|
.
|

\
|
+ <
=
z
i
f
z i
i
i
f
z i
o
v
R
R
v v
v
R
R
v v
v
1
1
Equation 4.13
An inverting voltage regulator is presented in figure 4.35.

Figure 4.26: Inverting voltage regulator


Page | 77
The output voltage of this regulator is

>
<
=
z
i
f
z i
i
i
f
z i
o
v
R
R
v v
v
R
R
v v
v Equation 4.14
4.5.5 Clipping or Limiting Circuits
Limiting circuits are used to confine signal levels to a specified range of operation. The output is allowed to
follow the input for some range of the input. Outside this range, a non-linear operation comes into effect.
Figure 4.27 shows a clipping circuit. The output voltage is clipped to ( ) 7 . 0 +
z
v . The gain of the circuit is
i f
R R . Between ( ) 7 . 0 +
z
v and ( ) 7 . 0 +
z
v , the response of the amplifier is linear.

Figure 4.27
4.5.6 Clamping Circuits
These are used to establish a fixed voltage level for the maximum value of a given signal. The shape of the
signal is not changed in the process but translated or shifted up or down. It can be seen as adding a dc
voltage to an existing voltage. Figure below shows a passive clamping circuit

Figure 4.28
The capacitor charges through the low resistance path during the negative cycle of the input signal to a
voltage V v v
peak c
7 . 0 = . Since this signal has a peak of 1 V, the capacitor charges to about 0.3 V. From
this point on, the output voltage obtained is
c
v plus the input voltage.
The active version of the clamping circuit is shown in figure below.


Page | 78

Figure 4.29
4.6 Logarithmic Amplifier

Figure 4.30: Logarithmic Amplifier
( ) 1 =
kT qv
sat c
be
e I i Equation 4.15
C q
19
10 6 . 1

= ,
K J K / 10 38 . 1
23
= [Boltzmanns Constant]
T = absolute temperature in Kelvin (25 C = 298 K)
If
be
v is more than a few tenths of a volt, the exponential term is much greater than unity.
( )
be
v
Eo c
e I i
8 . 39
=
But
i
i
c
R
v
i i = =
1
and
be o
v v =
Eo
i
o
I R
v
v
1
ln 0257 . 0 =
This helps to express the dynamic range of a wideband signal. Although the resulting output signal looks
distorted, the original signal may be restored by means of an antilogarithmic or exponential amplifier.

Figure 4.31: Exponential Amplifier
be
v
Eo c
e I i
8 . 39
=
10kHz
-1/1V
1uF
+
UA741
+
10V
+
10V
1N4005
10k
i
v
o
v
-
+
c
i
be
v
f
R
1
R
i
v
o
v
-
+
c
i
be
v


Page | 79
f
o
c
R
v
i =
But
be i
v v =
( )
i f Eo o
v R I v 8 . 39 exp =
It would be observed that the output is dependent on
Eo
I which also depends on temperature and hence, is
difficult to control.
4.7 Active Filters
2

A filter is any circuit that produces a prescribed frequency response characteristic which allows or passes
certain frequencies and rejects others. The band of frequencies over which signals are passed is called the
passband of the filter. The band of frequencies over which the filter rejects signals is called the stopband of
the filter. Ideally, in the stopband, a filter has a gain of zero.
Passive filters are filters which use only passive components. Passive components are components which do
not require a power supply to operate. In the passband of a filter, ideally, the gain of the system is unity. The
gain of an ideal active filter is often adjustable and so may be set to some other value other than unity.
Filter circuits can be classified into four broad divisions:
i. Low-pass filters (LPF)
ii. High-pass filters (HPF)
iii. Band-pass filters (BPF)
iv. Band-stop filters
Low-pass filters pass signals with low frequencies but stop signals with high frequencies. High-pass filters
pass signals with high frequencies but stop signals with low frequencies. Band-pass filters are filters which
pass signals with midband frequencies but stops signals with high frequencies and signals with low
frequencies. Band-stop filters pass signals with low frequencies and signals with high frequencies but stop
signals with midband frequencies. The four filter types are illustrated in figure 4.36.




2
Based largely on Bibliographies [2] and [3].


Page | 80

Figure 4.32: Ideal response of the four types of filters
The frequency at which a filter starts rejecting or passing signals is called the corner frequency,
c
e . There
are two corner frequencies in a BPF and in a band-stop filter: the lower corner frequency and the upper
corner frequency. There is only one corner frequency in an LPF and only one in an HPF.
Real filters do not possess the ideal block characteristics shown in figure 4.36. In real filters, the passband
and stop band are not as flat as depicted in figure 4.36. In addition, the transition between the passband and
the stopband is not as sharp as shown. Typically, the transition takes place over a band of frequencies, called
the transition band. Hence, real filters have three bands: stopband, passband and transition band. Since a
physical circuit cannot provide a constant transmission at all passband frequencies, the specification of filters
allows for a deviation in the passband, but places an upper bound on the deviation allowed,
max
A . Also,
since physical circuits cannot provide zero transmission at all stopband frequencies in the stop band, the
specification gives an allowable band
min
A . The ratio of the frequency at which the passband stops to the
frequency at which the stopband starts (or vice versa, depending on the type of filter) is called the selectivity
factor and is the measure of the sharpness of the response of the filter. In figure 4.37, the selectivity is
defined as
c
s
y selectivit
e
e
= Equation 4.16
LPF HPF
BPF
Passband Passband
Passband Upper
Passband
Lower
Passband
Stopband
Stopband Stopband
Upper
Stopband
Lower
Stopband
Band-stop filter
T T
T T
c
e
c
e
l c
e
u c
e
l c
e
u c
e


Page | 81

Figure 4.33: Sample frequency response of a real LPF (design with filterbuiler tool in MATLAB.
Finite Impulse Response (FIR) filter designed with dB A 5
max
= and dB A 60
min
= .)
Important specifications of a filter, for example, the one in figure 4.37 are:
i. The passband edge,
c
e
ii. The maximum allowed variation in the passsband transmission,
max
A
iii. The stopband edge,
s
e
iv. The minimum required stopband attenuation,
min
A
Typically, the corner frequency is taken at the -3 dB point which is the point where the response of the
amplifier has 3 dB attenuation from its maximum gain i.e. the point at which
dB
v
v
i
o
3 log 20 dB in Gain
max
10
= Equation 4.17
Note that gain voltage = =
v
i
o
A
v
v

Hence, for the case when the maximum gain is unity, we can find the gain at the -3dB point as follows:
dB dB
v
v
dB
i
o
3 3 1 log 20 log 20
10
point 3 - at
10
= =

Thus, the gain at the -3dB point is
2
1
10
20
3
~ =

i
o
v
v

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
-70
-60
-50
-40
-30
-20
-10
0
Normalized Frequency (t rad/sample)
M
a
g
n
i
t
u
d
e

(
d
B
)
Magnitude Response (dB)
A
min
w
c
w
s
max
A


Page | 82
Hence, the -3dB point is the point at which
2
i
o
v
v =
Filters can also be classified according to their differential composition:
1. Passive Filters: This consists of resistors, capacitors and/or inductors, which are all passive
components. The passive RLC structures are capable of achieving relatively good filter
characteristics in application varying from the audio frequency range to the upper limit of the
lumped parameter range. However, at the lower end of the audio range, the value of inductances
become very large and imperfections in circuit design result due to internal losses in the inductances
which degrade the Q-factor of the coil. Also, the physical sizes of large inductances limits their
usefulness. Furthermore, such cannot be fabricated in monolithic form and cost much more.
2. Active filters: Active filters consist of a combination of resistances, capacitances and one or more
active devices (such as op-amps or transistors) employing feedback. An active filter frequency
response can be made to approach the ideal form very closely and they can easily be fabricated using
discrete, hybrid thick-film and hybrid thin-film technology. While the active filters are capable of
circumventing most of the low frequency limitations of passive filters, they introduce a few
disadvantages and problems.
a. Since they are active, they need power to operate properly
b. Less reliable than passive circuit
c. Because it employs feedback, there is the possibility of instability.
d. Only good in the range of 0-100 kHz.
For emphasis, the main benefit of active filters over passive filters is that the frequency response of
an active filter can be made to resemble a desired frequency response characteristic.
3. Switched Capacitor Filters: These are, at present time, the most viable approach for realizing fully
integrated monolithic filters. Its technique is based on the realization that a capacitor switched
between two circuit nodes at a sufficiently high rate is equivalent to a resistor connecting the two
nodes.
Another method of classifying filters is according to the type of approximation to the ideal characteristic
which is employed.
The magnitude response of filters as a function of frequency has been known to produce shapes that can
best be approximated by some well-known analytic functions. Therefore filter design methods consist of
finding suitable approximating functions for some desired magnitude response. Already, some established
design procedures for approximating magnitude responses exist:
1. Butterworth response: maximally flat in the passband
2. Chebyshev response: equiripple in the passband
3. Elliptic response: equiripple in both passband and stopband
4. Bessel response: maximally flat delay in magnitude response, also known to give a linear phase
response.
4.7.1 Filter Transfer Function
The transfer function of a filter can be written as the ratio of two polynomials as
( )
o
n
n
n
o
m
m
m
m
b s b s b s
a s a s a s a
s T
+ + + +
+ + + +
=

1
1
1
1
1
1

Equation 4.18
The degree of the denominator, n, is called the order of the filter. A system is said to be proper if the degree
of the numerator is not greater than the degree of the denominator, n ms . A system is said to be strictly
proper if n m< .


Page | 83
Factorizing equation 4.18,
( )
( )( ) ( )( )
( )( ) ( )( )
n n
m m m
p s p s p s p s
z s z s z s z s a
s T


=

1 2 1
1 2 1

Equation 4.19
The roots of the numerator,
i
z are the zeros of the system or the transmission zeros while the roots of the
denominator
i
p are the transmission poles. For filter circuits to be stable are the poles of the system must
be on the left-half plane of the s-plane. The s-plane is a complex plane.
In specification of filtering requirements, the concept of attenuation is often used. This is the inverse
function of the transmission function. Assume that the max amplitude of transmission function (is the
passband) is
o
T and its response at any other frequency e is ( ) e T , then the relative attenuation ( ) e o
dB
is
( )
( )
( )
|
|
.
|

\
|
=
|
|
.
|

\
|
=
o
o
dB
T
T
T
T e
e
e o
10 10
log 20 log 20 Equation 4.20
4.7.2 Butterworth Filter Responses
4.7.2.1 Low-Pass Filter
This filter exhibits a monotonically decreasing transmission with frequency. It has all its transmission zeros at
infinity, making it an all pole filter. Hence, its transfer function is of the form
( )
( )( ) ( )
n
m
p s p s p s
a
s T

=

2 1
Equation 4.21
It has been observed that the degree of passband flatness increases as the order n is increased and making it
to approach the ideal response.

Figure 4.34: Magnitude response of a low-pass Butterworth filter
4.7.2.2 High-Pass Filter
This filter exhibits a monotonically increasing transmission with frequency. It has all its transmission poles at
infinity, making it an all zeros filter. Hence, its transfer function is of the form
( ) ( )( ) ( )
m m
z s z s z s a s T =
2 1
Equation 4.22


Page | 84

Figure 4.35: Magnitude response of a high-pass Butterworth filter
4.7.3 Passive Filters
4.7.3.1 Passive LPF
The circuit of a simple RC low-pass filter is shown in figure 4.38. this is essentially a potential divider
comprising a resistance in series with a capacitor. The output voltage,
o
v , is taken from across the capacitor
and is related to the input voltage,
i
v by the equation
i
c
c
o
v
jX R
jX
v

= Equation 4.23
From this, we get that the magnitude response of the system is
2 2
c
c
i
o
X R
X
v
v
+
= Equation 4.24

Figure 4.36: A passive LPF
From equation 4.19, we see that the gain of the system reduces with increase in frequency. This is because
the reactance of the capacitor,
c
X is inversely proportional with frequency. fC j X
c
t 2 1 = . At an infinitely
high frequency, the gain of the system is zero. Hence, the system is a low-pass filter.
When
RC
f
t 2
1
= ,
jR R
R
v
v
i
o

=
Hence,
2
1
=
i
o
v
v

i
v
i
i

C
R
o
v
( ) s T
e
c
e


Page | 85
Which is the -3dB point. Hence, the corner frequency for the passive LPF shown in figure 4.38 is
RC
f
c
t 2
1
= Equation 4.25
For frequencies below
c
f the gain is taken as being reasonably constant, while for frequencies higher than
c
f the gain is regarded as being so low that the passage of these signals is effectively blocked. The circuit is
known as a low-pass filter having a bandwidth extending from DC to
c
f .
We can obtain the transfer function of the circuit from equation 4.23 in terms of the angular frequency, e
( )
RC
j
RC
RC j
C j
R
C j
v
v
T
i
o
1
1
1
1
1
1
+
=
+
=
+
= =
e
e
e
e
e
Expressing this transfer function in terms of the complex Laplace variable s, we have
( )
RC s
RC
s T
1
1
+
= Equation 4.26
Hence, the circuit has one pole at
RC
s
1
= and no zero (or we can say one zero at infinity). Hence, the
filter is a first order filter.
The ideal low-pass passive filter frequency response curve or transfer function would show no loss of gain for
frequencies below fc and zero output above fc (see Figure 4.41). Clearly, the first order low-pass filter
achieves neither of these ideals (see figure 4.42). With a first order LPF, beyond the corner frequency,
magnitude response rolls off at 20 dB per decade (or 6 dB per octave). A decade is ten times a frequency
while an octave is two times a frequency. If two RC sections are cascaded to form a second order filter
having two frequency dependent capacitors, a steeper roll-off can be obtained, but only at the expense of
decreased output. If these two similar sections are used, the roll-off tends to 40 dB per decade but the output
is so attenuated as to be of little use.
Note that the magnitude and phase plots are made against the log of the frequency. The phase response of
the first order RC filter rolls off at 45 per decade from 0 at a tenth of
c
f to -90 at ten times
c
f . In figure
4.42, the dotted lines are the real plots of the frequency response of the system. The thick lines are the
approximations which are often used since they are close enough to the actual plots.

Figure 4.37: Ideal response of simple RC LPF


Page | 86

(a) (b)
Figure 4.38: Real (a) magnitude and (b) phase response of a simple RC LPF
4.7.3.2 Passive HPF
To form a high-pass filter, the RC components of the low-pass filter are simply interchanged. Figure 4.43
shows the first order high-pass circuit and Figure 4.44 its frequency response curve. The gain roll-off is once
again 20 dB per decade and the cut-off frequency is still given by the equation
Hz
RC
f
c
t 2
1
=
The transfer function of the RC HPF is
c i
o
jX R
R
v
v

=
( )
RC
j
j
C j
R
R
T
1 1
+
=
+
=
e
e
e
e
( )
RC s
s
s T
1 +
= Equation 4.27
Thus, the HPF has one zero at zero and a pole at
RC
s
1
= . When the input voltage is a dc i.e. 0 = e , the
gain of the system is zero, 0 = T . At high frequencies, the gain of the system is unity i.e. 0 dB.

Figure 4.39: Passive RC HPF
i
v
i
i

R

C

o
v


Page | 87

Figure 4.40
4.7.3.3 Passive BPF
A second order band-pass filter can be obtained by using the series RLC circuit arrangement shown in Figure
4.45. At low input frequencies the capacitive reactance predominates and the circuit behaves as the simple
RC HPF 20 dB per decade increasing response from DC. As the frequency of the input signal approaches
circuit resonance, there is a marked up-turn in the response curve to climax in a peak at
Hz
LC
f
o
2
1
= Equation 4.28
Once the resonant frequency has been exceeded, the inductive reactance becomes increasingly dominant and
the response falls away but not as sharply as was the build up from the low frequencies. Thus, there are two
frequencies where the response is 3 dB less than the peak and they are called the upper and lower cut-off
frequencies,
u c
f and
l c
f . They are equally disposed about the resonant or centre frequency; the centre
frequency is always taken as the geometric mean of the two.
l c u c o
f f f = Equation 4.29

Figure 4.41: Passive RLC BPF
The difference between
u c
f and
l c
f is taken as the bandwidth or pass-band, B, of the filter and together
with the goodness or Q of the circuit is related to the centre frequency,
o
f , by the following equation:
Hz
Q
f
B
o
= Equation 4.30
The higher the Q of the circuit the smaller is its pass-band and the filter is said to be more selective.


Page | 88

Figure 4.42: Magnitude response of RLC BPF
4.7.3.4 Passive Band-Stop Filter
A second order band-stop filter can be obtained by using the parallel LC circuit arrangement shown in
Figure 4.47. At low input frequencies the circuit is effectively a low-pass arrangement comprising only the L
and the R. At the circuit resonant frequency, determined by LC f
o
2 1 = , the parallel L and C presents an
infinitely high impedance and the circuit output is zero. Once the resonant frequency has been exceeded, the
inductive reactance continues to increase while that of the capacitor decreases, making the circuit perform
more as if comprising only the C and the R in a simple high-pass filter arrangement.

Figure 4.43: Passive RLC band-stop filter

Figure 4.44: Magnitude response of passive RLC band-stop filter


Page | 89
4.7.3.5 Summary of Passive Filters
The four basic frequency sensitive filter circuits described above can be cascaded using any mix of first and
second order variants that is necessary to produce a desired response. The shape of filter response curves has
been studied by many eminent people, some of whom have had their names credited to particular circuits
which satisfy particular requirements. These names include Butterworth, Bessel, Chebyshev and Cauer.
Passive filter circuits contain various combinations of resistors, capacitors and inductors and in most cases
suffer from several shortcomings. Mathematically, they are difficult to design; they are often pulled off
frequency by the load current drawn from them; even in their pass-band they usually attenuate signals and
are not easily tuned over a wide frequency range without changing their response characteristics. Further
problems can be associated with the use of inductors. Not only are they expensive, bulky and heavy; they are
prone to magnetic field radiation unless expensive shielding is used to prevent unwanted coupling.
4.7.4 Active Filters
Op-amps overcome most of the problems associated with the passive filter circuit. Not only will the high
input impedance and low output impedance of the op-amp effectively isolate the frequency sensitive filter
network from the following load, it can also provide useful current or voltage gain. More significantly, the
op-amp can be designed into a RC only circuit in such a way as to provide a filter response virtually identical
with that of a passive inductive filter network. This means that the use of inductors in filters is now
unnecessary. Unlike the inductor, the op-amp does not possess a magnetic field which stores energy; rather it
is designed to behave mathematically in the same way as the whole passive circuit it replaces. Any additional
circuit energy is obtained from the separate power source used by the op-amp.
4.7.4.1 Negative Impedance Conversion
The circuit shown in Figure 4.49 is designed to have an input impedance,
i
Z , which appears to be the
negative of the impedance Z.

Figure 4.45: Negative impedance converter
The input current, which is the current through the positive feedback resistor is
R
v v
R
v v
i
o i o
i

=

=
+
Equation 4.31
Now,
+
= = v v v
i

i o
v v
Z R
Z
v =
+
=

Thus, we have that


Page | 90
i o
v
Z
Z R
v
+
= Equation 4.32
Thus, from equations 4.31 and 4.32, we have
Z
v
v
RZ
R
v
RZ
Z R Z
R
v
Z
Z R
v
i
i
i i
i i
i
=

=
+
=
+

=
Therefore, the input impedance of the circuit is
Z
i
v
Z
i
i
i
= =
Thus, if Z is a capacitor with a reactance of
c
jX , then the input impedance of the circuit is
c i
jX Z + = .
The positive reactance means that the current lags the voltage as is the case in an inductor. Hence, the input
impedance resembles an inductive reactance,
L
jX , but where C X
L
e / 1 = . However, while the result is
that this circuit produces an inductive effect, the inductive reactance decreases with increasing frequency
rather than increasing as would the reactance of a true inductance. Hence, this circuit does not mimic an
inductor perfectly.
4.7.4.2 Impedance Gyrator
An impedance gyrator, or gyrator for short, is shown in figure 4.50. The input impedance of this circuit is
Z R Z
i
/
2
= . Hence, if
c
jX Z = , then the input impedance is C R j jX R Z
c i
2 2
/ e + = = . Hence, now,
the capacitor is made to act as if it were a true inductor of value C R L
2
= . Similarly, if Z were an inductive
reactance, the circuit would mimic a true capacitor of capacitance
2
/ R L C = .


Page | 91

Figure 4.46: (a) Impedance gyrator circuit. (b), (c) and (d) Analysis of gyrator to obtain input
impedance.
4.7.4.3 Active LPF
Note that the simplest active LPF is the simplest active integrator, a true integrator. A single-pole active filter
presented in figure 4.51 and this is the integrator shown in Figure 4.2.

Figure 4.47: Inverting active LPF
-
+
i
R
f
R

i
v
i
i
o
v
C



Page | 92
The transfer function of the active LPF is
( )
C R j
R R
T
f
i f
e
e
+

=
1

( )
C R s
C R
s T
f
i
1
1
+

= Equation 4.33

Figure 4.48: Frequency response of system of figure 4.51
3

At low frequencies, the gain of the system is
( )
i
f
R
R
T
10
log 20 = e Equation 4.34
Figure 4.53 presents a non-inverting active LPF.

Figure 4.49: Non-inverting active LPF




3
Plotted with MATLAB with 1 , 2 , 1 = = = C k R k R
f i

-20
-15
-10
-5
0
5
10
M
a
g
n
i
t
u
d
e

(
d
B
)
10
1
10
2
10
3
10
4
90
135
180
P
h
a
s
e

(
d
e
g
)
Bode Diagram
Frequency (rad/sec)


Page | 93
4.7.4.4 Active HPF
An inverting active HPF is presented in figure 4.54.

Figure 4.50: An inverting active HPF
C R j
R
C j
R Z
i
i
i i
e e +
= =
1
1
//
( )
( )
i
i f
i
f
R
CR j R
Z
Z
T
e
e
+
= =
1

The magnitude response of this circuit is as shown in figure 4.54

Figure 4.51: Magnitude response of system of figure 4.53
4

A non-inverting active HPF is presented in figure 4.56




4
Plotted with MATLAB with 1 , 1 , 2 = = = C k R k R
f i

-10
-5
0
5
10
15
20
M
a
g
n
i
t
u
d
e

(
d
B
)
10
1
10
2
10
3
10
4
180
225
270
P
h
a
s
e

(
d
e
g
)
Bode Diagram
Frequency (rad/sec)
-
+
f
R
i
v
f
i
o
v
C

i
R


Page | 94

Figure 4.52: Non-inverting active HPF
4.7.4.5 Second-order Filters
Figure 4.57 and 4.58 present a second-order LPF and a second-order HPF.

Figure 4.53: Second-order LPF

Figure 4.54: Second-order HPF
Second-order and higher-order filters can alternatively be created by cascading stages of first order filters.
This is illustrated in figure 4.59.


Page | 95

Figure 4.55: nth-order low pass filter
4.8 Holding Circuits
These are circuits which store or remember a particular level of a signal for some interval of time.
4.8.1 Peak Detector

Figure 4.56
The output voltage measured across the 10 k diode is simply the value of the peak of the input signal. Note
that the RC product at the output determines the accuracy of your output. If the frequency of the input
signal is low, then the RC product would have to be much larger to ensure that the capacitor does not
discharge before the next peak of the input signal comes. Note also that the capacitor charges through the
diode and discharges through the resistor. Hence, the capacitor charges much faster than it discharges.
The op-amp in the figure ensures that the output of the circuit is equal to the peak of the input signal. If the
op-amp had been left out and only a diode and a capacitor had been used (in addition to the load), the
output of the circuit will be less than the peak of the input by about 0.7 V (i.e. the value of the forward
junction potential of the diode used.

Figure 4.57
4.8.2 Envelope Detector
This circuit is quite similar to the peak detector circuit. Since it is majorly used in extracting the envelope of a
modulated waveform, its time constant should be small enough so that the capacitor voltage can follow the
envelope, but should be large enough so that it cannot follow the high frequency carrier signal.
+
10V
+
10V
1N4005
10uF
+
UA741
1kHz
-1/1V
10k
1N4005
10uF
1kHz
-1/1V
10k
i
v
1
C
f
R
o
v
-
+
2
C

n
C

n
R

1 n
R
1
R


Page | 96

Figure 4.58: Envelope detector
The response of the envelope detector shown in figure above is shown in figure below. Note that the value
of the capacitor is what determines whether it will follow the low frequency signal or not.

Figure 4.59: Response of the envelope detector circuit
4.8.3 Sample and Hold Circuit
A sample and hold circuit selects the level of a given analogue signal at a certain sampling point and holds
that particular value until the next sampling point. Figure 4.31 shows a sample and hold circuit. The switch is
turned on for a short interval of time and the capacitor quickly charges (or discharges) to the value of the
analogue signal at that time. When the switch is opened, the capacitor holds the voltage level until the next
charge interval. Note that the charging of the circuit is done through one of the two feedback diodes (the
polarity of the signal determines the diode through which the capacitor is charged) during the sampling
phase. Hence, the capacitor rapidly charges (or discharges) during the sampling phase. During the holding
phase, with the switch open, the capacitor discharges through the input resistance of the op-amp. Now,
since the input resistance of the op-amp is very large, the discharging process is very slow and hence, the
sample and hold circuit can hold the sampled value for a long period.

Figure 4.60
SUM
1 Hz
-1/1V
+
UA741
+
10V
+
10V
1N4005
+
10V
+
10V
1N4005
0.01uF
+
UA741
100 Hz
-5/5V
1k
10k
vi
1N4005
+
UA741
+
10V
+
10V
1N4005
+
10V
+
10V
1uF
+
UA741
10k
1k


Page | 97
4.9 Data Conversion
When digital components or circuits are used in / with analogue systems, it is usually necessary to convert
data from one form to another. An analogue signal is a signal that is defined over a continuous range of time
and in which the amplitude may assume a continuous range of values. A digital signal is a function in which
both time and amplitude are quantized. It is usually represented by a sequence of words (a word is an
arrangement of bits) which has a finite number of bits.
4.9.1 Analogue-to-Digital Conversion
In converting an analogue signal to a digital signal, the signal is first sampled. Sampling is done at regular
intervals to give the value of the analogue signal at those regular discrete points in time. The rate at which the
signal is sampled is called the sampling rate or sampling frequency. The minimum rate at which a signal
can be sampled i.e. the minimum sampling frequency is determined by the Nyquist criterion. Nyquist
criterion states that a signal must be sampled at at least twice its highest frequency component for the signal
to be re-constructible from its samples. Hence, a sine wave whose frequency is 50 Hz must be sampled at a
minimum of 100 samples per second. When one samples at a frequency less than the Nyquist frequency, if
we attempt to reconstruct the original signal from its samples, an error will occur called aliasing error.
Often, before a signal is sampled, it is pre-processed by a low-pass filter. The pre-processing by a LPF is
done to remove or strongly attenuate high frequency components in the signal, which may be noise or
unwanted signals. This pre-processing succeeds in attenuating all components of the signal at frequencies
greater than half the sampling frequency. Hence, the LPF which is used to pre-process the signal for
sampling is called an anti-aliasing filter. The pre-processing helps eliminate aliasing error.
The signal is sampled using a sample-and-hold circuit controlled by a sampling clock. Hence, the switch in
figure 4.31 is replaced by a switch (e.g. a transistor) controlled by clock pulses. During the holding phase of
the operation of the sample-and-hold circuit, the data (voltage) being held by the sample-and-hold circuit is
transferred to the next stage, where the sampled data is compared with a finite set of distinct values and
made to be equal to one of these distinct values. This is called quantization. Quantization is done by a
device or circuit called an analogue-to-digital converter. Quantization is a process by which a variable is
represented by one of a set of distinct values. Each of these distinct values is called a digital word. Each
digital word has a finite number of bits. The number of bits determines how many digital words exist in the
set. For example, if each word has n bits, then there are
n
2 possible words in that set of digital values.
The difference between the sampled value and the digital value which it is converted to at the output of the
quantization process is called quantization error or quantization noise. The quantization error can be
reduced by increasing the number of bits used for each digital word.

Figure 4.61: Analogue-to-digital conversion
4.9.1.1 Successive Approximation ADC
Several ADCs exist. Here, well consider the operation of just one of them, the successive approximation
ADC. This ADC makes use of a successive approximation register (SAR).
LPF
Sample-and-
hold circuit
ADC


Page | 98

Figure 4.62: Successive Approximation ADC
Successive approximation ADCs are popular because they are moderately fast without being too complex.
The basic principle is a divide and search approach in converting analogue voltage to digital form. A binary
search approach is used, in which the search space is reduced by half in each clock cycle. Therefore, the
successive approximation ADC will require 16 clock cycles to convert an analogue signal into a 16-bit digital
equivalent.
A sample-and-hold circuit is used to sample the analogue input signal and hold its value during the data
conversion process. In the first clock cycle, the most significant bit (MSB) of the successive approximation
register (SAR) is set to 1. The SAR is connected to the input of a digital-to-analogue converter (DAC),
which converts the binary value of the SAR into an analogue signal. The analogue signal from the DAC is
then applied to the comparator. The comparator compares the output of the DAC with the stored input
voltage. If the output from the DAC is smaller than the stored input voltage, the most significant bit of the
register remains at logic 1; otherwise it is reset to 0. This bit remains unchanged for the remainder of the data
conversion process.
The same process is repeated in the second clock cycle with the next most significant bit (MSB 1). This bit
is set to logic 1, and the output of the SAR is converted to analogue, using the DAC, and then compared
with the stored input voltage. If the output from the DAC is smaller than the stored input voltage, the (MSB
1) bit of the register remains at logic 1; otherwise it is reset to 0. This bit now remains unchanged for the
remainder of the data conversion process.
Repeating this process for N clock cycles results in converting the analogue signal to its equivalent N-bit
digital value. At the end of N clock cycles, the SAR contains the converted value of the analogue input
signal.
Example 4.1
Let us consider as SAR which is to convert a certain decimal value of x to its binary equivalent. For example,
let x = 11. Lets say the SAR has 4-bits (note that with 4-bits, the SAR can convert decimal signals with a
magnitude of 15 or less). The SAR will set its MSB to 1 and all other bits to zero. Hence, the SAR will set its
output to 10002. It then compares this value with the input signal x. x is greater than 10002, so it leaves the
MSB as 1 and sets the next most significant bit to 1 while leaving the rest as zeros. Hence, it sets its output to
11002. This time, when it compares its output with x, it finds that x is less than its output so, it changes this
value to 0 and sets the next most significant bit to 1. Hence, it sets its output to 10102. This makes its output
less than x, so it makes the LSB 1 also. Hence, its output now becomes 10112. This is equal to x.
4.9.1.2 Counter ADC
A counter is quite similar to a successive approximation ADC except that instead of using an SAR, it makes
use of a counter.
When an analogue signal has been sampled and is being held by the sample-and-hold circuit, a digital counter
is started. The counter begins counting up from zero. On the output of the counter is a DAC. With each
increment in the counter, the digital count of the counter is converted to an analogue value and compared
with the value being held by the sample-and-hold circuit. If the counters value is less than it, the counter is


Page | 99
incremented and the output is converted to analogue form and compared once again. The counter keeps
counting until the output of the counter, when converted to its analogue value, equals the sampled data
being held. When this happens, this value is output as the digital representation of the analogue value.

Figure 4.63: Counter ADC
4.9.2 Digital-to-Analogue Conversion
This is the process of converting a digital word to an analogue voltage or current level, with the magnitude
and sign of the analogue level representing the binary value of the digital word. the device or circuit which
converts a digital signal to an analogue one is called a digital-to-analogue converter (DAC).
The analogue output, X, at the output of the DAC can be written in the terms of the digital binary inputs as
follows
1 2
2
1
1
0
0
2 2 2 2

+ + + + =
n
n
b b b b X Equation 4.35
where
0
b is the least significant bit (LSB)
and
n
b is the most significant bit (MSB)
Looking at equation 4.35 suggests that we can use a weighted summer to convert a digital signal to an
analogue signal. This is the simplest circuit for implementation of a DAC.

Figure 4.64: DAC Circuit
The resolution of a DAC is defined as the smallest change that can occur in the analogue output as a result
of a change in the digital input. This is equal to the weight of the LSB and is also referred to as the step size.
ref
f
v
R
R
= Resolution Equation 4.36
% 100
1 2
1
% 100
scale Full
Resolution
n %Resolutio

= =
n
Equation 4.37
R 2
f
R
ref
v b
1

o
v
+
-
R
ref
v b
0

R
n 1
2


ref n
v b
P
Output
Clock
Comparator
Counter
DAC
Analogue
signal


Page | 100
Another weighted sum amplifier used as a DAC is called the R-2R ladder DAC.

Figure 4.65: R-2R Ladder DAC



Page | 101
BIBLIOGRAPHY
[1] Carter B. (2008). Chapter 10: Op-amp noise theory and applications. Literature Number SLOA082.
Texas Instruments Inc.. Available at http://focus.ti.com/lit/ml/sloa082/sloa082.pdf. Accessed on
23
rd
Sept. 2009.
[2] Clayton, G. and Winder, S. (2003). Operational Amplifiers. 5
th
Edition. Newnes Publications, Oxford,
UK. ISBN 07506 5914 9
[3] Jubril, A.M. (2008). Operational Amplifiers and Active Networks. Lecture Notes. Obafemi Awolowo
University, Ile-Ife.
[4] Jung, W. (2005). Op Amp Applications Handbook. Analogue Devices Inc. Newnes Publications,
Oxford, UK. ISBN 0-7506-7844-5
[5] Ramaswamy, V. (2001). Notes on OPAMP Circuits. Technical University of Sydney.
[6] Sedra, A.S. and Smith K.C. (2004). Microelectronic Circuits. 5
th
Edition. Oxford University Press Inc.,
New York. ISBN 0-19-514252-7.