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2009-10 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA KAKINADA 533 003 DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING M. Tech- II Semester Specialization: ES COURSE STRUCTURE Code Core Name of the Subject 1. Algorithms for VLSI Design Automation 2.Real Time Operating Systems for Embedded Systems 3. DSP Processors & Architecture 4. Advanced Microcontrollers and Processors Elective III 1. System Modeling & Simulation 2. Design of Fault Tolerant Systems Elective IV 1. Low Power VLSI Design 2. CPLD and FPGA Architecture and Applications Laboratory Embedded Systems Laboratory 4 4 40 60 100 4 8 40 60 100 4 8 40 60 100 L 4 4 4 4 P C 8 8 8 8 INT 40 40 40 40 EXT TOTAL 60 60 60 60 100 100 100 100

ALGORITHMS FOR VLSI DESIGN AUTOMATION UNIT I PRELIMINARIES: Introduction to Design Methodologies, Design Automation tools, Algorithmic Graph Theory, Computational Complexity, Tractable and Intractable Problems

UNIT II GENERAL PURPOSE MTHODS FOR COMBINATIONAL OPTIMIZATION: Backtracking, Branch and Bound, Dynamic Programming, Integer Linear Programming, Local Search, Simulated Annealing, Tabu search, Genetic Algorithms.

UNIT III Layout Compaction, Placement, Floorplanning and Routing Problems, Concepts and Algorithms

UNIT IV MODELLING AND SIMULATION: Gate Level Modelling and Simulation, Switch level modeling and simulation UNIT V LOGIC SYNTHESIS AND VERIFICATION: Basic issues and Terminology, Binary Decision diagram, Two Level Logic Sysnthesis.

UNIT VI HIGH LEVEL SYNTHESIS: Hardware Models, Internal representation of the input algorithm, Allocation, Assignment and Scheduling, Some Scheduling Algorithms, Some aqspects of Assignment problem, High level Transformations. UNIT VII PHYSICAL DESIGN AUTOMATION OF FPGAS: FPGA technologies,Physical Design cycle for FPGAs partitioning and Routing for segmented and staggered models.

UNIT VIII PHYSICAL DESIGN AUTOMATION OF MCMS: MCM technologies, MCM physical design cycle, Partitioning, Placement Chip array based and full custom approaches, Routing Maze routing, Multiple stage routing, Topologic routing, Integrated Pin Distribution and routing, routing and programmable MCMs.

TEXT BOOKS: 1. Algorithms for VLSI Design Automation, S.H.Gerez, WILEY student edition, John wiley & Sons (Asia) Pvt.Ltd. 1999. 2. Algorithms for VLSI Physical Design Automation, 3rd edition, Naveed Sherwani, Springer International Edition, 2005

REFERENCES: 1. Computer Aided Logical Design with Emphasis on VLSI Hill & Peterson, Wiley, 1993 2. Modern VLSI Design: Systems on silicon Wavne Wolf, Pearson Education Asia, 2nd Edition, 1998

REAL TIME OPERATING SYSTEMS FOR EMBEDDED SYSTEMS UNIT 1: Introduction to Unix, Overview of commands, File I/O. (open, create, close, lseek, read, write), Process Control (fork, vfork, exit, wait, waitpid, exec), Signals, Interprocess Communication (pipes, fifos, message queues, semaphores, shared memory). UNIT 2: Real Time Systems: Typical real time application, Hard Vs soft real time systems, A reference model of Real Time Systems: Processors and resources, temporal parameters of Real time workload, periodic task model, precedence constraints and data dependency functional parameters, Resource parameters of jobs and parameters of resources. Commonly used approaches to Real Time Scheduling: Clock driven, Weighted Round Robin, priority driven, Dynamic Vs State Systems, Effective release times and Deadlines, offline Vs online scheduling. UNIT 3: Operating Systems: Overview, Time Services and Scheduling mechanisms, other basic operating system function, processor reserves and resource kernel. Capabilities of commercial Real time Operating Systems. UNIT 4: Fault Tolerance Techniques: Introduction, Fault causes, Types, Detection, Fault and error containment, Redundancy: Hardware, Software, Time. Integrated Failure handling. UNIT 5: Case Studies: VX works: Memory Managements task state transition diagram, pre-emptive priority, Scheduling, context switches semaphore Binary mutex, Counting: watch dugs, I/O System RT Linux: Process Management, scheduling, Interrupt management, and synchronization.

TEXT BOOKS: 1. Embedded systems: Architecture, programming and design-By Rajkamal-TMH Publications. 2. RTOS concepts for embedded systems by Qing Li & Caroline yao-Elsevier Publications.

REFERENCE BOOKS: 1. Real time systems development-By Rob Williams(Butterworth Heinmann)

2. Simple Real-time Operating System: A Kernel Inside View for a Beginner-By Chowdary Venkateswara Penumuchu(Trafford) 3. Linux for Embedded RT Applications- By Doug Abbott(Newnes)-Embedded Technology Series

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DSP PROCESSORS AND ARCHITECTURES UNIT I INTRODUCTION TO DIGITAL SIGNAL PROCESING Introduction, A Digital signal-processing system, The sampling process, Discrete time sequences. Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT), Linear timeinvariant systems, Digital filters, Decimation and interpolation, Analysis and Design tool for DSP Systems MATLAB, DSP using MATLAB. UNIT II COMPUTATIONAL ACCURACY IN DSP IMPLEMENTATIONS Number formats for signals and coefficients in DSP systems, Dynamic Range and Precision, Sources of error in DSP implementations, A/D Conversion errors, DSP Computational errors, D/A Conversion Errors, Compensating filter. UNIT III ARCHITECTURES FOR PROGRAMMABLE DSP DEVICES Basic Architectural features, DSP Computational Building Blocks, Bus Architecture and Memory, Data Addressing Capabilities, Address Generation Unit, Programmability and Program Execution, Speed Issues, Features for External interfacing. UNIT IV EXECUTION CONTROL AND PIPELINING Hardware looping, Interrupts, Stacks, Relative Branch support, Pipelining and Performance, Pipeline Depth, Interlocking, Branching effects, Interrupt effects, Pipeline Programming models. UNIT V PROGRAMMABLE DIGITAL SIGNAL PROCESSORS Commercial Digital signal-processing Devices, Data Addressing modes of TMS320C54XX DSPs, Data Addressing modes of TMS320C54XX Processors, Memory space of TMS320C54XX Processors, Program Control, TMS320C54XX instructions and Programming, On-Chip Peripherals, Interrupts of TMS320C54XX processors, Pipeline Operation of TMS320C54XX Processors. UNIT VI IMPLEMENTATIONS OF BASIC DSP ALGORITHMS

The Q-notation, FIR Filters, IIR Filters, Interpolation Filters, Decimation Filters, PID Controller, Adaptive Filters, 2-D Signal Processing. UNIT VII IMPLEMENTATION OF FFT ALGORITHMS An FFT Algorithm for DFT Computation, A Butterfly Computation, Overflow and scaling, BitReversed index generation, An 8-Point FFT implementation on the TMS320C54XX, Computation of the signal spectrum.

UNIT VIII INTERFACING MEMORY AND I/O PERIPHERALS TO PROGRAMMABLE DSP DEVICES Memory space organization, External bus interfacing signals, Memory interface, Parallel I/O interface, Programmed I/O, Interrupts and I/O, Direct memory access (DMA). A Multichannel buffered serial port (McBSP), McBSP Programming, a CODEC interface circuit, CODEC programming, A CODEC-DSP interface example.

TEXT BOOKS 1. Digital Signal Processing Avtar Singh and S. Srinivasan, Thomson Publications, 2004. 2. DSP Processor Fundamentals, Architectures & Features Lapsley et al. S. Chand & Co, 2000.

REFERENCES 1. Digital Signal Processors, Architecture, Programming and Applications B. Venkata Ramani and M. Bhaskar, TMH, 2004. 2. Digital Signal Processing Jonatham Stein, John Wiley, 2005.

ADVANCED MICROCONTROLLERS AND PROCESSORS

UNIT-1: General Microcontrollers Introduction to the 8051& 8052 microcontrollers, features, architecture, memory organization, addressing modes, instruction set, assembly programming, software development tools, parallel I/O ports, interrupts, timers/counters, serial communication, data and control transfer operations, serial data transmissions, programming and interfacing using 8051. UNIT-II: Atmel Microcontrollers Introduction to Atmel microcontrollers (89CXX and 89C20XX), Architectural overview of Atmel 89C51 and Atmel 89C2051,pin descriptions of Atmel microcontrollers, using flash memory devices Atmel 89XX and Atmel 89C20XX, Applications of MCS-51 and Atmel 89C51 AND 89C2051 microcontrollers. UNIT-III: PIC Microcontrollers An introduction to PIC microcontrollers, PIC 8 Series and PIC 16 series microcontrollers and PIC family of microcontrollers (16C6X/7X,16F84A, 12F50X and 16F8XX), architecture, instruction set , programming using assembly and c languages of the PIC microcontrollers, interfacing PIC Microcontroller to other devices, applications of PIC microcontrollers. UNIT-IV: AVR Microcontrollers Introduction to AVR microcontroller, AVR RISC microcontroller architecture, AVR instructions set, AVR hardware design issues, hardware and software interfacing with AVR, communications links for the AVR, AVR system development tools. UNIT-V: AVR Microcontrollers Family Introduction to AVR family of microcontrollers, Introduction to ATMEGA 8 and AT90S1200 microcontrollers, architecture and pin diagram of the ATMEGA 8 and AT90S1200 microcontrollers, programming of ATMEGA 8 using c and assembly languages, interfacing of ATMEGA8 to other modules.

UNIT-VI: ARM Processors An introduction to ARM processors, ARM architecture, ARM Instructions set, thumb instructions set, design issues, c and assembly programming in ARM, architectural support for system development, optimized primitives, exception and interrupt handling, caches memory protecting units, memory management units, embedded operating system using in the ARM.

UNIT-VII: ARM Processor Cores Introduction to ARM processors cores, embedded ARM applications, architecture, instruction set, programming using assembly and c languages of ARM 7TDMI and ARM9TDMI processors, interfacing ARM 7TDMI and ARM9TDMI processors to other devices, applications of ARM 7TDMI and ARM9TDMI processors. UNIT-VIII: Embedded processors Introduction to embedded processors, ISA architecture models, internal processor design, processor performance, configurability features, processor architecture, instruction set, programming of embedded processors (power PC processor, Micro blaze processor and Nios processor) and interfacing to other modules.

Text Books:
1. Microcontrollers-Theory and Applications-By Ajay V Deshmukh-TMH Publications. 2. Programming and customising the AVR microcontroller-By Dhananjay V Gadre-TMH Publications. 3. ARM system on chip Architecture-By Stephen B Furber-Pearson Publishers.

4. Embedded systems architecture-By Tammy Noergaard-Elsevier Publications. Reference Books:

1. 8051 Microcontroller-Hardware, Software and applications-By V.Udayashankara, M.S.Mallikarjunaswamy-TMH Publications. 2. PIC microcontrollers-By lucio Bi Jasio-Newnes Publishers. 3. ARM system on chip Architecture -By Stephen B Furber-Pearson Publishers.

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SYSTEM MODELLING & SIMULATION (ELECTIVE III) UNIT I Basic Simulation Modeling, Systems, Models and Simulation, Discrete Event Simulation, Simulation of Single server queing system, Simulation of Inventory System, Alternative approach to modeling and simulation. UNIT II SIMULATION SOFTWARE: Comparison of simulation packages with Programming Languages, Classification of Software, Desirable Software features, General purpose simulation packages Arena, Extend and others, Object Oriented Simulation, Examples of application oriented simulation packages. UNIT III BUILDING SIMULATION MODELS: Guidelines for determining levels of model detail, Techniques for increasing model validity and credibility. UNIT IV MODELING TIME DRIVEN SYSTEMS: Modeling input signals, delays, System Integration, Linear Systems, Motion Control models, numerical experimentation. UNIT V EXOGENOUS SIGNALS AND EVENTS: Disturbance signals, state machines, petri nets & analysis, System encapsulation. UNIT VI MARKOV PROCESS Probabilistic systems, Discrete Time Markov processes, Random walks, Poisson processes, the exponential distribution, simulating a poison process, Continuous Time Markov processes. UNIT VII EVEN DRIVEN MODELS: Simulation diagrams, Queing theory, simulating queing systems, Types of Queues, Multiple servers.

UNIT VIII SYSTEM OPTIMIZATION: System identification, Searches, Alpha/beta trackers, multidimensional optimization, modeling and simulation methodology. TEXT BOOKS: 1. System Modeling & Simulation, An introduction Frank L.Severance, John Wiley&Sons, 2001. 2. Simulation Modeling and Analysis Averill M.Law, W.David Kelton, TMH, 3rd Edition, 2003 REFERENCE BOOKS: Systems Simulation Geoffery Gordon, PHI, 1978

DESIGN OF FAULT TOLERANT SYSTEMS (ELECTIVE III) UNIT I BASIC CONCEPTS: Reliability concepts, Failure & Faults, Reliability and failure rate, Relation between reliability and Meantime between failure, Maintainability and Availability, Reliability of series, Parallel and Parallel-Series combinational circuits.

UNIT II FAULT TOLERANT DESIGN: Basic concepts Static, dynamic, hybrid, Triple Modular Redundant System, Self purging redundancy, Siftout redundancy (SMR), SMR Configuration, Use of error correcting code, Time redundancy and software redundancy. UNIT III SELF CHECKING CIRCUITS: Basic concepts of Self checking circuits, Design of Totally Self Checking checker, Checkers using m out of n codes, Berger code, Low cost residue code. UNIT IV FAIL SAFE DESIGN: Strongly fault secure circuits, fail-safe design of sequential circuits using partition theory and Berger code, totally self-checking PLA design. UNIT V DESIGN FOR TESTABILITY FOR COMBINATIONAL CIRCUITS: Basic concepts of testability, controllability and observability, the Reed Mullers expansion technique, OR-ANDOR design, use of control and syndrome testable design. UNIT VI Theory and operation of LFSR, LFSR as Signature analyzer, Multiple-input Signature Register. UNIT VII DESIGN FOR TESTABILITY FOR SEQUENTIAL CIRCUITS: Controllability and observability by means of scan register, Storage cells for scan design, classic scan design, Level Sensitive Scan Design (LSSD). UNIT VIII BUILT IN SELF TEST: BIST concepts, Test pattern generation for BIST exhaustive testing, Pseudorandom testing, pseudo exhaustive testing, constant weight patterns, Generic offline BIST architecture.

TEXT BOOKS: 1. Parag K. Lala Fault Tolerant & Fault Testable Hardware Design (PHI) 2. M. Abramovili, M.A. Breues, A. D. Friedman Digital Systems Testing and Testable Design Jaico publications.

LOW POWER VLSI DESIGN (ELECTIVE IV) UNIT I LOW POWER DESIGN, AN OVER VIEW: Introduction to low- voltage low power design, limitations, Silicon-on-Insulator. UNIT II MOS/BiCMOS PROCESSES : Bi CMOS processes, Integration and Isolation considerations, Integrated Analog/Digital CMOS Process. UNIT III LOW-VOLTAGE/LOW POWER CMOS/ BICMOS PROCESSES: Deep submicron processes ,SOI CMOS, lateral BJT on SOI, future trends and directions of CMOS/BiCMOS processes. UNIT IV DEVICE BEHAVIOR AND MODELING: Advanced MOSFET models, limitations of MOSFET models, Bipolar models. UNIT V Analytical and Experimental characterization of sub-half micron MOS devices, MOSFET in a Hybrid- mode environment. UNIT VI CMOS AND Bi-CMOS LOGIC GATES: Conventional CMOS and BiCMOS logic gates. Performance evaluation UNIT VII LOW- VOLTAGE LOW POWER LOGIC CIRCUITS: Comparison of advanced BiCMOS Digital circuits. ESD-free Bi CMOS , Digital circuit operation and comparative Evaluation. UNIT VIII LOW POWER LATCHES AND FLIP FLOPS: Evolution of Latches and Flip flops-quality measures for latches and Flip flops, Design perspective.

TEXT BOOKS 1. CMOS/BiCMOS ULSI low voltage, low power by Yeo Rofail/ Gohl(3 Authors)-Pearson Education Asia 1st Indian reprint,2002

REFERENCES 1. Digital Integrated circuits , J.Rabaey PH. N.J 1996 2. CMOS Digital ICs sung-moKang and yusuf leblebici 3rd edition TMH2003(chapter 11) 3. VLSI DSP systems , Parhi, John Wiley & sons, 2003 (chapter 17) 4. IEEE Trans Electron Devices, IEEE J.Solid State Circuits, and other National and International Conferences and Symposia.

EMBEDDED SYSTEMS LABORATORY The students are required to conduct the following experiments with the necessary Hardware equipment and Software tools.

PART-1: Experiments on ARM 9 and DSP Board 1. Basic data streaming concepts in DSP/BIOS LINK. 2. Basic message transferring concepts in DSP/BIOS LINK. 3. A combination of data streaming and messaging concepts in DSP/BIOS 4. large buffer transfer through direct writes to and reads from DSP memory.

PART-2: Experiments on I2C Development Board

1. Simulate an I2C master or slave device. 2. Program and verify I2C-based memory devices. 3. Passively monitor an I2C bus in real-time with bit-level timing down to 20 ns. PART-3: Experiments on USB

Analyzer

1. Real-time capture and delayed-download capture 2. High-Speed USB Chirp Detection 3. Automatic Speed Detection 4. Hardware-based packet suppression 5. Digital I/O for synchronizing

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