R.V.

COLLEGE OF ENGINEERING, BANGALORE-59

(An Autonomous Institution Affiliated to VTU, Belgaum)
Department of Instrumentation Technology

Course Content
VII Semester
ARM Processor
(Elective B)
Kendaganna Swamy S
Assistant Professor
CIE Marks: 100
Hrs/Week: 4+0+0
Sub Code:

11/4/2014

Exam Hours: 03Hrs

Hrs Credits: 4
SEE Marks: 100

Course Learning Objectives:

1.
2.
3.
4.
5.
6.
7.

Define ARM based embedded system and requirements of embedded

system.
Select the ARM controller for an embedded application.
Analyze basic design aspects of the ARM RISC Core, Bus Architecture,
Scan chain, etc.
Interpret ARM instructions based on CPU architecture.
Analyzing ARM CPU performance for high end mobile embedded
applications like cell phones.
Develop the ability to use Assembly language to program the ARM
processor to perform a defined task.
Demonstrate the capability to program the ARM controller to
communicate with external circuits.
ARM Syllabus

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Chapter Number and Title: 1 Introduction To Embedded systems

( Planned Hours:09hrs)
Learning Objectives
At the end of this chapter student should be able to:
i. Identifies which are all the system are embedded systems
ii. Demonstrate hardware components required for embedded system.
iii. Classification and skills required for embedded system design.
iv. Analyzing importance of processor selection while making an embedded system.
v. Demonstrate how to create the ROM Image both in high level and low level languages.
vi. Demonstrate the embedded system development tools like editor, assembler, compiler, linker,
loader, debugger, programmer, etc.
vii. Analyzing how the processor and memory organization in any embedded system.
UNIT I
(CONTENT)
Introduction To Embedded systems
Introduction, Processor embedded into a system, embedded hardware units and devices in a
system, examples, SOC and use of VLSI, Complex systems design, formalization of system
design, classification of embedded systems, skills required for an embedded system designer,
processor and memory organization.
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 Outcome
i. They can able to Identifies which are all the system are embedded systems
ii. Students are clear with hardware components required for embedded system.
iii. Students having strong knowledge on Classification and skills required for
embedded system design.
iv. Students are in a position to Analyzing importance of processor selection while
making an embedded system.
v. Students knows how to create the ROM Image both in high level and low level
languages.
vi. Students having strong knowledge on embedded system development tools
like editor, assembler, compiler, linker, loader, debugger, programmer, etc.
vii. Students are in a position to Analyzing how the processor and memory
organization in any embedded system.

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Chapter Number and Title: 2 ARM Embedded Systems

(Planned Hours:04 hrs)

Learning Objectives
At the end of this chapter student should be able to:
i. Compare RISC & CISC architectures
ii. Demonstrate hardware and software based implementation of different
instructions.
iii. Interpret requirement of a high end embedded applications.
iv. Analyzing importance ARM controller for battery operated embedded systems.
v. Demonstrate the embedded system development tools like editor, assembler,
compiler, linker, loader, debugger, programmer, etc.
vi. Differentiate hard, soft and firm IP cores.

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Chapter Number and Title: 3 ARM processor fundamentals

(Planned Hours: 5 hrs)

Learning Objectives
At the end of this chapter student should be able to:
i. Analyze various units of ARM core including implementation details.
ii. Examine the data processing capability of CPU, stack realization, memory organization,
GPIOs, oscillator connections, etc.
iii. Explain different modules of CPU and their implementation depending on data size and
available registers.
iv. Interpret nested interrupt support for ARM for response systems.
v. Analyze different modes available in ARM to increase performance.

UNIT II
(CONTENT)
ARM Embedded Systems and ARM processor fundamentals
The RISC Design philosophy, The ARM Design philosophy, Embedded system hardware ,
Registers, Current program status register, pipeline, exceptions, interrupts and Vector table,
Core extensions, Architecture revisions, ARM processor families.
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i.
ii.
iii.
iv.

Outcome
Students can able to distinguish between RISC & CISC architectures
Students are clear with hardware and software based implementation of different instructions.
Interpret requirement of a high end embedded applications.
Students are in a position to Analyzing importance ARM controller for battery operated
embedded systems.
v. Students are in a position to Differentiate hard, soft and firm IP cores.
vi. Students can Analyze various units of ARM core including implementation details.
vii. Students can Examine the data processing capability of CPU, stack realization, memory
organization, GPIOs, oscillator connections, etc.
viii. Students having a clear picture about all modules of CPU and their implementation
depending on data size and available registers.
ix. Students can able to Analyze different modes available in ARM to increase performance.

11/4/2014

Chapter Number and Title: 4 Introduction to ARM instruction set

(Planned Hours: 9 hrs)

Learning Objectives
At the end of this chapter student should be able to:
i. Identify, formulate and solve problems using various instructions.
ii. Examine the usage of different addressing modes with reference to application
specification.
iii. Identify the number of machine cycles (clock or instruction cycle) for each
instruction in assembly language and time calculation for Delay routines.
iv. Comparison of different sequential and non sequential instructions.
v.
Optimize the program to meet constraints specified.
UNIT III
(CONTENT)
Introduction to ARM instruction set and

Data processing instructions, branch instructions, load-store instructions, software

interrupts instruction, Program status register instructions, loading constants,
ARMv5E extensions, conditional execution.
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 Outcome
i.

Students now can able to Identify, formulate and solve problems using various
instructions.
ii. Students now can able to Examine the usage of different addressing modes with
reference to application specification.
iii. Students now able to Identify the number of machine cycles (clock or instruction
cycle) for each instruction in assembly language and time calculation for Delay
routines.
iv. Students now having a clear picture on Comparison of different sequential and non
sequential instructions.
v.
Students can able to Optimize the program to meet constraints specified.

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Chapter Number and Title: 5 Introduction to the thumb instruction set

(Planned Hours: 05 hrs)

Learning Objectives
At the end of this chapter student should be able to:
i.
ii.

Identify, formulate and solve problems using various instructions.

Examine the usage of different addressing modes with reference to
application specification.
iii. Identify the number of machine cycles (clock or instruction cycle) for
each instruction in assembly language and time calculation for Delay
routines.
iv. Comparison of different sequential and non sequential instructions.
v.
Optimize the program to meet constraints specified.

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10

Chapter Number and Title: 6.Exception and interrupt handling

(Planned Hours: 04 hrs)

Learning Objectives
At the end of this chapter student should be able to:
i. Examine the exception handler requirement.
ii. Examine use of vector table and how the exceptions are working according to the priority.
iii. Examine the exact picture on Interrupt and how it is going to be handle with the help of
interrupt handler..
iv. Examine how the efficient handler can dramatically improve the system performance.
UNIT IV
(CONTENT)

Introduction to the thumb instruction set and Exception and interrupt handling
Thumb register usage, ARM-Thumb interworking, data processing instructions,
Single & multiple-register Load-store instruction, stack instructions, software
interrupt instruction, Exception handling, interrupts, interrupt handling schemes

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 Outcome
i.
ii.
iii.
iv.
v.
vi.
vii.

viii.
ix.

Students now are in a position to Identify, formulate and solve problems using various
instructions.
Student can Examine the usage of different addressing modes with reference to application
specification.
Student can Identify the number of machine cycles (clock or instruction cycle) for each
instruction in assembly language and time calculation for Delay routines.
Student are in a position to give clear Comparison of different sequential and non sequential
instructions.
Student can Optimize the program to meet constraints specified.
Student can Examine the exception handler requirement.
Student can Examine use of vector table and how the exceptions are working according to the
priority.
Student can Examine the exact picture on Interrupt and how it is going to be handle with the
help of interrupt handler..
Student can Examine how the efficient handler can dramatically improve the system
performance.

11/4/2014

12

Chapter Number and Title:7. Embedded operating systems

(Planned Hours: 05 hrs)

Learning Objectives
At the end of this chapter student should be able to:
i. Identify which are all the fundamental components that make up an embedded
operating system.
ii. Examine the issues specific to the ARM processor.
iii. With the help the operating system knowledge they are capable to do example
operating system called simple little operating system.
iv. Examine how the SLOS is designed to show an implementation of the fundamental
components.

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13

Chapter Number and Title: 8. Future of the Architecture

Learning Objectives
At the end of this chapter student should be able to:
i. Examine the ARM architecture is not a static constant but is being developed and improved
to suite the applications requirement by todays consumer devices.
ii. Examine how the ARMv5TE architecture was very successful at adding some DSP support to
the ARM.
iii. Importance of ARMv6 architecture in order to extend the DSP support as well as adding
support for large multiprocessor system.
iv. Examine hoe the new technology map to different processor cores.

UNIT V
(CONTENT)
Embedded operating systems and Future of the Architecture
Fundamental components, Example: Simple little operating system. Advanced DSP
and SIMD support in ARMv6, System and multiprocessor support additions to
ARMv6, Armv6 implementations, Future technologies beyond ARMv6.
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14

 Outcome
i.
ii.
iii.
iv.
v.
vi.

vii.
viii.

Students are in a position to Identify which are all the fundamental components that make up
an embedded operating system.
Students can able to Examine the issues specific to the ARM processor.
With the help the operating system knowledge students are capable to do example operating
system called simple little operating system.
Students can Examine how the SLOS is designed to show an implementation of the
fundamental components.
Students can Examine the ARM architecture is not a static constant but is being developed
and improved to suite the applications requirement by todays consumer devices.
Students can Examine how the ARMv5TE architecture was very successful at adding some
DSP support to the ARM.
Students knows Importance of ARMv6 architecture in order to extend the DSP support as
well as adding support for large multiprocessor system.
Students can Examine hoe the new technology map to different processor cores.

11/4/2014

15

Course Unitization for Internals and Semester End Examination

No. of Questions in
Chapter

Teaching
Hours

Compensator
Internals I

Internals II

No. of
Questions in
SEE

III Internals
Introduction To Embedded
systems

ARM Embedded Systems

ARM processor fundamentals

5

set

Introduction to the thumb

instruction set

Introduction to ARM instruction

Exception and interrupt handling

Embedded operating systems

1

Future of the Architecuture

4

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Evaluation Scheme
CIE Scheme
Best out of 2 Quiz and 2 Internals will be considered for CIE marks.

Assessment
2 Quiz
2 Internals
Total

11/4/2014

Weightage in Marks
15
30
45

17

Thank You

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18