INTRODUTION TO EMBEDDED

SYSTEM-DESIGN CYCLE-8051 MICRO

CONTROLLER

PRESENTED BY
NALAJAM.REKHA,
RA1412031010006

SYSTEM DEFINITION
A way of working, organizing or performing one or many tasks

according to a fixed set of rules , program or plan.

Also an arrangement in which all units assemble and work
together according to a program or plan.

EMBEDDED SYSTEM
DEFINITIONS
An embedded system is a system that has software

embedded into computer-hardware, which makes a

system dedicated for an application (s) or specific part
of an application or product or part of a larger
system.

An embedded system is one that has a dedicated

purpose software embedded in a computer hardware.

Its software usually embeds into a ROM (Read Only
Memory) or flash.
Embedded Systems are the electronic systems that
contain a microprocessor or a microcontroller, but
we do not think of them as computers the computer
is hidden or embedded in the system.

EMBEDDED SYSTEM COMPONENTS

Embeds a real time operating system ( RTOS), which

supervises the application software tasks running on

the hardware and organizes the accesses to system
resources according to priorities and timing
constraints of tasks in the system.

EMBEDDED SYSTEM RTOS

Enables execution of concurrent processes or threads

or tasks
Provides a mechanism to let the processor run each
process as per scheduling and to do context-switch
between the various processes (threads or tasks)
RTOS sets the rules during execution of application
processes to enable finishing of a process within the
assigned time interval and with assigned priority.

A TYPICAL EMBEDDED SYSTEM

Real-Time
Clock

Algorithms for
Digital Control

Data Logging

Interface

Engineering
System

Remote
Monitoring System

Database
Data Retrieval
and Display

Operators
Console

Operator
Interface

Display
Devices

Real-Time Computer

THE EMBEDDED DESIGN LIFE CYCLE

Product specification
Hardware/software partitioning
Hardware/software integration

PRODUCT SPECIFICATION
R&D engineers want to incorporate everything:
Time and resource

Marketing and sales will usually execute the product

specification
Engineers, however, should be involved in some customer
tours
CPIF Cost Plus Incentive-Fee (Contract)
Listening to the customer is good

HARDWARE/SOFTWARE PARTITIONING
Embedded design usually involves hardware and software
Hardware utilizes Micro-processors, Micro-controllers and

Digital Signal Processors but are neither used nor perceived as

computers.
Generally, software is used for features and flexibility, while
hardware is used for performance.

ALGORITHM
Steps required to implement a design
Combination of hardware components and software

components
Hardware/software partitioning also involves the how it is
partitioning the algorithm (software only, hardware only,
combination)

ITERATION AND IMPLEMENTATION

Hardware and software paths begin to diverge
Early design work before the walls go up (between H/W and S/W)
Major blocks partitioned
Boundary can still be moved

Iteration is common
Hardware team
Simulation tools to model performance

Software team
Running code benchmarks on self contained systems (evaluation

boards)
Convenient development environment until the hardware arrives!

HARDWARE/SOFTWARE INTEGRATION
Special tools and methods to manage the complexity
Process of integrating h/w and s/w requires debugging and

discovery
Real-time nature of embedded systems leads to highly
complex, non-deterministic behavior
Can only be analyzed as it occurs

DESIGN CYCLE

EXEMPLARY APPLICATION AREAS

Embedded
System

SOPHISTICATED EMBEDDED SYSTEM

CHARACTERISTICS
Dedicated functions

Dedicated complex algorithms

Dedicated (UIs) and other user interfaces for the

application
Real time operations Defines the ways in which the
system works, reacts to the events and interrupts,
schedules the system functioning in real time and
executes by following a plan to control the latencies
and to meet the deadlines

Multi-rate operations Different operations may

take place at distinct rates. For example, the audio,

video, network data or stream and events have the
different rates and time constraints to finish associated
processes.

CONSTRAINTS OF AN EMBEDDED SYSTEM

DESIGN
Available system-memory
Available processor speed
Limited power dissipation when running the system
continuously in cycles of the system start, wait for
event, wake-up and run, sleep and stop.

SYSTEM DESIGN CONSTRAINTS

Performance,
power,
size,
non-recurring design cost, and
manufacturing costs.

ISSUES
Not as simple as we think (see figure)
Much iteration and optimization
Defects can force you back to beginning
To overcome performance issues:
Rewrite algorithm
Design custom hardware
Speed up processor
New processor

CHALLENGES
Does it really work?
Is the specification correct?
Does the implementation meet the spec?
How do we test for real-time characteristics?
How do we test on real data?

How do we work on the system?

Observability, controllability?
What is our development platform?

8051 MICRO CONTROLLERS

Microcontroller (MC) may be called computer on

chip since it has basic features of microprocessor with

internal ROM, RAM, Parallel and serial ports within
single chip.
microprocessor with memory and ports is called as
microcontroller.
This is widely used in washing machines,vcd player,
microwave oven, robotics or in industries.

DIFFERENCE BETWEEN MICROCONTROLLER AND

MICROPROCESSOR

MICRO PROCESSOR

MICRO CONTROLLER

DATA BUS
CPU
General
Purpose
Micro
processor

RAM

ROM

I/O
PORT

TIM
ER

CPU

RAM

I/O

Timer Serial
COM
Port

SERI
AL
COM
PORT

ADDRESS BUS

ROM

The 8051 is an 8-bit microcontroller with 8 bit data

bus and 16-bit address bus. The 16 bit address bus can
address a 64K( 216) byte code memory space and a
separate 64K byte of data memory space. The 8051
has 4K on-chip read only code memory and 128 bytes
of internal Random Access Memory (RAM)

Besides internal RAM, the 8051 has various Special

Function Registers (SFR) such as the Accumulator, the B

register, and many other control registers.
34 8-bit general purpose registers in total.

The ALU performs one 8-bit operation at a time.

Two 16 bit /Counter timers
3 internal interrupts (one serial), 2 external interrupts.
4 8-bit I/O ports (3 of them are dual purposed). One of

them used for serial port,

Some 8051 chips uses ADC for analog to digital
conversion.

40 PINS ON THE 8051 CHIP.

Most of these pins are used to connect to I/O devices or external
data and code memory.
4 I/O port take 32 pins(4 x 8 bits) plus a pair of XTALS pins
for crystal clock
A pair of Vcc and GND pins for power supply (the 8051
chip needs +5V ,500mA to function properly)
A pair of timer pins for timing controls, a group of pins (EA,
ALE, PSEN, WR, RD) for internal and external data and code
memory access controls
One Reset pin for reboot purpose

THE PIN CONNECTION FOR EXTERNAL

CODE AND DATA MEMORY

The EA' (External Access) pin is used to control the internal or external memory

access.
The signal 0 is for external memory access and signal 1 for internal memory
access.
The PSEN' (Program Store Enable) is for reading external code memory when it

is low (0) and EA is also 0.

The ALE (Address Latch Enable) activates the port 0 joined with port 2 to

provide 16 bit external address bus to access the external memory. The ALE
multiplexes the P0:
1 for latching address on P0 as A0-A7 in the 16 bit address buss, 0 for latching
P0 as data I/O.
P0.x is named ADx because P0 is multiplexed for Address bus and Data bus at

different clock time.

WR' only provides the signal to write external data memory
RD' provides the signal to read external data and code memory.

SYSTEM CLOCK AND OSCILLATOR

CIRCUITS

The 8051 requires an external oscillator circuit. The oscillator

circuit usually runs around 12MHz. the crystal generates 12M

pulses in one second. The pulse is used to synchronize the
system operation in a controlled pace.
An 8051 machine cycle consists of 12 crystal pulses.
The first 6 crystal pulses (clock cycle) is used to fetch the
opcode and the second 6 pulses are used to perform the
operation on the operands in the ALU. This gives an effective
machine cycle rate at 1MIPS

8051 INTERNAL ARCHITECTURE

The CPU has many important registers. The Program Count (PC)

always holds the code memory location of next instruction.

The CPU is the heart of any computer which is in charge of

computer operations.
It fetches instructions from the code memory into the instruction

Register (IR),
analyzes the opcode of the instruction, updates the PC to the
location of next instruction,
fetches the oprand from the data memory if necessary, and finally
performs the operation in the Arithmetic-Logic Unit (ALU) within
the CPU.

 The B register is a register just for multiplication and

division operation which requires more register spaces

for the product of multiplication and the quotient and the
remainder for the division.
The immediate result is stored in the accumulator
register (Acc) for next operation
and the Program Status Word (PSW) is updated
depending on the status of the operation result .

8051 ARCHITECTURE

PORTS
PORT P1 (Pins 1 to 8): The port P1 is a port dedicated for

general I/O purpose. The other ports P0, P2 and P3 have dual
roles in addition to their basic I/O function.
PORT P0 (pins 32 to 39): When the external memory access
is required then Port P0 is multiplexed for address bus and
data bus that can be used to access external memory in
conjunction with port P2. P0 acts as A0-A7 in address bus and
D0-D7 for port data. It can be used for general purpose I/O if
no external memory presents.
PORT P2 (pins 21 to 28): Similar to P0, the port P2 can also
play a role (A8-A15) in the address bus in conjunction with
PORT P0 to access external memory.

PORT P3 (Pins 10 to 17):

In addition to acting as a normal I/O port,
P 3.0 RXD Serial data input SBUF
P 3.1 TXD Serial data output SBUF
P 3.2 INT0 External interrupt 0 TCON 0.1
P 3.3 INT1 External interrupt 1 TCON 0.3
P 3.4 T0 External timer 0 input TMOD
P 3.5 T1 External timer 1 input TMOD
P 3.6 WR External memory write cycle Active LOW
P 3.7 RD External memory read cycle Active LOW

MEMORY
The 8051 code(program) memory is read-only, while the data

memory is read/write accessible. The program memory( in EPROM)

can be rewritten by the special programmer circuit.
The 8051 memory is organized in a Harvard Architecture. Both the

code memory space and data memory space begin at location 0x00
for internal or external memory.
In this model, the data memory and code memory use separate maps

by a special control line called Program Select Enable (PSEN).

IF PSEN=0,This line is used to indicate that the 16 address lines are

being used to address the code memory.

When this line is 1, the 16 address lines are being used to address

the data memory.

The 8051 has 256 bytes of internal addressable RAM, although

only first 128 bytes are available for general use by the
programmer.
The first 128 bytes of RAM (from 0x00 to 0x7F) are called the
direct memory, and can be used to store data.
The lowest 32 bytes of RAM are reserved for 4 general register
banks. The 8051 has 4 selectable banks of 8 addressable 8-bit
registers, R0 to R7.
The second 128 bytes are used to store Special Function
Registers (SFR) that C51 program can configure and control the
ports, timer, interrupts, serial communication, and other tasks.

STRUCTURE OF RAM

SPECIAL FUNCTION REGISTERS (SFRS)

The SFR is the upper area of addressable memory, from

address 0x80 to 0xFF. This area consists of a series of memorymapped ports and registers.
All 8051 CPU registers, I/O ports, timers and other architecture
components are accessible in 8051 C through SFRs
They are accessed in normal internal RAM (080H 0FFH) by
8051 C.

Byte Addressable SFR with byte address

SP Stack printer 81H
DPTR Data pointer 2 bytes
DPL Low byte 82H
DPH High byte 83H
TMOD Timer mode control 89H
TH0 Timer 0 Higher order bytes 8CH
TL0 Timer 0 Low order bytes 8AH
TH1 Timer 1 High bytes = 80H
TL1 Timer 1 Low order byte = 86H
SBUF Serial data buffer = 99H
PCON Power control 87H

There are 21 SFRs.

In addition to I/O ports, the most frequently used SFRs to

control and configure 8051 operations are:

TCON (Timer CONtrol)
TMOD (Timer MODe)
TH0/TH1 and TL0/TL1 (Timers high and low bytes)
SCON (Serial port CONtrol)
IP (Interrupt Priority)
IE ( Interrupt Enable)