Embedded System

Using ATmega16
Everything is Embedded

Introduction to Atmel AVR

Atmel Corporation is a manufacturer of semiconductors,
founded in 1984.
Atmel introduced the first 8-bit flash microcontroller in 1993,
based on the 8051 core.
In 1996, a design office was started in Trondheim, Norway,
to work on the AVR series of products.
Its products include microcontrollers (including 8051
derivatives and AT91SAM and AT91CAP ARM-based
micros), and its own Atmel AVR and AVR32 architectures.

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Introduction to Atmel AVR

The AVR architecture was conceived by two students at the
Norwegian Institute of Technology (NTH) Alf-Egil Bogen and
Vegard Wollan.
The AVR is a modified Harvard architecture 8-bit RISC single
chip microcontroller which was developed by Atmel in 1996. The
AVR was one of the first microcontroller families to use on-chip
flash memory for program storage, as opposed to one-time
programmable ROM, EPROM, or EEPROM used by other
microcontrollers at the time.
The AVR is a modified Harvard architecture machine where
program and data is stored in separate physical memory systems
that appear in different address spaces, but having the ability to
read data items from program memory using special instructions.

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Introduction to Atmel AVR

Atmel says that the name AVR is not an acronym and does not stand for
anything in particular. The creators of the AVR give no definitive answer as to
what the term "AVR" stands for. However, it is commonly accepted that AVR
stands for Alf (Egil Bogen) and Vegard (Wollan)'s Risc processor"

Harvard Architecture
Howard Hathaway Aiken

The Harvard architecture is a computer architecture with physically

separate storage and signal pathways for instructions and data.
The term originated from the Harvard Mark I relay-based computer,
which stored instructions on punched tape (24 bits wide) and data in
electro-mechanical counters.
In a Harvard architecture, there is no need to make the two
memories share characteristics. In particular, the word width, timing,
implementation technology, and memory address structure can differ.
In some systems, instructions can be stored in read-only memory
while data memory generally requires read-write memory. In some
systems, there is much more instruction memory than data memory
so instruction addresses are wider than data addresses.

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Von Neumann Architecture

In contrast with the Harvard architecture, the Von Neumann

architecture has a single storage structure to hold both instructions
and data. The CPU can be either reading an instruction or
reading/writing data from/to the memory because instructions and
data use the same bus system.
The phrase Von Neumann architecture derives name of the
mathematician and early computer scientist John von Neumann.
The meaning of the phrase has evolved to mean a stored-program
computer in which an instruction fetch and a data operation cannot
occur at the same time because they share a common bus. This is
referred to as the Von Neumann bottleneck and often limits the
performance of the system.
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Modified Harvard Architecture

A modified Harvard architecture machine is very much like a Harvard
architecture machine, but it relaxes the strict separation between instruction
and data while still letting the CPU concurrently access two (or more)
memory buses. The most common modification includes:
Separate instruction and data caches backed by
acommon address space. While the CPU executes
from cache, it acts as a pure Harvard machine.
When accessing backing memory, it acts like a von
Neumann machine (where code can be moved
around like data, a powerful technique). This
modification is widespread in modern processors
such as the ARM architecture and X86 processors.

Provides a pathway between the instruction memory (such as ROM or flash) and the CPU to
allow words from the instruction memory to be treated as read-only data. This technique is
used in some microcontrollers, including the Atmel AVR. This allows constant data, such as
text strings or function tables, to be accessed without first having to be copied into data
memory, preserving scarce (and power-hungry) data memory for read/write variables.
Special machine language instructions are provided to read data from the instruction
memory. (This is distinct from instructions which themselves embed constant data, although
for individual constants the two mechanisms can substitute for each other.)
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Processor ISA: RISC versus CISC

CISC

RISC

Emphasis on hardware

Emphasis on software

Include multi-clock complex

instructions

Include single-clock reduce instruction

only

Memory-to-memory: Load and

Store incorporated in instructions

Register-to-register: Load and Store

are independent instructions

Small code sizes, high cycles per

second

Low cycles per second, large code

sizes

Transistors used for storing complex

instructions

Spends more transistors on memory

registers

RISC vs. CISC is a topic quite popular on the Net. Every time Intel (CISC) or Apple (RISC) introduces a new
CPU, the topic pops up again.

Most PC's use CPU based on CISC architecture. For instance Intel and AMD CPU's are based on CISC
architectures.

Many claim that RICS is the architecture of the future.

But even though RISC has been in the market since 1980, it hasnt managed to kick CISC out of the
picture, some argue that if it is really the architecture of the future it should have been able to do this by
now.
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AVR different groups

Classic AVR
e.g. AT90S2313, AT90S4433

Mega
e.g. ATmega8, ATmega32, ATmega128

Tiny
e.g. ATtiny13, ATtiny25

Special Purpose AVR

e.g. AT90PWM216,AT90USB1287

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Lets get familiar with the AVR

part numbers
ATmega128
Atmel grou
p

ATtiny44
Atmel

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Tiny
group

Flash =4K

Flash
=128K

AT90S4433
Atmel Class
ic
grou
p

Flash =4K

ATMega32 Pin out & Descriptions

Clears
PortallB
theProvides
registers
and restart
supply
voltage
These
pins
areIt
the
to the
chip.
used
tobe
execution
of
should
connect to
program
connected
external+5
crystal
or RC oscillator

Port D

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Port A
Reference
voltage
ADC
Supplyfor
voltage
for ADC and
portA. Connect
it to VCC

Port C

ATMega32 Pin out & Descriptions

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ATMega32 Pin out & Descriptions

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ATMega32 Pin out & Descriptions

Digital IO is the most fundamental mode of connecting a MCU to
external world. The interface is done using what is called a PORT. A
port is the point where internal data from MCU chip comes out
or external data goes in. They are present is form of PINs of the
IC. Most of the PINs are dedicated to this function and other pins
are used for power supply, clock source etc . ATMega32 ports are
named PORTA, PORTB, PORTC, and PORTD.

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ATMega32 Programmer Model:

Memory
1.

2KB SRAM
For temporary data storage
Memory is lost when power is shut off (volatile)

2.

1KB EEPROM
For persistent data storage
Memory contents are retained when power is off (non-volatile)
Fast read; slow write
3. 32KB Flash Program Memory
Used to store program code
Memory contents retained when power is off (non-volatile)
Fast to read; slow to write
Can only write entire blocks of memory at a time
organized in 16-bit words (16KWords)

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ATMega32 Programmer Model:

Memory
AVR microcontrollers are Harvard architecture. This means, that in this
architecture are separate memory types (program memory and data memory)
connected with distinct buses. Such memory architecture allows processor to
access program memory and data memory at the same time. This increases
performance of MCU comparing to CISC architecture, where CPU uses same
bus for accessing program memory and data memory.
Each memory type has its own address space:
Type

Flash

RAM

EEPROM

F_END

Size, kB

RAMEND

Size, kB

E_END

Size, kB

Atmega8

$0FFF

$045F

$1FF

0.5

Atmega32

$3FFF

32

$085F

$3FF

Atmega64

$7FFF

64

$10FF

$7FF

Atmega12
8

$FFFF

128

$10FF

$FFF

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Memory Architecture of
ATmega32

ATMega32 Programmer Model:

Data Memory
EEPROM

ATmega32 contains 1024 bytes of data EEPROM memory.

It is organized as a separate data space, in which single bytes can be
read and written.
The EEPROM has an endurance of at least 100,000 write/erase
cycles.
Different chip have different size of EEPROM memory

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Chip

Bytes

Chip

Bytes

Chip

Bytes

ATmega8

512

ATmega16

512

ATmega32

1024

ATmega64

2048

ATmega128

4096

ATmega256R 4096
Z

ATmega640

4096

ATmega1280

4096

ATmega2560 4096

ATMega32 Programmer Model:

Data Memory
The data memory is
composed of three parts:
GPRs (general purpose registers),
Special Function Registers (SFRs), and
Internal data SRAM.

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ATMega32 Programmer Model:

Internal SRAM
Internal data SRAM is widely used for storing data and
parameters by AVR programmers and C compilers.
Each location of the SRAM can be accessed directly by
its address.
Each location is 8 bit wide and can be used to store any
data we want.
Size of SRAM is vary from chip to chip, even among
members of the same family.
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ATMega32 Programmer Model: Registers (GPRs)

The fast-access Register file contains 32 x 8-bit general
purpose working registers with a single clock cycle access
time. This allows single-cycle Arithmetic Logic Unit (ALU)
operation. In a typical ALU operation, two operands are
output from the Register file, the operation is executed,
and the result is stored back in the Register file in one
clock cycle.

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ATMega32 Programmer Model: Registers (GPRs)

Six of the 32 registers can be used as three 16-bit indirect address
register pointers for Data Space addressing enabling efficient
address calculations. One of the these address pointers can also be
used as an address pointer for look up tables in Flash Program
memory. These
added function registers are the 16-bit X-register, Y-register and Zregister, described later.

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ATMega32 Programmer Model: Registers (GPRs)

The R26..R31 registers have some added functions to their
general purpose usage. These registers are 16-bit address
pointers for indirect addressing of the Data Space. The
three indirect address registers X, Y, and Z are shown
above.
In the different addressing modes these address registers
have functions as fixed displacement, automatic increment,
and automatic decrement

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ATMega32 Programmer Model:

Registers (PC)
Program counter (PC, 16-bit)
Holds address of next program instruction
to be executed
Automatically incremented when the ALU
executes an instruction

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AVR family

Classic
Mega
Tiny
Special purpose.

AVR family
Classic AVR (AT90Sxxxx)
This is the original AVR chip, which has
been replaced by newer AVR chips and
are not recommended for new designs.

AVR family

Mega AVR (ATmegaxxxx)

These are powerful microcontrollers with more than 120

instructions and lots of different peripheral capabilities, which can
be used in different designs.
Program memory: 4K to 256K bytes
Package: 28 to 100 pins
Extensive peripheral set
Extended instruction set: They have rich instruction sets.

AVR family

Tiny AVR (ATtinyxxxx)

Less instructions and smaller packages in comparison to mega
family. You can design systems with low costs and power
consumptions using the Tiny AVR .Some of their characteristics are
as follows:
Program memory: 1K to 8K bytes
Package: 8 to 28 pins
Limited peripheral set
Limited instruction set: The instruction sets are limited. For example,
some of them do not have the multiply instruction.

AVR family

Special purpose AVR

USB controller, CAN controller, LCD controller, Zigbee,
Ethernet controller, FPGA, and advanced PWM.

AVR product number scheme

From left to right find the biggest number that

is a power of 2(ROM).
Exceptions such as AT90PWM216, which
has 16K of ROM instead of 2K, it works in
most of the cases.

Comparison of 8051, PIC18

Family, and AVR

GENERAL PURPOSE REGISTERS IN THE AVR

32 general purpose registers

R0-R31located in the lowest
location of memory address.
The general purpose registers
in AVR are the same as
the accumulator in other
microprocessors.

AVR FEATURES

8-bit RISC single-chip microcontroller.

Harvard architecture.
On-chip program (code) ROM, data RAM, data
EEPROM, timers ,I/O ports, ADC,
PWM,USART, SPI, I2C (TWI), CAN, USB etc.
AVR has 8M of ROM space.
AVR has a maximum of 64K bytes of data RAM
RAM space has three components(1) generalpurpose registers(2) I/O memory(3)and internal
SRAM.

AVR CPU/ALU

ATmega32 Status
Register

ATmega16 Pin
configuration

ATmega32 Pin
configuration

Pin Diagram Comparisons

Reset Circuit Connection

Minimum Hardware Connection

It has four ports

PORTA
PORTB
PORTC
PORTD

32 input output pins for data transmission and

reception
wowoooo

How to learn the programming of

ATmega16 ?
The only thing you need to do is to learn
the way of using the two registers.

Its easy buddy

The Two registers are:-

1.
2.

DDRx (Data direction register)

PORTx (Port output register)

x represent the port name e.g. A,B,C

and D

DDRx(Data direction register)

Data direction register sets the direction of
data, whether its output or input.
DDRx DDRA for portA
DDRB for portB
DDRC for portC
DDRD for portD
You R killing me

Pin direction
Logic 1 for output
Logic 0 for input

DDRA=0b01001111 what
Answer
PA0 this pin is output
PA1 this pin is output
PA2 this pin is output
PA3 this pin is output
PA4 this pin is input
PA5 this pin is input
PA6 this pin is output
PA7 this pin is input

is this

PORTA=0b01001111 what

is this

Answer
PA0 the voltage on this pin is 5V
PA1 the voltage on this pin is 5V
PA2 the voltage on this pin is 5V
PA3 the voltage on this pin is 5V
PA4 the voltage on this pin is 0V
PA5 the voltage on this pin is 0V
PA6 the voltage on this pin is 5V
PA7 the voltage on this pin is 0V

Amazing!!!

Ready for the

programming

Interfacing with the microcontroller