Micro Electro Mechanical Systems

Prof. S.A. Gangal

ISRO Chair Professor
Department of Electronic Science
University of Pune

21-08-2012

Lecture at DIAT

What are MEMS

Micro Electro Mechanical Systems or MEMS is a

term coined around 1989 by Prof. R. Howe and
others to describe an emerging research field,
where mechanical elements, like cantilevers or
membranes, had been manufactured at a scale
more akin to microelectronics circuit than to
lathe machining.

But MEMS is not the only term used to describe

this field. From its multicultural origin it is also
known as Micromachines.

21-08-2012

Lecture at DIAT

Techniques used for fabrication

Bulk Micromachining

Surface Micromachining

LIGA

21-08-2012

Lecture at DIAT

MEMS Basic Structures

Nozzles

Diaphragm
Cantilever

21-08-2012

Hinge

Lecture at DIAT

Groove

Rack and pinion drive, gear

reduction system.

21-08-2012

Lecture at DIAT

Pop-up mirror with ground and

joint hinges.

21-08-2012

Lecture at DIAT

Advantages offered by MEMS Technology

Miniaturization of existing devices,

e.g. gyroscope existing devices weighting several kg
and with a volume of 1000 cm3. Silicon based
devices reduced to a chip of a few grams contained in a
0.5 cm3 package.

Development of new devices based on principles that do

not work at larger scale.
e.g. A biochips where electrical field is used to pump the
reactant around the chip. This electro-osmotic effect
based on the existence of a drag force in the fluid works
only in channels with dimension of a fraction of one mm,
that is, at micro-scale.

21-08-2012

Lecture at DIAT

Contd.

Development of new tools to interact with the micro-world.

e.g. development of micromachined sharp micro-tips

with radius below 50 nm for scanning tunnelling
microscope.
This work heralded the development of a new class of
microscopes (atomic force microscope, scanning nearfield optical microscope...).
This micro-tool was used to position atoms in complex
arrangement, writing Chinese character or helping verify
some prediction of quantum mechanics.

Another example of this class of MEMS devices at a

slightly larger scale would be the development of microgrippers to handle cells for analysis.

21-08-2012

Lecture at DIAT

Diverse products

Product category: Pressure sensor, Manifold pressure

(MAP), tire pressure, blood pressure..

Inertia sensor: Accelerometer, gyroscope, crash sensor...

Microuidics /bioMEMS: Inkjet printer nozzle, micro-bioanalysis systems, DNA chips...

Optical MEMS / MOEMS: Micro-mirror array for projection

(DLP), micro-grating array for projection (GLV), optical
fiber switch, adaptive optics...

RF MEMS: High Q-inductor, switches, antenna, filter..

Others: Relays, microphone, data storage, toys...

21-08-2012

Lecture at DIAT

The MEMS materials

The choice of a good material for MEMS application is
based more on mechanical aspect:
o small or controllable internal stress,
low processing temperature,
compatibility with other materials,
possibility to obtain thick layer,
patterning possibilities...
additional properties depending on the field of
application,

21-08-2012

RF MEMS: small loss tangent (for example high

resistivity silicon),
optical MEMS may need a transparent substrate,
BioMEMS will need bio-compatibility,
sensor application will need a material showing
piezoresistance or piezoelectricity, etc.
Lecture at DIAT

10

Relevant Material Properties

21-08-2012

Electrical (semiconductor, metals, insulators)

Mechanical (elasticity, fatigue, Creep etc.)
Thermal (heat conductivity)
Chemical, electro-chemical
Biological (bio-compatibility)
Optical (roughness)
Processing

Lecture at DIAT

11

Materials used

Silicon (Si) Monocrystalline, Polycrystalline,

amorphous

Si compounds SiO2, Si3N4, SiC

Metals Ag, Au, Al, Cr, Ti etc.

Polymers SU-8, polymides etc.

21-08-2012

Lecture at DIAT

12

Silicon Classification According to

crystallization

MonoCrystalline:
Wafers (2 to 12 )

Polysilicon: thin film

deposition

Amorphous : thin film

deposition at low
temperature

21-08-2012

Lecture at DIAT

13

Facts about Silicon

Eighth most common element in the universe by mass

Second most abundant material in the earth crust
Silicon is the material used to create most integrated
circuits used in consumer electronics in the modern world
Silicon is widely used in semiconductors because it
remains a semiconductor at higher temperatures than the
semiconductor germanium

21-08-2012

Lecture at DIAT

14

The economies of scale, ready availability of cheap

high-quality materials and ability to incorporate
electronic functionality make silicon attractive for a wide
variety of MEMS applications

21-08-2012

Lecture at DIAT

15

Contd..

One of very few materials that can be economically

manufactured in single crystal substrates. Czocharlski
technique is used for this purpose.

In the monocrystalline form is used in the semiconductor

device fabrications

Its strength and flexibility

Its native oxide is easily grown in a furnace and forms a

better semiconductor/dielectric interface than any other
material

21-08-2012

Lecture at DIAT

16

Silicon Crystal Structure & planes

21-08-2012

Lecture at DIAT

17

The width of the rectangular or square cavity bottom plane,

W0, aligned with the 110 directions is defined completely by
the etch depth z the mask opening Wm and the abovecalculated sidewall slope
21-08-2012

Lecture at DIAT

18

Properties of Silicon

Youngs Modulus [ 190 GPa] as high as steel [210 Gpa]

Yield Strength [7 GPa] Steel [4.2 GPa]
Silicon shows no plasticity below 800 oC
It shows no fatigue failure under all conceivable circumstances
Density [2.3 g/cm3] Aluminum [2.7 g/cm3]
Melting point 1673 K
Low thermal expansion coefficient
It is mechanically stable and can be integrated into electronics
on the same substrate
Treatment and fabrication process for silicon substrates are
well establish

21-08-2012

Lecture at DIAT

19

Polysilicon

Surface micromachined MEMS devices utilize

polycrystalline Si (polysilicon) as the primary structural
material,
SiO2 as the sacrificial material, and
Si3N4 for electrical isolation of device structures.
For surface micromachined structures, polysilicon is an
attractive material because
it has mechanical properties comparable to singlecrystal Si,
the required processing technology has been developed
for IC applications, and
it is resistant to SiO2 etchants.

21-08-2012

Lecture at DIAT

20

polysilicon thin films are commonly deposited by lowpressure chemical vapor deposition (LPCVD) technique.

The typical polysilicon LPCVD reactor (or furnace) is

based on a hot-wall resistance-heated horizontal fusedsilica tube design. The temperature of the wafers in the
furnace is maintained by heating the tube using resistive
heating elements. The furnaces are equipped with quartz
boats that have closely spaced vertically oriented slots that
hold the wafers.

The most commonly used source gas is silane (SiH4),

which readily decomposes into Si on substrates heated to
these temperatures.

Typical deposition conditions utilize temperatures from 580

to 650C and pressures ranging from 100 to 400 mtorr.
The polysilicon deposition rate is about 100 /min.

21-08-2012

Lecture at DIAT

21

The microstructure and physical properties of the

deposited polysilicon are a function of the deposition
temperature.

TEM micrograph of an amorphous Si

film deposited at 570C.

21-08-2012

Lecture at DIAT

TEM micrograph of a
polysilicon film deposited at
620C.

22

During the fabrication of micromechanical devices,

polysilicon films typically undergo one or more hightemperature processing steps
doping,
thermal oxidation,
annealing

These steps can cause recrystallization of the

polysilicon grains leading to a reorientation of the film
and a significant increase in average grain size.

the polysilicon surface roughness increases with the

increase in grain size. This is undesirable outcome
from a fabrication point of view because surface
roughness limits pattern resolution.

21-08-2012

Lecture at DIAT

23

Thin films are generally under a state of stress commonly

referred to as residual stress.

In polysilicon micromechanical structures, the residual

stress in the films can greatly affect the performance of
the device.

as-deposited polysilicon films have compressive residual

stresses. It depends on microstructure,

The highest compressive stresses are found in polysilicon

films with a strong columnar (110) texture.

For films with fine grained microstructures, the stress

tends to be tensile.

For the same deposition conditions, thick polysilicon films

tend to have lower residual stress values than thin films;

21-08-2012

Lecture at DIAT

24

Annealing can be used to reduce the compressive

stress in as-deposited polysilicon films.

For polysilicon films deposited at 650C, the

compressive residual stress is typically on the order of
5 x 109 to 10 x 109 dyne/cm2.

After annealing it is reduced to less than 108 dyne/cm2

RTA is a fast and effective method of stress reduction

in polysilicon films.

For polysilicon films deposited at 620C with

compressive stresses of about 340MPa, a 10 sec
anneal at 1100C was sufficient to completely relieve
the stress

21-08-2012

Lecture at DIAT

25

For single-crystal silicon the youngs modulus in different directions can vary
from 125 to 180GPa.
Randomly oriented polycrystalline silicon should have a Youngs modulus
between 163 and 166GPa.
The fracture strength depends on the flaws in the material.
21-08-2012

Lecture at DIAT

26

Silicon Dioxide (SiO2)

SiO2 can be grown thermally on Si substrates as well as

deposited using a variety of processes to satisfy a wide
range of different requirements.

In polysilicon surface micromachining, SiO 2 is used as a

sacrificial material, as it can be dissolved easily using
etchants that do not attack polysilicon.

SiO2 is also used as an etch mask for dry etching of thick

polysilicon films because it is chemically resistant to dry
polysilicon etch chemistries.

21-08-2012

Lecture at DIAT

27

The SiO2 growth and deposition processes most widely

used in polysilicon surface micromachining are thermal
oxidation and LPCVD.

Thermal oxidation of Si is performed at high temperatures

(e.g., 900 to 1000C) in the presence of oxygen or steam.

The maximum practical film thickness that can be obtained

is about 2 m, which for many sacrificial applications is
sufficient.

21-08-2012

Lecture at DIAT

28

P is incorporated to form phosphosilicate glass (PSG). PSG is

formed using the same deposition process as LTO, with PH3
added to dope the glass with a P content ranging from 2 to 8
wt%.

PSG has an even higher etch rate in HF than LTO, further

facilitating the release of polysilicon surface-micromachined
components.

PSG flows at high temperatures (e.g., 1000 to 1100C) which

can be exploited to create a smooth surface topography.

Additionally, PSG layers sandwiching a polysilicon film can be

used as a P-doping source, improving the uniformity of
diffusion-based doping.

21-08-2012

Lecture at DIAT

29

The dissolution of the sacrificial SiO2 to release free-standing

structures is a critical step in polysilicon surface
micromachining.

Typically, 49% (by weight) HF is used for the release process.

To pattern oxide films using wet chemistries, etching in buffered

HF (28 ml 49% HF, 170 ml H2O, 113 g NH4F), also known as
buffered oxide etch (BOE), is common for large structures.

A third wet etchant, known as P-etch, is traditionally used to

selectively remove PSG over undoped oxide.

21-08-2012

Lecture at DIAT

30

21-08-2012

Lecture at DIAT

31

Other Materials:

Semiconductors like InP have also been

micromachined mainly to take advantage of their
photonics capabilities and serve as tunable laser
source.

Quartz crystal has strong piezoelectric effect that

has been put into use to build resonant sensors
like gyroscope or mass sensors.

Glass is only second to silicon in its use in MEMS

fabrication because it can easily form tight bond
with silicon and also because it can be used to
obtain bio-compatible channels for BioMEMS.

21-08-2012

Lecture at DIAT

32

Contd

Polymers are also often used for BioMEMS fabrication

where they can be tailored to provide bio-degradability
or bio-absorbability. The versatility of polymers makes
them interesting for other MEMS application, and for
example the reflow appearing at moderate temperature
has been used to obtain arrays of spherical microlenses
for optical MEMS. This thermoplastic property also allows
molding, making polymer MEMS a cheap alternative to
silicon based system, particularly for microfluidic
application.

Recently the availability of photosensitive polymers like

SU8 that can be spun to thickness exceeding 100 m
and patterned with vertical sides has further increased
the possibility to build polymer structure.

21-08-2012

Lecture at DIAT

33

How MEMS are made

21-08-2012

Micro-fabrication is the set of technologies used to

manufacture structures with micrometric features.
As MEMS devices have about the same feature size
as integrated circuits, MEMS fabrication technology
quickly took inspiration from microelectronics.
Techniques like photolithography, thin film
deposition by chemical vapor deposition (CVD) or
physical vapor deposition (PVD), thin film growth
by oxidation and epitaxy, doping by ion
implantation or diffusion, wet etching, dry etching,
etc have all been adopted by the MEMS
technologists
Plus some unique techniques suitable bulk
micromachining, surface micromachining, LIGA, etc
Lecture at DIAT

34

Process Classification

It starts with a wafer (silicon, polymer, glass...) that may play

an active role in the final device (bulk micromachining) or
may only be a substrate on which the MEMS is built (surface
micromachining).

This wafer is processed with a succession of processes that

add, modify or remove materials along precise patterns.

Additive process
Evaporation
Sputtering
CVD
Spin-coating

21-08-2012

Modifying process
Oxidation
Doping
Annealing
UV exposure

Lecture at DIAT

Substractive process
Wet etching
Dry etching
Sacrificial etching
Development

35

MEMS production process

21-08-2012

Lecture at DIAT

36

Common Sensing Methods

21-08-2012

Piezoresistivity
piezoelectricity

Lecture at DIAT

37

Piezoresistivity

Piezoresistivity is the phenomenon by which an

electrical resistance changes in response to
mechanical stress.
Most of the resistance change in metals is due to
dimensional changes: under stress, the resistor gets
longer, narrower, and thinner

Thin foil metal strain

gauge

21-08-2012

Lecture at DIAT

38

The piezoresistive effect in silicon and germanium was

much greater (by roughly two orders of magnitude)
than in metals.
Impurity-doped silicon exhibits a piezoresistive
behavior that lies at the core of many pressure and
acceleration sensor Techniques for Sensing and
Actuation

11 12 parallel and perpendicular Piezoelectric coeffs

11

12

parallel and perpendicular stress components

Polysilicon and amorphous silicon also exhibit a strong

piezoresistive effect
21-08-2012

Lecture at DIAT

39

Piezoelectricity

Certain classes of crystals exhibit the peculiar property of

producing an electric field when subjected to an external force.
Conversely, they expand or contract in response to an externally
applied voltage.

They are attractive for MEMS because they can be used as

sensors as well as actuators, and they can be deposited as thin
films over standard silicon substrates.
21-08-2012

Lecture at DIAT

40

A crystal with a center of symmetry, such as a cubic crystal, e.g.

Silicon, is not piezoelectric because the net electric dipole within
the primitive unit is always vanishing, even in the presence of an
externally applied stress and further, the atoms are held together
by covalent (not ionic) bonding.

Piezoelectric materials:
Quartz: but there are no available methods to deposit crystalline
quartz as a thin film over silicon substrates.
Piezoelectric ceramics: Lithium niobate (LiNbO3) and barium titanate
(BaTiO3) but they are also difficult to deposit as thin films.
lead zirconate titanate (PZT)a ceramic based on solid solutions of
lead zirconate (PbZrO3) and lead titanate (PbTiO3)can be
deposited as thin film with.
Zinc oxide is typically sputtered and PZT can be either sputtered or
deposited in a sol-gel process
PVDF is a polymer that can be spun on.
These deposited films must be poled (i.e., polarized by heating above
the Curie temperature, then cooling with a large electric field across
them) in order to exhibit piezoelectric behavior.
21-08-2012

Lecture at DIAT

41

Merits and Demerits

21-08-2012

Lecture at DIAT

42

Common Actuation Methods

There are five schemes

The choice of actuation depends on

21-08-2012

electrostatic,
piezoelectric,
thermal,
magnetic, and
phase recovery using shape-memory alloys.
nature of the application,
ease of integration with the fabrication process,
the specifics of the system around it and
economic justification.
Lecture at DIAT

43

Electrostatic actuation

It relies on the attractive force between two conductive

plates or elements carrying opposite charges. An applied
voltage, regardless of its polarity, always results in an
attractive electrostatic force.
If C is the capacitance between two parallel plates, x is the
spacing between them, and V is an externally applied
voltage, the electrostatic force is then CV2/x (the square
term ensures that the force is always positive and
attractive).

21-08-2012

Lecture at DIAT

44

Piezoelectric Actuation

21-08-2012

Piezoelectric actuation can provide significantly

large forces, especially if thick piezoelectric films
are used.
Commercially available piezoceramic cylinders
can provide up to a few newtons of force with
applied potentials on the order of a few hundred
volts.
However, thin-film (<5 m) piezoelectric actuators
can only provide a few millinewtons.
Both piezoelectric and electrostatic methods offer
the advantage of low power consumption as the
electric current is very small

Lecture at DIAT

45

Design Methodology

Start with a list of specifications for the MEM device or system

Identification of the general operating principles and overall

structural elements,

Analysis and Simulation,

Outlining of the individual steps in the fabrication process.

This is often an iterative process involving continuous

adjustments to the shape, structure, and fabrication steps.

21-08-2012

Lecture at DIAT

46

Contd--

The layout of the lithographic masks is completed

using specialized CAD tools to define the twodimensional patterns.

Process is interdisciplinary: includes considerations

from mechanics, optics, fluid dynamics, materials
science, electronics, chemistry, and even biological
sciences.

Determining a particular approach may rely on

economic considerations or ease of manufacture
rather than performance.

21-08-2012

Lecture at DIAT

47

Modern accelerometers
based on simplest MEMS
design

Mass-damper-spring

Air bag deployment

system rapid negative
acceleration

Si

Electronic stability control

21-08-2012

Lecture at DIAT

teth
er
48

Disadvantages of conventional
Sensors

21-08-2012

Big in size
Consume large power
Inaccurate due to its mechanism, e.g. shape of
fuel tank
High cost
Low yield

Lecture at DIAT

49

Four types of Accelerator used in

Manufacturing

Piezoresistive Bulk Micromachined

Accelerometer

Capacitive Bulk Micromachined Accelerometer

Capacitive Surface Micromachined

Accelerometer
21-08-2012

Capacitive Deep-Etched
Micromachined Accelerometer
Lecture at DIAT

50

Piezo resistive analysis of accelerometer

21-08-2012

Lecture at DIAT

51

Modal behavior of structure

21-08-2012

Lecture at DIAT

52

Acceleration Sensor:Structure

considered for fabrication

Flexture

Proof
mass

Piezo resistive type

21-08-2012

Lecture at DIAT

53

Typical resistor structure

contact
Resistive layer

21-08-2012

Lecture at DIAT

54

Accelerometer specifications

A single axis piezoresistive inertial sensor

(accelerometer) in the range of 50g to 100g is
designed & simulated using Coventorware
software.

Following are the optimized dimensions of

accelerometer.
Flexure: L: 100/200 m, W: 50 m, t: 12 m
Proof mass L: 2000 m, W: 1000 (400) m, t:
200 m

21-08-2012

Lecture at DIAT

55

1Starting wafer:

N type, (100), Double Side Polished, 225 m

thick, 76 mm diameter, 7 Ohm cm, Silicon
wafers.

Diamond Unit Cell

{100} planes

{110} planes

{111} planes

Si substrate

21-08-2012

Lecture at DIAT

56

Silicon Crystal Structure & planes

21-08-2012

Lecture at DIAT

57

2 Cleaning of wafers

Wafer surfaces have four types of contaminants

such as Particulates, Organic residues, Inorganic
residues and unwanted oxide layers.

It is essential to have clean wafers at all stages

of fabrication process and specifically before
performing any high temperature operations.

The wafers are cleaned using the standard wet

cleaning processes such as RCA1 (SC1) and
RCA2 (SC2)

21-08-2012

Lecture at DIAT

58

3 Thermal Oxidation

The oxidation layer is used as a mask against implant or diffusion or

selective metallization.
Silicon surface has a affinity for oxygen. An oxide layer is rapidly
formed when Si is exposed to oxidising ambient. Chemical reaction
describing thermal oxidation in oxygen or water vapour is
Si (Solid) + O2 = SiO2 (Solid)
Si (Solid) + 2H2O = SiO2 (Solid) + 2H2

The typical temperature used for this process is bet. 900 1100C
Thickness required 0.5 m
21-08-2012

Lecture at DIAT

59

4Negative PR Coat & Patterning on

front side:

P+ diffused layer is required to be created to provide

electrical inter-connects between resistors. Therefore, this
oxide layer is patterned for deposition of diborane.

Standard lithography technique is used for patterning P+.

In order to avoid etching of oxide from backside, negative
photo-resist is manually coated on backside and baked.

The SiO2 layer is then etched out from the patterned P+

windows using buffered HF.

21-08-2012

Lecture at DIAT

60

Opaque

Transparent

Metallization
Substrate

Mask made up of
Glass or lith film

(a)

Substrate
Exposure

+ve Resist
Metallization
on
(b)

Substrate
Exposure

Mask
+ve Resist
Metallization
Substrate

-ve Resist
Metallization

-ve Resist
Metallization
Substrate

(c)

+ve Resist
Metallization
Substrate

-ve Resist
Metallization
Substrate

(d)

+ve Resist
Metallization
Substrate

-ve Resist
Metallization
Substrate

(e)

Metallization
Substrate

Metallization
Substrate

(f)

21-08-2012

Lecture at DIAT
: Lithography process for pattern transfer

61

5 Diborane Deposition by APCVD &

diffusion

Diborane (B2H6) is deposited on front side of the wafer

using APCVD system and diffused at elevated
temperature

This creates P+ layer on the etched windows in oxide.

In the process of diffusion, borosilicate glass (BSG) gets

formed as a by-product on the front surface. This BSG
layer is softened by means of high temp heating (900C),
and HF based dip etch process is used to remove the
BSG after its softening.

21-08-2012

Lecture at DIAT

62

CVD Schematic Diagram

21-08-2012

Lecture at DIAT

63

CVD System

21-08-2012

Lecture at DIAT

64

6 Thermal Oxidation:

For the formation of piezoresistors the

process wafers are again oxidized from
both sides using steam oxidation

Thickness required 0.5 m

21-08-2012

Lecture at DIAT

65

7 Negative PR Coat & Patterning on

front side:

patterned on the front side using Resistor

mask employing standard lithography
process

Resistor Mask

21-08-2012

Lecture at DIAT

66

8 Resistor implantation, Annealing and

oxidation

21-08-2012

After creating desired window in oxide on the

front side, boron impurities are implanted in
Silicon using ion-implantation process.
Dopants atoms are vaporised, accelerated and
directed at a silicon substrate. The process is
carried out in vacuum.
The atoms enter the crystal lattice, collide with
silicon atoms and gradually loose energy, finally
coming to rest at some depth in silicon lattice.
Lecture at DIAT

67

Contd
The average dose can be controlled
by monitoring the ion current during
implantation.
Ion implantation energies : 1KeV 1
MeV
Average depths : 100 10 m
Ion Dose range : 1012 ions /cm2 1018
ions /cm2
The side effect is disruption of the
silicon lattice. The wafers are
annealed to diffuse the impurities and
re-crystallization purpose.
The wafer is again oxidised to close
the opened windows for resistors

21-08-2012

Lecture at DIAT

68

9 Si3N4 Deposition

Si3N4 layer is deposited on the both sides to serve as a

mask for Bulk Micro-Machining
Silicon nitride is chemically deposited by reacting
silane and ammonia at atmospheric pressure at
temperatures between 700 and 900oC or by reacting
dichlorosilane and ammonia at reduced pressure.
The chemical reactions are
3SiH4 + 4NH3 = Si3N4 + 12H2
3SiCl2H2 + 4 NH3 = Si3N4 + 6HCl+ 6H2

21-08-2012

Lecture at DIAT

69

10 Negative PR Coat & Patterning on

Back side (BMM)BMM

Deposited layer is then patterned using BMM

(Bulk Micro Machining) mask to open window on
backside for Proof mass formation.

Si3N4 layer is then etched from this exposed

part using HF based solution

21-08-2012

Lecture at DIAT

70

11 Bulk micromachining for 190

micron.

Bulk micromachining is the most important process

in accelerometer fabrication.
In bulk micromachining, the exposed areas of the
silicon substrate are etched off anisotropically
Bulk micromachining can be done either by wet
etching (KOH) or by dry etching (DRIE) process.
For 190m silicon etching wet etching is selected in
the present work.
Process optimization necessary.
Etching with KOH at the etch rate of 40m/h at 80oC
is done.

21-08-2012

Lecture at DIAT

71

Isotropic and Anisotropic Etching

Isotropic etching

21-08-2012

Anisotropic etching

Lecture at DIAT

72

12Si3N4 Etching and Contact

Si3N4 patterning on front side of wafer.

This opens the window on P+ for metal

deposition.

21-08-2012

Lecture at DIAT

73

13 Metallization GOLD METAL

21-08-2012

For interconnection between resistor and bondpad connection metallization is done using Au.

The gold is having poor adhesion on silicon

surface. Thus very thin chrome layer is used as
adhesive layer in between Gold and silicon.

Lecture at DIAT

74

Schematic Diagram of Vacuum

Evaporation System

21-08-2012

Lecture at DIAT

75

RF and DC Sputtering System

21-08-2012

Lecture at DIAT

76

14 METAL Pattering

21-08-2012

This layer is patterned using positive

photoresist and the metallization mask

Lecture at DIAT

77

15 Dicing

Figure 1.1: A Cell containing all six design

variations

21-08-2012

Lecture at DIAT

Figure 1.2: Mask Layout for 3

wafer

78

16 Structure Release

It is the last process of Piezoresistive

accelerometer fabrication.

In this process, wet etching is done up to the

depth of 30-35m using KOH. It is required that
KOH should etch only Si. On the wafer side
Si3N4, Si and pattern Au layer are present.
Si3N4 and Au are good masking material thus
only exposed Si get etched in KOH.

21-08-2012

Lecture at DIAT

79

Released accelerometer

Fig 1.3:- Released accelerometer

21-08-2012

Lecture at DIAT

80

Capping Wafer
Etching of glass to 200 m depth

Anodic BondingSealing the

device with Glass cap wafers

Capping WaferEtching of glass to

240 m depth

21-08-2012

Lecture at DIAT

81

21-08-2012

Lecture at DIAT

82

MEMS Specific fabrication

process
Bulk
micromachining
Surface
micromachining

Deep reactive ion

etching (DRIE)
83
21-08-2012

Lecture at DIAT

Bulk Vs Surface micromachining

21-08-2012

Lecture at DIAT

84

RF Switch fabrication: Surface

micromachining

Standard RF MEMS switch (cross-section view)

Microstripsine
21-08-2012

Lecture at DIAT

85

21-08-2012

1. RCA clean silicon wafer.

2.Grow oxide layer on the silicon substrate.
Thin SiO2 is required if high resistivity silicon
substrate are not being used

Lecture at DIAT

86

21-08-2012

Deposition of Gold
Thin film Gold is deposited for microstrip transmission
line and for bottom actuation electrode.

Lecture at DIAT

87

21-08-2012

Gold is patterned by spinning resist and then exposing

the wafer to UV light through mask.

Lecture at DIAT

88

21-08-2012

Deposition of Polyimide
Polyimide is spin coated onto the substrate.

Lecture at DIAT

89

21-08-2012

Deposition of Hard mask and pattering.

Deposition of hard mask material (generally metal like
Al) is carried out on polyimide and then
lithographically an opening is made in the hard mask.

Lecture at DIAT

90

21-08-2012

Dry etching of Polyimide.

Dry etching of sacrificial layer is carried out in O2
plasma

Lecture at DIAT

91

Partial etching of sacrificial layer.

Hard mask is patterned for tip, and then sacrificial

layer is partial etched for making gold contact.

21-08-2012

Lecture at DIAT

92

21-08-2012

Wet etching is used to remove hard mask, as it is of metal the

respective metal etchant is used to remove the mask.

Lecture at DIAT

93

21-08-2012

Gold deposition is carried out using gold sputtering system to

avoid deposition on sidewalls of polyimide.

Lecture at DIAT

94

21-08-2012

Patterning and etching of gold is carried with

lithographic process.

Lecture at DIAT

95

21-08-2012

Deposition of Si3N4
Deposition of Si3N4 is deposited using Hot-wire CVD
or PECVD (Plasma enhanced chemical vapor
deposition) system.

Lecture at DIAT

96

21-08-2012

Deposition of top gold electrode and patterning.

Gold is deposited and is patterned lithographically to
get the top electrode.

Lecture at DIAT

97

21-08-2012

Release the structure.

Finally we dry etch the polyimide, by plasma asher in O2 plasma
to release the switch structure.

Lecture at DIAT

98

21-08-2012

Lecture at DIAT

99